Home | History | Annotate | Download | only in common 
      1 /*
      2 // Copyright(c)2014 IntelCorporation
      3 //
      4 // LicensedundertheApacheLicense,Version2.0(the"License");
      5 // youmaynotusethisfileexceptincompliancewiththeLicense.
      6 // YoumayobtainacopyoftheLicenseat
      7 //
      8 // http://www.apache.org/licenses/LICENSE-2.0
      9 //
     10 // Unlessrequiredbyapplicablelaworagreedtoinwriting,software
     11 // distributedundertheLicenseisdistributedonan"ASIS"BASIS,
     12 // WITHOUTWARRANTIESORCONDITIONSOFANYKIND,eitherexpressorimplied.
     13 // SeetheLicenseforthespecificlanguagegoverningpermissionsand
     14 // limitationsundertheLicense.
     15 */
     16 #include <common/utils/HwcTrace.h>
     17 #include <common/base/Drm.h>
     18 #include <Hwcomposer.h>
     19 #include <ips/common/VsyncControl.h>
     20 
     21 namespace android {
     22 namespace intel {
     23 
     24 VsyncControl::VsyncControl()
     25     : IVsyncControl(),
     26       mInitialized(false)
     27 {
     28 }
     29 
     30 VsyncControl::~VsyncControl()
     31 {
     32     WARN_IF_NOT_DEINIT();
     33 }
     34 
     35 bool VsyncControl::initialize()
     36 {
     37     mInitialized = true;
     38     return true;
     39 }
     40 
     41 void VsyncControl::deinitialize()
     42 {
     43     mInitialized = false;
     44 }
     45 
     46 bool VsyncControl::control(int disp, bool enabled)
     47 {
     48     ALOGTRACE("disp = %d, enabled = %d", disp, enabled);
     49 
     50     struct drm_psb_vsync_set_arg arg;
     51     memset(&arg, 0, sizeof(struct drm_psb_vsync_set_arg));
     52 
     53     // pipe equals to disp
     54     arg.vsync.pipe = disp;
     55 
     56     if (enabled) {
     57         arg.vsync_operation_mask = VSYNC_ENABLE;
     58     } else {
     59         arg.vsync_operation_mask = VSYNC_DISABLE;
     60     }
     61     Drm *drm = Hwcomposer::getInstance().getDrm();
     62     return drm->writeReadIoctl(DRM_PSB_VSYNC_SET, &arg, sizeof(arg));
     63 }
     64 
     65 bool VsyncControl::wait(int disp, int64_t& timestamp)
     66 {
     67     ALOGTRACE("disp = %d", disp);
     68 
     69     struct drm_psb_vsync_set_arg arg;
     70     memset(&arg, 0, sizeof(struct drm_psb_vsync_set_arg));
     71 
     72     arg.vsync_operation_mask = VSYNC_WAIT;
     73 
     74     // pipe equals to disp
     75     arg.vsync.pipe = disp;
     76 
     77     Drm *drm = Hwcomposer::getInstance().getDrm();
     78     bool ret = drm->writeReadIoctl(DRM_PSB_VSYNC_SET, &arg, sizeof(arg));
     79     timestamp = (int64_t)arg.vsync.timestamp;
     80     return ret;
     81 }
     82 
     83 } // namespace intel
     84 } // namespace android
     85