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      1 /******************************************************************************
      2  *
      3  *  Copyright (C) 2012-2014 Broadcom Corporation
      4  *
      5  *  Licensed under the Apache License, Version 2.0 (the "License");
      6  *  you may not use this file except in compliance with the License.
      7  *  You may obtain a copy of the License at:
      8  *
      9  *  http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  *  Unless required by applicable law or agreed to in writing, software
     12  *  distributed under the License is distributed on an "AS IS" BASIS,
     13  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  *  See the License for the specific language governing permissions and
     15  *  limitations under the License.
     16  *
     17  ******************************************************************************/
     18 /******************************************************************************
     19  *
     20  *  The original Work has been changed by NXP Semiconductors.
     21  *
     22  *  Copyright (C) 2015 NXP Semiconductors
     23  *
     24  *  Licensed under the Apache License, Version 2.0 (the "License");
     25  *  you may not use this file except in compliance with the License.
     26  *  You may obtain a copy of the License at
     27  *
     28  *  http://www.apache.org/licenses/LICENSE-2.0
     29  *
     30  *  Unless required by applicable law or agreed to in writing, software
     31  *  distributed under the License is distributed on an "AS IS" BASIS,
     32  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     33  *  See the License for the specific language governing permissions and
     34  *  limitations under the License.
     35  *
     36  ******************************************************************************/
     37 
     38 /******************************************************************************
     39  *
     40  *  ESE Hardware Abstraction Layer API
     41  *
     42  ******************************************************************************/
     43 #ifndef ESE_HAL_API_H
     44 #define ESE_HAL_API_H
     45 #include "data_types.h"
     46 /*******************************************************************************
     47 ** tHAL_HCI_NETWK_CMD Definitions
     48 *******************************************************************************/
     49 #define HAL_ESE_HCI_NO_UICC_HOST 0x00
     50 #define HAL_ESE_HCI_UICC0_HOST 0x01
     51 #define HAL_ESE_HCI_UICC1_HOST 0x02
     52 #define HAL_ESE_HCI_UICC2_HOST 0x04
     53 typedef uint8_t tHAL_ESE_STATUS;
     54 typedef void(tHAL_ESE_STATUS_CBACK)(tHAL_ESE_STATUS status);
     55 typedef void(tHAL_ESE_CBACK)(uint8_t event, tHAL_ESE_STATUS status);
     56 typedef void(tHAL_ESE_DATA_CBACK)(uint16_t data_len, uint8_t* p_data);
     57 
     58 /*******************************************************************************
     59 ** tHAL_ESE_ENTRY HAL entry-point lookup table
     60 *******************************************************************************/
     61 
     62 typedef void(tHAL_SPIAPI_OPEN)(tHAL_ESE_CBACK* p_hal_cback,
     63                                tHAL_ESE_DATA_CBACK* p_data_cback);
     64 typedef void(tHAL_SPIAPI_CLOSE)(void);
     65 typedef void(tHAL_SPIAPI_WRITE)(uint16_t data_len, uint8_t* p_data);
     66 typedef void(tHAL_SPIAPI_READ)(uint16_t data_len, uint8_t* p_data);
     67 typedef int(tHAL_SPIAPI_IOCTL)(long arg, void* p_data);
     68 
     69 #define ESE_HAL_DM_PRE_SET_MEM_LEN 5
     70 typedef struct {
     71   uint32_t addr;
     72   uint32_t data;
     73 } tESE_HAL_DM_PRE_SET_MEM;
     74 
     75 /* data members for ESE_HAL-HCI */
     76 typedef struct {
     77   bool ese_hal_prm_nvm_required; /* set ese_hal_prm_nvm_required to true, if the
     78                                     platform wants to abort PRM process without
     79                                     NVM */
     80   uint16_t ese_hal_esec_enable_timeout; /* max time to wait for RESET NTF after
     81                                            setting REG_PU to high */
     82   uint16_t ese_hal_post_xtal_timeout;   /* max time to wait for RESET NTF after
     83                                            setting Xtal frequency */
     84 #if (ESE_HAL_HCI_INCLUDED == true)
     85   bool ese_hal_first_boot; /* set ese_hal_first_boot to true, if platform
     86                               enables ESE for the first time after bootup */
     87   uint8_t ese_hal_hci_uicc_support; /* set ese_hal_hci_uicc_support to Zero, if
     88                                        no UICC is supported otherwise set
     89                                        corresponding bit(s) for every supported
     90                                        UICC(s) */
     91 #endif
     92 } tESE_HAL_CFG;
     93 
     94 typedef struct {
     95   tHAL_SPIAPI_OPEN* open;
     96   tHAL_SPIAPI_CLOSE* close;
     97   tHAL_SPIAPI_WRITE* write;
     98   tHAL_SPIAPI_READ* Read;
     99   tHAL_SPIAPI_IOCTL* ioctl;
    100 } tHAL_ESE_ENTRY;
    101 
    102 typedef struct {
    103   tHAL_ESE_ENTRY* hal_entry_func;
    104   uint8_t boot_mode;
    105 } tHAL_ESE_CONTEXT;
    106 tHAL_ESE_ENTRY* getInstance();
    107 
    108 #endif /* ESE_HAL_API_H  */
    109