1 /* 2 * 3 * Copyright (c) 2013, The Linux Foundation. All rights reserved. 4 * Not a Contribution. 5 * 6 * Copyright 2012 The Android Open Source Project 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); you 9 * may not use this file except in compliance with the License. You may 10 * obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 17 * implied. See the License for the specific language governing 18 * permissions and limitations under the License. 19 * 20 */ 21 22 /****************************************************************************** 23 * 24 * Filename: hw_ar3k.c 25 * 26 * Description: Contains controller-specific functions, like 27 * firmware patch download 28 * low power mode operations 29 * 30 ******************************************************************************/ 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #define LOG_TAG "bt_vendor" 36 37 #include <sys/uio.h> 38 #include <sys/socket.h> 39 #include <log/log.h> 40 #include <sys/types.h> 41 #include <sys/stat.h> 42 #include <signal.h> 43 #include <time.h> 44 #include <errno.h> 45 #include <fcntl.h> 46 #include <dirent.h> 47 #include <ctype.h> 48 #include <cutils/properties.h> 49 #include <stdlib.h> 50 #include <string.h> 51 #include <termios.h> 52 #include <string.h> 53 #include <unistd.h> 54 55 #include "bt_hci_bdroid.h" 56 #include "hci_uart.h" 57 #include "hw_ar3k.h" 58 59 /****************************************************************************** 60 ** Variables 61 ******************************************************************************/ 62 int cbstat = 0; 63 #define PATCH_LOC_STRING_LEN 8 64 char ARbyte[3]; 65 char ARptr[MAX_PATCH_CMD + 1]; 66 int byte_cnt; 67 int patch_count = 0; 68 char patch_loc[PATCH_LOC_STRING_LEN + 1]; 69 int PSCounter=0; 70 71 uint32_t dev_type = 0; 72 uint32_t rom_version = 0; 73 uint32_t build_version = 0; 74 75 char patch_file[PATH_MAX]; 76 char ps_file[PATH_MAX]; 77 FILE *stream; 78 int tag_count=0; 79 80 /* for friendly debugging outpout string */ 81 static char *lpm_mode[] = { 82 "UNKNOWN", 83 "disabled", 84 "enabled" 85 }; 86 87 static char *lpm_state[] = { 88 "UNKNOWN", 89 "de-asserted", 90 "asserted" 91 }; 92 93 static uint8_t upio_state[UPIO_MAX_COUNT]; 94 struct ps_cfg_entry ps_list[MAX_TAGS]; 95 96 #define PS_EVENT_LEN 100 97 98 #ifdef __cplusplus 99 } 100 #endif 101 102 #define RESERVED(p) if(p) ALOGI( "%s: reserved param", __FUNCTION__); 103 104 /***************************************************************************** 105 ** Functions 106 *****************************************************************************/ 107 108 int is_bt_soc_ath() { 109 int ret = 0; 110 char bt_soc_type[PROPERTY_VALUE_MAX]; 111 ret = property_get("qcom.bluetooth.soc", bt_soc_type, NULL); 112 if (ret != 0) { 113 ALOGI("qcom.bluetooth.soc set to %s\n", bt_soc_type); 114 if (!strncasecmp(bt_soc_type, "ath3k", sizeof("ath3k"))) 115 return 1; 116 } else { 117 ALOGI("qcom.bluetooth.soc not set, so using default.\n"); 118 } 119 120 return 0; 121 } 122 123 /* 124 * Send HCI command and wait for command complete event. 125 * The event buffer has to be freed by the caller. 126 */ 127 128 static int send_hci_cmd_sync(int dev, uint8_t *cmd, int len, uint8_t **event) 129 { 130 int err; 131 uint8_t *hci_event; 132 uint8_t pkt_type = HCI_COMMAND_PKT; 133 134 if (len == 0) 135 return len; 136 137 if (write(dev, &pkt_type, 1) != 1) 138 return -EILSEQ; 139 if (write(dev, (unsigned char *)cmd, len) != len) 140 return -EILSEQ; 141 142 hci_event = (uint8_t *)malloc(PS_EVENT_LEN); 143 if (!hci_event) 144 return -ENOMEM; 145 146 err = read_hci_event(dev, (unsigned char *)hci_event, PS_EVENT_LEN); 147 if (err > 0) { 148 *event = hci_event; 149 } else { 150 free(hci_event); 151 return -EILSEQ; 152 } 153 154 return len; 155 } 156 157 static void convert_bdaddr(char *str_bdaddr, char *bdaddr) 158 { 159 char bdbyte[3]; 160 char *str_byte = str_bdaddr; 161 int i, j; 162 int colon_present = 0; 163 164 if (strstr(str_bdaddr, ":")) 165 colon_present = 1; 166 167 bdbyte[2] = '\0'; 168 169 /* Reverse the BDADDR to LSB first */ 170 for (i = 0, j = 5; i < 6; i++, j--) { 171 bdbyte[0] = str_byte[0]; 172 bdbyte[1] = str_byte[1]; 173 bdaddr[j] = strtol(bdbyte, NULL, 16); 174 175 if (colon_present == 1) 176 str_byte += 3; 177 else 178 str_byte += 2; 179 } 180 } 181 182 static int uart_speed(int s) 183 { 184 switch (s) { 185 case 9600: 186 return B9600; 187 case 19200: 188 return B19200; 189 case 38400: 190 return B38400; 191 case 57600: 192 return B57600; 193 case 115200: 194 return B115200; 195 case 230400: 196 return B230400; 197 case 460800: 198 return B460800; 199 case 500000: 200 return B500000; 201 case 576000: 202 return B576000; 203 case 921600: 204 return B921600; 205 case 1000000: 206 return B1000000; 207 case 1152000: 208 return B1152000; 209 case 1500000: 210 return B1500000; 211 case 2000000: 212 return B2000000; 213 #ifdef B2500000 214 case 2500000: 215 return B2500000; 216 #endif 217 #ifdef B3000000 218 case 3000000: 219 return B3000000; 220 #endif 221 #ifdef B3500000 222 case 3500000: 223 return B3500000; 224 #endif 225 #ifdef B4000000 226 case 4000000: 227 return B4000000; 228 #endif 229 default: 230 return B57600; 231 } 232 } 233 234 int set_speed(int fd, struct termios *ti, int speed) 235 { 236 if (cfsetospeed(ti, uart_speed(speed)) < 0) 237 return -errno; 238 239 if (cfsetispeed(ti, uart_speed(speed)) < 0) 240 return -errno; 241 242 if (tcsetattr(fd, TCSANOW, ti) < 0) 243 return -errno; 244 245 return 0; 246 } 247 248 static void load_hci_ps_hdr(uint8_t *cmd, uint8_t ps_op, int len, int index) 249 { 250 hci_command_hdr *ch = (void *)cmd; 251 252 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 253 HCI_PS_CMD_OCF)); 254 ch->plen = len + PS_HDR_LEN; 255 cmd += HCI_COMMAND_HDR_SIZE; 256 257 cmd[0] = ps_op; 258 cmd[1] = index; 259 cmd[2] = index >> 8; 260 cmd[3] = len; 261 } 262 263 264 static int read_ps_event(uint8_t *event, uint16_t ocf) 265 { 266 hci_event_hdr *eh; 267 uint16_t opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, ocf)); 268 269 event++; 270 271 eh = (void *)event; 272 event += HCI_EVENT_HDR_SIZE; 273 274 if (eh->evt == EVT_CMD_COMPLETE) { 275 evt_cmd_complete *cc = (void *)event; 276 277 event += EVT_CMD_COMPLETE_SIZE; 278 279 if (cc->opcode == opcode && event[0] == HCI_EV_SUCCESS) 280 return 0; 281 else 282 return -EILSEQ; 283 } 284 285 return -EILSEQ; 286 } 287 288 #define PS_WRITE 1 289 #define PS_RESET 2 290 #define WRITE_PATCH 8 291 #define ENABLE_PATCH 11 292 293 #define HCI_PS_CMD_HDR_LEN 7 294 295 static int write_cmd(int fd, uint8_t *buffer, int len) 296 { 297 uint8_t *event; 298 int err; 299 300 err = send_hci_cmd_sync(fd, buffer, len, &event); 301 if (err < 0) 302 return err; 303 304 err = read_ps_event(event, HCI_PS_CMD_OCF); 305 306 free(event); 307 308 return err; 309 } 310 311 #define PS_RESET_PARAM_LEN 6 312 #define PS_RESET_CMD_LEN (HCI_PS_CMD_HDR_LEN + PS_RESET_PARAM_LEN) 313 314 #define PS_ID_MASK 0xFF 315 316 /* Sends PS commands using vendor specficic HCI commands */ 317 static int write_ps_cmd(int fd, uint8_t opcode, uint32_t ps_param) 318 { 319 uint8_t cmd[HCI_MAX_CMD_SIZE]; 320 uint32_t i; 321 322 switch (opcode) { 323 case ENABLE_PATCH: 324 load_hci_ps_hdr(cmd, opcode, 0, 0x00); 325 326 if (write_cmd(fd, cmd, HCI_PS_CMD_HDR_LEN) < 0) 327 return -EILSEQ; 328 break; 329 330 case PS_RESET: 331 load_hci_ps_hdr(cmd, opcode, PS_RESET_PARAM_LEN, 0x00); 332 333 cmd[7] = 0x00; 334 cmd[PS_RESET_CMD_LEN - 2] = ps_param & PS_ID_MASK; 335 cmd[PS_RESET_CMD_LEN - 1] = (ps_param >> 8) & PS_ID_MASK; 336 337 if (write_cmd(fd, cmd, PS_RESET_CMD_LEN) < 0) 338 return -EILSEQ; 339 break; 340 341 case PS_WRITE: 342 for (i = 0; i < ps_param; i++) { 343 load_hci_ps_hdr(cmd, opcode, ps_list[i].len, 344 ps_list[i].id); 345 346 memcpy(&cmd[HCI_PS_CMD_HDR_LEN], ps_list[i].data, 347 ps_list[i].len); 348 349 if (write_cmd(fd, cmd, ps_list[i].len + 350 HCI_PS_CMD_HDR_LEN) < 0) 351 return -EILSEQ; 352 } 353 break; 354 } 355 356 return 0; 357 } 358 359 #define PS_ASIC_FILE "PS_ASIC.pst" 360 #define PS_FPGA_FILE "PS_FPGA.pst" 361 #define MAXPATHLEN 4096 362 static void get_ps_file_name(uint32_t devtype, uint32_t rom_version,char *path) 363 { 364 char *filename; 365 366 if (devtype == 0xdeadc0de) 367 filename = PS_ASIC_FILE; 368 else 369 filename = PS_FPGA_FILE; 370 371 snprintf(path, MAXPATHLEN, "%s%x/%s", FW_PATH, rom_version, filename); 372 } 373 374 #define PATCH_FILE "RamPatch.txt" 375 #define FPGA_ROM_VERSION 0x99999999 376 #define ROM_DEV_TYPE 0xdeadc0de 377 378 static void get_patch_file_name(uint32_t dev_type, uint32_t rom_version, 379 uint32_t build_version, char *path) 380 { 381 if (rom_version == FPGA_ROM_VERSION && dev_type != ROM_DEV_TYPE 382 &&dev_type != 0 && build_version == 1) 383 path[0] = '\0'; 384 else 385 snprintf(path, MAXPATHLEN, "%s%x/%s", FW_PATH, rom_version, PATCH_FILE); 386 } 387 388 static int set_cntrlr_baud(int fd, int speed) 389 { 390 int baud; 391 struct timespec tm = { 0, 500000}; 392 unsigned char cmd[MAX_CMD_LEN], rsp[HCI_MAX_EVENT_SIZE]; 393 unsigned char *ptr = cmd + 1; 394 hci_command_hdr *ch = (void *)ptr; 395 396 cmd[0] = HCI_COMMAND_PKT; 397 398 /* set controller baud rate to user specified value */ 399 ptr = cmd + 1; 400 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 401 HCI_CHG_BAUD_CMD_OCF)); 402 ch->plen = 2; 403 ptr += HCI_COMMAND_HDR_SIZE; 404 405 baud = speed/100; 406 ptr[0] = (char)baud; 407 ptr[1] = (char)(baud >> 8); 408 409 if (write(fd, cmd, WRITE_BAUD_CMD_LEN) != WRITE_BAUD_CMD_LEN) { 410 ALOGI("Failed to write change baud rate command"); 411 return -ETIMEDOUT; 412 } 413 414 nanosleep(&tm, NULL); 415 416 if (read_hci_event(fd, rsp, sizeof(rsp)) < 0) 417 return -ETIMEDOUT; 418 419 return 0; 420 } 421 422 #define PS_UNDEF 0 423 #define PS_ID 1 424 #define PS_LEN 2 425 #define PS_DATA 3 426 427 #define PS_MAX_LEN 500 428 #define LINE_SIZE_MAX (PS_MAX_LEN * 2) 429 #define ENTRY_PER_LINE 16 430 431 #define __check_comment(buf) (((buf)[0] == '/') && ((buf)[1] == '/')) 432 #define __skip_space(str) while (*(str) == ' ') ((str)++) 433 434 435 #define __is_delim(ch) ((ch) == ':') 436 #define MAX_PREAMBLE_LEN 4 437 438 /* Parse PS entry preamble of format [X:X] for main type and subtype */ 439 static int get_ps_type(char *ptr, int index, char *type, char *sub_type) 440 { 441 int i; 442 int delim = false; 443 444 if (index > MAX_PREAMBLE_LEN) 445 return -EILSEQ; 446 447 for (i = 1; i < index; i++) { 448 if (__is_delim(ptr[i])) { 449 delim = true; 450 continue; 451 } 452 453 if (isalpha(ptr[i])) { 454 if (delim == false) 455 (*type) = toupper(ptr[i]); 456 else 457 (*sub_type) = toupper(ptr[i]); 458 } 459 } 460 461 return 0; 462 } 463 464 #define ARRAY 'A' 465 #define STRING 'S' 466 #define DECIMAL 'D' 467 #define BINARY 'B' 468 469 #define PS_HEX 0 470 #define PS_DEC 1 471 472 static int get_input_format(char *buf, struct ps_entry_type *format) 473 { 474 char *ptr = NULL; 475 char type = '\0'; 476 char sub_type = '\0'; 477 478 format->type = PS_HEX; 479 format->array = true; 480 481 if (strstr(buf, "[") != buf) 482 return 0; 483 484 ptr = strstr(buf, "]"); 485 if (!ptr) 486 return -EILSEQ; 487 488 if (get_ps_type(buf, ptr - buf, &type, &sub_type) < 0) 489 return -EILSEQ; 490 491 /* Check is data type is of array */ 492 if (type == ARRAY || sub_type == ARRAY) 493 format->array = true; 494 495 if (type == STRING || sub_type == STRING) 496 format->array = false; 497 498 if (type == DECIMAL || type == BINARY) 499 format->type = PS_DEC; 500 else 501 format->type = PS_HEX; 502 503 return 0; 504 } 505 506 507 508 #define UNDEFINED 0xFFFF 509 510 static unsigned int read_data_in_section(char *buf, struct ps_entry_type type) 511 { 512 char *ptr = buf; 513 514 if (!buf) 515 return UNDEFINED; 516 517 if (buf == strstr(buf, "[")) { 518 ptr = strstr(buf, "]"); 519 if (!ptr) 520 return UNDEFINED; 521 522 ptr++; 523 } 524 525 if (type.type == PS_HEX && type.array != true) 526 return strtol(ptr, NULL, 16); 527 528 return UNDEFINED; 529 } 530 531 532 /* Read PS entries as string, convert and add to Hex array */ 533 static void update_tag_data(struct ps_cfg_entry *tag, 534 struct tag_info *info, const char *ptr) 535 { 536 char buf[3]; 537 538 buf[2] = '\0'; 539 540 strlcpy(buf, &ptr[info->char_cnt],sizeof(buf)); 541 tag->data[info->byte_count] = strtol(buf, NULL, 16); 542 info->char_cnt += 3; 543 info->byte_count++; 544 545 strlcpy(buf, &ptr[info->char_cnt], sizeof(buf)); 546 tag->data[info->byte_count] = strtol(buf, NULL, 16); 547 info->char_cnt += 3; 548 info->byte_count++; 549 } 550 551 static inline int update_char_count(const char *buf) 552 { 553 char *end_ptr; 554 555 if (strstr(buf, "[") == buf) { 556 end_ptr = strstr(buf, "]"); 557 if (!end_ptr) 558 return 0; 559 else 560 return(end_ptr - buf) + 1; 561 } 562 563 return 0; 564 } 565 566 #define PS_HEX 0 567 #define PS_DEC 1 568 569 static int ath_parse_ps(FILE *stream) 570 { 571 char buf[LINE_SIZE_MAX + 1]; 572 char *ptr; 573 uint8_t tag_cnt = 0; 574 int16_t byte_count = 0; 575 struct ps_entry_type format; 576 struct tag_info status = { 0, 0, 0, 0}; 577 578 do { 579 int read_count; 580 struct ps_cfg_entry *tag; 581 582 ptr = fgets(buf, LINE_SIZE_MAX, stream); 583 if (!ptr) 584 break; 585 586 __skip_space(ptr); 587 if (__check_comment(ptr)) 588 continue; 589 590 /* Lines with a '#' will be followed by new PS entry */ 591 if (ptr == strstr(ptr, "#")) { 592 if (status.section != PS_UNDEF) { 593 return -EILSEQ; 594 } else { 595 status.section = PS_ID; 596 continue; 597 } 598 } 599 600 tag = &ps_list[tag_cnt]; 601 602 switch (status.section) { 603 case PS_ID: 604 if (get_input_format(ptr, &format) < 0) 605 return -EILSEQ; 606 607 tag->id = read_data_in_section(ptr, format); 608 status.section = PS_LEN; 609 break; 610 611 case PS_LEN: 612 if (get_input_format(ptr, &format) < 0) 613 return -EILSEQ; 614 615 byte_count = read_data_in_section(ptr, format); 616 if (byte_count > PS_MAX_LEN) 617 return -EILSEQ; 618 619 tag->len = byte_count; 620 tag->data = (uint8_t *)malloc(byte_count); 621 622 status.section = PS_DATA; 623 status.line_count = 0; 624 break; 625 626 case PS_DATA: 627 if (status.line_count == 0) 628 if (get_input_format(ptr, &format) < 0) 629 return -EILSEQ; 630 631 __skip_space(ptr); 632 633 status.char_cnt = update_char_count(ptr); 634 635 read_count = (byte_count > ENTRY_PER_LINE) ? 636 ENTRY_PER_LINE : byte_count; 637 638 if (format.type == PS_HEX && format.array == true) { 639 while (read_count > 0) { 640 update_tag_data(tag, &status, ptr); 641 read_count -= 2; 642 } 643 644 if (byte_count > ENTRY_PER_LINE) 645 byte_count -= ENTRY_PER_LINE; 646 else 647 byte_count = 0; 648 } 649 650 status.line_count++; 651 652 if (byte_count == 0) 653 memset(&status, 0x00, sizeof(struct tag_info)); 654 655 if (status.section == PS_UNDEF) 656 tag_cnt++; 657 658 if (tag_cnt == MAX_TAGS) 659 return -EILSEQ; 660 break; 661 } 662 } while (ptr); 663 664 return tag_cnt; 665 } 666 667 #define PS_RAM_SIZE 2048 668 669 static int ps_config_download(int fd, int tag_count) 670 { 671 if (write_ps_cmd(fd, PS_RESET, PS_RAM_SIZE) < 0) 672 return -1; 673 674 if (tag_count > 0) 675 if (write_ps_cmd(fd, PS_WRITE, tag_count) < 0) 676 return -1; 677 return 0; 678 } 679 680 static int write_bdaddr(int pConfig, char *bdaddr) 681 { 682 uint8_t *event; 683 int err; 684 uint8_t cmd[13]; 685 uint8_t *ptr = cmd; 686 hci_command_hdr *ch = (void *)cmd; 687 688 memset(cmd, 0, sizeof(cmd)); 689 690 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 691 HCI_PS_CMD_OCF)); 692 ch->plen = 10; 693 ptr += HCI_COMMAND_HDR_SIZE; 694 695 ptr[0] = 0x01; 696 ptr[1] = 0x01; 697 ptr[2] = 0x00; 698 ptr[3] = 0x06; 699 700 convert_bdaddr(bdaddr, (char *)&ptr[4]); 701 702 err = send_hci_cmd_sync(pConfig, cmd, sizeof(cmd), &event); 703 if (err < 0) 704 return err; 705 706 err = read_ps_event(event, HCI_PS_CMD_OCF); 707 708 free(event); 709 710 return err; 711 } 712 713 static void write_bdaddr_from_file(int rom_version, int fd) 714 { 715 FILE *stream; 716 char bdaddr[PATH_MAX]; 717 char bdaddr_file[PATH_MAX]; 718 719 snprintf(bdaddr_file, MAXPATHLEN, "%s%x/%s", 720 FW_PATH, rom_version, BDADDR_FILE); 721 722 stream = fopen(bdaddr_file, "r"); 723 if (!stream) 724 return; 725 726 if (fgets(bdaddr, PATH_MAX - 1, stream)) 727 write_bdaddr(fd, bdaddr); 728 729 fclose(stream); 730 } 731 732 #define HCI_EVT_CMD_CMPL_OPCODE 3 733 #define HCI_EVT_CMD_CMPL_STATUS_RET_BYTE 5 734 735 void baswap(bdaddr_t *dst, const bdaddr_t *src) 736 { 737 register unsigned char *d = (unsigned char *) dst; 738 register const unsigned char *s = (const unsigned char *) src; 739 register int i; 740 for (i = 0; i < 6; i++) 741 d[i] = s[5-i]; 742 } 743 744 745 int str2ba(const char *str, bdaddr_t *ba) 746 { 747 uint8_t b[6]; 748 const char *ptr = str; 749 int i; 750 751 for (i = 0; i < 6; i++) { 752 b[i] = (uint8_t) strtol(ptr, NULL, 16); 753 ptr = strchr(ptr, ':'); 754 if (i != 5 && !ptr) 755 ptr = ":00:00:00:00:00"; 756 ptr++; 757 } 758 baswap(ba, (bdaddr_t *) b); 759 return 0; 760 } 761 762 #define DEV_REGISTER 0x4FFC 763 #define GET_DEV_TYPE_OCF 0x05 764 765 static int get_device_type(int dev, uint32_t *code) 766 { 767 uint8_t cmd[8] = {0}; 768 uint8_t *event; 769 uint32_t reg; 770 int err; 771 uint8_t *ptr = cmd; 772 hci_command_hdr *ch = (void *)cmd; 773 774 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 775 GET_DEV_TYPE_OCF)); 776 ch->plen = 5; 777 ptr += HCI_COMMAND_HDR_SIZE; 778 779 ptr[0] = (uint8_t)DEV_REGISTER; 780 ptr[1] = (uint8_t)DEV_REGISTER >> 8; 781 ptr[2] = (uint8_t)DEV_REGISTER >> 16; 782 ptr[3] = (uint8_t)DEV_REGISTER >> 24; 783 ptr[4] = 0x04; 784 785 err = send_hci_cmd_sync(dev, cmd, sizeof(cmd), &event); 786 if (err < 0) 787 return err; 788 789 err = read_ps_event(event, GET_DEV_TYPE_OCF); 790 if (err < 0) 791 goto cleanup; 792 793 reg = event[10]; 794 reg = (reg << 8) | event[9]; 795 reg = (reg << 8) | event[8]; 796 reg = (reg << 8) | event[7]; 797 *code = reg; 798 799 cleanup: 800 free(event); 801 802 return err; 803 } 804 805 #define GET_VERSION_OCF 0x1E 806 807 static int read_ath3k_version(int pConfig, uint32_t *rom_version, 808 uint32_t *build_version) 809 { 810 uint8_t cmd[3] = {0}; 811 uint8_t *event; 812 int err; 813 int status; 814 hci_command_hdr *ch = (void *)cmd; 815 816 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 817 GET_VERSION_OCF)); 818 ch->plen = 0; 819 820 err = send_hci_cmd_sync(pConfig, cmd, sizeof(cmd), &event); 821 if (err < 0) 822 return err; 823 824 err = read_ps_event(event, GET_VERSION_OCF); 825 if (err < 0) 826 goto cleanup; 827 828 status = event[10]; 829 status = (status << 8) | event[9]; 830 status = (status << 8) | event[8]; 831 status = (status << 8) | event[7]; 832 *rom_version = status; 833 834 status = event[14]; 835 status = (status << 8) | event[13]; 836 status = (status << 8) | event[12]; 837 status = (status << 8) | event[11]; 838 *build_version = status; 839 840 cleanup: 841 free(event); 842 843 return err; 844 } 845 846 #define VERIFY_CRC 9 847 #define PS_REGION 1 848 #define PATCH_REGION 2 849 850 static int get_ath3k_crc(int dev) 851 { 852 uint8_t cmd[7] = {0}; 853 uint8_t *event; 854 int err; 855 856 load_hci_ps_hdr(cmd, VERIFY_CRC, 0, PS_REGION | PATCH_REGION); 857 858 err = send_hci_cmd_sync(dev, cmd, sizeof(cmd), &event); 859 if (err < 0) 860 return err; 861 /* Send error code if CRC check patched */ 862 if (read_ps_event(event, HCI_PS_CMD_OCF) >= 0) 863 err = -EILSEQ; 864 865 free(event); 866 867 return err; 868 } 869 870 #define SET_PATCH_RAM_ID 0x0D 871 #define SET_PATCH_RAM_CMD_SIZE 11 872 #define ADDRESS_LEN 4 873 static int set_patch_ram(int dev, char *patch_loc, int len) 874 { 875 int err; 876 uint8_t cmd[20] = {0}; 877 int i, j; 878 char loc_byte[3]; 879 uint8_t *event; 880 uint8_t *loc_ptr = &cmd[7]; 881 882 RESERVED(len); 883 884 if (!patch_loc) 885 return -1; 886 887 loc_byte[2] = '\0'; 888 889 load_hci_ps_hdr(cmd, SET_PATCH_RAM_ID, ADDRESS_LEN, 0); 890 891 for (i = 0, j = 3; i < 4; i++, j--) { 892 loc_byte[0] = patch_loc[0]; 893 loc_byte[1] = patch_loc[1]; 894 loc_ptr[j] = strtol(loc_byte, NULL, 16); 895 patch_loc += 2; 896 } 897 898 err = send_hci_cmd_sync(dev, cmd, SET_PATCH_RAM_CMD_SIZE, &event); 899 if (err < 0) 900 return err; 901 902 err = read_ps_event(event, HCI_PS_CMD_OCF); 903 904 free(event); 905 906 return err; 907 } 908 909 #define PATCH_LOC_KEY "DA:" 910 #define PATCH_LOC_STRING_LEN 8 911 static int ps_patch_download(int fd, FILE *stream) 912 { 913 char byte[3]; 914 char ptr[MAX_PATCH_CMD + 1]; 915 int byte_cnt; 916 int patch_count = 0; 917 char patch_loc[PATCH_LOC_STRING_LEN + 1]; 918 919 byte[2] = '\0'; 920 921 while (fgets(ptr, MAX_PATCH_CMD, stream)) { 922 if (strlen(ptr) <= 1) 923 continue; 924 else if (strstr(ptr, PATCH_LOC_KEY) == ptr) { 925 strlcpy(patch_loc, &ptr[sizeof(PATCH_LOC_KEY) - 1], 926 PATCH_LOC_STRING_LEN); 927 if (set_patch_ram(fd, patch_loc, sizeof(patch_loc)) < 0) 928 return -1; 929 } else if (isxdigit(ptr[0])) 930 break; 931 else 932 return -1; 933 } 934 935 byte_cnt = strtol(ptr, NULL, 16); 936 937 while (byte_cnt > 0) { 938 int i; 939 uint8_t cmd[HCI_MAX_CMD_SIZE] = {0}; 940 struct patch_entry patch; 941 942 if (byte_cnt > MAX_PATCH_CMD) 943 patch.len = MAX_PATCH_CMD; 944 else 945 patch.len = byte_cnt; 946 947 for (i = 0; i < patch.len; i++) { 948 if (!fgets(byte, 3, stream)) 949 return -1; 950 951 patch.data[i] = strtoul(byte, NULL, 16); 952 } 953 954 load_hci_ps_hdr(cmd, WRITE_PATCH, patch.len, patch_count); 955 memcpy(&cmd[HCI_PS_CMD_HDR_LEN], patch.data, patch.len); 956 957 if (write_cmd(fd, cmd, patch.len + HCI_PS_CMD_HDR_LEN) < 0) 958 return -1; 959 960 patch_count++; 961 byte_cnt = byte_cnt - MAX_PATCH_CMD; 962 } 963 964 if (write_ps_cmd(fd, ENABLE_PATCH, 0) < 0) 965 return -1; 966 967 return patch_count; 968 } 969 970 static int ath_ps_download(int fd) 971 { 972 int err = 0; 973 int tag_count; 974 int patch_count = 0; 975 uint32_t rom_version = 0; 976 uint32_t build_version = 0; 977 uint32_t dev_type = 0; 978 char patch_file[PATH_MAX]; 979 char ps_file[PATH_MAX]; 980 FILE *stream; 981 982 /* 983 * Verfiy firmware version. depending on it select the PS 984 * config file to download. 985 */ 986 if (get_device_type(fd, &dev_type) < 0) { 987 err = -EILSEQ; 988 goto download_cmplete; 989 } 990 991 if (read_ath3k_version(fd, &rom_version, &build_version) < 0) { 992 err = -EILSEQ; 993 goto download_cmplete; 994 } 995 996 /* Do not download configuration if CRC passes */ 997 if (get_ath3k_crc(fd) < 0) { 998 err = 0; 999 goto download_cmplete; 1000 } 1001 1002 get_ps_file_name(dev_type, rom_version, ps_file); 1003 get_patch_file_name(dev_type, rom_version, build_version, patch_file); 1004 1005 stream = fopen(ps_file, "r"); 1006 if (!stream) { 1007 ALOGI("firmware file open error:%s, ver:%x\n",ps_file, rom_version); 1008 if (rom_version == 0x1020201) 1009 err = 0; 1010 else 1011 err = -EILSEQ; 1012 goto download_cmplete; 1013 } 1014 tag_count = ath_parse_ps(stream); 1015 1016 fclose(stream); 1017 1018 if (tag_count < 0) { 1019 err = -EILSEQ; 1020 goto download_cmplete; 1021 } 1022 1023 /* 1024 * It is not necessary that Patch file be available, 1025 * continue with PS Operations if patch file is not available. 1026 */ 1027 if (patch_file[0] == '\0') 1028 err = 0; 1029 1030 stream = fopen(patch_file, "r"); 1031 if (!stream) 1032 err = 0; 1033 else { 1034 patch_count = ps_patch_download(fd, stream); 1035 fclose(stream); 1036 1037 if (patch_count < 0) { 1038 err = -EILSEQ; 1039 goto download_cmplete; 1040 } 1041 } 1042 1043 err = ps_config_download(fd, tag_count); 1044 1045 download_cmplete: 1046 if (!err) 1047 write_bdaddr_from_file(rom_version, fd); 1048 1049 return err; 1050 } 1051 1052 int ath3k_init(int fd, int speed, int init_speed, char *bdaddr, struct termios *ti) 1053 { 1054 ALOGI(" %s ", __FUNCTION__); 1055 1056 int r; 1057 int err = 0; 1058 struct timespec tm = { 0, 500000}; 1059 unsigned char cmd[MAX_CMD_LEN] = {0}; 1060 unsigned char rsp[HCI_MAX_EVENT_SIZE]; 1061 unsigned char *ptr = cmd + 1; 1062 hci_command_hdr *ch = (void *)ptr; 1063 int flags = 0; 1064 1065 if (ioctl(fd, TIOCMGET, &flags) < 0) { 1066 ALOGI("TIOCMGET failed in init\n"); 1067 return -1; 1068 } 1069 flags |= TIOCM_RTS; 1070 if (ioctl(fd, TIOCMSET, &flags) < 0) { 1071 ALOGI("TIOCMSET failed in init: HW Flow-on error\n"); 1072 return -1; 1073 } 1074 1075 /* set both controller and host baud rate to maximum possible value */ 1076 err = set_cntrlr_baud(fd, speed); 1077 ALOGI("set_cntrlr_baud : ret:%d \n", err); 1078 if (err < 0) 1079 return err; 1080 1081 err = set_speed(fd, ti, speed); 1082 if (err < 0) { 1083 ALOGI("Can't set required baud rate"); 1084 return err; 1085 } 1086 1087 /* Download PS and patch */ 1088 r = ath_ps_download(fd); 1089 if (r < 0) { 1090 ALOGI("Failed to Download configuration"); 1091 err = -ETIMEDOUT; 1092 goto failed; 1093 } 1094 1095 ALOGI("ath_ps_download is done\n"); 1096 1097 cmd[0] = HCI_COMMAND_PKT; 1098 /* Write BDADDR */ 1099 if (bdaddr) { 1100 ch->opcode = htobs(cmd_opcode_pack(HCI_VENDOR_CMD_OGF, 1101 HCI_PS_CMD_OCF)); 1102 ch->plen = 10; 1103 ptr += HCI_COMMAND_HDR_SIZE; 1104 1105 ptr[0] = 0x01; 1106 ptr[1] = 0x01; 1107 ptr[2] = 0x00; 1108 ptr[3] = 0x06; 1109 str2ba(bdaddr, (bdaddr_t *)(ptr + 4)); 1110 1111 if (write(fd, cmd, WRITE_BDADDR_CMD_LEN) != 1112 WRITE_BDADDR_CMD_LEN) { 1113 ALOGI("Failed to write BD_ADDR command\n"); 1114 err = -ETIMEDOUT; 1115 goto failed; 1116 } 1117 1118 if (read_hci_event(fd, rsp, sizeof(rsp)) < 0) { 1119 ALOGI("Failed to set BD_ADDR\n"); 1120 err = -ETIMEDOUT; 1121 goto failed; 1122 } 1123 } 1124 1125 /* Send HCI Reset */ 1126 cmd[1] = 0x03; 1127 cmd[2] = 0x0C; 1128 cmd[3] = 0x00; 1129 1130 r = write(fd, cmd, 4); 1131 if (r != 4) { 1132 err = -ETIMEDOUT; 1133 goto failed; 1134 } 1135 1136 nanosleep(&tm, NULL); 1137 if (read_hci_event(fd, rsp, sizeof(rsp)) < 0) { 1138 err = -ETIMEDOUT; 1139 goto failed; 1140 } 1141 1142 ALOGI("HCI Reset is done\n"); 1143 err = set_cntrlr_baud(fd, speed); 1144 if (err < 0) 1145 ALOGI("set_cntrlr_baud0:%d,%d\n", speed, err); 1146 1147 failed: 1148 if (err < 0) { 1149 set_cntrlr_baud(fd, init_speed); 1150 set_speed(fd, ti, init_speed); 1151 } 1152 1153 return err; 1154 1155 } 1156 #define BTPROTO_HCI 1 1157 1158 /* Open HCI device. 1159 * Returns device descriptor (dd). */ 1160 int hci_open_dev(int dev_id) 1161 { 1162 struct sockaddr_hci a; 1163 int dd, err; 1164 1165 /* Create HCI socket */ 1166 dd = socket(AF_BLUETOOTH, SOCK_RAW, BTPROTO_HCI); 1167 if (dd < 0) 1168 return dd; 1169 1170 /* Bind socket to the HCI device */ 1171 memset(&a, 0, sizeof(a)); 1172 a.hci_family = AF_BLUETOOTH; 1173 a.hci_dev = dev_id; 1174 if (bind(dd, (struct sockaddr *) &a, sizeof(a)) < 0) 1175 goto failed; 1176 1177 return dd; 1178 1179 failed: 1180 err = errno; 1181 close(dd); 1182 errno = err; 1183 1184 return -1; 1185 } 1186 1187 int hci_close_dev(int dd) 1188 { 1189 return close(dd); 1190 } 1191 1192 /* HCI functions that require open device 1193 * dd - Device descriptor returned by hci_open_dev. */ 1194 1195 int hci_send_cmd(int dd, uint16_t ogf, uint16_t ocf, uint8_t plen, void *param) 1196 { 1197 uint8_t type = HCI_COMMAND_PKT; 1198 hci_command_hdr hc; 1199 struct iovec iv[3]; 1200 int ivn; 1201 1202 hc.opcode = htobs(cmd_opcode_pack(ogf, ocf)); 1203 hc.plen= plen; 1204 1205 iv[0].iov_base = &type; 1206 iv[0].iov_len = 1; 1207 iv[1].iov_base = &hc; 1208 iv[1].iov_len = HCI_COMMAND_HDR_SIZE; 1209 ivn = 2; 1210 1211 if (plen) { 1212 iv[2].iov_base = param; 1213 iv[2].iov_len = plen; 1214 ivn = 3; 1215 } 1216 1217 while (writev(dd, iv, ivn) < 0) { 1218 if (errno == EAGAIN || errno == EINTR) 1219 continue; 1220 return -1; 1221 } 1222 return 0; 1223 } 1224 1225 #define HCI_SLEEP_CMD_OCF 0x04 1226 #define TIOCSETD 0x5423 1227 #define HCIUARTSETFLAGS _IOW('U', 204, int) 1228 #define HCIUARTSETPROTO _IOW('U', 200, int) 1229 #define HCIUARTGETDEVICE _IOW('U', 202, int) 1230 /* 1231 * Atheros AR300x specific initialization post callback 1232 */ 1233 int ath3k_post(int fd, int pm) 1234 { 1235 int dev_id, dd; 1236 struct timespec tm = { 0, 50000}; 1237 1238 sleep(1); 1239 1240 dev_id = ioctl(fd, HCIUARTGETDEVICE, 0); 1241 if (dev_id < 0) { 1242 perror("cannot get device id"); 1243 return dev_id; 1244 } 1245 1246 dd = hci_open_dev(dev_id); 1247 if (dd < 0) { 1248 perror("HCI device open failed"); 1249 return dd; 1250 } 1251 1252 if (ioctl(dd, HCIDEVUP, dev_id) < 0 && errno != EALREADY) { 1253 perror("hci down:Power management Disabled"); 1254 hci_close_dev(dd); 1255 return -1; 1256 } 1257 1258 /* send vendor specific command with Sleep feature Enabled */ 1259 if (hci_send_cmd(dd, OGF_VENDOR_CMD, HCI_SLEEP_CMD_OCF, 1, &pm) < 0) 1260 perror("PM command failed, power management Disabled"); 1261 1262 nanosleep(&tm, NULL); 1263 hci_close_dev(dd); 1264 1265 return 0; 1266 } 1267 1268 1269 1270 #define FLOW_CTL 0x0001 1271 #define ENABLE_PM 1 1272 #define DISABLE_PM 0 1273 1274 /* Initialize UART driver */ 1275 static int init_uart(char *dev, struct uart_t *u, int send_break, int raw) 1276 { 1277 ALOGI(" %s ", __FUNCTION__); 1278 1279 struct termios ti; 1280 1281 int i, fd; 1282 unsigned long flags = 0; 1283 1284 if (raw) 1285 flags |= 1 << HCI_UART_RAW_DEVICE; 1286 1287 1288 fd = open(dev, O_RDWR | O_NOCTTY); 1289 1290 if (fd < 0) { 1291 ALOGI("Can't open serial port"); 1292 return -1; 1293 } 1294 1295 1296 tcflush(fd, TCIOFLUSH); 1297 1298 if (tcgetattr(fd, &ti) < 0) { 1299 ALOGI("Can't get port settings: %d\n", errno); 1300 return -1; 1301 } 1302 1303 cfmakeraw(&ti); 1304 1305 ti.c_cflag |= CLOCAL; 1306 if (u->flags & FLOW_CTL) 1307 ti.c_cflag |= CRTSCTS; 1308 else 1309 ti.c_cflag &= ~CRTSCTS; 1310 1311 if (tcsetattr(fd, TCSANOW, &ti) < 0) { 1312 ALOGI("Can't set port settings"); 1313 return -1; 1314 } 1315 1316 if (set_speed(fd, &ti, u->init_speed) < 0) { 1317 ALOGI("Can't set initial baud rate"); 1318 return -1; 1319 } 1320 1321 tcflush(fd, TCIOFLUSH); 1322 1323 if (send_break) { 1324 tcsendbreak(fd, 0); 1325 usleep(500000); 1326 } 1327 1328 ath3k_init(fd,u->speed,u->init_speed,u->bdaddr, &ti); 1329 1330 ALOGI("Device setup complete\n"); 1331 1332 1333 tcflush(fd, TCIOFLUSH); 1334 1335 // Set actual baudrate 1336 /* 1337 if (set_speed(fd, &ti, u->speed) < 0) { 1338 perror("Can't set baud rate"); 1339 return -1; 1340 } 1341 1342 i = N_HCI; 1343 if (ioctl(fd, TIOCSETD, &i) < 0) { 1344 perror("Can't set line discipline"); 1345 return -1; 1346 } 1347 1348 if (flags && ioctl(fd, HCIUARTSETFLAGS, flags) < 0) { 1349 perror("Can't set UART flags"); 1350 return -1; 1351 } 1352 1353 if (ioctl(fd, HCIUARTSETPROTO, u->proto) < 0) { 1354 perror("Can't set device"); 1355 return -1; 1356 } 1357 1358 #if !defined(SW_BOARD_HAVE_BLUETOOTH_RTK) 1359 ath3k_post(fd, u->pm); 1360 #endif 1361 */ 1362 1363 return fd; 1364 } 1365 1366 1367 int hw_config_ath3k(char *port_name) 1368 { 1369 ALOGI(" %s ", __FUNCTION__); 1370 PSCounter=0; 1371 struct sigaction sa; 1372 struct uart_t u ; 1373 int n=0,send_break=0,raw=0; 1374 1375 memset(&u, 0, sizeof(u)); 1376 u.speed =3000000; 1377 u.init_speed =115200; 1378 u.flags |= FLOW_CTL; 1379 u.pm = DISABLE_PM; 1380 1381 n = init_uart(port_name, &u, send_break, raw); 1382 if (n < 0) { 1383 ALOGI("Can't initialize device"); 1384 } 1385 1386 return n; 1387 } 1388 1389 void lpm_set_ar3k(uint8_t pio, uint8_t action, uint8_t polarity) 1390 { 1391 int rc; 1392 int fd = -1; 1393 char buffer; 1394 1395 ALOGI("lpm mode: %d action: %d", pio, action); 1396 1397 RESERVED(polarity); 1398 1399 switch (pio) 1400 { 1401 case UPIO_LPM_MODE: 1402 if (upio_state[UPIO_LPM_MODE] == action) 1403 { 1404 ALOGI("LPM is %s already", lpm_mode[action]); 1405 return; 1406 } 1407 1408 fd = open(VENDOR_LPM_PROC_NODE, O_WRONLY); 1409 1410 if (fd < 0) 1411 { 1412 ALOGE("upio_set : open(%s) for write failed: %s (%d)", 1413 VENDOR_LPM_PROC_NODE, strerror(errno), errno); 1414 return; 1415 } 1416 1417 if (action == UPIO_ASSERT) 1418 { 1419 buffer = '1'; 1420 } 1421 else 1422 { 1423 buffer = '0'; 1424 } 1425 1426 if (write(fd, &buffer, 1) < 0) 1427 { 1428 ALOGE("upio_set : write(%s) failed: %s (%d)", 1429 VENDOR_LPM_PROC_NODE, strerror(errno),errno); 1430 } 1431 else 1432 { 1433 upio_state[UPIO_LPM_MODE] = action; 1434 ALOGI("LPM is set to %s", lpm_mode[action]); 1435 } 1436 1437 if (fd >= 0) 1438 close(fd); 1439 1440 break; 1441 1442 case UPIO_BT_WAKE: 1443 /* UPIO_DEASSERT should be allowed because in Rx case assert occur 1444 * from the remote side where as deassert will be initiated from Host 1445 */ 1446 if ((action == UPIO_ASSERT) && (upio_state[UPIO_BT_WAKE] == action)) 1447 { 1448 ALOGI("BT_WAKE is %s already", lpm_state[action]); 1449 1450 return; 1451 } 1452 1453 if (action == UPIO_DEASSERT) 1454 buffer = '0'; 1455 else 1456 buffer = '1'; 1457 1458 fd = open(VENDOR_BTWRITE_PROC_NODE, O_WRONLY); 1459 1460 if (fd < 0) 1461 { 1462 ALOGE("upio_set : open(%s) for write failed: %s (%d)", 1463 VENDOR_BTWRITE_PROC_NODE, strerror(errno), errno); 1464 return; 1465 } 1466 1467 if (write(fd, &buffer, 1) < 0) 1468 { 1469 ALOGE("upio_set : write(%s) failed: %s (%d)", 1470 VENDOR_BTWRITE_PROC_NODE, strerror(errno),errno); 1471 } 1472 else 1473 { 1474 upio_state[UPIO_BT_WAKE] = action; 1475 ALOGI("BT_WAKE is set to %s", lpm_state[action]); 1476 } 1477 1478 ALOGI("proc btwrite assertion"); 1479 1480 if (fd >= 0) 1481 close(fd); 1482 1483 break; 1484 1485 case UPIO_HOST_WAKE: 1486 ALOGI("upio_set: UPIO_HOST_WAKE"); 1487 break; 1488 } 1489 1490 } 1491
