1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. 4 * 5 * Not a Contribution, Apache license notifications and license are retained 6 * for attribution purposes only. 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 */ 20 #include <cutils/log.h> 21 #include <sys/resource.h> 22 #include <sys/prctl.h> 23 24 #include <stdint.h> 25 #include <string.h> 26 #include <unistd.h> 27 #include <errno.h> 28 #include <fcntl.h> 29 30 #include <sys/ioctl.h> 31 #include <sys/types.h> 32 #include <sys/mman.h> 33 34 #include <linux/msm_kgsl.h> 35 36 #include <EGL/eglplatform.h> 37 #include <cutils/native_handle.h> 38 #include <gralloc_priv.h> 39 40 #include <copybit.h> 41 #include <alloc_controller.h> 42 #include <memalloc.h> 43 44 #include "c2d2.h" 45 #include "software_converter.h" 46 47 #include <dlfcn.h> 48 49 using gralloc::IMemAlloc; 50 using gralloc::IonController; 51 using gralloc::alloc_data; 52 53 C2D_STATUS (*LINK_c2dCreateSurface)( uint32 *surface_id, 54 uint32 surface_bits, 55 C2D_SURFACE_TYPE surface_type, 56 void *surface_definition ); 57 58 C2D_STATUS (*LINK_c2dUpdateSurface)( uint32 surface_id, 59 uint32 surface_bits, 60 C2D_SURFACE_TYPE surface_type, 61 void *surface_definition ); 62 63 C2D_STATUS (*LINK_c2dReadSurface)( uint32 surface_id, 64 C2D_SURFACE_TYPE surface_type, 65 void *surface_definition, 66 int32 x, int32 y ); 67 68 C2D_STATUS (*LINK_c2dDraw)( uint32 target_id, 69 uint32 target_config, C2D_RECT *target_scissor, 70 uint32 target_mask_id, uint32 target_color_key, 71 C2D_OBJECT *objects_list, uint32 num_objects ); 72 73 C2D_STATUS (*LINK_c2dFinish)( uint32 target_id); 74 75 C2D_STATUS (*LINK_c2dFlush)( uint32 target_id, c2d_ts_handle *timestamp); 76 77 C2D_STATUS (*LINK_c2dWaitTimestamp)( c2d_ts_handle timestamp ); 78 79 C2D_STATUS (*LINK_c2dDestroySurface)( uint32 surface_id ); 80 81 C2D_STATUS (*LINK_c2dMapAddr) ( int mem_fd, void * hostptr, size_t len, 82 size_t offset, uint32 flags, void ** gpuaddr); 83 84 C2D_STATUS (*LINK_c2dUnMapAddr) ( void * gpuaddr); 85 86 C2D_STATUS (*LINK_c2dGetDriverCapabilities) ( C2D_DRIVER_INFO * driver_info); 87 88 /* create a fence fd for the timestamp */ 89 C2D_STATUS (*LINK_c2dCreateFenceFD) ( uint32 target_id, c2d_ts_handle timestamp, 90 int32 *fd); 91 92 C2D_STATUS (*LINK_c2dFillSurface) ( uint32 surface_id, uint32 fill_color, 93 C2D_RECT * fill_rect); 94 95 /******************************************************************************/ 96 97 #if defined(COPYBIT_Z180) 98 #define MAX_SCALE_FACTOR (4096) 99 #define MAX_DIMENSION (4096) 100 #else 101 #error "Unsupported HW version" 102 #endif 103 104 // The following defines can be changed as required i.e. as we encounter 105 // complex use cases. 106 #define MAX_RGB_SURFACES 32 // Max. RGB layers currently supported per draw 107 #define MAX_YUV_2_PLANE_SURFACES 4// Max. 2-plane YUV layers currently supported per draw 108 #define MAX_YUV_3_PLANE_SURFACES 1// Max. 3-plane YUV layers currently supported per draw 109 // +1 for the destination surface. We cannot have multiple destination surfaces. 110 #define MAX_SURFACES (MAX_RGB_SURFACES + MAX_YUV_2_PLANE_SURFACES + MAX_YUV_3_PLANE_SURFACES + 1) 111 #define NUM_SURFACE_TYPES 3 // RGB_SURFACE + YUV_SURFACE_2_PLANES + YUV_SURFACE_3_PLANES 112 #define MAX_BLIT_OBJECT_COUNT 50 // Max. blit objects that can be passed per draw 113 114 enum { 115 RGB_SURFACE, 116 YUV_SURFACE_2_PLANES, 117 YUV_SURFACE_3_PLANES 118 }; 119 120 enum eConversionType { 121 CONVERT_TO_ANDROID_FORMAT, 122 CONVERT_TO_C2D_FORMAT 123 }; 124 125 enum eC2DFlags { 126 FLAGS_PREMULTIPLIED_ALPHA = 1<<0, 127 FLAGS_YUV_DESTINATION = 1<<1, 128 FLAGS_TEMP_SRC_DST = 1<<2 129 }; 130 131 static gralloc::IAllocController* sAlloc = 0; 132 /******************************************************************************/ 133 134 /** State information for each device instance */ 135 struct copybit_context_t { 136 struct copybit_device_t device; 137 // Templates for the various source surfaces. These templates are created 138 // to avoid the expensive create/destroy C2D Surfaces 139 C2D_OBJECT_STR blit_rgb_object[MAX_RGB_SURFACES]; 140 C2D_OBJECT_STR blit_yuv_2_plane_object[MAX_YUV_2_PLANE_SURFACES]; 141 C2D_OBJECT_STR blit_yuv_3_plane_object[MAX_YUV_3_PLANE_SURFACES]; 142 C2D_OBJECT_STR blit_list[MAX_BLIT_OBJECT_COUNT]; // Z-ordered list of blit objects 143 C2D_DRIVER_INFO c2d_driver_info; 144 void *libc2d2; 145 alloc_data temp_src_buffer; 146 alloc_data temp_dst_buffer; 147 unsigned int dst[NUM_SURFACE_TYPES]; // dst surfaces 148 uintptr_t mapped_gpu_addr[MAX_SURFACES]; // GPU addresses mapped inside copybit 149 int blit_rgb_count; // Total RGB surfaces being blit 150 int blit_yuv_2_plane_count; // Total 2 plane YUV surfaces being 151 int blit_yuv_3_plane_count; // Total 3 plane YUV surfaces being blit 152 int blit_count; // Total blit objects. 153 unsigned int trg_transform; /* target transform */ 154 int fb_width; 155 int fb_height; 156 int src_global_alpha; 157 int config_mask; 158 int dst_surface_type; 159 bool is_premultiplied_alpha; 160 void* time_stamp; 161 bool dst_surface_mapped; // Set when dst surface is mapped to GPU addr 162 void* dst_surface_base; // Stores the dst surface addr 163 164 // used for signaling the wait thread 165 bool wait_timestamp; 166 pthread_t wait_thread_id; 167 bool stop_thread; 168 pthread_mutex_t wait_cleanup_lock; 169 pthread_cond_t wait_cleanup_cond; 170 171 }; 172 173 struct bufferInfo { 174 int width; 175 int height; 176 int format; 177 }; 178 179 struct yuvPlaneInfo { 180 int yStride; //luma stride 181 int plane1_stride; 182 int plane2_stride; 183 size_t plane1_offset; 184 size_t plane2_offset; 185 }; 186 187 /** 188 * Common hardware methods 189 */ 190 191 static int open_copybit(const struct hw_module_t* module, const char* name, 192 struct hw_device_t** device); 193 194 static struct hw_module_methods_t copybit_module_methods = { 195 open: open_copybit 196 }; 197 198 /* 199 * The COPYBIT Module 200 */ 201 struct copybit_module_t HAL_MODULE_INFO_SYM = { 202 common: { 203 tag: HARDWARE_MODULE_TAG, 204 version_major: 1, 205 version_minor: 0, 206 id: COPYBIT_HARDWARE_MODULE_ID, 207 name: "QCT COPYBIT C2D 2.0 Module", 208 author: "Qualcomm", 209 methods: ©bit_module_methods 210 } 211 }; 212 213 214 /* thread function which waits on the timeStamp and cleans up the surfaces */ 215 static void* c2d_wait_loop(void* ptr) { 216 copybit_context_t* ctx = (copybit_context_t*)(ptr); 217 char thread_name[64] = "copybitWaitThr"; 218 prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); 219 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); 220 221 while(ctx->stop_thread == false) { 222 pthread_mutex_lock(&ctx->wait_cleanup_lock); 223 while(ctx->wait_timestamp == false && !ctx->stop_thread) { 224 pthread_cond_wait(&(ctx->wait_cleanup_cond), 225 &(ctx->wait_cleanup_lock)); 226 } 227 if(ctx->wait_timestamp) { 228 if(LINK_c2dWaitTimestamp(ctx->time_stamp)) { 229 ALOGE("%s: LINK_c2dWaitTimeStamp ERROR!!", __FUNCTION__); 230 } 231 ctx->wait_timestamp = false; 232 // Unmap any mapped addresses. 233 for (int i = 0; i < MAX_SURFACES; i++) { 234 if (ctx->mapped_gpu_addr[i]) { 235 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 236 ctx->mapped_gpu_addr[i] = 0; 237 } 238 } 239 // Reset the counts after the draw. 240 ctx->blit_rgb_count = 0; 241 ctx->blit_yuv_2_plane_count = 0; 242 ctx->blit_yuv_3_plane_count = 0; 243 ctx->blit_count = 0; 244 ctx->dst_surface_mapped = false; 245 ctx->dst_surface_base = 0; 246 } 247 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 248 if(ctx->stop_thread) 249 break; 250 } 251 pthread_exit(NULL); 252 return NULL; 253 } 254 255 256 /* convert COPYBIT_FORMAT to C2D format */ 257 static int get_format(int format) { 258 switch (format) { 259 case HAL_PIXEL_FORMAT_RGB_565: return C2D_COLOR_FORMAT_565_RGB; 260 case HAL_PIXEL_FORMAT_RGB_888: return C2D_COLOR_FORMAT_888_RGB | 261 C2D_FORMAT_SWAP_RB; 262 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 263 C2D_FORMAT_SWAP_RB | 264 C2D_FORMAT_DISABLE_ALPHA; 265 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB | 266 C2D_FORMAT_SWAP_RB; 267 case HAL_PIXEL_FORMAT_BGRA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 268 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV12; 269 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV12; 270 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV21; 271 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: return C2D_COLOR_FORMAT_420_NV12 | 272 C2D_FORMAT_MACROTILED; 273 default: ALOGE("%s: invalid format (0x%x", 274 __FUNCTION__, format); 275 return -EINVAL; 276 } 277 return -EINVAL; 278 } 279 280 /* Get the C2D formats needed for conversion to YUV */ 281 static int get_c2d_format_for_yuv_destination(int halFormat) { 282 switch (halFormat) { 283 // We do not swap the RB when the target is YUV 284 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 285 C2D_FORMAT_DISABLE_ALPHA; 286 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 287 // The U and V need to be interchanged when the target is YUV 288 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV21; 289 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV21; 290 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV12; 291 default: return get_format(halFormat); 292 } 293 return -EINVAL; 294 } 295 296 /* ------------------------------------------------------------------- *//*! 297 * \internal 298 * \brief Get the bpp for a particular color format 299 * \param color format 300 * \return bits per pixel 301 *//* ------------------------------------------------------------------- */ 302 int c2diGetBpp(int32 colorformat) 303 { 304 305 int c2dBpp = 0; 306 307 switch(colorformat&0xFF) 308 { 309 case C2D_COLOR_FORMAT_4444_RGBA: 310 case C2D_COLOR_FORMAT_4444_ARGB: 311 case C2D_COLOR_FORMAT_1555_ARGB: 312 case C2D_COLOR_FORMAT_565_RGB: 313 case C2D_COLOR_FORMAT_5551_RGBA: 314 c2dBpp = 16; 315 break; 316 case C2D_COLOR_FORMAT_8888_RGBA: 317 case C2D_COLOR_FORMAT_8888_ARGB: 318 c2dBpp = 32; 319 break; 320 case C2D_COLOR_FORMAT_888_RGB: 321 c2dBpp = 24; 322 break; 323 case C2D_COLOR_FORMAT_8_L: 324 case C2D_COLOR_FORMAT_8_A: 325 c2dBpp = 8; 326 break; 327 case C2D_COLOR_FORMAT_4_A: 328 c2dBpp = 4; 329 break; 330 case C2D_COLOR_FORMAT_1: 331 c2dBpp = 1; 332 break; 333 default: 334 ALOGE("%s ERROR", __func__); 335 break; 336 } 337 return c2dBpp; 338 } 339 340 static size_t c2d_get_gpuaddr(copybit_context_t* ctx, 341 struct private_handle_t *handle, int &mapped_idx) 342 { 343 uint32 memtype; 344 size_t *gpuaddr = 0; 345 C2D_STATUS rc; 346 int freeindex = 0; 347 bool mapaddr = false; 348 349 if(!handle) 350 return 0; 351 352 if (handle->flags & (private_handle_t::PRIV_FLAGS_USES_PMEM | 353 private_handle_t::PRIV_FLAGS_USES_PMEM_ADSP)) 354 memtype = KGSL_USER_MEM_TYPE_PMEM; 355 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ASHMEM) 356 memtype = KGSL_USER_MEM_TYPE_ASHMEM; 357 else if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ION) 358 memtype = KGSL_USER_MEM_TYPE_ION; 359 else { 360 ALOGE("Invalid handle flags: 0x%x", handle->flags); 361 return 0; 362 } 363 364 // Check for a freeindex in the mapped_gpu_addr list 365 for (freeindex = 0; freeindex < MAX_SURFACES; freeindex++) { 366 if (ctx->mapped_gpu_addr[freeindex] == 0) { 367 // free index is available 368 // map GPU addr and use this as mapped_idx 369 mapaddr = true; 370 break; 371 } 372 } 373 374 if(mapaddr) { 375 rc = LINK_c2dMapAddr(handle->fd, (void*)handle->base, handle->size, 376 handle->offset, memtype, (void**)&gpuaddr); 377 378 if (rc == C2D_STATUS_OK) { 379 // We have mapped the GPU address inside copybit. We need to unmap 380 // this address after the blit. Store this address 381 ctx->mapped_gpu_addr[freeindex] = (size_t)gpuaddr; 382 mapped_idx = freeindex; 383 } 384 } 385 return (size_t)gpuaddr; 386 } 387 388 static void unmap_gpuaddr(copybit_context_t* ctx, int mapped_idx) 389 { 390 if (!ctx || (mapped_idx == -1)) 391 return; 392 393 if (ctx->mapped_gpu_addr[mapped_idx]) { 394 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[mapped_idx]); 395 ctx->mapped_gpu_addr[mapped_idx] = 0; 396 } 397 } 398 399 static int is_supported_rgb_format(int format) 400 { 401 switch(format) { 402 case HAL_PIXEL_FORMAT_RGBA_8888: 403 case HAL_PIXEL_FORMAT_RGBX_8888: 404 case HAL_PIXEL_FORMAT_RGB_888: 405 case HAL_PIXEL_FORMAT_RGB_565: 406 case HAL_PIXEL_FORMAT_BGRA_8888: { 407 return COPYBIT_SUCCESS; 408 } 409 default: 410 return COPYBIT_FAILURE; 411 } 412 } 413 414 static int get_num_planes(int format) 415 { 416 switch(format) { 417 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 418 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 419 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 420 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 421 return 2; 422 } 423 case HAL_PIXEL_FORMAT_YV12: { 424 return 3; 425 } 426 default: 427 return COPYBIT_FAILURE; 428 } 429 } 430 431 static int is_supported_yuv_format(int format) 432 { 433 switch(format) { 434 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 435 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 436 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 437 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 438 return COPYBIT_SUCCESS; 439 } 440 default: 441 return COPYBIT_FAILURE; 442 } 443 } 444 445 static int is_valid_destination_format(int format) 446 { 447 if (format == HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED) { 448 // C2D does not support NV12Tile as a destination format. 449 return COPYBIT_FAILURE; 450 } 451 return COPYBIT_SUCCESS; 452 } 453 454 static int calculate_yuv_offset_and_stride(const bufferInfo& info, 455 yuvPlaneInfo& yuvInfo) 456 { 457 int width = info.width; 458 int height = info.height; 459 int format = info.format; 460 461 int aligned_height = 0; 462 int aligned_width = 0, size = 0; 463 464 switch (format) { 465 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 466 /* NV12 Tile buffers have their luma height aligned to 32bytes and width 467 * aligned to 128 bytes. The chroma offset starts at an 8K boundary 468 */ 469 aligned_height = ALIGN(height, 32); 470 aligned_width = ALIGN(width, 128); 471 size = aligned_width * aligned_height; 472 yuvInfo.plane1_offset = ALIGN(size,8192); 473 yuvInfo.yStride = aligned_width; 474 yuvInfo.plane1_stride = aligned_width; 475 break; 476 } 477 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 478 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 479 case HAL_PIXEL_FORMAT_YCrCb_420_SP: { 480 aligned_width = ALIGN(width, 32); 481 yuvInfo.yStride = aligned_width; 482 yuvInfo.plane1_stride = aligned_width; 483 if (HAL_PIXEL_FORMAT_NV12_ENCODEABLE == format) { 484 // The encoder requires a 2K aligned chroma offset 485 yuvInfo.plane1_offset = ALIGN(aligned_width * height, 2048); 486 } else 487 yuvInfo.plane1_offset = aligned_width * height; 488 489 break; 490 } 491 default: { 492 return COPYBIT_FAILURE; 493 } 494 } 495 return COPYBIT_SUCCESS; 496 } 497 498 /** create C2D surface from copybit image */ 499 static int set_image(copybit_context_t* ctx, uint32 surfaceId, 500 const struct copybit_image_t *rhs, 501 const eC2DFlags flags, int &mapped_idx) 502 { 503 struct private_handle_t* handle = (struct private_handle_t*)rhs->handle; 504 C2D_SURFACE_TYPE surfaceType; 505 int status = COPYBIT_SUCCESS; 506 uintptr_t gpuaddr = 0; 507 int c2d_format; 508 mapped_idx = -1; 509 510 if (flags & FLAGS_YUV_DESTINATION) { 511 c2d_format = get_c2d_format_for_yuv_destination(rhs->format); 512 } else { 513 c2d_format = get_format(rhs->format); 514 } 515 516 if(c2d_format == -EINVAL) { 517 ALOGE("%s: invalid format", __FUNCTION__); 518 return -EINVAL; 519 } 520 521 if(handle == NULL) { 522 ALOGE("%s: invalid handle", __func__); 523 return -EINVAL; 524 } 525 526 if (handle->gpuaddr == 0) { 527 gpuaddr = c2d_get_gpuaddr(ctx, handle, mapped_idx); 528 if(!gpuaddr) { 529 ALOGE("%s: c2d_get_gpuaddr failed", __FUNCTION__); 530 return COPYBIT_FAILURE; 531 } 532 } else { 533 gpuaddr = handle->gpuaddr; 534 } 535 536 /* create C2D surface */ 537 if(is_supported_rgb_format(rhs->format) == COPYBIT_SUCCESS) { 538 /* RGB */ 539 C2D_RGB_SURFACE_DEF surfaceDef; 540 541 surfaceType = (C2D_SURFACE_TYPE) (C2D_SURFACE_RGB_HOST | C2D_SURFACE_WITH_PHYS); 542 543 surfaceDef.phys = (void*) gpuaddr; 544 surfaceDef.buffer = (void*) (handle->base); 545 546 surfaceDef.format = c2d_format | 547 ((flags & FLAGS_PREMULTIPLIED_ALPHA) ? C2D_FORMAT_PREMULTIPLIED : 0); 548 surfaceDef.width = rhs->w; 549 surfaceDef.height = rhs->h; 550 int aligned_width = ALIGN((int)surfaceDef.width,32); 551 surfaceDef.stride = (aligned_width * c2diGetBpp(surfaceDef.format))>>3; 552 553 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 554 &surfaceDef)) { 555 ALOGE("%s: RGB Surface c2dUpdateSurface ERROR", __FUNCTION__); 556 unmap_gpuaddr(ctx, mapped_idx); 557 status = COPYBIT_FAILURE; 558 } 559 } else if (is_supported_yuv_format(rhs->format) == COPYBIT_SUCCESS) { 560 C2D_YUV_SURFACE_DEF surfaceDef; 561 memset(&surfaceDef, 0, sizeof(surfaceDef)); 562 surfaceType = (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | C2D_SURFACE_WITH_PHYS); 563 surfaceDef.format = c2d_format; 564 565 bufferInfo info; 566 info.width = rhs->w; 567 info.height = rhs->h; 568 info.format = rhs->format; 569 570 yuvPlaneInfo yuvInfo = {0}; 571 status = calculate_yuv_offset_and_stride(info, yuvInfo); 572 if(status != COPYBIT_SUCCESS) { 573 ALOGE("%s: calculate_yuv_offset_and_stride error", __FUNCTION__); 574 unmap_gpuaddr(ctx, mapped_idx); 575 } 576 577 surfaceDef.width = rhs->w; 578 surfaceDef.height = rhs->h; 579 surfaceDef.plane0 = (void*) (handle->base); 580 surfaceDef.phys0 = (void*) (gpuaddr); 581 surfaceDef.stride0 = yuvInfo.yStride; 582 583 surfaceDef.plane1 = (void*) (handle->base + yuvInfo.plane1_offset); 584 surfaceDef.phys1 = (void*) (gpuaddr + yuvInfo.plane1_offset); 585 surfaceDef.stride1 = yuvInfo.plane1_stride; 586 if (3 == get_num_planes(rhs->format)) { 587 surfaceDef.plane2 = (void*) (handle->base + yuvInfo.plane2_offset); 588 surfaceDef.phys2 = (void*) (gpuaddr + yuvInfo.plane2_offset); 589 surfaceDef.stride2 = yuvInfo.plane2_stride; 590 } 591 592 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 593 &surfaceDef)) { 594 ALOGE("%s: YUV Surface c2dUpdateSurface ERROR", __FUNCTION__); 595 unmap_gpuaddr(ctx, mapped_idx); 596 status = COPYBIT_FAILURE; 597 } 598 } else { 599 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 600 unmap_gpuaddr(ctx, mapped_idx); 601 status = COPYBIT_FAILURE; 602 } 603 604 return status; 605 } 606 607 /** copy the bits */ 608 static int msm_copybit(struct copybit_context_t *ctx, unsigned int target) 609 { 610 if (ctx->blit_count == 0) { 611 return COPYBIT_SUCCESS; 612 } 613 614 for (int i = 0; i < ctx->blit_count; i++) 615 { 616 ctx->blit_list[i].next = &(ctx->blit_list[i+1]); 617 } 618 ctx->blit_list[ctx->blit_count-1].next = NULL; 619 uint32_t target_transform = ctx->trg_transform; 620 if (ctx->c2d_driver_info.capabilities_mask & 621 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 622 // For A3xx - set 0x0 as the transform is set in the config_mask 623 target_transform = 0x0; 624 } 625 if(LINK_c2dDraw(target, target_transform, 0x0, 0, 0, ctx->blit_list, 626 ctx->blit_count)) { 627 ALOGE("%s: LINK_c2dDraw ERROR", __FUNCTION__); 628 return COPYBIT_FAILURE; 629 } 630 return COPYBIT_SUCCESS; 631 } 632 633 634 635 static int flush_get_fence_copybit (struct copybit_device_t *dev, int* fd) 636 { 637 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 638 int status = COPYBIT_FAILURE; 639 if (!ctx) 640 return COPYBIT_FAILURE; 641 pthread_mutex_lock(&ctx->wait_cleanup_lock); 642 status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 643 644 if(LINK_c2dFlush(ctx->dst[ctx->dst_surface_type], &ctx->time_stamp)) { 645 ALOGE("%s: LINK_c2dFlush ERROR", __FUNCTION__); 646 // unlock the mutex and return failure 647 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 648 return COPYBIT_FAILURE; 649 } 650 if(LINK_c2dCreateFenceFD(ctx->dst[ctx->dst_surface_type], ctx->time_stamp, 651 fd)) { 652 ALOGE("%s: LINK_c2dCreateFenceFD ERROR", __FUNCTION__); 653 status = COPYBIT_FAILURE; 654 } 655 if(status == COPYBIT_SUCCESS) { 656 //signal the wait_thread 657 ctx->wait_timestamp = true; 658 pthread_cond_signal(&ctx->wait_cleanup_cond); 659 } 660 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 661 return status; 662 } 663 664 static int finish_copybit(struct copybit_device_t *dev) 665 { 666 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 667 if (!ctx) 668 return COPYBIT_FAILURE; 669 670 int status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 671 672 if(LINK_c2dFinish(ctx->dst[ctx->dst_surface_type])) { 673 ALOGE("%s: LINK_c2dFinish ERROR", __FUNCTION__); 674 return COPYBIT_FAILURE; 675 } 676 677 // Unmap any mapped addresses. 678 for (int i = 0; i < MAX_SURFACES; i++) { 679 if (ctx->mapped_gpu_addr[i]) { 680 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 681 ctx->mapped_gpu_addr[i] = 0; 682 } 683 } 684 685 // Reset the counts after the draw. 686 ctx->blit_rgb_count = 0; 687 ctx->blit_yuv_2_plane_count = 0; 688 ctx->blit_yuv_3_plane_count = 0; 689 ctx->blit_count = 0; 690 ctx->dst_surface_mapped = false; 691 ctx->dst_surface_base = 0; 692 693 return status; 694 } 695 696 static int clear_copybit(struct copybit_device_t *dev, 697 struct copybit_image_t const *buf, 698 struct copybit_rect_t *rect) 699 { 700 int ret = COPYBIT_SUCCESS; 701 int flags = FLAGS_PREMULTIPLIED_ALPHA; 702 int mapped_dst_idx = -1; 703 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 704 C2D_RECT c2drect = {rect->l, rect->t, rect->r - rect->l, rect->b - rect->t}; 705 pthread_mutex_lock(&ctx->wait_cleanup_lock); 706 if(!ctx->dst_surface_mapped) { 707 ret = set_image(ctx, ctx->dst[RGB_SURFACE], buf, 708 (eC2DFlags)flags, mapped_dst_idx); 709 if(ret) { 710 ALOGE("%s: set_image error", __FUNCTION__); 711 unmap_gpuaddr(ctx, mapped_dst_idx); 712 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 713 return COPYBIT_FAILURE; 714 } 715 //clear_copybit is the first call made by HWC for each composition 716 //with the dest surface, hence set dst_surface_mapped. 717 ctx->dst_surface_mapped = true; 718 ctx->dst_surface_base = buf->base; 719 ret = LINK_c2dFillSurface(ctx->dst[RGB_SURFACE], 0x0, &c2drect); 720 } 721 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 722 return ret; 723 } 724 725 726 /** setup rectangles */ 727 static void set_rects(struct copybit_context_t *ctx, 728 C2D_OBJECT *c2dObject, 729 const struct copybit_rect_t *dst, 730 const struct copybit_rect_t *src, 731 const struct copybit_rect_t *scissor) 732 { 733 // Set the target rect. 734 if((ctx->trg_transform & C2D_TARGET_ROTATE_90) && 735 (ctx->trg_transform & C2D_TARGET_ROTATE_180)) { 736 /* target rotation is 270 */ 737 c2dObject->target_rect.x = (dst->t)<<16; 738 c2dObject->target_rect.y = ctx->fb_width? 739 (ALIGN(ctx->fb_width,32)- dst->r):dst->r; 740 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 741 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 742 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 743 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_90) { 744 c2dObject->target_rect.x = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 745 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 746 c2dObject->target_rect.y = (dst->l)<<16; 747 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 748 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 749 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_180) { 750 c2dObject->target_rect.y = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 751 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 752 c2dObject->target_rect.x = ctx->fb_width? 753 (ALIGN(ctx->fb_width,32) - dst->r):dst->r; 754 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 755 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 756 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 757 } else { 758 c2dObject->target_rect.x = (dst->l)<<16; 759 c2dObject->target_rect.y = (dst->t)<<16; 760 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 761 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 762 } 763 c2dObject->config_mask |= C2D_TARGET_RECT_BIT; 764 765 // Set the source rect 766 c2dObject->source_rect.x = (src->l)<<16; 767 c2dObject->source_rect.y = (src->t)<<16; 768 c2dObject->source_rect.height = ((src->b) - (src->t))<<16; 769 c2dObject->source_rect.width = ((src->r) - (src->l))<<16; 770 c2dObject->config_mask |= C2D_SOURCE_RECT_BIT; 771 772 // Set the scissor rect 773 c2dObject->scissor_rect.x = scissor->l; 774 c2dObject->scissor_rect.y = scissor->t; 775 c2dObject->scissor_rect.height = (scissor->b) - (scissor->t); 776 c2dObject->scissor_rect.width = (scissor->r) - (scissor->l); 777 c2dObject->config_mask |= C2D_SCISSOR_RECT_BIT; 778 } 779 780 /*****************************************************************************/ 781 782 /** Set a parameter to value */ 783 static int set_parameter_copybit( 784 struct copybit_device_t *dev, 785 int name, 786 int value) 787 { 788 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 789 int status = COPYBIT_SUCCESS; 790 if (!ctx) { 791 ALOGE("%s: null context", __FUNCTION__); 792 return -EINVAL; 793 } 794 795 pthread_mutex_lock(&ctx->wait_cleanup_lock); 796 switch(name) { 797 case COPYBIT_PLANE_ALPHA: 798 { 799 if (value < 0) value = 0; 800 if (value >= 256) value = 255; 801 802 ctx->src_global_alpha = value; 803 if (value < 255) 804 ctx->config_mask |= C2D_GLOBAL_ALPHA_BIT; 805 else 806 ctx->config_mask &= ~C2D_GLOBAL_ALPHA_BIT; 807 } 808 break; 809 case COPYBIT_BLEND_MODE: 810 { 811 if (value == COPYBIT_BLENDING_NONE) { 812 ctx->config_mask |= C2D_ALPHA_BLEND_NONE; 813 ctx->is_premultiplied_alpha = true; 814 } else if (value == COPYBIT_BLENDING_PREMULT) { 815 ctx->is_premultiplied_alpha = true; 816 } else { 817 ctx->config_mask &= ~C2D_ALPHA_BLEND_NONE; 818 } 819 } 820 break; 821 case COPYBIT_TRANSFORM: 822 { 823 unsigned int transform = 0; 824 uint32 config_mask = 0; 825 config_mask |= C2D_OVERRIDE_GLOBAL_TARGET_ROTATE_CONFIG; 826 if((value & 0x7) == COPYBIT_TRANSFORM_ROT_180) { 827 transform = C2D_TARGET_ROTATE_180; 828 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_180; 829 } else if((value & 0x7) == COPYBIT_TRANSFORM_ROT_270) { 830 transform = C2D_TARGET_ROTATE_90; 831 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_90; 832 } else if(value == COPYBIT_TRANSFORM_ROT_90) { 833 transform = C2D_TARGET_ROTATE_270; 834 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_270; 835 } else { 836 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_0; 837 if(value & COPYBIT_TRANSFORM_FLIP_H) { 838 config_mask |= C2D_MIRROR_H_BIT; 839 } else if(value & COPYBIT_TRANSFORM_FLIP_V) { 840 config_mask |= C2D_MIRROR_V_BIT; 841 } 842 } 843 844 if (ctx->c2d_driver_info.capabilities_mask & 845 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 846 ctx->config_mask |= config_mask; 847 } else { 848 // The transform for this surface does not match the current 849 // target transform. Draw all previous surfaces. This will be 850 // changed once we have a new mechanism to send different 851 // target rotations to c2d. 852 finish_copybit(dev); 853 } 854 ctx->trg_transform = transform; 855 } 856 break; 857 case COPYBIT_FRAMEBUFFER_WIDTH: 858 ctx->fb_width = value; 859 break; 860 case COPYBIT_FRAMEBUFFER_HEIGHT: 861 ctx->fb_height = value; 862 break; 863 case COPYBIT_ROTATION_DEG: 864 case COPYBIT_DITHER: 865 case COPYBIT_BLUR: 866 case COPYBIT_BLIT_TO_FRAMEBUFFER: 867 // Do nothing 868 break; 869 default: 870 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 871 status = -EINVAL; 872 break; 873 } 874 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 875 return status; 876 } 877 878 /** Get a static info value */ 879 static int get(struct copybit_device_t *dev, int name) 880 { 881 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 882 int value; 883 884 if (!ctx) { 885 ALOGE("%s: null context error", __FUNCTION__); 886 return -EINVAL; 887 } 888 889 switch(name) { 890 case COPYBIT_MINIFICATION_LIMIT: 891 value = MAX_SCALE_FACTOR; 892 break; 893 case COPYBIT_MAGNIFICATION_LIMIT: 894 value = MAX_SCALE_FACTOR; 895 break; 896 case COPYBIT_SCALING_FRAC_BITS: 897 value = 32; 898 break; 899 case COPYBIT_ROTATION_STEP_DEG: 900 value = 1; 901 break; 902 default: 903 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 904 value = -EINVAL; 905 } 906 return value; 907 } 908 909 static int is_alpha(int cformat) 910 { 911 int alpha = 0; 912 switch (cformat & 0xFF) { 913 case C2D_COLOR_FORMAT_8888_ARGB: 914 case C2D_COLOR_FORMAT_8888_RGBA: 915 case C2D_COLOR_FORMAT_5551_RGBA: 916 case C2D_COLOR_FORMAT_4444_ARGB: 917 alpha = 1; 918 break; 919 default: 920 alpha = 0; 921 break; 922 } 923 924 if(alpha && (cformat&C2D_FORMAT_DISABLE_ALPHA)) 925 alpha = 0; 926 927 return alpha; 928 } 929 930 /* Function to check if we need a temporary buffer for the blit. 931 * This would happen if the requested destination stride and the 932 * C2D stride do not match. We ignore RGB buffers, since their 933 * stride is always aligned to 32. 934 */ 935 static bool need_temp_buffer(struct copybit_image_t const *img) 936 { 937 if (COPYBIT_SUCCESS == is_supported_rgb_format(img->format)) 938 return false; 939 940 struct private_handle_t* handle = (struct private_handle_t*)img->handle; 941 942 // The width parameter in the handle contains the aligned_w. We check if we 943 // need to convert based on this param. YUV formats have bpp=1, so checking 944 // if the requested stride is aligned should suffice. 945 if (0 == (handle->width)%32) { 946 return false; 947 } 948 949 return true; 950 } 951 952 /* Function to extract the information from the copybit image and set the corresponding 953 * values in the bufferInfo struct. 954 */ 955 static void populate_buffer_info(struct copybit_image_t const *img, bufferInfo& info) 956 { 957 info.width = img->w; 958 info.height = img->h; 959 info.format = img->format; 960 } 961 962 /* Function to get the required size for a particular format, inorder for C2D to perform 963 * the blit operation. 964 */ 965 static int get_size(const bufferInfo& info) 966 { 967 int size = 0; 968 int w = info.width; 969 int h = info.height; 970 int aligned_w = ALIGN(w, 32); 971 switch(info.format) { 972 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 973 { 974 // Chroma for this format is aligned to 2K. 975 size = ALIGN((aligned_w*h), 2048) + 976 ALIGN(aligned_w/2, 32) * (h/2) *2; 977 size = ALIGN(size, 4096); 978 } break; 979 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 980 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 981 { 982 size = aligned_w * h + 983 ALIGN(aligned_w/2, 32) * (h/2) * 2; 984 size = ALIGN(size, 4096); 985 } break; 986 default: break; 987 } 988 return size; 989 } 990 991 /* Function to allocate memory for the temporary buffer. This memory is 992 * allocated from Ashmem. It is the caller's responsibility to free this 993 * memory. 994 */ 995 static int get_temp_buffer(const bufferInfo& info, alloc_data& data) 996 { 997 ALOGD("%s E", __FUNCTION__); 998 // Alloc memory from system heap 999 data.base = 0; 1000 data.fd = -1; 1001 data.offset = 0; 1002 data.size = get_size(info); 1003 data.align = getpagesize(); 1004 data.uncached = true; 1005 int allocFlags = GRALLOC_USAGE_PRIVATE_SYSTEM_HEAP; 1006 1007 if (sAlloc == 0) { 1008 sAlloc = gralloc::IAllocController::getInstance(); 1009 } 1010 1011 if (sAlloc == 0) { 1012 ALOGE("%s: sAlloc is still NULL", __FUNCTION__); 1013 return COPYBIT_FAILURE; 1014 } 1015 1016 int err = sAlloc->allocate(data, allocFlags); 1017 if (0 != err) { 1018 ALOGE("%s: allocate failed", __FUNCTION__); 1019 return COPYBIT_FAILURE; 1020 } 1021 1022 ALOGD("%s X", __FUNCTION__); 1023 return err; 1024 } 1025 1026 /* Function to free the temporary allocated memory.*/ 1027 static void free_temp_buffer(alloc_data &data) 1028 { 1029 if (-1 != data.fd) { 1030 IMemAlloc* memalloc = sAlloc->getAllocator(data.allocType); 1031 memalloc->free_buffer(data.base, data.size, 0, data.fd); 1032 } 1033 } 1034 1035 /* Function to perform the software color conversion. Convert the 1036 * C2D compatible format to the Android compatible format 1037 */ 1038 static int copy_image(private_handle_t *src_handle, 1039 struct copybit_image_t const *rhs, 1040 eConversionType conversionType) 1041 { 1042 if (src_handle->fd == -1) { 1043 ALOGE("%s: src_handle fd is invalid", __FUNCTION__); 1044 return COPYBIT_FAILURE; 1045 } 1046 1047 // Copy the info. 1048 int ret = COPYBIT_SUCCESS; 1049 switch(rhs->format) { 1050 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 1051 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 1052 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 1053 { 1054 if (CONVERT_TO_ANDROID_FORMAT == conversionType) { 1055 return convert_yuv_c2d_to_yuv_android(src_handle, rhs); 1056 } else { 1057 return convert_yuv_android_to_yuv_c2d(src_handle, rhs); 1058 } 1059 1060 } break; 1061 default: { 1062 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 1063 ret = COPYBIT_FAILURE; 1064 } break; 1065 } 1066 return ret; 1067 } 1068 1069 static void delete_handle(private_handle_t *handle) 1070 { 1071 if (handle) { 1072 delete handle; 1073 handle = 0; 1074 } 1075 } 1076 1077 static bool need_to_execute_draw(eC2DFlags flags) 1078 { 1079 if (flags & FLAGS_TEMP_SRC_DST) { 1080 return true; 1081 } 1082 if (flags & FLAGS_YUV_DESTINATION) { 1083 return true; 1084 } 1085 return false; 1086 } 1087 1088 /** do a stretch blit type operation */ 1089 static int stretch_copybit_internal( 1090 struct copybit_device_t *dev, 1091 struct copybit_image_t const *dst, 1092 struct copybit_image_t const *src, 1093 struct copybit_rect_t const *dst_rect, 1094 struct copybit_rect_t const *src_rect, 1095 struct copybit_region_t const *region, 1096 bool enableBlend) 1097 { 1098 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1099 int status = COPYBIT_SUCCESS; 1100 int flags = 0; 1101 int src_surface_type; 1102 int mapped_src_idx = -1, mapped_dst_idx = -1; 1103 C2D_OBJECT_STR src_surface; 1104 1105 if (!ctx) { 1106 ALOGE("%s: null context error", __FUNCTION__); 1107 return -EINVAL; 1108 } 1109 1110 if (src->w > MAX_DIMENSION || src->h > MAX_DIMENSION) { 1111 ALOGE("%s: src dimension error", __FUNCTION__); 1112 return -EINVAL; 1113 } 1114 1115 if (dst->w > MAX_DIMENSION || dst->h > MAX_DIMENSION) { 1116 ALOGE("%s : dst dimension error dst w %d h %d", __FUNCTION__, dst->w, 1117 dst->h); 1118 return -EINVAL; 1119 } 1120 1121 if (is_valid_destination_format(dst->format) == COPYBIT_FAILURE) { 1122 ALOGE("%s: Invalid destination format format = 0x%x", __FUNCTION__, 1123 dst->format); 1124 return COPYBIT_FAILURE; 1125 } 1126 1127 int dst_surface_type; 1128 if (is_supported_rgb_format(dst->format) == COPYBIT_SUCCESS) { 1129 dst_surface_type = RGB_SURFACE; 1130 flags |= FLAGS_PREMULTIPLIED_ALPHA; 1131 } else if (is_supported_yuv_format(dst->format) == COPYBIT_SUCCESS) { 1132 int num_planes = get_num_planes(dst->format); 1133 flags |= FLAGS_YUV_DESTINATION; 1134 if (num_planes == 2) { 1135 dst_surface_type = YUV_SURFACE_2_PLANES; 1136 } else if (num_planes == 3) { 1137 dst_surface_type = YUV_SURFACE_3_PLANES; 1138 } else { 1139 ALOGE("%s: dst number of YUV planes is invalid dst format = 0x%x", 1140 __FUNCTION__, dst->format); 1141 return COPYBIT_FAILURE; 1142 } 1143 } else { 1144 ALOGE("%s: Invalid dst surface format 0x%x", __FUNCTION__, 1145 dst->format); 1146 return COPYBIT_FAILURE; 1147 } 1148 1149 if (ctx->blit_rgb_count == MAX_RGB_SURFACES || 1150 ctx->blit_yuv_2_plane_count == MAX_YUV_2_PLANE_SURFACES || 1151 ctx->blit_yuv_3_plane_count == MAX_YUV_2_PLANE_SURFACES || 1152 ctx->blit_count == MAX_BLIT_OBJECT_COUNT || 1153 ctx->dst_surface_type != dst_surface_type) { 1154 // we have reached the max. limits of our internal structures or 1155 // changed the target. 1156 // Draw the remaining surfaces. We need to do the finish here since 1157 // we need to free up the surface templates. 1158 finish_copybit(dev); 1159 } 1160 1161 ctx->dst_surface_type = dst_surface_type; 1162 1163 // Update the destination 1164 copybit_image_t dst_image; 1165 dst_image.w = dst->w; 1166 dst_image.h = dst->h; 1167 dst_image.format = dst->format; 1168 dst_image.handle = dst->handle; 1169 // Check if we need a temp. copy for the destination. We'd need this the destination 1170 // width is not aligned to 32. This case occurs for YUV formats. RGB formats are 1171 // aligned to 32. 1172 bool need_temp_dst = need_temp_buffer(dst); 1173 bufferInfo dst_info; 1174 populate_buffer_info(dst, dst_info); 1175 private_handle_t* dst_hnd = new private_handle_t(-1, 0, 0, 0, dst_info.format, 1176 dst_info.width, dst_info.height); 1177 if (dst_hnd == NULL) { 1178 ALOGE("%s: dst_hnd is null", __FUNCTION__); 1179 return COPYBIT_FAILURE; 1180 } 1181 if (need_temp_dst) { 1182 if (get_size(dst_info) != ctx->temp_dst_buffer.size) { 1183 free_temp_buffer(ctx->temp_dst_buffer); 1184 // Create a temp buffer and set that as the destination. 1185 if (COPYBIT_FAILURE == get_temp_buffer(dst_info, ctx->temp_dst_buffer)) { 1186 ALOGE("%s: get_temp_buffer(dst) failed", __FUNCTION__); 1187 delete_handle(dst_hnd); 1188 return COPYBIT_FAILURE; 1189 } 1190 } 1191 dst_hnd->fd = ctx->temp_dst_buffer.fd; 1192 dst_hnd->size = ctx->temp_dst_buffer.size; 1193 dst_hnd->flags = ctx->temp_dst_buffer.allocType; 1194 dst_hnd->base = (uintptr_t)(ctx->temp_dst_buffer.base); 1195 dst_hnd->offset = ctx->temp_dst_buffer.offset; 1196 dst_hnd->gpuaddr = 0; 1197 dst_image.handle = dst_hnd; 1198 } 1199 if(!ctx->dst_surface_mapped) { 1200 //map the destination surface to GPU address 1201 status = set_image(ctx, ctx->dst[ctx->dst_surface_type], &dst_image, 1202 (eC2DFlags)flags, mapped_dst_idx); 1203 if(status) { 1204 ALOGE("%s: dst: set_image error", __FUNCTION__); 1205 delete_handle(dst_hnd); 1206 unmap_gpuaddr(ctx, mapped_dst_idx); 1207 return COPYBIT_FAILURE; 1208 } 1209 ctx->dst_surface_mapped = true; 1210 ctx->dst_surface_base = dst->base; 1211 } else if(ctx->dst_surface_mapped && ctx->dst_surface_base != dst->base) { 1212 // Destination surface for the operation should be same for multiple 1213 // requests, this check is catch if there is any case when the 1214 // destination changes 1215 ALOGE("%s: a different destination surface!!", __FUNCTION__); 1216 } 1217 1218 // Update the source 1219 flags = 0; 1220 if(is_supported_rgb_format(src->format) == COPYBIT_SUCCESS) { 1221 src_surface_type = RGB_SURFACE; 1222 src_surface = ctx->blit_rgb_object[ctx->blit_rgb_count]; 1223 } else if (is_supported_yuv_format(src->format) == COPYBIT_SUCCESS) { 1224 int num_planes = get_num_planes(src->format); 1225 if (num_planes == 2) { 1226 src_surface_type = YUV_SURFACE_2_PLANES; 1227 src_surface = ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count]; 1228 } else if (num_planes == 3) { 1229 src_surface_type = YUV_SURFACE_3_PLANES; 1230 src_surface = ctx->blit_yuv_3_plane_object[ctx->blit_yuv_2_plane_count]; 1231 } else { 1232 ALOGE("%s: src number of YUV planes is invalid src format = 0x%x", 1233 __FUNCTION__, src->format); 1234 delete_handle(dst_hnd); 1235 unmap_gpuaddr(ctx, mapped_dst_idx); 1236 return -EINVAL; 1237 } 1238 } else { 1239 ALOGE("%s: Invalid source surface format 0x%x", __FUNCTION__, 1240 src->format); 1241 delete_handle(dst_hnd); 1242 unmap_gpuaddr(ctx, mapped_dst_idx); 1243 return -EINVAL; 1244 } 1245 1246 copybit_image_t src_image; 1247 src_image.w = src->w; 1248 src_image.h = src->h; 1249 src_image.format = src->format; 1250 src_image.handle = src->handle; 1251 1252 bool need_temp_src = need_temp_buffer(src); 1253 bufferInfo src_info; 1254 populate_buffer_info(src, src_info); 1255 private_handle_t* src_hnd = new private_handle_t(-1, 0, 0, 0, src_info.format, 1256 src_info.width, src_info.height); 1257 if (NULL == src_hnd) { 1258 ALOGE("%s: src_hnd is null", __FUNCTION__); 1259 delete_handle(dst_hnd); 1260 unmap_gpuaddr(ctx, mapped_dst_idx); 1261 return COPYBIT_FAILURE; 1262 } 1263 if (need_temp_src) { 1264 if (get_size(src_info) != ctx->temp_src_buffer.size) { 1265 free_temp_buffer(ctx->temp_src_buffer); 1266 // Create a temp buffer and set that as the destination. 1267 if (COPYBIT_SUCCESS != get_temp_buffer(src_info, 1268 ctx->temp_src_buffer)) { 1269 ALOGE("%s: get_temp_buffer(src) failed", __FUNCTION__); 1270 delete_handle(dst_hnd); 1271 delete_handle(src_hnd); 1272 unmap_gpuaddr(ctx, mapped_dst_idx); 1273 return COPYBIT_FAILURE; 1274 } 1275 } 1276 src_hnd->fd = ctx->temp_src_buffer.fd; 1277 src_hnd->size = ctx->temp_src_buffer.size; 1278 src_hnd->flags = ctx->temp_src_buffer.allocType; 1279 src_hnd->base = (uintptr_t)(ctx->temp_src_buffer.base); 1280 src_hnd->offset = ctx->temp_src_buffer.offset; 1281 src_hnd->gpuaddr = 0; 1282 src_image.handle = src_hnd; 1283 1284 // Copy the source. 1285 status = copy_image((private_handle_t *)src->handle, &src_image, 1286 CONVERT_TO_C2D_FORMAT); 1287 if (status == COPYBIT_FAILURE) { 1288 ALOGE("%s:copy_image failed in temp source",__FUNCTION__); 1289 delete_handle(dst_hnd); 1290 delete_handle(src_hnd); 1291 unmap_gpuaddr(ctx, mapped_dst_idx); 1292 return status; 1293 } 1294 1295 // Clean the cache 1296 IMemAlloc* memalloc = sAlloc->getAllocator(src_hnd->flags); 1297 if (memalloc->clean_buffer((void *)(src_hnd->base), src_hnd->size, 1298 src_hnd->offset, src_hnd->fd, 1299 gralloc::CACHE_CLEAN)) { 1300 ALOGE("%s: clean_buffer failed", __FUNCTION__); 1301 delete_handle(dst_hnd); 1302 delete_handle(src_hnd); 1303 unmap_gpuaddr(ctx, mapped_dst_idx); 1304 return COPYBIT_FAILURE; 1305 } 1306 } 1307 1308 flags |= (ctx->is_premultiplied_alpha) ? FLAGS_PREMULTIPLIED_ALPHA : 0; 1309 flags |= (ctx->dst_surface_type != RGB_SURFACE) ? FLAGS_YUV_DESTINATION : 0; 1310 status = set_image(ctx, src_surface.surface_id, &src_image, 1311 (eC2DFlags)flags, mapped_src_idx); 1312 if(status) { 1313 ALOGE("%s: set_image (src) error", __FUNCTION__); 1314 delete_handle(dst_hnd); 1315 delete_handle(src_hnd); 1316 unmap_gpuaddr(ctx, mapped_dst_idx); 1317 unmap_gpuaddr(ctx, mapped_src_idx); 1318 return COPYBIT_FAILURE; 1319 } 1320 1321 src_surface.config_mask = C2D_NO_ANTIALIASING_BIT | ctx->config_mask; 1322 src_surface.global_alpha = ctx->src_global_alpha; 1323 if (enableBlend) { 1324 if(src_surface.config_mask & C2D_GLOBAL_ALPHA_BIT) { 1325 src_surface.config_mask &= ~C2D_ALPHA_BLEND_NONE; 1326 if(!(src_surface.global_alpha)) { 1327 // src alpha is zero 1328 delete_handle(dst_hnd); 1329 delete_handle(src_hnd); 1330 unmap_gpuaddr(ctx, mapped_dst_idx); 1331 unmap_gpuaddr(ctx, mapped_src_idx); 1332 return COPYBIT_FAILURE; 1333 } 1334 } 1335 } else { 1336 src_surface.config_mask |= C2D_ALPHA_BLEND_NONE; 1337 } 1338 1339 if (src_surface_type == RGB_SURFACE) { 1340 ctx->blit_rgb_object[ctx->blit_rgb_count] = src_surface; 1341 ctx->blit_rgb_count++; 1342 } else if (src_surface_type == YUV_SURFACE_2_PLANES) { 1343 ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count] = src_surface; 1344 ctx->blit_yuv_2_plane_count++; 1345 } else { 1346 ctx->blit_yuv_3_plane_object[ctx->blit_yuv_3_plane_count] = src_surface; 1347 ctx->blit_yuv_3_plane_count++; 1348 } 1349 1350 struct copybit_rect_t clip; 1351 while ((status == 0) && region->next(region, &clip)) { 1352 set_rects(ctx, &(src_surface), dst_rect, src_rect, &clip); 1353 if (ctx->blit_count == MAX_BLIT_OBJECT_COUNT) { 1354 ALOGW("Reached end of blit count"); 1355 finish_copybit(dev); 1356 } 1357 ctx->blit_list[ctx->blit_count] = src_surface; 1358 ctx->blit_count++; 1359 } 1360 1361 // Check if we need to perform an early draw-finish. 1362 flags |= (need_temp_dst || need_temp_src) ? FLAGS_TEMP_SRC_DST : 0; 1363 if (need_to_execute_draw((eC2DFlags)flags)) 1364 { 1365 finish_copybit(dev); 1366 } 1367 1368 if (need_temp_dst) { 1369 // copy the temp. destination without the alignment to the actual 1370 // destination. 1371 status = copy_image(dst_hnd, dst, CONVERT_TO_ANDROID_FORMAT); 1372 if (status == COPYBIT_FAILURE) { 1373 ALOGE("%s:copy_image failed in temp Dest",__FUNCTION__); 1374 delete_handle(dst_hnd); 1375 delete_handle(src_hnd); 1376 unmap_gpuaddr(ctx, mapped_dst_idx); 1377 unmap_gpuaddr(ctx, mapped_src_idx); 1378 return status; 1379 } 1380 // Clean the cache. 1381 IMemAlloc* memalloc = sAlloc->getAllocator(dst_hnd->flags); 1382 memalloc->clean_buffer((void *)(dst_hnd->base), dst_hnd->size, 1383 dst_hnd->offset, dst_hnd->fd, 1384 gralloc::CACHE_CLEAN); 1385 } 1386 delete_handle(dst_hnd); 1387 delete_handle(src_hnd); 1388 1389 ctx->is_premultiplied_alpha = false; 1390 ctx->fb_width = 0; 1391 ctx->fb_height = 0; 1392 ctx->config_mask = 0; 1393 return status; 1394 } 1395 1396 static int set_sync_copybit(struct copybit_device_t *dev, 1397 int /*acquireFenceFd*/) 1398 { 1399 if(!dev) 1400 return -EINVAL; 1401 1402 return 0; 1403 } 1404 1405 static int stretch_copybit( 1406 struct copybit_device_t *dev, 1407 struct copybit_image_t const *dst, 1408 struct copybit_image_t const *src, 1409 struct copybit_rect_t const *dst_rect, 1410 struct copybit_rect_t const *src_rect, 1411 struct copybit_region_t const *region) 1412 { 1413 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1414 int status = COPYBIT_SUCCESS; 1415 bool needsBlending = (ctx->src_global_alpha != 0); 1416 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1417 status = stretch_copybit_internal(dev, dst, src, dst_rect, src_rect, 1418 region, needsBlending); 1419 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1420 return status; 1421 } 1422 1423 /** Perform a blit type operation */ 1424 static int blit_copybit( 1425 struct copybit_device_t *dev, 1426 struct copybit_image_t const *dst, 1427 struct copybit_image_t const *src, 1428 struct copybit_region_t const *region) 1429 { 1430 int status = COPYBIT_SUCCESS; 1431 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1432 struct copybit_rect_t dr = { 0, 0, (int)dst->w, (int)dst->h }; 1433 struct copybit_rect_t sr = { 0, 0, (int)src->w, (int)src->h }; 1434 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1435 status = stretch_copybit_internal(dev, dst, src, &dr, &sr, region, false); 1436 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1437 return status; 1438 } 1439 1440 /** Fill the rect on dst with RGBA color **/ 1441 static int fill_color(struct copybit_device_t *dev, 1442 struct copybit_image_t const *dst, 1443 struct copybit_rect_t const *rect, 1444 uint32_t /*color*/) 1445 { 1446 // TODO: Implement once c2d driver supports color fill 1447 if(!dev || !dst || !rect) 1448 return -EINVAL; 1449 1450 return -EINVAL; 1451 } 1452 1453 /*****************************************************************************/ 1454 1455 static void clean_up(copybit_context_t* ctx) 1456 { 1457 void* ret; 1458 if (!ctx) 1459 return; 1460 1461 // stop the wait_cleanup_thread 1462 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1463 ctx->stop_thread = true; 1464 // Signal waiting thread 1465 pthread_cond_signal(&ctx->wait_cleanup_cond); 1466 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1467 // waits for the cleanup thread to exit 1468 pthread_join(ctx->wait_thread_id, &ret); 1469 pthread_mutex_destroy(&ctx->wait_cleanup_lock); 1470 pthread_cond_destroy (&ctx->wait_cleanup_cond); 1471 1472 for (int i = 0; i < NUM_SURFACE_TYPES; i++) { 1473 if (ctx->dst[i]) 1474 LINK_c2dDestroySurface(ctx->dst[i]); 1475 } 1476 1477 for (int i = 0; i < MAX_RGB_SURFACES; i++) { 1478 if (ctx->blit_rgb_object[i].surface_id) 1479 LINK_c2dDestroySurface(ctx->blit_rgb_object[i].surface_id); 1480 } 1481 1482 for (int i = 0; i < MAX_YUV_2_PLANE_SURFACES; i++) { 1483 if (ctx->blit_yuv_2_plane_object[i].surface_id) 1484 LINK_c2dDestroySurface(ctx->blit_yuv_2_plane_object[i].surface_id); 1485 } 1486 1487 for (int i = 0; i < MAX_YUV_3_PLANE_SURFACES; i++) { 1488 if (ctx->blit_yuv_3_plane_object[i].surface_id) 1489 LINK_c2dDestroySurface(ctx->blit_yuv_3_plane_object[i].surface_id); 1490 } 1491 1492 if (ctx->libc2d2) { 1493 ::dlclose(ctx->libc2d2); 1494 ALOGV("dlclose(libc2d2)"); 1495 } 1496 1497 free(ctx); 1498 } 1499 1500 /** Close the copybit device */ 1501 static int close_copybit(struct hw_device_t *dev) 1502 { 1503 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1504 if (ctx) { 1505 free_temp_buffer(ctx->temp_src_buffer); 1506 free_temp_buffer(ctx->temp_dst_buffer); 1507 } 1508 clean_up(ctx); 1509 return 0; 1510 } 1511 1512 /** Open a new instance of a copybit device using name */ 1513 static int open_copybit(const struct hw_module_t* module, const char* name, 1514 struct hw_device_t** device) 1515 { 1516 int status = COPYBIT_SUCCESS; 1517 if (strcmp(name, COPYBIT_HARDWARE_COPYBIT0)) { 1518 return COPYBIT_FAILURE; 1519 } 1520 1521 C2D_RGB_SURFACE_DEF surfDefinition = {0}; 1522 C2D_YUV_SURFACE_DEF yuvSurfaceDef = {0} ; 1523 struct copybit_context_t *ctx; 1524 1525 ctx = (struct copybit_context_t *)malloc(sizeof(struct copybit_context_t)); 1526 if(!ctx) { 1527 ALOGE("%s: malloc failed", __FUNCTION__); 1528 return COPYBIT_FAILURE; 1529 } 1530 1531 /* initialize drawstate */ 1532 memset(ctx, 0, sizeof(*ctx)); 1533 ctx->libc2d2 = ::dlopen("libC2D2.so", RTLD_NOW); 1534 if (!ctx->libc2d2) { 1535 ALOGE("FATAL ERROR: could not dlopen libc2d2.so: %s", dlerror()); 1536 clean_up(ctx); 1537 status = COPYBIT_FAILURE; 1538 *device = NULL; 1539 return status; 1540 } 1541 *(void **)&LINK_c2dCreateSurface = ::dlsym(ctx->libc2d2, 1542 "c2dCreateSurface"); 1543 *(void **)&LINK_c2dUpdateSurface = ::dlsym(ctx->libc2d2, 1544 "c2dUpdateSurface"); 1545 *(void **)&LINK_c2dReadSurface = ::dlsym(ctx->libc2d2, 1546 "c2dReadSurface"); 1547 *(void **)&LINK_c2dDraw = ::dlsym(ctx->libc2d2, "c2dDraw"); 1548 *(void **)&LINK_c2dFlush = ::dlsym(ctx->libc2d2, "c2dFlush"); 1549 *(void **)&LINK_c2dFinish = ::dlsym(ctx->libc2d2, "c2dFinish"); 1550 *(void **)&LINK_c2dWaitTimestamp = ::dlsym(ctx->libc2d2, 1551 "c2dWaitTimestamp"); 1552 *(void **)&LINK_c2dDestroySurface = ::dlsym(ctx->libc2d2, 1553 "c2dDestroySurface"); 1554 *(void **)&LINK_c2dMapAddr = ::dlsym(ctx->libc2d2, 1555 "c2dMapAddr"); 1556 *(void **)&LINK_c2dUnMapAddr = ::dlsym(ctx->libc2d2, 1557 "c2dUnMapAddr"); 1558 *(void **)&LINK_c2dGetDriverCapabilities = ::dlsym(ctx->libc2d2, 1559 "c2dGetDriverCapabilities"); 1560 *(void **)&LINK_c2dCreateFenceFD = ::dlsym(ctx->libc2d2, 1561 "c2dCreateFenceFD"); 1562 *(void **)&LINK_c2dFillSurface = ::dlsym(ctx->libc2d2, 1563 "c2dFillSurface"); 1564 1565 if (!LINK_c2dCreateSurface || !LINK_c2dUpdateSurface || !LINK_c2dReadSurface 1566 || !LINK_c2dDraw || !LINK_c2dFlush || !LINK_c2dWaitTimestamp || 1567 !LINK_c2dFinish || !LINK_c2dDestroySurface || 1568 !LINK_c2dGetDriverCapabilities || !LINK_c2dCreateFenceFD || 1569 !LINK_c2dFillSurface) { 1570 ALOGE("%s: dlsym ERROR", __FUNCTION__); 1571 clean_up(ctx); 1572 status = COPYBIT_FAILURE; 1573 *device = NULL; 1574 return status; 1575 } 1576 1577 ctx->device.common.tag = HARDWARE_DEVICE_TAG; 1578 ctx->device.common.version = 1; 1579 ctx->device.common.module = (hw_module_t*)(module); 1580 ctx->device.common.close = close_copybit; 1581 ctx->device.set_parameter = set_parameter_copybit; 1582 ctx->device.get = get; 1583 ctx->device.blit = blit_copybit; 1584 ctx->device.set_sync = set_sync_copybit; 1585 ctx->device.stretch = stretch_copybit; 1586 ctx->device.finish = finish_copybit; 1587 ctx->device.flush_get_fence = flush_get_fence_copybit; 1588 ctx->device.clear = clear_copybit; 1589 ctx->device.fill_color = fill_color; 1590 1591 /* Create RGB Surface */ 1592 surfDefinition.buffer = (void*)0xdddddddd; 1593 surfDefinition.phys = (void*)0xdddddddd; 1594 surfDefinition.stride = 1 * 4; 1595 surfDefinition.width = 1; 1596 surfDefinition.height = 1; 1597 surfDefinition.format = C2D_COLOR_FORMAT_8888_ARGB; 1598 if (LINK_c2dCreateSurface(&(ctx->dst[RGB_SURFACE]), C2D_TARGET | C2D_SOURCE, 1599 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1600 C2D_SURFACE_WITH_PHYS | 1601 C2D_SURFACE_WITH_PHYS_DUMMY ), 1602 &surfDefinition)) { 1603 ALOGE("%s: create ctx->dst_surface[RGB_SURFACE] failed", __FUNCTION__); 1604 ctx->dst[RGB_SURFACE] = 0; 1605 clean_up(ctx); 1606 status = COPYBIT_FAILURE; 1607 *device = NULL; 1608 return status; 1609 } 1610 1611 unsigned int surface_id = 0; 1612 for (int i = 0; i < MAX_RGB_SURFACES; i++) 1613 { 1614 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1615 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1616 C2D_SURFACE_WITH_PHYS | 1617 C2D_SURFACE_WITH_PHYS_DUMMY ), 1618 &surfDefinition)) { 1619 ALOGE("%s: create RGB source surface %d failed", __FUNCTION__, i); 1620 ctx->blit_rgb_object[i].surface_id = 0; 1621 status = COPYBIT_FAILURE; 1622 break; 1623 } else { 1624 ctx->blit_rgb_object[i].surface_id = surface_id; 1625 ALOGW("%s i = %d surface_id=%d", __FUNCTION__, i, 1626 ctx->blit_rgb_object[i].surface_id); 1627 } 1628 } 1629 1630 if (status == COPYBIT_FAILURE) { 1631 clean_up(ctx); 1632 status = COPYBIT_FAILURE; 1633 *device = NULL; 1634 return status; 1635 } 1636 1637 // Create 2 plane YUV surfaces 1638 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_NV12; 1639 yuvSurfaceDef.width = 4; 1640 yuvSurfaceDef.height = 4; 1641 yuvSurfaceDef.plane0 = (void*)0xaaaaaaaa; 1642 yuvSurfaceDef.phys0 = (void*) 0xaaaaaaaa; 1643 yuvSurfaceDef.stride0 = 4; 1644 1645 yuvSurfaceDef.plane1 = (void*)0xaaaaaaaa; 1646 yuvSurfaceDef.phys1 = (void*) 0xaaaaaaaa; 1647 yuvSurfaceDef.stride1 = 4; 1648 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_2_PLANES]), 1649 C2D_TARGET | C2D_SOURCE, 1650 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1651 C2D_SURFACE_WITH_PHYS | 1652 C2D_SURFACE_WITH_PHYS_DUMMY), 1653 &yuvSurfaceDef)) { 1654 ALOGE("%s: create ctx->dst[YUV_SURFACE_2_PLANES] failed", __FUNCTION__); 1655 ctx->dst[YUV_SURFACE_2_PLANES] = 0; 1656 clean_up(ctx); 1657 status = COPYBIT_FAILURE; 1658 *device = NULL; 1659 return status; 1660 } 1661 1662 for (int i=0; i < MAX_YUV_2_PLANE_SURFACES; i++) 1663 { 1664 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1665 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1666 C2D_SURFACE_WITH_PHYS | 1667 C2D_SURFACE_WITH_PHYS_DUMMY ), 1668 &yuvSurfaceDef)) { 1669 ALOGE("%s: create YUV source %d failed", __FUNCTION__, i); 1670 ctx->blit_yuv_2_plane_object[i].surface_id = 0; 1671 status = COPYBIT_FAILURE; 1672 break; 1673 } else { 1674 ctx->blit_yuv_2_plane_object[i].surface_id = surface_id; 1675 ALOGW("%s: 2 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1676 ctx->blit_yuv_2_plane_object[i].surface_id); 1677 } 1678 } 1679 1680 if (status == COPYBIT_FAILURE) { 1681 clean_up(ctx); 1682 status = COPYBIT_FAILURE; 1683 *device = NULL; 1684 return status; 1685 } 1686 1687 // Create YUV 3 plane surfaces 1688 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_YV12; 1689 yuvSurfaceDef.plane2 = (void*)0xaaaaaaaa; 1690 yuvSurfaceDef.phys2 = (void*) 0xaaaaaaaa; 1691 yuvSurfaceDef.stride2 = 4; 1692 1693 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_3_PLANES]), 1694 C2D_TARGET | C2D_SOURCE, 1695 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1696 C2D_SURFACE_WITH_PHYS | 1697 C2D_SURFACE_WITH_PHYS_DUMMY), 1698 &yuvSurfaceDef)) { 1699 ALOGE("%s: create ctx->dst[YUV_SURFACE_3_PLANES] failed", __FUNCTION__); 1700 ctx->dst[YUV_SURFACE_3_PLANES] = 0; 1701 clean_up(ctx); 1702 status = COPYBIT_FAILURE; 1703 *device = NULL; 1704 return status; 1705 } 1706 1707 for (int i=0; i < MAX_YUV_3_PLANE_SURFACES; i++) 1708 { 1709 if (LINK_c2dCreateSurface(&(surface_id), 1710 C2D_TARGET | C2D_SOURCE, 1711 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1712 C2D_SURFACE_WITH_PHYS | 1713 C2D_SURFACE_WITH_PHYS_DUMMY), 1714 &yuvSurfaceDef)) { 1715 ALOGE("%s: create 3 plane YUV surface %d failed", __FUNCTION__, i); 1716 ctx->blit_yuv_3_plane_object[i].surface_id = 0; 1717 status = COPYBIT_FAILURE; 1718 break; 1719 } else { 1720 ctx->blit_yuv_3_plane_object[i].surface_id = surface_id; 1721 ALOGW("%s: 3 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1722 ctx->blit_yuv_3_plane_object[i].surface_id); 1723 } 1724 } 1725 1726 if (status == COPYBIT_FAILURE) { 1727 clean_up(ctx); 1728 status = COPYBIT_FAILURE; 1729 *device = NULL; 1730 return status; 1731 } 1732 1733 if (LINK_c2dGetDriverCapabilities(&(ctx->c2d_driver_info))) { 1734 ALOGE("%s: LINK_c2dGetDriverCapabilities failed", __FUNCTION__); 1735 clean_up(ctx); 1736 status = COPYBIT_FAILURE; 1737 *device = NULL; 1738 return status; 1739 } 1740 // Initialize context variables. 1741 ctx->trg_transform = C2D_TARGET_ROTATE_0; 1742 1743 ctx->temp_src_buffer.fd = -1; 1744 ctx->temp_src_buffer.base = 0; 1745 ctx->temp_src_buffer.size = 0; 1746 1747 ctx->temp_dst_buffer.fd = -1; 1748 ctx->temp_dst_buffer.base = 0; 1749 ctx->temp_dst_buffer.size = 0; 1750 1751 ctx->fb_width = 0; 1752 ctx->fb_height = 0; 1753 1754 ctx->blit_rgb_count = 0; 1755 ctx->blit_yuv_2_plane_count = 0; 1756 ctx->blit_yuv_3_plane_count = 0; 1757 ctx->blit_count = 0; 1758 1759 ctx->wait_timestamp = false; 1760 ctx->stop_thread = false; 1761 pthread_mutex_init(&(ctx->wait_cleanup_lock), NULL); 1762 pthread_cond_init(&(ctx->wait_cleanup_cond), NULL); 1763 /* Start the wait thread */ 1764 pthread_attr_t attr; 1765 pthread_attr_init(&attr); 1766 pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE); 1767 1768 pthread_create(&ctx->wait_thread_id, &attr, &c2d_wait_loop, 1769 (void *)ctx); 1770 pthread_attr_destroy(&attr); 1771 1772 *device = &ctx->device.common; 1773 return status; 1774 } 1775
