1 /* 2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, are permitted 5 * provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright notice, this list of 7 * conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright notice, this list of 9 * conditions and the following disclaimer in the documentation and/or other materials provided 10 * with the distribution. 11 * * Neither the name of The Linux Foundation nor the names of its contributors may be used to 12 * endorse or promote products derived from this software without specific prior written 13 * permission. 14 * 15 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 22 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #ifndef __HW_INFO_TYPES_H__ 26 #define __HW_INFO_TYPES_H__ 27 28 #include <stdint.h> 29 #include <core/display_interface.h> 30 #include <core/core_interface.h> 31 #include <vector> 32 #include <map> 33 #include <string> 34 #include <bitset> 35 36 namespace sdm { 37 using std::string; 38 39 const int kMaxSDELayers = 16; // Maximum number of layers that can be handled by MDP5 hardware 40 // in a given layer stack. 41 #define MAX_PLANES 4 42 43 #define MAX_DETAIL_ENHANCE_CURVE 3 44 45 enum HWDeviceType { 46 kDevicePrimary, 47 kDeviceHDMI, 48 kDeviceVirtual, 49 kDeviceRotator, 50 kDeviceMax, 51 }; 52 53 enum HWBlockType { 54 kHWPrimary, 55 kHWHDMI, 56 kHWWriteback0, 57 kHWWriteback1, 58 kHWWriteback2, 59 kHWBlockMax 60 }; 61 62 enum HWDisplayMode { 63 kModeDefault, 64 kModeVideo, 65 kModeCommand, 66 }; 67 68 enum PipeType { 69 kPipeTypeUnused, 70 kPipeTypeVIG, 71 kPipeTypeRGB, 72 kPipeTypeDMA, 73 kPipeTypeCursor, 74 }; 75 76 enum HWSubBlockType { 77 kHWVIGPipe, 78 kHWRGBPipe, 79 kHWDMAPipe, 80 kHWCursorPipe, 81 kHWRotatorInput, 82 kHWRotatorOutput, 83 kHWWBIntfOutput, 84 kHWDestinationScalar, 85 kHWSubBlockMax, 86 }; 87 88 enum HWAlphaInterpolation { 89 kInterpolationPixelRepeat, 90 kInterpolationBilinear, 91 kInterpolationMax, 92 }; 93 94 enum HWBlendingFilter { 95 kBlendFilterCircular, 96 kBlendFilterSeparable, 97 kBlendFilterMax, 98 }; 99 100 enum HWPipeFlags { 101 kIGC = 0x01, 102 kMultiRect = 0x02, 103 kMultiRectParallelMode = 0x04, 104 }; 105 106 enum HWAVRModes { 107 kContinuousMode, // Mode to enable AVR feature for every frame. 108 kOneShotMode, // Mode to enable AVR feature for particular frame. 109 }; 110 111 typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap; 112 113 struct HWDynBwLimitInfo { 114 uint32_t cur_mode = kBwDefault; 115 uint32_t total_bw_limit[kBwModeMax] = { 0 }; 116 uint32_t pipe_bw_limit[kBwModeMax] = { 0 }; 117 }; 118 119 struct HWPipeCaps { 120 PipeType type = kPipeTypeUnused; 121 uint32_t id = 0; 122 uint32_t master_pipe_id = 0; 123 uint32_t max_rects = 1; 124 }; 125 126 struct HWRotatorInfo { 127 enum { ROT_TYPE_MDSS, ROT_TYPE_V4L2 }; 128 uint32_t type = ROT_TYPE_MDSS; 129 uint32_t num_rotator = 0; 130 bool has_downscale = false; 131 std::string device_path = ""; 132 float min_downscale = 2.0f; 133 bool downscale_compression = false; 134 135 void Reset() { *this = HWRotatorInfo(); } 136 }; 137 138 struct HWDestScalarInfo { 139 uint32_t count = 0; 140 uint32_t max_input_width = 0; 141 uint32_t max_output_width = 0; 142 uint32_t max_scale_up = 1; 143 }; 144 145 enum SmartDMARevision { 146 V1, 147 V2, 148 }; 149 150 struct HWResourceInfo { 151 uint32_t hw_version = 0; 152 uint32_t hw_revision = 0; 153 uint32_t num_dma_pipe = 0; 154 uint32_t num_vig_pipe = 0; 155 uint32_t num_rgb_pipe = 0; 156 uint32_t num_cursor_pipe = 0; 157 uint32_t num_blending_stages = 0; 158 uint32_t num_control = 0; 159 uint32_t num_mixer_to_disp = 0; 160 uint32_t smp_total = 0; 161 uint32_t smp_size = 0; 162 uint32_t num_smp_per_pipe = 0; 163 uint32_t max_scale_up = 1; 164 uint32_t max_scale_down = 1; 165 uint64_t max_bandwidth_low = 0; 166 uint64_t max_bandwidth_high = 0; 167 uint32_t max_mixer_width = 2048; 168 uint32_t max_pipe_width = 2048; 169 uint32_t max_cursor_size = 0; 170 uint32_t max_pipe_bw = 0; 171 uint32_t max_sde_clk = 0; 172 float clk_fudge_factor = 1.0f; 173 uint32_t macrotile_nv12_factor = 0; 174 uint32_t macrotile_factor = 0; 175 uint32_t linear_factor = 0; 176 uint32_t scale_factor = 0; 177 uint32_t extra_fudge_factor = 0; 178 uint32_t amortizable_threshold = 0; 179 uint32_t system_overhead_lines = 0; 180 bool has_bwc = false; 181 bool has_ubwc = false; 182 bool has_decimation = false; 183 bool has_macrotile = false; 184 bool has_non_scalar_rgb = false; 185 bool is_src_split = false; 186 bool perf_calc = false; 187 bool has_dyn_bw_support = false; 188 bool separate_rotator = false; 189 bool has_qseed3 = false; 190 bool has_concurrent_writeback = false; 191 bool has_ppp = false; 192 uint32_t writeback_index = kHWBlockMax; 193 HWDynBwLimitInfo dyn_bw_info; 194 std::vector<HWPipeCaps> hw_pipes; 195 FormatsMap supported_formats_map; 196 HWRotatorInfo hw_rot_info; 197 HWDestScalarInfo hw_dest_scalar_info; 198 bool has_avr = false; 199 bool has_hdr = false; 200 SmartDMARevision smart_dma_rev = SmartDMARevision::V1; 201 void Reset() { *this = HWResourceInfo(); } 202 }; 203 204 struct HWSplitInfo { 205 uint32_t left_split = 0; 206 uint32_t right_split = 0; 207 208 bool operator !=(const HWSplitInfo &split_info) { 209 return ((left_split != split_info.left_split) || (right_split != split_info.right_split)); 210 } 211 212 bool operator ==(const HWSplitInfo &split_info) { 213 return !(operator !=(split_info)); 214 } 215 }; 216 217 enum HWS3DMode { 218 kS3DModeNone, 219 kS3DModeLR, 220 kS3DModeRL, 221 kS3DModeTB, 222 kS3DModeFP, 223 kS3DModeMax, 224 }; 225 226 struct HWColorPrimaries { 227 uint32_t white_point[2] = {}; // White point 228 uint32_t red[2] = {}; // Red color primary 229 uint32_t green[2] = {}; // Green color primary 230 uint32_t blue[2] = {}; // Blue color primary 231 }; 232 233 struct HWPanelOrientation { 234 bool rotation = false; 235 bool flip_horizontal = false; 236 bool flip_vertical = false; 237 }; 238 239 struct HWPanelInfo { 240 DisplayPort port = kPortDefault; // Display port 241 HWDisplayMode mode = kModeDefault; // Display mode 242 bool partial_update = false; // Partial update feature 243 int left_align = 1; // ROI left alignment restriction 244 int width_align = 1; // ROI width alignment restriction 245 int top_align = 1; // ROI top alignment restriction 246 int height_align = 1; // ROI height alignment restriction 247 int min_roi_width = 1; // Min width needed for ROI 248 int min_roi_height = 1; // Min height needed for ROI 249 bool needs_roi_merge = false; // Merge ROI's of both the DSI's 250 bool dynamic_fps = false; // Panel Supports dynamic fps 251 bool dfps_porch_mode = false; // dynamic fps VFP or HFP mode 252 bool ping_pong_split = false; // Supports Ping pong split 253 uint32_t min_fps = 0; // Min fps supported by panel 254 uint32_t max_fps = 0; // Max fps supported by panel 255 bool is_primary_panel = false; // Panel is primary display 256 bool is_pluggable = false; // Panel is pluggable 257 HWSplitInfo split_info; // Panel split configuration 258 char panel_name[256] = {0}; // Panel name 259 HWS3DMode s3d_mode = kS3DModeNone; // Panel's current s3d mode. 260 int panel_max_brightness = 0; // Max panel brightness 261 uint32_t left_roi_count = 1; // Number if ROI supported on left panel 262 uint32_t right_roi_count = 1; // Number if ROI supported on right panel 263 bool hdr_enabled = false; // HDR feature supported 264 uint32_t peak_luminance = 0; // Panel's peak luminance level 265 uint32_t average_luminance = 0; // Panel's average luminance level 266 uint32_t blackness_level = 0; // Panel's blackness level 267 HWColorPrimaries primaries = {}; // WRGB color primaries 268 HWPanelOrientation panel_orientation = {}; // Panel Orientation 269 270 bool operator !=(const HWPanelInfo &panel_info) { 271 return ((port != panel_info.port) || (mode != panel_info.mode) || 272 (partial_update != panel_info.partial_update) || 273 (left_align != panel_info.left_align) || (width_align != panel_info.width_align) || 274 (top_align != panel_info.top_align) || (height_align != panel_info.height_align) || 275 (min_roi_width != panel_info.min_roi_width) || 276 (min_roi_height != panel_info.min_roi_height) || 277 (needs_roi_merge != panel_info.needs_roi_merge) || 278 (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) || 279 (dfps_porch_mode != panel_info.dfps_porch_mode) || 280 (ping_pong_split != panel_info.ping_pong_split) || 281 (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) || 282 (split_info != panel_info.split_info) || (s3d_mode != panel_info.s3d_mode) || 283 (left_roi_count != panel_info.left_roi_count) || 284 (right_roi_count != panel_info.right_roi_count)); 285 } 286 287 bool operator ==(const HWPanelInfo &panel_info) { 288 return !(operator !=(panel_info)); 289 } 290 }; 291 292 struct HWSessionConfig { 293 LayerRect src_rect; 294 LayerRect dst_rect; 295 uint32_t buffer_count = 0; 296 bool secure = false; 297 uint32_t frame_rate = 0; 298 LayerTransform transform; 299 bool secure_camera = false; 300 301 bool operator==(const HWSessionConfig& config) const { 302 return (src_rect == config.src_rect && 303 dst_rect == config.dst_rect && 304 buffer_count == config.buffer_count && 305 secure == config.secure && 306 frame_rate == config.frame_rate && 307 transform == config.transform && 308 secure_camera == config.secure_camera); 309 } 310 311 bool operator!=(const HWSessionConfig& config) const { 312 return !operator==(config); 313 } 314 }; 315 316 struct HWRotateInfo { 317 int pipe_id = -1; // Not actual pipe id, but the relative DMA id 318 int writeback_id = -1; // Writeback block id, but this is the same as DMA id 319 LayerRect src_roi; // Source crop of each split 320 LayerRect dst_roi; // Destination crop of each split 321 bool valid = false; 322 int rotate_id = -1; // Actual rotator session id with driver 323 324 void Reset() { *this = HWRotateInfo(); } 325 }; 326 327 struct HWRotatorSession { 328 HWRotateInfo hw_rotate_info[kMaxRotatePerLayer]; 329 uint32_t hw_block_count = 0; // number of rotator hw blocks used by rotator session 330 int session_id = -1; // A handle with Session Manager 331 HWSessionConfig hw_session_config; 332 LayerBuffer input_buffer; // Input to rotator 333 LayerBuffer output_buffer; // Output of rotator, crop width and stride are same 334 float input_compression = 1.0f; 335 float output_compression = 1.0f; 336 bool is_buffer_cached = false; 337 }; 338 339 struct HWScaleLutInfo { 340 uint32_t dir_lut_size = 0; 341 uint32_t cir_lut_size = 0; 342 uint32_t sep_lut_size = 0; 343 uint64_t dir_lut = 0; 344 uint64_t cir_lut = 0; 345 uint64_t sep_lut = 0; 346 }; 347 348 struct HWDetailEnhanceData : DisplayDetailEnhancerData { 349 uint16_t prec_shift = 0; 350 int16_t adjust_a[MAX_DETAIL_ENHANCE_CURVE] = {0}; 351 int16_t adjust_b[MAX_DETAIL_ENHANCE_CURVE] = {0}; 352 int16_t adjust_c[MAX_DETAIL_ENHANCE_CURVE] = {0}; 353 }; 354 355 struct HWPixelExtension { 356 int32_t extension = 0; // Number of pixels extension in left, right, top and bottom directions 357 // for all color components. This pixel value for each color component 358 // should be sum of fetch and repeat pixels. 359 360 int32_t overfetch = 0; // Number of pixels need to be overfetched in left, right, top and bottom 361 // directions from source image for scaling. 362 363 int32_t repeat = 0; // Number of pixels need to be repeated in left, right, top and bottom 364 // directions for scaling. 365 }; 366 367 struct HWPlane { 368 int32_t init_phase_x = 0; 369 int32_t phase_step_x = 0; 370 int32_t init_phase_y = 0; 371 int32_t phase_step_y = 0; 372 HWPixelExtension left; 373 HWPixelExtension top; 374 HWPixelExtension right; 375 HWPixelExtension bottom; 376 uint32_t roi_width = 0; 377 int32_t preload_x = 0; 378 int32_t preload_y = 0; 379 uint32_t src_width = 0; 380 uint32_t src_height = 0; 381 }; 382 383 struct HWScaleData { 384 struct enable { 385 uint8_t scale = 0; 386 uint8_t direction_detection = 0; 387 uint8_t detail_enhance = 0; 388 } enable; 389 uint32_t dst_width = 0; 390 uint32_t dst_height = 0; 391 HWPlane plane[MAX_PLANES]; 392 // scale_v2_data fields 393 ScalingFilterConfig y_rgb_filter_cfg = kFilterEdgeDirected; 394 ScalingFilterConfig uv_filter_cfg = kFilterEdgeDirected; 395 HWAlphaInterpolation alpha_filter_cfg = kInterpolationPixelRepeat; 396 HWBlendingFilter blend_cfg = kBlendFilterCircular; 397 398 struct lut_flags { 399 uint8_t lut_swap = 0; 400 uint8_t lut_dir_wr = 0; 401 uint8_t lut_y_cir_wr = 0; 402 uint8_t lut_uv_cir_wr = 0; 403 uint8_t lut_y_sep_wr = 0; 404 uint8_t lut_uv_sep_wr = 0; 405 } lut_flag; 406 407 uint32_t dir_lut_idx = 0; 408 /* for Y(RGB) and UV planes*/ 409 uint32_t y_rgb_cir_lut_idx = 0; 410 uint32_t uv_cir_lut_idx = 0; 411 uint32_t y_rgb_sep_lut_idx = 0; 412 uint32_t uv_sep_lut_idx = 0; 413 414 HWDetailEnhanceData detail_enhance; 415 }; 416 417 struct HWDestScaleInfo { 418 uint32_t mixer_width = 0; 419 uint32_t mixer_height = 0; 420 bool scale_update = false; 421 HWScaleData scale_data = {}; 422 LayerRect panel_roi = {}; 423 }; 424 425 typedef std::map<uint32_t, HWDestScaleInfo *> DestScaleInfoMap; 426 427 struct HWAVRInfo { 428 bool enable = false; // Flag to Enable AVR feature 429 HWAVRModes mode = kContinuousMode; // Specifies the AVR mode 430 }; 431 432 struct HWPipeInfo { 433 uint8_t rect = 255; 434 uint32_t pipe_id = 0; 435 HWSubBlockType sub_block_type = kHWSubBlockMax; 436 LayerRect src_roi; 437 LayerRect dst_roi; 438 uint8_t horizontal_decimation = 0; 439 uint8_t vertical_decimation = 0; 440 HWScaleData scale_data; 441 uint32_t z_order = 0; 442 uint8_t flags = 0; 443 bool valid = false; 444 445 void Reset() { *this = HWPipeInfo(); } 446 }; 447 448 struct HWLayerConfig { 449 HWPipeInfo left_pipe; // pipe for left side of output 450 HWPipeInfo right_pipe; // pipe for right side of output 451 HWRotatorSession hw_rotator_session; 452 float compression = 1.0f; 453 454 void Reset() { *this = HWLayerConfig(); } 455 }; 456 457 struct HWHDRLayerInfo { 458 enum HDROperation { 459 kNoOp, // No-op. 460 kSet, // Sets the HDR MetaData - Start of HDR 461 kReset, // resets the previously set HDR Metadata, End of HDR 462 }; 463 464 int32_t layer_index = -1; 465 HDROperation operation = kNoOp; 466 }; 467 468 struct HWLayersInfo { 469 LayerStack *stack = NULL; // Input layer stack. Set by the caller. 470 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0. 471 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present. 472 473 std::vector<Layer> hw_layers = {}; // Layers which need to be programmed on the HW 474 475 uint32_t index[kMaxSDELayers] = {}; // Indexes of the layers from the layer stack which need to 476 // be programmed on hardware. 477 uint32_t roi_index[kMaxSDELayers] = {0}; // Stores the ROI index where the layers are visible. 478 479 int sync_handle = -1; // Release fence id for current draw cycle. 480 int set_idle_time_ms = -1; // Set idle time to the new specified value. 481 // -1 indicates no change in idle time since last set value. 482 483 std::vector<LayerRect> left_frame_roi = {}; // Left ROI. 484 std::vector<LayerRect> right_frame_roi = {}; // Right ROI. 485 LayerRect partial_fb_roi = {}; // Damaged area in framebuffer. 486 487 bool roi_split = false; // Indicates separated left and right ROI 488 489 bool use_hw_cursor = false; // Indicates that HWCursor pipe needs to be used for cursor layer 490 DestScaleInfoMap dest_scale_info_map = {}; 491 HWHDRLayerInfo hdr_layer_info = {}; 492 Handle pvt_data = NULL; // Private data used by sdm extension only. 493 }; 494 495 struct HWLayers { 496 HWLayersInfo info; 497 HWLayerConfig config[kMaxSDELayers]; 498 float output_compression = 1.0f; 499 uint32_t bandwidth = 0; 500 uint32_t clock = 0; 501 HWAVRInfo hw_avr_info = {}; 502 }; 503 504 struct HWDisplayAttributes : DisplayConfigVariableInfo { 505 bool is_device_split = false; 506 uint32_t v_front_porch = 0; //!< Vertical front porch of panel 507 uint32_t v_back_porch = 0; //!< Vertical back porch of panel 508 uint32_t v_pulse_width = 0; //!< Vertical pulse width of panel 509 uint32_t h_total = 0; //!< Total width of panel (hActive + hFP + hBP + hPulseWidth) 510 uint32_t v_total = 0; //!< Total height of panel (vActive + vFP + vBP + vPulseWidth) 511 std::bitset<32> s3d_config; //!< Stores the bit mask of S3D modes 512 513 void Reset() { *this = HWDisplayAttributes(); } 514 515 bool operator !=(const HWDisplayAttributes &display_attributes) { 516 return ((is_device_split != display_attributes.is_device_split) || 517 (x_pixels != display_attributes.x_pixels) || 518 (y_pixels != display_attributes.y_pixels) || 519 (x_dpi != display_attributes.x_dpi) || 520 (y_dpi != display_attributes.y_dpi) || 521 (fps != display_attributes.fps) || 522 (vsync_period_ns != display_attributes.vsync_period_ns) || 523 (v_front_porch != display_attributes.v_front_porch) || 524 (v_back_porch != display_attributes.v_back_porch) || 525 (v_pulse_width != display_attributes.v_pulse_width) || 526 (h_total != display_attributes.h_total) || 527 (is_yuv != display_attributes.is_yuv)); 528 } 529 530 bool operator ==(const HWDisplayAttributes &display_attributes) { 531 return !(operator !=(display_attributes)); 532 } 533 }; 534 535 struct HWMixerAttributes { 536 uint32_t width = 0; // Layer mixer width 537 uint32_t height = 0; // Layer mixer height 538 uint32_t split_left = 0; 539 LayerBufferFormat output_format = kFormatRGB101010; // Layer mixer output format 540 541 bool operator !=(const HWMixerAttributes &mixer_attributes) { 542 return ((width != mixer_attributes.width) || 543 (height != mixer_attributes.height) || 544 (output_format != mixer_attributes.output_format) || 545 (split_left != mixer_attributes.split_left)); 546 } 547 548 bool operator ==(const HWMixerAttributes &mixer_attributes) { 549 return !(operator !=(mixer_attributes)); 550 } 551 552 bool IsValid() { 553 return (width > 0 && height > 0); 554 } 555 }; 556 557 } // namespace sdm 558 559 #endif // __HW_INFO_TYPES_H__ 560 561
