1 /* 2 * Copyright (C) 2008 The Android Open Source Project 3 * Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. 4 * 5 * Not a Contribution, Apache license notifications and license are retained 6 * for attribution purposes only. 7 * 8 * Licensed under the Apache License, Version 2.0 (the "License"); 9 * you may not use this file except in compliance with the License. 10 * You may obtain a copy of the License at 11 * 12 * http://www.apache.org/licenses/LICENSE-2.0 13 * 14 * Unless required by applicable law or agreed to in writing, software 15 * distributed under the License is distributed on an "AS IS" BASIS, 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 17 * See the License for the specific language governing permissions and 18 * limitations under the License. 19 */ 20 #include <cutils/log.h> 21 #include <sys/resource.h> 22 #include <sys/prctl.h> 23 24 #include <stdint.h> 25 #include <string.h> 26 #include <unistd.h> 27 #include <errno.h> 28 #include <fcntl.h> 29 30 #include <sys/ioctl.h> 31 #include <sys/types.h> 32 #include <sys/mman.h> 33 34 #include <linux/msm_kgsl.h> 35 36 #include <EGL/eglplatform.h> 37 #include <cutils/native_handle.h> 38 39 #include <copybit.h> 40 #include <alloc_controller.h> 41 #include <memalloc.h> 42 43 #include "c2d2.h" 44 #include "software_converter.h" 45 46 #include <dlfcn.h> 47 48 using gralloc::IMemAlloc; 49 using gralloc::IonController; 50 using gralloc::alloc_data; 51 52 C2D_STATUS (*LINK_c2dCreateSurface)( uint32 *surface_id, 53 uint32 surface_bits, 54 C2D_SURFACE_TYPE surface_type, 55 void *surface_definition ); 56 57 C2D_STATUS (*LINK_c2dUpdateSurface)( uint32 surface_id, 58 uint32 surface_bits, 59 C2D_SURFACE_TYPE surface_type, 60 void *surface_definition ); 61 62 C2D_STATUS (*LINK_c2dReadSurface)( uint32 surface_id, 63 C2D_SURFACE_TYPE surface_type, 64 void *surface_definition, 65 int32 x, int32 y ); 66 67 C2D_STATUS (*LINK_c2dDraw)( uint32 target_id, 68 uint32 target_config, C2D_RECT *target_scissor, 69 uint32 target_mask_id, uint32 target_color_key, 70 C2D_OBJECT *objects_list, uint32 num_objects ); 71 72 C2D_STATUS (*LINK_c2dFinish)( uint32 target_id); 73 74 C2D_STATUS (*LINK_c2dFlush)( uint32 target_id, c2d_ts_handle *timestamp); 75 76 C2D_STATUS (*LINK_c2dWaitTimestamp)( c2d_ts_handle timestamp ); 77 78 C2D_STATUS (*LINK_c2dDestroySurface)( uint32 surface_id ); 79 80 C2D_STATUS (*LINK_c2dMapAddr) ( int mem_fd, void * hostptr, size_t len, 81 size_t offset, uint32 flags, void ** gpuaddr); 82 83 C2D_STATUS (*LINK_c2dUnMapAddr) ( void * gpuaddr); 84 85 C2D_STATUS (*LINK_c2dGetDriverCapabilities) ( C2D_DRIVER_INFO * driver_info); 86 87 /* create a fence fd for the timestamp */ 88 C2D_STATUS (*LINK_c2dCreateFenceFD) ( uint32 target_id, c2d_ts_handle timestamp, 89 int32 *fd); 90 91 C2D_STATUS (*LINK_c2dFillSurface) ( uint32 surface_id, uint32 fill_color, 92 C2D_RECT * fill_rect); 93 94 /******************************************************************************/ 95 96 #if defined(COPYBIT_Z180) 97 #define MAX_SCALE_FACTOR (4096) 98 #define MAX_DIMENSION (4096) 99 #else 100 #error "Unsupported HW version" 101 #endif 102 103 // The following defines can be changed as required i.e. as we encounter 104 // complex use cases. 105 #define MAX_RGB_SURFACES 32 // Max. RGB layers currently supported per draw 106 #define MAX_YUV_2_PLANE_SURFACES 4// Max. 2-plane YUV layers currently supported per draw 107 #define MAX_YUV_3_PLANE_SURFACES 1// Max. 3-plane YUV layers currently supported per draw 108 // +1 for the destination surface. We cannot have multiple destination surfaces. 109 #define MAX_SURFACES (MAX_RGB_SURFACES + MAX_YUV_2_PLANE_SURFACES + MAX_YUV_3_PLANE_SURFACES + 1) 110 #define NUM_SURFACE_TYPES 3 // RGB_SURFACE + YUV_SURFACE_2_PLANES + YUV_SURFACE_3_PLANES 111 #define MAX_BLIT_OBJECT_COUNT 50 // Max. blit objects that can be passed per draw 112 113 enum { 114 RGB_SURFACE, 115 YUV_SURFACE_2_PLANES, 116 YUV_SURFACE_3_PLANES 117 }; 118 119 enum eConversionType { 120 CONVERT_TO_ANDROID_FORMAT, 121 CONVERT_TO_C2D_FORMAT 122 }; 123 124 enum eC2DFlags { 125 FLAGS_PREMULTIPLIED_ALPHA = 1<<0, 126 FLAGS_YUV_DESTINATION = 1<<1, 127 FLAGS_TEMP_SRC_DST = 1<<2, 128 FLAGS_UBWC_FORMAT_MODE = 1<<3 129 }; 130 131 static gralloc::IAllocController* sAlloc = 0; 132 /******************************************************************************/ 133 134 /** State information for each device instance */ 135 struct copybit_context_t { 136 struct copybit_device_t device; 137 // Templates for the various source surfaces. These templates are created 138 // to avoid the expensive create/destroy C2D Surfaces 139 C2D_OBJECT_STR blit_rgb_object[MAX_RGB_SURFACES]; 140 C2D_OBJECT_STR blit_yuv_2_plane_object[MAX_YUV_2_PLANE_SURFACES]; 141 C2D_OBJECT_STR blit_yuv_3_plane_object[MAX_YUV_3_PLANE_SURFACES]; 142 C2D_OBJECT_STR blit_list[MAX_BLIT_OBJECT_COUNT]; // Z-ordered list of blit objects 143 C2D_DRIVER_INFO c2d_driver_info; 144 void *libc2d2; 145 alloc_data temp_src_buffer; 146 alloc_data temp_dst_buffer; 147 unsigned int dst[NUM_SURFACE_TYPES]; // dst surfaces 148 uintptr_t mapped_gpu_addr[MAX_SURFACES]; // GPU addresses mapped inside copybit 149 int blit_rgb_count; // Total RGB surfaces being blit 150 int blit_yuv_2_plane_count; // Total 2 plane YUV surfaces being 151 int blit_yuv_3_plane_count; // Total 3 plane YUV surfaces being blit 152 int blit_count; // Total blit objects. 153 unsigned int trg_transform; /* target transform */ 154 int fb_width; 155 int fb_height; 156 int src_global_alpha; 157 int config_mask; 158 int dst_surface_type; 159 bool is_premultiplied_alpha; 160 void* time_stamp; 161 bool dst_surface_mapped; // Set when dst surface is mapped to GPU addr 162 void* dst_surface_base; // Stores the dst surface addr 163 bool is_src_ubwc_format; 164 bool is_dst_ubwc_format; 165 166 // used for signaling the wait thread 167 bool wait_timestamp; 168 pthread_t wait_thread_id; 169 bool stop_thread; 170 pthread_mutex_t wait_cleanup_lock; 171 pthread_cond_t wait_cleanup_cond; 172 173 }; 174 175 struct bufferInfo { 176 int width; 177 int height; 178 int format; 179 }; 180 181 struct yuvPlaneInfo { 182 int yStride; //luma stride 183 int plane1_stride; 184 int plane2_stride; 185 size_t plane1_offset; 186 size_t plane2_offset; 187 }; 188 189 /** 190 * Common hardware methods 191 */ 192 193 static int open_copybit(const struct hw_module_t* module, const char* name, 194 struct hw_device_t** device); 195 196 static struct hw_module_methods_t copybit_module_methods = { 197 .open = open_copybit, 198 }; 199 200 /* 201 * The COPYBIT Module 202 */ 203 struct copybit_module_t HAL_MODULE_INFO_SYM = { 204 .common = { 205 .tag = HARDWARE_MODULE_TAG, 206 .version_major = 1, 207 .version_minor = 0, 208 .id = COPYBIT_HARDWARE_MODULE_ID, 209 .name = "QCT COPYBIT C2D 2.0 Module", 210 .author = "Qualcomm", 211 .methods = ©bit_module_methods 212 } 213 }; 214 215 216 /* thread function which waits on the timeStamp and cleans up the surfaces */ 217 static void* c2d_wait_loop(void* ptr) { 218 copybit_context_t* ctx = (copybit_context_t*)(ptr); 219 char thread_name[64] = "copybitWaitThr"; 220 prctl(PR_SET_NAME, (unsigned long) &thread_name, 0, 0, 0); 221 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY); 222 223 while(ctx->stop_thread == false) { 224 pthread_mutex_lock(&ctx->wait_cleanup_lock); 225 while(ctx->wait_timestamp == false && !ctx->stop_thread) { 226 pthread_cond_wait(&(ctx->wait_cleanup_cond), 227 &(ctx->wait_cleanup_lock)); 228 } 229 if(ctx->wait_timestamp) { 230 if(LINK_c2dWaitTimestamp(ctx->time_stamp)) { 231 ALOGE("%s: LINK_c2dWaitTimeStamp ERROR!!", __FUNCTION__); 232 } 233 ctx->wait_timestamp = false; 234 // Unmap any mapped addresses. 235 for (int i = 0; i < MAX_SURFACES; i++) { 236 if (ctx->mapped_gpu_addr[i]) { 237 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 238 ctx->mapped_gpu_addr[i] = 0; 239 } 240 } 241 // Reset the counts after the draw. 242 ctx->blit_rgb_count = 0; 243 ctx->blit_yuv_2_plane_count = 0; 244 ctx->blit_yuv_3_plane_count = 0; 245 ctx->blit_count = 0; 246 ctx->dst_surface_mapped = false; 247 ctx->dst_surface_base = 0; 248 } 249 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 250 if(ctx->stop_thread) 251 break; 252 } 253 pthread_exit(NULL); 254 return NULL; 255 } 256 257 258 /* convert COPYBIT_FORMAT to C2D format */ 259 static int get_format(int format) { 260 switch (format) { 261 case HAL_PIXEL_FORMAT_RGB_565: return C2D_COLOR_FORMAT_565_RGB; 262 case HAL_PIXEL_FORMAT_RGB_888: return C2D_COLOR_FORMAT_888_RGB | 263 C2D_FORMAT_SWAP_RB; 264 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 265 C2D_FORMAT_SWAP_RB | 266 C2D_FORMAT_DISABLE_ALPHA; 267 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB | 268 C2D_FORMAT_SWAP_RB; 269 case HAL_PIXEL_FORMAT_BGRA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 270 case HAL_PIXEL_FORMAT_RGBA_5551: return C2D_COLOR_FORMAT_5551_RGBA; 271 case HAL_PIXEL_FORMAT_RGBA_4444: return C2D_COLOR_FORMAT_4444_RGBA; 272 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV12; 273 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV12; 274 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV21; 275 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: return C2D_COLOR_FORMAT_420_NV12 | 276 C2D_FORMAT_MACROTILED; 277 default: ALOGE("%s: invalid format (0x%x", 278 __FUNCTION__, format); 279 return -EINVAL; 280 } 281 return -EINVAL; 282 } 283 284 /* Get the C2D formats needed for conversion to YUV */ 285 static int get_c2d_format_for_yuv_destination(int halFormat) { 286 switch (halFormat) { 287 // We do not swap the RB when the target is YUV 288 case HAL_PIXEL_FORMAT_RGBX_8888: return C2D_COLOR_FORMAT_8888_ARGB | 289 C2D_FORMAT_DISABLE_ALPHA; 290 case HAL_PIXEL_FORMAT_RGBA_8888: return C2D_COLOR_FORMAT_8888_ARGB; 291 // The U and V need to be interchanged when the target is YUV 292 case HAL_PIXEL_FORMAT_YCbCr_420_SP: return C2D_COLOR_FORMAT_420_NV21; 293 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:return C2D_COLOR_FORMAT_420_NV21; 294 case HAL_PIXEL_FORMAT_YCrCb_420_SP: return C2D_COLOR_FORMAT_420_NV12; 295 default: return get_format(halFormat); 296 } 297 return -EINVAL; 298 } 299 300 /* ------------------------------------------------------------------- *//*! 301 * \internal 302 * \brief Get the bpp for a particular color format 303 * \param color format 304 * \return bits per pixel 305 *//* ------------------------------------------------------------------- */ 306 int c2diGetBpp(int32 colorformat) 307 { 308 309 int c2dBpp = 0; 310 311 switch(colorformat&0xFF) 312 { 313 case C2D_COLOR_FORMAT_4444_RGBA: 314 case C2D_COLOR_FORMAT_4444_ARGB: 315 case C2D_COLOR_FORMAT_1555_ARGB: 316 case C2D_COLOR_FORMAT_565_RGB: 317 case C2D_COLOR_FORMAT_5551_RGBA: 318 c2dBpp = 16; 319 break; 320 case C2D_COLOR_FORMAT_8888_RGBA: 321 case C2D_COLOR_FORMAT_8888_ARGB: 322 c2dBpp = 32; 323 break; 324 case C2D_COLOR_FORMAT_888_RGB: 325 c2dBpp = 24; 326 break; 327 case C2D_COLOR_FORMAT_8_L: 328 case C2D_COLOR_FORMAT_8_A: 329 c2dBpp = 8; 330 break; 331 case C2D_COLOR_FORMAT_4_A: 332 c2dBpp = 4; 333 break; 334 case C2D_COLOR_FORMAT_1: 335 c2dBpp = 1; 336 break; 337 default: 338 ALOGE("%s ERROR", __func__); 339 break; 340 } 341 return c2dBpp; 342 } 343 344 static size_t c2d_get_gpuaddr(copybit_context_t* ctx, 345 struct private_handle_t *handle, int &mapped_idx) 346 { 347 uint32 memtype; 348 size_t *gpuaddr = 0; 349 C2D_STATUS rc; 350 int freeindex = 0; 351 bool mapaddr = false; 352 353 if(!handle) 354 return 0; 355 356 if (handle->flags & private_handle_t::PRIV_FLAGS_USES_ION) 357 memtype = KGSL_USER_MEM_TYPE_ION; 358 else { 359 ALOGE("Invalid handle flags: 0x%x", handle->flags); 360 return 0; 361 } 362 363 // Check for a freeindex in the mapped_gpu_addr list 364 for (freeindex = 0; freeindex < MAX_SURFACES; freeindex++) { 365 if (ctx->mapped_gpu_addr[freeindex] == 0) { 366 // free index is available 367 // map GPU addr and use this as mapped_idx 368 mapaddr = true; 369 break; 370 } 371 } 372 373 if(mapaddr) { 374 rc = LINK_c2dMapAddr(handle->fd, (void*)handle->base, handle->size, 375 handle->offset, memtype, (void**)&gpuaddr); 376 377 if (rc == C2D_STATUS_OK) { 378 // We have mapped the GPU address inside copybit. We need to unmap 379 // this address after the blit. Store this address 380 ctx->mapped_gpu_addr[freeindex] = (size_t)gpuaddr; 381 mapped_idx = freeindex; 382 } 383 } 384 return (size_t)gpuaddr; 385 } 386 387 static void unmap_gpuaddr(copybit_context_t* ctx, int mapped_idx) 388 { 389 if (!ctx || (mapped_idx == -1)) 390 return; 391 392 if (ctx->mapped_gpu_addr[mapped_idx]) { 393 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[mapped_idx]); 394 ctx->mapped_gpu_addr[mapped_idx] = 0; 395 } 396 } 397 398 static int is_supported_rgb_format(int format) 399 { 400 switch(format) { 401 case HAL_PIXEL_FORMAT_RGBA_8888: 402 case HAL_PIXEL_FORMAT_RGBX_8888: 403 case HAL_PIXEL_FORMAT_RGB_888: 404 case HAL_PIXEL_FORMAT_RGB_565: 405 case HAL_PIXEL_FORMAT_BGRA_8888: 406 case HAL_PIXEL_FORMAT_RGBA_5551: 407 case HAL_PIXEL_FORMAT_RGBA_4444: { 408 return COPYBIT_SUCCESS; 409 } 410 default: 411 return COPYBIT_FAILURE; 412 } 413 } 414 415 static int get_num_planes(int format) 416 { 417 switch(format) { 418 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 419 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 420 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 421 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 422 return 2; 423 } 424 case HAL_PIXEL_FORMAT_YV12: { 425 return 3; 426 } 427 default: 428 return COPYBIT_FAILURE; 429 } 430 } 431 432 static int is_supported_yuv_format(int format) 433 { 434 switch(format) { 435 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 436 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 437 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 438 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 439 return COPYBIT_SUCCESS; 440 } 441 default: 442 return COPYBIT_FAILURE; 443 } 444 } 445 446 static int is_valid_destination_format(int format) 447 { 448 if (format == HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED) { 449 // C2D does not support NV12Tile as a destination format. 450 return COPYBIT_FAILURE; 451 } 452 return COPYBIT_SUCCESS; 453 } 454 455 static int calculate_yuv_offset_and_stride(const bufferInfo& info, 456 yuvPlaneInfo& yuvInfo) 457 { 458 int width = info.width; 459 int height = info.height; 460 int format = info.format; 461 462 int aligned_height = 0; 463 int aligned_width = 0, size = 0; 464 465 switch (format) { 466 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: { 467 /* NV12 Tile buffers have their luma height aligned to 32bytes and width 468 * aligned to 128 bytes. The chroma offset starts at an 8K boundary 469 */ 470 aligned_height = ALIGN(height, 32); 471 aligned_width = ALIGN(width, 128); 472 size = aligned_width * aligned_height; 473 yuvInfo.plane1_offset = ALIGN(size,8192); 474 yuvInfo.yStride = aligned_width; 475 yuvInfo.plane1_stride = aligned_width; 476 break; 477 } 478 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 479 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 480 case HAL_PIXEL_FORMAT_YCrCb_420_SP: { 481 aligned_width = ALIGN(width, 32); 482 yuvInfo.yStride = aligned_width; 483 yuvInfo.plane1_stride = aligned_width; 484 if (HAL_PIXEL_FORMAT_NV12_ENCODEABLE == format) { 485 // The encoder requires a 2K aligned chroma offset 486 yuvInfo.plane1_offset = ALIGN(aligned_width * height, 2048); 487 } else 488 yuvInfo.plane1_offset = aligned_width * height; 489 490 break; 491 } 492 default: { 493 return COPYBIT_FAILURE; 494 } 495 } 496 return COPYBIT_SUCCESS; 497 } 498 499 /** create C2D surface from copybit image */ 500 static int set_image(copybit_context_t* ctx, uint32 surfaceId, 501 const struct copybit_image_t *rhs, 502 const eC2DFlags flags, int &mapped_idx) 503 { 504 struct private_handle_t* handle = (struct private_handle_t*)rhs->handle; 505 C2D_SURFACE_TYPE surfaceType; 506 int status = COPYBIT_SUCCESS; 507 uint64_t gpuaddr = 0; 508 int c2d_format; 509 mapped_idx = -1; 510 511 if (flags & FLAGS_YUV_DESTINATION) { 512 c2d_format = get_c2d_format_for_yuv_destination(rhs->format); 513 } else { 514 c2d_format = get_format(rhs->format); 515 } 516 517 if(c2d_format == -EINVAL) { 518 ALOGE("%s: invalid format", __FUNCTION__); 519 return -EINVAL; 520 } 521 522 if(handle == NULL) { 523 ALOGE("%s: invalid handle", __func__); 524 return -EINVAL; 525 } 526 527 if (handle->gpuaddr == 0) { 528 gpuaddr = c2d_get_gpuaddr(ctx, handle, mapped_idx); 529 if(!gpuaddr) { 530 ALOGE("%s: c2d_get_gpuaddr failed", __FUNCTION__); 531 return COPYBIT_FAILURE; 532 } 533 } else { 534 gpuaddr = handle->gpuaddr; 535 } 536 537 /* create C2D surface */ 538 if(is_supported_rgb_format(rhs->format) == COPYBIT_SUCCESS) { 539 /* RGB */ 540 C2D_RGB_SURFACE_DEF surfaceDef; 541 542 surfaceType = (C2D_SURFACE_TYPE) (C2D_SURFACE_RGB_HOST | C2D_SURFACE_WITH_PHYS); 543 544 surfaceDef.phys = (void*) gpuaddr; 545 surfaceDef.buffer = (void*) (handle->base); 546 547 surfaceDef.format = c2d_format | 548 ((flags & FLAGS_PREMULTIPLIED_ALPHA) ? C2D_FORMAT_PREMULTIPLIED : 0); 549 550 surfaceDef.format = surfaceDef.format | 551 ((flags & FLAGS_UBWC_FORMAT_MODE) ? C2D_FORMAT_UBWC_COMPRESSED : 0); 552 553 surfaceDef.width = rhs->w; 554 surfaceDef.height = rhs->h; 555 int aligned_width = ALIGN((int)surfaceDef.width,32); 556 surfaceDef.stride = (aligned_width * c2diGetBpp(surfaceDef.format))>>3; 557 558 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 559 &surfaceDef)) { 560 ALOGE("%s: RGB Surface c2dUpdateSurface ERROR", __FUNCTION__); 561 unmap_gpuaddr(ctx, mapped_idx); 562 status = COPYBIT_FAILURE; 563 } 564 } else if (is_supported_yuv_format(rhs->format) == COPYBIT_SUCCESS) { 565 C2D_YUV_SURFACE_DEF surfaceDef; 566 memset(&surfaceDef, 0, sizeof(surfaceDef)); 567 surfaceType = (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | C2D_SURFACE_WITH_PHYS); 568 surfaceDef.format = c2d_format; 569 570 bufferInfo info; 571 info.width = rhs->w; 572 info.height = rhs->h; 573 info.format = rhs->format; 574 575 yuvPlaneInfo yuvInfo = {0}; 576 status = calculate_yuv_offset_and_stride(info, yuvInfo); 577 if(status != COPYBIT_SUCCESS) { 578 ALOGE("%s: calculate_yuv_offset_and_stride error", __FUNCTION__); 579 unmap_gpuaddr(ctx, mapped_idx); 580 } 581 582 surfaceDef.width = rhs->w; 583 surfaceDef.height = rhs->h; 584 surfaceDef.plane0 = (void*) (handle->base); 585 surfaceDef.phys0 = (void*) (gpuaddr); 586 surfaceDef.stride0 = yuvInfo.yStride; 587 588 surfaceDef.plane1 = (void*) (handle->base + yuvInfo.plane1_offset); 589 surfaceDef.phys1 = (void*) (gpuaddr + yuvInfo.plane1_offset); 590 surfaceDef.stride1 = yuvInfo.plane1_stride; 591 if (3 == get_num_planes(rhs->format)) { 592 surfaceDef.plane2 = (void*) (handle->base + yuvInfo.plane2_offset); 593 surfaceDef.phys2 = (void*) (gpuaddr + yuvInfo.plane2_offset); 594 surfaceDef.stride2 = yuvInfo.plane2_stride; 595 } 596 597 if(LINK_c2dUpdateSurface( surfaceId,C2D_TARGET | C2D_SOURCE, surfaceType, 598 &surfaceDef)) { 599 ALOGE("%s: YUV Surface c2dUpdateSurface ERROR", __FUNCTION__); 600 unmap_gpuaddr(ctx, mapped_idx); 601 status = COPYBIT_FAILURE; 602 } 603 } else { 604 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 605 unmap_gpuaddr(ctx, mapped_idx); 606 status = COPYBIT_FAILURE; 607 } 608 609 return status; 610 } 611 612 /** copy the bits */ 613 static int msm_copybit(struct copybit_context_t *ctx, unsigned int target) 614 { 615 if (ctx->blit_count == 0) { 616 return COPYBIT_SUCCESS; 617 } 618 619 for (int i = 0; i < ctx->blit_count; i++) 620 { 621 ctx->blit_list[i].next = &(ctx->blit_list[i+1]); 622 } 623 ctx->blit_list[ctx->blit_count-1].next = NULL; 624 uint32_t target_transform = ctx->trg_transform; 625 if (ctx->c2d_driver_info.capabilities_mask & 626 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 627 // For A3xx - set 0x0 as the transform is set in the config_mask 628 target_transform = 0x0; 629 } 630 if(LINK_c2dDraw(target, target_transform, 0x0, 0, 0, ctx->blit_list, 631 ctx->blit_count)) { 632 ALOGE("%s: LINK_c2dDraw ERROR", __FUNCTION__); 633 return COPYBIT_FAILURE; 634 } 635 return COPYBIT_SUCCESS; 636 } 637 638 639 640 static int flush_get_fence_copybit (struct copybit_device_t *dev, int* fd) 641 { 642 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 643 int status = COPYBIT_FAILURE; 644 if (!ctx) 645 return COPYBIT_FAILURE; 646 pthread_mutex_lock(&ctx->wait_cleanup_lock); 647 status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 648 649 if(LINK_c2dFlush(ctx->dst[ctx->dst_surface_type], &ctx->time_stamp)) { 650 ALOGE("%s: LINK_c2dFlush ERROR", __FUNCTION__); 651 // unlock the mutex and return failure 652 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 653 return COPYBIT_FAILURE; 654 } 655 if(LINK_c2dCreateFenceFD(ctx->dst[ctx->dst_surface_type], ctx->time_stamp, 656 fd)) { 657 ALOGE("%s: LINK_c2dCreateFenceFD ERROR", __FUNCTION__); 658 status = COPYBIT_FAILURE; 659 } 660 if(status == COPYBIT_SUCCESS) { 661 //signal the wait_thread 662 ctx->wait_timestamp = true; 663 pthread_cond_signal(&ctx->wait_cleanup_cond); 664 } 665 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 666 return status; 667 } 668 669 static int finish_copybit(struct copybit_device_t *dev) 670 { 671 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 672 if (!ctx) 673 return COPYBIT_FAILURE; 674 675 int status = msm_copybit(ctx, ctx->dst[ctx->dst_surface_type]); 676 677 if(LINK_c2dFinish(ctx->dst[ctx->dst_surface_type])) { 678 ALOGE("%s: LINK_c2dFinish ERROR", __FUNCTION__); 679 return COPYBIT_FAILURE; 680 } 681 682 // Unmap any mapped addresses. 683 for (int i = 0; i < MAX_SURFACES; i++) { 684 if (ctx->mapped_gpu_addr[i]) { 685 LINK_c2dUnMapAddr( (void*)ctx->mapped_gpu_addr[i]); 686 ctx->mapped_gpu_addr[i] = 0; 687 } 688 } 689 690 // Reset the counts after the draw. 691 ctx->blit_rgb_count = 0; 692 ctx->blit_yuv_2_plane_count = 0; 693 ctx->blit_yuv_3_plane_count = 0; 694 ctx->blit_count = 0; 695 ctx->dst_surface_mapped = false; 696 ctx->dst_surface_base = 0; 697 698 return status; 699 } 700 701 static int clear_copybit(struct copybit_device_t *dev, 702 struct copybit_image_t const *buf, 703 struct copybit_rect_t *rect) 704 { 705 int ret = COPYBIT_SUCCESS; 706 int flags = FLAGS_PREMULTIPLIED_ALPHA; 707 int mapped_dst_idx = -1; 708 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 709 if (ctx->is_dst_ubwc_format) 710 flags |= FLAGS_UBWC_FORMAT_MODE; 711 C2D_RECT c2drect = {rect->l, rect->t, rect->r - rect->l, rect->b - rect->t}; 712 pthread_mutex_lock(&ctx->wait_cleanup_lock); 713 if(!ctx->dst_surface_mapped) { 714 ret = set_image(ctx, ctx->dst[RGB_SURFACE], buf, 715 (eC2DFlags)flags, mapped_dst_idx); 716 if(ret) { 717 ALOGE("%s: set_image error", __FUNCTION__); 718 unmap_gpuaddr(ctx, mapped_dst_idx); 719 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 720 return COPYBIT_FAILURE; 721 } 722 //clear_copybit is the first call made by HWC for each composition 723 //with the dest surface, hence set dst_surface_mapped. 724 ctx->dst_surface_mapped = true; 725 ctx->dst_surface_base = buf->base; 726 ret = LINK_c2dFillSurface(ctx->dst[RGB_SURFACE], 0x0, &c2drect); 727 } 728 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 729 return ret; 730 } 731 732 733 /** setup rectangles */ 734 static void set_rects(struct copybit_context_t *ctx, 735 C2D_OBJECT *c2dObject, 736 const struct copybit_rect_t *dst, 737 const struct copybit_rect_t *src, 738 const struct copybit_rect_t *scissor) 739 { 740 // Set the target rect. 741 if((ctx->trg_transform & C2D_TARGET_ROTATE_90) && 742 (ctx->trg_transform & C2D_TARGET_ROTATE_180)) { 743 /* target rotation is 270 */ 744 c2dObject->target_rect.x = (dst->t)<<16; 745 c2dObject->target_rect.y = ctx->fb_width? 746 (ALIGN(ctx->fb_width,32)- dst->r):dst->r; 747 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 748 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 749 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 750 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_90) { 751 c2dObject->target_rect.x = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 752 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 753 c2dObject->target_rect.y = (dst->l)<<16; 754 c2dObject->target_rect.height = ((dst->r) - (dst->l))<<16; 755 c2dObject->target_rect.width = ((dst->b) - (dst->t))<<16; 756 } else if(ctx->trg_transform & C2D_TARGET_ROTATE_180) { 757 c2dObject->target_rect.y = ctx->fb_height?(ctx->fb_height - dst->b):dst->b; 758 c2dObject->target_rect.y = c2dObject->target_rect.y<<16; 759 c2dObject->target_rect.x = ctx->fb_width? 760 (ALIGN(ctx->fb_width,32) - dst->r):dst->r; 761 c2dObject->target_rect.x = c2dObject->target_rect.x<<16; 762 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 763 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 764 } else { 765 c2dObject->target_rect.x = (dst->l)<<16; 766 c2dObject->target_rect.y = (dst->t)<<16; 767 c2dObject->target_rect.height = ((dst->b) - (dst->t))<<16; 768 c2dObject->target_rect.width = ((dst->r) - (dst->l))<<16; 769 } 770 c2dObject->config_mask |= C2D_TARGET_RECT_BIT; 771 772 // Set the source rect 773 c2dObject->source_rect.x = (src->l)<<16; 774 c2dObject->source_rect.y = (src->t)<<16; 775 c2dObject->source_rect.height = ((src->b) - (src->t))<<16; 776 c2dObject->source_rect.width = ((src->r) - (src->l))<<16; 777 c2dObject->config_mask |= C2D_SOURCE_RECT_BIT; 778 779 // Set the scissor rect 780 c2dObject->scissor_rect.x = scissor->l; 781 c2dObject->scissor_rect.y = scissor->t; 782 c2dObject->scissor_rect.height = (scissor->b) - (scissor->t); 783 c2dObject->scissor_rect.width = (scissor->r) - (scissor->l); 784 c2dObject->config_mask |= C2D_SCISSOR_RECT_BIT; 785 } 786 787 /*****************************************************************************/ 788 789 /** Set a parameter to value */ 790 static int set_parameter_copybit( 791 struct copybit_device_t *dev, 792 int name, 793 int value) 794 { 795 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 796 int status = COPYBIT_SUCCESS; 797 if (!ctx) { 798 ALOGE("%s: null context", __FUNCTION__); 799 return -EINVAL; 800 } 801 802 pthread_mutex_lock(&ctx->wait_cleanup_lock); 803 switch(name) { 804 case COPYBIT_PLANE_ALPHA: 805 { 806 if (value < 0) value = 0; 807 if (value >= 256) value = 255; 808 809 ctx->src_global_alpha = value; 810 if (value < 255) 811 ctx->config_mask |= C2D_GLOBAL_ALPHA_BIT; 812 else 813 ctx->config_mask &= ~C2D_GLOBAL_ALPHA_BIT; 814 } 815 break; 816 case COPYBIT_BLEND_MODE: 817 { 818 if (value == COPYBIT_BLENDING_NONE) { 819 ctx->config_mask |= C2D_ALPHA_BLEND_NONE; 820 ctx->is_premultiplied_alpha = true; 821 } else if (value == COPYBIT_BLENDING_PREMULT) { 822 ctx->is_premultiplied_alpha = true; 823 } else { 824 ctx->config_mask &= ~C2D_ALPHA_BLEND_NONE; 825 } 826 } 827 break; 828 case COPYBIT_TRANSFORM: 829 { 830 unsigned int transform = 0; 831 uint32 config_mask = 0; 832 config_mask |= C2D_OVERRIDE_GLOBAL_TARGET_ROTATE_CONFIG; 833 if((value & 0x7) == COPYBIT_TRANSFORM_ROT_180) { 834 transform = C2D_TARGET_ROTATE_180; 835 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_180; 836 } else if((value & 0x7) == COPYBIT_TRANSFORM_ROT_270) { 837 transform = C2D_TARGET_ROTATE_90; 838 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_90; 839 } else if(value == COPYBIT_TRANSFORM_ROT_90) { 840 transform = C2D_TARGET_ROTATE_270; 841 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_270; 842 } else { 843 config_mask |= C2D_OVERRIDE_TARGET_ROTATE_0; 844 if(value & COPYBIT_TRANSFORM_FLIP_H) { 845 config_mask |= C2D_MIRROR_H_BIT; 846 } else if(value & COPYBIT_TRANSFORM_FLIP_V) { 847 config_mask |= C2D_MIRROR_V_BIT; 848 } 849 } 850 851 if (ctx->c2d_driver_info.capabilities_mask & 852 C2D_DRIVER_SUPPORTS_OVERRIDE_TARGET_ROTATE_OP) { 853 ctx->config_mask |= config_mask; 854 } else { 855 // The transform for this surface does not match the current 856 // target transform. Draw all previous surfaces. This will be 857 // changed once we have a new mechanism to send different 858 // target rotations to c2d. 859 finish_copybit(dev); 860 } 861 ctx->trg_transform = transform; 862 } 863 break; 864 case COPYBIT_FRAMEBUFFER_WIDTH: 865 ctx->fb_width = value; 866 break; 867 case COPYBIT_FRAMEBUFFER_HEIGHT: 868 ctx->fb_height = value; 869 break; 870 case COPYBIT_ROTATION_DEG: 871 case COPYBIT_DITHER: 872 case COPYBIT_BLUR: 873 case COPYBIT_BLIT_TO_FRAMEBUFFER: 874 // Do nothing 875 break; 876 case COPYBIT_SRC_FORMAT_MODE: 877 ctx->is_src_ubwc_format = (value == COPYBIT_UBWC_COMPRESSED); 878 break; 879 case COPYBIT_DST_FORMAT_MODE: 880 ctx->is_dst_ubwc_format = (value == COPYBIT_UBWC_COMPRESSED); 881 break; 882 default: 883 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 884 status = -EINVAL; 885 break; 886 } 887 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 888 return status; 889 } 890 891 /** Get a static info value */ 892 static int get(struct copybit_device_t *dev, int name) 893 { 894 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 895 int value; 896 897 if (!ctx) { 898 ALOGE("%s: null context error", __FUNCTION__); 899 return -EINVAL; 900 } 901 902 switch(name) { 903 case COPYBIT_MINIFICATION_LIMIT: 904 value = MAX_SCALE_FACTOR; 905 break; 906 case COPYBIT_MAGNIFICATION_LIMIT: 907 value = MAX_SCALE_FACTOR; 908 break; 909 case COPYBIT_SCALING_FRAC_BITS: 910 value = 32; 911 break; 912 case COPYBIT_ROTATION_STEP_DEG: 913 value = 1; 914 break; 915 case COPYBIT_UBWC_SUPPORT: 916 value = 0; 917 if (ctx->c2d_driver_info.capabilities_mask & C2D_DRIVER_SUPPORTS_UBWC_COMPRESSED_OP) { 918 value = 1; 919 } 920 break; 921 default: 922 ALOGE("%s: default case param=0x%x", __FUNCTION__, name); 923 value = -EINVAL; 924 } 925 return value; 926 } 927 928 /* Function to check if we need a temporary buffer for the blit. 929 * This would happen if the requested destination stride and the 930 * C2D stride do not match. We ignore RGB buffers, since their 931 * stride is always aligned to 32. 932 */ 933 static bool need_temp_buffer(struct copybit_image_t const *img) 934 { 935 if (COPYBIT_SUCCESS == is_supported_rgb_format(img->format)) 936 return false; 937 938 struct private_handle_t* handle = (struct private_handle_t*)img->handle; 939 940 // The width parameter in the handle contains the aligned_w. We check if we 941 // need to convert based on this param. YUV formats have bpp=1, so checking 942 // if the requested stride is aligned should suffice. 943 if (0 == (handle->width)%32) { 944 return false; 945 } 946 947 return true; 948 } 949 950 /* Function to extract the information from the copybit image and set the corresponding 951 * values in the bufferInfo struct. 952 */ 953 static void populate_buffer_info(struct copybit_image_t const *img, bufferInfo& info) 954 { 955 info.width = img->w; 956 info.height = img->h; 957 info.format = img->format; 958 } 959 960 /* Function to get the required size for a particular format, inorder for C2D to perform 961 * the blit operation. 962 */ 963 static int get_size(const bufferInfo& info) 964 { 965 int size = 0; 966 int w = info.width; 967 int h = info.height; 968 int aligned_w = ALIGN(w, 32); 969 switch(info.format) { 970 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 971 { 972 // Chroma for this format is aligned to 2K. 973 size = ALIGN((aligned_w*h), 2048) + 974 ALIGN(aligned_w/2, 32) * (h/2) *2; 975 size = ALIGN(size, 4096); 976 } break; 977 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 978 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 979 { 980 size = aligned_w * h + 981 ALIGN(aligned_w/2, 32) * (h/2) * 2; 982 size = ALIGN(size, 4096); 983 } break; 984 default: break; 985 } 986 return size; 987 } 988 989 /* Function to allocate memory for the temporary buffer. This memory is 990 * allocated from Ashmem. It is the caller's responsibility to free this 991 * memory. 992 */ 993 static int get_temp_buffer(const bufferInfo& info, alloc_data& data) 994 { 995 ALOGD("%s E", __FUNCTION__); 996 // Alloc memory from system heap 997 data.base = 0; 998 data.fd = -1; 999 data.offset = 0; 1000 data.size = get_size(info); 1001 data.align = getpagesize(); 1002 data.uncached = true; 1003 int allocFlags = 0; 1004 1005 if (sAlloc == 0) { 1006 sAlloc = gralloc::IAllocController::getInstance(); 1007 } 1008 1009 if (sAlloc == 0) { 1010 ALOGE("%s: sAlloc is still NULL", __FUNCTION__); 1011 return COPYBIT_FAILURE; 1012 } 1013 1014 int err = sAlloc->allocate(data, allocFlags); 1015 if (0 != err) { 1016 ALOGE("%s: allocate failed", __FUNCTION__); 1017 return COPYBIT_FAILURE; 1018 } 1019 1020 ALOGD("%s X", __FUNCTION__); 1021 return err; 1022 } 1023 1024 /* Function to free the temporary allocated memory.*/ 1025 static void free_temp_buffer(alloc_data &data) 1026 { 1027 if (-1 != data.fd) { 1028 IMemAlloc* memalloc = sAlloc->getAllocator(data.allocType); 1029 memalloc->free_buffer(data.base, data.size, 0, data.fd); 1030 } 1031 } 1032 1033 /* Function to perform the software color conversion. Convert the 1034 * C2D compatible format to the Android compatible format 1035 */ 1036 static int copy_image(private_handle_t *src_handle, 1037 struct copybit_image_t const *rhs, 1038 eConversionType conversionType) 1039 { 1040 if (src_handle->fd == -1) { 1041 ALOGE("%s: src_handle fd is invalid", __FUNCTION__); 1042 return COPYBIT_FAILURE; 1043 } 1044 1045 // Copy the info. 1046 int ret = COPYBIT_SUCCESS; 1047 switch(rhs->format) { 1048 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: 1049 case HAL_PIXEL_FORMAT_YCbCr_420_SP: 1050 case HAL_PIXEL_FORMAT_YCrCb_420_SP: 1051 { 1052 if (CONVERT_TO_ANDROID_FORMAT == conversionType) { 1053 return convert_yuv_c2d_to_yuv_android(src_handle, rhs); 1054 } else { 1055 return convert_yuv_android_to_yuv_c2d(src_handle, rhs); 1056 } 1057 1058 } break; 1059 default: { 1060 ALOGE("%s: invalid format 0x%x", __FUNCTION__, rhs->format); 1061 ret = COPYBIT_FAILURE; 1062 } break; 1063 } 1064 return ret; 1065 } 1066 1067 static void delete_handle(private_handle_t *handle) 1068 { 1069 if (handle) { 1070 delete handle; 1071 handle = 0; 1072 } 1073 } 1074 1075 static bool need_to_execute_draw(eC2DFlags flags) 1076 { 1077 if (flags & FLAGS_TEMP_SRC_DST) { 1078 return true; 1079 } 1080 if (flags & FLAGS_YUV_DESTINATION) { 1081 return true; 1082 } 1083 return false; 1084 } 1085 1086 /** do a stretch blit type operation */ 1087 static int stretch_copybit_internal( 1088 struct copybit_device_t *dev, 1089 struct copybit_image_t const *dst, 1090 struct copybit_image_t const *src, 1091 struct copybit_rect_t const *dst_rect, 1092 struct copybit_rect_t const *src_rect, 1093 struct copybit_region_t const *region, 1094 bool enableBlend) 1095 { 1096 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1097 int status = COPYBIT_SUCCESS; 1098 int flags = 0; 1099 int src_surface_type; 1100 int mapped_src_idx = -1, mapped_dst_idx = -1; 1101 C2D_OBJECT_STR src_surface; 1102 1103 if (!ctx) { 1104 ALOGE("%s: null context error", __FUNCTION__); 1105 return -EINVAL; 1106 } 1107 1108 if (src->w > MAX_DIMENSION || src->h > MAX_DIMENSION) { 1109 ALOGE("%s: src dimension error", __FUNCTION__); 1110 return -EINVAL; 1111 } 1112 1113 if (dst->w > MAX_DIMENSION || dst->h > MAX_DIMENSION) { 1114 ALOGE("%s : dst dimension error dst w %d h %d", __FUNCTION__, dst->w, 1115 dst->h); 1116 return -EINVAL; 1117 } 1118 1119 if (is_valid_destination_format(dst->format) == COPYBIT_FAILURE) { 1120 ALOGE("%s: Invalid destination format format = 0x%x", __FUNCTION__, 1121 dst->format); 1122 return COPYBIT_FAILURE; 1123 } 1124 1125 int dst_surface_type; 1126 if (ctx->is_dst_ubwc_format) 1127 flags |= FLAGS_UBWC_FORMAT_MODE; 1128 1129 if (is_supported_rgb_format(dst->format) == COPYBIT_SUCCESS) { 1130 dst_surface_type = RGB_SURFACE; 1131 flags |= FLAGS_PREMULTIPLIED_ALPHA; 1132 } else if (is_supported_yuv_format(dst->format) == COPYBIT_SUCCESS) { 1133 int num_planes = get_num_planes(dst->format); 1134 flags |= FLAGS_YUV_DESTINATION; 1135 if (num_planes == 2) { 1136 dst_surface_type = YUV_SURFACE_2_PLANES; 1137 } else if (num_planes == 3) { 1138 dst_surface_type = YUV_SURFACE_3_PLANES; 1139 } else { 1140 ALOGE("%s: dst number of YUV planes is invalid dst format = 0x%x", 1141 __FUNCTION__, dst->format); 1142 return COPYBIT_FAILURE; 1143 } 1144 } else { 1145 ALOGE("%s: Invalid dst surface format 0x%x", __FUNCTION__, 1146 dst->format); 1147 return COPYBIT_FAILURE; 1148 } 1149 1150 if (ctx->blit_rgb_count == MAX_RGB_SURFACES || 1151 ctx->blit_yuv_2_plane_count == MAX_YUV_2_PLANE_SURFACES || 1152 ctx->blit_yuv_3_plane_count == MAX_YUV_2_PLANE_SURFACES || 1153 ctx->blit_count == MAX_BLIT_OBJECT_COUNT || 1154 ctx->dst_surface_type != dst_surface_type) { 1155 // we have reached the max. limits of our internal structures or 1156 // changed the target. 1157 // Draw the remaining surfaces. We need to do the finish here since 1158 // we need to free up the surface templates. 1159 finish_copybit(dev); 1160 } 1161 1162 ctx->dst_surface_type = dst_surface_type; 1163 1164 // Update the destination 1165 copybit_image_t dst_image; 1166 dst_image.w = dst->w; 1167 dst_image.h = dst->h; 1168 dst_image.format = dst->format; 1169 dst_image.handle = dst->handle; 1170 // Check if we need a temp. copy for the destination. We'd need this the destination 1171 // width is not aligned to 32. This case occurs for YUV formats. RGB formats are 1172 // aligned to 32. 1173 bool need_temp_dst = need_temp_buffer(dst); 1174 bufferInfo dst_info; 1175 populate_buffer_info(dst, dst_info); 1176 private_handle_t* dst_hnd = new private_handle_t(-1, 0, 0, 0, dst_info.format, 1177 dst_info.width, dst_info.height); 1178 if (dst_hnd == NULL) { 1179 ALOGE("%s: dst_hnd is null", __FUNCTION__); 1180 return COPYBIT_FAILURE; 1181 } 1182 if (need_temp_dst) { 1183 if (get_size(dst_info) != (int) ctx->temp_dst_buffer.size) { 1184 free_temp_buffer(ctx->temp_dst_buffer); 1185 // Create a temp buffer and set that as the destination. 1186 if (COPYBIT_FAILURE == get_temp_buffer(dst_info, ctx->temp_dst_buffer)) { 1187 ALOGE("%s: get_temp_buffer(dst) failed", __FUNCTION__); 1188 delete_handle(dst_hnd); 1189 return COPYBIT_FAILURE; 1190 } 1191 } 1192 dst_hnd->fd = ctx->temp_dst_buffer.fd; 1193 dst_hnd->size = ctx->temp_dst_buffer.size; 1194 dst_hnd->flags = ctx->temp_dst_buffer.allocType; 1195 dst_hnd->base = (uintptr_t)(ctx->temp_dst_buffer.base); 1196 dst_hnd->offset = ctx->temp_dst_buffer.offset; 1197 dst_hnd->gpuaddr = 0; 1198 dst_image.handle = dst_hnd; 1199 } 1200 if(!ctx->dst_surface_mapped) { 1201 //map the destination surface to GPU address 1202 status = set_image(ctx, ctx->dst[ctx->dst_surface_type], &dst_image, 1203 (eC2DFlags)flags, mapped_dst_idx); 1204 if(status) { 1205 ALOGE("%s: dst: set_image error", __FUNCTION__); 1206 delete_handle(dst_hnd); 1207 unmap_gpuaddr(ctx, mapped_dst_idx); 1208 return COPYBIT_FAILURE; 1209 } 1210 ctx->dst_surface_mapped = true; 1211 ctx->dst_surface_base = dst->base; 1212 } else if(ctx->dst_surface_mapped && ctx->dst_surface_base != dst->base) { 1213 // Destination surface for the operation should be same for multiple 1214 // requests, this check is catch if there is any case when the 1215 // destination changes 1216 ALOGE("%s: a different destination surface!!", __FUNCTION__); 1217 } 1218 1219 // Update the source 1220 flags = 0; 1221 if(is_supported_rgb_format(src->format) == COPYBIT_SUCCESS) { 1222 src_surface_type = RGB_SURFACE; 1223 src_surface = ctx->blit_rgb_object[ctx->blit_rgb_count]; 1224 } else if (is_supported_yuv_format(src->format) == COPYBIT_SUCCESS) { 1225 int num_planes = get_num_planes(src->format); 1226 if (num_planes == 2) { 1227 src_surface_type = YUV_SURFACE_2_PLANES; 1228 src_surface = ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count]; 1229 } else if (num_planes == 3) { 1230 src_surface_type = YUV_SURFACE_3_PLANES; 1231 src_surface = ctx->blit_yuv_3_plane_object[ctx->blit_yuv_2_plane_count]; 1232 } else { 1233 ALOGE("%s: src number of YUV planes is invalid src format = 0x%x", 1234 __FUNCTION__, src->format); 1235 delete_handle(dst_hnd); 1236 unmap_gpuaddr(ctx, mapped_dst_idx); 1237 return -EINVAL; 1238 } 1239 } else { 1240 ALOGE("%s: Invalid source surface format 0x%x", __FUNCTION__, 1241 src->format); 1242 delete_handle(dst_hnd); 1243 unmap_gpuaddr(ctx, mapped_dst_idx); 1244 return -EINVAL; 1245 } 1246 1247 copybit_image_t src_image; 1248 src_image.w = src->w; 1249 src_image.h = src->h; 1250 src_image.format = src->format; 1251 src_image.handle = src->handle; 1252 1253 bool need_temp_src = need_temp_buffer(src); 1254 bufferInfo src_info; 1255 populate_buffer_info(src, src_info); 1256 private_handle_t* src_hnd = new private_handle_t(-1, 0, 0, 0, src_info.format, 1257 src_info.width, src_info.height); 1258 if (NULL == src_hnd) { 1259 ALOGE("%s: src_hnd is null", __FUNCTION__); 1260 delete_handle(dst_hnd); 1261 unmap_gpuaddr(ctx, mapped_dst_idx); 1262 return COPYBIT_FAILURE; 1263 } 1264 if (need_temp_src) { 1265 if (get_size(src_info) != (int) ctx->temp_src_buffer.size) { 1266 free_temp_buffer(ctx->temp_src_buffer); 1267 // Create a temp buffer and set that as the destination. 1268 if (COPYBIT_SUCCESS != get_temp_buffer(src_info, 1269 ctx->temp_src_buffer)) { 1270 ALOGE("%s: get_temp_buffer(src) failed", __FUNCTION__); 1271 delete_handle(dst_hnd); 1272 delete_handle(src_hnd); 1273 unmap_gpuaddr(ctx, mapped_dst_idx); 1274 return COPYBIT_FAILURE; 1275 } 1276 } 1277 src_hnd->fd = ctx->temp_src_buffer.fd; 1278 src_hnd->size = ctx->temp_src_buffer.size; 1279 src_hnd->flags = ctx->temp_src_buffer.allocType; 1280 src_hnd->base = (uintptr_t)(ctx->temp_src_buffer.base); 1281 src_hnd->offset = ctx->temp_src_buffer.offset; 1282 src_hnd->gpuaddr = 0; 1283 src_image.handle = src_hnd; 1284 1285 // Copy the source. 1286 status = copy_image((private_handle_t *)src->handle, &src_image, 1287 CONVERT_TO_C2D_FORMAT); 1288 if (status == COPYBIT_FAILURE) { 1289 ALOGE("%s:copy_image failed in temp source",__FUNCTION__); 1290 delete_handle(dst_hnd); 1291 delete_handle(src_hnd); 1292 unmap_gpuaddr(ctx, mapped_dst_idx); 1293 return status; 1294 } 1295 1296 // Clean the cache 1297 IMemAlloc* memalloc = sAlloc->getAllocator(src_hnd->flags); 1298 if (memalloc->clean_buffer((void *)(src_hnd->base), src_hnd->size, 1299 src_hnd->offset, src_hnd->fd, 1300 gralloc::CACHE_CLEAN)) { 1301 ALOGE("%s: clean_buffer failed", __FUNCTION__); 1302 delete_handle(dst_hnd); 1303 delete_handle(src_hnd); 1304 unmap_gpuaddr(ctx, mapped_dst_idx); 1305 return COPYBIT_FAILURE; 1306 } 1307 } 1308 1309 flags |= (ctx->is_premultiplied_alpha) ? FLAGS_PREMULTIPLIED_ALPHA : 0; 1310 flags |= (ctx->dst_surface_type != RGB_SURFACE) ? FLAGS_YUV_DESTINATION : 0; 1311 flags |= (ctx->is_src_ubwc_format) ? FLAGS_UBWC_FORMAT_MODE : 0; 1312 status = set_image(ctx, src_surface.surface_id, &src_image, 1313 (eC2DFlags)flags, mapped_src_idx); 1314 if(status) { 1315 ALOGE("%s: set_image (src) error", __FUNCTION__); 1316 delete_handle(dst_hnd); 1317 delete_handle(src_hnd); 1318 unmap_gpuaddr(ctx, mapped_dst_idx); 1319 unmap_gpuaddr(ctx, mapped_src_idx); 1320 return COPYBIT_FAILURE; 1321 } 1322 1323 src_surface.config_mask = C2D_NO_ANTIALIASING_BIT | ctx->config_mask; 1324 src_surface.global_alpha = ctx->src_global_alpha; 1325 if (enableBlend) { 1326 if(src_surface.config_mask & C2D_GLOBAL_ALPHA_BIT) { 1327 src_surface.config_mask &= ~C2D_ALPHA_BLEND_NONE; 1328 if(!(src_surface.global_alpha)) { 1329 // src alpha is zero 1330 delete_handle(dst_hnd); 1331 delete_handle(src_hnd); 1332 unmap_gpuaddr(ctx, mapped_dst_idx); 1333 unmap_gpuaddr(ctx, mapped_src_idx); 1334 return COPYBIT_FAILURE; 1335 } 1336 } 1337 } else { 1338 src_surface.config_mask |= C2D_ALPHA_BLEND_NONE; 1339 } 1340 1341 if (src_surface_type == RGB_SURFACE) { 1342 ctx->blit_rgb_object[ctx->blit_rgb_count] = src_surface; 1343 ctx->blit_rgb_count++; 1344 } else if (src_surface_type == YUV_SURFACE_2_PLANES) { 1345 ctx->blit_yuv_2_plane_object[ctx->blit_yuv_2_plane_count] = src_surface; 1346 ctx->blit_yuv_2_plane_count++; 1347 } else { 1348 ctx->blit_yuv_3_plane_object[ctx->blit_yuv_3_plane_count] = src_surface; 1349 ctx->blit_yuv_3_plane_count++; 1350 } 1351 1352 struct copybit_rect_t clip; 1353 while ((status == 0) && region->next(region, &clip)) { 1354 set_rects(ctx, &(src_surface), dst_rect, src_rect, &clip); 1355 if (ctx->blit_count == MAX_BLIT_OBJECT_COUNT) { 1356 ALOGW("Reached end of blit count"); 1357 finish_copybit(dev); 1358 } 1359 ctx->blit_list[ctx->blit_count] = src_surface; 1360 ctx->blit_count++; 1361 } 1362 1363 // Check if we need to perform an early draw-finish. 1364 flags |= (need_temp_dst || need_temp_src) ? FLAGS_TEMP_SRC_DST : 0; 1365 if (need_to_execute_draw((eC2DFlags)flags)) 1366 { 1367 finish_copybit(dev); 1368 } 1369 1370 if (need_temp_dst) { 1371 // copy the temp. destination without the alignment to the actual 1372 // destination. 1373 status = copy_image(dst_hnd, dst, CONVERT_TO_ANDROID_FORMAT); 1374 if (status == COPYBIT_FAILURE) { 1375 ALOGE("%s:copy_image failed in temp Dest",__FUNCTION__); 1376 delete_handle(dst_hnd); 1377 delete_handle(src_hnd); 1378 unmap_gpuaddr(ctx, mapped_dst_idx); 1379 unmap_gpuaddr(ctx, mapped_src_idx); 1380 return status; 1381 } 1382 // Clean the cache. 1383 IMemAlloc* memalloc = sAlloc->getAllocator(dst_hnd->flags); 1384 memalloc->clean_buffer((void *)(dst_hnd->base), dst_hnd->size, 1385 dst_hnd->offset, dst_hnd->fd, 1386 gralloc::CACHE_CLEAN); 1387 } 1388 delete_handle(dst_hnd); 1389 delete_handle(src_hnd); 1390 1391 ctx->is_premultiplied_alpha = false; 1392 ctx->fb_width = 0; 1393 ctx->fb_height = 0; 1394 ctx->config_mask = 0; 1395 return status; 1396 } 1397 1398 static int set_sync_copybit(struct copybit_device_t *dev, 1399 int /*acquireFenceFd*/) 1400 { 1401 if(!dev) 1402 return -EINVAL; 1403 1404 return 0; 1405 } 1406 1407 static int stretch_copybit( 1408 struct copybit_device_t *dev, 1409 struct copybit_image_t const *dst, 1410 struct copybit_image_t const *src, 1411 struct copybit_rect_t const *dst_rect, 1412 struct copybit_rect_t const *src_rect, 1413 struct copybit_region_t const *region) 1414 { 1415 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1416 int status = COPYBIT_SUCCESS; 1417 bool needsBlending = (ctx->src_global_alpha != 0); 1418 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1419 status = stretch_copybit_internal(dev, dst, src, dst_rect, src_rect, 1420 region, needsBlending); 1421 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1422 return status; 1423 } 1424 1425 /** Perform a blit type operation */ 1426 static int blit_copybit( 1427 struct copybit_device_t *dev, 1428 struct copybit_image_t const *dst, 1429 struct copybit_image_t const *src, 1430 struct copybit_region_t const *region) 1431 { 1432 int status = COPYBIT_SUCCESS; 1433 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1434 struct copybit_rect_t dr = { 0, 0, (int)dst->w, (int)dst->h }; 1435 struct copybit_rect_t sr = { 0, 0, (int)src->w, (int)src->h }; 1436 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1437 status = stretch_copybit_internal(dev, dst, src, &dr, &sr, region, false); 1438 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1439 return status; 1440 } 1441 1442 /** Fill the rect on dst with RGBA color **/ 1443 static int fill_color(struct copybit_device_t *dev, 1444 struct copybit_image_t const *dst, 1445 struct copybit_rect_t const *rect, 1446 uint32_t /*color*/) 1447 { 1448 // TODO: Implement once c2d driver supports color fill 1449 if(!dev || !dst || !rect) 1450 return -EINVAL; 1451 1452 return -EINVAL; 1453 } 1454 1455 /*****************************************************************************/ 1456 1457 static void clean_up(copybit_context_t* ctx) 1458 { 1459 void* ret; 1460 if (!ctx) 1461 return; 1462 1463 // stop the wait_cleanup_thread 1464 pthread_mutex_lock(&ctx->wait_cleanup_lock); 1465 ctx->stop_thread = true; 1466 // Signal waiting thread 1467 pthread_cond_signal(&ctx->wait_cleanup_cond); 1468 pthread_mutex_unlock(&ctx->wait_cleanup_lock); 1469 // waits for the cleanup thread to exit 1470 pthread_join(ctx->wait_thread_id, &ret); 1471 pthread_mutex_destroy(&ctx->wait_cleanup_lock); 1472 pthread_cond_destroy (&ctx->wait_cleanup_cond); 1473 1474 for (int i = 0; i < NUM_SURFACE_TYPES; i++) { 1475 if (ctx->dst[i]) 1476 LINK_c2dDestroySurface(ctx->dst[i]); 1477 } 1478 1479 for (int i = 0; i < MAX_RGB_SURFACES; i++) { 1480 if (ctx->blit_rgb_object[i].surface_id) 1481 LINK_c2dDestroySurface(ctx->blit_rgb_object[i].surface_id); 1482 } 1483 1484 for (int i = 0; i < MAX_YUV_2_PLANE_SURFACES; i++) { 1485 if (ctx->blit_yuv_2_plane_object[i].surface_id) 1486 LINK_c2dDestroySurface(ctx->blit_yuv_2_plane_object[i].surface_id); 1487 } 1488 1489 for (int i = 0; i < MAX_YUV_3_PLANE_SURFACES; i++) { 1490 if (ctx->blit_yuv_3_plane_object[i].surface_id) 1491 LINK_c2dDestroySurface(ctx->blit_yuv_3_plane_object[i].surface_id); 1492 } 1493 1494 if (ctx->libc2d2) { 1495 ::dlclose(ctx->libc2d2); 1496 ALOGV("dlclose(libc2d2)"); 1497 } 1498 1499 free(ctx); 1500 } 1501 1502 /** Close the copybit device */ 1503 static int close_copybit(struct hw_device_t *dev) 1504 { 1505 struct copybit_context_t* ctx = (struct copybit_context_t*)dev; 1506 if (ctx) { 1507 free_temp_buffer(ctx->temp_src_buffer); 1508 free_temp_buffer(ctx->temp_dst_buffer); 1509 } 1510 clean_up(ctx); 1511 return 0; 1512 } 1513 1514 /** Open a new instance of a copybit device using name */ 1515 static int open_copybit(const struct hw_module_t* module, const char* name, 1516 struct hw_device_t** device) 1517 { 1518 int status = COPYBIT_SUCCESS; 1519 if (strcmp(name, COPYBIT_HARDWARE_COPYBIT0)) { 1520 return COPYBIT_FAILURE; 1521 } 1522 1523 C2D_RGB_SURFACE_DEF surfDefinition = {0}; 1524 C2D_YUV_SURFACE_DEF yuvSurfaceDef = {0} ; 1525 struct copybit_context_t *ctx; 1526 1527 ctx = (struct copybit_context_t *)malloc(sizeof(struct copybit_context_t)); 1528 if(!ctx) { 1529 ALOGE("%s: malloc failed", __FUNCTION__); 1530 return COPYBIT_FAILURE; 1531 } 1532 1533 /* initialize drawstate */ 1534 memset(ctx, 0, sizeof(*ctx)); 1535 ctx->libc2d2 = ::dlopen("libC2D2.so", RTLD_NOW); 1536 if (!ctx->libc2d2) { 1537 ALOGE("FATAL ERROR: could not dlopen libc2d2.so: %s", dlerror()); 1538 clean_up(ctx); 1539 status = COPYBIT_FAILURE; 1540 *device = NULL; 1541 return status; 1542 } 1543 *(void **)&LINK_c2dCreateSurface = ::dlsym(ctx->libc2d2, 1544 "c2dCreateSurface"); 1545 *(void **)&LINK_c2dUpdateSurface = ::dlsym(ctx->libc2d2, 1546 "c2dUpdateSurface"); 1547 *(void **)&LINK_c2dReadSurface = ::dlsym(ctx->libc2d2, 1548 "c2dReadSurface"); 1549 *(void **)&LINK_c2dDraw = ::dlsym(ctx->libc2d2, "c2dDraw"); 1550 *(void **)&LINK_c2dFlush = ::dlsym(ctx->libc2d2, "c2dFlush"); 1551 *(void **)&LINK_c2dFinish = ::dlsym(ctx->libc2d2, "c2dFinish"); 1552 *(void **)&LINK_c2dWaitTimestamp = ::dlsym(ctx->libc2d2, 1553 "c2dWaitTimestamp"); 1554 *(void **)&LINK_c2dDestroySurface = ::dlsym(ctx->libc2d2, 1555 "c2dDestroySurface"); 1556 *(void **)&LINK_c2dMapAddr = ::dlsym(ctx->libc2d2, 1557 "c2dMapAddr"); 1558 *(void **)&LINK_c2dUnMapAddr = ::dlsym(ctx->libc2d2, 1559 "c2dUnMapAddr"); 1560 *(void **)&LINK_c2dGetDriverCapabilities = ::dlsym(ctx->libc2d2, 1561 "c2dGetDriverCapabilities"); 1562 *(void **)&LINK_c2dCreateFenceFD = ::dlsym(ctx->libc2d2, 1563 "c2dCreateFenceFD"); 1564 *(void **)&LINK_c2dFillSurface = ::dlsym(ctx->libc2d2, 1565 "c2dFillSurface"); 1566 1567 if (!LINK_c2dCreateSurface || !LINK_c2dUpdateSurface || !LINK_c2dReadSurface 1568 || !LINK_c2dDraw || !LINK_c2dFlush || !LINK_c2dWaitTimestamp || 1569 !LINK_c2dFinish || !LINK_c2dDestroySurface || 1570 !LINK_c2dGetDriverCapabilities || !LINK_c2dCreateFenceFD || 1571 !LINK_c2dFillSurface) { 1572 ALOGE("%s: dlsym ERROR", __FUNCTION__); 1573 clean_up(ctx); 1574 status = COPYBIT_FAILURE; 1575 *device = NULL; 1576 return status; 1577 } 1578 1579 ctx->device.common.tag = HARDWARE_DEVICE_TAG; 1580 ctx->device.common.version = 1; 1581 ctx->device.common.module = (hw_module_t*)(module); 1582 ctx->device.common.close = close_copybit; 1583 ctx->device.set_parameter = set_parameter_copybit; 1584 ctx->device.get = get; 1585 ctx->device.blit = blit_copybit; 1586 ctx->device.set_sync = set_sync_copybit; 1587 ctx->device.stretch = stretch_copybit; 1588 ctx->device.finish = finish_copybit; 1589 ctx->device.flush_get_fence = flush_get_fence_copybit; 1590 ctx->device.clear = clear_copybit; 1591 ctx->device.fill_color = fill_color; 1592 1593 /* Create RGB Surface */ 1594 surfDefinition.buffer = (void*)0xdddddddd; 1595 surfDefinition.phys = (void*)0xdddddddd; 1596 surfDefinition.stride = 1 * 4; 1597 surfDefinition.width = 1; 1598 surfDefinition.height = 1; 1599 surfDefinition.format = C2D_COLOR_FORMAT_8888_ARGB; 1600 if (LINK_c2dCreateSurface(&(ctx->dst[RGB_SURFACE]), C2D_TARGET | C2D_SOURCE, 1601 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1602 C2D_SURFACE_WITH_PHYS | 1603 C2D_SURFACE_WITH_PHYS_DUMMY ), 1604 &surfDefinition)) { 1605 ALOGE("%s: create ctx->dst_surface[RGB_SURFACE] failed", __FUNCTION__); 1606 ctx->dst[RGB_SURFACE] = 0; 1607 clean_up(ctx); 1608 status = COPYBIT_FAILURE; 1609 *device = NULL; 1610 return status; 1611 } 1612 1613 unsigned int surface_id = 0; 1614 for (int i = 0; i < MAX_RGB_SURFACES; i++) 1615 { 1616 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1617 (C2D_SURFACE_TYPE)(C2D_SURFACE_RGB_HOST | 1618 C2D_SURFACE_WITH_PHYS | 1619 C2D_SURFACE_WITH_PHYS_DUMMY ), 1620 &surfDefinition)) { 1621 ALOGE("%s: create RGB source surface %d failed", __FUNCTION__, i); 1622 ctx->blit_rgb_object[i].surface_id = 0; 1623 status = COPYBIT_FAILURE; 1624 break; 1625 } else { 1626 ctx->blit_rgb_object[i].surface_id = surface_id; 1627 ALOGW("%s i = %d surface_id=%d", __FUNCTION__, i, 1628 ctx->blit_rgb_object[i].surface_id); 1629 } 1630 } 1631 1632 if (status == COPYBIT_FAILURE) { 1633 clean_up(ctx); 1634 status = COPYBIT_FAILURE; 1635 *device = NULL; 1636 return status; 1637 } 1638 1639 // Create 2 plane YUV surfaces 1640 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_NV12; 1641 yuvSurfaceDef.width = 4; 1642 yuvSurfaceDef.height = 4; 1643 yuvSurfaceDef.plane0 = (void*)0xaaaaaaaa; 1644 yuvSurfaceDef.phys0 = (void*) 0xaaaaaaaa; 1645 yuvSurfaceDef.stride0 = 4; 1646 1647 yuvSurfaceDef.plane1 = (void*)0xaaaaaaaa; 1648 yuvSurfaceDef.phys1 = (void*) 0xaaaaaaaa; 1649 yuvSurfaceDef.stride1 = 4; 1650 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_2_PLANES]), 1651 C2D_TARGET | C2D_SOURCE, 1652 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1653 C2D_SURFACE_WITH_PHYS | 1654 C2D_SURFACE_WITH_PHYS_DUMMY), 1655 &yuvSurfaceDef)) { 1656 ALOGE("%s: create ctx->dst[YUV_SURFACE_2_PLANES] failed", __FUNCTION__); 1657 ctx->dst[YUV_SURFACE_2_PLANES] = 0; 1658 clean_up(ctx); 1659 status = COPYBIT_FAILURE; 1660 *device = NULL; 1661 return status; 1662 } 1663 1664 for (int i=0; i < MAX_YUV_2_PLANE_SURFACES; i++) 1665 { 1666 if (LINK_c2dCreateSurface(&surface_id, C2D_TARGET | C2D_SOURCE, 1667 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1668 C2D_SURFACE_WITH_PHYS | 1669 C2D_SURFACE_WITH_PHYS_DUMMY ), 1670 &yuvSurfaceDef)) { 1671 ALOGE("%s: create YUV source %d failed", __FUNCTION__, i); 1672 ctx->blit_yuv_2_plane_object[i].surface_id = 0; 1673 status = COPYBIT_FAILURE; 1674 break; 1675 } else { 1676 ctx->blit_yuv_2_plane_object[i].surface_id = surface_id; 1677 ALOGW("%s: 2 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1678 ctx->blit_yuv_2_plane_object[i].surface_id); 1679 } 1680 } 1681 1682 if (status == COPYBIT_FAILURE) { 1683 clean_up(ctx); 1684 status = COPYBIT_FAILURE; 1685 *device = NULL; 1686 return status; 1687 } 1688 1689 // Create YUV 3 plane surfaces 1690 yuvSurfaceDef.format = C2D_COLOR_FORMAT_420_YV12; 1691 yuvSurfaceDef.plane2 = (void*)0xaaaaaaaa; 1692 yuvSurfaceDef.phys2 = (void*) 0xaaaaaaaa; 1693 yuvSurfaceDef.stride2 = 4; 1694 1695 if (LINK_c2dCreateSurface(&(ctx->dst[YUV_SURFACE_3_PLANES]), 1696 C2D_TARGET | C2D_SOURCE, 1697 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1698 C2D_SURFACE_WITH_PHYS | 1699 C2D_SURFACE_WITH_PHYS_DUMMY), 1700 &yuvSurfaceDef)) { 1701 ALOGE("%s: create ctx->dst[YUV_SURFACE_3_PLANES] failed", __FUNCTION__); 1702 ctx->dst[YUV_SURFACE_3_PLANES] = 0; 1703 clean_up(ctx); 1704 status = COPYBIT_FAILURE; 1705 *device = NULL; 1706 return status; 1707 } 1708 1709 for (int i=0; i < MAX_YUV_3_PLANE_SURFACES; i++) 1710 { 1711 if (LINK_c2dCreateSurface(&(surface_id), 1712 C2D_TARGET | C2D_SOURCE, 1713 (C2D_SURFACE_TYPE)(C2D_SURFACE_YUV_HOST | 1714 C2D_SURFACE_WITH_PHYS | 1715 C2D_SURFACE_WITH_PHYS_DUMMY), 1716 &yuvSurfaceDef)) { 1717 ALOGE("%s: create 3 plane YUV surface %d failed", __FUNCTION__, i); 1718 ctx->blit_yuv_3_plane_object[i].surface_id = 0; 1719 status = COPYBIT_FAILURE; 1720 break; 1721 } else { 1722 ctx->blit_yuv_3_plane_object[i].surface_id = surface_id; 1723 ALOGW("%s: 3 Plane YUV i=%d surface_id=%d", __FUNCTION__, i, 1724 ctx->blit_yuv_3_plane_object[i].surface_id); 1725 } 1726 } 1727 1728 if (status == COPYBIT_FAILURE) { 1729 clean_up(ctx); 1730 status = COPYBIT_FAILURE; 1731 *device = NULL; 1732 return status; 1733 } 1734 1735 if (LINK_c2dGetDriverCapabilities(&(ctx->c2d_driver_info))) { 1736 ALOGE("%s: LINK_c2dGetDriverCapabilities failed", __FUNCTION__); 1737 clean_up(ctx); 1738 status = COPYBIT_FAILURE; 1739 *device = NULL; 1740 return status; 1741 } 1742 // Initialize context variables. 1743 ctx->trg_transform = C2D_TARGET_ROTATE_0; 1744 1745 ctx->temp_src_buffer.fd = -1; 1746 ctx->temp_src_buffer.base = 0; 1747 ctx->temp_src_buffer.size = 0; 1748 1749 ctx->temp_dst_buffer.fd = -1; 1750 ctx->temp_dst_buffer.base = 0; 1751 ctx->temp_dst_buffer.size = 0; 1752 1753 ctx->fb_width = 0; 1754 ctx->fb_height = 0; 1755 1756 ctx->blit_rgb_count = 0; 1757 ctx->blit_yuv_2_plane_count = 0; 1758 ctx->blit_yuv_3_plane_count = 0; 1759 ctx->blit_count = 0; 1760 1761 ctx->wait_timestamp = false; 1762 ctx->stop_thread = false; 1763 pthread_mutex_init(&(ctx->wait_cleanup_lock), NULL); 1764 pthread_cond_init(&(ctx->wait_cleanup_cond), NULL); 1765 /* Start the wait thread */ 1766 pthread_attr_t attr; 1767 pthread_attr_init(&attr); 1768 pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_JOINABLE); 1769 1770 pthread_create(&ctx->wait_thread_id, &attr, &c2d_wait_loop, 1771 (void *)ctx); 1772 pthread_attr_destroy(&attr); 1773 1774 *device = &ctx->device.common; 1775 return status; 1776 } 1777
