1 /* 2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, are permitted 5 * provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright notice, this list of 7 * conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright notice, this list of 9 * conditions and the following disclaimer in the documentation and/or other materials provided 10 * with the distribution. 11 * * Neither the name of The Linux Foundation nor the names of its contributors may be used to 12 * endorse or promote products derived from this software without specific prior written 13 * permission. 14 * 15 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 22 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #ifndef __HW_INFO_TYPES_H__ 26 #define __HW_INFO_TYPES_H__ 27 28 #include <stdint.h> 29 #include <core/display_interface.h> 30 #include <core/core_interface.h> 31 #include <vector> 32 #include <map> 33 #include <string> 34 #include <bitset> 35 36 namespace sdm { 37 using std::string; 38 39 const int kMaxSDELayers = 16; // Maximum number of layers that can be handled by hardware in a 40 // given layer stack. 41 #define MAX_PLANES 4 42 43 #define MAX_DETAIL_ENHANCE_CURVE 3 44 45 enum HWDeviceType { 46 kDevicePrimary, 47 kDeviceHDMI, 48 kDeviceVirtual, 49 kDeviceRotator, 50 kDeviceMax, 51 }; 52 53 enum HWBlockType { 54 kHWPrimary, 55 kHWHDMI, 56 kHWWriteback0, 57 kHWWriteback1, 58 kHWWriteback2, 59 kHWBlockMax 60 }; 61 62 enum HWDisplayMode { 63 kModeDefault, 64 kModeVideo, 65 kModeCommand, 66 }; 67 68 enum PipeType { 69 kPipeTypeUnused, 70 kPipeTypeVIG, 71 kPipeTypeRGB, 72 kPipeTypeDMA, 73 kPipeTypeCursor, 74 }; 75 76 enum HWSubBlockType { 77 kHWVIGPipe, 78 kHWRGBPipe, 79 kHWDMAPipe, 80 kHWCursorPipe, 81 kHWRotatorInput, 82 kHWRotatorOutput, 83 kHWWBIntfOutput, 84 kHWDestinationScalar, 85 kHWSubBlockMax, 86 }; 87 88 enum HWAlphaInterpolation { 89 kInterpolationPixelRepeat, 90 kInterpolationBilinear, 91 kInterpolationMax, 92 }; 93 94 enum HWBlendingFilter { 95 kBlendFilterCircular, 96 kBlendFilterSeparable, 97 kBlendFilterMax, 98 }; 99 100 enum HWPipeFlags { 101 kIGC = 0x01, 102 kMultiRect = 0x02, 103 kMultiRectParallelMode = 0x04, 104 }; 105 106 enum HWAVRModes { 107 kContinuousMode, // Mode to enable AVR feature for every frame. 108 kOneShotMode, // Mode to enable AVR feature for particular frame. 109 }; 110 111 typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap; 112 113 struct HWDynBwLimitInfo { 114 uint32_t cur_mode = kBwDefault; 115 uint32_t total_bw_limit[kBwModeMax] = { 0 }; 116 uint32_t pipe_bw_limit[kBwModeMax] = { 0 }; 117 }; 118 119 struct HWPipeCaps { 120 PipeType type = kPipeTypeUnused; 121 uint32_t id = 0; 122 uint32_t max_rects = 1; 123 }; 124 125 struct HWRotatorInfo { 126 enum { ROT_TYPE_MDSS, ROT_TYPE_V4L2 }; 127 uint32_t type = ROT_TYPE_MDSS; 128 uint32_t num_rotator = 0; 129 bool has_downscale = false; 130 std::string device_path = ""; 131 float min_downscale = 2.0f; 132 bool downscale_compression = false; 133 134 void Reset() { *this = HWRotatorInfo(); } 135 }; 136 137 struct HWDestScalarInfo { 138 uint32_t count = 0; 139 uint32_t max_input_width = 0; 140 uint32_t max_output_width = 0; 141 uint32_t max_scale_up = 1; 142 }; 143 144 struct HWResourceInfo { 145 uint32_t hw_version = 0; 146 uint32_t hw_revision = 0; 147 uint32_t num_dma_pipe = 0; 148 uint32_t num_vig_pipe = 0; 149 uint32_t num_rgb_pipe = 0; 150 uint32_t num_cursor_pipe = 0; 151 uint32_t num_blending_stages = 0; 152 uint32_t num_control = 0; 153 uint32_t num_mixer_to_disp = 0; 154 uint32_t smp_total = 0; 155 uint32_t smp_size = 0; 156 uint32_t num_smp_per_pipe = 0; 157 uint32_t max_scale_up = 1; 158 uint32_t max_scale_down = 1; 159 uint64_t max_bandwidth_low = 0; 160 uint64_t max_bandwidth_high = 0; 161 uint32_t max_mixer_width = 2048; 162 uint32_t max_pipe_width = 2048; 163 uint32_t max_cursor_size = 0; 164 uint32_t max_pipe_bw = 0; 165 uint32_t max_sde_clk = 0; 166 float clk_fudge_factor = 1.0f; 167 uint32_t macrotile_nv12_factor = 0; 168 uint32_t macrotile_factor = 0; 169 uint32_t linear_factor = 0; 170 uint32_t scale_factor = 0; 171 uint32_t extra_fudge_factor = 0; 172 uint32_t amortizable_threshold = 0; 173 uint32_t system_overhead_lines = 0; 174 bool has_bwc = false; 175 bool has_ubwc = false; 176 bool has_decimation = false; 177 bool has_macrotile = false; 178 bool has_non_scalar_rgb = false; 179 bool is_src_split = false; 180 bool perf_calc = false; 181 bool has_dyn_bw_support = false; 182 bool separate_rotator = false; 183 bool has_qseed3 = false; 184 bool has_concurrent_writeback = false; 185 bool has_ppp = false; 186 uint32_t writeback_index = kHWBlockMax; 187 HWDynBwLimitInfo dyn_bw_info; 188 std::vector<HWPipeCaps> hw_pipes; 189 FormatsMap supported_formats_map; 190 HWRotatorInfo hw_rot_info; 191 HWDestScalarInfo hw_dest_scalar_info; 192 bool has_avr = false; 193 bool has_hdr = false; 194 195 void Reset() { *this = HWResourceInfo(); } 196 }; 197 198 struct HWSplitInfo { 199 uint32_t left_split = 0; 200 uint32_t right_split = 0; 201 202 bool operator !=(const HWSplitInfo &split_info) { 203 return ((left_split != split_info.left_split) || (right_split != split_info.right_split)); 204 } 205 206 bool operator ==(const HWSplitInfo &split_info) { 207 return !(operator !=(split_info)); 208 } 209 }; 210 211 enum HWS3DMode { 212 kS3DModeNone, 213 kS3DModeLR, 214 kS3DModeRL, 215 kS3DModeTB, 216 kS3DModeFP, 217 kS3DModeMax, 218 }; 219 220 struct HWColorPrimaries { 221 uint32_t white_point[2] = {}; // White point 222 uint32_t red[2] = {}; // Red color primary 223 uint32_t green[2] = {}; // Green color primary 224 uint32_t blue[2] = {}; // Blue color primary 225 }; 226 227 struct HWPanelOrientation { 228 bool rotation = false; 229 bool flip_horizontal = false; 230 bool flip_vertical = false; 231 }; 232 233 struct HWPanelInfo { 234 DisplayPort port = kPortDefault; // Display port 235 HWDisplayMode mode = kModeDefault; // Display mode 236 bool partial_update = false; // Partial update feature 237 int left_align = 1; // ROI left alignment restriction 238 int width_align = 1; // ROI width alignment restriction 239 int top_align = 1; // ROI top alignment restriction 240 int height_align = 1; // ROI height alignment restriction 241 int min_roi_width = 1; // Min width needed for ROI 242 int min_roi_height = 1; // Min height needed for ROI 243 bool needs_roi_merge = false; // Merge ROI's of both the DSI's 244 bool dynamic_fps = false; // Panel Supports dynamic fps 245 bool dfps_porch_mode = false; // dynamic fps VFP or HFP mode 246 bool ping_pong_split = false; // Supports Ping pong split 247 uint32_t min_fps = 0; // Min fps supported by panel 248 uint32_t max_fps = 0; // Max fps supported by panel 249 bool is_primary_panel = false; // Panel is primary display 250 bool is_pluggable = false; // Panel is pluggable 251 HWSplitInfo split_info; // Panel split configuration 252 char panel_name[256] = {0}; // Panel name 253 HWS3DMode s3d_mode = kS3DModeNone; // Panel's current s3d mode. 254 int panel_max_brightness = 0; // Max panel brightness 255 uint32_t left_roi_count = 1; // Number if ROI supported on left panel 256 uint32_t right_roi_count = 1; // Number if ROI supported on right panel 257 bool hdr_enabled = false; // HDR feature supported 258 uint32_t peak_luminance = 0; // Panel's peak luminance level 259 uint32_t average_luminance = 0; // Panel's average luminance level 260 uint32_t blackness_level = 0; // Panel's blackness level 261 HWColorPrimaries primaries = {}; // WRGB color primaries 262 HWPanelOrientation panel_orientation = {}; // Panel Orientation 263 264 bool operator !=(const HWPanelInfo &panel_info) { 265 return ((port != panel_info.port) || (mode != panel_info.mode) || 266 (partial_update != panel_info.partial_update) || 267 (left_align != panel_info.left_align) || (width_align != panel_info.width_align) || 268 (top_align != panel_info.top_align) || (height_align != panel_info.height_align) || 269 (min_roi_width != panel_info.min_roi_width) || 270 (min_roi_height != panel_info.min_roi_height) || 271 (needs_roi_merge != panel_info.needs_roi_merge) || 272 (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) || 273 (dfps_porch_mode != panel_info.dfps_porch_mode) || 274 (ping_pong_split != panel_info.ping_pong_split) || 275 (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) || 276 (split_info != panel_info.split_info) || (s3d_mode != panel_info.s3d_mode) || 277 (left_roi_count != panel_info.left_roi_count) || 278 (right_roi_count != panel_info.right_roi_count)); 279 } 280 281 bool operator ==(const HWPanelInfo &panel_info) { 282 return !(operator !=(panel_info)); 283 } 284 }; 285 286 struct HWSessionConfig { 287 LayerRect src_rect; 288 LayerRect dst_rect; 289 uint32_t buffer_count = 0; 290 bool secure = false; 291 uint32_t frame_rate = 0; 292 LayerTransform transform; 293 bool secure_camera = false; 294 295 bool operator==(const HWSessionConfig& config) const { 296 return (src_rect == config.src_rect && 297 dst_rect == config.dst_rect && 298 buffer_count == config.buffer_count && 299 secure == config.secure && 300 frame_rate == config.frame_rate && 301 transform == config.transform && 302 secure_camera == config.secure_camera); 303 } 304 305 bool operator!=(const HWSessionConfig& config) const { 306 return !operator==(config); 307 } 308 }; 309 310 struct HWRotateInfo { 311 int pipe_id = -1; // Not actual pipe id, but the relative DMA id 312 int writeback_id = -1; // Writeback block id, but this is the same as DMA id 313 LayerRect src_roi; // Source crop of each split 314 LayerRect dst_roi; // Destination crop of each split 315 bool valid = false; 316 int rotate_id = -1; // Actual rotator session id with driver 317 318 void Reset() { *this = HWRotateInfo(); } 319 }; 320 321 struct HWRotatorSession { 322 HWRotateInfo hw_rotate_info[kMaxRotatePerLayer]; 323 uint32_t hw_block_count = 0; // number of rotator hw blocks used by rotator session 324 int session_id = -1; // A handle with Session Manager 325 HWSessionConfig hw_session_config; 326 LayerBuffer input_buffer; // Input to rotator 327 LayerBuffer output_buffer; // Output of rotator, crop width and stride are same 328 float input_compression = 1.0f; 329 float output_compression = 1.0f; 330 bool is_buffer_cached = false; 331 }; 332 333 struct HWScaleLutInfo { 334 uint32_t dir_lut_size = 0; 335 uint32_t cir_lut_size = 0; 336 uint32_t sep_lut_size = 0; 337 uint64_t dir_lut = 0; 338 uint64_t cir_lut = 0; 339 uint64_t sep_lut = 0; 340 }; 341 342 struct HWDetailEnhanceData : DisplayDetailEnhancerData { 343 uint16_t prec_shift = 0; 344 int16_t adjust_a[MAX_DETAIL_ENHANCE_CURVE] = {0}; 345 int16_t adjust_b[MAX_DETAIL_ENHANCE_CURVE] = {0}; 346 int16_t adjust_c[MAX_DETAIL_ENHANCE_CURVE] = {0}; 347 }; 348 349 struct HWPixelExtension { 350 int32_t extension = 0; // Number of pixels extension in left, right, top and bottom directions 351 // for all color components. This pixel value for each color component 352 // should be sum of fetch and repeat pixels. 353 354 int32_t overfetch = 0; // Number of pixels need to be overfetched in left, right, top and bottom 355 // directions from source image for scaling. 356 357 int32_t repeat = 0; // Number of pixels need to be repeated in left, right, top and bottom 358 // directions for scaling. 359 }; 360 361 struct HWPlane { 362 int32_t init_phase_x = 0; 363 int32_t phase_step_x = 0; 364 int32_t init_phase_y = 0; 365 int32_t phase_step_y = 0; 366 HWPixelExtension left; 367 HWPixelExtension top; 368 HWPixelExtension right; 369 HWPixelExtension bottom; 370 uint32_t roi_width = 0; 371 int32_t preload_x = 0; 372 int32_t preload_y = 0; 373 uint32_t src_width = 0; 374 uint32_t src_height = 0; 375 }; 376 377 struct HWScaleData { 378 struct enable { 379 uint8_t scale = 0; 380 uint8_t direction_detection = 0; 381 uint8_t detail_enhance = 0; 382 } enable; 383 uint32_t dst_width = 0; 384 uint32_t dst_height = 0; 385 HWPlane plane[MAX_PLANES]; 386 // scale_v2_data fields 387 ScalingFilterConfig y_rgb_filter_cfg = kFilterEdgeDirected; 388 ScalingFilterConfig uv_filter_cfg = kFilterEdgeDirected; 389 HWAlphaInterpolation alpha_filter_cfg = kInterpolationPixelRepeat; 390 HWBlendingFilter blend_cfg = kBlendFilterCircular; 391 392 struct lut_flags { 393 uint8_t lut_swap = 0; 394 uint8_t lut_dir_wr = 0; 395 uint8_t lut_y_cir_wr = 0; 396 uint8_t lut_uv_cir_wr = 0; 397 uint8_t lut_y_sep_wr = 0; 398 uint8_t lut_uv_sep_wr = 0; 399 } lut_flag; 400 401 uint32_t dir_lut_idx = 0; 402 /* for Y(RGB) and UV planes*/ 403 uint32_t y_rgb_cir_lut_idx = 0; 404 uint32_t uv_cir_lut_idx = 0; 405 uint32_t y_rgb_sep_lut_idx = 0; 406 uint32_t uv_sep_lut_idx = 0; 407 408 HWDetailEnhanceData detail_enhance; 409 }; 410 411 struct HWDestScaleInfo { 412 uint32_t mixer_width = 0; 413 uint32_t mixer_height = 0; 414 bool scale_update = false; 415 HWScaleData scale_data = {}; 416 LayerRect panel_roi = {}; 417 }; 418 419 typedef std::map<uint32_t, HWDestScaleInfo *> DestScaleInfoMap; 420 421 struct HWAVRInfo { 422 bool enable = false; // Flag to Enable AVR feature 423 HWAVRModes mode = kContinuousMode; // Specifies the AVR mode 424 }; 425 426 struct HWPipeInfo { 427 uint32_t pipe_id = 0; 428 HWSubBlockType sub_block_type = kHWSubBlockMax; 429 LayerRect src_roi; 430 LayerRect dst_roi; 431 uint8_t horizontal_decimation = 0; 432 uint8_t vertical_decimation = 0; 433 HWScaleData scale_data; 434 uint32_t z_order = 0; 435 uint8_t flags = 0; 436 bool valid = false; 437 438 void Reset() { *this = HWPipeInfo(); } 439 }; 440 441 struct HWLayerConfig { 442 HWPipeInfo left_pipe; // pipe for left side of output 443 HWPipeInfo right_pipe; // pipe for right side of output 444 HWRotatorSession hw_rotator_session; 445 float compression = 1.0f; 446 447 void Reset() { *this = HWLayerConfig(); } 448 }; 449 450 struct HWHDRLayerInfo { 451 enum HDROperation { 452 kNoOp, // No-op. 453 kSet, // Sets the HDR MetaData - Start of HDR 454 kReset, // resets the previously set HDR Metadata, End of HDR 455 }; 456 457 int32_t layer_index = -1; 458 HDROperation operation = kNoOp; 459 }; 460 461 struct HWLayersInfo { 462 LayerStack *stack = NULL; // Input layer stack. Set by the caller. 463 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0. 464 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present. 465 466 std::vector<Layer> hw_layers = {}; // Layers which need to be programmed on the HW 467 468 uint32_t index[kMaxSDELayers] = {}; // Indexes of the layers from the layer stack which need to 469 // be programmed on hardware. 470 uint32_t roi_index[kMaxSDELayers] = {0}; // Stores the ROI index where the layers are visible. 471 472 int sync_handle = -1; // Release fence id for current draw cycle. 473 int set_idle_time_ms = -1; // Set idle time to the new specified value. 474 // -1 indicates no change in idle time since last set value. 475 476 std::vector<LayerRect> left_frame_roi = {}; // Left ROI. 477 std::vector<LayerRect> right_frame_roi = {}; // Right ROI. 478 LayerRect partial_fb_roi = {}; // Damaged area in framebuffer. 479 480 bool roi_split = false; // Indicates separated left and right ROI 481 482 bool use_hw_cursor = false; // Indicates that HWCursor pipe needs to be used for cursor layer 483 DestScaleInfoMap dest_scale_info_map = {}; 484 HWHDRLayerInfo hdr_layer_info = {}; 485 }; 486 487 struct HWLayers { 488 HWLayersInfo info; 489 HWLayerConfig config[kMaxSDELayers]; 490 float output_compression = 1.0f; 491 uint32_t bandwidth = 0; 492 uint32_t clock = 0; 493 HWAVRInfo hw_avr_info = {}; 494 }; 495 496 struct HWDisplayAttributes : DisplayConfigVariableInfo { 497 bool is_device_split = false; 498 uint32_t v_front_porch = 0; //!< Vertical front porch of panel 499 uint32_t v_back_porch = 0; //!< Vertical back porch of panel 500 uint32_t v_pulse_width = 0; //!< Vertical pulse width of panel 501 uint32_t h_total = 0; //!< Total width of panel (hActive + hFP + hBP + hPulseWidth) 502 uint32_t v_total = 0; //!< Total height of panel (vActive + vFP + vBP + vPulseWidth) 503 std::bitset<32> s3d_config; //!< Stores the bit mask of S3D modes 504 505 void Reset() { *this = HWDisplayAttributes(); } 506 507 bool operator !=(const HWDisplayAttributes &display_attributes) { 508 return ((is_device_split != display_attributes.is_device_split) || 509 (x_pixels != display_attributes.x_pixels) || 510 (y_pixels != display_attributes.y_pixels) || 511 (x_dpi != display_attributes.x_dpi) || 512 (y_dpi != display_attributes.y_dpi) || 513 (fps != display_attributes.fps) || 514 (vsync_period_ns != display_attributes.vsync_period_ns) || 515 (v_front_porch != display_attributes.v_front_porch) || 516 (v_back_porch != display_attributes.v_back_porch) || 517 (v_pulse_width != display_attributes.v_pulse_width) || 518 (h_total != display_attributes.h_total) || 519 (is_yuv != display_attributes.is_yuv)); 520 } 521 522 bool operator ==(const HWDisplayAttributes &display_attributes) { 523 return !(operator !=(display_attributes)); 524 } 525 }; 526 527 struct HWMixerAttributes { 528 uint32_t width = 0; // Layer mixer width 529 uint32_t height = 0; // Layer mixer height 530 uint32_t split_left = 0; 531 LayerBufferFormat output_format = kFormatRGB101010; // Layer mixer output format 532 533 bool operator !=(const HWMixerAttributes &mixer_attributes) { 534 return ((width != mixer_attributes.width) || 535 (height != mixer_attributes.height) || 536 (output_format != mixer_attributes.output_format) || 537 (split_left != mixer_attributes.split_left)); 538 } 539 540 bool operator ==(const HWMixerAttributes &mixer_attributes) { 541 return !(operator !=(mixer_attributes)); 542 } 543 544 bool IsValid() { 545 return (width > 0 && height > 0); 546 } 547 }; 548 549 } // namespace sdm 550 551 #endif // __HW_INFO_TYPES_H__ 552 553
