1 /* include/linux/msm_mdp.h 2 * 3 * Copyright (C) 2007 Google Incorporated 4 * Copyright (c) 2012-2013 The Linux Foundation. All rights reserved. 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 #ifndef _MSM_MDP_H_ 16 #define _MSM_MDP_H_ 17 18 #include <linux/types.h> 19 #include <linux/fb.h> 20 21 #define MSMFB_IOCTL_MAGIC 'm' 22 #define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int) 23 #define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int) 24 #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int) 25 #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int) 26 #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor) 27 #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap) 28 #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data) 29 /* new ioctls's for set/get ccs matrix */ 30 #define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs) 31 #define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs) 32 #define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, \ 33 struct mdp_overlay) 34 #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) 35 36 #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, \ 37 struct msmfb_overlay_data) 38 #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY 39 40 #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \ 41 struct mdp_page_protection) 42 #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \ 43 struct mdp_page_protection) 44 #define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, \ 45 struct mdp_overlay) 46 #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) 47 #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, \ 48 struct msmfb_overlay_blt) 49 #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) 50 #define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, \ 51 struct mdp_histogram_start_req) 52 #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) 53 #define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int) 54 55 #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, \ 56 struct msmfb_overlay_3d) 57 58 #define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \ 59 struct msmfb_mixer_info_req) 60 #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \ 61 struct msmfb_overlay_data) 62 #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) 63 #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) 64 #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152) 65 #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \ 66 struct msmfb_data) 67 #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \ 68 struct msmfb_data) 69 #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) 70 #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) 71 #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) 72 #define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int) 73 #define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync) 74 #define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, \ 75 struct mdp_display_commit) 76 #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 165, \ 77 unsigned int) 78 #define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata) 79 80 #define FB_TYPE_3D_PANEL 0x10101010 81 #define MDP_IMGTYPE2_START 0x10000 82 #define MSMFB_DRIVER_VERSION 0xF9E8D701 83 84 enum { 85 NOTIFY_UPDATE_START, 86 NOTIFY_UPDATE_STOP, 87 }; 88 89 enum { 90 MDP_RGB_565, /* RGB 565 planer */ 91 MDP_XRGB_8888, /* RGB 888 padded */ 92 MDP_Y_CBCR_H2V2, /* Y and CbCr, pseudo planer w/ Cb is in MSB */ 93 MDP_Y_CBCR_H2V2_ADRENO, 94 MDP_ARGB_8888, /* ARGB 888 */ 95 MDP_RGB_888, /* RGB 888 planer */ 96 MDP_Y_CRCB_H2V2, /* Y and CrCb, pseudo planer w/ Cr is in MSB */ 97 MDP_YCRYCB_H2V1, /* YCrYCb interleave */ 98 MDP_Y_CRCB_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 99 MDP_Y_CBCR_H2V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 100 MDP_Y_CRCB_H1V2, 101 MDP_Y_CBCR_H1V2, 102 MDP_RGBA_8888, /* ARGB 888 */ 103 MDP_BGRA_8888, /* ABGR 888 */ 104 MDP_RGBX_8888, /* RGBX 888 */ 105 MDP_Y_CRCB_H2V2_TILE, /* Y and CrCb, pseudo planer tile */ 106 MDP_Y_CBCR_H2V2_TILE, /* Y and CbCr, pseudo planer tile */ 107 MDP_Y_CR_CB_H2V2, /* Y, Cr and Cb, planar */ 108 MDP_Y_CR_CB_GH2V2, /* Y, Cr and Cb, planar aligned to Android YV12 */ 109 MDP_Y_CB_CR_H2V2, /* Y, Cb and Cr, planar */ 110 MDP_Y_CRCB_H1V1, /* Y and CrCb, pseduo planer w/ Cr is in MSB */ 111 MDP_Y_CBCR_H1V1, /* Y and CbCr, pseduo planer w/ Cb is in MSB */ 112 MDP_YCRCB_H1V1, /* YCrCb interleave */ 113 MDP_YCBCR_H1V1, /* YCbCr interleave */ 114 MDP_BGR_565, /* BGR 565 planer */ 115 MDP_IMGTYPE_LIMIT, 116 MDP_RGB_BORDERFILL, /* border fill pipe */ 117 MDP_FB_FORMAT = MDP_IMGTYPE2_START, /* framebuffer format */ 118 MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */ 119 }; 120 121 enum { 122 PMEM_IMG, 123 FB_IMG, 124 }; 125 126 enum { 127 HSIC_HUE = 0, 128 HSIC_SAT, 129 HSIC_INT, 130 HSIC_CON, 131 NUM_HSIC_PARAM, 132 }; 133 134 #define MDSS_MDP_ROT_ONLY 0x80 135 #define MDSS_MDP_RIGHT_MIXER 0x100 136 137 /* mdp_blit_req flag values */ 138 #define MDP_ROT_NOP 0 139 #define MDP_FLIP_LR 0x1 140 #define MDP_FLIP_UD 0x2 141 #define MDP_ROT_90 0x4 142 #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) 143 #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) 144 #define MDP_DITHER 0x8 145 #define MDP_BLUR 0x10 146 #define MDP_BLEND_FG_PREMULT 0x20000 147 #define MDP_DEINTERLACE 0x80000000 148 #define MDP_SHARPENING 0x40000000 149 #define MDP_NO_DMA_BARRIER_START 0x20000000 150 #define MDP_NO_DMA_BARRIER_END 0x10000000 151 #define MDP_NO_BLIT 0x08000000 152 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000 153 #define MDP_BLIT_WITH_NO_DMA_BARRIERS \ 154 (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) 155 #define MDP_BLIT_SRC_GEM 0x04000000 156 #define MDP_BLIT_DST_GEM 0x02000000 157 #define MDP_BLIT_NON_CACHED 0x01000000 158 #define MDP_OV_PIPE_SHARE 0x00800000 159 #define MDP_DEINTERLACE_ODD 0x00400000 160 #define MDP_OV_PLAY_NOWAIT 0x00200000 161 #define MDP_SOURCE_ROTATED_90 0x00100000 162 #define MDP_OVERLAY_PP_CFG_EN 0x00080000 163 #define MDP_BACKEND_COMPOSITION 0x00040000 164 #define MDP_BORDERFILL_SUPPORTED 0x00010000 165 #define MDP_SECURE_OVERLAY_SESSION 0x00008000 166 #define MDP_MEMORY_ID_TYPE_FB 0x00001000 167 168 #define MDP_TRANSP_NOP 0xffffffff 169 #define MDP_ALPHA_NOP 0xff 170 171 #define MDP_FB_PAGE_PROTECTION_NONCACHED (0) 172 #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) 173 #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) 174 #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) 175 #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) 176 /* Sentinel: Don't use! */ 177 #define MDP_FB_PAGE_PROTECTION_INVALID (5) 178 /* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */ 179 #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) 180 181 struct mdp_rect { 182 uint32_t x; 183 uint32_t y; 184 uint32_t w; 185 uint32_t h; 186 }; 187 188 struct mdp_img { 189 uint32_t width; 190 uint32_t height; 191 uint32_t format; 192 uint32_t offset; 193 int memory_id; /* the file descriptor */ 194 uint32_t priv; 195 }; 196 197 /* 198 * {3x3} + {3} ccs matrix 199 */ 200 201 #define MDP_CCS_RGB2YUV 0 202 #define MDP_CCS_YUV2RGB 1 203 204 #define MDP_CCS_SIZE 9 205 #define MDP_BV_SIZE 3 206 207 struct mdp_ccs { 208 int direction; /* MDP_CCS_RGB2YUV or YUV2RGB */ 209 uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */ 210 uint16_t bv[MDP_BV_SIZE]; /* 1x3 bias vector */ 211 }; 212 213 struct mdp_csc { 214 int id; 215 uint32_t csc_mv[9]; 216 uint32_t csc_pre_bv[3]; 217 uint32_t csc_post_bv[3]; 218 uint32_t csc_pre_lv[6]; 219 uint32_t csc_post_lv[6]; 220 }; 221 222 /* The version of the mdp_blit_req structure so that 223 * user applications can selectively decide which functionality 224 * to include 225 */ 226 227 #define MDP_BLIT_REQ_VERSION 2 228 229 struct mdp_blit_req { 230 struct mdp_img src; 231 struct mdp_img dst; 232 struct mdp_rect src_rect; 233 struct mdp_rect dst_rect; 234 uint32_t alpha; 235 uint32_t transp_mask; 236 uint32_t flags; 237 int sharpening_strength; /* -127 <--> 127, default 64 */ 238 }; 239 240 struct mdp_blit_req_list { 241 uint32_t count; 242 struct mdp_blit_req req[]; 243 }; 244 245 #define MSMFB_DATA_VERSION 2 246 247 struct msmfb_data { 248 uint32_t offset; 249 int memory_id; 250 int id; 251 uint32_t flags; 252 uint32_t priv; 253 uint32_t iova; 254 }; 255 256 #define MSMFB_NEW_REQUEST -1 257 258 struct msmfb_overlay_data { 259 uint32_t id; 260 struct msmfb_data data; 261 uint32_t version_key; 262 struct msmfb_data plane1_data; 263 struct msmfb_data plane2_data; 264 struct msmfb_data dst_data; 265 }; 266 267 struct msmfb_img { 268 uint32_t width; 269 uint32_t height; 270 uint32_t format; 271 }; 272 273 #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 274 struct msmfb_writeback_data { 275 struct msmfb_data buf_info; 276 struct msmfb_img img; 277 }; 278 279 #define MDP_PP_OPS_ENABLE 0x1 280 #define MDP_PP_OPS_READ 0x2 281 #define MDP_PP_OPS_WRITE 0x4 282 #define MDP_PP_OPS_DISABLE 0x8 283 284 struct mdp_qseed_cfg { 285 uint32_t table_num; 286 uint32_t ops; 287 uint32_t len; 288 uint32_t *data; 289 }; 290 291 struct mdp_qseed_cfg_data { 292 uint32_t block; 293 struct mdp_qseed_cfg qseed_data; 294 }; 295 296 struct mdp_sharp_cfg { 297 uint32_t flags; 298 uint32_t strength; 299 uint32_t edge_thr; 300 uint32_t smooth_thr; 301 uint32_t noise_thr; 302 }; 303 304 #define MDP_OVERLAY_PP_CSC_CFG 0x1 305 #define MDP_OVERLAY_PP_QSEED_CFG 0x2 306 #define MDP_OVERLAY_PP_PA_CFG 0x4 307 #define MDP_OVERLAY_PP_IGC_CFG 0x8 308 #define MDP_OVERLAY_PP_SHARP_CFG 0x10 309 310 #define MDP_CSC_FLAG_ENABLE 0x1 311 #define MDP_CSC_FLAG_YUV_IN 0x2 312 #define MDP_CSC_FLAG_YUV_OUT 0x4 313 314 struct mdp_csc_cfg { 315 /* flags for enable CSC, toggling RGB,YUV input/output */ 316 uint32_t flags; 317 uint32_t csc_mv[9]; 318 uint32_t csc_pre_bv[3]; 319 uint32_t csc_post_bv[3]; 320 uint32_t csc_pre_lv[6]; 321 uint32_t csc_post_lv[6]; 322 }; 323 324 struct mdp_csc_cfg_data { 325 uint32_t block; 326 struct mdp_csc_cfg csc_data; 327 }; 328 329 struct mdp_pa_cfg { 330 uint32_t flags; 331 uint32_t hue_adj; 332 uint32_t sat_adj; 333 uint32_t val_adj; 334 uint32_t cont_adj; 335 }; 336 337 struct mdp_igc_lut_data { 338 uint32_t block; 339 uint32_t len, ops; 340 uint32_t *c0_c1_data; 341 uint32_t *c2_data; 342 }; 343 344 struct mdp_overlay_pp_params { 345 uint32_t config_ops; 346 struct mdp_csc_cfg csc_cfg; 347 struct mdp_qseed_cfg qseed_cfg[2]; 348 struct mdp_pa_cfg pa_cfg; 349 struct mdp_igc_lut_data igc_cfg; 350 struct mdp_sharp_cfg sharp_cfg; 351 }; 352 353 enum { 354 BLEND_OP_NOT_DEFINED = 0, 355 BLEND_OP_OPAQUE, 356 BLEND_OP_PREMULTIPLIED, 357 BLEND_OP_COVERAGE, 358 BLEND_OP_MAX, 359 }; 360 361 struct mdp_overlay { 362 struct msmfb_img src; 363 struct mdp_rect src_rect; 364 struct mdp_rect dst_rect; 365 uint32_t z_order; /* stage number */ 366 uint32_t is_fg; /* control alpha & transp */ 367 uint32_t alpha; 368 uint32_t transp_mask; 369 uint32_t blend_op; 370 uint32_t flags; 371 uint32_t id; 372 uint32_t user_data[8]; 373 struct mdp_overlay_pp_params overlay_pp_cfg; 374 }; 375 376 struct msmfb_overlay_3d { 377 uint32_t is_3d; 378 uint32_t width; 379 uint32_t height; 380 }; 381 382 383 struct msmfb_overlay_blt { 384 uint32_t enable; 385 uint32_t offset; 386 uint32_t width; 387 uint32_t height; 388 uint32_t bpp; 389 }; 390 391 struct mdp_histogram { 392 uint32_t frame_cnt; 393 uint32_t bin_cnt; 394 uint32_t *r; 395 uint32_t *g; 396 uint32_t *b; 397 }; 398 399 400 /* 401 402 mdp_block_type defines the identifiers for pipes in MDP 4.3 and up 403 404 MDP_BLOCK_RESERVED is provided for backward compatibility and is 405 deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used 406 instead. 407 408 MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses, 409 same for others. 410 411 */ 412 413 enum { 414 MDP_BLOCK_RESERVED = 0, 415 MDP_BLOCK_OVERLAY_0, 416 MDP_BLOCK_OVERLAY_1, 417 MDP_BLOCK_VG_1, 418 MDP_BLOCK_VG_2, 419 MDP_BLOCK_RGB_1, 420 MDP_BLOCK_RGB_2, 421 MDP_BLOCK_DMA_P, 422 MDP_BLOCK_DMA_S, 423 MDP_BLOCK_DMA_E, 424 MDP_BLOCK_OVERLAY_2, 425 MDP_LOGICAL_BLOCK_DISP_0 = 0x1000, 426 MDP_LOGICAL_BLOCK_DISP_1, 427 MDP_LOGICAL_BLOCK_DISP_2, 428 MDP_BLOCK_MAX, 429 }; 430 431 /* 432 * mdp_histogram_start_req is used to provide the parameters for 433 * histogram start request 434 */ 435 436 struct mdp_histogram_start_req { 437 uint32_t block; 438 uint8_t frame_cnt; 439 uint8_t bit_mask; 440 uint8_t num_bins; 441 }; 442 443 /* 444 * mdp_histogram_data is used to return the histogram data, once 445 * the histogram is done/stopped/cance 446 */ 447 448 struct mdp_histogram_data { 449 uint32_t block; 450 uint8_t bin_cnt; 451 uint32_t *c0; 452 uint32_t *c1; 453 uint32_t *c2; 454 uint32_t *extra_info; 455 }; 456 457 struct mdp_pcc_coeff { 458 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1; 459 }; 460 461 struct mdp_pcc_cfg_data { 462 uint32_t block; 463 uint32_t ops; 464 struct mdp_pcc_coeff r, g, b; 465 }; 466 467 enum { 468 mdp_lut_igc, 469 mdp_lut_pgc, 470 mdp_lut_hist, 471 mdp_lut_max, 472 }; 473 474 struct mdp_ar_gc_lut_data { 475 uint32_t x_start; 476 uint32_t slope; 477 uint32_t offset; 478 }; 479 480 struct mdp_pgc_lut_data { 481 uint32_t block; 482 uint32_t flags; 483 uint8_t num_r_stages; 484 uint8_t num_g_stages; 485 uint8_t num_b_stages; 486 struct mdp_ar_gc_lut_data *r_data; 487 struct mdp_ar_gc_lut_data *g_data; 488 struct mdp_ar_gc_lut_data *b_data; 489 }; 490 491 492 struct mdp_hist_lut_data { 493 uint32_t block; 494 uint32_t ops; 495 uint32_t len; 496 uint32_t *data; 497 }; 498 499 struct mdp_lut_cfg_data { 500 uint32_t lut_type; 501 union { 502 struct mdp_igc_lut_data igc_lut_data; 503 struct mdp_pgc_lut_data pgc_lut_data; 504 struct mdp_hist_lut_data hist_lut_data; 505 } data; 506 }; 507 508 struct mdp_bl_scale_data { 509 uint32_t min_lvl; 510 uint32_t scale; 511 }; 512 513 struct mdp_calib_config_data { 514 uint32_t ops; 515 uint32_t addr; 516 uint32_t data; 517 }; 518 519 struct mdp_pa_cfg_data { 520 uint32_t block; 521 struct mdp_pa_cfg pa_data; 522 }; 523 524 enum { 525 mdp_op_pcc_cfg, 526 mdp_op_csc_cfg, 527 mdp_op_lut_cfg, 528 mdp_op_qseed_cfg, 529 mdp_bl_scale_cfg, 530 mdp_op_calib_cfg, 531 mdp_op_pa_cfg, 532 mdp_op_max, 533 }; 534 535 struct msmfb_mdp_pp { 536 uint32_t op; 537 union { 538 struct mdp_pcc_cfg_data pcc_cfg_data; 539 struct mdp_csc_cfg_data csc_cfg_data; 540 struct mdp_lut_cfg_data lut_cfg_data; 541 struct mdp_qseed_cfg_data qseed_cfg_data; 542 struct mdp_bl_scale_data bl_scale_data; 543 struct mdp_calib_config_data calib_cfg; 544 struct mdp_pa_cfg_data pa_cfg_data; 545 } data; 546 }; 547 548 enum { 549 metadata_op_none, 550 metadata_op_base_blend, 551 metadata_op_frame_rate, 552 metadata_op_max 553 }; 554 555 struct mdp_blend_cfg { 556 uint32_t is_premultiplied; 557 }; 558 559 struct msmfb_metadata { 560 uint32_t op; 561 uint32_t flags; 562 union { 563 struct mdp_blend_cfg blend_cfg; 564 uint32_t panel_frame_rate; 565 } data; 566 }; 567 568 #define MDP_MAX_FENCE_FD 10 569 #define MDP_BUF_SYNC_FLAG_WAIT 1 570 571 struct mdp_buf_sync { 572 uint32_t flags; 573 uint32_t acq_fen_fd_cnt; 574 int *acq_fen_fd; 575 int *rel_fen_fd; 576 int *retire_fen_fd; 577 }; 578 579 #define MDP_DISPLAY_COMMIT_OVERLAY 0x00000001 580 581 struct mdp_display_commit { 582 uint32_t flags; 583 uint32_t wait_for_finish; 584 struct fb_var_screeninfo var; 585 }; 586 587 struct mdp_page_protection { 588 uint32_t page_protection; 589 }; 590 591 592 struct mdp_mixer_info { 593 int pndx; 594 int pnum; 595 int ptype; 596 int mixer_num; 597 int z_order; 598 }; 599 600 #define MAX_PIPE_PER_MIXER 5 601 602 struct msmfb_mixer_info_req { 603 int mixer_num; 604 int cnt; 605 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER]; 606 }; 607 608 enum { 609 DISPLAY_SUBSYSTEM_ID, 610 ROTATOR_SUBSYSTEM_ID, 611 }; 612 613 enum { 614 MDP_WRITEBACK_MIRROR_OFF, 615 MDP_WRITEBACK_MIRROR_ON, 616 MDP_WRITEBACK_MIRROR_PAUSE, 617 MDP_WRITEBACK_MIRROR_RESUME, 618 }; 619 620 #ifdef __KERNEL__ 621 622 /* get the framebuffer physical address information */ 623 int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num, 624 int subsys_id); 625 struct fb_info *msm_fb_get_writeback_fb(void); 626 int msm_fb_writeback_init(struct fb_info *info); 627 int msm_fb_writeback_start(struct fb_info *info); 628 int msm_fb_writeback_queue_buffer(struct fb_info *info, 629 struct msmfb_data *data); 630 int msm_fb_writeback_dequeue_buffer(struct fb_info *info, 631 struct msmfb_data *data); 632 int msm_fb_writeback_stop(struct fb_info *info); 633 int msm_fb_writeback_terminate(struct fb_info *info); 634 #endif 635 636 #endif /*_MSM_MDP_H_*/ 637
