1 #ifndef _SDE_DRM_H_ 2 #define _SDE_DRM_H_ 3 4 /* 5 * Each top level structure is of the following format: 6 * 7 * struct { 8 * uint64_t version; 9 * union { 10 * struct version v1; 11 * ... 12 * } u; 13 * 14 * Each top level structure maintains independent versioning and is defined 15 * as follows: 16 * 17 * #define STRUCTNAME_V1 0x1 18 * ... 19 * #define STRUCTNAME_Vn 0x### 20 * #define STRUCTNAME_VERSION STRUCTNAME_Vn 21 * 22 * Version fields should ALWAYS be declared as type uint64_t. This is because 23 * 64-bit compilers tend to pad the structure to 64-bit align the start of 24 * union structure members. Having an explicit 64-bit version helps to maintain 25 * consistent structure layout between 32-bit and 64-bit compilers. 26 * 27 * Updates to the structures UAPI should always define a new sub-structure to 28 * place within the union, and update STRUCTNAME_VERSION to reference the 29 * new version number. 30 * 31 * User mode code should always set the 'version' field to STRUCTNAME_VERSION. 32 */ 33 34 /* Total number of supported color planes */ 35 #define SDE_MAX_PLANES 4 36 37 /* Total number of parameterized detail enhancer mapping curves */ 38 #define SDE_MAX_DE_CURVES 3 39 40 /* Y/RGB and UV filter configuration */ 41 #define FILTER_EDGE_DIRECTED_2D 0x0 42 #define FILTER_CIRCULAR_2D 0x1 43 #define FILTER_SEPARABLE_1D 0x2 44 #define FILTER_BILINEAR 0x3 45 46 /* Alpha filters */ 47 #define FILTER_ALPHA_DROP_REPEAT 0x0 48 #define FILTER_ALPHA_BILINEAR 0x1 49 #define FILTER_ALPHA_2D 0x3 50 51 /* Blend filters */ 52 #define FILTER_BLEND_CIRCULAR_2D 0x0 53 #define FILTER_BLEND_SEPARABLE_1D 0x1 54 55 /* LUT configuration flags */ 56 #define SCALER_LUT_SWAP 0x1 57 #define SCALER_LUT_DIR_WR 0x2 58 #define SCALER_LUT_Y_CIR_WR 0x4 59 #define SCALER_LUT_UV_CIR_WR 0x8 60 #define SCALER_LUT_Y_SEP_WR 0x10 61 #define SCALER_LUT_UV_SEP_WR 0x20 62 63 /** 64 * Blend operations for "blend_op" property 65 * 66 * @SDE_DRM_BLEND_OP_NOT_DEFINED: No blend operation defined for the layer. 67 * @SDE_DRM_BLEND_OP_OPAQUE: Apply a constant blend operation. The layer 68 * would appear opaque in case fg plane alpha 69 * is 0xff. 70 * @SDE_DRM_BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already 71 * has alpha pre-multiplication done. If the fg 72 * plane alpha is less than 0xff, apply 73 * modulation as well. This operation is 74 * intended on layers having alpha channel. 75 * @SDE_DRM_BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not 76 * alpha pre-multiplied. Apply 77 * pre-multiplication. If fg plane alpha is 78 * less than 0xff, apply modulation as well. 79 * @SDE_DRM_BLEND_OP_MAX: Used to track maximum blend operation 80 * possible by mdp. 81 */ 82 #define SDE_DRM_BLEND_OP_NOT_DEFINED 0 83 #define SDE_DRM_BLEND_OP_OPAQUE 1 84 #define SDE_DRM_BLEND_OP_PREMULTIPLIED 2 85 #define SDE_DRM_BLEND_OP_COVERAGE 3 86 #define SDE_DRM_BLEND_OP_MAX 4 87 88 /** 89 * Bit masks for "src_config" property 90 * construct bitmask via (1UL << SDE_DRM_<flag>) 91 */ 92 #define SDE_DRM_DEINTERLACE 0 /* Specifies interlaced input */ 93 94 /* DRM bitmasks are restricted to 0..63 */ 95 #define SDE_DRM_BITMASK_COUNT 64 96 97 /** 98 * struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure 99 * @num_ext_pxls_lr: Number of total horizontal pixels 100 * @num_ext_pxls_tb: Number of total vertical lines 101 * @left_ftch: Number of extra pixels to overfetch from left 102 * @right_ftch: Number of extra pixels to overfetch from right 103 * @top_ftch: Number of extra lines to overfetch from top 104 * @btm_ftch: Number of extra lines to overfetch from bottom 105 * @left_rpt: Number of extra pixels to repeat from left 106 * @right_rpt: Number of extra pixels to repeat from right 107 * @top_rpt: Number of extra lines to repeat from top 108 * @btm_rpt: Number of extra lines to repeat from bottom 109 */ 110 struct sde_drm_pix_ext_v1 { 111 /* 112 * Number of pixels ext in left, right, top and bottom direction 113 * for all color components. 114 */ 115 int32_t num_ext_pxls_lr[SDE_MAX_PLANES]; 116 int32_t num_ext_pxls_tb[SDE_MAX_PLANES]; 117 118 /* 119 * Number of pixels needs to be overfetched in left, right, top 120 * and bottom directions from source image for scaling. 121 */ 122 int32_t left_ftch[SDE_MAX_PLANES]; 123 int32_t right_ftch[SDE_MAX_PLANES]; 124 int32_t top_ftch[SDE_MAX_PLANES]; 125 int32_t btm_ftch[SDE_MAX_PLANES]; 126 /* 127 * Number of pixels needs to be repeated in left, right, top and 128 * bottom directions for scaling. 129 */ 130 int32_t left_rpt[SDE_MAX_PLANES]; 131 int32_t right_rpt[SDE_MAX_PLANES]; 132 int32_t top_rpt[SDE_MAX_PLANES]; 133 int32_t btm_rpt[SDE_MAX_PLANES]; 134 135 }; 136 137 /** 138 * Enable mask bits for "scaler" property 139 * 140 * @SDE_DRM_SCALER_PIX_EXT: pix ext sub-structures are valid 141 * @SDE_DRM_SCALER_SCALER_2: scaler 2 sub-structures are valid 142 * @SDE_DRM_SCALER_SCALER_3: scaler 3 sub-structures are valid 143 * @SDE_DRM_SCALER_DECIMATE: decimation fields are valid 144 */ 145 #define SDE_DRM_SCALER_PIX_EXT 0x1 146 #define SDE_DRM_SCALER_SCALER_2 0x2 147 #define SDE_DRM_SCALER_SCALER_3 0x4 148 #define SDE_DRM_SCALER_DECIMATE 0x8 149 150 /** 151 * struct sde_drm_scaler_v1 - version 1 of struct sde_drm_scaler 152 * @lr: Pixel extension settings for left/right 153 * @tb: Pixel extension settings for top/botton 154 * @init_phase_x: Initial scaler phase values for x 155 * @phase_step_x: Phase step values for x 156 * @init_phase_y: Initial scaler phase values for y 157 * @phase_step_y: Phase step values for y 158 * @horz_filter: Horizontal filter array 159 * @vert_filter: Vertical filter array 160 */ 161 struct sde_drm_scaler_v1 { 162 /* 163 * General definitions 164 */ 165 uint32_t enable; 166 167 /* 168 * Pix ext settings 169 */ 170 struct sde_drm_pix_ext_v1 pe; 171 172 /* 173 * Decimation settings 174 */ 175 uint32_t horz_decimate; 176 uint32_t vert_decimate; 177 178 /* 179 * Phase settings 180 */ 181 int32_t init_phase_x[SDE_MAX_PLANES]; 182 int32_t phase_step_x[SDE_MAX_PLANES]; 183 int32_t init_phase_y[SDE_MAX_PLANES]; 184 int32_t phase_step_y[SDE_MAX_PLANES]; 185 186 /* 187 * Filter type to be used for scaling in horizontal and vertical 188 * directions 189 */ 190 uint32_t horz_filter[SDE_MAX_PLANES]; 191 uint32_t vert_filter[SDE_MAX_PLANES]; 192 }; 193 194 /** 195 * struct sde_drm_de_v1 - version 1 of detail enhancer structure 196 * @enable: Enables/disables detail enhancer 197 * @sharpen_level1: Sharpening strength for noise 198 * @sharpen_level2: Sharpening strength for context 199 * @clip: Clip coefficient 200 * @limit: Detail enhancer limit factor 201 * @thr_quiet: Quite zone threshold 202 * @thr_dieout: Die-out zone threshold 203 * @thr_low: Linear zone left threshold 204 * @thr_high: Linear zone right threshold 205 * @prec_shift: Detail enhancer precision 206 * @adjust_a: Mapping curves A coefficients 207 * @adjust_b: Mapping curves B coefficients 208 * @adjust_c: Mapping curves C coefficients 209 */ 210 struct sde_drm_de_v1 { 211 uint32_t enable; 212 int16_t sharpen_level1; 213 int16_t sharpen_level2; 214 uint16_t clip; 215 uint16_t limit; 216 uint16_t thr_quiet; 217 uint16_t thr_dieout; 218 uint16_t thr_low; 219 uint16_t thr_high; 220 uint16_t prec_shift; 221 int16_t adjust_a[SDE_MAX_DE_CURVES]; 222 int16_t adjust_b[SDE_MAX_DE_CURVES]; 223 int16_t adjust_c[SDE_MAX_DE_CURVES]; 224 }; 225 226 /** 227 * struct sde_drm_scaler_v2 - version 2 of struct sde_drm_scaler 228 * @enable: Scaler enable 229 * @dir_en: Detail enhancer enable 230 * @pe: Pixel extension settings 231 * @horz_decimate: Horizontal decimation factor 232 * @vert_decimate: Vertical decimation factor 233 * @init_phase_x: Initial scaler phase values for x 234 * @phase_step_x: Phase step values for x 235 * @init_phase_y: Initial scaler phase values for y 236 * @phase_step_y: Phase step values for y 237 * @preload_x: Horizontal preload value 238 * @preload_y: Vertical preload value 239 * @src_width: Source width 240 * @src_height: Source height 241 * @dst_width: Destination width 242 * @dst_height: Destination height 243 * @y_rgb_filter_cfg: Y/RGB plane filter configuration 244 * @uv_filter_cfg: UV plane filter configuration 245 * @alpha_filter_cfg: Alpha filter configuration 246 * @blend_cfg: Selection of blend coefficients 247 * @lut_flag: LUT configuration flags 248 * @dir_lut_idx: 2d 4x4 LUT index 249 * @y_rgb_cir_lut_idx: Y/RGB circular LUT index 250 * @uv_cir_lut_idx: UV circular LUT index 251 * @y_rgb_sep_lut_idx: Y/RGB separable LUT index 252 * @uv_sep_lut_idx: UV separable LUT index 253 * @de: Detail enhancer settings 254 */ 255 struct sde_drm_scaler_v2 { 256 /* General definitions*/ 257 uint32_t enable; 258 uint32_t dir_en; 259 260 /* Pix ext settings*/ 261 struct sde_drm_pix_ext_v1 pe; 262 263 /* Decimation settings*/ 264 uint32_t horz_decimate; 265 uint32_t vert_decimate; 266 267 /* Phase settings*/ 268 int32_t init_phase_x[SDE_MAX_PLANES]; 269 int32_t phase_step_x[SDE_MAX_PLANES]; 270 int32_t init_phase_y[SDE_MAX_PLANES]; 271 int32_t phase_step_y[SDE_MAX_PLANES]; 272 273 uint32_t preload_x[SDE_MAX_PLANES]; 274 uint32_t preload_y[SDE_MAX_PLANES]; 275 uint32_t src_width[SDE_MAX_PLANES]; 276 uint32_t src_height[SDE_MAX_PLANES]; 277 278 uint32_t dst_width; 279 uint32_t dst_height; 280 281 uint32_t y_rgb_filter_cfg; 282 uint32_t uv_filter_cfg; 283 uint32_t alpha_filter_cfg; 284 uint32_t blend_cfg; 285 286 uint32_t lut_flag; 287 uint32_t dir_lut_idx; 288 289 /* for Y(RGB) and UV planes*/ 290 uint32_t y_rgb_cir_lut_idx; 291 uint32_t uv_cir_lut_idx; 292 uint32_t y_rgb_sep_lut_idx; 293 uint32_t uv_sep_lut_idx; 294 295 /* Detail enhancer settings */ 296 struct sde_drm_de_v1 de; 297 }; 298 299 /* Scaler version definition, see top of file for guidelines */ 300 #define SDE_DRM_SCALER_V1 0x1 301 #define SDE_DRM_SCALER_VERSION SDE_DRM_SCALER_V1 302 303 /** 304 * struct sde_drm_scaler - scaler structure 305 * @version: Structure version, set to SDE_DRM_SCALER_VERSION 306 * @v1: Version 1 of scaler structure 307 */ 308 struct sde_drm_scaler { 309 uint64_t version; 310 union { 311 struct sde_drm_scaler_v1 v1; 312 }; 313 }; 314 315 /* 316 * Define constants for struct sde_drm_csc 317 */ 318 #define SDE_CSC_MATRIX_COEFF_SIZE 9 319 #define SDE_CSC_CLAMP_SIZE 6 320 #define SDE_CSC_BIAS_SIZE 3 321 322 /* CSC version definition, see top of file for guidelines */ 323 #define SDE_DRM_CSC_V1 0x1 324 #define SDE_DRM_CSC_VERSION SDE_DRM_CSC_V1 325 326 /** 327 * struct sde_drm_csc_v1 - version 1 of struct sde_drm_csc 328 * @ctm_coeff: Matrix coefficients, in S31.32 format 329 * @pre_bias: Pre-bias array values 330 * @post_bias: Post-bias array values 331 * @pre_clamp: Pre-clamp array values 332 * @post_clamp: Post-clamp array values 333 */ 334 struct sde_drm_csc_v1 { 335 int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE]; 336 uint32_t pre_bias[SDE_CSC_BIAS_SIZE]; 337 uint32_t post_bias[SDE_CSC_BIAS_SIZE]; 338 uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE]; 339 uint32_t post_clamp[SDE_CSC_CLAMP_SIZE]; 340 }; 341 342 /** 343 * struct sde_drm_csc - CSC configuration structure 344 * @version: Structure version, set to SDE_DRM_CSC_VERSION 345 * @v1: Version 1 of csc structure 346 */ 347 struct sde_drm_csc { 348 uint64_t version; 349 union { 350 struct sde_drm_csc_v1 v1; 351 }; 352 }; 353 354 /* Writeback Config version definition */ 355 #define SDE_DRM_WB_CFG 0x1 356 357 /* SDE_DRM_WB_CONFIG_FLAGS - Writeback configuration flags */ 358 #define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1<<0) 359 360 /** 361 * struct sde_drm_wb_cfg - Writeback configuration structure 362 * @flags: see DRM_MSM_WB_CONFIG_FLAGS 363 * @connector_id: writeback connector identifier 364 * @count_modes: Count of modes in modes_ptr 365 * @modes: Pointer to struct drm_mode_modeinfo 366 */ 367 struct sde_drm_wb_cfg { 368 uint32_t flags; 369 uint32_t connector_id; 370 uint32_t count_modes; 371 uint64_t modes; 372 }; 373 374 #endif /* _SDE_DRM_H_ */ 375
