1 //===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the live stack slot analysis pass. It is analogous to 11 // live interval analysis except it's analyzing liveness of stack slots rather 12 // than registers. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H 17 #define LLVM_CODEGEN_LIVESTACKANALYSIS_H 18 19 #include "llvm/CodeGen/LiveInterval.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/Support/Allocator.h" 22 #include "llvm/Target/TargetRegisterInfo.h" 23 #include <map> 24 #include <unordered_map> 25 26 namespace llvm { 27 28 class LiveStacks : public MachineFunctionPass { 29 const TargetRegisterInfo *TRI; 30 31 /// Special pool allocator for VNInfo's (LiveInterval val#). 32 /// 33 VNInfo::Allocator VNInfoAllocator; 34 35 /// S2IMap - Stack slot indices to live interval mapping. 36 /// 37 typedef std::unordered_map<int, LiveInterval> SS2IntervalMap; 38 SS2IntervalMap S2IMap; 39 40 /// S2RCMap - Stack slot indices to register class mapping. 41 std::map<int, const TargetRegisterClass *> S2RCMap; 42 43 public: 44 static char ID; // Pass identification, replacement for typeid 45 LiveStacks() : MachineFunctionPass(ID) { 46 initializeLiveStacksPass(*PassRegistry::getPassRegistry()); 47 } 48 49 typedef SS2IntervalMap::iterator iterator; 50 typedef SS2IntervalMap::const_iterator const_iterator; 51 const_iterator begin() const { return S2IMap.begin(); } 52 const_iterator end() const { return S2IMap.end(); } 53 iterator begin() { return S2IMap.begin(); } 54 iterator end() { return S2IMap.end(); } 55 56 unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); } 57 58 LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC); 59 60 LiveInterval &getInterval(int Slot) { 61 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 62 SS2IntervalMap::iterator I = S2IMap.find(Slot); 63 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 64 return I->second; 65 } 66 67 const LiveInterval &getInterval(int Slot) const { 68 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 69 SS2IntervalMap::const_iterator I = S2IMap.find(Slot); 70 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 71 return I->second; 72 } 73 74 bool hasInterval(int Slot) const { return S2IMap.count(Slot); } 75 76 const TargetRegisterClass *getIntervalRegClass(int Slot) const { 77 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 78 std::map<int, const TargetRegisterClass *>::const_iterator I = 79 S2RCMap.find(Slot); 80 assert(I != S2RCMap.end() && 81 "Register class info does not exist for stack slot"); 82 return I->second; 83 } 84 85 VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; } 86 87 void getAnalysisUsage(AnalysisUsage &AU) const override; 88 void releaseMemory() override; 89 90 /// runOnMachineFunction - pass entry point 91 bool runOnMachineFunction(MachineFunction &) override; 92 93 /// print - Implement the dump method. 94 void print(raw_ostream &O, const Module * = nullptr) const override; 95 }; 96 } 97 98 #endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */ 99
