1 //===- IntrinsicsHexagon.td - Defines Hexagon intrinsics ---*- tablegen -*-===// 2 // The LLVM Compiler Infrastructure 3 // 4 // This file is distributed under the University of Illinois Open Source 5 // License. See LICENSE.TXT for details. 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines all of the Hexagon-specific intrinsics. 10 // 11 //===----------------------------------------------------------------------===// 12 13 //===----------------------------------------------------------------------===// 14 // Definitions for all Hexagon intrinsics. 15 // 16 // All Hexagon intrinsics start with "llvm.hexagon.". 17 let TargetPrefix = "hexagon" in { 18 /// Hexagon_Intrinsic - Base class for all Hexagon intrinsics. 19 class Hexagon_Intrinsic<string GCCIntSuffix, list<LLVMType> ret_types, 20 list<LLVMType> param_types, 21 list<IntrinsicProperty> properties> 22 : GCCBuiltin<!strconcat("__builtin_", GCCIntSuffix)>, 23 Intrinsic<ret_types, param_types, properties>; 24 } 25 26 //===----------------------------------------------------------------------===// 27 // 28 // DEF_FUNCTION_TYPE_1(QI_ftype_MEM,BT_BOOL,BT_PTR) -> 29 // Hexagon_qi_mem_Intrinsic<string GCCIntSuffix> 30 // 31 class Hexagon_qi_mem_Intrinsic<string GCCIntSuffix> 32 : Hexagon_Intrinsic<GCCIntSuffix, 33 [llvm_i1_ty], [llvm_ptr_ty], 34 [IntrNoMem]>; 35 36 // 37 // DEF_FUNCTION_TYPE_1(void_ftype_SI,BT_VOID,BT_INT) -> 38 // Hexagon_void_si_Intrinsic<string GCCIntSuffix> 39 // 40 class Hexagon_void_si_Intrinsic<string GCCIntSuffix> 41 : Hexagon_Intrinsic<GCCIntSuffix, 42 [], [llvm_ptr_ty], 43 []>; 44 45 // 46 // DEF_FUNCTION_TYPE_1(HI_ftype_SI,BT_I16,BT_INT) -> 47 // Hexagon_hi_si_Intrinsic<string GCCIntSuffix> 48 // 49 class Hexagon_hi_si_Intrinsic<string GCCIntSuffix> 50 : Hexagon_Intrinsic<GCCIntSuffix, 51 [llvm_i16_ty], [llvm_i32_ty], 52 [IntrNoMem]>; 53 // 54 // DEF_FUNCTION_TYPE_1(SI_ftype_SI,BT_INT,BT_INT) -> 55 // Hexagon_si_si_Intrinsic<string GCCIntSuffix> 56 // 57 class Hexagon_si_si_Intrinsic<string GCCIntSuffix> 58 : Hexagon_Intrinsic<GCCIntSuffix, 59 [llvm_i32_ty], [llvm_i32_ty], 60 [IntrNoMem]>; 61 // 62 // DEF_FUNCTION_TYPE_1(DI_ftype_SI,BT_LONGLONG,BT_INT) -> 63 // Hexagon_di_si_Intrinsic<string GCCIntSuffix> 64 // 65 class Hexagon_di_si_Intrinsic<string GCCIntSuffix> 66 : Hexagon_Intrinsic<GCCIntSuffix, 67 [llvm_i64_ty], [llvm_i32_ty], 68 [IntrNoMem]>; 69 // 70 // DEF_FUNCTION_TYPE_1(SI_ftype_DI,BT_INT,BT_LONGLONG) -> 71 // Hexagon_si_di_Intrinsic<string GCCIntSuffix> 72 // 73 class Hexagon_si_di_Intrinsic<string GCCIntSuffix> 74 : Hexagon_Intrinsic<GCCIntSuffix, 75 [llvm_i32_ty], [llvm_i64_ty], 76 [IntrNoMem]>; 77 // 78 // DEF_FUNCTION_TYPE_1(DI_ftype_DI,BT_LONGLONG,BT_LONGLONG) -> 79 // Hexagon_di_di_Intrinsic<string GCCIntSuffix> 80 // 81 class Hexagon_di_di_Intrinsic<string GCCIntSuffix> 82 : Hexagon_Intrinsic<GCCIntSuffix, 83 [llvm_i64_ty], [llvm_i64_ty], 84 [IntrNoMem]>; 85 // 86 // DEF_FUNCTION_TYPE_1(QI_ftype_QI,BT_BOOL,BT_BOOL) -> 87 // Hexagon_qi_qi_Intrinsic<string GCCIntSuffix> 88 // 89 class Hexagon_qi_qi_Intrinsic<string GCCIntSuffix> 90 : Hexagon_Intrinsic<GCCIntSuffix, 91 [llvm_i1_ty], [llvm_i32_ty], 92 [IntrNoMem]>; 93 // 94 // DEF_FUNCTION_TYPE_1(QI_ftype_SI,BT_BOOL,BT_INT) -> 95 // Hexagon_qi_si_Intrinsic<string GCCIntSuffix> 96 // 97 class Hexagon_qi_si_Intrinsic<string GCCIntSuffix> 98 : Hexagon_Intrinsic<GCCIntSuffix, 99 [llvm_i1_ty], [llvm_i32_ty], 100 [IntrNoMem]>; 101 // 102 // DEF_FUNCTION_TYPE_1(DI_ftype_QI,BT_LONGLONG,BT_BOOL) -> 103 // Hexagon_di_qi_Intrinsic<string GCCIntSuffix> 104 // 105 class Hexagon_di_qi_Intrinsic<string GCCIntSuffix> 106 : Hexagon_Intrinsic<GCCIntSuffix, 107 [llvm_i64_ty], [llvm_i32_ty], 108 [IntrNoMem]>; 109 // 110 // DEF_FUNCTION_TYPE_1(SI_ftype_QI,BT_INT,BT_BOOL) -> 111 // Hexagon_si_qi_Intrinsic<string GCCIntSuffix> 112 // 113 class Hexagon_si_qi_Intrinsic<string GCCIntSuffix> 114 : Hexagon_Intrinsic<GCCIntSuffix, 115 [llvm_i32_ty], [llvm_i32_ty], 116 [IntrNoMem]>; 117 // 118 // DEF_FUNCTION_TYPE_2(QI_ftype_SISI,BT_BOOL,BT_INT,BT_INT) -> 119 // Hexagon_qi_sisi_Intrinsic<string GCCIntSuffix> 120 // 121 class Hexagon_qi_sisi_Intrinsic<string GCCIntSuffix> 122 : Hexagon_Intrinsic<GCCIntSuffix, 123 [llvm_i1_ty], [llvm_i32_ty, llvm_i32_ty], 124 [IntrNoMem]>; 125 // 126 // DEF_FUNCTION_TYPE_2(void_ftype_SISI,BT_VOID,BT_INT,BT_INT) -> 127 // Hexagon_void_sisi_Intrinsic<string GCCIntSuffix> 128 // 129 class Hexagon_void_sisi_Intrinsic<string GCCIntSuffix> 130 : Hexagon_Intrinsic<GCCIntSuffix, 131 [llvm_void_ty], [llvm_i32_ty, llvm_i32_ty], 132 [IntrNoMem]>; 133 // 134 // DEF_FUNCTION_TYPE_2(SI_ftype_SISI,BT_INT,BT_INT,BT_INT) -> 135 // Hexagon_si_sisi_Intrinsic<string GCCIntSuffix> 136 // 137 class Hexagon_si_sisi_Intrinsic<string GCCIntSuffix> 138 : Hexagon_Intrinsic<GCCIntSuffix, 139 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 140 [IntrNoMem]>; 141 // 142 // DEF_FUNCTION_TYPE_2(USI_ftype_SISI,BT_UINT,BT_INT,BT_INT) -> 143 // Hexagon_usi_sisi_Intrinsic<string GCCIntSuffix> 144 // 145 class Hexagon_usi_sisi_Intrinsic<string GCCIntSuffix> 146 : Hexagon_Intrinsic<GCCIntSuffix, 147 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 148 [IntrNoMem]>; 149 // 150 // DEF_FUNCTION_TYPE_2(DI_ftype_SISI,BT_LONGLONG,BT_INT,BT_INT) -> 151 // Hexagon_di_sisi_Intrinsic<string GCCIntSuffix> 152 // 153 class Hexagon_di_sisi_Intrinsic<string GCCIntSuffix> 154 : Hexagon_Intrinsic<GCCIntSuffix, 155 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty], 156 [IntrNoMem]>; 157 // 158 // DEF_FUNCTION_TYPE_2(UDI_ftype_SISI,BT_ULONGLONG,BT_INT,BT_INT) -> 159 // Hexagon_udi_sisi_Intrinsic<string GCCIntSuffix> 160 // 161 class Hexagon_udi_sisi_Intrinsic<string GCCIntSuffix> 162 : Hexagon_Intrinsic<GCCIntSuffix, 163 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty], 164 [IntrNoMem]>; 165 // 166 // DEF_FUNCTION_TYPE_2(DI_ftype_SIDI,BT_LONGLONG,BT_INT,BT_LONGLONG) -> 167 // Hexagon_di_sidi_Intrinsic<string GCCIntSuffix> 168 // 169 class Hexagon_di_sidi_Intrinsic<string GCCIntSuffix> 170 : Hexagon_Intrinsic<GCCIntSuffix, 171 [llvm_i64_ty], [llvm_i32_ty, llvm_i64_ty], 172 [IntrNoMem]>; 173 // 174 // DEF_FUNCTION_TYPE_2(DI_ftype_DISI,BT_LONGLONG,BT_LONGLONG,BT_INT) -> 175 // Hexagon_di_disi_Intrinsic<string GCCIntSuffix> 176 // 177 class Hexagon_di_disi_Intrinsic<string GCCIntSuffix> 178 : Hexagon_Intrinsic<GCCIntSuffix, 179 [llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], 180 [IntrNoMem]>; 181 // 182 // DEF_FUNCTION_TYPE_2(SI_ftype_SIDI,BT_INT,BT_INT,BT_LONGLONG) -> 183 // Hexagon_si_sidi_Intrinsic<string GCCIntSuffix> 184 // 185 class Hexagon_si_sidi_Intrinsic<string GCCIntSuffix> 186 : Hexagon_Intrinsic<GCCIntSuffix, 187 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty], 188 [IntrNoMem]>; 189 // 190 // DEF_FUNCTION_TYPE_2(SI_ftype_DIDI,BT_INT,BT_LONGLONG,BT_LONGLONG) -> 191 // Hexagon_si_didi_Intrinsic<string GCCIntSuffix> 192 // 193 class Hexagon_si_didi_Intrinsic<string GCCIntSuffix> 194 : Hexagon_Intrinsic<GCCIntSuffix, 195 [llvm_i32_ty], [llvm_i64_ty, llvm_i64_ty], 196 [IntrNoMem]>; 197 // 198 // DEF_FUNCTION_TYPE_2(DI_ftype_DIDI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG) -> 199 // Hexagon_di_didi_Intrinsic<string GCCIntSuffix> 200 // 201 class Hexagon_di_didi_Intrinsic<string GCCIntSuffix> 202 : Hexagon_Intrinsic<GCCIntSuffix, 203 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], 204 [IntrNoMem]>; 205 // 206 // DEF_FUNCTION_TYPE_2(UDI_ftype_DIDI,BT_ULONGLONG,BT_LONGLONG,BT_LONGLONG) -> 207 // Hexagon_udi_didi_Intrinsic<string GCCIntSuffix> 208 // 209 class Hexagon_udi_didi_Intrinsic<string GCCIntSuffix> 210 : Hexagon_Intrinsic<GCCIntSuffix, 211 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], 212 [IntrNoMem]>; 213 // 214 // DEF_FUNCTION_TYPE_2(SI_ftype_DISI,BT_INT,BT_LONGLONG,BT_INT) -> 215 // Hexagon_si_disi_Intrinsic<string GCCIntSuffix> 216 // 217 class Hexagon_si_disi_Intrinsic<string GCCIntSuffix> 218 : Hexagon_Intrinsic<GCCIntSuffix, 219 [llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], 220 [IntrNoMem]>; 221 // 222 // DEF_FUNCTION_TYPE_2(QI_ftype_DIDI,BT_BOOL,BT_LONGLONG,BT_LONGLONG) -> 223 // Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 224 // 225 class Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 226 : Hexagon_Intrinsic<GCCIntSuffix, 227 [llvm_i1_ty], [llvm_i64_ty, llvm_i64_ty], 228 [IntrNoMem]>; 229 // 230 // DEF_FUNCTION_TYPE_2(QI_ftype_SIDI,BT_BOOL,BT_INT,BT_LONGLONG) -> 231 // Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 232 // 233 class Hexagon_qi_sidi_Intrinsic<string GCCIntSuffix> 234 : Hexagon_Intrinsic<GCCIntSuffix, 235 [llvm_i1_ty], [llvm_i32_ty, llvm_i64_ty], 236 [IntrNoMem]>; 237 // 238 // DEF_FUNCTION_TYPE_2(QI_ftype_DISI,BT_BOOL,BT_LONGLONG,BT_INT) -> 239 // Hexagon_qi_disi_Intrinsic<string GCCIntSuffix> 240 // 241 class Hexagon_qi_disi_Intrinsic<string GCCIntSuffix> 242 : Hexagon_Intrinsic<GCCIntSuffix, 243 [llvm_i1_ty], [llvm_i64_ty, llvm_i32_ty], 244 [IntrNoMem]>; 245 // 246 // DEF_FUNCTION_TYPE_2(QI_ftype_QIQI,BT_BOOL,BT_BOOL,BT_BOOL) -> 247 // Hexagon_qi_qiqi_Intrinsic<string GCCIntSuffix> 248 // 249 class Hexagon_qi_qiqi_Intrinsic<string GCCIntSuffix> 250 : Hexagon_Intrinsic<GCCIntSuffix, 251 [llvm_i1_ty], [llvm_i32_ty, llvm_i32_ty], 252 [IntrNoMem]>; 253 // 254 // DEF_FUNCTION_TYPE_2(QI_ftype_QIQIQI,BT_BOOL,BT_BOOL,BT_BOOL) -> 255 // Hexagon_qi_qiqiqi_Intrinsic<string GCCIntSuffix> 256 // 257 class Hexagon_qi_qiqiqi_Intrinsic<string GCCIntSuffix> 258 : Hexagon_Intrinsic<GCCIntSuffix, 259 [llvm_i1_ty], [llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], 260 [IntrNoMem]>; 261 // 262 // DEF_FUNCTION_TYPE_2(SI_ftype_QIQI,BT_INT,BT_BOOL,BT_BOOL) -> 263 // Hexagon_si_qiqi_Intrinsic<string GCCIntSuffix> 264 // 265 class Hexagon_si_qiqi_Intrinsic<string GCCIntSuffix> 266 : Hexagon_Intrinsic<GCCIntSuffix, 267 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 268 [IntrNoMem]>; 269 // 270 // DEF_FUNCTION_TYPE_2(SI_ftype_QISI,BT_INT,BT_BOOL,BT_INT) -> 271 // Hexagon_si_qisi_Intrinsic<string GCCIntSuffix> 272 // 273 class Hexagon_si_qisi_Intrinsic<string GCCIntSuffix> 274 : Hexagon_Intrinsic<GCCIntSuffix, 275 [llvm_i32_ty], [llvm_i1_ty, llvm_i32_ty], 276 [IntrNoMem]>; 277 // 278 // DEF_FUNCTION_TYPE_3(void_ftype_SISISI,BT_VOID,BT_INT,BT_INT,BT_INT) -> 279 // Hexagon_void_sisisi_Intrinsic<string GCCIntSuffix> 280 // 281 class Hexagon_void_sisisi_Intrinsic<string GCCIntSuffix> 282 : Hexagon_Intrinsic<GCCIntSuffix, 283 [llvm_void_ty], [llvm_i32_ty, llvm_i32_ty, 284 llvm_i32_ty], 285 [IntrNoMem]>; 286 // 287 // DEF_FUNCTION_TYPE_3(SI_ftype_SISISI,BT_INT,BT_INT,BT_INT,BT_INT) -> 288 // Hexagon_si_sisisi_Intrinsic<string GCCIntSuffix> 289 // 290 class Hexagon_si_sisisi_Intrinsic<string GCCIntSuffix> 291 : Hexagon_Intrinsic<GCCIntSuffix, 292 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 293 llvm_i32_ty], 294 [IntrNoMem]>; 295 // 296 // DEF_FUNCTION_TYPE_3(DI_ftype_SISISI,BT_LONGLONG,BT_INT,BT_INT,BT_INT) -> 297 // Hexagon_di_sisisi_Intrinsic<string GCCIntSuffix> 298 // 299 class Hexagon_di_sisisi_Intrinsic<string GCCIntSuffix> 300 : Hexagon_Intrinsic<GCCIntSuffix, 301 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, 302 llvm_i32_ty], 303 [IntrNoMem]>; 304 // 305 // DEF_FUNCTION_TYPE_3(SI_ftype_DISISI,BT_INT,BT_LONGLONG,BT_INT,BT_INT) -> 306 // Hexagon_si_disisi_Intrinsic<string GCCIntSuffix> 307 // 308 class Hexagon_si_disisi_Intrinsic<string GCCIntSuffix> 309 : Hexagon_Intrinsic<GCCIntSuffix, 310 [llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty, 311 llvm_i32_ty], 312 [IntrNoMem]>; 313 // 314 // DEF_FUNCTION_TYPE_3(DI_ftype_DISISI,BT_LONGLONG,BT_LONGLONG,BT_INT,BT_INT) -> 315 // Hexagon_di_disisi_Intrinsic<string GCCIntSuffix> 316 // 317 class Hexagon_di_disisi_Intrinsic<string GCCIntSuffix> 318 : Hexagon_Intrinsic<GCCIntSuffix, 319 [llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, 320 llvm_i32_ty], 321 [IntrNoMem]>; 322 // 323 // DEF_FUNCTION_TYPE_3(SI_ftype_SIDISI,BT_INT,BT_INT,BT_LONGLONG,BT_INT) -> 324 // Hexagon_si_sidisi_Intrinsic<string GCCIntSuffix> 325 // 326 class Hexagon_si_sidisi_Intrinsic<string GCCIntSuffix> 327 : Hexagon_Intrinsic<GCCIntSuffix, 328 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty, 329 llvm_i32_ty], 330 [IntrNoMem]>; 331 // 332 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDISI,BT_LONGLONG,BT_LONGLONG, 333 // BT_LONGLONG,BT_INT) -> 334 // Hexagon_di_didisi_Intrinsic<string GCCIntSuffix> 335 // 336 class Hexagon_di_didisi_Intrinsic<string GCCIntSuffix> 337 : Hexagon_Intrinsic<GCCIntSuffix, 338 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 339 llvm_i32_ty], 340 [IntrNoMem]>; 341 // 342 // DEF_FUNCTION_TYPE_3(SI_ftype_SIDIDI,BT_INT,BT_INT,BT_LONGLONG,BT_LONGLONG) -> 343 // Hexagon_si_sididi_Intrinsic<string GCCIntSuffix> 344 // 345 class Hexagon_si_sididi_Intrinsic<string GCCIntSuffix> 346 : Hexagon_Intrinsic<GCCIntSuffix, 347 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty, 348 llvm_i64_ty], 349 [IntrNoMem]>; 350 // 351 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDIDI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG, 352 // BT_LONGLONG) -> 353 // Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 354 // 355 class Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 356 : Hexagon_Intrinsic<GCCIntSuffix, 357 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 358 llvm_i64_ty], 359 [IntrNoMem]>; 360 // 361 // DEF_FUNCTION_TYPE_3(SI_ftype_SISIDI,BT_INT,BT_INT,BT_INT,BT_LONGLONG) -> 362 // Hexagon_si_sisidi_Intrinsic<string GCCIntSuffix> 363 // 364 class Hexagon_si_sisidi_Intrinsic<string GCCIntSuffix> 365 : Hexagon_Intrinsic<GCCIntSuffix, 366 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 367 llvm_i64_ty], 368 [IntrNoMem]>; 369 // 370 // DEF_FUNCTION_TYPE_3(SI_ftype_QISISI,BT_INT,BT_BOOL,BT_INT,BT_INT) -> 371 // Hexagon_si_qisisi_Intrinsic<string GCCIntSuffix> 372 // 373 class Hexagon_si_qisisi_Intrinsic<string GCCIntSuffix> 374 : Hexagon_Intrinsic<GCCIntSuffix, 375 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 376 llvm_i32_ty], 377 [IntrNoMem]>; 378 // 379 // DEF_FUNCTION_TYPE_3(DI_ftype_QISISI,BT_LONGLONG,BT_BOOL,BT_INT,BT_INT) -> 380 // Hexagon_di_qisisi_Intrinsic<string GCCIntSuffix> 381 // 382 class Hexagon_di_qisisi_Intrinsic<string GCCIntSuffix> 383 : Hexagon_Intrinsic<GCCIntSuffix, 384 [llvm_i64_ty], [llvm_i1_ty, llvm_i32_ty, 385 llvm_i32_ty], 386 [IntrNoMem]>; 387 // 388 // DEF_FUNCTION_TYPE_3(DI_ftype_QIDIDI,BT_LONGLONG,BT_BOOL,BT_LONGLONG, 389 // BT_LONGLONG) -> 390 // Hexagon_di_qididi_Intrinsic<string GCCIntSuffix> 391 // 392 class Hexagon_di_qididi_Intrinsic<string GCCIntSuffix> 393 : Hexagon_Intrinsic<GCCIntSuffix, 394 [llvm_i64_ty], [llvm_i32_ty, llvm_i64_ty, 395 llvm_i64_ty], 396 [IntrNoMem]>; 397 // 398 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDIQI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG, 399 // BT_BOOL) -> 400 // Hexagon_di_didiqi_Intrinsic<string GCCIntSuffix> 401 // 402 class Hexagon_di_didiqi_Intrinsic<string GCCIntSuffix> 403 : Hexagon_Intrinsic<GCCIntSuffix, 404 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 405 llvm_i32_ty], 406 [IntrNoMem]>; 407 // 408 // DEF_FUNCTION_TYPE_4(SI_ftype_SISISISI,BT_INT,BT_INT,BT_INT,BT_INT,BT_INT) -> 409 // Hexagon_si_sisisisi_Intrinsic<string GCCIntSuffix> 410 // 411 class Hexagon_si_sisisisi_Intrinsic<string GCCIntSuffix> 412 : Hexagon_Intrinsic<GCCIntSuffix, 413 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 414 llvm_i32_ty, llvm_i32_ty], 415 [IntrNoMem]>; 416 // 417 // DEF_FUNCTION_TYPE_4(DI_ftype_DIDISISI,BT_LONGLONG,BT_LONGLONG, 418 // BT_LONGLONG,BT_INT,BT_INT) -> 419 // Hexagon_di_didisisi_Intrinsic<string GCCIntSuffix> 420 // 421 class Hexagon_di_didisisi_Intrinsic<string GCCIntSuffix> 422 : Hexagon_Intrinsic<GCCIntSuffix, 423 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 424 llvm_i32_ty, llvm_i32_ty], 425 [IntrNoMem]>; 426 427 class Hexagon_mem_memmemsi_Intrinsic<string GCCIntSuffix> 428 : Hexagon_Intrinsic<GCCIntSuffix, 429 [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty, 430 llvm_i32_ty], 431 [IntrArgMemOnly]>; 432 433 class Hexagon_mem_memsisi_Intrinsic<string GCCIntSuffix> 434 : Hexagon_Intrinsic<GCCIntSuffix, 435 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty, 436 llvm_i32_ty], 437 [IntrArgMemOnly]>; 438 439 class Hexagon_mem_memdisi_Intrinsic<string GCCIntSuffix> 440 : Hexagon_Intrinsic<GCCIntSuffix, 441 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty, 442 llvm_i32_ty], 443 [IntrArgMemOnly]>; 444 445 class Hexagon_mem_memmemsisi_Intrinsic<string GCCIntSuffix> 446 : Hexagon_Intrinsic<GCCIntSuffix, 447 [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty, 448 llvm_i32_ty, llvm_i32_ty], 449 [IntrArgMemOnly]>; 450 451 class Hexagon_mem_memsisisi_Intrinsic<string GCCIntSuffix> 452 : Hexagon_Intrinsic<GCCIntSuffix, 453 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty, 454 llvm_i32_ty, llvm_i32_ty], 455 [IntrArgMemOnly]>; 456 457 class Hexagon_mem_memdisisi_Intrinsic<string GCCIntSuffix> 458 : Hexagon_Intrinsic<GCCIntSuffix, 459 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty, 460 llvm_i32_ty, llvm_i32_ty], 461 [IntrArgMemOnly]>; 462 463 class Hexagon_v256_v256v256_Intrinsic<string GCCIntSuffix> 464 : Hexagon_Intrinsic<GCCIntSuffix, 465 [llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty], 466 [IntrArgMemOnly]>; 467 468 // 469 // Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 470 // 471 class Hexagon_sf_si_Intrinsic<string GCCIntSuffix> 472 : Hexagon_Intrinsic<GCCIntSuffix, 473 [llvm_float_ty], [llvm_i32_ty], 474 [IntrNoMem, Throws]>; 475 // 476 // Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 477 // 478 class Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 479 : Hexagon_Intrinsic<GCCIntSuffix, 480 [llvm_float_ty], [llvm_double_ty], 481 [IntrNoMem]>; 482 // 483 // Hexagon_sf_di_Intrinsic<string GCCIntSuffix> 484 // 485 class Hexagon_sf_di_Intrinsic<string GCCIntSuffix> 486 : Hexagon_Intrinsic<GCCIntSuffix, 487 [llvm_float_ty], [llvm_i64_ty], 488 [IntrNoMem]>; 489 // 490 // Hexagon_df_sf_Intrinsic<string GCCIntSuffix> 491 // 492 class Hexagon_df_sf_Intrinsic<string GCCIntSuffix> 493 : Hexagon_Intrinsic<GCCIntSuffix, 494 [llvm_double_ty], [llvm_float_ty], 495 [IntrNoMem]>; 496 // 497 // Hexagon_di_sf_Intrinsic<string GCCIntSuffix> 498 // 499 class Hexagon_di_sf_Intrinsic<string GCCIntSuffix> 500 : Hexagon_Intrinsic<GCCIntSuffix, 501 [llvm_i64_ty], [llvm_float_ty], 502 [IntrNoMem]>; 503 // 504 // Hexagon_sf_sf_Intrinsic<string GCCIntSuffix> 505 // 506 class Hexagon_sf_sf_Intrinsic<string GCCIntSuffix> 507 : Hexagon_Intrinsic<GCCIntSuffix, 508 [llvm_float_ty], [llvm_float_ty], 509 [IntrNoMem]>; 510 // 511 // Hexagon_si_sf_Intrinsic<string GCCIntSuffix> 512 // 513 class Hexagon_si_sf_Intrinsic<string GCCIntSuffix> 514 : Hexagon_Intrinsic<GCCIntSuffix, 515 [llvm_i32_ty], [llvm_float_ty], 516 [IntrNoMem]>; 517 // 518 // Hexagon_si_df_Intrinsic<string GCCIntSuffix> 519 // 520 class Hexagon_si_df_Intrinsic<string GCCIntSuffix> 521 : Hexagon_Intrinsic<GCCIntSuffix, 522 [llvm_i32_ty], [llvm_double_ty], 523 [IntrNoMem]>; 524 // 525 // Hexagon_sf_sfsf_Intrinsic<string GCCIntSuffix> 526 // 527 class Hexagon_sf_sfsf_Intrinsic<string GCCIntSuffix> 528 : Hexagon_Intrinsic<GCCIntSuffix, 529 [llvm_float_ty], [llvm_float_ty, llvm_float_ty], 530 [IntrNoMem, Throws]>; 531 // 532 // Hexagon_si_sfsf_Intrinsic<string GCCIntSuffix> 533 // 534 class Hexagon_si_sfsf_Intrinsic<string GCCIntSuffix> 535 : Hexagon_Intrinsic<GCCIntSuffix, 536 [llvm_i32_ty], [llvm_float_ty, llvm_float_ty], 537 [IntrNoMem, Throws]>; 538 // 539 // Hexagon_si_sfsi_Intrinsic<string GCCIntSuffix> 540 // 541 class Hexagon_si_sfsi_Intrinsic<string GCCIntSuffix> 542 : Hexagon_Intrinsic<GCCIntSuffix, 543 [llvm_i32_ty], [llvm_float_ty, llvm_i32_ty], 544 [IntrNoMem, Throws]>; 545 // 546 // Hexagon_qi_sfqi_Intrinsic<string GCCIntSuffix> 547 // 548 class Hexagon_qi_sfqi_Intrinsic<string GCCIntSuffix> 549 : Hexagon_Intrinsic<GCCIntSuffix, 550 [llvm_i1_ty], [llvm_float_ty, llvm_i32_ty], 551 [IntrNoMem]>; 552 // 553 // Hexagon_sf_sfsfsf_Intrinsic<string GCCIntSuffix> 554 // 555 class Hexagon_sf_sfsfsf_Intrinsic<string GCCIntSuffix> 556 : Hexagon_Intrinsic<GCCIntSuffix, 557 [llvm_float_ty], [llvm_float_ty, llvm_float_ty, 558 llvm_float_ty], 559 [IntrNoMem, Throws]>; 560 // 561 // Hexagon_sf_sfsfsfqi_Intrinsic<string GCCIntSuffix> 562 // 563 class Hexagon_sf_sfsfsfqi_Intrinsic<string GCCIntSuffix> 564 : Hexagon_Intrinsic<GCCIntSuffix, 565 [llvm_float_ty], [llvm_float_ty, llvm_float_ty, 566 llvm_float_ty, 567 llvm_i32_ty], 568 [IntrNoMem, Throws]>; 569 // 570 // Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 571 // 572 class Hexagon_di_dididisi_Intrinsic<string GCCIntSuffix> 573 : Hexagon_Intrinsic<GCCIntSuffix, 574 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 575 llvm_i64_ty, llvm_i32_ty], 576 [IntrNoMem]>; 577 // 578 // Hexagon_df_si_Intrinsic<string GCCIntSuffix> 579 // 580 class Hexagon_df_si_Intrinsic<string GCCIntSuffix> 581 : Hexagon_Intrinsic<GCCIntSuffix, 582 [llvm_double_ty], [llvm_i32_ty], 583 [IntrNoMem, Throws]>; 584 // 585 // Hexagon_df_di_Intrinsic<string GCCIntSuffix> 586 // 587 class Hexagon_df_di_Intrinsic<string GCCIntSuffix> 588 : Hexagon_Intrinsic<GCCIntSuffix, 589 [llvm_double_ty], [llvm_i64_ty], 590 [IntrNoMem]>; 591 // 592 // Hexagon_di_df_Intrinsic<string GCCIntSuffix> 593 // 594 class Hexagon_di_df_Intrinsic<string GCCIntSuffix> 595 : Hexagon_Intrinsic<GCCIntSuffix, 596 [llvm_i64_ty], [llvm_double_ty], 597 [IntrNoMem]>; 598 // 599 // Hexagon_df_df_Intrinsic<string GCCIntSuffix> 600 // 601 class Hexagon_df_df_Intrinsic<string GCCIntSuffix> 602 : Hexagon_Intrinsic<GCCIntSuffix, 603 [llvm_double_ty], [llvm_double_ty], 604 [IntrNoMem]>; 605 // 606 // Hexagon_df_dfdf_Intrinsic<string GCCIntSuffix> 607 // 608 class Hexagon_df_dfdf_Intrinsic<string GCCIntSuffix> 609 : Hexagon_Intrinsic<GCCIntSuffix, 610 [llvm_double_ty], [llvm_double_ty, llvm_double_ty], 611 [IntrNoMem, Throws]>; 612 // 613 // Hexagon_si_dfdf_Intrinsic<string GCCIntSuffix> 614 // 615 class Hexagon_si_dfdf_Intrinsic<string GCCIntSuffix> 616 : Hexagon_Intrinsic<GCCIntSuffix, 617 [llvm_i32_ty], [llvm_double_ty, llvm_double_ty], 618 [IntrNoMem, Throws]>; 619 // 620 // Hexagon_si_dfsi_Intrinsic<string GCCIntSuffix> 621 // 622 class Hexagon_si_dfsi_Intrinsic<string GCCIntSuffix> 623 : Hexagon_Intrinsic<GCCIntSuffix, 624 [llvm_i32_ty], [llvm_double_ty, llvm_i32_ty], 625 [IntrNoMem, Throws]>; 626 // 627 // 628 // Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 629 // 630 class Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 631 : Hexagon_Intrinsic<GCCIntSuffix, 632 [llvm_double_ty], [llvm_double_ty, llvm_double_ty, 633 llvm_double_ty], 634 [IntrNoMem, Throws]>; 635 // 636 // Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 637 // 638 class Hexagon_df_dfdfdfqi_Intrinsic<string GCCIntSuffix> 639 : Hexagon_Intrinsic<GCCIntSuffix, 640 [llvm_double_ty], [llvm_double_ty, llvm_double_ty, 641 llvm_double_ty, 642 llvm_i32_ty], 643 [IntrNoMem, Throws]>; 644 645 646 // This one below will not be auto-generated, 647 // so make sure, you don't overwrite this one. 648 // 649 // BUILTIN_INFO(SI_to_SXTHI_asrh,SI_ftype_SI,1) 650 // 651 def int_hexagon_SI_to_SXTHI_asrh : 652 Hexagon_si_si_Intrinsic<"SI_to_SXTHI_asrh">; 653 // 654 // BUILTIN_INFO_NONCONST(brev_ldd,PTR_ftype_PTRPTRSI,3) 655 // 656 def int_hexagon_brev_ldd : 657 Hexagon_mem_memmemsi_Intrinsic<"brev_ldd">; 658 // 659 // BUILTIN_INFO_NONCONST(brev_ldw,PTR_ftype_PTRPTRSI,3) 660 // 661 def int_hexagon_brev_ldw : 662 Hexagon_mem_memmemsi_Intrinsic<"brev_ldw">; 663 // 664 // BUILTIN_INFO_NONCONST(brev_ldh,PTR_ftype_PTRPTRSI,3) 665 // 666 def int_hexagon_brev_ldh : 667 Hexagon_mem_memmemsi_Intrinsic<"brev_ldh">; 668 // 669 // BUILTIN_INFO_NONCONST(brev_lduh,PTR_ftype_PTRPTRSI,3) 670 // 671 def int_hexagon_brev_lduh : 672 Hexagon_mem_memmemsi_Intrinsic<"brev_lduh">; 673 // 674 // BUILTIN_INFO_NONCONST(brev_ldb,PTR_ftype_PTRPTRSI,3) 675 // 676 def int_hexagon_brev_ldb : 677 Hexagon_mem_memmemsi_Intrinsic<"brev_ldb">; 678 // 679 // BUILTIN_INFO_NONCONST(brev_ldub,PTR_ftype_PTRPTRSI,3) 680 // 681 def int_hexagon_brev_ldub : 682 Hexagon_mem_memmemsi_Intrinsic<"brev_ldub">; 683 // 684 // BUILTIN_INFO_NONCONST(circ_ldd,PTR_ftype_PTRPTRSISI,4) 685 // 686 def int_hexagon_circ_ldd : 687 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldd">; 688 // 689 // BUILTIN_INFO_NONCONST(circ_ldw,PTR_ftype_PTRPTRSISI,4) 690 // 691 def int_hexagon_circ_ldw : 692 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldw">; 693 // 694 // BUILTIN_INFO_NONCONST(circ_ldh,PTR_ftype_PTRPTRSISI,4) 695 // 696 def int_hexagon_circ_ldh : 697 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldh">; 698 // 699 // BUILTIN_INFO_NONCONST(circ_lduh,PTR_ftype_PTRPTRSISI,4) 700 // 701 def int_hexagon_circ_lduh : 702 Hexagon_mem_memmemsisi_Intrinsic<"circ_lduh">; 703 // 704 // BUILTIN_INFO_NONCONST(circ_ldb,PTR_ftype_PTRPTRSISI,4) 705 // 706 def int_hexagon_circ_ldb : 707 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldb">; 708 // 709 // BUILTIN_INFO_NONCONST(circ_ldub,PTR_ftype_PTRPTRSISI,4) 710 // 711 def int_hexagon_circ_ldub : 712 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldub">; 713 714 // 715 // BUILTIN_INFO_NONCONST(brev_stb,PTR_ftype_PTRSISI,3) 716 // 717 def int_hexagon_brev_stb : 718 Hexagon_mem_memsisi_Intrinsic<"brev_stb">; 719 // 720 // BUILTIN_INFO_NONCONST(brev_sthhi,PTR_ftype_PTRSISI,3) 721 // 722 def int_hexagon_brev_sthhi : 723 Hexagon_mem_memsisi_Intrinsic<"brev_sthhi">; 724 // 725 // BUILTIN_INFO_NONCONST(brev_sth,PTR_ftype_PTRSISI,3) 726 // 727 def int_hexagon_brev_sth : 728 Hexagon_mem_memsisi_Intrinsic<"brev_sth">; 729 // 730 // BUILTIN_INFO_NONCONST(brev_stw,PTR_ftype_PTRSISI,3) 731 // 732 def int_hexagon_brev_stw : 733 Hexagon_mem_memsisi_Intrinsic<"brev_stw">; 734 // 735 // BUILTIN_INFO_NONCONST(brev_std,PTR_ftype_PTRSISI,3) 736 // 737 def int_hexagon_brev_std : 738 Hexagon_mem_memdisi_Intrinsic<"brev_std">; 739 // 740 // BUILTIN_INFO_NONCONST(circ_std,PTR_ftype_PTRDISISI,4) 741 // 742 def int_hexagon_circ_std : 743 Hexagon_mem_memdisisi_Intrinsic<"circ_std">; 744 // 745 // BUILTIN_INFO_NONCONST(circ_stw,PTR_ftype_PTRSISISI,4) 746 // 747 def int_hexagon_circ_stw : 748 Hexagon_mem_memsisisi_Intrinsic<"circ_stw">; 749 // 750 // BUILTIN_INFO_NONCONST(circ_sth,PTR_ftype_PTRSISISI,4) 751 // 752 def int_hexagon_circ_sth : 753 Hexagon_mem_memsisisi_Intrinsic<"circ_sth">; 754 // 755 // BUILTIN_INFO_NONCONST(circ_sthhi,PTR_ftype_PTRSISISI,4) 756 // 757 def int_hexagon_circ_sthhi : 758 Hexagon_mem_memsisisi_Intrinsic<"circ_sthhi">; 759 // 760 // BUILTIN_INFO_NONCONST(circ_stb,PTR_ftype_PTRSISISI,4) 761 // 762 def int_hexagon_circ_stb : 763 Hexagon_mem_memsisisi_Intrinsic<"circ_stb">; 764 765 766 def int_hexagon_mm256i_vaddw : 767 Hexagon_v256_v256v256_Intrinsic<"_mm256i_vaddw">; 768 769 770 // This one above will not be auto-generated, 771 // so make sure, you don't overwrite this one. 772 // 773 // BUILTIN_INFO(HEXAGON.C2_cmpeq,QI_ftype_SISI,2) 774 // 775 def int_hexagon_C2_cmpeq : 776 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpeq">; 777 // 778 // BUILTIN_INFO(HEXAGON.C2_cmpgt,QI_ftype_SISI,2) 779 // 780 def int_hexagon_C2_cmpgt : 781 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgt">; 782 // 783 // BUILTIN_INFO(HEXAGON.C2_cmpgtu,QI_ftype_SISI,2) 784 // 785 def int_hexagon_C2_cmpgtu : 786 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgtu">; 787 // 788 // BUILTIN_INFO(HEXAGON.C2_cmpeqp,QI_ftype_DIDI,2) 789 // 790 def int_hexagon_C2_cmpeqp : 791 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpeqp">; 792 // 793 // BUILTIN_INFO(HEXAGON.C2_cmpgtp,QI_ftype_DIDI,2) 794 // 795 def int_hexagon_C2_cmpgtp : 796 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpgtp">; 797 // 798 // BUILTIN_INFO(HEXAGON.C2_cmpgtup,QI_ftype_DIDI,2) 799 // 800 def int_hexagon_C2_cmpgtup : 801 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpgtup">; 802 // 803 // BUILTIN_INFO(HEXAGON.A4_rcmpeqi,SI_ftype_SISI,2) 804 // 805 def int_hexagon_A4_rcmpeqi : 806 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpeqi">; 807 // 808 // BUILTIN_INFO(HEXAGON.A4_rcmpneqi,SI_ftype_SISI,2) 809 // 810 def int_hexagon_A4_rcmpneqi : 811 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpneqi">; 812 // 813 // BUILTIN_INFO(HEXAGON.A4_rcmpeq,SI_ftype_SISI,2) 814 // 815 def int_hexagon_A4_rcmpeq : 816 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpeq">; 817 // 818 // BUILTIN_INFO(HEXAGON.A4_rcmpneq,SI_ftype_SISI,2) 819 // 820 def int_hexagon_A4_rcmpneq : 821 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpneq">; 822 // 823 // BUILTIN_INFO(HEXAGON.C2_bitsset,QI_ftype_SISI,2) 824 // 825 def int_hexagon_C2_bitsset : 826 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsset">; 827 // 828 // BUILTIN_INFO(HEXAGON.C2_bitsclr,QI_ftype_SISI,2) 829 // 830 def int_hexagon_C2_bitsclr : 831 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsclr">; 832 // 833 // BUILTIN_INFO(HEXAGON.C4_nbitsset,QI_ftype_SISI,2) 834 // 835 def int_hexagon_C4_nbitsset : 836 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsset">; 837 // 838 // BUILTIN_INFO(HEXAGON.C4_nbitsclr,QI_ftype_SISI,2) 839 // 840 def int_hexagon_C4_nbitsclr : 841 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsclr">; 842 // 843 // BUILTIN_INFO(HEXAGON.C2_cmpeqi,QI_ftype_SISI,2) 844 // 845 def int_hexagon_C2_cmpeqi : 846 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpeqi">; 847 // 848 // BUILTIN_INFO(HEXAGON.C2_cmpgti,QI_ftype_SISI,2) 849 // 850 def int_hexagon_C2_cmpgti : 851 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgti">; 852 // 853 // BUILTIN_INFO(HEXAGON.C2_cmpgtui,QI_ftype_SISI,2) 854 // 855 def int_hexagon_C2_cmpgtui : 856 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgtui">; 857 // 858 // BUILTIN_INFO(HEXAGON.C2_cmpgei,QI_ftype_SISI,2) 859 // 860 def int_hexagon_C2_cmpgei : 861 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgei">; 862 // 863 // BUILTIN_INFO(HEXAGON.C2_cmpgeui,QI_ftype_SISI,2) 864 // 865 def int_hexagon_C2_cmpgeui : 866 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgeui">; 867 // 868 // BUILTIN_INFO(HEXAGON.C2_cmplt,QI_ftype_SISI,2) 869 // 870 def int_hexagon_C2_cmplt : 871 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmplt">; 872 // 873 // BUILTIN_INFO(HEXAGON.C2_cmpltu,QI_ftype_SISI,2) 874 // 875 def int_hexagon_C2_cmpltu : 876 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpltu">; 877 // 878 // BUILTIN_INFO(HEXAGON.C2_bitsclri,QI_ftype_SISI,2) 879 // 880 def int_hexagon_C2_bitsclri : 881 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsclri">; 882 // 883 // BUILTIN_INFO(HEXAGON.C4_nbitsclri,QI_ftype_SISI,2) 884 // 885 def int_hexagon_C4_nbitsclri : 886 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsclri">; 887 // 888 // BUILTIN_INFO(HEXAGON.C4_cmpneqi,QI_ftype_SISI,2) 889 // 890 def int_hexagon_C4_cmpneqi : 891 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpneqi">; 892 // 893 // BUILTIN_INFO(HEXAGON.C4_cmpltei,QI_ftype_SISI,2) 894 // 895 def int_hexagon_C4_cmpltei : 896 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpltei">; 897 // 898 // BUILTIN_INFO(HEXAGON.C4_cmplteui,QI_ftype_SISI,2) 899 // 900 def int_hexagon_C4_cmplteui : 901 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplteui">; 902 // 903 // BUILTIN_INFO(HEXAGON.C4_cmpneq,QI_ftype_SISI,2) 904 // 905 def int_hexagon_C4_cmpneq : 906 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpneq">; 907 // 908 // BUILTIN_INFO(HEXAGON.C4_cmplte,QI_ftype_SISI,2) 909 // 910 def int_hexagon_C4_cmplte : 911 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplte">; 912 // 913 // BUILTIN_INFO(HEXAGON.C4_cmplteu,QI_ftype_SISI,2) 914 // 915 def int_hexagon_C4_cmplteu : 916 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplteu">; 917 // 918 // BUILTIN_INFO(HEXAGON.C2_and,QI_ftype_QIQI,2) 919 // 920 def int_hexagon_C2_and : 921 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_and">; 922 // 923 // BUILTIN_INFO(HEXAGON.C2_or,QI_ftype_QIQI,2) 924 // 925 def int_hexagon_C2_or : 926 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_or">; 927 // 928 // BUILTIN_INFO(HEXAGON.C2_xor,QI_ftype_QIQI,2) 929 // 930 def int_hexagon_C2_xor : 931 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_xor">; 932 // 933 // BUILTIN_INFO(HEXAGON.C2_andn,QI_ftype_QIQI,2) 934 // 935 def int_hexagon_C2_andn : 936 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_andn">; 937 // 938 // BUILTIN_INFO(HEXAGON.C2_not,QI_ftype_QI,1) 939 // 940 def int_hexagon_C2_not : 941 Hexagon_si_si_Intrinsic<"HEXAGON_C2_not">; 942 // 943 // BUILTIN_INFO(HEXAGON.C2_orn,QI_ftype_QIQI,2) 944 // 945 def int_hexagon_C2_orn : 946 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_orn">; 947 // 948 // BUILTIN_INFO(HEXAGON.C4_and_and,QI_ftype_QIQIQI,3) 949 // 950 def int_hexagon_C4_and_and : 951 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_and">; 952 // 953 // BUILTIN_INFO(HEXAGON.C4_and_or,QI_ftype_QIQIQI,3) 954 // 955 def int_hexagon_C4_and_or : 956 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_or">; 957 // 958 // BUILTIN_INFO(HEXAGON.C4_or_and,QI_ftype_QIQIQI,3) 959 // 960 def int_hexagon_C4_or_and : 961 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_and">; 962 // 963 // BUILTIN_INFO(HEXAGON.C4_or_or,QI_ftype_QIQIQI,3) 964 // 965 def int_hexagon_C4_or_or : 966 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_or">; 967 // 968 // BUILTIN_INFO(HEXAGON.C4_and_andn,QI_ftype_QIQIQI,3) 969 // 970 def int_hexagon_C4_and_andn : 971 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_andn">; 972 // 973 // BUILTIN_INFO(HEXAGON.C4_and_orn,QI_ftype_QIQIQI,3) 974 // 975 def int_hexagon_C4_and_orn : 976 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_orn">; 977 // 978 // BUILTIN_INFO(HEXAGON.C4_or_andn,QI_ftype_QIQIQI,3) 979 // 980 def int_hexagon_C4_or_andn : 981 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_andn">; 982 // 983 // BUILTIN_INFO(HEXAGON.C4_or_orn,QI_ftype_QIQIQI,3) 984 // 985 def int_hexagon_C4_or_orn : 986 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_orn">; 987 // 988 // BUILTIN_INFO(HEXAGON.C2_pxfer_map,QI_ftype_QI,1) 989 // 990 def int_hexagon_C2_pxfer_map : 991 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_pxfer_map">; 992 // 993 // BUILTIN_INFO(HEXAGON.C2_any8,QI_ftype_QI,1) 994 // 995 def int_hexagon_C2_any8 : 996 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_any8">; 997 // 998 // BUILTIN_INFO(HEXAGON.C2_all8,QI_ftype_QI,1) 999 // 1000 def int_hexagon_C2_all8 : 1001 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_all8">; 1002 // 1003 // BUILTIN_INFO(HEXAGON.C2_vitpack,SI_ftype_QIQI,2) 1004 // 1005 def int_hexagon_C2_vitpack : 1006 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C2_vitpack">; 1007 // 1008 // BUILTIN_INFO(HEXAGON.C2_mux,SI_ftype_QISISI,3) 1009 // 1010 def int_hexagon_C2_mux : 1011 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_mux">; 1012 // 1013 // BUILTIN_INFO(HEXAGON.C2_muxii,SI_ftype_QISISI,3) 1014 // 1015 def int_hexagon_C2_muxii : 1016 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxii">; 1017 // 1018 // BUILTIN_INFO(HEXAGON.C2_muxir,SI_ftype_QISISI,3) 1019 // 1020 def int_hexagon_C2_muxir : 1021 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxir">; 1022 // 1023 // BUILTIN_INFO(HEXAGON.C2_muxri,SI_ftype_QISISI,3) 1024 // 1025 def int_hexagon_C2_muxri : 1026 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxri">; 1027 // 1028 // BUILTIN_INFO(HEXAGON.C2_vmux,DI_ftype_QIDIDI,3) 1029 // 1030 def int_hexagon_C2_vmux : 1031 Hexagon_di_qididi_Intrinsic<"HEXAGON_C2_vmux">; 1032 // 1033 // BUILTIN_INFO(HEXAGON.C2_mask,DI_ftype_QI,1) 1034 // 1035 def int_hexagon_C2_mask : 1036 Hexagon_di_qi_Intrinsic<"HEXAGON_C2_mask">; 1037 // 1038 // BUILTIN_INFO(HEXAGON.A2_vcmpbeq,QI_ftype_DIDI,2) 1039 // 1040 def int_hexagon_A2_vcmpbeq : 1041 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpbeq">; 1042 // 1043 // BUILTIN_INFO(HEXAGON.A4_vcmpbeqi,QI_ftype_DISI,2) 1044 // 1045 def int_hexagon_A4_vcmpbeqi : 1046 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbeqi">; 1047 // 1048 // BUILTIN_INFO(HEXAGON.A4_vcmpbeq_any,QI_ftype_DIDI,2) 1049 // 1050 def int_hexagon_A4_vcmpbeq_any : 1051 Hexagon_si_didi_Intrinsic<"HEXAGON_A4_vcmpbeq_any">; 1052 // 1053 // BUILTIN_INFO(HEXAGON.A2_vcmpbgtu,QI_ftype_DIDI,2) 1054 // 1055 def int_hexagon_A2_vcmpbgtu : 1056 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpbgtu">; 1057 // 1058 // BUILTIN_INFO(HEXAGON.A4_vcmpbgtui,QI_ftype_DISI,2) 1059 // 1060 def int_hexagon_A4_vcmpbgtui : 1061 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbgtui">; 1062 // 1063 // BUILTIN_INFO(HEXAGON.A4_vcmpbgt,QI_ftype_DIDI,2) 1064 // 1065 def int_hexagon_A4_vcmpbgt : 1066 Hexagon_si_didi_Intrinsic<"HEXAGON_A4_vcmpbgt">; 1067 // 1068 // BUILTIN_INFO(HEXAGON.A4_vcmpbgti,QI_ftype_DISI,2) 1069 // 1070 def int_hexagon_A4_vcmpbgti : 1071 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbgti">; 1072 // 1073 // BUILTIN_INFO(HEXAGON.A4_cmpbeq,QI_ftype_SISI,2) 1074 // 1075 def int_hexagon_A4_cmpbeq : 1076 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbeq">; 1077 // 1078 // BUILTIN_INFO(HEXAGON.A4_cmpbeqi,QI_ftype_SISI,2) 1079 // 1080 def int_hexagon_A4_cmpbeqi : 1081 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbeqi">; 1082 // 1083 // BUILTIN_INFO(HEXAGON.A4_cmpbgtu,QI_ftype_SISI,2) 1084 // 1085 def int_hexagon_A4_cmpbgtu : 1086 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgtu">; 1087 // 1088 // BUILTIN_INFO(HEXAGON.A4_cmpbgtui,QI_ftype_SISI,2) 1089 // 1090 def int_hexagon_A4_cmpbgtui : 1091 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgtui">; 1092 // 1093 // BUILTIN_INFO(HEXAGON.A4_cmpbgt,QI_ftype_SISI,2) 1094 // 1095 def int_hexagon_A4_cmpbgt : 1096 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgt">; 1097 // 1098 // BUILTIN_INFO(HEXAGON.A4_cmpbgti,QI_ftype_SISI,2) 1099 // 1100 def int_hexagon_A4_cmpbgti : 1101 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgti">; 1102 // 1103 // BUILTIN_INFO(HEXAGON.A2_vcmpheq,QI_ftype_DIDI,2) 1104 // 1105 def int_hexagon_A2_vcmpheq : 1106 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpheq">; 1107 // 1108 // BUILTIN_INFO(HEXAGON.A2_vcmphgt,QI_ftype_DIDI,2) 1109 // 1110 def int_hexagon_A2_vcmphgt : 1111 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmphgt">; 1112 // 1113 // BUILTIN_INFO(HEXAGON.A2_vcmphgtu,QI_ftype_DIDI,2) 1114 // 1115 def int_hexagon_A2_vcmphgtu : 1116 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmphgtu">; 1117 // 1118 // BUILTIN_INFO(HEXAGON.A4_vcmpheqi,QI_ftype_DISI,2) 1119 // 1120 def int_hexagon_A4_vcmpheqi : 1121 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpheqi">; 1122 // 1123 // BUILTIN_INFO(HEXAGON.A4_vcmphgti,QI_ftype_DISI,2) 1124 // 1125 def int_hexagon_A4_vcmphgti : 1126 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmphgti">; 1127 // 1128 // BUILTIN_INFO(HEXAGON.A4_vcmphgtui,QI_ftype_DISI,2) 1129 // 1130 def int_hexagon_A4_vcmphgtui : 1131 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmphgtui">; 1132 // 1133 // BUILTIN_INFO(HEXAGON.A4_cmpheq,QI_ftype_SISI,2) 1134 // 1135 def int_hexagon_A4_cmpheq : 1136 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpheq">; 1137 // 1138 // BUILTIN_INFO(HEXAGON.A4_cmphgt,QI_ftype_SISI,2) 1139 // 1140 def int_hexagon_A4_cmphgt : 1141 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgt">; 1142 // 1143 // BUILTIN_INFO(HEXAGON.A4_cmphgtu,QI_ftype_SISI,2) 1144 // 1145 def int_hexagon_A4_cmphgtu : 1146 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgtu">; 1147 // 1148 // BUILTIN_INFO(HEXAGON.A4_cmpheqi,QI_ftype_SISI,2) 1149 // 1150 def int_hexagon_A4_cmpheqi : 1151 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpheqi">; 1152 // 1153 // BUILTIN_INFO(HEXAGON.A4_cmphgti,QI_ftype_SISI,2) 1154 // 1155 def int_hexagon_A4_cmphgti : 1156 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgti">; 1157 // 1158 // BUILTIN_INFO(HEXAGON.A4_cmphgtui,QI_ftype_SISI,2) 1159 // 1160 def int_hexagon_A4_cmphgtui : 1161 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgtui">; 1162 // 1163 // BUILTIN_INFO(HEXAGON.A2_vcmpweq,QI_ftype_DIDI,2) 1164 // 1165 def int_hexagon_A2_vcmpweq : 1166 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpweq">; 1167 // 1168 // BUILTIN_INFO(HEXAGON.A2_vcmpwgt,QI_ftype_DIDI,2) 1169 // 1170 def int_hexagon_A2_vcmpwgt : 1171 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpwgt">; 1172 // 1173 // BUILTIN_INFO(HEXAGON.A2_vcmpwgtu,QI_ftype_DIDI,2) 1174 // 1175 def int_hexagon_A2_vcmpwgtu : 1176 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpwgtu">; 1177 // 1178 // BUILTIN_INFO(HEXAGON.A4_vcmpweqi,QI_ftype_DISI,2) 1179 // 1180 def int_hexagon_A4_vcmpweqi : 1181 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpweqi">; 1182 // 1183 // BUILTIN_INFO(HEXAGON.A4_vcmpwgti,QI_ftype_DISI,2) 1184 // 1185 def int_hexagon_A4_vcmpwgti : 1186 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpwgti">; 1187 // 1188 // BUILTIN_INFO(HEXAGON.A4_vcmpwgtui,QI_ftype_DISI,2) 1189 // 1190 def int_hexagon_A4_vcmpwgtui : 1191 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpwgtui">; 1192 // 1193 // BUILTIN_INFO(HEXAGON.A4_boundscheck,QI_ftype_SIDI,2) 1194 // 1195 def int_hexagon_A4_boundscheck : 1196 Hexagon_si_sidi_Intrinsic<"HEXAGON_A4_boundscheck">; 1197 // 1198 // BUILTIN_INFO(HEXAGON.A4_tlbmatch,QI_ftype_DISI,2) 1199 // 1200 def int_hexagon_A4_tlbmatch : 1201 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_tlbmatch">; 1202 // 1203 // BUILTIN_INFO(HEXAGON.C2_tfrpr,SI_ftype_QI,1) 1204 // 1205 def int_hexagon_C2_tfrpr : 1206 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_tfrpr">; 1207 // 1208 // BUILTIN_INFO(HEXAGON.C2_tfrrp,QI_ftype_SI,1) 1209 // 1210 def int_hexagon_C2_tfrrp : 1211 Hexagon_si_si_Intrinsic<"HEXAGON_C2_tfrrp">; 1212 // 1213 // BUILTIN_INFO(HEXAGON.C4_fastcorner9,QI_ftype_QIQI,2) 1214 // 1215 def int_hexagon_C4_fastcorner9 : 1216 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C4_fastcorner9">; 1217 // 1218 // BUILTIN_INFO(HEXAGON.C4_fastcorner9_not,QI_ftype_QIQI,2) 1219 // 1220 def int_hexagon_C4_fastcorner9_not : 1221 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C4_fastcorner9_not">; 1222 // 1223 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hh_s0,SI_ftype_SISISI,3) 1224 // 1225 def int_hexagon_M2_mpy_acc_hh_s0 : 1226 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hh_s0">; 1227 // 1228 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hh_s1,SI_ftype_SISISI,3) 1229 // 1230 def int_hexagon_M2_mpy_acc_hh_s1 : 1231 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hh_s1">; 1232 // 1233 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hl_s0,SI_ftype_SISISI,3) 1234 // 1235 def int_hexagon_M2_mpy_acc_hl_s0 : 1236 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hl_s0">; 1237 // 1238 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hl_s1,SI_ftype_SISISI,3) 1239 // 1240 def int_hexagon_M2_mpy_acc_hl_s1 : 1241 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hl_s1">; 1242 // 1243 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_lh_s0,SI_ftype_SISISI,3) 1244 // 1245 def int_hexagon_M2_mpy_acc_lh_s0 : 1246 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_lh_s0">; 1247 // 1248 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_lh_s1,SI_ftype_SISISI,3) 1249 // 1250 def int_hexagon_M2_mpy_acc_lh_s1 : 1251 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_lh_s1">; 1252 // 1253 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_ll_s0,SI_ftype_SISISI,3) 1254 // 1255 def int_hexagon_M2_mpy_acc_ll_s0 : 1256 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_ll_s0">; 1257 // 1258 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_ll_s1,SI_ftype_SISISI,3) 1259 // 1260 def int_hexagon_M2_mpy_acc_ll_s1 : 1261 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_ll_s1">; 1262 // 1263 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hh_s0,SI_ftype_SISISI,3) 1264 // 1265 def int_hexagon_M2_mpy_nac_hh_s0 : 1266 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hh_s0">; 1267 // 1268 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hh_s1,SI_ftype_SISISI,3) 1269 // 1270 def int_hexagon_M2_mpy_nac_hh_s1 : 1271 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hh_s1">; 1272 // 1273 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hl_s0,SI_ftype_SISISI,3) 1274 // 1275 def int_hexagon_M2_mpy_nac_hl_s0 : 1276 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hl_s0">; 1277 // 1278 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hl_s1,SI_ftype_SISISI,3) 1279 // 1280 def int_hexagon_M2_mpy_nac_hl_s1 : 1281 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hl_s1">; 1282 // 1283 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_lh_s0,SI_ftype_SISISI,3) 1284 // 1285 def int_hexagon_M2_mpy_nac_lh_s0 : 1286 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_lh_s0">; 1287 // 1288 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_lh_s1,SI_ftype_SISISI,3) 1289 // 1290 def int_hexagon_M2_mpy_nac_lh_s1 : 1291 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_lh_s1">; 1292 // 1293 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_ll_s0,SI_ftype_SISISI,3) 1294 // 1295 def int_hexagon_M2_mpy_nac_ll_s0 : 1296 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_ll_s0">; 1297 // 1298 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_ll_s1,SI_ftype_SISISI,3) 1299 // 1300 def int_hexagon_M2_mpy_nac_ll_s1 : 1301 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_ll_s1">; 1302 // 1303 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hh_s0,SI_ftype_SISISI,3) 1304 // 1305 def int_hexagon_M2_mpy_acc_sat_hh_s0 : 1306 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hh_s0">; 1307 // 1308 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hh_s1,SI_ftype_SISISI,3) 1309 // 1310 def int_hexagon_M2_mpy_acc_sat_hh_s1 : 1311 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hh_s1">; 1312 // 1313 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hl_s0,SI_ftype_SISISI,3) 1314 // 1315 def int_hexagon_M2_mpy_acc_sat_hl_s0 : 1316 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hl_s0">; 1317 // 1318 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hl_s1,SI_ftype_SISISI,3) 1319 // 1320 def int_hexagon_M2_mpy_acc_sat_hl_s1 : 1321 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hl_s1">; 1322 // 1323 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_lh_s0,SI_ftype_SISISI,3) 1324 // 1325 def int_hexagon_M2_mpy_acc_sat_lh_s0 : 1326 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_lh_s0">; 1327 // 1328 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_lh_s1,SI_ftype_SISISI,3) 1329 // 1330 def int_hexagon_M2_mpy_acc_sat_lh_s1 : 1331 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_lh_s1">; 1332 // 1333 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_ll_s0,SI_ftype_SISISI,3) 1334 // 1335 def int_hexagon_M2_mpy_acc_sat_ll_s0 : 1336 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_ll_s0">; 1337 // 1338 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_ll_s1,SI_ftype_SISISI,3) 1339 // 1340 def int_hexagon_M2_mpy_acc_sat_ll_s1 : 1341 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_ll_s1">; 1342 // 1343 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hh_s0,SI_ftype_SISISI,3) 1344 // 1345 def int_hexagon_M2_mpy_nac_sat_hh_s0 : 1346 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hh_s0">; 1347 // 1348 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hh_s1,SI_ftype_SISISI,3) 1349 // 1350 def int_hexagon_M2_mpy_nac_sat_hh_s1 : 1351 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hh_s1">; 1352 // 1353 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hl_s0,SI_ftype_SISISI,3) 1354 // 1355 def int_hexagon_M2_mpy_nac_sat_hl_s0 : 1356 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hl_s0">; 1357 // 1358 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hl_s1,SI_ftype_SISISI,3) 1359 // 1360 def int_hexagon_M2_mpy_nac_sat_hl_s1 : 1361 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hl_s1">; 1362 // 1363 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_lh_s0,SI_ftype_SISISI,3) 1364 // 1365 def int_hexagon_M2_mpy_nac_sat_lh_s0 : 1366 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_lh_s0">; 1367 // 1368 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_lh_s1,SI_ftype_SISISI,3) 1369 // 1370 def int_hexagon_M2_mpy_nac_sat_lh_s1 : 1371 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_lh_s1">; 1372 // 1373 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_ll_s0,SI_ftype_SISISI,3) 1374 // 1375 def int_hexagon_M2_mpy_nac_sat_ll_s0 : 1376 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_ll_s0">; 1377 // 1378 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_ll_s1,SI_ftype_SISISI,3) 1379 // 1380 def int_hexagon_M2_mpy_nac_sat_ll_s1 : 1381 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_ll_s1">; 1382 // 1383 // BUILTIN_INFO(HEXAGON.M2_mpy_hh_s0,SI_ftype_SISI,2) 1384 // 1385 def int_hexagon_M2_mpy_hh_s0 : 1386 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hh_s0">; 1387 // 1388 // BUILTIN_INFO(HEXAGON.M2_mpy_hh_s1,SI_ftype_SISI,2) 1389 // 1390 def int_hexagon_M2_mpy_hh_s1 : 1391 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hh_s1">; 1392 // 1393 // BUILTIN_INFO(HEXAGON.M2_mpy_hl_s0,SI_ftype_SISI,2) 1394 // 1395 def int_hexagon_M2_mpy_hl_s0 : 1396 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hl_s0">; 1397 // 1398 // BUILTIN_INFO(HEXAGON.M2_mpy_hl_s1,SI_ftype_SISI,2) 1399 // 1400 def int_hexagon_M2_mpy_hl_s1 : 1401 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hl_s1">; 1402 // 1403 // BUILTIN_INFO(HEXAGON.M2_mpy_lh_s0,SI_ftype_SISI,2) 1404 // 1405 def int_hexagon_M2_mpy_lh_s0 : 1406 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_lh_s0">; 1407 // 1408 // BUILTIN_INFO(HEXAGON.M2_mpy_lh_s1,SI_ftype_SISI,2) 1409 // 1410 def int_hexagon_M2_mpy_lh_s1 : 1411 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_lh_s1">; 1412 // 1413 // BUILTIN_INFO(HEXAGON.M2_mpy_ll_s0,SI_ftype_SISI,2) 1414 // 1415 def int_hexagon_M2_mpy_ll_s0 : 1416 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_ll_s0">; 1417 // 1418 // BUILTIN_INFO(HEXAGON.M2_mpy_ll_s1,SI_ftype_SISI,2) 1419 // 1420 def int_hexagon_M2_mpy_ll_s1 : 1421 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_ll_s1">; 1422 // 1423 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hh_s0,SI_ftype_SISI,2) 1424 // 1425 def int_hexagon_M2_mpy_sat_hh_s0 : 1426 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hh_s0">; 1427 // 1428 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hh_s1,SI_ftype_SISI,2) 1429 // 1430 def int_hexagon_M2_mpy_sat_hh_s1 : 1431 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hh_s1">; 1432 // 1433 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hl_s0,SI_ftype_SISI,2) 1434 // 1435 def int_hexagon_M2_mpy_sat_hl_s0 : 1436 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hl_s0">; 1437 // 1438 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hl_s1,SI_ftype_SISI,2) 1439 // 1440 def int_hexagon_M2_mpy_sat_hl_s1 : 1441 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hl_s1">; 1442 // 1443 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_lh_s0,SI_ftype_SISI,2) 1444 // 1445 def int_hexagon_M2_mpy_sat_lh_s0 : 1446 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_lh_s0">; 1447 // 1448 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_lh_s1,SI_ftype_SISI,2) 1449 // 1450 def int_hexagon_M2_mpy_sat_lh_s1 : 1451 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_lh_s1">; 1452 // 1453 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_ll_s0,SI_ftype_SISI,2) 1454 // 1455 def int_hexagon_M2_mpy_sat_ll_s0 : 1456 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_ll_s0">; 1457 // 1458 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_ll_s1,SI_ftype_SISI,2) 1459 // 1460 def int_hexagon_M2_mpy_sat_ll_s1 : 1461 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_ll_s1">; 1462 // 1463 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hh_s0,SI_ftype_SISI,2) 1464 // 1465 def int_hexagon_M2_mpy_rnd_hh_s0 : 1466 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hh_s0">; 1467 // 1468 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hh_s1,SI_ftype_SISI,2) 1469 // 1470 def int_hexagon_M2_mpy_rnd_hh_s1 : 1471 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hh_s1">; 1472 // 1473 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hl_s0,SI_ftype_SISI,2) 1474 // 1475 def int_hexagon_M2_mpy_rnd_hl_s0 : 1476 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hl_s0">; 1477 // 1478 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hl_s1,SI_ftype_SISI,2) 1479 // 1480 def int_hexagon_M2_mpy_rnd_hl_s1 : 1481 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hl_s1">; 1482 // 1483 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_lh_s0,SI_ftype_SISI,2) 1484 // 1485 def int_hexagon_M2_mpy_rnd_lh_s0 : 1486 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_lh_s0">; 1487 // 1488 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_lh_s1,SI_ftype_SISI,2) 1489 // 1490 def int_hexagon_M2_mpy_rnd_lh_s1 : 1491 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_lh_s1">; 1492 // 1493 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_ll_s0,SI_ftype_SISI,2) 1494 // 1495 def int_hexagon_M2_mpy_rnd_ll_s0 : 1496 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_ll_s0">; 1497 // 1498 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_ll_s1,SI_ftype_SISI,2) 1499 // 1500 def int_hexagon_M2_mpy_rnd_ll_s1 : 1501 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_ll_s1">; 1502 // 1503 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hh_s0,SI_ftype_SISI,2) 1504 // 1505 def int_hexagon_M2_mpy_sat_rnd_hh_s0 : 1506 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hh_s0">; 1507 // 1508 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hh_s1,SI_ftype_SISI,2) 1509 // 1510 def int_hexagon_M2_mpy_sat_rnd_hh_s1 : 1511 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hh_s1">; 1512 // 1513 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hl_s0,SI_ftype_SISI,2) 1514 // 1515 def int_hexagon_M2_mpy_sat_rnd_hl_s0 : 1516 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hl_s0">; 1517 // 1518 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hl_s1,SI_ftype_SISI,2) 1519 // 1520 def int_hexagon_M2_mpy_sat_rnd_hl_s1 : 1521 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hl_s1">; 1522 // 1523 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_lh_s0,SI_ftype_SISI,2) 1524 // 1525 def int_hexagon_M2_mpy_sat_rnd_lh_s0 : 1526 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_lh_s0">; 1527 // 1528 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_lh_s1,SI_ftype_SISI,2) 1529 // 1530 def int_hexagon_M2_mpy_sat_rnd_lh_s1 : 1531 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_lh_s1">; 1532 // 1533 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_ll_s0,SI_ftype_SISI,2) 1534 // 1535 def int_hexagon_M2_mpy_sat_rnd_ll_s0 : 1536 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_ll_s0">; 1537 // 1538 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_ll_s1,SI_ftype_SISI,2) 1539 // 1540 def int_hexagon_M2_mpy_sat_rnd_ll_s1 : 1541 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_ll_s1">; 1542 // 1543 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hh_s0,DI_ftype_DISISI,3) 1544 // 1545 def int_hexagon_M2_mpyd_acc_hh_s0 : 1546 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hh_s0">; 1547 // 1548 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hh_s1,DI_ftype_DISISI,3) 1549 // 1550 def int_hexagon_M2_mpyd_acc_hh_s1 : 1551 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hh_s1">; 1552 // 1553 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hl_s0,DI_ftype_DISISI,3) 1554 // 1555 def int_hexagon_M2_mpyd_acc_hl_s0 : 1556 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hl_s0">; 1557 // 1558 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hl_s1,DI_ftype_DISISI,3) 1559 // 1560 def int_hexagon_M2_mpyd_acc_hl_s1 : 1561 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hl_s1">; 1562 // 1563 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_lh_s0,DI_ftype_DISISI,3) 1564 // 1565 def int_hexagon_M2_mpyd_acc_lh_s0 : 1566 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_lh_s0">; 1567 // 1568 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_lh_s1,DI_ftype_DISISI,3) 1569 // 1570 def int_hexagon_M2_mpyd_acc_lh_s1 : 1571 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_lh_s1">; 1572 // 1573 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_ll_s0,DI_ftype_DISISI,3) 1574 // 1575 def int_hexagon_M2_mpyd_acc_ll_s0 : 1576 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_ll_s0">; 1577 // 1578 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_ll_s1,DI_ftype_DISISI,3) 1579 // 1580 def int_hexagon_M2_mpyd_acc_ll_s1 : 1581 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_ll_s1">; 1582 // 1583 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hh_s0,DI_ftype_DISISI,3) 1584 // 1585 def int_hexagon_M2_mpyd_nac_hh_s0 : 1586 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hh_s0">; 1587 // 1588 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hh_s1,DI_ftype_DISISI,3) 1589 // 1590 def int_hexagon_M2_mpyd_nac_hh_s1 : 1591 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hh_s1">; 1592 // 1593 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hl_s0,DI_ftype_DISISI,3) 1594 // 1595 def int_hexagon_M2_mpyd_nac_hl_s0 : 1596 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hl_s0">; 1597 // 1598 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hl_s1,DI_ftype_DISISI,3) 1599 // 1600 def int_hexagon_M2_mpyd_nac_hl_s1 : 1601 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hl_s1">; 1602 // 1603 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_lh_s0,DI_ftype_DISISI,3) 1604 // 1605 def int_hexagon_M2_mpyd_nac_lh_s0 : 1606 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_lh_s0">; 1607 // 1608 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_lh_s1,DI_ftype_DISISI,3) 1609 // 1610 def int_hexagon_M2_mpyd_nac_lh_s1 : 1611 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_lh_s1">; 1612 // 1613 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_ll_s0,DI_ftype_DISISI,3) 1614 // 1615 def int_hexagon_M2_mpyd_nac_ll_s0 : 1616 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_ll_s0">; 1617 // 1618 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_ll_s1,DI_ftype_DISISI,3) 1619 // 1620 def int_hexagon_M2_mpyd_nac_ll_s1 : 1621 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_ll_s1">; 1622 // 1623 // BUILTIN_INFO(HEXAGON.M2_mpyd_hh_s0,DI_ftype_SISI,2) 1624 // 1625 def int_hexagon_M2_mpyd_hh_s0 : 1626 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hh_s0">; 1627 // 1628 // BUILTIN_INFO(HEXAGON.M2_mpyd_hh_s1,DI_ftype_SISI,2) 1629 // 1630 def int_hexagon_M2_mpyd_hh_s1 : 1631 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hh_s1">; 1632 // 1633 // BUILTIN_INFO(HEXAGON.M2_mpyd_hl_s0,DI_ftype_SISI,2) 1634 // 1635 def int_hexagon_M2_mpyd_hl_s0 : 1636 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hl_s0">; 1637 // 1638 // BUILTIN_INFO(HEXAGON.M2_mpyd_hl_s1,DI_ftype_SISI,2) 1639 // 1640 def int_hexagon_M2_mpyd_hl_s1 : 1641 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hl_s1">; 1642 // 1643 // BUILTIN_INFO(HEXAGON.M2_mpyd_lh_s0,DI_ftype_SISI,2) 1644 // 1645 def int_hexagon_M2_mpyd_lh_s0 : 1646 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_lh_s0">; 1647 // 1648 // BUILTIN_INFO(HEXAGON.M2_mpyd_lh_s1,DI_ftype_SISI,2) 1649 // 1650 def int_hexagon_M2_mpyd_lh_s1 : 1651 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_lh_s1">; 1652 // 1653 // BUILTIN_INFO(HEXAGON.M2_mpyd_ll_s0,DI_ftype_SISI,2) 1654 // 1655 def int_hexagon_M2_mpyd_ll_s0 : 1656 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_ll_s0">; 1657 // 1658 // BUILTIN_INFO(HEXAGON.M2_mpyd_ll_s1,DI_ftype_SISI,2) 1659 // 1660 def int_hexagon_M2_mpyd_ll_s1 : 1661 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_ll_s1">; 1662 // 1663 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hh_s0,DI_ftype_SISI,2) 1664 // 1665 def int_hexagon_M2_mpyd_rnd_hh_s0 : 1666 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hh_s0">; 1667 // 1668 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hh_s1,DI_ftype_SISI,2) 1669 // 1670 def int_hexagon_M2_mpyd_rnd_hh_s1 : 1671 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hh_s1">; 1672 // 1673 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hl_s0,DI_ftype_SISI,2) 1674 // 1675 def int_hexagon_M2_mpyd_rnd_hl_s0 : 1676 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hl_s0">; 1677 // 1678 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hl_s1,DI_ftype_SISI,2) 1679 // 1680 def int_hexagon_M2_mpyd_rnd_hl_s1 : 1681 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hl_s1">; 1682 // 1683 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_lh_s0,DI_ftype_SISI,2) 1684 // 1685 def int_hexagon_M2_mpyd_rnd_lh_s0 : 1686 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_lh_s0">; 1687 // 1688 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_lh_s1,DI_ftype_SISI,2) 1689 // 1690 def int_hexagon_M2_mpyd_rnd_lh_s1 : 1691 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_lh_s1">; 1692 // 1693 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_ll_s0,DI_ftype_SISI,2) 1694 // 1695 def int_hexagon_M2_mpyd_rnd_ll_s0 : 1696 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_ll_s0">; 1697 // 1698 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_ll_s1,DI_ftype_SISI,2) 1699 // 1700 def int_hexagon_M2_mpyd_rnd_ll_s1 : 1701 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_ll_s1">; 1702 // 1703 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hh_s0,SI_ftype_SISISI,3) 1704 // 1705 def int_hexagon_M2_mpyu_acc_hh_s0 : 1706 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hh_s0">; 1707 // 1708 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hh_s1,SI_ftype_SISISI,3) 1709 // 1710 def int_hexagon_M2_mpyu_acc_hh_s1 : 1711 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hh_s1">; 1712 // 1713 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hl_s0,SI_ftype_SISISI,3) 1714 // 1715 def int_hexagon_M2_mpyu_acc_hl_s0 : 1716 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hl_s0">; 1717 // 1718 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hl_s1,SI_ftype_SISISI,3) 1719 // 1720 def int_hexagon_M2_mpyu_acc_hl_s1 : 1721 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hl_s1">; 1722 // 1723 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_lh_s0,SI_ftype_SISISI,3) 1724 // 1725 def int_hexagon_M2_mpyu_acc_lh_s0 : 1726 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_lh_s0">; 1727 // 1728 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_lh_s1,SI_ftype_SISISI,3) 1729 // 1730 def int_hexagon_M2_mpyu_acc_lh_s1 : 1731 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_lh_s1">; 1732 // 1733 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_ll_s0,SI_ftype_SISISI,3) 1734 // 1735 def int_hexagon_M2_mpyu_acc_ll_s0 : 1736 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_ll_s0">; 1737 // 1738 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_ll_s1,SI_ftype_SISISI,3) 1739 // 1740 def int_hexagon_M2_mpyu_acc_ll_s1 : 1741 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_ll_s1">; 1742 // 1743 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hh_s0,SI_ftype_SISISI,3) 1744 // 1745 def int_hexagon_M2_mpyu_nac_hh_s0 : 1746 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hh_s0">; 1747 // 1748 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hh_s1,SI_ftype_SISISI,3) 1749 // 1750 def int_hexagon_M2_mpyu_nac_hh_s1 : 1751 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hh_s1">; 1752 // 1753 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hl_s0,SI_ftype_SISISI,3) 1754 // 1755 def int_hexagon_M2_mpyu_nac_hl_s0 : 1756 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hl_s0">; 1757 // 1758 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hl_s1,SI_ftype_SISISI,3) 1759 // 1760 def int_hexagon_M2_mpyu_nac_hl_s1 : 1761 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hl_s1">; 1762 // 1763 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_lh_s0,SI_ftype_SISISI,3) 1764 // 1765 def int_hexagon_M2_mpyu_nac_lh_s0 : 1766 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_lh_s0">; 1767 // 1768 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_lh_s1,SI_ftype_SISISI,3) 1769 // 1770 def int_hexagon_M2_mpyu_nac_lh_s1 : 1771 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_lh_s1">; 1772 // 1773 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_ll_s0,SI_ftype_SISISI,3) 1774 // 1775 def int_hexagon_M2_mpyu_nac_ll_s0 : 1776 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_ll_s0">; 1777 // 1778 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_ll_s1,SI_ftype_SISISI,3) 1779 // 1780 def int_hexagon_M2_mpyu_nac_ll_s1 : 1781 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_ll_s1">; 1782 // 1783 // BUILTIN_INFO(HEXAGON.M2_mpyu_hh_s0,USI_ftype_SISI,2) 1784 // 1785 def int_hexagon_M2_mpyu_hh_s0 : 1786 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hh_s0">; 1787 // 1788 // BUILTIN_INFO(HEXAGON.M2_mpyu_hh_s1,USI_ftype_SISI,2) 1789 // 1790 def int_hexagon_M2_mpyu_hh_s1 : 1791 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hh_s1">; 1792 // 1793 // BUILTIN_INFO(HEXAGON.M2_mpyu_hl_s0,USI_ftype_SISI,2) 1794 // 1795 def int_hexagon_M2_mpyu_hl_s0 : 1796 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hl_s0">; 1797 // 1798 // BUILTIN_INFO(HEXAGON.M2_mpyu_hl_s1,USI_ftype_SISI,2) 1799 // 1800 def int_hexagon_M2_mpyu_hl_s1 : 1801 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hl_s1">; 1802 // 1803 // BUILTIN_INFO(HEXAGON.M2_mpyu_lh_s0,USI_ftype_SISI,2) 1804 // 1805 def int_hexagon_M2_mpyu_lh_s0 : 1806 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_lh_s0">; 1807 // 1808 // BUILTIN_INFO(HEXAGON.M2_mpyu_lh_s1,USI_ftype_SISI,2) 1809 // 1810 def int_hexagon_M2_mpyu_lh_s1 : 1811 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_lh_s1">; 1812 // 1813 // BUILTIN_INFO(HEXAGON.M2_mpyu_ll_s0,USI_ftype_SISI,2) 1814 // 1815 def int_hexagon_M2_mpyu_ll_s0 : 1816 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_ll_s0">; 1817 // 1818 // BUILTIN_INFO(HEXAGON.M2_mpyu_ll_s1,USI_ftype_SISI,2) 1819 // 1820 def int_hexagon_M2_mpyu_ll_s1 : 1821 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_ll_s1">; 1822 // 1823 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hh_s0,DI_ftype_DISISI,3) 1824 // 1825 def int_hexagon_M2_mpyud_acc_hh_s0 : 1826 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hh_s0">; 1827 // 1828 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hh_s1,DI_ftype_DISISI,3) 1829 // 1830 def int_hexagon_M2_mpyud_acc_hh_s1 : 1831 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hh_s1">; 1832 // 1833 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hl_s0,DI_ftype_DISISI,3) 1834 // 1835 def int_hexagon_M2_mpyud_acc_hl_s0 : 1836 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hl_s0">; 1837 // 1838 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hl_s1,DI_ftype_DISISI,3) 1839 // 1840 def int_hexagon_M2_mpyud_acc_hl_s1 : 1841 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hl_s1">; 1842 // 1843 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_lh_s0,DI_ftype_DISISI,3) 1844 // 1845 def int_hexagon_M2_mpyud_acc_lh_s0 : 1846 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_lh_s0">; 1847 // 1848 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_lh_s1,DI_ftype_DISISI,3) 1849 // 1850 def int_hexagon_M2_mpyud_acc_lh_s1 : 1851 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_lh_s1">; 1852 // 1853 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_ll_s0,DI_ftype_DISISI,3) 1854 // 1855 def int_hexagon_M2_mpyud_acc_ll_s0 : 1856 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_ll_s0">; 1857 // 1858 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_ll_s1,DI_ftype_DISISI,3) 1859 // 1860 def int_hexagon_M2_mpyud_acc_ll_s1 : 1861 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_ll_s1">; 1862 // 1863 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hh_s0,DI_ftype_DISISI,3) 1864 // 1865 def int_hexagon_M2_mpyud_nac_hh_s0 : 1866 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hh_s0">; 1867 // 1868 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hh_s1,DI_ftype_DISISI,3) 1869 // 1870 def int_hexagon_M2_mpyud_nac_hh_s1 : 1871 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hh_s1">; 1872 // 1873 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hl_s0,DI_ftype_DISISI,3) 1874 // 1875 def int_hexagon_M2_mpyud_nac_hl_s0 : 1876 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hl_s0">; 1877 // 1878 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hl_s1,DI_ftype_DISISI,3) 1879 // 1880 def int_hexagon_M2_mpyud_nac_hl_s1 : 1881 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hl_s1">; 1882 // 1883 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_lh_s0,DI_ftype_DISISI,3) 1884 // 1885 def int_hexagon_M2_mpyud_nac_lh_s0 : 1886 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_lh_s0">; 1887 // 1888 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_lh_s1,DI_ftype_DISISI,3) 1889 // 1890 def int_hexagon_M2_mpyud_nac_lh_s1 : 1891 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_lh_s1">; 1892 // 1893 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_ll_s0,DI_ftype_DISISI,3) 1894 // 1895 def int_hexagon_M2_mpyud_nac_ll_s0 : 1896 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_ll_s0">; 1897 // 1898 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_ll_s1,DI_ftype_DISISI,3) 1899 // 1900 def int_hexagon_M2_mpyud_nac_ll_s1 : 1901 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_ll_s1">; 1902 // 1903 // BUILTIN_INFO(HEXAGON.M2_mpyud_hh_s0,UDI_ftype_SISI,2) 1904 // 1905 def int_hexagon_M2_mpyud_hh_s0 : 1906 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hh_s0">; 1907 // 1908 // BUILTIN_INFO(HEXAGON.M2_mpyud_hh_s1,UDI_ftype_SISI,2) 1909 // 1910 def int_hexagon_M2_mpyud_hh_s1 : 1911 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hh_s1">; 1912 // 1913 // BUILTIN_INFO(HEXAGON.M2_mpyud_hl_s0,UDI_ftype_SISI,2) 1914 // 1915 def int_hexagon_M2_mpyud_hl_s0 : 1916 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hl_s0">; 1917 // 1918 // BUILTIN_INFO(HEXAGON.M2_mpyud_hl_s1,UDI_ftype_SISI,2) 1919 // 1920 def int_hexagon_M2_mpyud_hl_s1 : 1921 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hl_s1">; 1922 // 1923 // BUILTIN_INFO(HEXAGON.M2_mpyud_lh_s0,UDI_ftype_SISI,2) 1924 // 1925 def int_hexagon_M2_mpyud_lh_s0 : 1926 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_lh_s0">; 1927 // 1928 // BUILTIN_INFO(HEXAGON.M2_mpyud_lh_s1,UDI_ftype_SISI,2) 1929 // 1930 def int_hexagon_M2_mpyud_lh_s1 : 1931 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_lh_s1">; 1932 // 1933 // BUILTIN_INFO(HEXAGON.M2_mpyud_ll_s0,UDI_ftype_SISI,2) 1934 // 1935 def int_hexagon_M2_mpyud_ll_s0 : 1936 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_ll_s0">; 1937 // 1938 // BUILTIN_INFO(HEXAGON.M2_mpyud_ll_s1,UDI_ftype_SISI,2) 1939 // 1940 def int_hexagon_M2_mpyud_ll_s1 : 1941 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_ll_s1">; 1942 // 1943 // BUILTIN_INFO(HEXAGON.M2_mpysmi,SI_ftype_SISI,2) 1944 // 1945 def int_hexagon_M2_mpysmi : 1946 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpysmi">; 1947 // 1948 // BUILTIN_INFO(HEXAGON.M2_macsip,SI_ftype_SISISI,3) 1949 // 1950 def int_hexagon_M2_macsip : 1951 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_macsip">; 1952 // 1953 // BUILTIN_INFO(HEXAGON.M2_macsin,SI_ftype_SISISI,3) 1954 // 1955 def int_hexagon_M2_macsin : 1956 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_macsin">; 1957 // 1958 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_s0,DI_ftype_SISI,2) 1959 // 1960 def int_hexagon_M2_dpmpyss_s0 : 1961 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_dpmpyss_s0">; 1962 // 1963 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_acc_s0,DI_ftype_DISISI,3) 1964 // 1965 def int_hexagon_M2_dpmpyss_acc_s0 : 1966 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyss_acc_s0">; 1967 // 1968 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_nac_s0,DI_ftype_DISISI,3) 1969 // 1970 def int_hexagon_M2_dpmpyss_nac_s0 : 1971 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyss_nac_s0">; 1972 // 1973 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_s0,UDI_ftype_SISI,2) 1974 // 1975 def int_hexagon_M2_dpmpyuu_s0 : 1976 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_dpmpyuu_s0">; 1977 // 1978 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_acc_s0,DI_ftype_DISISI,3) 1979 // 1980 def int_hexagon_M2_dpmpyuu_acc_s0 : 1981 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyuu_acc_s0">; 1982 // 1983 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_nac_s0,DI_ftype_DISISI,3) 1984 // 1985 def int_hexagon_M2_dpmpyuu_nac_s0 : 1986 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyuu_nac_s0">; 1987 // 1988 // BUILTIN_INFO(HEXAGON.M2_mpy_up,SI_ftype_SISI,2) 1989 // 1990 def int_hexagon_M2_mpy_up : 1991 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up">; 1992 // 1993 // BUILTIN_INFO(HEXAGON.M2_mpy_up_s1,SI_ftype_SISI,2) 1994 // 1995 def int_hexagon_M2_mpy_up_s1 : 1996 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up_s1">; 1997 // 1998 // BUILTIN_INFO(HEXAGON.M2_mpy_up_s1_sat,SI_ftype_SISI,2) 1999 // 2000 def int_hexagon_M2_mpy_up_s1_sat : 2001 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up_s1_sat">; 2002 // 2003 // BUILTIN_INFO(HEXAGON.M2_mpyu_up,USI_ftype_SISI,2) 2004 // 2005 def int_hexagon_M2_mpyu_up : 2006 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_up">; 2007 // 2008 // BUILTIN_INFO(HEXAGON.M2_mpysu_up,SI_ftype_SISI,2) 2009 // 2010 def int_hexagon_M2_mpysu_up : 2011 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpysu_up">; 2012 // 2013 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_rnd_s0,SI_ftype_SISI,2) 2014 // 2015 def int_hexagon_M2_dpmpyss_rnd_s0 : 2016 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_dpmpyss_rnd_s0">; 2017 // 2018 // BUILTIN_INFO(HEXAGON.M4_mac_up_s1_sat,SI_ftype_SISISI,3) 2019 // 2020 def int_hexagon_M4_mac_up_s1_sat : 2021 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mac_up_s1_sat">; 2022 // 2023 // BUILTIN_INFO(HEXAGON.M4_nac_up_s1_sat,SI_ftype_SISISI,3) 2024 // 2025 def int_hexagon_M4_nac_up_s1_sat : 2026 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_nac_up_s1_sat">; 2027 // 2028 // BUILTIN_INFO(HEXAGON.M2_mpyi,SI_ftype_SISI,2) 2029 // 2030 def int_hexagon_M2_mpyi : 2031 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyi">; 2032 // 2033 // BUILTIN_INFO(HEXAGON.M2_mpyui,SI_ftype_SISI,2) 2034 // 2035 def int_hexagon_M2_mpyui : 2036 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyui">; 2037 // 2038 // BUILTIN_INFO(HEXAGON.M2_maci,SI_ftype_SISISI,3) 2039 // 2040 def int_hexagon_M2_maci : 2041 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_maci">; 2042 // 2043 // BUILTIN_INFO(HEXAGON.M2_acci,SI_ftype_SISISI,3) 2044 // 2045 def int_hexagon_M2_acci : 2046 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_acci">; 2047 // 2048 // BUILTIN_INFO(HEXAGON.M2_accii,SI_ftype_SISISI,3) 2049 // 2050 def int_hexagon_M2_accii : 2051 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_accii">; 2052 // 2053 // BUILTIN_INFO(HEXAGON.M2_nacci,SI_ftype_SISISI,3) 2054 // 2055 def int_hexagon_M2_nacci : 2056 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_nacci">; 2057 // 2058 // BUILTIN_INFO(HEXAGON.M2_naccii,SI_ftype_SISISI,3) 2059 // 2060 def int_hexagon_M2_naccii : 2061 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_naccii">; 2062 // 2063 // BUILTIN_INFO(HEXAGON.M2_subacc,SI_ftype_SISISI,3) 2064 // 2065 def int_hexagon_M2_subacc : 2066 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_subacc">; 2067 // 2068 // BUILTIN_INFO(HEXAGON.M4_mpyrr_addr,SI_ftype_SISISI,3) 2069 // 2070 def int_hexagon_M4_mpyrr_addr : 2071 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyrr_addr">; 2072 // 2073 // BUILTIN_INFO(HEXAGON.M4_mpyri_addr_u2,SI_ftype_SISISI,3) 2074 // 2075 def int_hexagon_M4_mpyri_addr_u2 : 2076 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addr_u2">; 2077 // 2078 // BUILTIN_INFO(HEXAGON.M4_mpyri_addr,SI_ftype_SISISI,3) 2079 // 2080 def int_hexagon_M4_mpyri_addr : 2081 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addr">; 2082 // 2083 // BUILTIN_INFO(HEXAGON.M4_mpyri_addi,SI_ftype_SISISI,3) 2084 // 2085 def int_hexagon_M4_mpyri_addi : 2086 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addi">; 2087 // 2088 // BUILTIN_INFO(HEXAGON.M4_mpyrr_addi,SI_ftype_SISISI,3) 2089 // 2090 def int_hexagon_M4_mpyrr_addi : 2091 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyrr_addi">; 2092 // 2093 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s0,DI_ftype_SISI,2) 2094 // 2095 def int_hexagon_M2_vmpy2s_s0 : 2096 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s0">; 2097 // 2098 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s1,DI_ftype_SISI,2) 2099 // 2100 def int_hexagon_M2_vmpy2s_s1 : 2101 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s1">; 2102 // 2103 // BUILTIN_INFO(HEXAGON.M2_vmac2s_s0,DI_ftype_DISISI,3) 2104 // 2105 def int_hexagon_M2_vmac2s_s0 : 2106 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2s_s0">; 2107 // 2108 // BUILTIN_INFO(HEXAGON.M2_vmac2s_s1,DI_ftype_DISISI,3) 2109 // 2110 def int_hexagon_M2_vmac2s_s1 : 2111 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2s_s1">; 2112 // 2113 // BUILTIN_INFO(HEXAGON.M2_vmpy2su_s0,DI_ftype_SISI,2) 2114 // 2115 def int_hexagon_M2_vmpy2su_s0 : 2116 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2su_s0">; 2117 // 2118 // BUILTIN_INFO(HEXAGON.M2_vmpy2su_s1,DI_ftype_SISI,2) 2119 // 2120 def int_hexagon_M2_vmpy2su_s1 : 2121 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2su_s1">; 2122 // 2123 // BUILTIN_INFO(HEXAGON.M2_vmac2su_s0,DI_ftype_DISISI,3) 2124 // 2125 def int_hexagon_M2_vmac2su_s0 : 2126 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2su_s0">; 2127 // 2128 // BUILTIN_INFO(HEXAGON.M2_vmac2su_s1,DI_ftype_DISISI,3) 2129 // 2130 def int_hexagon_M2_vmac2su_s1 : 2131 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2su_s1">; 2132 // 2133 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s0pack,SI_ftype_SISI,2) 2134 // 2135 def int_hexagon_M2_vmpy2s_s0pack : 2136 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s0pack">; 2137 // 2138 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s1pack,SI_ftype_SISI,2) 2139 // 2140 def int_hexagon_M2_vmpy2s_s1pack : 2141 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s1pack">; 2142 // 2143 // BUILTIN_INFO(HEXAGON.M2_vmac2,DI_ftype_DISISI,3) 2144 // 2145 def int_hexagon_M2_vmac2 : 2146 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2">; 2147 // 2148 // BUILTIN_INFO(HEXAGON.M2_vmpy2es_s0,DI_ftype_DIDI,2) 2149 // 2150 def int_hexagon_M2_vmpy2es_s0 : 2151 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vmpy2es_s0">; 2152 // 2153 // BUILTIN_INFO(HEXAGON.M2_vmpy2es_s1,DI_ftype_DIDI,2) 2154 // 2155 def int_hexagon_M2_vmpy2es_s1 : 2156 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vmpy2es_s1">; 2157 // 2158 // BUILTIN_INFO(HEXAGON.M2_vmac2es_s0,DI_ftype_DIDIDI,3) 2159 // 2160 def int_hexagon_M2_vmac2es_s0 : 2161 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es_s0">; 2162 // 2163 // BUILTIN_INFO(HEXAGON.M2_vmac2es_s1,DI_ftype_DIDIDI,3) 2164 // 2165 def int_hexagon_M2_vmac2es_s1 : 2166 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es_s1">; 2167 // 2168 // BUILTIN_INFO(HEXAGON.M2_vmac2es,DI_ftype_DIDIDI,3) 2169 // 2170 def int_hexagon_M2_vmac2es : 2171 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es">; 2172 // 2173 // BUILTIN_INFO(HEXAGON.M2_vrmac_s0,DI_ftype_DIDIDI,3) 2174 // 2175 def int_hexagon_M2_vrmac_s0 : 2176 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrmac_s0">; 2177 // 2178 // BUILTIN_INFO(HEXAGON.M2_vrmpy_s0,DI_ftype_DIDI,2) 2179 // 2180 def int_hexagon_M2_vrmpy_s0 : 2181 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrmpy_s0">; 2182 // 2183 // BUILTIN_INFO(HEXAGON.M2_vdmpyrs_s0,SI_ftype_DIDI,2) 2184 // 2185 def int_hexagon_M2_vdmpyrs_s0 : 2186 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vdmpyrs_s0">; 2187 // 2188 // BUILTIN_INFO(HEXAGON.M2_vdmpyrs_s1,SI_ftype_DIDI,2) 2189 // 2190 def int_hexagon_M2_vdmpyrs_s1 : 2191 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vdmpyrs_s1">; 2192 // 2193 // BUILTIN_INFO(HEXAGON.M5_vrmpybuu,DI_ftype_DIDI,2) 2194 // 2195 def int_hexagon_M5_vrmpybuu : 2196 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vrmpybuu">; 2197 // 2198 // BUILTIN_INFO(HEXAGON.M5_vrmacbuu,DI_ftype_DIDIDI,3) 2199 // 2200 def int_hexagon_M5_vrmacbuu : 2201 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vrmacbuu">; 2202 // 2203 // BUILTIN_INFO(HEXAGON.M5_vrmpybsu,DI_ftype_DIDI,2) 2204 // 2205 def int_hexagon_M5_vrmpybsu : 2206 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vrmpybsu">; 2207 // 2208 // BUILTIN_INFO(HEXAGON.M5_vrmacbsu,DI_ftype_DIDIDI,3) 2209 // 2210 def int_hexagon_M5_vrmacbsu : 2211 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vrmacbsu">; 2212 // 2213 // BUILTIN_INFO(HEXAGON.M5_vmpybuu,DI_ftype_SISI,2) 2214 // 2215 def int_hexagon_M5_vmpybuu : 2216 Hexagon_di_sisi_Intrinsic<"HEXAGON_M5_vmpybuu">; 2217 // 2218 // BUILTIN_INFO(HEXAGON.M5_vmpybsu,DI_ftype_SISI,2) 2219 // 2220 def int_hexagon_M5_vmpybsu : 2221 Hexagon_di_sisi_Intrinsic<"HEXAGON_M5_vmpybsu">; 2222 // 2223 // BUILTIN_INFO(HEXAGON.M5_vmacbuu,DI_ftype_DISISI,3) 2224 // 2225 def int_hexagon_M5_vmacbuu : 2226 Hexagon_di_disisi_Intrinsic<"HEXAGON_M5_vmacbuu">; 2227 // 2228 // BUILTIN_INFO(HEXAGON.M5_vmacbsu,DI_ftype_DISISI,3) 2229 // 2230 def int_hexagon_M5_vmacbsu : 2231 Hexagon_di_disisi_Intrinsic<"HEXAGON_M5_vmacbsu">; 2232 // 2233 // BUILTIN_INFO(HEXAGON.M5_vdmpybsu,DI_ftype_DIDI,2) 2234 // 2235 def int_hexagon_M5_vdmpybsu : 2236 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vdmpybsu">; 2237 // 2238 // BUILTIN_INFO(HEXAGON.M5_vdmacbsu,DI_ftype_DIDIDI,3) 2239 // 2240 def int_hexagon_M5_vdmacbsu : 2241 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vdmacbsu">; 2242 // 2243 // BUILTIN_INFO(HEXAGON.M2_vdmacs_s0,DI_ftype_DIDIDI,3) 2244 // 2245 def int_hexagon_M2_vdmacs_s0 : 2246 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vdmacs_s0">; 2247 // 2248 // BUILTIN_INFO(HEXAGON.M2_vdmacs_s1,DI_ftype_DIDIDI,3) 2249 // 2250 def int_hexagon_M2_vdmacs_s1 : 2251 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vdmacs_s1">; 2252 // 2253 // BUILTIN_INFO(HEXAGON.M2_vdmpys_s0,DI_ftype_DIDI,2) 2254 // 2255 def int_hexagon_M2_vdmpys_s0 : 2256 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vdmpys_s0">; 2257 // 2258 // BUILTIN_INFO(HEXAGON.M2_vdmpys_s1,DI_ftype_DIDI,2) 2259 // 2260 def int_hexagon_M2_vdmpys_s1 : 2261 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vdmpys_s1">; 2262 // 2263 // BUILTIN_INFO(HEXAGON.M2_cmpyrs_s0,SI_ftype_SISI,2) 2264 // 2265 def int_hexagon_M2_cmpyrs_s0 : 2266 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrs_s0">; 2267 // 2268 // BUILTIN_INFO(HEXAGON.M2_cmpyrs_s1,SI_ftype_SISI,2) 2269 // 2270 def int_hexagon_M2_cmpyrs_s1 : 2271 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrs_s1">; 2272 // 2273 // BUILTIN_INFO(HEXAGON.M2_cmpyrsc_s0,SI_ftype_SISI,2) 2274 // 2275 def int_hexagon_M2_cmpyrsc_s0 : 2276 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrsc_s0">; 2277 // 2278 // BUILTIN_INFO(HEXAGON.M2_cmpyrsc_s1,SI_ftype_SISI,2) 2279 // 2280 def int_hexagon_M2_cmpyrsc_s1 : 2281 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrsc_s1">; 2282 // 2283 // BUILTIN_INFO(HEXAGON.M2_cmacs_s0,DI_ftype_DISISI,3) 2284 // 2285 def int_hexagon_M2_cmacs_s0 : 2286 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacs_s0">; 2287 // 2288 // BUILTIN_INFO(HEXAGON.M2_cmacs_s1,DI_ftype_DISISI,3) 2289 // 2290 def int_hexagon_M2_cmacs_s1 : 2291 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacs_s1">; 2292 // 2293 // BUILTIN_INFO(HEXAGON.M2_cmacsc_s0,DI_ftype_DISISI,3) 2294 // 2295 def int_hexagon_M2_cmacsc_s0 : 2296 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacsc_s0">; 2297 // 2298 // BUILTIN_INFO(HEXAGON.M2_cmacsc_s1,DI_ftype_DISISI,3) 2299 // 2300 def int_hexagon_M2_cmacsc_s1 : 2301 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacsc_s1">; 2302 // 2303 // BUILTIN_INFO(HEXAGON.M2_cmpys_s0,DI_ftype_SISI,2) 2304 // 2305 def int_hexagon_M2_cmpys_s0 : 2306 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpys_s0">; 2307 // 2308 // BUILTIN_INFO(HEXAGON.M2_cmpys_s1,DI_ftype_SISI,2) 2309 // 2310 def int_hexagon_M2_cmpys_s1 : 2311 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpys_s1">; 2312 // 2313 // BUILTIN_INFO(HEXAGON.M2_cmpysc_s0,DI_ftype_SISI,2) 2314 // 2315 def int_hexagon_M2_cmpysc_s0 : 2316 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpysc_s0">; 2317 // 2318 // BUILTIN_INFO(HEXAGON.M2_cmpysc_s1,DI_ftype_SISI,2) 2319 // 2320 def int_hexagon_M2_cmpysc_s1 : 2321 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpysc_s1">; 2322 // 2323 // BUILTIN_INFO(HEXAGON.M2_cnacs_s0,DI_ftype_DISISI,3) 2324 // 2325 def int_hexagon_M2_cnacs_s0 : 2326 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacs_s0">; 2327 // 2328 // BUILTIN_INFO(HEXAGON.M2_cnacs_s1,DI_ftype_DISISI,3) 2329 // 2330 def int_hexagon_M2_cnacs_s1 : 2331 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacs_s1">; 2332 // 2333 // BUILTIN_INFO(HEXAGON.M2_cnacsc_s0,DI_ftype_DISISI,3) 2334 // 2335 def int_hexagon_M2_cnacsc_s0 : 2336 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacsc_s0">; 2337 // 2338 // BUILTIN_INFO(HEXAGON.M2_cnacsc_s1,DI_ftype_DISISI,3) 2339 // 2340 def int_hexagon_M2_cnacsc_s1 : 2341 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacsc_s1">; 2342 // 2343 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_s1,DI_ftype_DISI,2) 2344 // 2345 def int_hexagon_M2_vrcmpys_s1 : 2346 Hexagon_di_disi_Intrinsic<"HEXAGON_M2_vrcmpys_s1">; 2347 // 2348 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_acc_s1,DI_ftype_DIDISI,3) 2349 // 2350 def int_hexagon_M2_vrcmpys_acc_s1 : 2351 Hexagon_di_didisi_Intrinsic<"HEXAGON_M2_vrcmpys_acc_s1">; 2352 // 2353 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_s1rp,SI_ftype_DISI,2) 2354 // 2355 def int_hexagon_M2_vrcmpys_s1rp : 2356 Hexagon_si_disi_Intrinsic<"HEXAGON_M2_vrcmpys_s1rp">; 2357 // 2358 // BUILTIN_INFO(HEXAGON.M2_mmacls_s0,DI_ftype_DIDIDI,3) 2359 // 2360 def int_hexagon_M2_mmacls_s0 : 2361 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_s0">; 2362 // 2363 // BUILTIN_INFO(HEXAGON.M2_mmacls_s1,DI_ftype_DIDIDI,3) 2364 // 2365 def int_hexagon_M2_mmacls_s1 : 2366 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_s1">; 2367 // 2368 // BUILTIN_INFO(HEXAGON.M2_mmachs_s0,DI_ftype_DIDIDI,3) 2369 // 2370 def int_hexagon_M2_mmachs_s0 : 2371 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_s0">; 2372 // 2373 // BUILTIN_INFO(HEXAGON.M2_mmachs_s1,DI_ftype_DIDIDI,3) 2374 // 2375 def int_hexagon_M2_mmachs_s1 : 2376 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_s1">; 2377 // 2378 // BUILTIN_INFO(HEXAGON.M2_mmpyl_s0,DI_ftype_DIDI,2) 2379 // 2380 def int_hexagon_M2_mmpyl_s0 : 2381 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_s0">; 2382 // 2383 // BUILTIN_INFO(HEXAGON.M2_mmpyl_s1,DI_ftype_DIDI,2) 2384 // 2385 def int_hexagon_M2_mmpyl_s1 : 2386 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_s1">; 2387 // 2388 // BUILTIN_INFO(HEXAGON.M2_mmpyh_s0,DI_ftype_DIDI,2) 2389 // 2390 def int_hexagon_M2_mmpyh_s0 : 2391 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_s0">; 2392 // 2393 // BUILTIN_INFO(HEXAGON.M2_mmpyh_s1,DI_ftype_DIDI,2) 2394 // 2395 def int_hexagon_M2_mmpyh_s1 : 2396 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_s1">; 2397 // 2398 // BUILTIN_INFO(HEXAGON.M2_mmacls_rs0,DI_ftype_DIDIDI,3) 2399 // 2400 def int_hexagon_M2_mmacls_rs0 : 2401 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_rs0">; 2402 // 2403 // BUILTIN_INFO(HEXAGON.M2_mmacls_rs1,DI_ftype_DIDIDI,3) 2404 // 2405 def int_hexagon_M2_mmacls_rs1 : 2406 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_rs1">; 2407 // 2408 // BUILTIN_INFO(HEXAGON.M2_mmachs_rs0,DI_ftype_DIDIDI,3) 2409 // 2410 def int_hexagon_M2_mmachs_rs0 : 2411 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_rs0">; 2412 // 2413 // BUILTIN_INFO(HEXAGON.M2_mmachs_rs1,DI_ftype_DIDIDI,3) 2414 // 2415 def int_hexagon_M2_mmachs_rs1 : 2416 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_rs1">; 2417 // 2418 // BUILTIN_INFO(HEXAGON.M2_mmpyl_rs0,DI_ftype_DIDI,2) 2419 // 2420 def int_hexagon_M2_mmpyl_rs0 : 2421 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_rs0">; 2422 // 2423 // BUILTIN_INFO(HEXAGON.M2_mmpyl_rs1,DI_ftype_DIDI,2) 2424 // 2425 def int_hexagon_M2_mmpyl_rs1 : 2426 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_rs1">; 2427 // 2428 // BUILTIN_INFO(HEXAGON.M2_mmpyh_rs0,DI_ftype_DIDI,2) 2429 // 2430 def int_hexagon_M2_mmpyh_rs0 : 2431 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_rs0">; 2432 // 2433 // BUILTIN_INFO(HEXAGON.M2_mmpyh_rs1,DI_ftype_DIDI,2) 2434 // 2435 def int_hexagon_M2_mmpyh_rs1 : 2436 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_rs1">; 2437 // 2438 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_s0,DI_ftype_DIDI,2) 2439 // 2440 def int_hexagon_M4_vrmpyeh_s0 : 2441 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyeh_s0">; 2442 // 2443 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_s1,DI_ftype_DIDI,2) 2444 // 2445 def int_hexagon_M4_vrmpyeh_s1 : 2446 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyeh_s1">; 2447 // 2448 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_acc_s0,DI_ftype_DIDIDI,3) 2449 // 2450 def int_hexagon_M4_vrmpyeh_acc_s0 : 2451 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyeh_acc_s0">; 2452 // 2453 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_acc_s1,DI_ftype_DIDIDI,3) 2454 // 2455 def int_hexagon_M4_vrmpyeh_acc_s1 : 2456 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyeh_acc_s1">; 2457 // 2458 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_s0,DI_ftype_DIDI,2) 2459 // 2460 def int_hexagon_M4_vrmpyoh_s0 : 2461 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyoh_s0">; 2462 // 2463 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_s1,DI_ftype_DIDI,2) 2464 // 2465 def int_hexagon_M4_vrmpyoh_s1 : 2466 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyoh_s1">; 2467 // 2468 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_acc_s0,DI_ftype_DIDIDI,3) 2469 // 2470 def int_hexagon_M4_vrmpyoh_acc_s0 : 2471 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyoh_acc_s0">; 2472 // 2473 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_acc_s1,DI_ftype_DIDIDI,3) 2474 // 2475 def int_hexagon_M4_vrmpyoh_acc_s1 : 2476 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyoh_acc_s1">; 2477 // 2478 // BUILTIN_INFO(HEXAGON.M2_hmmpyl_rs1,SI_ftype_SISI,2) 2479 // 2480 def int_hexagon_M2_hmmpyl_rs1 : 2481 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyl_rs1">; 2482 // 2483 // BUILTIN_INFO(HEXAGON.M2_hmmpyh_rs1,SI_ftype_SISI,2) 2484 // 2485 def int_hexagon_M2_hmmpyh_rs1 : 2486 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyh_rs1">; 2487 // 2488 // BUILTIN_INFO(HEXAGON.M2_hmmpyl_s1,SI_ftype_SISI,2) 2489 // 2490 def int_hexagon_M2_hmmpyl_s1 : 2491 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyl_s1">; 2492 // 2493 // BUILTIN_INFO(HEXAGON.M2_hmmpyh_s1,SI_ftype_SISI,2) 2494 // 2495 def int_hexagon_M2_hmmpyh_s1 : 2496 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyh_s1">; 2497 // 2498 // BUILTIN_INFO(HEXAGON.M2_mmaculs_s0,DI_ftype_DIDIDI,3) 2499 // 2500 def int_hexagon_M2_mmaculs_s0 : 2501 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_s0">; 2502 // 2503 // BUILTIN_INFO(HEXAGON.M2_mmaculs_s1,DI_ftype_DIDIDI,3) 2504 // 2505 def int_hexagon_M2_mmaculs_s1 : 2506 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_s1">; 2507 // 2508 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_s0,DI_ftype_DIDIDI,3) 2509 // 2510 def int_hexagon_M2_mmacuhs_s0 : 2511 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_s0">; 2512 // 2513 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_s1,DI_ftype_DIDIDI,3) 2514 // 2515 def int_hexagon_M2_mmacuhs_s1 : 2516 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_s1">; 2517 // 2518 // BUILTIN_INFO(HEXAGON.M2_mmpyul_s0,DI_ftype_DIDI,2) 2519 // 2520 def int_hexagon_M2_mmpyul_s0 : 2521 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_s0">; 2522 // 2523 // BUILTIN_INFO(HEXAGON.M2_mmpyul_s1,DI_ftype_DIDI,2) 2524 // 2525 def int_hexagon_M2_mmpyul_s1 : 2526 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_s1">; 2527 // 2528 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_s0,DI_ftype_DIDI,2) 2529 // 2530 def int_hexagon_M2_mmpyuh_s0 : 2531 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_s0">; 2532 // 2533 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_s1,DI_ftype_DIDI,2) 2534 // 2535 def int_hexagon_M2_mmpyuh_s1 : 2536 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_s1">; 2537 // 2538 // BUILTIN_INFO(HEXAGON.M2_mmaculs_rs0,DI_ftype_DIDIDI,3) 2539 // 2540 def int_hexagon_M2_mmaculs_rs0 : 2541 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_rs0">; 2542 // 2543 // BUILTIN_INFO(HEXAGON.M2_mmaculs_rs1,DI_ftype_DIDIDI,3) 2544 // 2545 def int_hexagon_M2_mmaculs_rs1 : 2546 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_rs1">; 2547 // 2548 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_rs0,DI_ftype_DIDIDI,3) 2549 // 2550 def int_hexagon_M2_mmacuhs_rs0 : 2551 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_rs0">; 2552 // 2553 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_rs1,DI_ftype_DIDIDI,3) 2554 // 2555 def int_hexagon_M2_mmacuhs_rs1 : 2556 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_rs1">; 2557 // 2558 // BUILTIN_INFO(HEXAGON.M2_mmpyul_rs0,DI_ftype_DIDI,2) 2559 // 2560 def int_hexagon_M2_mmpyul_rs0 : 2561 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_rs0">; 2562 // 2563 // BUILTIN_INFO(HEXAGON.M2_mmpyul_rs1,DI_ftype_DIDI,2) 2564 // 2565 def int_hexagon_M2_mmpyul_rs1 : 2566 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_rs1">; 2567 // 2568 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_rs0,DI_ftype_DIDI,2) 2569 // 2570 def int_hexagon_M2_mmpyuh_rs0 : 2571 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_rs0">; 2572 // 2573 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_rs1,DI_ftype_DIDI,2) 2574 // 2575 def int_hexagon_M2_mmpyuh_rs1 : 2576 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_rs1">; 2577 // 2578 // BUILTIN_INFO(HEXAGON.M2_vrcmaci_s0,DI_ftype_DIDIDI,3) 2579 // 2580 def int_hexagon_M2_vrcmaci_s0 : 2581 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmaci_s0">; 2582 // 2583 // BUILTIN_INFO(HEXAGON.M2_vrcmacr_s0,DI_ftype_DIDIDI,3) 2584 // 2585 def int_hexagon_M2_vrcmacr_s0 : 2586 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmacr_s0">; 2587 // 2588 // BUILTIN_INFO(HEXAGON.M2_vrcmaci_s0c,DI_ftype_DIDIDI,3) 2589 // 2590 def int_hexagon_M2_vrcmaci_s0c : 2591 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmaci_s0c">; 2592 // 2593 // BUILTIN_INFO(HEXAGON.M2_vrcmacr_s0c,DI_ftype_DIDIDI,3) 2594 // 2595 def int_hexagon_M2_vrcmacr_s0c : 2596 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmacr_s0c">; 2597 // 2598 // BUILTIN_INFO(HEXAGON.M2_cmaci_s0,DI_ftype_DISISI,3) 2599 // 2600 def int_hexagon_M2_cmaci_s0 : 2601 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmaci_s0">; 2602 // 2603 // BUILTIN_INFO(HEXAGON.M2_cmacr_s0,DI_ftype_DISISI,3) 2604 // 2605 def int_hexagon_M2_cmacr_s0 : 2606 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacr_s0">; 2607 // 2608 // BUILTIN_INFO(HEXAGON.M2_vrcmpyi_s0,DI_ftype_DIDI,2) 2609 // 2610 def int_hexagon_M2_vrcmpyi_s0 : 2611 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyi_s0">; 2612 // 2613 // BUILTIN_INFO(HEXAGON.M2_vrcmpyr_s0,DI_ftype_DIDI,2) 2614 // 2615 def int_hexagon_M2_vrcmpyr_s0 : 2616 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyr_s0">; 2617 // 2618 // BUILTIN_INFO(HEXAGON.M2_vrcmpyi_s0c,DI_ftype_DIDI,2) 2619 // 2620 def int_hexagon_M2_vrcmpyi_s0c : 2621 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyi_s0c">; 2622 // 2623 // BUILTIN_INFO(HEXAGON.M2_vrcmpyr_s0c,DI_ftype_DIDI,2) 2624 // 2625 def int_hexagon_M2_vrcmpyr_s0c : 2626 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyr_s0c">; 2627 // 2628 // BUILTIN_INFO(HEXAGON.M2_cmpyi_s0,DI_ftype_SISI,2) 2629 // 2630 def int_hexagon_M2_cmpyi_s0 : 2631 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpyi_s0">; 2632 // 2633 // BUILTIN_INFO(HEXAGON.M2_cmpyr_s0,DI_ftype_SISI,2) 2634 // 2635 def int_hexagon_M2_cmpyr_s0 : 2636 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpyr_s0">; 2637 // 2638 // BUILTIN_INFO(HEXAGON.M4_cmpyi_wh,SI_ftype_DISI,2) 2639 // 2640 def int_hexagon_M4_cmpyi_wh : 2641 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyi_wh">; 2642 // 2643 // BUILTIN_INFO(HEXAGON.M4_cmpyr_wh,SI_ftype_DISI,2) 2644 // 2645 def int_hexagon_M4_cmpyr_wh : 2646 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyr_wh">; 2647 // 2648 // BUILTIN_INFO(HEXAGON.M4_cmpyi_whc,SI_ftype_DISI,2) 2649 // 2650 def int_hexagon_M4_cmpyi_whc : 2651 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyi_whc">; 2652 // 2653 // BUILTIN_INFO(HEXAGON.M4_cmpyr_whc,SI_ftype_DISI,2) 2654 // 2655 def int_hexagon_M4_cmpyr_whc : 2656 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyr_whc">; 2657 // 2658 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s0_sat_i,DI_ftype_DIDI,2) 2659 // 2660 def int_hexagon_M2_vcmpy_s0_sat_i : 2661 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s0_sat_i">; 2662 // 2663 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s0_sat_r,DI_ftype_DIDI,2) 2664 // 2665 def int_hexagon_M2_vcmpy_s0_sat_r : 2666 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s0_sat_r">; 2667 // 2668 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s1_sat_i,DI_ftype_DIDI,2) 2669 // 2670 def int_hexagon_M2_vcmpy_s1_sat_i : 2671 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s1_sat_i">; 2672 // 2673 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s1_sat_r,DI_ftype_DIDI,2) 2674 // 2675 def int_hexagon_M2_vcmpy_s1_sat_r : 2676 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s1_sat_r">; 2677 // 2678 // BUILTIN_INFO(HEXAGON.M2_vcmac_s0_sat_i,DI_ftype_DIDIDI,3) 2679 // 2680 def int_hexagon_M2_vcmac_s0_sat_i : 2681 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vcmac_s0_sat_i">; 2682 // 2683 // BUILTIN_INFO(HEXAGON.M2_vcmac_s0_sat_r,DI_ftype_DIDIDI,3) 2684 // 2685 def int_hexagon_M2_vcmac_s0_sat_r : 2686 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vcmac_s0_sat_r">; 2687 // 2688 // BUILTIN_INFO(HEXAGON.S2_vcrotate,DI_ftype_DISI,2) 2689 // 2690 def int_hexagon_S2_vcrotate : 2691 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_vcrotate">; 2692 // 2693 // BUILTIN_INFO(HEXAGON.S4_vrcrotate_acc,DI_ftype_DIDISISI,4) 2694 // 2695 def int_hexagon_S4_vrcrotate_acc : 2696 Hexagon_di_didisisi_Intrinsic<"HEXAGON_S4_vrcrotate_acc">; 2697 // 2698 // BUILTIN_INFO(HEXAGON.S4_vrcrotate,DI_ftype_DISISI,3) 2699 // 2700 def int_hexagon_S4_vrcrotate : 2701 Hexagon_di_disisi_Intrinsic<"HEXAGON_S4_vrcrotate">; 2702 // 2703 // BUILTIN_INFO(HEXAGON.S2_vcnegh,DI_ftype_DISI,2) 2704 // 2705 def int_hexagon_S2_vcnegh : 2706 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_vcnegh">; 2707 // 2708 // BUILTIN_INFO(HEXAGON.S2_vrcnegh,DI_ftype_DIDISI,3) 2709 // 2710 def int_hexagon_S2_vrcnegh : 2711 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_vrcnegh">; 2712 // 2713 // BUILTIN_INFO(HEXAGON.M4_pmpyw,DI_ftype_SISI,2) 2714 // 2715 def int_hexagon_M4_pmpyw : 2716 Hexagon_di_sisi_Intrinsic<"HEXAGON_M4_pmpyw">; 2717 // 2718 // BUILTIN_INFO(HEXAGON.M4_vpmpyh,DI_ftype_SISI,2) 2719 // 2720 def int_hexagon_M4_vpmpyh : 2721 Hexagon_di_sisi_Intrinsic<"HEXAGON_M4_vpmpyh">; 2722 // 2723 // BUILTIN_INFO(HEXAGON.M4_pmpyw_acc,DI_ftype_DISISI,3) 2724 // 2725 def int_hexagon_M4_pmpyw_acc : 2726 Hexagon_di_disisi_Intrinsic<"HEXAGON_M4_pmpyw_acc">; 2727 // 2728 // BUILTIN_INFO(HEXAGON.M4_vpmpyh_acc,DI_ftype_DISISI,3) 2729 // 2730 def int_hexagon_M4_vpmpyh_acc : 2731 Hexagon_di_disisi_Intrinsic<"HEXAGON_M4_vpmpyh_acc">; 2732 // 2733 // BUILTIN_INFO(HEXAGON.A2_add,SI_ftype_SISI,2) 2734 // 2735 def int_hexagon_A2_add : 2736 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_add">; 2737 // 2738 // BUILTIN_INFO(HEXAGON.A2_sub,SI_ftype_SISI,2) 2739 // 2740 def int_hexagon_A2_sub : 2741 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_sub">; 2742 // 2743 // BUILTIN_INFO(HEXAGON.A2_addsat,SI_ftype_SISI,2) 2744 // 2745 def int_hexagon_A2_addsat : 2746 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addsat">; 2747 // 2748 // BUILTIN_INFO(HEXAGON.A2_subsat,SI_ftype_SISI,2) 2749 // 2750 def int_hexagon_A2_subsat : 2751 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subsat">; 2752 // 2753 // BUILTIN_INFO(HEXAGON.A2_addi,SI_ftype_SISI,2) 2754 // 2755 def int_hexagon_A2_addi : 2756 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addi">; 2757 // 2758 // BUILTIN_INFO(HEXAGON.A2_addh_l16_ll,SI_ftype_SISI,2) 2759 // 2760 def int_hexagon_A2_addh_l16_ll : 2761 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_ll">; 2762 // 2763 // BUILTIN_INFO(HEXAGON.A2_addh_l16_hl,SI_ftype_SISI,2) 2764 // 2765 def int_hexagon_A2_addh_l16_hl : 2766 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_hl">; 2767 // 2768 // BUILTIN_INFO(HEXAGON.A2_addh_l16_sat_ll,SI_ftype_SISI,2) 2769 // 2770 def int_hexagon_A2_addh_l16_sat_ll : 2771 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_sat_ll">; 2772 // 2773 // BUILTIN_INFO(HEXAGON.A2_addh_l16_sat_hl,SI_ftype_SISI,2) 2774 // 2775 def int_hexagon_A2_addh_l16_sat_hl : 2776 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_sat_hl">; 2777 // 2778 // BUILTIN_INFO(HEXAGON.A2_subh_l16_ll,SI_ftype_SISI,2) 2779 // 2780 def int_hexagon_A2_subh_l16_ll : 2781 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_ll">; 2782 // 2783 // BUILTIN_INFO(HEXAGON.A2_subh_l16_hl,SI_ftype_SISI,2) 2784 // 2785 def int_hexagon_A2_subh_l16_hl : 2786 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_hl">; 2787 // 2788 // BUILTIN_INFO(HEXAGON.A2_subh_l16_sat_ll,SI_ftype_SISI,2) 2789 // 2790 def int_hexagon_A2_subh_l16_sat_ll : 2791 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_sat_ll">; 2792 // 2793 // BUILTIN_INFO(HEXAGON.A2_subh_l16_sat_hl,SI_ftype_SISI,2) 2794 // 2795 def int_hexagon_A2_subh_l16_sat_hl : 2796 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_sat_hl">; 2797 // 2798 // BUILTIN_INFO(HEXAGON.A2_addh_h16_ll,SI_ftype_SISI,2) 2799 // 2800 def int_hexagon_A2_addh_h16_ll : 2801 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_ll">; 2802 // 2803 // BUILTIN_INFO(HEXAGON.A2_addh_h16_lh,SI_ftype_SISI,2) 2804 // 2805 def int_hexagon_A2_addh_h16_lh : 2806 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_lh">; 2807 // 2808 // BUILTIN_INFO(HEXAGON.A2_addh_h16_hl,SI_ftype_SISI,2) 2809 // 2810 def int_hexagon_A2_addh_h16_hl : 2811 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_hl">; 2812 // 2813 // BUILTIN_INFO(HEXAGON.A2_addh_h16_hh,SI_ftype_SISI,2) 2814 // 2815 def int_hexagon_A2_addh_h16_hh : 2816 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_hh">; 2817 // 2818 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_ll,SI_ftype_SISI,2) 2819 // 2820 def int_hexagon_A2_addh_h16_sat_ll : 2821 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_ll">; 2822 // 2823 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_lh,SI_ftype_SISI,2) 2824 // 2825 def int_hexagon_A2_addh_h16_sat_lh : 2826 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_lh">; 2827 // 2828 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_hl,SI_ftype_SISI,2) 2829 // 2830 def int_hexagon_A2_addh_h16_sat_hl : 2831 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_hl">; 2832 // 2833 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_hh,SI_ftype_SISI,2) 2834 // 2835 def int_hexagon_A2_addh_h16_sat_hh : 2836 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_hh">; 2837 // 2838 // BUILTIN_INFO(HEXAGON.A2_subh_h16_ll,SI_ftype_SISI,2) 2839 // 2840 def int_hexagon_A2_subh_h16_ll : 2841 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_ll">; 2842 // 2843 // BUILTIN_INFO(HEXAGON.A2_subh_h16_lh,SI_ftype_SISI,2) 2844 // 2845 def int_hexagon_A2_subh_h16_lh : 2846 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_lh">; 2847 // 2848 // BUILTIN_INFO(HEXAGON.A2_subh_h16_hl,SI_ftype_SISI,2) 2849 // 2850 def int_hexagon_A2_subh_h16_hl : 2851 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_hl">; 2852 // 2853 // BUILTIN_INFO(HEXAGON.A2_subh_h16_hh,SI_ftype_SISI,2) 2854 // 2855 def int_hexagon_A2_subh_h16_hh : 2856 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_hh">; 2857 // 2858 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_ll,SI_ftype_SISI,2) 2859 // 2860 def int_hexagon_A2_subh_h16_sat_ll : 2861 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_ll">; 2862 // 2863 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_lh,SI_ftype_SISI,2) 2864 // 2865 def int_hexagon_A2_subh_h16_sat_lh : 2866 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_lh">; 2867 // 2868 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_hl,SI_ftype_SISI,2) 2869 // 2870 def int_hexagon_A2_subh_h16_sat_hl : 2871 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_hl">; 2872 // 2873 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_hh,SI_ftype_SISI,2) 2874 // 2875 def int_hexagon_A2_subh_h16_sat_hh : 2876 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_hh">; 2877 // 2878 // BUILTIN_INFO(HEXAGON.A2_aslh,SI_ftype_SI,1) 2879 // 2880 def int_hexagon_A2_aslh : 2881 Hexagon_si_si_Intrinsic<"HEXAGON_A2_aslh">; 2882 // 2883 // BUILTIN_INFO(HEXAGON.A2_asrh,SI_ftype_SI,1) 2884 // 2885 def int_hexagon_A2_asrh : 2886 Hexagon_si_si_Intrinsic<"HEXAGON_A2_asrh">; 2887 // 2888 // BUILTIN_INFO(HEXAGON.A2_addp,DI_ftype_DIDI,2) 2889 // 2890 def int_hexagon_A2_addp : 2891 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_addp">; 2892 // 2893 // BUILTIN_INFO(HEXAGON.A2_addpsat,DI_ftype_DIDI,2) 2894 // 2895 def int_hexagon_A2_addpsat : 2896 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_addpsat">; 2897 // 2898 // BUILTIN_INFO(HEXAGON.A2_addsp,DI_ftype_SIDI,2) 2899 // 2900 def int_hexagon_A2_addsp : 2901 Hexagon_di_sidi_Intrinsic<"HEXAGON_A2_addsp">; 2902 // 2903 // BUILTIN_INFO(HEXAGON.A2_subp,DI_ftype_DIDI,2) 2904 // 2905 def int_hexagon_A2_subp : 2906 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_subp">; 2907 // 2908 // BUILTIN_INFO(HEXAGON.A2_neg,SI_ftype_SI,1) 2909 // 2910 def int_hexagon_A2_neg : 2911 Hexagon_si_si_Intrinsic<"HEXAGON_A2_neg">; 2912 // 2913 // BUILTIN_INFO(HEXAGON.A2_negsat,SI_ftype_SI,1) 2914 // 2915 def int_hexagon_A2_negsat : 2916 Hexagon_si_si_Intrinsic<"HEXAGON_A2_negsat">; 2917 // 2918 // BUILTIN_INFO(HEXAGON.A2_abs,SI_ftype_SI,1) 2919 // 2920 def int_hexagon_A2_abs : 2921 Hexagon_si_si_Intrinsic<"HEXAGON_A2_abs">; 2922 // 2923 // BUILTIN_INFO(HEXAGON.A2_abssat,SI_ftype_SI,1) 2924 // 2925 def int_hexagon_A2_abssat : 2926 Hexagon_si_si_Intrinsic<"HEXAGON_A2_abssat">; 2927 // 2928 // BUILTIN_INFO(HEXAGON.A2_vconj,DI_ftype_DI,1) 2929 // 2930 def int_hexagon_A2_vconj : 2931 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vconj">; 2932 // 2933 // BUILTIN_INFO(HEXAGON.A2_negp,DI_ftype_DI,1) 2934 // 2935 def int_hexagon_A2_negp : 2936 Hexagon_di_di_Intrinsic<"HEXAGON_A2_negp">; 2937 // 2938 // BUILTIN_INFO(HEXAGON.A2_absp,DI_ftype_DI,1) 2939 // 2940 def int_hexagon_A2_absp : 2941 Hexagon_di_di_Intrinsic<"HEXAGON_A2_absp">; 2942 // 2943 // BUILTIN_INFO(HEXAGON.A2_max,SI_ftype_SISI,2) 2944 // 2945 def int_hexagon_A2_max : 2946 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_max">; 2947 // 2948 // BUILTIN_INFO(HEXAGON.A2_maxu,USI_ftype_SISI,2) 2949 // 2950 def int_hexagon_A2_maxu : 2951 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_maxu">; 2952 // 2953 // BUILTIN_INFO(HEXAGON.A2_min,SI_ftype_SISI,2) 2954 // 2955 def int_hexagon_A2_min : 2956 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_min">; 2957 // 2958 // BUILTIN_INFO(HEXAGON.A2_minu,USI_ftype_SISI,2) 2959 // 2960 def int_hexagon_A2_minu : 2961 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_minu">; 2962 // 2963 // BUILTIN_INFO(HEXAGON.A2_maxp,DI_ftype_DIDI,2) 2964 // 2965 def int_hexagon_A2_maxp : 2966 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_maxp">; 2967 // 2968 // BUILTIN_INFO(HEXAGON.A2_maxup,UDI_ftype_DIDI,2) 2969 // 2970 def int_hexagon_A2_maxup : 2971 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_maxup">; 2972 // 2973 // BUILTIN_INFO(HEXAGON.A2_minp,DI_ftype_DIDI,2) 2974 // 2975 def int_hexagon_A2_minp : 2976 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_minp">; 2977 // 2978 // BUILTIN_INFO(HEXAGON.A2_minup,UDI_ftype_DIDI,2) 2979 // 2980 def int_hexagon_A2_minup : 2981 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_minup">; 2982 // 2983 // BUILTIN_INFO(HEXAGON.A2_tfr,SI_ftype_SI,1) 2984 // 2985 def int_hexagon_A2_tfr : 2986 Hexagon_si_si_Intrinsic<"HEXAGON_A2_tfr">; 2987 // 2988 // BUILTIN_INFO(HEXAGON.A2_tfrsi,SI_ftype_SI,1) 2989 // 2990 def int_hexagon_A2_tfrsi : 2991 Hexagon_si_si_Intrinsic<"HEXAGON_A2_tfrsi">; 2992 // 2993 // BUILTIN_INFO(HEXAGON.A2_tfrp,DI_ftype_DI,1) 2994 // 2995 def int_hexagon_A2_tfrp : 2996 Hexagon_di_di_Intrinsic<"HEXAGON_A2_tfrp">; 2997 // 2998 // BUILTIN_INFO(HEXAGON.A2_tfrpi,DI_ftype_SI,1) 2999 // 3000 def int_hexagon_A2_tfrpi : 3001 Hexagon_di_si_Intrinsic<"HEXAGON_A2_tfrpi">; 3002 // 3003 // BUILTIN_INFO(HEXAGON.A2_zxtb,SI_ftype_SI,1) 3004 // 3005 def int_hexagon_A2_zxtb : 3006 Hexagon_si_si_Intrinsic<"HEXAGON_A2_zxtb">; 3007 // 3008 // BUILTIN_INFO(HEXAGON.A2_sxtb,SI_ftype_SI,1) 3009 // 3010 def int_hexagon_A2_sxtb : 3011 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sxtb">; 3012 // 3013 // BUILTIN_INFO(HEXAGON.A2_zxth,SI_ftype_SI,1) 3014 // 3015 def int_hexagon_A2_zxth : 3016 Hexagon_si_si_Intrinsic<"HEXAGON_A2_zxth">; 3017 // 3018 // BUILTIN_INFO(HEXAGON.A2_sxth,SI_ftype_SI,1) 3019 // 3020 def int_hexagon_A2_sxth : 3021 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sxth">; 3022 // 3023 // BUILTIN_INFO(HEXAGON.A2_combinew,DI_ftype_SISI,2) 3024 // 3025 def int_hexagon_A2_combinew : 3026 Hexagon_di_sisi_Intrinsic<"HEXAGON_A2_combinew">; 3027 // 3028 // BUILTIN_INFO(HEXAGON.A4_combineri,DI_ftype_SISI,2) 3029 // 3030 def int_hexagon_A4_combineri : 3031 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_combineri">; 3032 // 3033 // BUILTIN_INFO(HEXAGON.A4_combineir,DI_ftype_SISI,2) 3034 // 3035 def int_hexagon_A4_combineir : 3036 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_combineir">; 3037 // 3038 // BUILTIN_INFO(HEXAGON.A2_combineii,DI_ftype_SISI,2) 3039 // 3040 def int_hexagon_A2_combineii : 3041 Hexagon_di_sisi_Intrinsic<"HEXAGON_A2_combineii">; 3042 // 3043 // BUILTIN_INFO(HEXAGON.A2_combine_hh,SI_ftype_SISI,2) 3044 // 3045 def int_hexagon_A2_combine_hh : 3046 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_hh">; 3047 // 3048 // BUILTIN_INFO(HEXAGON.A2_combine_hl,SI_ftype_SISI,2) 3049 // 3050 def int_hexagon_A2_combine_hl : 3051 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_hl">; 3052 // 3053 // BUILTIN_INFO(HEXAGON.A2_combine_lh,SI_ftype_SISI,2) 3054 // 3055 def int_hexagon_A2_combine_lh : 3056 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_lh">; 3057 // 3058 // BUILTIN_INFO(HEXAGON.A2_combine_ll,SI_ftype_SISI,2) 3059 // 3060 def int_hexagon_A2_combine_ll : 3061 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_ll">; 3062 // 3063 // BUILTIN_INFO(HEXAGON.A2_tfril,SI_ftype_SISI,2) 3064 // 3065 def int_hexagon_A2_tfril : 3066 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_tfril">; 3067 // 3068 // BUILTIN_INFO(HEXAGON.A2_tfrih,SI_ftype_SISI,2) 3069 // 3070 def int_hexagon_A2_tfrih : 3071 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_tfrih">; 3072 // 3073 // BUILTIN_INFO(HEXAGON.A2_and,SI_ftype_SISI,2) 3074 // 3075 def int_hexagon_A2_and : 3076 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_and">; 3077 // 3078 // BUILTIN_INFO(HEXAGON.A2_or,SI_ftype_SISI,2) 3079 // 3080 def int_hexagon_A2_or : 3081 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_or">; 3082 // 3083 // BUILTIN_INFO(HEXAGON.A2_xor,SI_ftype_SISI,2) 3084 // 3085 def int_hexagon_A2_xor : 3086 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_xor">; 3087 // 3088 // BUILTIN_INFO(HEXAGON.A2_not,SI_ftype_SI,1) 3089 // 3090 def int_hexagon_A2_not : 3091 Hexagon_si_si_Intrinsic<"HEXAGON_A2_not">; 3092 // 3093 // BUILTIN_INFO(HEXAGON.M2_xor_xacc,SI_ftype_SISISI,3) 3094 // 3095 def int_hexagon_M2_xor_xacc : 3096 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_xor_xacc">; 3097 // 3098 // BUILTIN_INFO(HEXAGON.M4_xor_xacc,DI_ftype_DIDIDI,3) 3099 // 3100 def int_hexagon_M4_xor_xacc : 3101 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_xor_xacc">; 3102 // 3103 // BUILTIN_INFO(HEXAGON.A4_andn,SI_ftype_SISI,2) 3104 // 3105 def int_hexagon_A4_andn : 3106 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_andn">; 3107 // 3108 // BUILTIN_INFO(HEXAGON.A4_orn,SI_ftype_SISI,2) 3109 // 3110 def int_hexagon_A4_orn : 3111 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_orn">; 3112 // 3113 // BUILTIN_INFO(HEXAGON.A4_andnp,DI_ftype_DIDI,2) 3114 // 3115 def int_hexagon_A4_andnp : 3116 Hexagon_di_didi_Intrinsic<"HEXAGON_A4_andnp">; 3117 // 3118 // BUILTIN_INFO(HEXAGON.A4_ornp,DI_ftype_DIDI,2) 3119 // 3120 def int_hexagon_A4_ornp : 3121 Hexagon_di_didi_Intrinsic<"HEXAGON_A4_ornp">; 3122 // 3123 // BUILTIN_INFO(HEXAGON.S4_addaddi,SI_ftype_SISISI,3) 3124 // 3125 def int_hexagon_S4_addaddi : 3126 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addaddi">; 3127 // 3128 // BUILTIN_INFO(HEXAGON.S4_subaddi,SI_ftype_SISISI,3) 3129 // 3130 def int_hexagon_S4_subaddi : 3131 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subaddi">; 3132 // 3133 // BUILTIN_INFO(HEXAGON.M4_and_and,SI_ftype_SISISI,3) 3134 // 3135 def int_hexagon_M4_and_and : 3136 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_and">; 3137 // 3138 // BUILTIN_INFO(HEXAGON.M4_and_andn,SI_ftype_SISISI,3) 3139 // 3140 def int_hexagon_M4_and_andn : 3141 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_andn">; 3142 // 3143 // BUILTIN_INFO(HEXAGON.M4_and_or,SI_ftype_SISISI,3) 3144 // 3145 def int_hexagon_M4_and_or : 3146 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_or">; 3147 // 3148 // BUILTIN_INFO(HEXAGON.M4_and_xor,SI_ftype_SISISI,3) 3149 // 3150 def int_hexagon_M4_and_xor : 3151 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_xor">; 3152 // 3153 // BUILTIN_INFO(HEXAGON.M4_or_and,SI_ftype_SISISI,3) 3154 // 3155 def int_hexagon_M4_or_and : 3156 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_and">; 3157 // 3158 // BUILTIN_INFO(HEXAGON.M4_or_andn,SI_ftype_SISISI,3) 3159 // 3160 def int_hexagon_M4_or_andn : 3161 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_andn">; 3162 // 3163 // BUILTIN_INFO(HEXAGON.M4_or_or,SI_ftype_SISISI,3) 3164 // 3165 def int_hexagon_M4_or_or : 3166 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_or">; 3167 // 3168 // BUILTIN_INFO(HEXAGON.M4_or_xor,SI_ftype_SISISI,3) 3169 // 3170 def int_hexagon_M4_or_xor : 3171 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_xor">; 3172 // 3173 // BUILTIN_INFO(HEXAGON.S4_or_andix,SI_ftype_SISISI,3) 3174 // 3175 def int_hexagon_S4_or_andix : 3176 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_andix">; 3177 // 3178 // BUILTIN_INFO(HEXAGON.S4_or_andi,SI_ftype_SISISI,3) 3179 // 3180 def int_hexagon_S4_or_andi : 3181 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_andi">; 3182 // 3183 // BUILTIN_INFO(HEXAGON.S4_or_ori,SI_ftype_SISISI,3) 3184 // 3185 def int_hexagon_S4_or_ori : 3186 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_ori">; 3187 // 3188 // BUILTIN_INFO(HEXAGON.M4_xor_and,SI_ftype_SISISI,3) 3189 // 3190 def int_hexagon_M4_xor_and : 3191 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_and">; 3192 // 3193 // BUILTIN_INFO(HEXAGON.M4_xor_or,SI_ftype_SISISI,3) 3194 // 3195 def int_hexagon_M4_xor_or : 3196 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_or">; 3197 // 3198 // BUILTIN_INFO(HEXAGON.M4_xor_andn,SI_ftype_SISISI,3) 3199 // 3200 def int_hexagon_M4_xor_andn : 3201 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_andn">; 3202 // 3203 // BUILTIN_INFO(HEXAGON.A2_subri,SI_ftype_SISI,2) 3204 // 3205 def int_hexagon_A2_subri : 3206 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subri">; 3207 // 3208 // BUILTIN_INFO(HEXAGON.A2_andir,SI_ftype_SISI,2) 3209 // 3210 def int_hexagon_A2_andir : 3211 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_andir">; 3212 // 3213 // BUILTIN_INFO(HEXAGON.A2_orir,SI_ftype_SISI,2) 3214 // 3215 def int_hexagon_A2_orir : 3216 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_orir">; 3217 // 3218 // BUILTIN_INFO(HEXAGON.A2_andp,DI_ftype_DIDI,2) 3219 // 3220 def int_hexagon_A2_andp : 3221 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_andp">; 3222 // 3223 // BUILTIN_INFO(HEXAGON.A2_orp,DI_ftype_DIDI,2) 3224 // 3225 def int_hexagon_A2_orp : 3226 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_orp">; 3227 // 3228 // BUILTIN_INFO(HEXAGON.A2_xorp,DI_ftype_DIDI,2) 3229 // 3230 def int_hexagon_A2_xorp : 3231 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_xorp">; 3232 // 3233 // BUILTIN_INFO(HEXAGON.A2_notp,DI_ftype_DI,1) 3234 // 3235 def int_hexagon_A2_notp : 3236 Hexagon_di_di_Intrinsic<"HEXAGON_A2_notp">; 3237 // 3238 // BUILTIN_INFO(HEXAGON.A2_sxtw,DI_ftype_SI,1) 3239 // 3240 def int_hexagon_A2_sxtw : 3241 Hexagon_di_si_Intrinsic<"HEXAGON_A2_sxtw">; 3242 // 3243 // BUILTIN_INFO(HEXAGON.A2_sat,SI_ftype_DI,1) 3244 // 3245 def int_hexagon_A2_sat : 3246 Hexagon_si_di_Intrinsic<"HEXAGON_A2_sat">; 3247 // 3248 // BUILTIN_INFO(HEXAGON.A2_roundsat,SI_ftype_DI,1) 3249 // 3250 def int_hexagon_A2_roundsat : 3251 Hexagon_si_di_Intrinsic<"HEXAGON_A2_roundsat">; 3252 // 3253 // BUILTIN_INFO(HEXAGON.A2_sath,SI_ftype_SI,1) 3254 // 3255 def int_hexagon_A2_sath : 3256 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sath">; 3257 // 3258 // BUILTIN_INFO(HEXAGON.A2_satuh,SI_ftype_SI,1) 3259 // 3260 def int_hexagon_A2_satuh : 3261 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satuh">; 3262 // 3263 // BUILTIN_INFO(HEXAGON.A2_satub,SI_ftype_SI,1) 3264 // 3265 def int_hexagon_A2_satub : 3266 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satub">; 3267 // 3268 // BUILTIN_INFO(HEXAGON.A2_satb,SI_ftype_SI,1) 3269 // 3270 def int_hexagon_A2_satb : 3271 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satb">; 3272 // 3273 // BUILTIN_INFO(HEXAGON.A2_vaddub,DI_ftype_DIDI,2) 3274 // 3275 def int_hexagon_A2_vaddub : 3276 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddub">; 3277 // 3278 // BUILTIN_INFO(HEXAGON.A2_vaddb_map,DI_ftype_DIDI,2) 3279 // 3280 def int_hexagon_A2_vaddb_map : 3281 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddb_map">; 3282 // 3283 // BUILTIN_INFO(HEXAGON.A2_vaddubs,DI_ftype_DIDI,2) 3284 // 3285 def int_hexagon_A2_vaddubs : 3286 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddubs">; 3287 // 3288 // BUILTIN_INFO(HEXAGON.A2_vaddh,DI_ftype_DIDI,2) 3289 // 3290 def int_hexagon_A2_vaddh : 3291 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddh">; 3292 // 3293 // BUILTIN_INFO(HEXAGON.A2_vaddhs,DI_ftype_DIDI,2) 3294 // 3295 def int_hexagon_A2_vaddhs : 3296 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddhs">; 3297 // 3298 // BUILTIN_INFO(HEXAGON.A2_vadduhs,DI_ftype_DIDI,2) 3299 // 3300 def int_hexagon_A2_vadduhs : 3301 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vadduhs">; 3302 // 3303 // BUILTIN_INFO(HEXAGON.A5_vaddhubs,SI_ftype_DIDI,2) 3304 // 3305 def int_hexagon_A5_vaddhubs : 3306 Hexagon_si_didi_Intrinsic<"HEXAGON_A5_vaddhubs">; 3307 // 3308 // BUILTIN_INFO(HEXAGON.A2_vaddw,DI_ftype_DIDI,2) 3309 // 3310 def int_hexagon_A2_vaddw : 3311 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddw">; 3312 // 3313 // BUILTIN_INFO(HEXAGON.A2_vaddws,DI_ftype_DIDI,2) 3314 // 3315 def int_hexagon_A2_vaddws : 3316 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddws">; 3317 // 3318 // BUILTIN_INFO(HEXAGON.S4_vxaddsubw,DI_ftype_DIDI,2) 3319 // 3320 def int_hexagon_S4_vxaddsubw : 3321 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubw">; 3322 // 3323 // BUILTIN_INFO(HEXAGON.S4_vxsubaddw,DI_ftype_DIDI,2) 3324 // 3325 def int_hexagon_S4_vxsubaddw : 3326 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddw">; 3327 // 3328 // BUILTIN_INFO(HEXAGON.S4_vxaddsubh,DI_ftype_DIDI,2) 3329 // 3330 def int_hexagon_S4_vxaddsubh : 3331 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubh">; 3332 // 3333 // BUILTIN_INFO(HEXAGON.S4_vxsubaddh,DI_ftype_DIDI,2) 3334 // 3335 def int_hexagon_S4_vxsubaddh : 3336 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddh">; 3337 // 3338 // BUILTIN_INFO(HEXAGON.S4_vxaddsubhr,DI_ftype_DIDI,2) 3339 // 3340 def int_hexagon_S4_vxaddsubhr : 3341 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubhr">; 3342 // 3343 // BUILTIN_INFO(HEXAGON.S4_vxsubaddhr,DI_ftype_DIDI,2) 3344 // 3345 def int_hexagon_S4_vxsubaddhr : 3346 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddhr">; 3347 // 3348 // BUILTIN_INFO(HEXAGON.A2_svavgh,SI_ftype_SISI,2) 3349 // 3350 def int_hexagon_A2_svavgh : 3351 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svavgh">; 3352 // 3353 // BUILTIN_INFO(HEXAGON.A2_svavghs,SI_ftype_SISI,2) 3354 // 3355 def int_hexagon_A2_svavghs : 3356 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svavghs">; 3357 // 3358 // BUILTIN_INFO(HEXAGON.A2_svnavgh,SI_ftype_SISI,2) 3359 // 3360 def int_hexagon_A2_svnavgh : 3361 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svnavgh">; 3362 // 3363 // BUILTIN_INFO(HEXAGON.A2_svaddh,SI_ftype_SISI,2) 3364 // 3365 def int_hexagon_A2_svaddh : 3366 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svaddh">; 3367 // 3368 // BUILTIN_INFO(HEXAGON.A2_svaddhs,SI_ftype_SISI,2) 3369 // 3370 def int_hexagon_A2_svaddhs : 3371 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svaddhs">; 3372 // 3373 // BUILTIN_INFO(HEXAGON.A2_svadduhs,SI_ftype_SISI,2) 3374 // 3375 def int_hexagon_A2_svadduhs : 3376 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svadduhs">; 3377 // 3378 // BUILTIN_INFO(HEXAGON.A2_svsubh,SI_ftype_SISI,2) 3379 // 3380 def int_hexagon_A2_svsubh : 3381 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubh">; 3382 // 3383 // BUILTIN_INFO(HEXAGON.A2_svsubhs,SI_ftype_SISI,2) 3384 // 3385 def int_hexagon_A2_svsubhs : 3386 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubhs">; 3387 // 3388 // BUILTIN_INFO(HEXAGON.A2_svsubuhs,SI_ftype_SISI,2) 3389 // 3390 def int_hexagon_A2_svsubuhs : 3391 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubuhs">; 3392 // 3393 // BUILTIN_INFO(HEXAGON.A2_vraddub,DI_ftype_DIDI,2) 3394 // 3395 def int_hexagon_A2_vraddub : 3396 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vraddub">; 3397 // 3398 // BUILTIN_INFO(HEXAGON.A2_vraddub_acc,DI_ftype_DIDIDI,3) 3399 // 3400 def int_hexagon_A2_vraddub_acc : 3401 Hexagon_di_dididi_Intrinsic<"HEXAGON_A2_vraddub_acc">; 3402 // 3403 // BUILTIN_INFO(HEXAGON.M2_vraddh,SI_ftype_DIDI,2) 3404 // 3405 def int_hexagon_M2_vraddh : 3406 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vraddh">; 3407 // 3408 // BUILTIN_INFO(HEXAGON.M2_vradduh,SI_ftype_DIDI,2) 3409 // 3410 def int_hexagon_M2_vradduh : 3411 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vradduh">; 3412 // 3413 // BUILTIN_INFO(HEXAGON.A2_vsubub,DI_ftype_DIDI,2) 3414 // 3415 def int_hexagon_A2_vsubub : 3416 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubub">; 3417 // 3418 // BUILTIN_INFO(HEXAGON.A2_vsubb_map,DI_ftype_DIDI,2) 3419 // 3420 def int_hexagon_A2_vsubb_map : 3421 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubb_map">; 3422 // 3423 // BUILTIN_INFO(HEXAGON.A2_vsububs,DI_ftype_DIDI,2) 3424 // 3425 def int_hexagon_A2_vsububs : 3426 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsububs">; 3427 // 3428 // BUILTIN_INFO(HEXAGON.A2_vsubh,DI_ftype_DIDI,2) 3429 // 3430 def int_hexagon_A2_vsubh : 3431 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubh">; 3432 // 3433 // BUILTIN_INFO(HEXAGON.A2_vsubhs,DI_ftype_DIDI,2) 3434 // 3435 def int_hexagon_A2_vsubhs : 3436 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubhs">; 3437 // 3438 // BUILTIN_INFO(HEXAGON.A2_vsubuhs,DI_ftype_DIDI,2) 3439 // 3440 def int_hexagon_A2_vsubuhs : 3441 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubuhs">; 3442 // 3443 // BUILTIN_INFO(HEXAGON.A2_vsubw,DI_ftype_DIDI,2) 3444 // 3445 def int_hexagon_A2_vsubw : 3446 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubw">; 3447 // 3448 // BUILTIN_INFO(HEXAGON.A2_vsubws,DI_ftype_DIDI,2) 3449 // 3450 def int_hexagon_A2_vsubws : 3451 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubws">; 3452 // 3453 // BUILTIN_INFO(HEXAGON.A2_vabsh,DI_ftype_DI,1) 3454 // 3455 def int_hexagon_A2_vabsh : 3456 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabsh">; 3457 // 3458 // BUILTIN_INFO(HEXAGON.A2_vabshsat,DI_ftype_DI,1) 3459 // 3460 def int_hexagon_A2_vabshsat : 3461 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabshsat">; 3462 // 3463 // BUILTIN_INFO(HEXAGON.A2_vabsw,DI_ftype_DI,1) 3464 // 3465 def int_hexagon_A2_vabsw : 3466 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabsw">; 3467 // 3468 // BUILTIN_INFO(HEXAGON.A2_vabswsat,DI_ftype_DI,1) 3469 // 3470 def int_hexagon_A2_vabswsat : 3471 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabswsat">; 3472 // 3473 // BUILTIN_INFO(HEXAGON.M2_vabsdiffw,DI_ftype_DIDI,2) 3474 // 3475 def int_hexagon_M2_vabsdiffw : 3476 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vabsdiffw">; 3477 // 3478 // BUILTIN_INFO(HEXAGON.M2_vabsdiffh,DI_ftype_DIDI,2) 3479 // 3480 def int_hexagon_M2_vabsdiffh : 3481 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vabsdiffh">; 3482 // 3483 // BUILTIN_INFO(HEXAGON.A2_vrsadub,DI_ftype_DIDI,2) 3484 // 3485 def int_hexagon_A2_vrsadub : 3486 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vrsadub">; 3487 // 3488 // BUILTIN_INFO(HEXAGON.A2_vrsadub_acc,DI_ftype_DIDIDI,3) 3489 // 3490 def int_hexagon_A2_vrsadub_acc : 3491 Hexagon_di_dididi_Intrinsic<"HEXAGON_A2_vrsadub_acc">; 3492 // 3493 // BUILTIN_INFO(HEXAGON.A2_vavgub,DI_ftype_DIDI,2) 3494 // 3495 def int_hexagon_A2_vavgub : 3496 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgub">; 3497 // 3498 // BUILTIN_INFO(HEXAGON.A2_vavguh,DI_ftype_DIDI,2) 3499 // 3500 def int_hexagon_A2_vavguh : 3501 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguh">; 3502 // 3503 // BUILTIN_INFO(HEXAGON.A2_vavgh,DI_ftype_DIDI,2) 3504 // 3505 def int_hexagon_A2_vavgh : 3506 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgh">; 3507 // 3508 // BUILTIN_INFO(HEXAGON.A2_vnavgh,DI_ftype_DIDI,2) 3509 // 3510 def int_hexagon_A2_vnavgh : 3511 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgh">; 3512 // 3513 // BUILTIN_INFO(HEXAGON.A2_vavgw,DI_ftype_DIDI,2) 3514 // 3515 def int_hexagon_A2_vavgw : 3516 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgw">; 3517 // 3518 // BUILTIN_INFO(HEXAGON.A2_vnavgw,DI_ftype_DIDI,2) 3519 // 3520 def int_hexagon_A2_vnavgw : 3521 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgw">; 3522 // 3523 // BUILTIN_INFO(HEXAGON.A2_vavgwr,DI_ftype_DIDI,2) 3524 // 3525 def int_hexagon_A2_vavgwr : 3526 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgwr">; 3527 // 3528 // BUILTIN_INFO(HEXAGON.A2_vnavgwr,DI_ftype_DIDI,2) 3529 // 3530 def int_hexagon_A2_vnavgwr : 3531 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgwr">; 3532 // 3533 // BUILTIN_INFO(HEXAGON.A2_vavgwcr,DI_ftype_DIDI,2) 3534 // 3535 def int_hexagon_A2_vavgwcr : 3536 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgwcr">; 3537 // 3538 // BUILTIN_INFO(HEXAGON.A2_vnavgwcr,DI_ftype_DIDI,2) 3539 // 3540 def int_hexagon_A2_vnavgwcr : 3541 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgwcr">; 3542 // 3543 // BUILTIN_INFO(HEXAGON.A2_vavghcr,DI_ftype_DIDI,2) 3544 // 3545 def int_hexagon_A2_vavghcr : 3546 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavghcr">; 3547 // 3548 // BUILTIN_INFO(HEXAGON.A2_vnavghcr,DI_ftype_DIDI,2) 3549 // 3550 def int_hexagon_A2_vnavghcr : 3551 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavghcr">; 3552 // 3553 // BUILTIN_INFO(HEXAGON.A2_vavguw,DI_ftype_DIDI,2) 3554 // 3555 def int_hexagon_A2_vavguw : 3556 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguw">; 3557 // 3558 // BUILTIN_INFO(HEXAGON.A2_vavguwr,DI_ftype_DIDI,2) 3559 // 3560 def int_hexagon_A2_vavguwr : 3561 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguwr">; 3562 // 3563 // BUILTIN_INFO(HEXAGON.A2_vavgubr,DI_ftype_DIDI,2) 3564 // 3565 def int_hexagon_A2_vavgubr : 3566 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgubr">; 3567 // 3568 // BUILTIN_INFO(HEXAGON.A2_vavguhr,DI_ftype_DIDI,2) 3569 // 3570 def int_hexagon_A2_vavguhr : 3571 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguhr">; 3572 // 3573 // BUILTIN_INFO(HEXAGON.A2_vavghr,DI_ftype_DIDI,2) 3574 // 3575 def int_hexagon_A2_vavghr : 3576 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavghr">; 3577 // 3578 // BUILTIN_INFO(HEXAGON.A2_vnavghr,DI_ftype_DIDI,2) 3579 // 3580 def int_hexagon_A2_vnavghr : 3581 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavghr">; 3582 // 3583 // BUILTIN_INFO(HEXAGON.A4_round_ri,SI_ftype_SISI,2) 3584 // 3585 def int_hexagon_A4_round_ri : 3586 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_ri">; 3587 // 3588 // BUILTIN_INFO(HEXAGON.A4_round_rr,SI_ftype_SISI,2) 3589 // 3590 def int_hexagon_A4_round_rr : 3591 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_rr">; 3592 // 3593 // BUILTIN_INFO(HEXAGON.A4_round_ri_sat,SI_ftype_SISI,2) 3594 // 3595 def int_hexagon_A4_round_ri_sat : 3596 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_ri_sat">; 3597 // 3598 // BUILTIN_INFO(HEXAGON.A4_round_rr_sat,SI_ftype_SISI,2) 3599 // 3600 def int_hexagon_A4_round_rr_sat : 3601 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_rr_sat">; 3602 // 3603 // BUILTIN_INFO(HEXAGON.A4_cround_ri,SI_ftype_SISI,2) 3604 // 3605 def int_hexagon_A4_cround_ri : 3606 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cround_ri">; 3607 // 3608 // BUILTIN_INFO(HEXAGON.A4_cround_rr,SI_ftype_SISI,2) 3609 // 3610 def int_hexagon_A4_cround_rr : 3611 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cround_rr">; 3612 // 3613 // BUILTIN_INFO(HEXAGON.A4_vrminh,DI_ftype_DIDISI,3) 3614 // 3615 def int_hexagon_A4_vrminh : 3616 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminh">; 3617 // 3618 // BUILTIN_INFO(HEXAGON.A4_vrmaxh,DI_ftype_DIDISI,3) 3619 // 3620 def int_hexagon_A4_vrmaxh : 3621 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxh">; 3622 // 3623 // BUILTIN_INFO(HEXAGON.A4_vrminuh,DI_ftype_DIDISI,3) 3624 // 3625 def int_hexagon_A4_vrminuh : 3626 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminuh">; 3627 // 3628 // BUILTIN_INFO(HEXAGON.A4_vrmaxuh,DI_ftype_DIDISI,3) 3629 // 3630 def int_hexagon_A4_vrmaxuh : 3631 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxuh">; 3632 // 3633 // BUILTIN_INFO(HEXAGON.A4_vrminw,DI_ftype_DIDISI,3) 3634 // 3635 def int_hexagon_A4_vrminw : 3636 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminw">; 3637 // 3638 // BUILTIN_INFO(HEXAGON.A4_vrmaxw,DI_ftype_DIDISI,3) 3639 // 3640 def int_hexagon_A4_vrmaxw : 3641 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxw">; 3642 // 3643 // BUILTIN_INFO(HEXAGON.A4_vrminuw,DI_ftype_DIDISI,3) 3644 // 3645 def int_hexagon_A4_vrminuw : 3646 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminuw">; 3647 // 3648 // BUILTIN_INFO(HEXAGON.A4_vrmaxuw,DI_ftype_DIDISI,3) 3649 // 3650 def int_hexagon_A4_vrmaxuw : 3651 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxuw">; 3652 // 3653 // BUILTIN_INFO(HEXAGON.A2_vminb,DI_ftype_DIDI,2) 3654 // 3655 def int_hexagon_A2_vminb : 3656 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminb">; 3657 // 3658 // BUILTIN_INFO(HEXAGON.A2_vmaxb,DI_ftype_DIDI,2) 3659 // 3660 def int_hexagon_A2_vmaxb : 3661 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxb">; 3662 // 3663 // BUILTIN_INFO(HEXAGON.A2_vminub,DI_ftype_DIDI,2) 3664 // 3665 def int_hexagon_A2_vminub : 3666 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminub">; 3667 // 3668 // BUILTIN_INFO(HEXAGON.A2_vmaxub,DI_ftype_DIDI,2) 3669 // 3670 def int_hexagon_A2_vmaxub : 3671 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxub">; 3672 // 3673 // BUILTIN_INFO(HEXAGON.A2_vminh,DI_ftype_DIDI,2) 3674 // 3675 def int_hexagon_A2_vminh : 3676 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminh">; 3677 // 3678 // BUILTIN_INFO(HEXAGON.A2_vmaxh,DI_ftype_DIDI,2) 3679 // 3680 def int_hexagon_A2_vmaxh : 3681 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxh">; 3682 // 3683 // BUILTIN_INFO(HEXAGON.A2_vminuh,DI_ftype_DIDI,2) 3684 // 3685 def int_hexagon_A2_vminuh : 3686 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminuh">; 3687 // 3688 // BUILTIN_INFO(HEXAGON.A2_vmaxuh,DI_ftype_DIDI,2) 3689 // 3690 def int_hexagon_A2_vmaxuh : 3691 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxuh">; 3692 // 3693 // BUILTIN_INFO(HEXAGON.A2_vminw,DI_ftype_DIDI,2) 3694 // 3695 def int_hexagon_A2_vminw : 3696 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminw">; 3697 // 3698 // BUILTIN_INFO(HEXAGON.A2_vmaxw,DI_ftype_DIDI,2) 3699 // 3700 def int_hexagon_A2_vmaxw : 3701 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxw">; 3702 // 3703 // BUILTIN_INFO(HEXAGON.A2_vminuw,DI_ftype_DIDI,2) 3704 // 3705 def int_hexagon_A2_vminuw : 3706 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminuw">; 3707 // 3708 // BUILTIN_INFO(HEXAGON.A2_vmaxuw,DI_ftype_DIDI,2) 3709 // 3710 def int_hexagon_A2_vmaxuw : 3711 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxuw">; 3712 // 3713 // BUILTIN_INFO(HEXAGON.A4_modwrapu,SI_ftype_SISI,2) 3714 // 3715 def int_hexagon_A4_modwrapu : 3716 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_modwrapu">; 3717 // 3718 // BUILTIN_INFO(HEXAGON.F2_sfadd,SF_ftype_SFSF,2) 3719 // 3720 def int_hexagon_F2_sfadd : 3721 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfadd">; 3722 // 3723 // BUILTIN_INFO(HEXAGON.F2_sfsub,SF_ftype_SFSF,2) 3724 // 3725 def int_hexagon_F2_sfsub : 3726 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfsub">; 3727 // 3728 // BUILTIN_INFO(HEXAGON.F2_sfmpy,SF_ftype_SFSF,2) 3729 // 3730 def int_hexagon_F2_sfmpy : 3731 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmpy">; 3732 // 3733 // BUILTIN_INFO(HEXAGON.F2_sffma,SF_ftype_SFSFSF,3) 3734 // 3735 def int_hexagon_F2_sffma : 3736 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffma">; 3737 // 3738 // BUILTIN_INFO(HEXAGON.F2_sffma_sc,SF_ftype_SFSFSFQI,4) 3739 // 3740 def int_hexagon_F2_sffma_sc : 3741 Hexagon_sf_sfsfsfqi_Intrinsic<"HEXAGON_F2_sffma_sc">; 3742 // 3743 // BUILTIN_INFO(HEXAGON.F2_sffms,SF_ftype_SFSFSF,3) 3744 // 3745 def int_hexagon_F2_sffms : 3746 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffms">; 3747 // 3748 // BUILTIN_INFO(HEXAGON.F2_sffma_lib,SF_ftype_SFSFSF,3) 3749 // 3750 def int_hexagon_F2_sffma_lib : 3751 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffma_lib">; 3752 // 3753 // BUILTIN_INFO(HEXAGON.F2_sffms_lib,SF_ftype_SFSFSF,3) 3754 // 3755 def int_hexagon_F2_sffms_lib : 3756 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffms_lib">; 3757 // 3758 // BUILTIN_INFO(HEXAGON.F2_sfcmpeq,QI_ftype_SFSF,2) 3759 // 3760 def int_hexagon_F2_sfcmpeq : 3761 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpeq">; 3762 // 3763 // BUILTIN_INFO(HEXAGON.F2_sfcmpgt,QI_ftype_SFSF,2) 3764 // 3765 def int_hexagon_F2_sfcmpgt : 3766 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpgt">; 3767 // 3768 // BUILTIN_INFO(HEXAGON.F2_sfcmpge,QI_ftype_SFSF,2) 3769 // 3770 def int_hexagon_F2_sfcmpge : 3771 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpge">; 3772 // 3773 // BUILTIN_INFO(HEXAGON.F2_sfcmpuo,QI_ftype_SFSF,2) 3774 // 3775 def int_hexagon_F2_sfcmpuo : 3776 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpuo">; 3777 // 3778 // BUILTIN_INFO(HEXAGON.F2_sfmax,SF_ftype_SFSF,2) 3779 // 3780 def int_hexagon_F2_sfmax : 3781 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmax">; 3782 // 3783 // BUILTIN_INFO(HEXAGON.F2_sfmin,SF_ftype_SFSF,2) 3784 // 3785 def int_hexagon_F2_sfmin : 3786 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmin">; 3787 // 3788 // BUILTIN_INFO(HEXAGON.F2_sfclass,QI_ftype_SFSI,2) 3789 // 3790 def int_hexagon_F2_sfclass : 3791 Hexagon_si_sfsi_Intrinsic<"HEXAGON_F2_sfclass">; 3792 // 3793 // BUILTIN_INFO(HEXAGON.F2_sfimm_p,SF_ftype_SI,1) 3794 // 3795 def int_hexagon_F2_sfimm_p : 3796 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_sfimm_p">; 3797 // 3798 // BUILTIN_INFO(HEXAGON.F2_sfimm_n,SF_ftype_SI,1) 3799 // 3800 def int_hexagon_F2_sfimm_n : 3801 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_sfimm_n">; 3802 // 3803 // BUILTIN_INFO(HEXAGON.F2_sffixupn,SF_ftype_SFSF,2) 3804 // 3805 def int_hexagon_F2_sffixupn : 3806 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sffixupn">; 3807 // 3808 // BUILTIN_INFO(HEXAGON.F2_sffixupd,SF_ftype_SFSF,2) 3809 // 3810 def int_hexagon_F2_sffixupd : 3811 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sffixupd">; 3812 // 3813 // BUILTIN_INFO(HEXAGON.F2_sffixupr,SF_ftype_SF,1) 3814 // 3815 def int_hexagon_F2_sffixupr : 3816 Hexagon_sf_sf_Intrinsic<"HEXAGON_F2_sffixupr">; 3817 // 3818 // BUILTIN_INFO(HEXAGON.F2_dfcmpeq,QI_ftype_DFDF,2) 3819 // 3820 def int_hexagon_F2_dfcmpeq : 3821 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpeq">; 3822 // 3823 // BUILTIN_INFO(HEXAGON.F2_dfcmpgt,QI_ftype_DFDF,2) 3824 // 3825 def int_hexagon_F2_dfcmpgt : 3826 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpgt">; 3827 // 3828 // BUILTIN_INFO(HEXAGON.F2_dfcmpge,QI_ftype_DFDF,2) 3829 // 3830 def int_hexagon_F2_dfcmpge : 3831 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpge">; 3832 // 3833 // BUILTIN_INFO(HEXAGON.F2_dfcmpuo,QI_ftype_DFDF,2) 3834 // 3835 def int_hexagon_F2_dfcmpuo : 3836 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpuo">; 3837 // 3838 // BUILTIN_INFO(HEXAGON.F2_dfclass,QI_ftype_DFSI,2) 3839 // 3840 def int_hexagon_F2_dfclass : 3841 Hexagon_si_dfsi_Intrinsic<"HEXAGON_F2_dfclass">; 3842 // 3843 // BUILTIN_INFO(HEXAGON.F2_dfimm_p,DF_ftype_SI,1) 3844 // 3845 def int_hexagon_F2_dfimm_p : 3846 Hexagon_df_si_Intrinsic<"HEXAGON_F2_dfimm_p">; 3847 // 3848 // BUILTIN_INFO(HEXAGON.F2_dfimm_n,DF_ftype_SI,1) 3849 // 3850 def int_hexagon_F2_dfimm_n : 3851 Hexagon_df_si_Intrinsic<"HEXAGON_F2_dfimm_n">; 3852 // 3853 // BUILTIN_INFO(HEXAGON.F2_conv_sf2df,DF_ftype_SF,1) 3854 // 3855 def int_hexagon_F2_conv_sf2df : 3856 Hexagon_df_sf_Intrinsic<"HEXAGON_F2_conv_sf2df">; 3857 // 3858 // BUILTIN_INFO(HEXAGON.F2_conv_df2sf,SF_ftype_DF,1) 3859 // 3860 def int_hexagon_F2_conv_df2sf : 3861 Hexagon_sf_df_Intrinsic<"HEXAGON_F2_conv_df2sf">; 3862 // 3863 // BUILTIN_INFO(HEXAGON.F2_conv_uw2sf,SF_ftype_SI,1) 3864 // 3865 def int_hexagon_F2_conv_uw2sf : 3866 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_conv_uw2sf">; 3867 // 3868 // BUILTIN_INFO(HEXAGON.F2_conv_uw2df,DF_ftype_SI,1) 3869 // 3870 def int_hexagon_F2_conv_uw2df : 3871 Hexagon_df_si_Intrinsic<"HEXAGON_F2_conv_uw2df">; 3872 // 3873 // BUILTIN_INFO(HEXAGON.F2_conv_w2sf,SF_ftype_SI,1) 3874 // 3875 def int_hexagon_F2_conv_w2sf : 3876 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_conv_w2sf">; 3877 // 3878 // BUILTIN_INFO(HEXAGON.F2_conv_w2df,DF_ftype_SI,1) 3879 // 3880 def int_hexagon_F2_conv_w2df : 3881 Hexagon_df_si_Intrinsic<"HEXAGON_F2_conv_w2df">; 3882 // 3883 // BUILTIN_INFO(HEXAGON.F2_conv_ud2sf,SF_ftype_DI,1) 3884 // 3885 def int_hexagon_F2_conv_ud2sf : 3886 Hexagon_sf_di_Intrinsic<"HEXAGON_F2_conv_ud2sf">; 3887 // 3888 // BUILTIN_INFO(HEXAGON.F2_conv_ud2df,DF_ftype_DI,1) 3889 // 3890 def int_hexagon_F2_conv_ud2df : 3891 Hexagon_df_di_Intrinsic<"HEXAGON_F2_conv_ud2df">; 3892 // 3893 // BUILTIN_INFO(HEXAGON.F2_conv_d2sf,SF_ftype_DI,1) 3894 // 3895 def int_hexagon_F2_conv_d2sf : 3896 Hexagon_sf_di_Intrinsic<"HEXAGON_F2_conv_d2sf">; 3897 // 3898 // BUILTIN_INFO(HEXAGON.F2_conv_d2df,DF_ftype_DI,1) 3899 // 3900 def int_hexagon_F2_conv_d2df : 3901 Hexagon_df_di_Intrinsic<"HEXAGON_F2_conv_d2df">; 3902 // 3903 // BUILTIN_INFO(HEXAGON.F2_conv_sf2uw,SI_ftype_SF,1) 3904 // 3905 def int_hexagon_F2_conv_sf2uw : 3906 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2uw">; 3907 // 3908 // BUILTIN_INFO(HEXAGON.F2_conv_sf2w,SI_ftype_SF,1) 3909 // 3910 def int_hexagon_F2_conv_sf2w : 3911 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2w">; 3912 // 3913 // BUILTIN_INFO(HEXAGON.F2_conv_sf2ud,DI_ftype_SF,1) 3914 // 3915 def int_hexagon_F2_conv_sf2ud : 3916 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2ud">; 3917 // 3918 // BUILTIN_INFO(HEXAGON.F2_conv_sf2d,DI_ftype_SF,1) 3919 // 3920 def int_hexagon_F2_conv_sf2d : 3921 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2d">; 3922 // 3923 // BUILTIN_INFO(HEXAGON.F2_conv_df2uw,SI_ftype_DF,1) 3924 // 3925 def int_hexagon_F2_conv_df2uw : 3926 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2uw">; 3927 // 3928 // BUILTIN_INFO(HEXAGON.F2_conv_df2w,SI_ftype_DF,1) 3929 // 3930 def int_hexagon_F2_conv_df2w : 3931 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2w">; 3932 // 3933 // BUILTIN_INFO(HEXAGON.F2_conv_df2ud,DI_ftype_DF,1) 3934 // 3935 def int_hexagon_F2_conv_df2ud : 3936 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2ud">; 3937 // 3938 // BUILTIN_INFO(HEXAGON.F2_conv_df2d,DI_ftype_DF,1) 3939 // 3940 def int_hexagon_F2_conv_df2d : 3941 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2d">; 3942 // 3943 // BUILTIN_INFO(HEXAGON.F2_conv_sf2uw_chop,SI_ftype_SF,1) 3944 // 3945 def int_hexagon_F2_conv_sf2uw_chop : 3946 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2uw_chop">; 3947 // 3948 // BUILTIN_INFO(HEXAGON.F2_conv_sf2w_chop,SI_ftype_SF,1) 3949 // 3950 def int_hexagon_F2_conv_sf2w_chop : 3951 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2w_chop">; 3952 // 3953 // BUILTIN_INFO(HEXAGON.F2_conv_sf2ud_chop,DI_ftype_SF,1) 3954 // 3955 def int_hexagon_F2_conv_sf2ud_chop : 3956 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2ud_chop">; 3957 // 3958 // BUILTIN_INFO(HEXAGON.F2_conv_sf2d_chop,DI_ftype_SF,1) 3959 // 3960 def int_hexagon_F2_conv_sf2d_chop : 3961 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2d_chop">; 3962 // 3963 // BUILTIN_INFO(HEXAGON.F2_conv_df2uw_chop,SI_ftype_DF,1) 3964 // 3965 def int_hexagon_F2_conv_df2uw_chop : 3966 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2uw_chop">; 3967 // 3968 // BUILTIN_INFO(HEXAGON.F2_conv_df2w_chop,SI_ftype_DF,1) 3969 // 3970 def int_hexagon_F2_conv_df2w_chop : 3971 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2w_chop">; 3972 // 3973 // BUILTIN_INFO(HEXAGON.F2_conv_df2ud_chop,DI_ftype_DF,1) 3974 // 3975 def int_hexagon_F2_conv_df2ud_chop : 3976 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2ud_chop">; 3977 // 3978 // BUILTIN_INFO(HEXAGON.F2_conv_df2d_chop,DI_ftype_DF,1) 3979 // 3980 def int_hexagon_F2_conv_df2d_chop : 3981 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2d_chop">; 3982 // 3983 // BUILTIN_INFO(HEXAGON.S2_asr_r_r,SI_ftype_SISI,2) 3984 // 3985 def int_hexagon_S2_asr_r_r : 3986 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_r_r">; 3987 // 3988 // BUILTIN_INFO(HEXAGON.S2_asl_r_r,SI_ftype_SISI,2) 3989 // 3990 def int_hexagon_S2_asl_r_r : 3991 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_r_r">; 3992 // 3993 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r,SI_ftype_SISI,2) 3994 // 3995 def int_hexagon_S2_lsr_r_r : 3996 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsr_r_r">; 3997 // 3998 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r,SI_ftype_SISI,2) 3999 // 4000 def int_hexagon_S2_lsl_r_r : 4001 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsl_r_r">; 4002 // 4003 // BUILTIN_INFO(HEXAGON.S2_asr_r_p,DI_ftype_DISI,2) 4004 // 4005 def int_hexagon_S2_asr_r_p : 4006 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_p">; 4007 // 4008 // BUILTIN_INFO(HEXAGON.S2_asl_r_p,DI_ftype_DISI,2) 4009 // 4010 def int_hexagon_S2_asl_r_p : 4011 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_p">; 4012 // 4013 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p,DI_ftype_DISI,2) 4014 // 4015 def int_hexagon_S2_lsr_r_p : 4016 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_p">; 4017 // 4018 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p,DI_ftype_DISI,2) 4019 // 4020 def int_hexagon_S2_lsl_r_p : 4021 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_p">; 4022 // 4023 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_acc,SI_ftype_SISISI,3) 4024 // 4025 def int_hexagon_S2_asr_r_r_acc : 4026 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_acc">; 4027 // 4028 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_acc,SI_ftype_SISISI,3) 4029 // 4030 def int_hexagon_S2_asl_r_r_acc : 4031 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_acc">; 4032 // 4033 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_acc,SI_ftype_SISISI,3) 4034 // 4035 def int_hexagon_S2_lsr_r_r_acc : 4036 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_acc">; 4037 // 4038 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_acc,SI_ftype_SISISI,3) 4039 // 4040 def int_hexagon_S2_lsl_r_r_acc : 4041 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_acc">; 4042 // 4043 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_acc,DI_ftype_DIDISI,3) 4044 // 4045 def int_hexagon_S2_asr_r_p_acc : 4046 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_acc">; 4047 // 4048 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_acc,DI_ftype_DIDISI,3) 4049 // 4050 def int_hexagon_S2_asl_r_p_acc : 4051 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_acc">; 4052 // 4053 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_acc,DI_ftype_DIDISI,3) 4054 // 4055 def int_hexagon_S2_lsr_r_p_acc : 4056 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_acc">; 4057 // 4058 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_acc,DI_ftype_DIDISI,3) 4059 // 4060 def int_hexagon_S2_lsl_r_p_acc : 4061 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_acc">; 4062 // 4063 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_nac,SI_ftype_SISISI,3) 4064 // 4065 def int_hexagon_S2_asr_r_r_nac : 4066 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_nac">; 4067 // 4068 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_nac,SI_ftype_SISISI,3) 4069 // 4070 def int_hexagon_S2_asl_r_r_nac : 4071 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_nac">; 4072 // 4073 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_nac,SI_ftype_SISISI,3) 4074 // 4075 def int_hexagon_S2_lsr_r_r_nac : 4076 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_nac">; 4077 // 4078 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_nac,SI_ftype_SISISI,3) 4079 // 4080 def int_hexagon_S2_lsl_r_r_nac : 4081 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_nac">; 4082 // 4083 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_nac,DI_ftype_DIDISI,3) 4084 // 4085 def int_hexagon_S2_asr_r_p_nac : 4086 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_nac">; 4087 // 4088 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_nac,DI_ftype_DIDISI,3) 4089 // 4090 def int_hexagon_S2_asl_r_p_nac : 4091 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_nac">; 4092 // 4093 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_nac,DI_ftype_DIDISI,3) 4094 // 4095 def int_hexagon_S2_lsr_r_p_nac : 4096 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_nac">; 4097 // 4098 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_nac,DI_ftype_DIDISI,3) 4099 // 4100 def int_hexagon_S2_lsl_r_p_nac : 4101 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_nac">; 4102 // 4103 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_and,SI_ftype_SISISI,3) 4104 // 4105 def int_hexagon_S2_asr_r_r_and : 4106 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_and">; 4107 // 4108 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_and,SI_ftype_SISISI,3) 4109 // 4110 def int_hexagon_S2_asl_r_r_and : 4111 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_and">; 4112 // 4113 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_and,SI_ftype_SISISI,3) 4114 // 4115 def int_hexagon_S2_lsr_r_r_and : 4116 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_and">; 4117 // 4118 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_and,SI_ftype_SISISI,3) 4119 // 4120 def int_hexagon_S2_lsl_r_r_and : 4121 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_and">; 4122 // 4123 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_or,SI_ftype_SISISI,3) 4124 // 4125 def int_hexagon_S2_asr_r_r_or : 4126 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_or">; 4127 // 4128 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_or,SI_ftype_SISISI,3) 4129 // 4130 def int_hexagon_S2_asl_r_r_or : 4131 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_or">; 4132 // 4133 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_or,SI_ftype_SISISI,3) 4134 // 4135 def int_hexagon_S2_lsr_r_r_or : 4136 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_or">; 4137 // 4138 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_or,SI_ftype_SISISI,3) 4139 // 4140 def int_hexagon_S2_lsl_r_r_or : 4141 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_or">; 4142 // 4143 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_and,DI_ftype_DIDISI,3) 4144 // 4145 def int_hexagon_S2_asr_r_p_and : 4146 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_and">; 4147 // 4148 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_and,DI_ftype_DIDISI,3) 4149 // 4150 def int_hexagon_S2_asl_r_p_and : 4151 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_and">; 4152 // 4153 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_and,DI_ftype_DIDISI,3) 4154 // 4155 def int_hexagon_S2_lsr_r_p_and : 4156 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_and">; 4157 // 4158 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_and,DI_ftype_DIDISI,3) 4159 // 4160 def int_hexagon_S2_lsl_r_p_and : 4161 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_and">; 4162 // 4163 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_or,DI_ftype_DIDISI,3) 4164 // 4165 def int_hexagon_S2_asr_r_p_or : 4166 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_or">; 4167 // 4168 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_or,DI_ftype_DIDISI,3) 4169 // 4170 def int_hexagon_S2_asl_r_p_or : 4171 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_or">; 4172 // 4173 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_or,DI_ftype_DIDISI,3) 4174 // 4175 def int_hexagon_S2_lsr_r_p_or : 4176 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_or">; 4177 // 4178 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_or,DI_ftype_DIDISI,3) 4179 // 4180 def int_hexagon_S2_lsl_r_p_or : 4181 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_or">; 4182 // 4183 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_xor,DI_ftype_DIDISI,3) 4184 // 4185 def int_hexagon_S2_asr_r_p_xor : 4186 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_xor">; 4187 // 4188 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_xor,DI_ftype_DIDISI,3) 4189 // 4190 def int_hexagon_S2_asl_r_p_xor : 4191 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_xor">; 4192 // 4193 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_xor,DI_ftype_DIDISI,3) 4194 // 4195 def int_hexagon_S2_lsr_r_p_xor : 4196 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_xor">; 4197 // 4198 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_xor,DI_ftype_DIDISI,3) 4199 // 4200 def int_hexagon_S2_lsl_r_p_xor : 4201 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_xor">; 4202 // 4203 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_sat,SI_ftype_SISI,2) 4204 // 4205 def int_hexagon_S2_asr_r_r_sat : 4206 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_r_r_sat">; 4207 // 4208 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_sat,SI_ftype_SISI,2) 4209 // 4210 def int_hexagon_S2_asl_r_r_sat : 4211 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_r_r_sat">; 4212 // 4213 // BUILTIN_INFO(HEXAGON.S2_asr_i_r,SI_ftype_SISI,2) 4214 // 4215 def int_hexagon_S2_asr_i_r : 4216 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r">; 4217 // 4218 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r,SI_ftype_SISI,2) 4219 // 4220 def int_hexagon_S2_lsr_i_r : 4221 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsr_i_r">; 4222 // 4223 // BUILTIN_INFO(HEXAGON.S2_asl_i_r,SI_ftype_SISI,2) 4224 // 4225 def int_hexagon_S2_asl_i_r : 4226 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_i_r">; 4227 // 4228 // BUILTIN_INFO(HEXAGON.S2_asr_i_p,DI_ftype_DISI,2) 4229 // 4230 def int_hexagon_S2_asr_i_p : 4231 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p">; 4232 // 4233 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p,DI_ftype_DISI,2) 4234 // 4235 def int_hexagon_S2_lsr_i_p : 4236 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_p">; 4237 // 4238 // BUILTIN_INFO(HEXAGON.S2_asl_i_p,DI_ftype_DISI,2) 4239 // 4240 def int_hexagon_S2_asl_i_p : 4241 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_p">; 4242 // 4243 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_acc,SI_ftype_SISISI,3) 4244 // 4245 def int_hexagon_S2_asr_i_r_acc : 4246 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_acc">; 4247 // 4248 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_acc,SI_ftype_SISISI,3) 4249 // 4250 def int_hexagon_S2_lsr_i_r_acc : 4251 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_acc">; 4252 // 4253 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_acc,SI_ftype_SISISI,3) 4254 // 4255 def int_hexagon_S2_asl_i_r_acc : 4256 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_acc">; 4257 // 4258 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_acc,DI_ftype_DIDISI,3) 4259 // 4260 def int_hexagon_S2_asr_i_p_acc : 4261 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_acc">; 4262 // 4263 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_acc,DI_ftype_DIDISI,3) 4264 // 4265 def int_hexagon_S2_lsr_i_p_acc : 4266 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_acc">; 4267 // 4268 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_acc,DI_ftype_DIDISI,3) 4269 // 4270 def int_hexagon_S2_asl_i_p_acc : 4271 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_acc">; 4272 // 4273 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_nac,SI_ftype_SISISI,3) 4274 // 4275 def int_hexagon_S2_asr_i_r_nac : 4276 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_nac">; 4277 // 4278 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_nac,SI_ftype_SISISI,3) 4279 // 4280 def int_hexagon_S2_lsr_i_r_nac : 4281 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_nac">; 4282 // 4283 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_nac,SI_ftype_SISISI,3) 4284 // 4285 def int_hexagon_S2_asl_i_r_nac : 4286 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_nac">; 4287 // 4288 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_nac,DI_ftype_DIDISI,3) 4289 // 4290 def int_hexagon_S2_asr_i_p_nac : 4291 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_nac">; 4292 // 4293 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_nac,DI_ftype_DIDISI,3) 4294 // 4295 def int_hexagon_S2_lsr_i_p_nac : 4296 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_nac">; 4297 // 4298 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_nac,DI_ftype_DIDISI,3) 4299 // 4300 def int_hexagon_S2_asl_i_p_nac : 4301 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_nac">; 4302 // 4303 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_xacc,SI_ftype_SISISI,3) 4304 // 4305 def int_hexagon_S2_lsr_i_r_xacc : 4306 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_xacc">; 4307 // 4308 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_xacc,SI_ftype_SISISI,3) 4309 // 4310 def int_hexagon_S2_asl_i_r_xacc : 4311 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_xacc">; 4312 // 4313 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_xacc,DI_ftype_DIDISI,3) 4314 // 4315 def int_hexagon_S2_lsr_i_p_xacc : 4316 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_xacc">; 4317 // 4318 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_xacc,DI_ftype_DIDISI,3) 4319 // 4320 def int_hexagon_S2_asl_i_p_xacc : 4321 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_xacc">; 4322 // 4323 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_and,SI_ftype_SISISI,3) 4324 // 4325 def int_hexagon_S2_asr_i_r_and : 4326 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_and">; 4327 // 4328 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_and,SI_ftype_SISISI,3) 4329 // 4330 def int_hexagon_S2_lsr_i_r_and : 4331 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_and">; 4332 // 4333 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_and,SI_ftype_SISISI,3) 4334 // 4335 def int_hexagon_S2_asl_i_r_and : 4336 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_and">; 4337 // 4338 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_or,SI_ftype_SISISI,3) 4339 // 4340 def int_hexagon_S2_asr_i_r_or : 4341 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_or">; 4342 // 4343 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_or,SI_ftype_SISISI,3) 4344 // 4345 def int_hexagon_S2_lsr_i_r_or : 4346 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_or">; 4347 // 4348 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_or,SI_ftype_SISISI,3) 4349 // 4350 def int_hexagon_S2_asl_i_r_or : 4351 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_or">; 4352 // 4353 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_and,DI_ftype_DIDISI,3) 4354 // 4355 def int_hexagon_S2_asr_i_p_and : 4356 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_and">; 4357 // 4358 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_and,DI_ftype_DIDISI,3) 4359 // 4360 def int_hexagon_S2_lsr_i_p_and : 4361 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_and">; 4362 // 4363 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_and,DI_ftype_DIDISI,3) 4364 // 4365 def int_hexagon_S2_asl_i_p_and : 4366 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_and">; 4367 // 4368 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_or,DI_ftype_DIDISI,3) 4369 // 4370 def int_hexagon_S2_asr_i_p_or : 4371 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_or">; 4372 // 4373 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_or,DI_ftype_DIDISI,3) 4374 // 4375 def int_hexagon_S2_lsr_i_p_or : 4376 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_or">; 4377 // 4378 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_or,DI_ftype_DIDISI,3) 4379 // 4380 def int_hexagon_S2_asl_i_p_or : 4381 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_or">; 4382 // 4383 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_sat,SI_ftype_SISI,2) 4384 // 4385 def int_hexagon_S2_asl_i_r_sat : 4386 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_i_r_sat">; 4387 // 4388 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_rnd,SI_ftype_SISI,2) 4389 // 4390 def int_hexagon_S2_asr_i_r_rnd : 4391 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r_rnd">; 4392 // 4393 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_rnd_goodsyntax,SI_ftype_SISI,2) 4394 // 4395 def int_hexagon_S2_asr_i_r_rnd_goodsyntax : 4396 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r_rnd_goodsyntax">; 4397 // 4398 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_rnd,DI_ftype_DISI,2) 4399 // 4400 def int_hexagon_S2_asr_i_p_rnd : 4401 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p_rnd">; 4402 // 4403 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_rnd_goodsyntax,DI_ftype_DISI,2) 4404 // 4405 def int_hexagon_S2_asr_i_p_rnd_goodsyntax : 4406 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p_rnd_goodsyntax">; 4407 // 4408 // BUILTIN_INFO(HEXAGON.S4_lsli,SI_ftype_SISI,2) 4409 // 4410 def int_hexagon_S4_lsli : 4411 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_lsli">; 4412 // 4413 // BUILTIN_INFO(HEXAGON.S2_addasl_rrri,SI_ftype_SISISI,3) 4414 // 4415 def int_hexagon_S2_addasl_rrri : 4416 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_addasl_rrri">; 4417 // 4418 // BUILTIN_INFO(HEXAGON.S4_andi_asl_ri,SI_ftype_SISISI,3) 4419 // 4420 def int_hexagon_S4_andi_asl_ri : 4421 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_andi_asl_ri">; 4422 // 4423 // BUILTIN_INFO(HEXAGON.S4_ori_asl_ri,SI_ftype_SISISI,3) 4424 // 4425 def int_hexagon_S4_ori_asl_ri : 4426 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_ori_asl_ri">; 4427 // 4428 // BUILTIN_INFO(HEXAGON.S4_addi_asl_ri,SI_ftype_SISISI,3) 4429 // 4430 def int_hexagon_S4_addi_asl_ri : 4431 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addi_asl_ri">; 4432 // 4433 // BUILTIN_INFO(HEXAGON.S4_subi_asl_ri,SI_ftype_SISISI,3) 4434 // 4435 def int_hexagon_S4_subi_asl_ri : 4436 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subi_asl_ri">; 4437 // 4438 // BUILTIN_INFO(HEXAGON.S4_andi_lsr_ri,SI_ftype_SISISI,3) 4439 // 4440 def int_hexagon_S4_andi_lsr_ri : 4441 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_andi_lsr_ri">; 4442 // 4443 // BUILTIN_INFO(HEXAGON.S4_ori_lsr_ri,SI_ftype_SISISI,3) 4444 // 4445 def int_hexagon_S4_ori_lsr_ri : 4446 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_ori_lsr_ri">; 4447 // 4448 // BUILTIN_INFO(HEXAGON.S4_addi_lsr_ri,SI_ftype_SISISI,3) 4449 // 4450 def int_hexagon_S4_addi_lsr_ri : 4451 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addi_lsr_ri">; 4452 // 4453 // BUILTIN_INFO(HEXAGON.S4_subi_lsr_ri,SI_ftype_SISISI,3) 4454 // 4455 def int_hexagon_S4_subi_lsr_ri : 4456 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subi_lsr_ri">; 4457 // 4458 // BUILTIN_INFO(HEXAGON.S2_valignib,DI_ftype_DIDISI,3) 4459 // 4460 def int_hexagon_S2_valignib : 4461 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_valignib">; 4462 // 4463 // BUILTIN_INFO(HEXAGON.S2_valignrb,DI_ftype_DIDIQI,3) 4464 // 4465 def int_hexagon_S2_valignrb : 4466 Hexagon_di_didiqi_Intrinsic<"HEXAGON_S2_valignrb">; 4467 // 4468 // BUILTIN_INFO(HEXAGON.S2_vspliceib,DI_ftype_DIDISI,3) 4469 // 4470 def int_hexagon_S2_vspliceib : 4471 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_vspliceib">; 4472 // 4473 // BUILTIN_INFO(HEXAGON.S2_vsplicerb,DI_ftype_DIDIQI,3) 4474 // 4475 def int_hexagon_S2_vsplicerb : 4476 Hexagon_di_didiqi_Intrinsic<"HEXAGON_S2_vsplicerb">; 4477 // 4478 // BUILTIN_INFO(HEXAGON.S2_vsplatrh,DI_ftype_SI,1) 4479 // 4480 def int_hexagon_S2_vsplatrh : 4481 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsplatrh">; 4482 // 4483 // BUILTIN_INFO(HEXAGON.S2_vsplatrb,SI_ftype_SI,1) 4484 // 4485 def int_hexagon_S2_vsplatrb : 4486 Hexagon_si_si_Intrinsic<"HEXAGON_S2_vsplatrb">; 4487 // 4488 // BUILTIN_INFO(HEXAGON.S2_insert,SI_ftype_SISISISI,4) 4489 // 4490 def int_hexagon_S2_insert : 4491 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_insert">; 4492 // 4493 // BUILTIN_INFO(HEXAGON.S2_tableidxb_goodsyntax,SI_ftype_SISISISI,4) 4494 // 4495 def int_hexagon_S2_tableidxb_goodsyntax : 4496 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxb_goodsyntax">; 4497 // 4498 // BUILTIN_INFO(HEXAGON.S2_tableidxh_goodsyntax,SI_ftype_SISISISI,4) 4499 // 4500 def int_hexagon_S2_tableidxh_goodsyntax : 4501 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxh_goodsyntax">; 4502 // 4503 // BUILTIN_INFO(HEXAGON.S2_tableidxw_goodsyntax,SI_ftype_SISISISI,4) 4504 // 4505 def int_hexagon_S2_tableidxw_goodsyntax : 4506 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxw_goodsyntax">; 4507 // 4508 // BUILTIN_INFO(HEXAGON.S2_tableidxd_goodsyntax,SI_ftype_SISISISI,4) 4509 // 4510 def int_hexagon_S2_tableidxd_goodsyntax : 4511 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxd_goodsyntax">; 4512 // 4513 // BUILTIN_INFO(HEXAGON.A4_bitspliti,DI_ftype_SISI,2) 4514 // 4515 def int_hexagon_A4_bitspliti : 4516 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_bitspliti">; 4517 // 4518 // BUILTIN_INFO(HEXAGON.A4_bitsplit,DI_ftype_SISI,2) 4519 // 4520 def int_hexagon_A4_bitsplit : 4521 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_bitsplit">; 4522 // 4523 // BUILTIN_INFO(HEXAGON.S4_extract,SI_ftype_SISISI,3) 4524 // 4525 def int_hexagon_S4_extract : 4526 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_extract">; 4527 // 4528 // BUILTIN_INFO(HEXAGON.S2_extractu,SI_ftype_SISISI,3) 4529 // 4530 def int_hexagon_S2_extractu : 4531 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_extractu">; 4532 // 4533 // BUILTIN_INFO(HEXAGON.S2_insertp,DI_ftype_DIDISISI,4) 4534 // 4535 def int_hexagon_S2_insertp : 4536 Hexagon_di_didisisi_Intrinsic<"HEXAGON_S2_insertp">; 4537 // 4538 // BUILTIN_INFO(HEXAGON.S4_extractp,DI_ftype_DISISI,3) 4539 // 4540 def int_hexagon_S4_extractp : 4541 Hexagon_di_disisi_Intrinsic<"HEXAGON_S4_extractp">; 4542 // 4543 // BUILTIN_INFO(HEXAGON.S2_extractup,DI_ftype_DISISI,3) 4544 // 4545 def int_hexagon_S2_extractup : 4546 Hexagon_di_disisi_Intrinsic<"HEXAGON_S2_extractup">; 4547 // 4548 // BUILTIN_INFO(HEXAGON.S2_insert_rp,SI_ftype_SISIDI,3) 4549 // 4550 def int_hexagon_S2_insert_rp : 4551 Hexagon_si_sisidi_Intrinsic<"HEXAGON_S2_insert_rp">; 4552 // 4553 // BUILTIN_INFO(HEXAGON.S4_extract_rp,SI_ftype_SIDI,2) 4554 // 4555 def int_hexagon_S4_extract_rp : 4556 Hexagon_si_sidi_Intrinsic<"HEXAGON_S4_extract_rp">; 4557 // 4558 // BUILTIN_INFO(HEXAGON.S2_extractu_rp,SI_ftype_SIDI,2) 4559 // 4560 def int_hexagon_S2_extractu_rp : 4561 Hexagon_si_sidi_Intrinsic<"HEXAGON_S2_extractu_rp">; 4562 // 4563 // BUILTIN_INFO(HEXAGON.S2_insertp_rp,DI_ftype_DIDIDI,3) 4564 // 4565 def int_hexagon_S2_insertp_rp : 4566 Hexagon_di_dididi_Intrinsic<"HEXAGON_S2_insertp_rp">; 4567 // 4568 // BUILTIN_INFO(HEXAGON.S4_extractp_rp,DI_ftype_DIDI,2) 4569 // 4570 def int_hexagon_S4_extractp_rp : 4571 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_extractp_rp">; 4572 // 4573 // BUILTIN_INFO(HEXAGON.S2_extractup_rp,DI_ftype_DIDI,2) 4574 // 4575 def int_hexagon_S2_extractup_rp : 4576 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_extractup_rp">; 4577 // 4578 // BUILTIN_INFO(HEXAGON.S2_tstbit_i,QI_ftype_SISI,2) 4579 // 4580 def int_hexagon_S2_tstbit_i : 4581 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_tstbit_i">; 4582 // 4583 // BUILTIN_INFO(HEXAGON.S4_ntstbit_i,QI_ftype_SISI,2) 4584 // 4585 def int_hexagon_S4_ntstbit_i : 4586 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_ntstbit_i">; 4587 // 4588 // BUILTIN_INFO(HEXAGON.S2_setbit_i,SI_ftype_SISI,2) 4589 // 4590 def int_hexagon_S2_setbit_i : 4591 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_setbit_i">; 4592 // 4593 // BUILTIN_INFO(HEXAGON.S2_togglebit_i,SI_ftype_SISI,2) 4594 // 4595 def int_hexagon_S2_togglebit_i : 4596 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_togglebit_i">; 4597 // 4598 // BUILTIN_INFO(HEXAGON.S2_clrbit_i,SI_ftype_SISI,2) 4599 // 4600 def int_hexagon_S2_clrbit_i : 4601 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_clrbit_i">; 4602 // 4603 // BUILTIN_INFO(HEXAGON.S2_tstbit_r,QI_ftype_SISI,2) 4604 // 4605 def int_hexagon_S2_tstbit_r : 4606 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_tstbit_r">; 4607 // 4608 // BUILTIN_INFO(HEXAGON.S4_ntstbit_r,QI_ftype_SISI,2) 4609 // 4610 def int_hexagon_S4_ntstbit_r : 4611 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_ntstbit_r">; 4612 // 4613 // BUILTIN_INFO(HEXAGON.S2_setbit_r,SI_ftype_SISI,2) 4614 // 4615 def int_hexagon_S2_setbit_r : 4616 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_setbit_r">; 4617 // 4618 // BUILTIN_INFO(HEXAGON.S2_togglebit_r,SI_ftype_SISI,2) 4619 // 4620 def int_hexagon_S2_togglebit_r : 4621 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_togglebit_r">; 4622 // 4623 // BUILTIN_INFO(HEXAGON.S2_clrbit_r,SI_ftype_SISI,2) 4624 // 4625 def int_hexagon_S2_clrbit_r : 4626 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_clrbit_r">; 4627 // 4628 // BUILTIN_INFO(HEXAGON.S2_asr_i_vh,DI_ftype_DISI,2) 4629 // 4630 def int_hexagon_S2_asr_i_vh : 4631 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_vh">; 4632 // 4633 // BUILTIN_INFO(HEXAGON.S2_lsr_i_vh,DI_ftype_DISI,2) 4634 // 4635 def int_hexagon_S2_lsr_i_vh : 4636 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_vh">; 4637 // 4638 // BUILTIN_INFO(HEXAGON.S2_asl_i_vh,DI_ftype_DISI,2) 4639 // 4640 def int_hexagon_S2_asl_i_vh : 4641 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_vh">; 4642 // 4643 // BUILTIN_INFO(HEXAGON.S2_asr_r_vh,DI_ftype_DISI,2) 4644 // 4645 def int_hexagon_S2_asr_r_vh : 4646 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_vh">; 4647 // 4648 // BUILTIN_INFO(HEXAGON.S5_asrhub_rnd_sat_goodsyntax,SI_ftype_DISI,2) 4649 // 4650 def int_hexagon_S5_asrhub_rnd_sat_goodsyntax : 4651 Hexagon_si_disi_Intrinsic<"HEXAGON_S5_asrhub_rnd_sat_goodsyntax">; 4652 // 4653 // BUILTIN_INFO(HEXAGON.S5_asrhub_sat,SI_ftype_DISI,2) 4654 // 4655 def int_hexagon_S5_asrhub_sat : 4656 Hexagon_si_disi_Intrinsic<"HEXAGON_S5_asrhub_sat">; 4657 // 4658 // BUILTIN_INFO(HEXAGON.S5_vasrhrnd_goodsyntax,DI_ftype_DISI,2) 4659 // 4660 def int_hexagon_S5_vasrhrnd_goodsyntax : 4661 Hexagon_di_disi_Intrinsic<"HEXAGON_S5_vasrhrnd_goodsyntax">; 4662 // 4663 // BUILTIN_INFO(HEXAGON.S2_asl_r_vh,DI_ftype_DISI,2) 4664 // 4665 def int_hexagon_S2_asl_r_vh : 4666 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_vh">; 4667 // 4668 // BUILTIN_INFO(HEXAGON.S2_lsr_r_vh,DI_ftype_DISI,2) 4669 // 4670 def int_hexagon_S2_lsr_r_vh : 4671 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_vh">; 4672 // 4673 // BUILTIN_INFO(HEXAGON.S2_lsl_r_vh,DI_ftype_DISI,2) 4674 // 4675 def int_hexagon_S2_lsl_r_vh : 4676 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_vh">; 4677 // 4678 // BUILTIN_INFO(HEXAGON.S2_asr_i_vw,DI_ftype_DISI,2) 4679 // 4680 def int_hexagon_S2_asr_i_vw : 4681 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_vw">; 4682 // 4683 // BUILTIN_INFO(HEXAGON.S2_asr_i_svw_trun,SI_ftype_DISI,2) 4684 // 4685 def int_hexagon_S2_asr_i_svw_trun : 4686 Hexagon_si_disi_Intrinsic<"HEXAGON_S2_asr_i_svw_trun">; 4687 // 4688 // BUILTIN_INFO(HEXAGON.S2_asr_r_svw_trun,SI_ftype_DISI,2) 4689 // 4690 def int_hexagon_S2_asr_r_svw_trun : 4691 Hexagon_si_disi_Intrinsic<"HEXAGON_S2_asr_r_svw_trun">; 4692 // 4693 // BUILTIN_INFO(HEXAGON.S2_lsr_i_vw,DI_ftype_DISI,2) 4694 // 4695 def int_hexagon_S2_lsr_i_vw : 4696 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_vw">; 4697 // 4698 // BUILTIN_INFO(HEXAGON.S2_asl_i_vw,DI_ftype_DISI,2) 4699 // 4700 def int_hexagon_S2_asl_i_vw : 4701 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_vw">; 4702 // 4703 // BUILTIN_INFO(HEXAGON.S2_asr_r_vw,DI_ftype_DISI,2) 4704 // 4705 def int_hexagon_S2_asr_r_vw : 4706 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_vw">; 4707 // 4708 // BUILTIN_INFO(HEXAGON.S2_asl_r_vw,DI_ftype_DISI,2) 4709 // 4710 def int_hexagon_S2_asl_r_vw : 4711 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_vw">; 4712 // 4713 // BUILTIN_INFO(HEXAGON.S2_lsr_r_vw,DI_ftype_DISI,2) 4714 // 4715 def int_hexagon_S2_lsr_r_vw : 4716 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_vw">; 4717 // 4718 // BUILTIN_INFO(HEXAGON.S2_lsl_r_vw,DI_ftype_DISI,2) 4719 // 4720 def int_hexagon_S2_lsl_r_vw : 4721 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_vw">; 4722 // 4723 // BUILTIN_INFO(HEXAGON.S2_vrndpackwh,SI_ftype_DI,1) 4724 // 4725 def int_hexagon_S2_vrndpackwh : 4726 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vrndpackwh">; 4727 // 4728 // BUILTIN_INFO(HEXAGON.S2_vrndpackwhs,SI_ftype_DI,1) 4729 // 4730 def int_hexagon_S2_vrndpackwhs : 4731 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vrndpackwhs">; 4732 // 4733 // BUILTIN_INFO(HEXAGON.S2_vsxtbh,DI_ftype_SI,1) 4734 // 4735 def int_hexagon_S2_vsxtbh : 4736 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsxtbh">; 4737 // 4738 // BUILTIN_INFO(HEXAGON.S2_vzxtbh,DI_ftype_SI,1) 4739 // 4740 def int_hexagon_S2_vzxtbh : 4741 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vzxtbh">; 4742 // 4743 // BUILTIN_INFO(HEXAGON.S2_vsathub,SI_ftype_DI,1) 4744 // 4745 def int_hexagon_S2_vsathub : 4746 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsathub">; 4747 // 4748 // BUILTIN_INFO(HEXAGON.S2_svsathub,SI_ftype_SI,1) 4749 // 4750 def int_hexagon_S2_svsathub : 4751 Hexagon_si_si_Intrinsic<"HEXAGON_S2_svsathub">; 4752 // 4753 // BUILTIN_INFO(HEXAGON.S2_svsathb,SI_ftype_SI,1) 4754 // 4755 def int_hexagon_S2_svsathb : 4756 Hexagon_si_si_Intrinsic<"HEXAGON_S2_svsathb">; 4757 // 4758 // BUILTIN_INFO(HEXAGON.S2_vsathb,SI_ftype_DI,1) 4759 // 4760 def int_hexagon_S2_vsathb : 4761 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsathb">; 4762 // 4763 // BUILTIN_INFO(HEXAGON.S2_vtrunohb,SI_ftype_DI,1) 4764 // 4765 def int_hexagon_S2_vtrunohb : 4766 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vtrunohb">; 4767 // 4768 // BUILTIN_INFO(HEXAGON.S2_vtrunewh,DI_ftype_DIDI,2) 4769 // 4770 def int_hexagon_S2_vtrunewh : 4771 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_vtrunewh">; 4772 // 4773 // BUILTIN_INFO(HEXAGON.S2_vtrunowh,DI_ftype_DIDI,2) 4774 // 4775 def int_hexagon_S2_vtrunowh : 4776 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_vtrunowh">; 4777 // 4778 // BUILTIN_INFO(HEXAGON.S2_vtrunehb,SI_ftype_DI,1) 4779 // 4780 def int_hexagon_S2_vtrunehb : 4781 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vtrunehb">; 4782 // 4783 // BUILTIN_INFO(HEXAGON.S2_vsxthw,DI_ftype_SI,1) 4784 // 4785 def int_hexagon_S2_vsxthw : 4786 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsxthw">; 4787 // 4788 // BUILTIN_INFO(HEXAGON.S2_vzxthw,DI_ftype_SI,1) 4789 // 4790 def int_hexagon_S2_vzxthw : 4791 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vzxthw">; 4792 // 4793 // BUILTIN_INFO(HEXAGON.S2_vsatwh,SI_ftype_DI,1) 4794 // 4795 def int_hexagon_S2_vsatwh : 4796 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsatwh">; 4797 // 4798 // BUILTIN_INFO(HEXAGON.S2_vsatwuh,SI_ftype_DI,1) 4799 // 4800 def int_hexagon_S2_vsatwuh : 4801 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsatwuh">; 4802 // 4803 // BUILTIN_INFO(HEXAGON.S2_packhl,DI_ftype_SISI,2) 4804 // 4805 def int_hexagon_S2_packhl : 4806 Hexagon_di_sisi_Intrinsic<"HEXAGON_S2_packhl">; 4807 // 4808 // BUILTIN_INFO(HEXAGON.A2_swiz,SI_ftype_SI,1) 4809 // 4810 def int_hexagon_A2_swiz : 4811 Hexagon_si_si_Intrinsic<"HEXAGON_A2_swiz">; 4812 // 4813 // BUILTIN_INFO(HEXAGON.S2_vsathub_nopack,DI_ftype_DI,1) 4814 // 4815 def int_hexagon_S2_vsathub_nopack : 4816 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsathub_nopack">; 4817 // 4818 // BUILTIN_INFO(HEXAGON.S2_vsathb_nopack,DI_ftype_DI,1) 4819 // 4820 def int_hexagon_S2_vsathb_nopack : 4821 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsathb_nopack">; 4822 // 4823 // BUILTIN_INFO(HEXAGON.S2_vsatwh_nopack,DI_ftype_DI,1) 4824 // 4825 def int_hexagon_S2_vsatwh_nopack : 4826 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsatwh_nopack">; 4827 // 4828 // BUILTIN_INFO(HEXAGON.S2_vsatwuh_nopack,DI_ftype_DI,1) 4829 // 4830 def int_hexagon_S2_vsatwuh_nopack : 4831 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsatwuh_nopack">; 4832 // 4833 // BUILTIN_INFO(HEXAGON.S2_shuffob,DI_ftype_DIDI,2) 4834 // 4835 def int_hexagon_S2_shuffob : 4836 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffob">; 4837 // 4838 // BUILTIN_INFO(HEXAGON.S2_shuffeb,DI_ftype_DIDI,2) 4839 // 4840 def int_hexagon_S2_shuffeb : 4841 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffeb">; 4842 // 4843 // BUILTIN_INFO(HEXAGON.S2_shuffoh,DI_ftype_DIDI,2) 4844 // 4845 def int_hexagon_S2_shuffoh : 4846 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffoh">; 4847 // 4848 // BUILTIN_INFO(HEXAGON.S2_shuffeh,DI_ftype_DIDI,2) 4849 // 4850 def int_hexagon_S2_shuffeh : 4851 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffeh">; 4852 // 4853 // BUILTIN_INFO(HEXAGON.S5_popcountp,SI_ftype_DI,1) 4854 // 4855 def int_hexagon_S5_popcountp : 4856 Hexagon_si_di_Intrinsic<"HEXAGON_S5_popcountp">; 4857 // 4858 // BUILTIN_INFO(HEXAGON.S4_parity,SI_ftype_SISI,2) 4859 // 4860 def int_hexagon_S4_parity : 4861 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_parity">; 4862 // 4863 // BUILTIN_INFO(HEXAGON.S2_parityp,SI_ftype_DIDI,2) 4864 // 4865 def int_hexagon_S2_parityp : 4866 Hexagon_si_didi_Intrinsic<"HEXAGON_S2_parityp">; 4867 // 4868 // BUILTIN_INFO(HEXAGON.S2_lfsp,DI_ftype_DIDI,2) 4869 // 4870 def int_hexagon_S2_lfsp : 4871 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_lfsp">; 4872 // 4873 // BUILTIN_INFO(HEXAGON.S2_clbnorm,SI_ftype_SI,1) 4874 // 4875 def int_hexagon_S2_clbnorm : 4876 Hexagon_si_si_Intrinsic<"HEXAGON_S2_clbnorm">; 4877 // 4878 // BUILTIN_INFO(HEXAGON.S4_clbaddi,SI_ftype_SISI,2) 4879 // 4880 def int_hexagon_S4_clbaddi : 4881 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_clbaddi">; 4882 // 4883 // BUILTIN_INFO(HEXAGON.S4_clbpnorm,SI_ftype_DI,1) 4884 // 4885 def int_hexagon_S4_clbpnorm : 4886 Hexagon_si_di_Intrinsic<"HEXAGON_S4_clbpnorm">; 4887 // 4888 // BUILTIN_INFO(HEXAGON.S4_clbpaddi,SI_ftype_DISI,2) 4889 // 4890 def int_hexagon_S4_clbpaddi : 4891 Hexagon_si_disi_Intrinsic<"HEXAGON_S4_clbpaddi">; 4892 // 4893 // BUILTIN_INFO(HEXAGON.S2_clb,SI_ftype_SI,1) 4894 // 4895 def int_hexagon_S2_clb : 4896 Hexagon_si_si_Intrinsic<"HEXAGON_S2_clb">; 4897 // 4898 // BUILTIN_INFO(HEXAGON.S2_cl0,SI_ftype_SI,1) 4899 // 4900 def int_hexagon_S2_cl0 : 4901 Hexagon_si_si_Intrinsic<"HEXAGON_S2_cl0">; 4902 // 4903 // BUILTIN_INFO(HEXAGON.S2_cl1,SI_ftype_SI,1) 4904 // 4905 def int_hexagon_S2_cl1 : 4906 Hexagon_si_si_Intrinsic<"HEXAGON_S2_cl1">; 4907 // 4908 // BUILTIN_INFO(HEXAGON.S2_clbp,SI_ftype_DI,1) 4909 // 4910 def int_hexagon_S2_clbp : 4911 Hexagon_si_di_Intrinsic<"HEXAGON_S2_clbp">; 4912 // 4913 // BUILTIN_INFO(HEXAGON.S2_cl0p,SI_ftype_DI,1) 4914 // 4915 def int_hexagon_S2_cl0p : 4916 Hexagon_si_di_Intrinsic<"HEXAGON_S2_cl0p">; 4917 // 4918 // BUILTIN_INFO(HEXAGON.S2_cl1p,SI_ftype_DI,1) 4919 // 4920 def int_hexagon_S2_cl1p : 4921 Hexagon_si_di_Intrinsic<"HEXAGON_S2_cl1p">; 4922 // 4923 // BUILTIN_INFO(HEXAGON.S2_brev,SI_ftype_SI,1) 4924 // 4925 def int_hexagon_S2_brev : 4926 Hexagon_si_si_Intrinsic<"HEXAGON_S2_brev">; 4927 // 4928 // BUILTIN_INFO(HEXAGON.S2_brevp,DI_ftype_DI,1) 4929 // 4930 def int_hexagon_S2_brevp : 4931 Hexagon_di_di_Intrinsic<"HEXAGON_S2_brevp">; 4932 // 4933 // BUILTIN_INFO(HEXAGON.S2_ct0,SI_ftype_SI,1) 4934 // 4935 def int_hexagon_S2_ct0 : 4936 Hexagon_si_si_Intrinsic<"HEXAGON_S2_ct0">; 4937 // 4938 // BUILTIN_INFO(HEXAGON.S2_ct1,SI_ftype_SI,1) 4939 // 4940 def int_hexagon_S2_ct1 : 4941 Hexagon_si_si_Intrinsic<"HEXAGON_S2_ct1">; 4942 // 4943 // BUILTIN_INFO(HEXAGON.S2_ct0p,SI_ftype_DI,1) 4944 // 4945 def int_hexagon_S2_ct0p : 4946 Hexagon_si_di_Intrinsic<"HEXAGON_S2_ct0p">; 4947 // 4948 // BUILTIN_INFO(HEXAGON.S2_ct1p,SI_ftype_DI,1) 4949 // 4950 def int_hexagon_S2_ct1p : 4951 Hexagon_si_di_Intrinsic<"HEXAGON_S2_ct1p">; 4952 // 4953 // BUILTIN_INFO(HEXAGON.S2_interleave,DI_ftype_DI,1) 4954 // 4955 def int_hexagon_S2_interleave : 4956 Hexagon_di_di_Intrinsic<"HEXAGON_S2_interleave">; 4957 // 4958 // BUILTIN_INFO(HEXAGON.S2_deinterleave,DI_ftype_DI,1) 4959 // 4960 def int_hexagon_S2_deinterleave : 4961 Hexagon_di_di_Intrinsic<"HEXAGON_S2_deinterleave">; 4962 // 4963 // BUILTIN_INFO(HEXAGON.dcfetch_A,v_ftype_DI*,1) 4964 // 4965 def int_hexagon_prefetch : 4966 Hexagon_void_si_Intrinsic<"HEXAGON_prefetch">; 4967 4968 def llvm_ptr32_ty : LLVMPointerType<llvm_i32_ty>; 4969 def llvm_ptr64_ty : LLVMPointerType<llvm_i64_ty>; 4970 4971 // Mark locked loads as read/write to prevent any accidental reordering. 4972 def int_hexagon_L2_loadw_locked : 4973 Hexagon_Intrinsic<"HEXAGON_L2_loadw_locked", [llvm_i32_ty], [llvm_ptr32_ty], 4974 [IntrArgMemOnly, NoCapture<0>]>; 4975 def int_hexagon_L4_loadd_locked : 4976 Hexagon_Intrinsic<"HEXAGON_L4_loadd_locked", [llvm_i64_ty], [llvm_ptr64_ty], 4977 [IntrArgMemOnly, NoCapture<0>]>; 4978 4979 def int_hexagon_S2_storew_locked : 4980 Hexagon_Intrinsic<"HEXAGON_S2_storew_locked", [llvm_i32_ty], 4981 [llvm_ptr32_ty, llvm_i32_ty], [IntrArgMemOnly, NoCapture<0>]>; 4982 def int_hexagon_S4_stored_locked : 4983 Hexagon_Intrinsic<"HEXAGON_S4_stored_locked", [llvm_i32_ty], 4984 [llvm_ptr64_ty, llvm_i64_ty], [IntrArgMemOnly, NoCapture<0>]>; 4985 4986 // V60 4987 4988 class Hexagon_v2048v2048_Intrinsic_T<string GCCIntSuffix> 4989 : Hexagon_Intrinsic<GCCIntSuffix, 4990 [llvm_v64i32_ty], [llvm_v64i32_ty], 4991 [IntrNoMem]>; 4992 4993 // tag : V6_hi_W 4994 // tag : V6_lo_W 4995 class Hexagon_v512v1024_Intrinsic_T<string GCCIntSuffix> 4996 : Hexagon_Intrinsic<GCCIntSuffix, 4997 [llvm_v16i32_ty], [llvm_v32i32_ty], 4998 [IntrNoMem]>; 4999 5000 // tag : V6_hi_W_128B 5001 // tag : V6_lo_W_128B 5002 class Hexagon_v1024v2048_Intrinsic_T<string GCCIntSuffix> 5003 : Hexagon_Intrinsic<GCCIntSuffix, 5004 [llvm_v32i32_ty], [llvm_v64i32_ty], 5005 [IntrNoMem]>; 5006 5007 class Hexagon_v1024v1024_Intrinsic_T<string GCCIntSuffix> 5008 : Hexagon_Intrinsic<GCCIntSuffix, 5009 [llvm_v32i32_ty], [llvm_v32i32_ty], 5010 [IntrNoMem]>; 5011 5012 // BUILTIN_INFO(HEXAGON.V6_hi_W,VI_ftype_VI,1) 5013 // tag : V6_hi 5014 def int_hexagon_V6_hi : 5015 Hexagon_v512v1024_Intrinsic_T<"HEXAGON_V6_hi">; 5016 5017 // BUILTIN_INFO(HEXAGON.V6_lo_W,VI_ftype_VI,1) 5018 // tag : V6_lo 5019 def int_hexagon_V6_lo : 5020 Hexagon_v512v1024_Intrinsic_T<"HEXAGON_V6_lo">; 5021 5022 // BUILTIN_INFO(HEXAGON.V6_hi_W,VI_ftype_VI,1) 5023 // tag : V6_hi_128B 5024 def int_hexagon_V6_hi_128B : 5025 Hexagon_v1024v2048_Intrinsic_T<"HEXAGON_V6_hi_128B">; 5026 5027 // BUILTIN_INFO(HEXAGON.V6_lo_W,VI_ftype_VI,1) 5028 // tag : V6_lo_128B 5029 def int_hexagon_V6_lo_128B : 5030 Hexagon_v1024v2048_Intrinsic_T<"HEXAGON_V6_lo_128B">; 5031 5032 // BUILTIN_INFO(HEXAGON.V6_vassignp,VI_ftype_VI,1) 5033 // tag : V6_vassignp 5034 def int_hexagon_V6_vassignp : 5035 Hexagon_v1024v1024_Intrinsic_T<"HEXAGON_V6_vassignp">; 5036 5037 // BUILTIN_INFO(HEXAGON.V6_vassignp,VI_ftype_VI,1) 5038 // tag : V6_vassignp_128B 5039 def int_hexagon_V6_vassignp_128B : 5040 Hexagon_v2048v2048_Intrinsic_T<"HEXAGON_V6_vassignp_128B">; 5041 5042 5043 5044 // 5045 // Hexagon_iii_Intrinsic<string GCCIntSuffix> 5046 // tag : S6_rol_i_r 5047 class Hexagon_iii_Intrinsic<string GCCIntSuffix> 5048 : Hexagon_Intrinsic<GCCIntSuffix, 5049 [llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty], 5050 [IntrNoMem]>; 5051 5052 // 5053 // Hexagon_LLiLLii_Intrinsic<string GCCIntSuffix> 5054 // tag : S6_rol_i_p 5055 class Hexagon_LLiLLii_Intrinsic<string GCCIntSuffix> 5056 : Hexagon_Intrinsic<GCCIntSuffix, 5057 [llvm_i64_ty], [llvm_i64_ty,llvm_i32_ty], 5058 [IntrNoMem]>; 5059 5060 // 5061 // Hexagon_iiii_Intrinsic<string GCCIntSuffix> 5062 // tag : S6_rol_i_r_acc 5063 class Hexagon_iiii_Intrinsic<string GCCIntSuffix> 5064 : Hexagon_Intrinsic<GCCIntSuffix, 5065 [llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty], 5066 [IntrNoMem]>; 5067 5068 // 5069 // Hexagon_LLiLLiLLii_Intrinsic<string GCCIntSuffix> 5070 // tag : S6_rol_i_p_acc 5071 class Hexagon_LLiLLiLLii_Intrinsic<string GCCIntSuffix> 5072 : Hexagon_Intrinsic<GCCIntSuffix, 5073 [llvm_i64_ty], [llvm_i64_ty,llvm_i64_ty,llvm_i32_ty], 5074 [IntrNoMem]>; 5075 5076 // 5077 // Hexagon_v512v512v512i_Intrinsic<string GCCIntSuffix> 5078 // tag : V6_valignb 5079 class Hexagon_v512v512v512i_Intrinsic<string GCCIntSuffix> 5080 : Hexagon_Intrinsic<GCCIntSuffix, 5081 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5082 [IntrNoMem]>; 5083 5084 // 5085 // Hexagon_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5086 // tag : V6_valignb_128B 5087 class Hexagon_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5088 : Hexagon_Intrinsic<GCCIntSuffix, 5089 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5090 [IntrNoMem]>; 5091 5092 // 5093 // Hexagon_v512v512i_Intrinsic<string GCCIntSuffix> 5094 // tag : V6_vror 5095 class Hexagon_v512v512i_Intrinsic<string GCCIntSuffix> 5096 : Hexagon_Intrinsic<GCCIntSuffix, 5097 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5098 [IntrNoMem]>; 5099 5100 // 5101 // Hexagon_v1024v1024i_Intrinsic<string GCCIntSuffix> 5102 // tag : V6_vror_128B 5103 class Hexagon_v1024v1024i_Intrinsic<string GCCIntSuffix> 5104 : Hexagon_Intrinsic<GCCIntSuffix, 5105 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5106 [IntrNoMem]>; 5107 5108 // 5109 // Hexagon_v1024v512_Intrinsic<string GCCIntSuffix> 5110 // tag : V6_vunpackub 5111 class Hexagon_v1024v512_Intrinsic<string GCCIntSuffix> 5112 : Hexagon_Intrinsic<GCCIntSuffix, 5113 [llvm_v32i32_ty], [llvm_v16i32_ty], 5114 [IntrNoMem]>; 5115 5116 // 5117 // Hexagon_v2048v1024_Intrinsic<string GCCIntSuffix> 5118 // tag : V6_vunpackub_128B 5119 class Hexagon_v2048v1024_Intrinsic<string GCCIntSuffix> 5120 : Hexagon_Intrinsic<GCCIntSuffix, 5121 [llvm_v64i32_ty], [llvm_v32i32_ty], 5122 [IntrNoMem]>; 5123 5124 // 5125 // Hexagon_v1024v1024v512_Intrinsic<string GCCIntSuffix> 5126 // tag : V6_vunpackob 5127 class Hexagon_v1024v1024v512_Intrinsic<string GCCIntSuffix> 5128 : Hexagon_Intrinsic<GCCIntSuffix, 5129 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty], 5130 [IntrNoMem]>; 5131 5132 // 5133 // Hexagon_v2048v2048v1024_Intrinsic<string GCCIntSuffix> 5134 // tag : V6_vunpackob_128B 5135 class Hexagon_v2048v2048v1024_Intrinsic<string GCCIntSuffix> 5136 : Hexagon_Intrinsic<GCCIntSuffix, 5137 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty], 5138 [IntrNoMem]>; 5139 5140 // 5141 // Hexagon_v512v512v512_Intrinsic<string GCCIntSuffix> 5142 // tag : V6_vpackeb 5143 class Hexagon_v512v512v512_Intrinsic<string GCCIntSuffix> 5144 : Hexagon_Intrinsic<GCCIntSuffix, 5145 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5146 [IntrNoMem]>; 5147 5148 // 5149 // Hexagon_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5150 // tag : V6_vpackeb_128B 5151 class Hexagon_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5152 : Hexagon_Intrinsic<GCCIntSuffix, 5153 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5154 [IntrNoMem]>; 5155 5156 // 5157 // Hexagon_v2048v2048i_Intrinsic<string GCCIntSuffix> 5158 // tag : V6_vdmpybus_dv_128B 5159 class Hexagon_v2048v2048i_Intrinsic<string GCCIntSuffix> 5160 : Hexagon_Intrinsic<GCCIntSuffix, 5161 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 5162 [IntrNoMem]>; 5163 5164 // 5165 // Hexagon_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 5166 // tag : V6_vdmpybus_dv_acc_128B 5167 class Hexagon_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 5168 : Hexagon_Intrinsic<GCCIntSuffix, 5169 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty], 5170 [IntrNoMem]>; 5171 5172 // 5173 // Hexagon_v512v512v512v512_Intrinsic<string GCCIntSuffix> 5174 // tag : V6_vdmpyhvsat_acc 5175 class Hexagon_v512v512v512v512_Intrinsic<string GCCIntSuffix> 5176 : Hexagon_Intrinsic<GCCIntSuffix, 5177 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5178 [IntrNoMem]>; 5179 5180 // 5181 // Hexagon_v1024v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5182 // tag : V6_vdmpyhvsat_acc_128B 5183 class Hexagon_v1024v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5184 : Hexagon_Intrinsic<GCCIntSuffix, 5185 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5186 [IntrNoMem]>; 5187 5188 // 5189 // Hexagon_v512v1024i_Intrinsic<string GCCIntSuffix> 5190 // tag : V6_vdmpyhisat 5191 class Hexagon_v512v1024i_Intrinsic<string GCCIntSuffix> 5192 : Hexagon_Intrinsic<GCCIntSuffix, 5193 [llvm_v16i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5194 [IntrNoMem]>; 5195 5196 // 5197 // Hexagon_v1024v2048i_Intrinsic<string GCCIntSuffix> 5198 // tag : V6_vdmpyhisat_128B 5199 class Hexagon_v1024v2048i_Intrinsic<string GCCIntSuffix> 5200 : Hexagon_Intrinsic<GCCIntSuffix, 5201 [llvm_v32i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 5202 [IntrNoMem]>; 5203 5204 // 5205 // Hexagon_v512v512v1024i_Intrinsic<string GCCIntSuffix> 5206 // tag : V6_vdmpyhisat_acc 5207 class Hexagon_v512v512v1024i_Intrinsic<string GCCIntSuffix> 5208 : Hexagon_Intrinsic<GCCIntSuffix, 5209 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5210 [IntrNoMem]>; 5211 5212 // 5213 // Hexagon_v1024v1024v2048i_Intrinsic<string GCCIntSuffix> 5214 // tag : V6_vdmpyhisat_acc_128B 5215 class Hexagon_v1024v1024v2048i_Intrinsic<string GCCIntSuffix> 5216 : Hexagon_Intrinsic<GCCIntSuffix, 5217 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v64i32_ty,llvm_i32_ty], 5218 [IntrNoMem]>; 5219 5220 // 5221 // Hexagon_v1024v1024ii_Intrinsic<string GCCIntSuffix> 5222 // tag : V6_vrmpyubi 5223 class Hexagon_v1024v1024ii_Intrinsic<string GCCIntSuffix> 5224 : Hexagon_Intrinsic<GCCIntSuffix, 5225 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty,llvm_i32_ty], 5226 [IntrNoMem]>; 5227 5228 // 5229 // Hexagon_v2048v2048ii_Intrinsic<string GCCIntSuffix> 5230 // tag : V6_vrmpyubi_128B 5231 class Hexagon_v2048v2048ii_Intrinsic<string GCCIntSuffix> 5232 : Hexagon_Intrinsic<GCCIntSuffix, 5233 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty,llvm_i32_ty], 5234 [IntrNoMem]>; 5235 5236 // 5237 // Hexagon_v1024v1024v1024ii_Intrinsic<string GCCIntSuffix> 5238 // tag : V6_vrmpyubi_acc 5239 class Hexagon_v1024v1024v1024ii_Intrinsic<string GCCIntSuffix> 5240 : Hexagon_Intrinsic<GCCIntSuffix, 5241 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty,llvm_i32_ty], 5242 [IntrNoMem]>; 5243 5244 // 5245 // Hexagon_v2048v2048v2048ii_Intrinsic<string GCCIntSuffix> 5246 // tag : V6_vrmpyubi_acc_128B 5247 class Hexagon_v2048v2048v2048ii_Intrinsic<string GCCIntSuffix> 5248 : Hexagon_Intrinsic<GCCIntSuffix, 5249 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty,llvm_i32_ty], 5250 [IntrNoMem]>; 5251 5252 // 5253 // Hexagon_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 5254 // tag : V6_vaddb_dv_128B 5255 class Hexagon_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 5256 : Hexagon_Intrinsic<GCCIntSuffix, 5257 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty], 5258 [IntrNoMem]>; 5259 5260 // 5261 // Hexagon_v1024v512v512_Intrinsic<string GCCIntSuffix> 5262 // tag : V6_vaddubh 5263 class Hexagon_v1024v512v512_Intrinsic<string GCCIntSuffix> 5264 : Hexagon_Intrinsic<GCCIntSuffix, 5265 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5266 [IntrNoMem]>; 5267 5268 // 5269 // Hexagon_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5270 // tag : V6_vaddubh_128B 5271 class Hexagon_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5272 : Hexagon_Intrinsic<GCCIntSuffix, 5273 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5274 [IntrNoMem]>; 5275 5276 // 5277 // Hexagon_v512_Intrinsic<string GCCIntSuffix> 5278 // tag : V6_vd0 5279 class Hexagon_v512_Intrinsic<string GCCIntSuffix> 5280 : Hexagon_Intrinsic<GCCIntSuffix, 5281 [llvm_v16i32_ty], [], 5282 [IntrNoMem]>; 5283 5284 // 5285 // Hexagon_v1024_Intrinsic<string GCCIntSuffix> 5286 // tag : V6_vd0_128B 5287 class Hexagon_v1024_Intrinsic<string GCCIntSuffix> 5288 : Hexagon_Intrinsic<GCCIntSuffix, 5289 [llvm_v32i32_ty], [], 5290 [IntrNoMem]>; 5291 5292 // 5293 // Hexagon_v512v64iv512v512_Intrinsic<string GCCIntSuffix> 5294 // tag : V6_vaddbq 5295 class Hexagon_v512v64iv512v512_Intrinsic<string GCCIntSuffix> 5296 : Hexagon_Intrinsic<GCCIntSuffix, 5297 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5298 [IntrNoMem]>; 5299 5300 // 5301 // Hexagon_v1024v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5302 // tag : V6_vaddbq_128B 5303 class Hexagon_v1024v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5304 : Hexagon_Intrinsic<GCCIntSuffix, 5305 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5306 [IntrNoMem]>; 5307 5308 // 5309 // Hexagon_v512v512_Intrinsic<string GCCIntSuffix> 5310 // tag : V6_vabsh 5311 class Hexagon_v512v512_Intrinsic<string GCCIntSuffix> 5312 : Hexagon_Intrinsic<GCCIntSuffix, 5313 [llvm_v16i32_ty], [llvm_v16i32_ty], 5314 [IntrNoMem]>; 5315 5316 // 5317 // Hexagon_v1024v1024_Intrinsic<string GCCIntSuffix> 5318 // tag : V6_vabsh_128B 5319 class Hexagon_v1024v1024_Intrinsic<string GCCIntSuffix> 5320 : Hexagon_Intrinsic<GCCIntSuffix, 5321 [llvm_v32i32_ty], [llvm_v32i32_ty], 5322 [IntrNoMem]>; 5323 5324 // 5325 // Hexagon_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 5326 // tag : V6_vmpybv_acc 5327 class Hexagon_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 5328 : Hexagon_Intrinsic<GCCIntSuffix, 5329 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5330 [IntrNoMem]>; 5331 5332 // 5333 // Hexagon_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5334 // tag : V6_vmpybv_acc_128B 5335 class Hexagon_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5336 : Hexagon_Intrinsic<GCCIntSuffix, 5337 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5338 [IntrNoMem]>; 5339 5340 // 5341 // Hexagon_v1024v512i_Intrinsic<string GCCIntSuffix> 5342 // tag : V6_vmpyub 5343 class Hexagon_v1024v512i_Intrinsic<string GCCIntSuffix> 5344 : Hexagon_Intrinsic<GCCIntSuffix, 5345 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5346 [IntrNoMem]>; 5347 5348 // 5349 // Hexagon_v2048v1024i_Intrinsic<string GCCIntSuffix> 5350 // tag : V6_vmpyub_128B 5351 class Hexagon_v2048v1024i_Intrinsic<string GCCIntSuffix> 5352 : Hexagon_Intrinsic<GCCIntSuffix, 5353 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5354 [IntrNoMem]>; 5355 5356 // 5357 // Hexagon_v1024v1024v512i_Intrinsic<string GCCIntSuffix> 5358 // tag : V6_vmpyub_acc 5359 class Hexagon_v1024v1024v512i_Intrinsic<string GCCIntSuffix> 5360 : Hexagon_Intrinsic<GCCIntSuffix, 5361 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5362 [IntrNoMem]>; 5363 5364 // 5365 // Hexagon_v2048v2048v1024i_Intrinsic<string GCCIntSuffix> 5366 // tag : V6_vmpyub_acc_128B 5367 class Hexagon_v2048v2048v1024i_Intrinsic<string GCCIntSuffix> 5368 : Hexagon_Intrinsic<GCCIntSuffix, 5369 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5370 [IntrNoMem]>; 5371 5372 // 5373 // Hexagon_v512v64ii_Intrinsic<string GCCIntSuffix> 5374 // tag : V6_vandqrt 5375 class Hexagon_v512v64ii_Intrinsic<string GCCIntSuffix> 5376 : Hexagon_Intrinsic<GCCIntSuffix, 5377 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_i32_ty], 5378 [IntrNoMem]>; 5379 5380 // 5381 // Hexagon_v1024v128ii_Intrinsic<string GCCIntSuffix> 5382 // tag : V6_vandqrt_128B 5383 class Hexagon_v1024v128ii_Intrinsic<string GCCIntSuffix> 5384 : Hexagon_Intrinsic<GCCIntSuffix, 5385 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_i32_ty], 5386 [IntrNoMem]>; 5387 5388 // 5389 // Hexagon_v512v512v64ii_Intrinsic<string GCCIntSuffix> 5390 // tag : V6_vandqrt_acc 5391 class Hexagon_v512v512v64ii_Intrinsic<string GCCIntSuffix> 5392 : Hexagon_Intrinsic<GCCIntSuffix, 5393 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v512i1_ty,llvm_i32_ty], 5394 [IntrNoMem]>; 5395 5396 // 5397 // Hexagon_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 5398 // tag : V6_vandqrt_acc_128B 5399 class Hexagon_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 5400 : Hexagon_Intrinsic<GCCIntSuffix, 5401 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v1024i1_ty,llvm_i32_ty], 5402 [IntrNoMem]>; 5403 5404 // 5405 // Hexagon_v64iv512i_Intrinsic<string GCCIntSuffix> 5406 // tag : V6_vandvrt 5407 class Hexagon_v64iv512i_Intrinsic<string GCCIntSuffix> 5408 : Hexagon_Intrinsic<GCCIntSuffix, 5409 [llvm_v512i1_ty], [llvm_v16i32_ty,llvm_i32_ty], 5410 [IntrNoMem]>; 5411 5412 // 5413 // Hexagon_v128iv1024i_Intrinsic<string GCCIntSuffix> 5414 // tag : V6_vandvrt_128B 5415 class Hexagon_v128iv1024i_Intrinsic<string GCCIntSuffix> 5416 : Hexagon_Intrinsic<GCCIntSuffix, 5417 [llvm_v1024i1_ty], [llvm_v32i32_ty,llvm_i32_ty], 5418 [IntrNoMem]>; 5419 5420 // 5421 // Hexagon_v64iv64iv512i_Intrinsic<string GCCIntSuffix> 5422 // tag : V6_vandvrt_acc 5423 class Hexagon_v64iv64iv512i_Intrinsic<string GCCIntSuffix> 5424 : Hexagon_Intrinsic<GCCIntSuffix, 5425 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_i32_ty], 5426 [IntrNoMem]>; 5427 5428 // 5429 // Hexagon_v128iv128iv1024i_Intrinsic<string GCCIntSuffix> 5430 // tag : V6_vandvrt_acc_128B 5431 class Hexagon_v128iv128iv1024i_Intrinsic<string GCCIntSuffix> 5432 : Hexagon_Intrinsic<GCCIntSuffix, 5433 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_i32_ty], 5434 [IntrNoMem]>; 5435 5436 // 5437 // Hexagon_v64iv512v512_Intrinsic<string GCCIntSuffix> 5438 // tag : V6_vgtw 5439 class Hexagon_v64iv512v512_Intrinsic<string GCCIntSuffix> 5440 : Hexagon_Intrinsic<GCCIntSuffix, 5441 [llvm_v512i1_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5442 [IntrNoMem]>; 5443 5444 // 5445 // Hexagon_v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5446 // tag : V6_vgtw_128B 5447 class Hexagon_v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5448 : Hexagon_Intrinsic<GCCIntSuffix, 5449 [llvm_v1024i1_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5450 [IntrNoMem]>; 5451 5452 // 5453 // Hexagon_v64iv64iv512v512_Intrinsic<string GCCIntSuffix> 5454 // tag : V6_vgtw_and 5455 class Hexagon_v64iv64iv512v512_Intrinsic<string GCCIntSuffix> 5456 : Hexagon_Intrinsic<GCCIntSuffix, 5457 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5458 [IntrNoMem]>; 5459 5460 // 5461 // Hexagon_v128iv128iv1024v1024_Intrinsic<string GCCIntSuffix> 5462 // tag : V6_vgtw_and_128B 5463 class Hexagon_v128iv128iv1024v1024_Intrinsic<string GCCIntSuffix> 5464 : Hexagon_Intrinsic<GCCIntSuffix, 5465 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5466 [IntrNoMem]>; 5467 5468 // 5469 // Hexagon_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 5470 // tag : V6_pred_or 5471 class Hexagon_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 5472 : Hexagon_Intrinsic<GCCIntSuffix, 5473 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v512i1_ty], 5474 [IntrNoMem]>; 5475 5476 // 5477 // Hexagon_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 5478 // tag : V6_pred_or_128B 5479 class Hexagon_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 5480 : Hexagon_Intrinsic<GCCIntSuffix, 5481 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v1024i1_ty], 5482 [IntrNoMem]>; 5483 5484 // 5485 // Hexagon_v64iv64i_Intrinsic<string GCCIntSuffix> 5486 // tag : V6_pred_not 5487 class Hexagon_v64iv64i_Intrinsic<string GCCIntSuffix> 5488 : Hexagon_Intrinsic<GCCIntSuffix, 5489 [llvm_v512i1_ty], [llvm_v512i1_ty], 5490 [IntrNoMem]>; 5491 5492 // 5493 // Hexagon_v128iv128i_Intrinsic<string GCCIntSuffix> 5494 // tag : V6_pred_not_128B 5495 class Hexagon_v128iv128i_Intrinsic<string GCCIntSuffix> 5496 : Hexagon_Intrinsic<GCCIntSuffix, 5497 [llvm_v1024i1_ty], [llvm_v1024i1_ty], 5498 [IntrNoMem]>; 5499 5500 // 5501 // Hexagon_v64ii_Intrinsic<string GCCIntSuffix> 5502 // tag : V6_pred_scalar2 5503 class Hexagon_v64ii_Intrinsic<string GCCIntSuffix> 5504 : Hexagon_Intrinsic<GCCIntSuffix, 5505 [llvm_v512i1_ty], [llvm_i32_ty], 5506 [IntrNoMem]>; 5507 5508 // 5509 // Hexagon_v128ii_Intrinsic<string GCCIntSuffix> 5510 // tag : V6_pred_scalar2_128B 5511 class Hexagon_v128ii_Intrinsic<string GCCIntSuffix> 5512 : Hexagon_Intrinsic<GCCIntSuffix, 5513 [llvm_v1024i1_ty], [llvm_i32_ty], 5514 [IntrNoMem]>; 5515 5516 // 5517 // Hexagon_v1024v64iv512v512_Intrinsic<string GCCIntSuffix> 5518 // tag : V6_vswap 5519 class Hexagon_v1024v64iv512v512_Intrinsic<string GCCIntSuffix> 5520 : Hexagon_Intrinsic<GCCIntSuffix, 5521 [llvm_v32i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5522 [IntrNoMem]>; 5523 5524 // 5525 // Hexagon_v2048v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5526 // tag : V6_vswap_128B 5527 class Hexagon_v2048v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5528 : Hexagon_Intrinsic<GCCIntSuffix, 5529 [llvm_v64i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5530 [IntrNoMem]>; 5531 5532 // 5533 // Hexagon_v1024v512v512i_Intrinsic<string GCCIntSuffix> 5534 // tag : V6_vshuffvdd 5535 class Hexagon_v1024v512v512i_Intrinsic<string GCCIntSuffix> 5536 : Hexagon_Intrinsic<GCCIntSuffix, 5537 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5538 [IntrNoMem]>; 5539 5540 // 5541 // Hexagon_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5542 // tag : V6_vshuffvdd_128B 5543 class Hexagon_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5544 : Hexagon_Intrinsic<GCCIntSuffix, 5545 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5546 [IntrNoMem]>; 5547 5548 5549 // 5550 // Hexagon_iv512i_Intrinsic<string GCCIntSuffix> 5551 // tag : V6_extractw 5552 class Hexagon_iv512i_Intrinsic<string GCCIntSuffix> 5553 : Hexagon_Intrinsic<GCCIntSuffix, 5554 [llvm_i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5555 [IntrNoMem]>; 5556 5557 // 5558 // Hexagon_iv1024i_Intrinsic<string GCCIntSuffix> 5559 // tag : V6_extractw_128B 5560 class Hexagon_iv1024i_Intrinsic<string GCCIntSuffix> 5561 : Hexagon_Intrinsic<GCCIntSuffix, 5562 [llvm_i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5563 [IntrNoMem]>; 5564 5565 // 5566 // Hexagon_v512i_Intrinsic<string GCCIntSuffix> 5567 // tag : V6_lvsplatw 5568 class Hexagon_v512i_Intrinsic<string GCCIntSuffix> 5569 : Hexagon_Intrinsic<GCCIntSuffix, 5570 [llvm_v16i32_ty], [llvm_i32_ty], 5571 [IntrNoMem]>; 5572 5573 // 5574 // Hexagon_v1024i_Intrinsic<string GCCIntSuffix> 5575 // tag : V6_lvsplatw_128B 5576 class Hexagon_v1024i_Intrinsic<string GCCIntSuffix> 5577 : Hexagon_Intrinsic<GCCIntSuffix, 5578 [llvm_v32i32_ty], [llvm_i32_ty], 5579 [IntrNoMem]>; 5580 5581 // 5582 // Hexagon_v512v512LLii_Intrinsic<string GCCIntSuffix> 5583 // tag : V6_vlutb 5584 class Hexagon_v512v512LLii_Intrinsic<string GCCIntSuffix> 5585 : Hexagon_Intrinsic<GCCIntSuffix, 5586 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i64_ty,llvm_i32_ty], 5587 [IntrNoMem]>; 5588 5589 // 5590 // Hexagon_v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5591 // tag : V6_vlutb_128B 5592 class Hexagon_v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5593 : Hexagon_Intrinsic<GCCIntSuffix, 5594 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i64_ty,llvm_i32_ty], 5595 [IntrNoMem]>; 5596 5597 // 5598 // Hexagon_v512v512v512LLii_Intrinsic<string GCCIntSuffix> 5599 // tag : V6_vlutb_acc 5600 class Hexagon_v512v512v512LLii_Intrinsic<string GCCIntSuffix> 5601 : Hexagon_Intrinsic<GCCIntSuffix, 5602 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i64_ty,llvm_i32_ty], 5603 [IntrNoMem]>; 5604 5605 // 5606 // Hexagon_v1024v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5607 // tag : V6_vlutb_acc_128B 5608 class Hexagon_v1024v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5609 : Hexagon_Intrinsic<GCCIntSuffix, 5610 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i64_ty,llvm_i32_ty], 5611 [IntrNoMem]>; 5612 5613 // 5614 // Hexagon_v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5615 // tag : V6_vlutb_dv_128B 5616 class Hexagon_v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5617 : Hexagon_Intrinsic<GCCIntSuffix, 5618 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i64_ty,llvm_i32_ty], 5619 [IntrNoMem]>; 5620 5621 // 5622 // Hexagon_v2048v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5623 // tag : V6_vlutb_dv_acc_128B 5624 class Hexagon_v2048v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5625 : Hexagon_Intrinsic<GCCIntSuffix, 5626 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i64_ty,llvm_i32_ty], 5627 [IntrNoMem]>; 5628 5629 // 5630 // Hexagon_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 5631 // tag : V6_vlutvvb_oracc 5632 class Hexagon_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 5633 : Hexagon_Intrinsic<GCCIntSuffix, 5634 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5635 [IntrNoMem]>; 5636 5637 // 5638 // Hexagon_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5639 // tag : V6_vlutvvb_oracc_128B 5640 class Hexagon_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5641 : Hexagon_Intrinsic<GCCIntSuffix, 5642 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5643 [IntrNoMem]>; 5644 5645 // 5646 // Hexagon_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 5647 // tag : V6_vlutvwh_oracc 5648 class Hexagon_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 5649 : Hexagon_Intrinsic<GCCIntSuffix, 5650 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5651 [IntrNoMem]>; 5652 5653 // 5654 // Hexagon_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5655 // tag : V6_vlutvwh_oracc_128B 5656 class Hexagon_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5657 : Hexagon_Intrinsic<GCCIntSuffix, 5658 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5659 [IntrNoMem]>; 5660 5661 // 5662 // Hexagon_vv64ivmemv512_Intrinsic<string GCCIntSuffix> 5663 // tag: V6_vS32b_qpred_ai 5664 class Hexagon_vv64ivmemv512_Intrinsic<string GCCIntSuffix> 5665 : Hexagon_Intrinsic<GCCIntSuffix, 5666 [], [llvm_v512i1_ty,llvm_ptr_ty,llvm_v16i32_ty], 5667 [IntrArgMemOnly]>; 5668 5669 // 5670 // Hexagon_vv128ivmemv1024_Intrinsic<string GCCIntSuffix> 5671 // tag: V6_vS32b_qpred_ai_128B 5672 class Hexagon_vv128ivmemv1024_Intrinsic<string GCCIntSuffix> 5673 : Hexagon_Intrinsic<GCCIntSuffix, 5674 [], [llvm_v1024i1_ty,llvm_ptr_ty,llvm_v32i32_ty], 5675 [IntrArgMemOnly]>; 5676 5677 // 5678 // BUILTIN_INFO(HEXAGON.S6_rol_i_r,SI_ftype_SISI,2) 5679 // tag : S6_rol_i_r 5680 def int_hexagon_S6_rol_i_r : 5681 Hexagon_iii_Intrinsic<"HEXAGON_S6_rol_i_r">; 5682 5683 // 5684 // BUILTIN_INFO(HEXAGON.S6_rol_i_p,DI_ftype_DISI,2) 5685 // tag : S6_rol_i_p 5686 def int_hexagon_S6_rol_i_p : 5687 Hexagon_LLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p">; 5688 5689 // 5690 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_acc,SI_ftype_SISISI,3) 5691 // tag : S6_rol_i_r_acc 5692 def int_hexagon_S6_rol_i_r_acc : 5693 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_acc">; 5694 5695 // 5696 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_acc,DI_ftype_DIDISI,3) 5697 // tag : S6_rol_i_p_acc 5698 def int_hexagon_S6_rol_i_p_acc : 5699 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_acc">; 5700 5701 // 5702 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_nac,SI_ftype_SISISI,3) 5703 // tag : S6_rol_i_r_nac 5704 def int_hexagon_S6_rol_i_r_nac : 5705 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_nac">; 5706 5707 // 5708 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_nac,DI_ftype_DIDISI,3) 5709 // tag : S6_rol_i_p_nac 5710 def int_hexagon_S6_rol_i_p_nac : 5711 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_nac">; 5712 5713 // 5714 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_xacc,SI_ftype_SISISI,3) 5715 // tag : S6_rol_i_r_xacc 5716 def int_hexagon_S6_rol_i_r_xacc : 5717 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_xacc">; 5718 5719 // 5720 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_xacc,DI_ftype_DIDISI,3) 5721 // tag : S6_rol_i_p_xacc 5722 def int_hexagon_S6_rol_i_p_xacc : 5723 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_xacc">; 5724 5725 // 5726 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_and,SI_ftype_SISISI,3) 5727 // tag : S6_rol_i_r_and 5728 def int_hexagon_S6_rol_i_r_and : 5729 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_and">; 5730 5731 // 5732 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_or,SI_ftype_SISISI,3) 5733 // tag : S6_rol_i_r_or 5734 def int_hexagon_S6_rol_i_r_or : 5735 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_or">; 5736 5737 // 5738 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_and,DI_ftype_DIDISI,3) 5739 // tag : S6_rol_i_p_and 5740 def int_hexagon_S6_rol_i_p_and : 5741 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_and">; 5742 5743 // 5744 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_or,DI_ftype_DIDISI,3) 5745 // tag : S6_rol_i_p_or 5746 def int_hexagon_S6_rol_i_p_or : 5747 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_or">; 5748 5749 // 5750 // BUILTIN_INFO(HEXAGON.S2_cabacencbin,DI_ftype_DIDIQI,3) 5751 // tag : S2_cabacencbin 5752 def int_hexagon_S2_cabacencbin : 5753 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S2_cabacencbin">; 5754 5755 // 5756 // BUILTIN_INFO(HEXAGON.V6_valignb,VI_ftype_VIVISI,3) 5757 // tag : V6_valignb 5758 def int_hexagon_V6_valignb : 5759 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_valignb">; 5760 5761 // 5762 // BUILTIN_INFO(HEXAGON.V6_valignb_128B,VI_ftype_VIVISI,3) 5763 // tag : V6_valignb_128B 5764 def int_hexagon_V6_valignb_128B : 5765 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_valignb_128B">; 5766 5767 // 5768 // BUILTIN_INFO(HEXAGON.V6_vlalignb,VI_ftype_VIVISI,3) 5769 // tag : V6_vlalignb 5770 def int_hexagon_V6_vlalignb : 5771 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlalignb">; 5772 5773 // 5774 // BUILTIN_INFO(HEXAGON.V6_vlalignb_128B,VI_ftype_VIVISI,3) 5775 // tag : V6_vlalignb_128B 5776 def int_hexagon_V6_vlalignb_128B : 5777 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlalignb_128B">; 5778 5779 // 5780 // BUILTIN_INFO(HEXAGON.V6_valignbi,VI_ftype_VIVISI,3) 5781 // tag : V6_valignbi 5782 def int_hexagon_V6_valignbi : 5783 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_valignbi">; 5784 5785 // 5786 // BUILTIN_INFO(HEXAGON.V6_valignbi_128B,VI_ftype_VIVISI,3) 5787 // tag : V6_valignbi_128B 5788 def int_hexagon_V6_valignbi_128B : 5789 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_valignbi_128B">; 5790 5791 // 5792 // BUILTIN_INFO(HEXAGON.V6_vlalignbi,VI_ftype_VIVISI,3) 5793 // tag : V6_vlalignbi 5794 def int_hexagon_V6_vlalignbi : 5795 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlalignbi">; 5796 5797 // 5798 // BUILTIN_INFO(HEXAGON.V6_vlalignbi_128B,VI_ftype_VIVISI,3) 5799 // tag : V6_vlalignbi_128B 5800 def int_hexagon_V6_vlalignbi_128B : 5801 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlalignbi_128B">; 5802 5803 // 5804 // BUILTIN_INFO(HEXAGON.V6_vror,VI_ftype_VISI,2) 5805 // tag : V6_vror 5806 def int_hexagon_V6_vror : 5807 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vror">; 5808 5809 // 5810 // BUILTIN_INFO(HEXAGON.V6_vror_128B,VI_ftype_VISI,2) 5811 // tag : V6_vror_128B 5812 def int_hexagon_V6_vror_128B : 5813 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vror_128B">; 5814 5815 // 5816 // BUILTIN_INFO(HEXAGON.V6_vunpackub,VD_ftype_VI,1) 5817 // tag : V6_vunpackub 5818 def int_hexagon_V6_vunpackub : 5819 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackub">; 5820 5821 // 5822 // BUILTIN_INFO(HEXAGON.V6_vunpackub_128B,VD_ftype_VI,1) 5823 // tag : V6_vunpackub_128B 5824 def int_hexagon_V6_vunpackub_128B : 5825 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackub_128B">; 5826 5827 // 5828 // BUILTIN_INFO(HEXAGON.V6_vunpackb,VD_ftype_VI,1) 5829 // tag : V6_vunpackb 5830 def int_hexagon_V6_vunpackb : 5831 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackb">; 5832 5833 // 5834 // BUILTIN_INFO(HEXAGON.V6_vunpackb_128B,VD_ftype_VI,1) 5835 // tag : V6_vunpackb_128B 5836 def int_hexagon_V6_vunpackb_128B : 5837 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackb_128B">; 5838 5839 // 5840 // BUILTIN_INFO(HEXAGON.V6_vunpackuh,VD_ftype_VI,1) 5841 // tag : V6_vunpackuh 5842 def int_hexagon_V6_vunpackuh : 5843 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackuh">; 5844 5845 // 5846 // BUILTIN_INFO(HEXAGON.V6_vunpackuh_128B,VD_ftype_VI,1) 5847 // tag : V6_vunpackuh_128B 5848 def int_hexagon_V6_vunpackuh_128B : 5849 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackuh_128B">; 5850 5851 // 5852 // BUILTIN_INFO(HEXAGON.V6_vunpackh,VD_ftype_VI,1) 5853 // tag : V6_vunpackh 5854 def int_hexagon_V6_vunpackh : 5855 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackh">; 5856 5857 // 5858 // BUILTIN_INFO(HEXAGON.V6_vunpackh_128B,VD_ftype_VI,1) 5859 // tag : V6_vunpackh_128B 5860 def int_hexagon_V6_vunpackh_128B : 5861 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackh_128B">; 5862 5863 // 5864 // BUILTIN_INFO(HEXAGON.V6_vunpackob,VD_ftype_VDVI,2) 5865 // tag : V6_vunpackob 5866 def int_hexagon_V6_vunpackob : 5867 Hexagon_v1024v1024v512_Intrinsic<"HEXAGON_V6_vunpackob">; 5868 5869 // 5870 // BUILTIN_INFO(HEXAGON.V6_vunpackob_128B,VD_ftype_VDVI,2) 5871 // tag : V6_vunpackob_128B 5872 def int_hexagon_V6_vunpackob_128B : 5873 Hexagon_v2048v2048v1024_Intrinsic<"HEXAGON_V6_vunpackob_128B">; 5874 5875 // 5876 // BUILTIN_INFO(HEXAGON.V6_vunpackoh,VD_ftype_VDVI,2) 5877 // tag : V6_vunpackoh 5878 def int_hexagon_V6_vunpackoh : 5879 Hexagon_v1024v1024v512_Intrinsic<"HEXAGON_V6_vunpackoh">; 5880 5881 // 5882 // BUILTIN_INFO(HEXAGON.V6_vunpackoh_128B,VD_ftype_VDVI,2) 5883 // tag : V6_vunpackoh_128B 5884 def int_hexagon_V6_vunpackoh_128B : 5885 Hexagon_v2048v2048v1024_Intrinsic<"HEXAGON_V6_vunpackoh_128B">; 5886 5887 // 5888 // BUILTIN_INFO(HEXAGON.V6_vpackeb,VI_ftype_VIVI,2) 5889 // tag : V6_vpackeb 5890 def int_hexagon_V6_vpackeb : 5891 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackeb">; 5892 5893 // 5894 // BUILTIN_INFO(HEXAGON.V6_vpackeb_128B,VI_ftype_VIVI,2) 5895 // tag : V6_vpackeb_128B 5896 def int_hexagon_V6_vpackeb_128B : 5897 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackeb_128B">; 5898 5899 // 5900 // BUILTIN_INFO(HEXAGON.V6_vpackeh,VI_ftype_VIVI,2) 5901 // tag : V6_vpackeh 5902 def int_hexagon_V6_vpackeh : 5903 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackeh">; 5904 5905 // 5906 // BUILTIN_INFO(HEXAGON.V6_vpackeh_128B,VI_ftype_VIVI,2) 5907 // tag : V6_vpackeh_128B 5908 def int_hexagon_V6_vpackeh_128B : 5909 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackeh_128B">; 5910 5911 // 5912 // BUILTIN_INFO(HEXAGON.V6_vpackob,VI_ftype_VIVI,2) 5913 // tag : V6_vpackob 5914 def int_hexagon_V6_vpackob : 5915 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackob">; 5916 5917 // 5918 // BUILTIN_INFO(HEXAGON.V6_vpackob_128B,VI_ftype_VIVI,2) 5919 // tag : V6_vpackob_128B 5920 def int_hexagon_V6_vpackob_128B : 5921 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackob_128B">; 5922 5923 // 5924 // BUILTIN_INFO(HEXAGON.V6_vpackoh,VI_ftype_VIVI,2) 5925 // tag : V6_vpackoh 5926 def int_hexagon_V6_vpackoh : 5927 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackoh">; 5928 5929 // 5930 // BUILTIN_INFO(HEXAGON.V6_vpackoh_128B,VI_ftype_VIVI,2) 5931 // tag : V6_vpackoh_128B 5932 def int_hexagon_V6_vpackoh_128B : 5933 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackoh_128B">; 5934 5935 // 5936 // BUILTIN_INFO(HEXAGON.V6_vpackhub_sat,VI_ftype_VIVI,2) 5937 // tag : V6_vpackhub_sat 5938 def int_hexagon_V6_vpackhub_sat : 5939 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackhub_sat">; 5940 5941 // 5942 // BUILTIN_INFO(HEXAGON.V6_vpackhub_sat_128B,VI_ftype_VIVI,2) 5943 // tag : V6_vpackhub_sat_128B 5944 def int_hexagon_V6_vpackhub_sat_128B : 5945 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackhub_sat_128B">; 5946 5947 // 5948 // BUILTIN_INFO(HEXAGON.V6_vpackhb_sat,VI_ftype_VIVI,2) 5949 // tag : V6_vpackhb_sat 5950 def int_hexagon_V6_vpackhb_sat : 5951 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackhb_sat">; 5952 5953 // 5954 // BUILTIN_INFO(HEXAGON.V6_vpackhb_sat_128B,VI_ftype_VIVI,2) 5955 // tag : V6_vpackhb_sat_128B 5956 def int_hexagon_V6_vpackhb_sat_128B : 5957 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackhb_sat_128B">; 5958 5959 // 5960 // BUILTIN_INFO(HEXAGON.V6_vpackwuh_sat,VI_ftype_VIVI,2) 5961 // tag : V6_vpackwuh_sat 5962 def int_hexagon_V6_vpackwuh_sat : 5963 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackwuh_sat">; 5964 5965 // 5966 // BUILTIN_INFO(HEXAGON.V6_vpackwuh_sat_128B,VI_ftype_VIVI,2) 5967 // tag : V6_vpackwuh_sat_128B 5968 def int_hexagon_V6_vpackwuh_sat_128B : 5969 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackwuh_sat_128B">; 5970 5971 // 5972 // BUILTIN_INFO(HEXAGON.V6_vpackwh_sat,VI_ftype_VIVI,2) 5973 // tag : V6_vpackwh_sat 5974 def int_hexagon_V6_vpackwh_sat : 5975 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackwh_sat">; 5976 5977 // 5978 // BUILTIN_INFO(HEXAGON.V6_vpackwh_sat_128B,VI_ftype_VIVI,2) 5979 // tag : V6_vpackwh_sat_128B 5980 def int_hexagon_V6_vpackwh_sat_128B : 5981 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackwh_sat_128B">; 5982 5983 // 5984 // BUILTIN_INFO(HEXAGON.V6_vzb,VD_ftype_VI,1) 5985 // tag : V6_vzb 5986 def int_hexagon_V6_vzb : 5987 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vzb">; 5988 5989 // 5990 // BUILTIN_INFO(HEXAGON.V6_vzb_128B,VD_ftype_VI,1) 5991 // tag : V6_vzb_128B 5992 def int_hexagon_V6_vzb_128B : 5993 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vzb_128B">; 5994 5995 // 5996 // BUILTIN_INFO(HEXAGON.V6_vsb,VD_ftype_VI,1) 5997 // tag : V6_vsb 5998 def int_hexagon_V6_vsb : 5999 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vsb">; 6000 6001 // 6002 // BUILTIN_INFO(HEXAGON.V6_vsb_128B,VD_ftype_VI,1) 6003 // tag : V6_vsb_128B 6004 def int_hexagon_V6_vsb_128B : 6005 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vsb_128B">; 6006 6007 // 6008 // BUILTIN_INFO(HEXAGON.V6_vzh,VD_ftype_VI,1) 6009 // tag : V6_vzh 6010 def int_hexagon_V6_vzh : 6011 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vzh">; 6012 6013 // 6014 // BUILTIN_INFO(HEXAGON.V6_vzh_128B,VD_ftype_VI,1) 6015 // tag : V6_vzh_128B 6016 def int_hexagon_V6_vzh_128B : 6017 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vzh_128B">; 6018 6019 // 6020 // BUILTIN_INFO(HEXAGON.V6_vsh,VD_ftype_VI,1) 6021 // tag : V6_vsh 6022 def int_hexagon_V6_vsh : 6023 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vsh">; 6024 6025 // 6026 // BUILTIN_INFO(HEXAGON.V6_vsh_128B,VD_ftype_VI,1) 6027 // tag : V6_vsh_128B 6028 def int_hexagon_V6_vsh_128B : 6029 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vsh_128B">; 6030 6031 // 6032 // BUILTIN_INFO(HEXAGON.V6_vdmpybus,VI_ftype_VISI,2) 6033 // tag : V6_vdmpybus 6034 def int_hexagon_V6_vdmpybus : 6035 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpybus">; 6036 6037 // 6038 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_128B,VI_ftype_VISI,2) 6039 // tag : V6_vdmpybus_128B 6040 def int_hexagon_V6_vdmpybus_128B : 6041 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_128B">; 6042 6043 // 6044 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_acc,VI_ftype_VIVISI,3) 6045 // tag : V6_vdmpybus_acc 6046 def int_hexagon_V6_vdmpybus_acc : 6047 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpybus_acc">; 6048 6049 // 6050 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_acc_128B,VI_ftype_VIVISI,3) 6051 // tag : V6_vdmpybus_acc_128B 6052 def int_hexagon_V6_vdmpybus_acc_128B : 6053 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_acc_128B">; 6054 6055 // 6056 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv,VD_ftype_VDSI,2) 6057 // tag : V6_vdmpybus_dv 6058 def int_hexagon_V6_vdmpybus_dv : 6059 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_dv">; 6060 6061 // 6062 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_128B,VD_ftype_VDSI,2) 6063 // tag : V6_vdmpybus_dv_128B 6064 def int_hexagon_V6_vdmpybus_dv_128B : 6065 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_128B">; 6066 6067 // 6068 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_acc,VD_ftype_VDVDSI,3) 6069 // tag : V6_vdmpybus_dv_acc 6070 def int_hexagon_V6_vdmpybus_dv_acc : 6071 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_acc">; 6072 6073 // 6074 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_acc_128B,VD_ftype_VDVDSI,3) 6075 // tag : V6_vdmpybus_dv_acc_128B 6076 def int_hexagon_V6_vdmpybus_dv_acc_128B : 6077 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_acc_128B">; 6078 6079 // 6080 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb,VI_ftype_VISI,2) 6081 // tag : V6_vdmpyhb 6082 def int_hexagon_V6_vdmpyhb : 6083 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhb">; 6084 6085 // 6086 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_128B,VI_ftype_VISI,2) 6087 // tag : V6_vdmpyhb_128B 6088 def int_hexagon_V6_vdmpyhb_128B : 6089 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_128B">; 6090 6091 // 6092 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_acc,VI_ftype_VIVISI,3) 6093 // tag : V6_vdmpyhb_acc 6094 def int_hexagon_V6_vdmpyhb_acc : 6095 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhb_acc">; 6096 6097 // 6098 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_acc_128B,VI_ftype_VIVISI,3) 6099 // tag : V6_vdmpyhb_acc_128B 6100 def int_hexagon_V6_vdmpyhb_acc_128B : 6101 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_acc_128B">; 6102 6103 // 6104 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv,VD_ftype_VDSI,2) 6105 // tag : V6_vdmpyhb_dv 6106 def int_hexagon_V6_vdmpyhb_dv : 6107 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv">; 6108 6109 // 6110 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_128B,VD_ftype_VDSI,2) 6111 // tag : V6_vdmpyhb_dv_128B 6112 def int_hexagon_V6_vdmpyhb_dv_128B : 6113 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_128B">; 6114 6115 // 6116 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_acc,VD_ftype_VDVDSI,3) 6117 // tag : V6_vdmpyhb_dv_acc 6118 def int_hexagon_V6_vdmpyhb_dv_acc : 6119 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_acc">; 6120 6121 // 6122 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_acc_128B,VD_ftype_VDVDSI,3) 6123 // tag : V6_vdmpyhb_dv_acc_128B 6124 def int_hexagon_V6_vdmpyhb_dv_acc_128B : 6125 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_acc_128B">; 6126 6127 // 6128 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat,VI_ftype_VIVI,2) 6129 // tag : V6_vdmpyhvsat 6130 def int_hexagon_V6_vdmpyhvsat : 6131 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdmpyhvsat">; 6132 6133 // 6134 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_128B,VI_ftype_VIVI,2) 6135 // tag : V6_vdmpyhvsat_128B 6136 def int_hexagon_V6_vdmpyhvsat_128B : 6137 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdmpyhvsat_128B">; 6138 6139 // 6140 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_acc,VI_ftype_VIVIVI,3) 6141 // tag : V6_vdmpyhvsat_acc 6142 def int_hexagon_V6_vdmpyhvsat_acc : 6143 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vdmpyhvsat_acc">; 6144 6145 // 6146 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_acc_128B,VI_ftype_VIVIVI,3) 6147 // tag : V6_vdmpyhvsat_acc_128B 6148 def int_hexagon_V6_vdmpyhvsat_acc_128B : 6149 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdmpyhvsat_acc_128B">; 6150 6151 // 6152 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat,VI_ftype_VISI,2) 6153 // tag : V6_vdmpyhsat 6154 def int_hexagon_V6_vdmpyhsat : 6155 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsat">; 6156 6157 // 6158 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_128B,VI_ftype_VISI,2) 6159 // tag : V6_vdmpyhsat_128B 6160 def int_hexagon_V6_vdmpyhsat_128B : 6161 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsat_128B">; 6162 6163 // 6164 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_acc,VI_ftype_VIVISI,3) 6165 // tag : V6_vdmpyhsat_acc 6166 def int_hexagon_V6_vdmpyhsat_acc : 6167 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsat_acc">; 6168 6169 // 6170 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_acc_128B,VI_ftype_VIVISI,3) 6171 // tag : V6_vdmpyhsat_acc_128B 6172 def int_hexagon_V6_vdmpyhsat_acc_128B : 6173 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsat_acc_128B">; 6174 6175 // 6176 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat,VI_ftype_VDSI,2) 6177 // tag : V6_vdmpyhisat 6178 def int_hexagon_V6_vdmpyhisat : 6179 Hexagon_v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhisat">; 6180 6181 // 6182 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_128B,VI_ftype_VDSI,2) 6183 // tag : V6_vdmpyhisat_128B 6184 def int_hexagon_V6_vdmpyhisat_128B : 6185 Hexagon_v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhisat_128B">; 6186 6187 // 6188 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_acc,VI_ftype_VIVDSI,3) 6189 // tag : V6_vdmpyhisat_acc 6190 def int_hexagon_V6_vdmpyhisat_acc : 6191 Hexagon_v512v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhisat_acc">; 6192 6193 // 6194 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_acc_128B,VI_ftype_VIVDSI,3) 6195 // tag : V6_vdmpyhisat_acc_128B 6196 def int_hexagon_V6_vdmpyhisat_acc_128B : 6197 Hexagon_v1024v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhisat_acc_128B">; 6198 6199 // 6200 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat,VI_ftype_VISI,2) 6201 // tag : V6_vdmpyhsusat 6202 def int_hexagon_V6_vdmpyhsusat : 6203 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsusat">; 6204 6205 // 6206 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_128B,VI_ftype_VISI,2) 6207 // tag : V6_vdmpyhsusat_128B 6208 def int_hexagon_V6_vdmpyhsusat_128B : 6209 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_128B">; 6210 6211 // 6212 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_acc,VI_ftype_VIVISI,3) 6213 // tag : V6_vdmpyhsusat_acc 6214 def int_hexagon_V6_vdmpyhsusat_acc : 6215 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_acc">; 6216 6217 // 6218 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_acc_128B,VI_ftype_VIVISI,3) 6219 // tag : V6_vdmpyhsusat_acc_128B 6220 def int_hexagon_V6_vdmpyhsusat_acc_128B : 6221 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_acc_128B">; 6222 6223 // 6224 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat,VI_ftype_VDSI,2) 6225 // tag : V6_vdmpyhsuisat 6226 def int_hexagon_V6_vdmpyhsuisat : 6227 Hexagon_v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat">; 6228 6229 // 6230 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_128B,VI_ftype_VDSI,2) 6231 // tag : V6_vdmpyhsuisat_128B 6232 def int_hexagon_V6_vdmpyhsuisat_128B : 6233 Hexagon_v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_128B">; 6234 6235 // 6236 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_acc,VI_ftype_VIVDSI,3) 6237 // tag : V6_vdmpyhsuisat_acc 6238 def int_hexagon_V6_vdmpyhsuisat_acc : 6239 Hexagon_v512v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_acc">; 6240 6241 // 6242 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_acc_128B,VI_ftype_VIVDSI,3) 6243 // tag : V6_vdmpyhsuisat_acc_128B 6244 def int_hexagon_V6_vdmpyhsuisat_acc_128B : 6245 Hexagon_v1024v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_acc_128B">; 6246 6247 // 6248 // BUILTIN_INFO(HEXAGON.V6_vtmpyb,VD_ftype_VDSI,2) 6249 // tag : V6_vtmpyb 6250 def int_hexagon_V6_vtmpyb : 6251 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyb">; 6252 6253 // 6254 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_128B,VD_ftype_VDSI,2) 6255 // tag : V6_vtmpyb_128B 6256 def int_hexagon_V6_vtmpyb_128B : 6257 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyb_128B">; 6258 6259 // 6260 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_acc,VD_ftype_VDVDSI,3) 6261 // tag : V6_vtmpyb_acc 6262 def int_hexagon_V6_vtmpyb_acc : 6263 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyb_acc">; 6264 6265 // 6266 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_acc_128B,VD_ftype_VDVDSI,3) 6267 // tag : V6_vtmpyb_acc_128B 6268 def int_hexagon_V6_vtmpyb_acc_128B : 6269 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyb_acc_128B">; 6270 6271 // 6272 // BUILTIN_INFO(HEXAGON.V6_vtmpybus,VD_ftype_VDSI,2) 6273 // tag : V6_vtmpybus 6274 def int_hexagon_V6_vtmpybus : 6275 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpybus">; 6276 6277 // 6278 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_128B,VD_ftype_VDSI,2) 6279 // tag : V6_vtmpybus_128B 6280 def int_hexagon_V6_vtmpybus_128B : 6281 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpybus_128B">; 6282 6283 // 6284 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_acc,VD_ftype_VDVDSI,3) 6285 // tag : V6_vtmpybus_acc 6286 def int_hexagon_V6_vtmpybus_acc : 6287 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpybus_acc">; 6288 6289 // 6290 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_acc_128B,VD_ftype_VDVDSI,3) 6291 // tag : V6_vtmpybus_acc_128B 6292 def int_hexagon_V6_vtmpybus_acc_128B : 6293 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpybus_acc_128B">; 6294 6295 // 6296 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb,VD_ftype_VDSI,2) 6297 // tag : V6_vtmpyhb 6298 def int_hexagon_V6_vtmpyhb : 6299 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyhb">; 6300 6301 // 6302 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_128B,VD_ftype_VDSI,2) 6303 // tag : V6_vtmpyhb_128B 6304 def int_hexagon_V6_vtmpyhb_128B : 6305 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyhb_128B">; 6306 6307 // 6308 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_acc,VD_ftype_VDVDSI,3) 6309 // tag : V6_vtmpyhb_acc 6310 def int_hexagon_V6_vtmpyhb_acc : 6311 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyhb_acc">; 6312 6313 // 6314 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_acc_128B,VD_ftype_VDVDSI,3) 6315 // tag : V6_vtmpyhb_acc_128B 6316 def int_hexagon_V6_vtmpyhb_acc_128B : 6317 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyhb_acc_128B">; 6318 6319 // 6320 // BUILTIN_INFO(HEXAGON.V6_vrmpyub,VI_ftype_VISI,2) 6321 // tag : V6_vrmpyub 6322 def int_hexagon_V6_vrmpyub : 6323 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vrmpyub">; 6324 6325 // 6326 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_128B,VI_ftype_VISI,2) 6327 // tag : V6_vrmpyub_128B 6328 def int_hexagon_V6_vrmpyub_128B : 6329 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpyub_128B">; 6330 6331 // 6332 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_acc,VI_ftype_VIVISI,3) 6333 // tag : V6_vrmpyub_acc 6334 def int_hexagon_V6_vrmpyub_acc : 6335 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vrmpyub_acc">; 6336 6337 // 6338 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_acc_128B,VI_ftype_VIVISI,3) 6339 // tag : V6_vrmpyub_acc_128B 6340 def int_hexagon_V6_vrmpyub_acc_128B : 6341 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpyub_acc_128B">; 6342 6343 // 6344 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv,VI_ftype_VIVI,2) 6345 // tag : V6_vrmpyubv 6346 def int_hexagon_V6_vrmpyubv : 6347 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpyubv">; 6348 6349 // 6350 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_128B,VI_ftype_VIVI,2) 6351 // tag : V6_vrmpyubv_128B 6352 def int_hexagon_V6_vrmpyubv_128B : 6353 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpyubv_128B">; 6354 6355 // 6356 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_acc,VI_ftype_VIVIVI,3) 6357 // tag : V6_vrmpyubv_acc 6358 def int_hexagon_V6_vrmpyubv_acc : 6359 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpyubv_acc">; 6360 6361 // 6362 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_acc_128B,VI_ftype_VIVIVI,3) 6363 // tag : V6_vrmpyubv_acc_128B 6364 def int_hexagon_V6_vrmpyubv_acc_128B : 6365 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpyubv_acc_128B">; 6366 6367 // 6368 // BUILTIN_INFO(HEXAGON.V6_vrmpybv,VI_ftype_VIVI,2) 6369 // tag : V6_vrmpybv 6370 def int_hexagon_V6_vrmpybv : 6371 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybv">; 6372 6373 // 6374 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_128B,VI_ftype_VIVI,2) 6375 // tag : V6_vrmpybv_128B 6376 def int_hexagon_V6_vrmpybv_128B : 6377 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybv_128B">; 6378 6379 // 6380 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_acc,VI_ftype_VIVIVI,3) 6381 // tag : V6_vrmpybv_acc 6382 def int_hexagon_V6_vrmpybv_acc : 6383 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybv_acc">; 6384 6385 // 6386 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_acc_128B,VI_ftype_VIVIVI,3) 6387 // tag : V6_vrmpybv_acc_128B 6388 def int_hexagon_V6_vrmpybv_acc_128B : 6389 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybv_acc_128B">; 6390 6391 // 6392 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi,VD_ftype_VDSISI,3) 6393 // tag : V6_vrmpyubi 6394 def int_hexagon_V6_vrmpyubi : 6395 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpyubi">; 6396 6397 // 6398 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_128B,VD_ftype_VDSISI,3) 6399 // tag : V6_vrmpyubi_128B 6400 def int_hexagon_V6_vrmpyubi_128B : 6401 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpyubi_128B">; 6402 6403 // 6404 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_acc,VD_ftype_VDVDSISI,4) 6405 // tag : V6_vrmpyubi_acc 6406 def int_hexagon_V6_vrmpyubi_acc : 6407 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpyubi_acc">; 6408 6409 // 6410 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_acc_128B,VD_ftype_VDVDSISI,4) 6411 // tag : V6_vrmpyubi_acc_128B 6412 def int_hexagon_V6_vrmpyubi_acc_128B : 6413 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpyubi_acc_128B">; 6414 6415 // 6416 // BUILTIN_INFO(HEXAGON.V6_vrmpybus,VI_ftype_VISI,2) 6417 // tag : V6_vrmpybus 6418 def int_hexagon_V6_vrmpybus : 6419 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vrmpybus">; 6420 6421 // 6422 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_128B,VI_ftype_VISI,2) 6423 // tag : V6_vrmpybus_128B 6424 def int_hexagon_V6_vrmpybus_128B : 6425 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpybus_128B">; 6426 6427 // 6428 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_acc,VI_ftype_VIVISI,3) 6429 // tag : V6_vrmpybus_acc 6430 def int_hexagon_V6_vrmpybus_acc : 6431 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vrmpybus_acc">; 6432 6433 // 6434 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_acc_128B,VI_ftype_VIVISI,3) 6435 // tag : V6_vrmpybus_acc_128B 6436 def int_hexagon_V6_vrmpybus_acc_128B : 6437 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpybus_acc_128B">; 6438 6439 // 6440 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi,VD_ftype_VDSISI,3) 6441 // tag : V6_vrmpybusi 6442 def int_hexagon_V6_vrmpybusi : 6443 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpybusi">; 6444 6445 // 6446 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_128B,VD_ftype_VDSISI,3) 6447 // tag : V6_vrmpybusi_128B 6448 def int_hexagon_V6_vrmpybusi_128B : 6449 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpybusi_128B">; 6450 6451 // 6452 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_acc,VD_ftype_VDVDSISI,4) 6453 // tag : V6_vrmpybusi_acc 6454 def int_hexagon_V6_vrmpybusi_acc : 6455 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpybusi_acc">; 6456 6457 // 6458 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_acc_128B,VD_ftype_VDVDSISI,4) 6459 // tag : V6_vrmpybusi_acc_128B 6460 def int_hexagon_V6_vrmpybusi_acc_128B : 6461 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpybusi_acc_128B">; 6462 6463 // 6464 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv,VI_ftype_VIVI,2) 6465 // tag : V6_vrmpybusv 6466 def int_hexagon_V6_vrmpybusv : 6467 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybusv">; 6468 6469 // 6470 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_128B,VI_ftype_VIVI,2) 6471 // tag : V6_vrmpybusv_128B 6472 def int_hexagon_V6_vrmpybusv_128B : 6473 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybusv_128B">; 6474 6475 // 6476 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_acc,VI_ftype_VIVIVI,3) 6477 // tag : V6_vrmpybusv_acc 6478 def int_hexagon_V6_vrmpybusv_acc : 6479 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybusv_acc">; 6480 6481 // 6482 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_acc_128B,VI_ftype_VIVIVI,3) 6483 // tag : V6_vrmpybusv_acc_128B 6484 def int_hexagon_V6_vrmpybusv_acc_128B : 6485 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybusv_acc_128B">; 6486 6487 // 6488 // BUILTIN_INFO(HEXAGON.V6_vdsaduh,VD_ftype_VDSI,2) 6489 // tag : V6_vdsaduh 6490 def int_hexagon_V6_vdsaduh : 6491 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdsaduh">; 6492 6493 // 6494 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_128B,VD_ftype_VDSI,2) 6495 // tag : V6_vdsaduh_128B 6496 def int_hexagon_V6_vdsaduh_128B : 6497 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdsaduh_128B">; 6498 6499 // 6500 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_acc,VD_ftype_VDVDSI,3) 6501 // tag : V6_vdsaduh_acc 6502 def int_hexagon_V6_vdsaduh_acc : 6503 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdsaduh_acc">; 6504 6505 // 6506 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_acc_128B,VD_ftype_VDVDSI,3) 6507 // tag : V6_vdsaduh_acc_128B 6508 def int_hexagon_V6_vdsaduh_acc_128B : 6509 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdsaduh_acc_128B">; 6510 6511 // 6512 // BUILTIN_INFO(HEXAGON.V6_vrsadubi,VD_ftype_VDSISI,3) 6513 // tag : V6_vrsadubi 6514 def int_hexagon_V6_vrsadubi : 6515 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrsadubi">; 6516 6517 // 6518 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_128B,VD_ftype_VDSISI,3) 6519 // tag : V6_vrsadubi_128B 6520 def int_hexagon_V6_vrsadubi_128B : 6521 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrsadubi_128B">; 6522 6523 // 6524 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_acc,VD_ftype_VDVDSISI,4) 6525 // tag : V6_vrsadubi_acc 6526 def int_hexagon_V6_vrsadubi_acc : 6527 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrsadubi_acc">; 6528 6529 // 6530 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_acc_128B,VD_ftype_VDVDSISI,4) 6531 // tag : V6_vrsadubi_acc_128B 6532 def int_hexagon_V6_vrsadubi_acc_128B : 6533 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrsadubi_acc_128B">; 6534 6535 // 6536 // BUILTIN_INFO(HEXAGON.V6_vasrw,VI_ftype_VISI,2) 6537 // tag : V6_vasrw 6538 def int_hexagon_V6_vasrw : 6539 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vasrw">; 6540 6541 // 6542 // BUILTIN_INFO(HEXAGON.V6_vasrw_128B,VI_ftype_VISI,2) 6543 // tag : V6_vasrw_128B 6544 def int_hexagon_V6_vasrw_128B : 6545 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vasrw_128B">; 6546 6547 6548 // 6549 // BUILTIN_INFO(HEXAGON.V6_vaslw,VI_ftype_VISI,2) 6550 // tag : V6_vaslw 6551 def int_hexagon_V6_vaslw : 6552 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vaslw">; 6553 6554 // 6555 // BUILTIN_INFO(HEXAGON.V6_vaslw_128B,VI_ftype_VISI,2) 6556 // tag : V6_vaslw_128B 6557 def int_hexagon_V6_vaslw_128B : 6558 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vaslw_128B">; 6559 6560 // 6561 // BUILTIN_INFO(HEXAGON.V6_vlsrw,VI_ftype_VISI,2) 6562 // tag : V6_vlsrw 6563 def int_hexagon_V6_vlsrw : 6564 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vlsrw">; 6565 6566 // 6567 // BUILTIN_INFO(HEXAGON.V6_vlsrw_128B,VI_ftype_VISI,2) 6568 // tag : V6_vlsrw_128B 6569 def int_hexagon_V6_vlsrw_128B : 6570 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrw_128B">; 6571 6572 // 6573 // BUILTIN_INFO(HEXAGON.V6_vasrwv,VI_ftype_VIVI,2) 6574 // tag : V6_vasrwv 6575 def int_hexagon_V6_vasrwv : 6576 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vasrwv">; 6577 6578 // 6579 // BUILTIN_INFO(HEXAGON.V6_vasrwv_128B,VI_ftype_VIVI,2) 6580 // tag : V6_vasrwv_128B 6581 def int_hexagon_V6_vasrwv_128B : 6582 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vasrwv_128B">; 6583 6584 // 6585 // BUILTIN_INFO(HEXAGON.V6_vaslwv,VI_ftype_VIVI,2) 6586 // tag : V6_vaslwv 6587 def int_hexagon_V6_vaslwv : 6588 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaslwv">; 6589 6590 // 6591 // BUILTIN_INFO(HEXAGON.V6_vaslwv_128B,VI_ftype_VIVI,2) 6592 // tag : V6_vaslwv_128B 6593 def int_hexagon_V6_vaslwv_128B : 6594 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaslwv_128B">; 6595 6596 // 6597 // BUILTIN_INFO(HEXAGON.V6_vlsrwv,VI_ftype_VIVI,2) 6598 // tag : V6_vlsrwv 6599 def int_hexagon_V6_vlsrwv : 6600 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vlsrwv">; 6601 6602 // 6603 // BUILTIN_INFO(HEXAGON.V6_vlsrwv_128B,VI_ftype_VIVI,2) 6604 // tag : V6_vlsrwv_128B 6605 def int_hexagon_V6_vlsrwv_128B : 6606 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vlsrwv_128B">; 6607 6608 // 6609 // BUILTIN_INFO(HEXAGON.V6_vasrh,VI_ftype_VISI,2) 6610 // tag : V6_vasrh 6611 def int_hexagon_V6_vasrh : 6612 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vasrh">; 6613 6614 // 6615 // BUILTIN_INFO(HEXAGON.V6_vasrh_128B,VI_ftype_VISI,2) 6616 // tag : V6_vasrh_128B 6617 def int_hexagon_V6_vasrh_128B : 6618 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vasrh_128B">; 6619 6620 // 6621 // BUILTIN_INFO(HEXAGON.V6_vaslh,VI_ftype_VISI,2) 6622 // tag : V6_vaslh 6623 def int_hexagon_V6_vaslh : 6624 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vaslh">; 6625 6626 // 6627 // BUILTIN_INFO(HEXAGON.V6_vaslh_128B,VI_ftype_VISI,2) 6628 // tag : V6_vaslh_128B 6629 def int_hexagon_V6_vaslh_128B : 6630 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vaslh_128B">; 6631 6632 // 6633 // BUILTIN_INFO(HEXAGON.V6_vlsrh,VI_ftype_VISI,2) 6634 // tag : V6_vlsrh 6635 def int_hexagon_V6_vlsrh : 6636 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vlsrh">; 6637 6638 // 6639 // BUILTIN_INFO(HEXAGON.V6_vlsrh_128B,VI_ftype_VISI,2) 6640 // tag : V6_vlsrh_128B 6641 def int_hexagon_V6_vlsrh_128B : 6642 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrh_128B">; 6643 6644 // 6645 // BUILTIN_INFO(HEXAGON.V6_vasrhv,VI_ftype_VIVI,2) 6646 // tag : V6_vasrhv 6647 def int_hexagon_V6_vasrhv : 6648 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vasrhv">; 6649 6650 // 6651 // BUILTIN_INFO(HEXAGON.V6_vasrhv_128B,VI_ftype_VIVI,2) 6652 // tag : V6_vasrhv_128B 6653 def int_hexagon_V6_vasrhv_128B : 6654 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vasrhv_128B">; 6655 6656 // 6657 // BUILTIN_INFO(HEXAGON.V6_vaslhv,VI_ftype_VIVI,2) 6658 // tag : V6_vaslhv 6659 def int_hexagon_V6_vaslhv : 6660 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaslhv">; 6661 6662 // 6663 // BUILTIN_INFO(HEXAGON.V6_vaslhv_128B,VI_ftype_VIVI,2) 6664 // tag : V6_vaslhv_128B 6665 def int_hexagon_V6_vaslhv_128B : 6666 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaslhv_128B">; 6667 6668 // 6669 // BUILTIN_INFO(HEXAGON.V6_vlsrhv,VI_ftype_VIVI,2) 6670 // tag : V6_vlsrhv 6671 def int_hexagon_V6_vlsrhv : 6672 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vlsrhv">; 6673 6674 // 6675 // BUILTIN_INFO(HEXAGON.V6_vlsrhv_128B,VI_ftype_VIVI,2) 6676 // tag : V6_vlsrhv_128B 6677 def int_hexagon_V6_vlsrhv_128B : 6678 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vlsrhv_128B">; 6679 6680 // 6681 // BUILTIN_INFO(HEXAGON.V6_vasrwh,VI_ftype_VIVISI,3) 6682 // tag : V6_vasrwh 6683 def int_hexagon_V6_vasrwh : 6684 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwh">; 6685 6686 // 6687 // BUILTIN_INFO(HEXAGON.V6_vasrwh_128B,VI_ftype_VIVISI,3) 6688 // tag : V6_vasrwh_128B 6689 def int_hexagon_V6_vasrwh_128B : 6690 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwh_128B">; 6691 6692 // 6693 // BUILTIN_INFO(HEXAGON.V6_vasrwhsat,VI_ftype_VIVISI,3) 6694 // tag : V6_vasrwhsat 6695 def int_hexagon_V6_vasrwhsat : 6696 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwhsat">; 6697 6698 // 6699 // BUILTIN_INFO(HEXAGON.V6_vasrwhsat_128B,VI_ftype_VIVISI,3) 6700 // tag : V6_vasrwhsat_128B 6701 def int_hexagon_V6_vasrwhsat_128B : 6702 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwhsat_128B">; 6703 6704 // 6705 // BUILTIN_INFO(HEXAGON.V6_vasrwhrndsat,VI_ftype_VIVISI,3) 6706 // tag : V6_vasrwhrndsat 6707 def int_hexagon_V6_vasrwhrndsat : 6708 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwhrndsat">; 6709 6710 // 6711 // BUILTIN_INFO(HEXAGON.V6_vasrwhrndsat_128B,VI_ftype_VIVISI,3) 6712 // tag : V6_vasrwhrndsat_128B 6713 def int_hexagon_V6_vasrwhrndsat_128B : 6714 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwhrndsat_128B">; 6715 6716 // 6717 // BUILTIN_INFO(HEXAGON.V6_vasrwuhsat,VI_ftype_VIVISI,3) 6718 // tag : V6_vasrwuhsat 6719 def int_hexagon_V6_vasrwuhsat : 6720 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwuhsat">; 6721 6722 // 6723 // BUILTIN_INFO(HEXAGON.V6_vasrwuhsat_128B,VI_ftype_VIVISI,3) 6724 // tag : V6_vasrwuhsat_128B 6725 def int_hexagon_V6_vasrwuhsat_128B : 6726 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwuhsat_128B">; 6727 6728 // 6729 // BUILTIN_INFO(HEXAGON.V6_vroundwh,VI_ftype_VIVI,2) 6730 // tag : V6_vroundwh 6731 def int_hexagon_V6_vroundwh : 6732 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundwh">; 6733 6734 // 6735 // BUILTIN_INFO(HEXAGON.V6_vroundwh_128B,VI_ftype_VIVI,2) 6736 // tag : V6_vroundwh_128B 6737 def int_hexagon_V6_vroundwh_128B : 6738 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundwh_128B">; 6739 6740 // 6741 // BUILTIN_INFO(HEXAGON.V6_vroundwuh,VI_ftype_VIVI,2) 6742 // tag : V6_vroundwuh 6743 def int_hexagon_V6_vroundwuh : 6744 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundwuh">; 6745 6746 // 6747 // BUILTIN_INFO(HEXAGON.V6_vroundwuh_128B,VI_ftype_VIVI,2) 6748 // tag : V6_vroundwuh_128B 6749 def int_hexagon_V6_vroundwuh_128B : 6750 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundwuh_128B">; 6751 6752 // 6753 // BUILTIN_INFO(HEXAGON.V6_vasrhubsat,VI_ftype_VIVISI,3) 6754 // tag : V6_vasrhubsat 6755 def int_hexagon_V6_vasrhubsat : 6756 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhubsat">; 6757 6758 // 6759 // BUILTIN_INFO(HEXAGON.V6_vasrhubsat_128B,VI_ftype_VIVISI,3) 6760 // tag : V6_vasrhubsat_128B 6761 def int_hexagon_V6_vasrhubsat_128B : 6762 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhubsat_128B">; 6763 6764 // 6765 // BUILTIN_INFO(HEXAGON.V6_vasrhubrndsat,VI_ftype_VIVISI,3) 6766 // tag : V6_vasrhubrndsat 6767 def int_hexagon_V6_vasrhubrndsat : 6768 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhubrndsat">; 6769 6770 // 6771 // BUILTIN_INFO(HEXAGON.V6_vasrhubrndsat_128B,VI_ftype_VIVISI,3) 6772 // tag : V6_vasrhubrndsat_128B 6773 def int_hexagon_V6_vasrhubrndsat_128B : 6774 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhubrndsat_128B">; 6775 6776 // 6777 // BUILTIN_INFO(HEXAGON.V6_vasrhbrndsat,VI_ftype_VIVISI,3) 6778 // tag : V6_vasrhbrndsat 6779 def int_hexagon_V6_vasrhbrndsat : 6780 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhbrndsat">; 6781 6782 // 6783 // BUILTIN_INFO(HEXAGON.V6_vasrhbrndsat_128B,VI_ftype_VIVISI,3) 6784 // tag : V6_vasrhbrndsat_128B 6785 def int_hexagon_V6_vasrhbrndsat_128B : 6786 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhbrndsat_128B">; 6787 6788 // 6789 // BUILTIN_INFO(HEXAGON.V6_vroundhb,VI_ftype_VIVI,2) 6790 // tag : V6_vroundhb 6791 def int_hexagon_V6_vroundhb : 6792 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundhb">; 6793 6794 // 6795 // BUILTIN_INFO(HEXAGON.V6_vroundhb_128B,VI_ftype_VIVI,2) 6796 // tag : V6_vroundhb_128B 6797 def int_hexagon_V6_vroundhb_128B : 6798 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundhb_128B">; 6799 6800 // 6801 // BUILTIN_INFO(HEXAGON.V6_vroundhub,VI_ftype_VIVI,2) 6802 // tag : V6_vroundhub 6803 def int_hexagon_V6_vroundhub : 6804 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundhub">; 6805 6806 // 6807 // BUILTIN_INFO(HEXAGON.V6_vroundhub_128B,VI_ftype_VIVI,2) 6808 // tag : V6_vroundhub_128B 6809 def int_hexagon_V6_vroundhub_128B : 6810 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundhub_128B">; 6811 6812 // 6813 // BUILTIN_INFO(HEXAGON.V6_vaslw_acc,VI_ftype_VIVISI,3) 6814 // tag : V6_vaslw_acc 6815 def int_hexagon_V6_vaslw_acc : 6816 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vaslw_acc">; 6817 6818 // 6819 // BUILTIN_INFO(HEXAGON.V6_vaslw_acc_128B,VI_ftype_VIVISI,3) 6820 // tag : V6_vaslw_acc_128B 6821 def int_hexagon_V6_vaslw_acc_128B : 6822 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vaslw_acc_128B">; 6823 6824 // 6825 // BUILTIN_INFO(HEXAGON.V6_vasrw_acc,VI_ftype_VIVISI,3) 6826 // tag : V6_vasrw_acc 6827 def int_hexagon_V6_vasrw_acc : 6828 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrw_acc">; 6829 6830 // 6831 // BUILTIN_INFO(HEXAGON.V6_vasrw_acc_128B,VI_ftype_VIVISI,3) 6832 // tag : V6_vasrw_acc_128B 6833 def int_hexagon_V6_vasrw_acc_128B : 6834 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrw_acc_128B">; 6835 6836 // 6837 // BUILTIN_INFO(HEXAGON.V6_vaddb,VI_ftype_VIVI,2) 6838 // tag : V6_vaddb 6839 def int_hexagon_V6_vaddb : 6840 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddb">; 6841 6842 // 6843 // BUILTIN_INFO(HEXAGON.V6_vaddb_128B,VI_ftype_VIVI,2) 6844 // tag : V6_vaddb_128B 6845 def int_hexagon_V6_vaddb_128B : 6846 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddb_128B">; 6847 6848 // 6849 // BUILTIN_INFO(HEXAGON.V6_vsubb,VI_ftype_VIVI,2) 6850 // tag : V6_vsubb 6851 def int_hexagon_V6_vsubb : 6852 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubb">; 6853 6854 // 6855 // BUILTIN_INFO(HEXAGON.V6_vsubb_128B,VI_ftype_VIVI,2) 6856 // tag : V6_vsubb_128B 6857 def int_hexagon_V6_vsubb_128B : 6858 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubb_128B">; 6859 6860 // 6861 // BUILTIN_INFO(HEXAGON.V6_vaddb_dv,VD_ftype_VDVD,2) 6862 // tag : V6_vaddb_dv 6863 def int_hexagon_V6_vaddb_dv : 6864 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddb_dv">; 6865 6866 // 6867 // BUILTIN_INFO(HEXAGON.V6_vaddb_dv_128B,VD_ftype_VDVD,2) 6868 // tag : V6_vaddb_dv_128B 6869 def int_hexagon_V6_vaddb_dv_128B : 6870 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddb_dv_128B">; 6871 6872 // 6873 // BUILTIN_INFO(HEXAGON.V6_vsubb_dv,VD_ftype_VDVD,2) 6874 // tag : V6_vsubb_dv 6875 def int_hexagon_V6_vsubb_dv : 6876 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubb_dv">; 6877 6878 // 6879 // BUILTIN_INFO(HEXAGON.V6_vsubb_dv_128B,VD_ftype_VDVD,2) 6880 // tag : V6_vsubb_dv_128B 6881 def int_hexagon_V6_vsubb_dv_128B : 6882 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubb_dv_128B">; 6883 6884 // 6885 // BUILTIN_INFO(HEXAGON.V6_vaddh,VI_ftype_VIVI,2) 6886 // tag : V6_vaddh 6887 def int_hexagon_V6_vaddh : 6888 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddh">; 6889 6890 // 6891 // BUILTIN_INFO(HEXAGON.V6_vaddh_128B,VI_ftype_VIVI,2) 6892 // tag : V6_vaddh_128B 6893 def int_hexagon_V6_vaddh_128B : 6894 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddh_128B">; 6895 6896 // 6897 // BUILTIN_INFO(HEXAGON.V6_vsubh,VI_ftype_VIVI,2) 6898 // tag : V6_vsubh 6899 def int_hexagon_V6_vsubh : 6900 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubh">; 6901 6902 // 6903 // BUILTIN_INFO(HEXAGON.V6_vsubh_128B,VI_ftype_VIVI,2) 6904 // tag : V6_vsubh_128B 6905 def int_hexagon_V6_vsubh_128B : 6906 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubh_128B">; 6907 6908 // 6909 // BUILTIN_INFO(HEXAGON.V6_vaddh_dv,VD_ftype_VDVD,2) 6910 // tag : V6_vaddh_dv 6911 def int_hexagon_V6_vaddh_dv : 6912 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddh_dv">; 6913 6914 // 6915 // BUILTIN_INFO(HEXAGON.V6_vaddh_dv_128B,VD_ftype_VDVD,2) 6916 // tag : V6_vaddh_dv_128B 6917 def int_hexagon_V6_vaddh_dv_128B : 6918 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddh_dv_128B">; 6919 6920 // 6921 // BUILTIN_INFO(HEXAGON.V6_vsubh_dv,VD_ftype_VDVD,2) 6922 // tag : V6_vsubh_dv 6923 def int_hexagon_V6_vsubh_dv : 6924 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubh_dv">; 6925 6926 // 6927 // BUILTIN_INFO(HEXAGON.V6_vsubh_dv_128B,VD_ftype_VDVD,2) 6928 // tag : V6_vsubh_dv_128B 6929 def int_hexagon_V6_vsubh_dv_128B : 6930 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubh_dv_128B">; 6931 6932 // 6933 // BUILTIN_INFO(HEXAGON.V6_vaddw,VI_ftype_VIVI,2) 6934 // tag : V6_vaddw 6935 def int_hexagon_V6_vaddw : 6936 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddw">; 6937 6938 // 6939 // BUILTIN_INFO(HEXAGON.V6_vaddw_128B,VI_ftype_VIVI,2) 6940 // tag : V6_vaddw_128B 6941 def int_hexagon_V6_vaddw_128B : 6942 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddw_128B">; 6943 6944 // 6945 // BUILTIN_INFO(HEXAGON.V6_vsubw,VI_ftype_VIVI,2) 6946 // tag : V6_vsubw 6947 def int_hexagon_V6_vsubw : 6948 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubw">; 6949 6950 // 6951 // BUILTIN_INFO(HEXAGON.V6_vsubw_128B,VI_ftype_VIVI,2) 6952 // tag : V6_vsubw_128B 6953 def int_hexagon_V6_vsubw_128B : 6954 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubw_128B">; 6955 6956 // 6957 // BUILTIN_INFO(HEXAGON.V6_vaddw_dv,VD_ftype_VDVD,2) 6958 // tag : V6_vaddw_dv 6959 def int_hexagon_V6_vaddw_dv : 6960 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddw_dv">; 6961 6962 // 6963 // BUILTIN_INFO(HEXAGON.V6_vaddw_dv_128B,VD_ftype_VDVD,2) 6964 // tag : V6_vaddw_dv_128B 6965 def int_hexagon_V6_vaddw_dv_128B : 6966 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddw_dv_128B">; 6967 6968 // 6969 // BUILTIN_INFO(HEXAGON.V6_vsubw_dv,VD_ftype_VDVD,2) 6970 // tag : V6_vsubw_dv 6971 def int_hexagon_V6_vsubw_dv : 6972 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubw_dv">; 6973 6974 // 6975 // BUILTIN_INFO(HEXAGON.V6_vsubw_dv_128B,VD_ftype_VDVD,2) 6976 // tag : V6_vsubw_dv_128B 6977 def int_hexagon_V6_vsubw_dv_128B : 6978 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubw_dv_128B">; 6979 6980 // 6981 // BUILTIN_INFO(HEXAGON.V6_vaddubsat,VI_ftype_VIVI,2) 6982 // tag : V6_vaddubsat 6983 def int_hexagon_V6_vaddubsat : 6984 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddubsat">; 6985 6986 // 6987 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_128B,VI_ftype_VIVI,2) 6988 // tag : V6_vaddubsat_128B 6989 def int_hexagon_V6_vaddubsat_128B : 6990 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddubsat_128B">; 6991 6992 // 6993 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_dv,VD_ftype_VDVD,2) 6994 // tag : V6_vaddubsat_dv 6995 def int_hexagon_V6_vaddubsat_dv : 6996 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddubsat_dv">; 6997 6998 // 6999 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_dv_128B,VD_ftype_VDVD,2) 7000 // tag : V6_vaddubsat_dv_128B 7001 def int_hexagon_V6_vaddubsat_dv_128B : 7002 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddubsat_dv_128B">; 7003 7004 // 7005 // BUILTIN_INFO(HEXAGON.V6_vsububsat,VI_ftype_VIVI,2) 7006 // tag : V6_vsububsat 7007 def int_hexagon_V6_vsububsat : 7008 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsububsat">; 7009 7010 // 7011 // BUILTIN_INFO(HEXAGON.V6_vsububsat_128B,VI_ftype_VIVI,2) 7012 // tag : V6_vsububsat_128B 7013 def int_hexagon_V6_vsububsat_128B : 7014 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsububsat_128B">; 7015 7016 // 7017 // BUILTIN_INFO(HEXAGON.V6_vsububsat_dv,VD_ftype_VDVD,2) 7018 // tag : V6_vsububsat_dv 7019 def int_hexagon_V6_vsububsat_dv : 7020 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsububsat_dv">; 7021 7022 // 7023 // BUILTIN_INFO(HEXAGON.V6_vsububsat_dv_128B,VD_ftype_VDVD,2) 7024 // tag : V6_vsububsat_dv_128B 7025 def int_hexagon_V6_vsububsat_dv_128B : 7026 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsububsat_dv_128B">; 7027 7028 // 7029 // BUILTIN_INFO(HEXAGON.V6_vadduhsat,VI_ftype_VIVI,2) 7030 // tag : V6_vadduhsat 7031 def int_hexagon_V6_vadduhsat : 7032 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vadduhsat">; 7033 7034 // 7035 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_128B,VI_ftype_VIVI,2) 7036 // tag : V6_vadduhsat_128B 7037 def int_hexagon_V6_vadduhsat_128B : 7038 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduhsat_128B">; 7039 7040 // 7041 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_dv,VD_ftype_VDVD,2) 7042 // tag : V6_vadduhsat_dv 7043 def int_hexagon_V6_vadduhsat_dv : 7044 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduhsat_dv">; 7045 7046 // 7047 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_dv_128B,VD_ftype_VDVD,2) 7048 // tag : V6_vadduhsat_dv_128B 7049 def int_hexagon_V6_vadduhsat_dv_128B : 7050 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vadduhsat_dv_128B">; 7051 7052 // 7053 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat,VI_ftype_VIVI,2) 7054 // tag : V6_vsubuhsat 7055 def int_hexagon_V6_vsubuhsat : 7056 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubuhsat">; 7057 7058 // 7059 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_128B,VI_ftype_VIVI,2) 7060 // tag : V6_vsubuhsat_128B 7061 def int_hexagon_V6_vsubuhsat_128B : 7062 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhsat_128B">; 7063 7064 // 7065 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_dv,VD_ftype_VDVD,2) 7066 // tag : V6_vsubuhsat_dv 7067 def int_hexagon_V6_vsubuhsat_dv : 7068 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhsat_dv">; 7069 7070 // 7071 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_dv_128B,VD_ftype_VDVD,2) 7072 // tag : V6_vsubuhsat_dv_128B 7073 def int_hexagon_V6_vsubuhsat_dv_128B : 7074 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubuhsat_dv_128B">; 7075 7076 // 7077 // BUILTIN_INFO(HEXAGON.V6_vaddhsat,VI_ftype_VIVI,2) 7078 // tag : V6_vaddhsat 7079 def int_hexagon_V6_vaddhsat : 7080 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddhsat">; 7081 7082 // 7083 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_128B,VI_ftype_VIVI,2) 7084 // tag : V6_vaddhsat_128B 7085 def int_hexagon_V6_vaddhsat_128B : 7086 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddhsat_128B">; 7087 7088 // 7089 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_dv,VD_ftype_VDVD,2) 7090 // tag : V6_vaddhsat_dv 7091 def int_hexagon_V6_vaddhsat_dv : 7092 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddhsat_dv">; 7093 7094 // 7095 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_dv_128B,VD_ftype_VDVD,2) 7096 // tag : V6_vaddhsat_dv_128B 7097 def int_hexagon_V6_vaddhsat_dv_128B : 7098 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddhsat_dv_128B">; 7099 7100 // 7101 // BUILTIN_INFO(HEXAGON.V6_vsubhsat,VI_ftype_VIVI,2) 7102 // tag : V6_vsubhsat 7103 def int_hexagon_V6_vsubhsat : 7104 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubhsat">; 7105 7106 // 7107 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_128B,VI_ftype_VIVI,2) 7108 // tag : V6_vsubhsat_128B 7109 def int_hexagon_V6_vsubhsat_128B : 7110 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubhsat_128B">; 7111 7112 // 7113 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_dv,VD_ftype_VDVD,2) 7114 // tag : V6_vsubhsat_dv 7115 def int_hexagon_V6_vsubhsat_dv : 7116 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubhsat_dv">; 7117 7118 // 7119 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_dv_128B,VD_ftype_VDVD,2) 7120 // tag : V6_vsubhsat_dv_128B 7121 def int_hexagon_V6_vsubhsat_dv_128B : 7122 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubhsat_dv_128B">; 7123 7124 // 7125 // BUILTIN_INFO(HEXAGON.V6_vaddwsat,VI_ftype_VIVI,2) 7126 // tag : V6_vaddwsat 7127 def int_hexagon_V6_vaddwsat : 7128 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddwsat">; 7129 7130 // 7131 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_128B,VI_ftype_VIVI,2) 7132 // tag : V6_vaddwsat_128B 7133 def int_hexagon_V6_vaddwsat_128B : 7134 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddwsat_128B">; 7135 7136 // 7137 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_dv,VD_ftype_VDVD,2) 7138 // tag : V6_vaddwsat_dv 7139 def int_hexagon_V6_vaddwsat_dv : 7140 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddwsat_dv">; 7141 7142 // 7143 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_dv_128B,VD_ftype_VDVD,2) 7144 // tag : V6_vaddwsat_dv_128B 7145 def int_hexagon_V6_vaddwsat_dv_128B : 7146 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddwsat_dv_128B">; 7147 7148 // 7149 // BUILTIN_INFO(HEXAGON.V6_vsubwsat,VI_ftype_VIVI,2) 7150 // tag : V6_vsubwsat 7151 def int_hexagon_V6_vsubwsat : 7152 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubwsat">; 7153 7154 // 7155 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_128B,VI_ftype_VIVI,2) 7156 // tag : V6_vsubwsat_128B 7157 def int_hexagon_V6_vsubwsat_128B : 7158 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubwsat_128B">; 7159 7160 // 7161 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_dv,VD_ftype_VDVD,2) 7162 // tag : V6_vsubwsat_dv 7163 def int_hexagon_V6_vsubwsat_dv : 7164 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubwsat_dv">; 7165 7166 // 7167 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_dv_128B,VD_ftype_VDVD,2) 7168 // tag : V6_vsubwsat_dv_128B 7169 def int_hexagon_V6_vsubwsat_dv_128B : 7170 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubwsat_dv_128B">; 7171 7172 // 7173 // BUILTIN_INFO(HEXAGON.V6_vavgub,VI_ftype_VIVI,2) 7174 // tag : V6_vavgub 7175 def int_hexagon_V6_vavgub : 7176 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgub">; 7177 7178 // 7179 // BUILTIN_INFO(HEXAGON.V6_vavgub_128B,VI_ftype_VIVI,2) 7180 // tag : V6_vavgub_128B 7181 def int_hexagon_V6_vavgub_128B : 7182 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgub_128B">; 7183 7184 // 7185 // BUILTIN_INFO(HEXAGON.V6_vavgubrnd,VI_ftype_VIVI,2) 7186 // tag : V6_vavgubrnd 7187 def int_hexagon_V6_vavgubrnd : 7188 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgubrnd">; 7189 7190 // 7191 // BUILTIN_INFO(HEXAGON.V6_vavgubrnd_128B,VI_ftype_VIVI,2) 7192 // tag : V6_vavgubrnd_128B 7193 def int_hexagon_V6_vavgubrnd_128B : 7194 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgubrnd_128B">; 7195 7196 // 7197 // BUILTIN_INFO(HEXAGON.V6_vavguh,VI_ftype_VIVI,2) 7198 // tag : V6_vavguh 7199 def int_hexagon_V6_vavguh : 7200 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavguh">; 7201 7202 // 7203 // BUILTIN_INFO(HEXAGON.V6_vavguh_128B,VI_ftype_VIVI,2) 7204 // tag : V6_vavguh_128B 7205 def int_hexagon_V6_vavguh_128B : 7206 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavguh_128B">; 7207 7208 // 7209 // BUILTIN_INFO(HEXAGON.V6_vavguhrnd,VI_ftype_VIVI,2) 7210 // tag : V6_vavguhrnd 7211 def int_hexagon_V6_vavguhrnd : 7212 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavguhrnd">; 7213 7214 // 7215 // BUILTIN_INFO(HEXAGON.V6_vavguhrnd_128B,VI_ftype_VIVI,2) 7216 // tag : V6_vavguhrnd_128B 7217 def int_hexagon_V6_vavguhrnd_128B : 7218 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavguhrnd_128B">; 7219 7220 // 7221 // BUILTIN_INFO(HEXAGON.V6_vavgh,VI_ftype_VIVI,2) 7222 // tag : V6_vavgh 7223 def int_hexagon_V6_vavgh : 7224 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgh">; 7225 7226 // 7227 // BUILTIN_INFO(HEXAGON.V6_vavgh_128B,VI_ftype_VIVI,2) 7228 // tag : V6_vavgh_128B 7229 def int_hexagon_V6_vavgh_128B : 7230 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgh_128B">; 7231 7232 // 7233 // BUILTIN_INFO(HEXAGON.V6_vavghrnd,VI_ftype_VIVI,2) 7234 // tag : V6_vavghrnd 7235 def int_hexagon_V6_vavghrnd : 7236 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavghrnd">; 7237 7238 // 7239 // BUILTIN_INFO(HEXAGON.V6_vavghrnd_128B,VI_ftype_VIVI,2) 7240 // tag : V6_vavghrnd_128B 7241 def int_hexagon_V6_vavghrnd_128B : 7242 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavghrnd_128B">; 7243 7244 // 7245 // BUILTIN_INFO(HEXAGON.V6_vnavgh,VI_ftype_VIVI,2) 7246 // tag : V6_vnavgh 7247 def int_hexagon_V6_vnavgh : 7248 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgh">; 7249 7250 // 7251 // BUILTIN_INFO(HEXAGON.V6_vnavgh_128B,VI_ftype_VIVI,2) 7252 // tag : V6_vnavgh_128B 7253 def int_hexagon_V6_vnavgh_128B : 7254 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgh_128B">; 7255 7256 // 7257 // BUILTIN_INFO(HEXAGON.V6_vavgw,VI_ftype_VIVI,2) 7258 // tag : V6_vavgw 7259 def int_hexagon_V6_vavgw : 7260 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgw">; 7261 7262 // 7263 // BUILTIN_INFO(HEXAGON.V6_vavgw_128B,VI_ftype_VIVI,2) 7264 // tag : V6_vavgw_128B 7265 def int_hexagon_V6_vavgw_128B : 7266 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgw_128B">; 7267 7268 // 7269 // BUILTIN_INFO(HEXAGON.V6_vavgwrnd,VI_ftype_VIVI,2) 7270 // tag : V6_vavgwrnd 7271 def int_hexagon_V6_vavgwrnd : 7272 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgwrnd">; 7273 7274 // 7275 // BUILTIN_INFO(HEXAGON.V6_vavgwrnd_128B,VI_ftype_VIVI,2) 7276 // tag : V6_vavgwrnd_128B 7277 def int_hexagon_V6_vavgwrnd_128B : 7278 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgwrnd_128B">; 7279 7280 // 7281 // BUILTIN_INFO(HEXAGON.V6_vnavgw,VI_ftype_VIVI,2) 7282 // tag : V6_vnavgw 7283 def int_hexagon_V6_vnavgw : 7284 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgw">; 7285 7286 // 7287 // BUILTIN_INFO(HEXAGON.V6_vnavgw_128B,VI_ftype_VIVI,2) 7288 // tag : V6_vnavgw_128B 7289 def int_hexagon_V6_vnavgw_128B : 7290 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgw_128B">; 7291 7292 // 7293 // BUILTIN_INFO(HEXAGON.V6_vabsdiffub,VI_ftype_VIVI,2) 7294 // tag : V6_vabsdiffub 7295 def int_hexagon_V6_vabsdiffub : 7296 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffub">; 7297 7298 // 7299 // BUILTIN_INFO(HEXAGON.V6_vabsdiffub_128B,VI_ftype_VIVI,2) 7300 // tag : V6_vabsdiffub_128B 7301 def int_hexagon_V6_vabsdiffub_128B : 7302 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffub_128B">; 7303 7304 // 7305 // BUILTIN_INFO(HEXAGON.V6_vabsdiffuh,VI_ftype_VIVI,2) 7306 // tag : V6_vabsdiffuh 7307 def int_hexagon_V6_vabsdiffuh : 7308 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffuh">; 7309 7310 // 7311 // BUILTIN_INFO(HEXAGON.V6_vabsdiffuh_128B,VI_ftype_VIVI,2) 7312 // tag : V6_vabsdiffuh_128B 7313 def int_hexagon_V6_vabsdiffuh_128B : 7314 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffuh_128B">; 7315 7316 // 7317 // BUILTIN_INFO(HEXAGON.V6_vabsdiffh,VI_ftype_VIVI,2) 7318 // tag : V6_vabsdiffh 7319 def int_hexagon_V6_vabsdiffh : 7320 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffh">; 7321 7322 // 7323 // BUILTIN_INFO(HEXAGON.V6_vabsdiffh_128B,VI_ftype_VIVI,2) 7324 // tag : V6_vabsdiffh_128B 7325 def int_hexagon_V6_vabsdiffh_128B : 7326 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffh_128B">; 7327 7328 // 7329 // BUILTIN_INFO(HEXAGON.V6_vabsdiffw,VI_ftype_VIVI,2) 7330 // tag : V6_vabsdiffw 7331 def int_hexagon_V6_vabsdiffw : 7332 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffw">; 7333 7334 // 7335 // BUILTIN_INFO(HEXAGON.V6_vabsdiffw_128B,VI_ftype_VIVI,2) 7336 // tag : V6_vabsdiffw_128B 7337 def int_hexagon_V6_vabsdiffw_128B : 7338 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffw_128B">; 7339 7340 // 7341 // BUILTIN_INFO(HEXAGON.V6_vnavgub,VI_ftype_VIVI,2) 7342 // tag : V6_vnavgub 7343 def int_hexagon_V6_vnavgub : 7344 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgub">; 7345 7346 // 7347 // BUILTIN_INFO(HEXAGON.V6_vnavgub_128B,VI_ftype_VIVI,2) 7348 // tag : V6_vnavgub_128B 7349 def int_hexagon_V6_vnavgub_128B : 7350 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgub_128B">; 7351 7352 // 7353 // BUILTIN_INFO(HEXAGON.V6_vaddubh,VD_ftype_VIVI,2) 7354 // tag : V6_vaddubh 7355 def int_hexagon_V6_vaddubh : 7356 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vaddubh">; 7357 7358 // 7359 // BUILTIN_INFO(HEXAGON.V6_vaddubh_128B,VD_ftype_VIVI,2) 7360 // tag : V6_vaddubh_128B 7361 def int_hexagon_V6_vaddubh_128B : 7362 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddubh_128B">; 7363 7364 // 7365 // BUILTIN_INFO(HEXAGON.V6_vsububh,VD_ftype_VIVI,2) 7366 // tag : V6_vsububh 7367 def int_hexagon_V6_vsububh : 7368 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsububh">; 7369 7370 // 7371 // BUILTIN_INFO(HEXAGON.V6_vsububh_128B,VD_ftype_VIVI,2) 7372 // tag : V6_vsububh_128B 7373 def int_hexagon_V6_vsububh_128B : 7374 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsububh_128B">; 7375 7376 // 7377 // BUILTIN_INFO(HEXAGON.V6_vaddhw,VD_ftype_VIVI,2) 7378 // tag : V6_vaddhw 7379 def int_hexagon_V6_vaddhw : 7380 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vaddhw">; 7381 7382 // 7383 // BUILTIN_INFO(HEXAGON.V6_vaddhw_128B,VD_ftype_VIVI,2) 7384 // tag : V6_vaddhw_128B 7385 def int_hexagon_V6_vaddhw_128B : 7386 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddhw_128B">; 7387 7388 // 7389 // BUILTIN_INFO(HEXAGON.V6_vsubhw,VD_ftype_VIVI,2) 7390 // tag : V6_vsubhw 7391 def int_hexagon_V6_vsubhw : 7392 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsubhw">; 7393 7394 // 7395 // BUILTIN_INFO(HEXAGON.V6_vsubhw_128B,VD_ftype_VIVI,2) 7396 // tag : V6_vsubhw_128B 7397 def int_hexagon_V6_vsubhw_128B : 7398 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsubhw_128B">; 7399 7400 // 7401 // BUILTIN_INFO(HEXAGON.V6_vadduhw,VD_ftype_VIVI,2) 7402 // tag : V6_vadduhw 7403 def int_hexagon_V6_vadduhw : 7404 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vadduhw">; 7405 7406 // 7407 // BUILTIN_INFO(HEXAGON.V6_vadduhw_128B,VD_ftype_VIVI,2) 7408 // tag : V6_vadduhw_128B 7409 def int_hexagon_V6_vadduhw_128B : 7410 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vadduhw_128B">; 7411 7412 // 7413 // BUILTIN_INFO(HEXAGON.V6_vsubuhw,VD_ftype_VIVI,2) 7414 // tag : V6_vsubuhw 7415 def int_hexagon_V6_vsubuhw : 7416 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsubuhw">; 7417 7418 // 7419 // BUILTIN_INFO(HEXAGON.V6_vsubuhw_128B,VD_ftype_VIVI,2) 7420 // tag : V6_vsubuhw_128B 7421 def int_hexagon_V6_vsubuhw_128B : 7422 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhw_128B">; 7423 7424 // 7425 // BUILTIN_INFO(HEXAGON.V6_vd0,VI_ftype_,0) 7426 // tag : V6_vd0 7427 def int_hexagon_V6_vd0 : 7428 Hexagon_v512_Intrinsic<"HEXAGON_V6_vd0">; 7429 7430 // 7431 // BUILTIN_INFO(HEXAGON.V6_vd0_128B,VI_ftype_,0) 7432 // tag : V6_vd0_128B 7433 def int_hexagon_V6_vd0_128B : 7434 Hexagon_v1024_Intrinsic<"HEXAGON_V6_vd0_128B">; 7435 7436 // 7437 // BUILTIN_INFO(HEXAGON.V6_vaddbq,VI_ftype_QVVIVI,3) 7438 // tag : V6_vaddbq 7439 def int_hexagon_V6_vaddbq : 7440 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddbq">; 7441 7442 // 7443 // BUILTIN_INFO(HEXAGON.V6_vaddbq_128B,VI_ftype_QVVIVI,3) 7444 // tag : V6_vaddbq_128B 7445 def int_hexagon_V6_vaddbq_128B : 7446 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddbq_128B">; 7447 7448 7449 // 7450 // BUILTIN_INFO(HEXAGON.V6_vsubbq,VI_ftype_QVVIVI,3) 7451 // tag : V6_vsubbq 7452 def int_hexagon_V6_vsubbq : 7453 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubbq">; 7454 7455 // 7456 // BUILTIN_INFO(HEXAGON.V6_vsubbq_128B,VI_ftype_QVVIVI,3) 7457 // tag : V6_vsubbq_128B 7458 def int_hexagon_V6_vsubbq_128B : 7459 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubbq_128B">; 7460 7461 // 7462 // BUILTIN_INFO(HEXAGON.V6_vaddbnq,VI_ftype_QVVIVI,3) 7463 // tag : V6_vaddbnq 7464 def int_hexagon_V6_vaddbnq : 7465 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddbnq">; 7466 7467 // 7468 // BUILTIN_INFO(HEXAGON.V6_vaddbnq_128B,VI_ftype_QVVIVI,3) 7469 // tag : V6_vaddbnq_128B 7470 def int_hexagon_V6_vaddbnq_128B : 7471 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddbnq_128B">; 7472 7473 // 7474 // BUILTIN_INFO(HEXAGON.V6_vsubbnq,VI_ftype_QVVIVI,3) 7475 // tag : V6_vsubbnq 7476 def int_hexagon_V6_vsubbnq : 7477 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubbnq">; 7478 7479 // 7480 // BUILTIN_INFO(HEXAGON.V6_vsubbnq_128B,VI_ftype_QVVIVI,3) 7481 // tag : V6_vsubbnq_128B 7482 def int_hexagon_V6_vsubbnq_128B : 7483 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubbnq_128B">; 7484 7485 // 7486 // BUILTIN_INFO(HEXAGON.V6_vaddhq,VI_ftype_QVVIVI,3) 7487 // tag : V6_vaddhq 7488 def int_hexagon_V6_vaddhq : 7489 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddhq">; 7490 7491 // 7492 // BUILTIN_INFO(HEXAGON.V6_vaddhq_128B,VI_ftype_QVVIVI,3) 7493 // tag : V6_vaddhq_128B 7494 def int_hexagon_V6_vaddhq_128B : 7495 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddhq_128B">; 7496 7497 // 7498 // BUILTIN_INFO(HEXAGON.V6_vsubhq,VI_ftype_QVVIVI,3) 7499 // tag : V6_vsubhq 7500 def int_hexagon_V6_vsubhq : 7501 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubhq">; 7502 7503 // 7504 // BUILTIN_INFO(HEXAGON.V6_vsubhq_128B,VI_ftype_QVVIVI,3) 7505 // tag : V6_vsubhq_128B 7506 def int_hexagon_V6_vsubhq_128B : 7507 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubhq_128B">; 7508 7509 // 7510 // BUILTIN_INFO(HEXAGON.V6_vaddhnq,VI_ftype_QVVIVI,3) 7511 // tag : V6_vaddhnq 7512 def int_hexagon_V6_vaddhnq : 7513 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddhnq">; 7514 7515 // 7516 // BUILTIN_INFO(HEXAGON.V6_vaddhnq_128B,VI_ftype_QVVIVI,3) 7517 // tag : V6_vaddhnq_128B 7518 def int_hexagon_V6_vaddhnq_128B : 7519 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddhnq_128B">; 7520 7521 // 7522 // BUILTIN_INFO(HEXAGON.V6_vsubhnq,VI_ftype_QVVIVI,3) 7523 // tag : V6_vsubhnq 7524 def int_hexagon_V6_vsubhnq : 7525 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubhnq">; 7526 7527 // 7528 // BUILTIN_INFO(HEXAGON.V6_vsubhnq_128B,VI_ftype_QVVIVI,3) 7529 // tag : V6_vsubhnq_128B 7530 def int_hexagon_V6_vsubhnq_128B : 7531 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubhnq_128B">; 7532 7533 // 7534 // BUILTIN_INFO(HEXAGON.V6_vaddwq,VI_ftype_QVVIVI,3) 7535 // tag : V6_vaddwq 7536 def int_hexagon_V6_vaddwq : 7537 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddwq">; 7538 7539 // 7540 // BUILTIN_INFO(HEXAGON.V6_vaddwq_128B,VI_ftype_QVVIVI,3) 7541 // tag : V6_vaddwq_128B 7542 def int_hexagon_V6_vaddwq_128B : 7543 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddwq_128B">; 7544 7545 // 7546 // BUILTIN_INFO(HEXAGON.V6_vsubwq,VI_ftype_QVVIVI,3) 7547 // tag : V6_vsubwq 7548 def int_hexagon_V6_vsubwq : 7549 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubwq">; 7550 7551 // 7552 // BUILTIN_INFO(HEXAGON.V6_vsubwq_128B,VI_ftype_QVVIVI,3) 7553 // tag : V6_vsubwq_128B 7554 def int_hexagon_V6_vsubwq_128B : 7555 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubwq_128B">; 7556 7557 // 7558 // BUILTIN_INFO(HEXAGON.V6_vaddwnq,VI_ftype_QVVIVI,3) 7559 // tag : V6_vaddwnq 7560 def int_hexagon_V6_vaddwnq : 7561 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddwnq">; 7562 7563 // 7564 // BUILTIN_INFO(HEXAGON.V6_vaddwnq_128B,VI_ftype_QVVIVI,3) 7565 // tag : V6_vaddwnq_128B 7566 def int_hexagon_V6_vaddwnq_128B : 7567 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddwnq_128B">; 7568 7569 // 7570 // BUILTIN_INFO(HEXAGON.V6_vsubwnq,VI_ftype_QVVIVI,3) 7571 // tag : V6_vsubwnq 7572 def int_hexagon_V6_vsubwnq : 7573 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubwnq">; 7574 7575 // 7576 // BUILTIN_INFO(HEXAGON.V6_vsubwnq_128B,VI_ftype_QVVIVI,3) 7577 // tag : V6_vsubwnq_128B 7578 def int_hexagon_V6_vsubwnq_128B : 7579 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubwnq_128B">; 7580 7581 // 7582 // BUILTIN_INFO(HEXAGON.V6_vabsh,VI_ftype_VI,1) 7583 // tag : V6_vabsh 7584 def int_hexagon_V6_vabsh : 7585 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsh">; 7586 7587 // 7588 // BUILTIN_INFO(HEXAGON.V6_vabsh_128B,VI_ftype_VI,1) 7589 // tag : V6_vabsh_128B 7590 def int_hexagon_V6_vabsh_128B : 7591 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsh_128B">; 7592 7593 // 7594 // BUILTIN_INFO(HEXAGON.V6_vabsh_sat,VI_ftype_VI,1) 7595 // tag : V6_vabsh_sat 7596 def int_hexagon_V6_vabsh_sat : 7597 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsh_sat">; 7598 7599 // 7600 // BUILTIN_INFO(HEXAGON.V6_vabsh_sat_128B,VI_ftype_VI,1) 7601 // tag : V6_vabsh_sat_128B 7602 def int_hexagon_V6_vabsh_sat_128B : 7603 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsh_sat_128B">; 7604 7605 // 7606 // BUILTIN_INFO(HEXAGON.V6_vabsw,VI_ftype_VI,1) 7607 // tag : V6_vabsw 7608 def int_hexagon_V6_vabsw : 7609 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsw">; 7610 7611 // 7612 // BUILTIN_INFO(HEXAGON.V6_vabsw_128B,VI_ftype_VI,1) 7613 // tag : V6_vabsw_128B 7614 def int_hexagon_V6_vabsw_128B : 7615 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsw_128B">; 7616 7617 // 7618 // BUILTIN_INFO(HEXAGON.V6_vabsw_sat,VI_ftype_VI,1) 7619 // tag : V6_vabsw_sat 7620 def int_hexagon_V6_vabsw_sat : 7621 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsw_sat">; 7622 7623 // 7624 // BUILTIN_INFO(HEXAGON.V6_vabsw_sat_128B,VI_ftype_VI,1) 7625 // tag : V6_vabsw_sat_128B 7626 def int_hexagon_V6_vabsw_sat_128B : 7627 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsw_sat_128B">; 7628 7629 // 7630 // BUILTIN_INFO(HEXAGON.V6_vmpybv,VD_ftype_VIVI,2) 7631 // tag : V6_vmpybv 7632 def int_hexagon_V6_vmpybv : 7633 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybv">; 7634 7635 // 7636 // BUILTIN_INFO(HEXAGON.V6_vmpybv_128B,VD_ftype_VIVI,2) 7637 // tag : V6_vmpybv_128B 7638 def int_hexagon_V6_vmpybv_128B : 7639 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybv_128B">; 7640 7641 // 7642 // BUILTIN_INFO(HEXAGON.V6_vmpybv_acc,VD_ftype_VDVIVI,3) 7643 // tag : V6_vmpybv_acc 7644 def int_hexagon_V6_vmpybv_acc : 7645 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybv_acc">; 7646 7647 // 7648 // BUILTIN_INFO(HEXAGON.V6_vmpybv_acc_128B,VD_ftype_VDVIVI,3) 7649 // tag : V6_vmpybv_acc_128B 7650 def int_hexagon_V6_vmpybv_acc_128B : 7651 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybv_acc_128B">; 7652 7653 // 7654 // BUILTIN_INFO(HEXAGON.V6_vmpyubv,VD_ftype_VIVI,2) 7655 // tag : V6_vmpyubv 7656 def int_hexagon_V6_vmpyubv : 7657 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyubv">; 7658 7659 // 7660 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_128B,VD_ftype_VIVI,2) 7661 // tag : V6_vmpyubv_128B 7662 def int_hexagon_V6_vmpyubv_128B : 7663 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyubv_128B">; 7664 7665 // 7666 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_acc,VD_ftype_VDVIVI,3) 7667 // tag : V6_vmpyubv_acc 7668 def int_hexagon_V6_vmpyubv_acc : 7669 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyubv_acc">; 7670 7671 // 7672 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_acc_128B,VD_ftype_VDVIVI,3) 7673 // tag : V6_vmpyubv_acc_128B 7674 def int_hexagon_V6_vmpyubv_acc_128B : 7675 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyubv_acc_128B">; 7676 7677 // 7678 // BUILTIN_INFO(HEXAGON.V6_vmpybusv,VD_ftype_VIVI,2) 7679 // tag : V6_vmpybusv 7680 def int_hexagon_V6_vmpybusv : 7681 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybusv">; 7682 7683 // 7684 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_128B,VD_ftype_VIVI,2) 7685 // tag : V6_vmpybusv_128B 7686 def int_hexagon_V6_vmpybusv_128B : 7687 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybusv_128B">; 7688 7689 // 7690 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_acc,VD_ftype_VDVIVI,3) 7691 // tag : V6_vmpybusv_acc 7692 def int_hexagon_V6_vmpybusv_acc : 7693 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybusv_acc">; 7694 7695 // 7696 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_acc_128B,VD_ftype_VDVIVI,3) 7697 // tag : V6_vmpybusv_acc_128B 7698 def int_hexagon_V6_vmpybusv_acc_128B : 7699 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybusv_acc_128B">; 7700 7701 // 7702 // BUILTIN_INFO(HEXAGON.V6_vmpabusv,VD_ftype_VDVD,2) 7703 // tag : V6_vmpabusv 7704 def int_hexagon_V6_vmpabusv : 7705 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpabusv">; 7706 7707 // 7708 // BUILTIN_INFO(HEXAGON.V6_vmpabusv_128B,VD_ftype_VDVD,2) 7709 // tag : V6_vmpabusv_128B 7710 def int_hexagon_V6_vmpabusv_128B : 7711 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vmpabusv_128B">; 7712 7713 // 7714 // BUILTIN_INFO(HEXAGON.V6_vmpabuuv,VD_ftype_VDVD,2) 7715 // tag : V6_vmpabuuv 7716 def int_hexagon_V6_vmpabuuv : 7717 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpabuuv">; 7718 7719 // 7720 // BUILTIN_INFO(HEXAGON.V6_vmpabuuv_128B,VD_ftype_VDVD,2) 7721 // tag : V6_vmpabuuv_128B 7722 def int_hexagon_V6_vmpabuuv_128B : 7723 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vmpabuuv_128B">; 7724 7725 // 7726 // BUILTIN_INFO(HEXAGON.V6_vmpyhv,VD_ftype_VIVI,2) 7727 // tag : V6_vmpyhv 7728 def int_hexagon_V6_vmpyhv : 7729 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhv">; 7730 7731 // 7732 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_128B,VD_ftype_VIVI,2) 7733 // tag : V6_vmpyhv_128B 7734 def int_hexagon_V6_vmpyhv_128B : 7735 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhv_128B">; 7736 7737 // 7738 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_acc,VD_ftype_VDVIVI,3) 7739 // tag : V6_vmpyhv_acc 7740 def int_hexagon_V6_vmpyhv_acc : 7741 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhv_acc">; 7742 7743 // 7744 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_acc_128B,VD_ftype_VDVIVI,3) 7745 // tag : V6_vmpyhv_acc_128B 7746 def int_hexagon_V6_vmpyhv_acc_128B : 7747 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhv_acc_128B">; 7748 7749 // 7750 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv,VD_ftype_VIVI,2) 7751 // tag : V6_vmpyuhv 7752 def int_hexagon_V6_vmpyuhv : 7753 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyuhv">; 7754 7755 // 7756 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_128B,VD_ftype_VIVI,2) 7757 // tag : V6_vmpyuhv_128B 7758 def int_hexagon_V6_vmpyuhv_128B : 7759 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyuhv_128B">; 7760 7761 // 7762 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_acc,VD_ftype_VDVIVI,3) 7763 // tag : V6_vmpyuhv_acc 7764 def int_hexagon_V6_vmpyuhv_acc : 7765 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyuhv_acc">; 7766 7767 // 7768 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_acc_128B,VD_ftype_VDVIVI,3) 7769 // tag : V6_vmpyuhv_acc_128B 7770 def int_hexagon_V6_vmpyuhv_acc_128B : 7771 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyuhv_acc_128B">; 7772 7773 // 7774 // BUILTIN_INFO(HEXAGON.V6_vmpyhvsrs,VI_ftype_VIVI,2) 7775 // tag : V6_vmpyhvsrs 7776 def int_hexagon_V6_vmpyhvsrs : 7777 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyhvsrs">; 7778 7779 // 7780 // BUILTIN_INFO(HEXAGON.V6_vmpyhvsrs_128B,VI_ftype_VIVI,2) 7781 // tag : V6_vmpyhvsrs_128B 7782 def int_hexagon_V6_vmpyhvsrs_128B : 7783 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhvsrs_128B">; 7784 7785 // 7786 // BUILTIN_INFO(HEXAGON.V6_vmpyhus,VD_ftype_VIVI,2) 7787 // tag : V6_vmpyhus 7788 def int_hexagon_V6_vmpyhus : 7789 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhus">; 7790 7791 // 7792 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_128B,VD_ftype_VIVI,2) 7793 // tag : V6_vmpyhus_128B 7794 def int_hexagon_V6_vmpyhus_128B : 7795 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhus_128B">; 7796 7797 // 7798 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_acc,VD_ftype_VDVIVI,3) 7799 // tag : V6_vmpyhus_acc 7800 def int_hexagon_V6_vmpyhus_acc : 7801 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhus_acc">; 7802 7803 // 7804 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_acc_128B,VD_ftype_VDVIVI,3) 7805 // tag : V6_vmpyhus_acc_128B 7806 def int_hexagon_V6_vmpyhus_acc_128B : 7807 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhus_acc_128B">; 7808 7809 // 7810 // BUILTIN_INFO(HEXAGON.V6_vmpyih,VI_ftype_VIVI,2) 7811 // tag : V6_vmpyih 7812 def int_hexagon_V6_vmpyih : 7813 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyih">; 7814 7815 // 7816 // BUILTIN_INFO(HEXAGON.V6_vmpyih_128B,VI_ftype_VIVI,2) 7817 // tag : V6_vmpyih_128B 7818 def int_hexagon_V6_vmpyih_128B : 7819 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyih_128B">; 7820 7821 // 7822 // BUILTIN_INFO(HEXAGON.V6_vmpyih_acc,VI_ftype_VIVIVI,3) 7823 // tag : V6_vmpyih_acc 7824 def int_hexagon_V6_vmpyih_acc : 7825 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyih_acc">; 7826 7827 // 7828 // BUILTIN_INFO(HEXAGON.V6_vmpyih_acc_128B,VI_ftype_VIVIVI,3) 7829 // tag : V6_vmpyih_acc_128B 7830 def int_hexagon_V6_vmpyih_acc_128B : 7831 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyih_acc_128B">; 7832 7833 // 7834 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh,VI_ftype_VIVI,2) 7835 // tag : V6_vmpyewuh 7836 def int_hexagon_V6_vmpyewuh : 7837 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyewuh">; 7838 7839 // 7840 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_128B,VI_ftype_VIVI,2) 7841 // tag : V6_vmpyewuh_128B 7842 def int_hexagon_V6_vmpyewuh_128B : 7843 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyewuh_128B">; 7844 7845 // 7846 // BUILTIN_INFO(HEXAGON.V6_vmpyowh,VI_ftype_VIVI,2) 7847 // tag : V6_vmpyowh 7848 def int_hexagon_V6_vmpyowh : 7849 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh">; 7850 7851 // 7852 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_128B,VI_ftype_VIVI,2) 7853 // tag : V6_vmpyowh_128B 7854 def int_hexagon_V6_vmpyowh_128B : 7855 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_128B">; 7856 7857 // 7858 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd,VI_ftype_VIVI,2) 7859 // tag : V6_vmpyowh_rnd 7860 def int_hexagon_V6_vmpyowh_rnd : 7861 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_rnd">; 7862 7863 // 7864 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_128B,VI_ftype_VIVI,2) 7865 // tag : V6_vmpyowh_rnd_128B 7866 def int_hexagon_V6_vmpyowh_rnd_128B : 7867 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_128B">; 7868 7869 // 7870 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_sacc,VI_ftype_VIVIVI,3) 7871 // tag : V6_vmpyowh_sacc 7872 def int_hexagon_V6_vmpyowh_sacc : 7873 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_sacc">; 7874 7875 // 7876 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_sacc_128B,VI_ftype_VIVIVI,3) 7877 // tag : V6_vmpyowh_sacc_128B 7878 def int_hexagon_V6_vmpyowh_sacc_128B : 7879 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_sacc_128B">; 7880 7881 // 7882 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_sacc,VI_ftype_VIVIVI,3) 7883 // tag : V6_vmpyowh_rnd_sacc 7884 def int_hexagon_V6_vmpyowh_rnd_sacc : 7885 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_sacc">; 7886 7887 // 7888 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_sacc_128B,VI_ftype_VIVIVI,3) 7889 // tag : V6_vmpyowh_rnd_sacc_128B 7890 def int_hexagon_V6_vmpyowh_rnd_sacc_128B : 7891 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_sacc_128B">; 7892 7893 // 7894 // BUILTIN_INFO(HEXAGON.V6_vmpyieoh,VI_ftype_VIVI,2) 7895 // tag : V6_vmpyieoh 7896 def int_hexagon_V6_vmpyieoh : 7897 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyieoh">; 7898 7899 // 7900 // BUILTIN_INFO(HEXAGON.V6_vmpyieoh_128B,VI_ftype_VIVI,2) 7901 // tag : V6_vmpyieoh_128B 7902 def int_hexagon_V6_vmpyieoh_128B : 7903 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyieoh_128B">; 7904 7905 // 7906 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh,VI_ftype_VIVI,2) 7907 // tag : V6_vmpyiewuh 7908 def int_hexagon_V6_vmpyiewuh : 7909 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewuh">; 7910 7911 // 7912 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_128B,VI_ftype_VIVI,2) 7913 // tag : V6_vmpyiewuh_128B 7914 def int_hexagon_V6_vmpyiewuh_128B : 7915 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewuh_128B">; 7916 7917 // 7918 // BUILTIN_INFO(HEXAGON.V6_vmpyiowh,VI_ftype_VIVI,2) 7919 // tag : V6_vmpyiowh 7920 def int_hexagon_V6_vmpyiowh : 7921 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiowh">; 7922 7923 // 7924 // BUILTIN_INFO(HEXAGON.V6_vmpyiowh_128B,VI_ftype_VIVI,2) 7925 // tag : V6_vmpyiowh_128B 7926 def int_hexagon_V6_vmpyiowh_128B : 7927 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiowh_128B">; 7928 7929 // 7930 // BUILTIN_INFO(HEXAGON.V6_vmpyiewh_acc,VI_ftype_VIVIVI,3) 7931 // tag : V6_vmpyiewh_acc 7932 def int_hexagon_V6_vmpyiewh_acc : 7933 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewh_acc">; 7934 7935 // 7936 // BUILTIN_INFO(HEXAGON.V6_vmpyiewh_acc_128B,VI_ftype_VIVIVI,3) 7937 // tag : V6_vmpyiewh_acc_128B 7938 def int_hexagon_V6_vmpyiewh_acc_128B : 7939 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewh_acc_128B">; 7940 7941 // 7942 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_acc,VI_ftype_VIVIVI,3) 7943 // tag : V6_vmpyiewuh_acc 7944 def int_hexagon_V6_vmpyiewuh_acc : 7945 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewuh_acc">; 7946 7947 // 7948 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_acc_128B,VI_ftype_VIVIVI,3) 7949 // tag : V6_vmpyiewuh_acc_128B 7950 def int_hexagon_V6_vmpyiewuh_acc_128B : 7951 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewuh_acc_128B">; 7952 7953 // 7954 // BUILTIN_INFO(HEXAGON.V6_vmpyub,VD_ftype_VISI,2) 7955 // tag : V6_vmpyub 7956 def int_hexagon_V6_vmpyub : 7957 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyub">; 7958 7959 // 7960 // BUILTIN_INFO(HEXAGON.V6_vmpyub_128B,VD_ftype_VISI,2) 7961 // tag : V6_vmpyub_128B 7962 def int_hexagon_V6_vmpyub_128B : 7963 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyub_128B">; 7964 7965 // 7966 // BUILTIN_INFO(HEXAGON.V6_vmpyub_acc,VD_ftype_VDVISI,3) 7967 // tag : V6_vmpyub_acc 7968 def int_hexagon_V6_vmpyub_acc : 7969 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyub_acc">; 7970 7971 // 7972 // BUILTIN_INFO(HEXAGON.V6_vmpyub_acc_128B,VD_ftype_VDVISI,3) 7973 // tag : V6_vmpyub_acc_128B 7974 def int_hexagon_V6_vmpyub_acc_128B : 7975 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyub_acc_128B">; 7976 7977 // 7978 // BUILTIN_INFO(HEXAGON.V6_vmpybus,VD_ftype_VISI,2) 7979 // tag : V6_vmpybus 7980 def int_hexagon_V6_vmpybus : 7981 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpybus">; 7982 7983 // 7984 // BUILTIN_INFO(HEXAGON.V6_vmpybus_128B,VD_ftype_VISI,2) 7985 // tag : V6_vmpybus_128B 7986 def int_hexagon_V6_vmpybus_128B : 7987 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpybus_128B">; 7988 7989 // 7990 // BUILTIN_INFO(HEXAGON.V6_vmpybus_acc,VD_ftype_VDVISI,3) 7991 // tag : V6_vmpybus_acc 7992 def int_hexagon_V6_vmpybus_acc : 7993 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpybus_acc">; 7994 7995 // 7996 // BUILTIN_INFO(HEXAGON.V6_vmpybus_acc_128B,VD_ftype_VDVISI,3) 7997 // tag : V6_vmpybus_acc_128B 7998 def int_hexagon_V6_vmpybus_acc_128B : 7999 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpybus_acc_128B">; 8000 8001 // 8002 // BUILTIN_INFO(HEXAGON.V6_vmpabus,VD_ftype_VDSI,2) 8003 // tag : V6_vmpabus 8004 def int_hexagon_V6_vmpabus : 8005 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpabus">; 8006 8007 // 8008 // BUILTIN_INFO(HEXAGON.V6_vmpabus_128B,VD_ftype_VDSI,2) 8009 // tag : V6_vmpabus_128B 8010 def int_hexagon_V6_vmpabus_128B : 8011 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpabus_128B">; 8012 8013 // 8014 // BUILTIN_INFO(HEXAGON.V6_vmpabus_acc,VD_ftype_VDVDSI,3) 8015 // tag : V6_vmpabus_acc 8016 def int_hexagon_V6_vmpabus_acc : 8017 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpabus_acc">; 8018 8019 // 8020 // BUILTIN_INFO(HEXAGON.V6_vmpabus_acc_128B,VD_ftype_VDVDSI,3) 8021 // tag : V6_vmpabus_acc_128B 8022 def int_hexagon_V6_vmpabus_acc_128B : 8023 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpabus_acc_128B">; 8024 8025 // 8026 // BUILTIN_INFO(HEXAGON.V6_vmpahb,VD_ftype_VDSI,2) 8027 // tag : V6_vmpahb 8028 def int_hexagon_V6_vmpahb : 8029 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpahb">; 8030 8031 // 8032 // BUILTIN_INFO(HEXAGON.V6_vmpahb_128B,VD_ftype_VDSI,2) 8033 // tag : V6_vmpahb_128B 8034 def int_hexagon_V6_vmpahb_128B : 8035 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpahb_128B">; 8036 8037 // 8038 // BUILTIN_INFO(HEXAGON.V6_vmpahb_acc,VD_ftype_VDVDSI,3) 8039 // tag : V6_vmpahb_acc 8040 def int_hexagon_V6_vmpahb_acc : 8041 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpahb_acc">; 8042 8043 // 8044 // BUILTIN_INFO(HEXAGON.V6_vmpahb_acc_128B,VD_ftype_VDVDSI,3) 8045 // tag : V6_vmpahb_acc_128B 8046 def int_hexagon_V6_vmpahb_acc_128B : 8047 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpahb_acc_128B">; 8048 8049 // 8050 // BUILTIN_INFO(HEXAGON.V6_vmpyh,VD_ftype_VISI,2) 8051 // tag : V6_vmpyh 8052 def int_hexagon_V6_vmpyh : 8053 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyh">; 8054 8055 // 8056 // BUILTIN_INFO(HEXAGON.V6_vmpyh_128B,VD_ftype_VISI,2) 8057 // tag : V6_vmpyh_128B 8058 def int_hexagon_V6_vmpyh_128B : 8059 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyh_128B">; 8060 8061 // 8062 // BUILTIN_INFO(HEXAGON.V6_vmpyhsat_acc,VD_ftype_VDVISI,3) 8063 // tag : V6_vmpyhsat_acc 8064 def int_hexagon_V6_vmpyhsat_acc : 8065 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyhsat_acc">; 8066 8067 // 8068 // BUILTIN_INFO(HEXAGON.V6_vmpyhsat_acc_128B,VD_ftype_VDVISI,3) 8069 // tag : V6_vmpyhsat_acc_128B 8070 def int_hexagon_V6_vmpyhsat_acc_128B : 8071 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyhsat_acc_128B">; 8072 8073 // 8074 // BUILTIN_INFO(HEXAGON.V6_vmpyhss,VI_ftype_VISI,2) 8075 // tag : V6_vmpyhss 8076 def int_hexagon_V6_vmpyhss : 8077 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyhss">; 8078 8079 // 8080 // BUILTIN_INFO(HEXAGON.V6_vmpyhss_128B,VI_ftype_VISI,2) 8081 // tag : V6_vmpyhss_128B 8082 def int_hexagon_V6_vmpyhss_128B : 8083 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyhss_128B">; 8084 8085 // 8086 // BUILTIN_INFO(HEXAGON.V6_vmpyhsrs,VI_ftype_VISI,2) 8087 // tag : V6_vmpyhsrs 8088 def int_hexagon_V6_vmpyhsrs : 8089 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyhsrs">; 8090 8091 // 8092 // BUILTIN_INFO(HEXAGON.V6_vmpyhsrs_128B,VI_ftype_VISI,2) 8093 // tag : V6_vmpyhsrs_128B 8094 def int_hexagon_V6_vmpyhsrs_128B : 8095 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyhsrs_128B">; 8096 8097 // 8098 // BUILTIN_INFO(HEXAGON.V6_vmpyuh,VD_ftype_VISI,2) 8099 // tag : V6_vmpyuh 8100 def int_hexagon_V6_vmpyuh : 8101 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyuh">; 8102 8103 // 8104 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_128B,VD_ftype_VISI,2) 8105 // tag : V6_vmpyuh_128B 8106 def int_hexagon_V6_vmpyuh_128B : 8107 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyuh_128B">; 8108 8109 // 8110 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_acc,VD_ftype_VDVISI,3) 8111 // tag : V6_vmpyuh_acc 8112 def int_hexagon_V6_vmpyuh_acc : 8113 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyuh_acc">; 8114 8115 // 8116 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_acc_128B,VD_ftype_VDVISI,3) 8117 // tag : V6_vmpyuh_acc_128B 8118 def int_hexagon_V6_vmpyuh_acc_128B : 8119 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyuh_acc_128B">; 8120 8121 // 8122 // BUILTIN_INFO(HEXAGON.V6_vmpyihb,VI_ftype_VISI,2) 8123 // tag : V6_vmpyihb 8124 def int_hexagon_V6_vmpyihb : 8125 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyihb">; 8126 8127 // 8128 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_128B,VI_ftype_VISI,2) 8129 // tag : V6_vmpyihb_128B 8130 def int_hexagon_V6_vmpyihb_128B : 8131 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyihb_128B">; 8132 8133 // 8134 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_acc,VI_ftype_VIVISI,3) 8135 // tag : V6_vmpyihb_acc 8136 def int_hexagon_V6_vmpyihb_acc : 8137 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyihb_acc">; 8138 8139 // 8140 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_acc_128B,VI_ftype_VIVISI,3) 8141 // tag : V6_vmpyihb_acc_128B 8142 def int_hexagon_V6_vmpyihb_acc_128B : 8143 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyihb_acc_128B">; 8144 8145 // 8146 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb,VI_ftype_VISI,2) 8147 // tag : V6_vmpyiwb 8148 def int_hexagon_V6_vmpyiwb : 8149 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwb">; 8150 8151 // 8152 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_128B,VI_ftype_VISI,2) 8153 // tag : V6_vmpyiwb_128B 8154 def int_hexagon_V6_vmpyiwb_128B : 8155 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwb_128B">; 8156 8157 // 8158 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_acc,VI_ftype_VIVISI,3) 8159 // tag : V6_vmpyiwb_acc 8160 def int_hexagon_V6_vmpyiwb_acc : 8161 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwb_acc">; 8162 8163 // 8164 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_acc_128B,VI_ftype_VIVISI,3) 8165 // tag : V6_vmpyiwb_acc_128B 8166 def int_hexagon_V6_vmpyiwb_acc_128B : 8167 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwb_acc_128B">; 8168 8169 // 8170 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh,VI_ftype_VISI,2) 8171 // tag : V6_vmpyiwh 8172 def int_hexagon_V6_vmpyiwh : 8173 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwh">; 8174 8175 // 8176 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_128B,VI_ftype_VISI,2) 8177 // tag : V6_vmpyiwh_128B 8178 def int_hexagon_V6_vmpyiwh_128B : 8179 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwh_128B">; 8180 8181 // 8182 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_acc,VI_ftype_VIVISI,3) 8183 // tag : V6_vmpyiwh_acc 8184 def int_hexagon_V6_vmpyiwh_acc : 8185 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwh_acc">; 8186 8187 // 8188 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_acc_128B,VI_ftype_VIVISI,3) 8189 // tag : V6_vmpyiwh_acc_128B 8190 def int_hexagon_V6_vmpyiwh_acc_128B : 8191 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwh_acc_128B">; 8192 8193 // 8194 // BUILTIN_INFO(HEXAGON.V6_vand,VI_ftype_VIVI,2) 8195 // tag : V6_vand 8196 def int_hexagon_V6_vand : 8197 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vand">; 8198 8199 // 8200 // BUILTIN_INFO(HEXAGON.V6_vand_128B,VI_ftype_VIVI,2) 8201 // tag : V6_vand_128B 8202 def int_hexagon_V6_vand_128B : 8203 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vand_128B">; 8204 8205 // 8206 // BUILTIN_INFO(HEXAGON.V6_vor,VI_ftype_VIVI,2) 8207 // tag : V6_vor 8208 def int_hexagon_V6_vor : 8209 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vor">; 8210 8211 // 8212 // BUILTIN_INFO(HEXAGON.V6_vor_128B,VI_ftype_VIVI,2) 8213 // tag : V6_vor_128B 8214 def int_hexagon_V6_vor_128B : 8215 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vor_128B">; 8216 8217 // 8218 // BUILTIN_INFO(HEXAGON.V6_vxor,VI_ftype_VIVI,2) 8219 // tag : V6_vxor 8220 def int_hexagon_V6_vxor : 8221 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vxor">; 8222 8223 // 8224 // BUILTIN_INFO(HEXAGON.V6_vxor_128B,VI_ftype_VIVI,2) 8225 // tag : V6_vxor_128B 8226 def int_hexagon_V6_vxor_128B : 8227 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vxor_128B">; 8228 8229 // 8230 // BUILTIN_INFO(HEXAGON.V6_vnot,VI_ftype_VI,1) 8231 // tag : V6_vnot 8232 def int_hexagon_V6_vnot : 8233 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnot">; 8234 8235 // 8236 // BUILTIN_INFO(HEXAGON.V6_vnot_128B,VI_ftype_VI,1) 8237 // tag : V6_vnot_128B 8238 def int_hexagon_V6_vnot_128B : 8239 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnot_128B">; 8240 8241 // 8242 // BUILTIN_INFO(HEXAGON.V6_vandqrt,VI_ftype_QVSI,2) 8243 // tag : V6_vandqrt 8244 def int_hexagon_V6_vandqrt : 8245 Hexagon_v512v64ii_Intrinsic<"HEXAGON_V6_vandqrt">; 8246 8247 // 8248 // BUILTIN_INFO(HEXAGON.V6_vandqrt_128B,VI_ftype_QVSI,2) 8249 // tag : V6_vandqrt_128B 8250 def int_hexagon_V6_vandqrt_128B : 8251 Hexagon_v1024v128ii_Intrinsic<"HEXAGON_V6_vandqrt_128B">; 8252 8253 // 8254 // BUILTIN_INFO(HEXAGON.V6_vandqrt_acc,VI_ftype_VIQVSI,3) 8255 // tag : V6_vandqrt_acc 8256 def int_hexagon_V6_vandqrt_acc : 8257 Hexagon_v512v512v64ii_Intrinsic<"HEXAGON_V6_vandqrt_acc">; 8258 8259 // 8260 // BUILTIN_INFO(HEXAGON.V6_vandqrt_acc_128B,VI_ftype_VIQVSI,3) 8261 // tag : V6_vandqrt_acc_128B 8262 def int_hexagon_V6_vandqrt_acc_128B : 8263 Hexagon_v1024v1024v128ii_Intrinsic<"HEXAGON_V6_vandqrt_acc_128B">; 8264 8265 // 8266 // BUILTIN_INFO(HEXAGON.V6_vandvrt,QV_ftype_VISI,2) 8267 // tag : V6_vandvrt 8268 def int_hexagon_V6_vandvrt : 8269 Hexagon_v64iv512i_Intrinsic<"HEXAGON_V6_vandvrt">; 8270 8271 // 8272 // BUILTIN_INFO(HEXAGON.V6_vandvrt_128B,QV_ftype_VISI,2) 8273 // tag : V6_vandvrt_128B 8274 def int_hexagon_V6_vandvrt_128B : 8275 Hexagon_v128iv1024i_Intrinsic<"HEXAGON_V6_vandvrt_128B">; 8276 8277 // 8278 // BUILTIN_INFO(HEXAGON.V6_vandvrt_acc,QV_ftype_QVVISI,3) 8279 // tag : V6_vandvrt_acc 8280 def int_hexagon_V6_vandvrt_acc : 8281 Hexagon_v64iv64iv512i_Intrinsic<"HEXAGON_V6_vandvrt_acc">; 8282 8283 // 8284 // BUILTIN_INFO(HEXAGON.V6_vandvrt_acc_128B,QV_ftype_QVVISI,3) 8285 // tag : V6_vandvrt_acc_128B 8286 def int_hexagon_V6_vandvrt_acc_128B : 8287 Hexagon_v128iv128iv1024i_Intrinsic<"HEXAGON_V6_vandvrt_acc_128B">; 8288 8289 // 8290 // BUILTIN_INFO(HEXAGON.V6_vgtw,QV_ftype_VIVI,2) 8291 // tag : V6_vgtw 8292 def int_hexagon_V6_vgtw : 8293 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtw">; 8294 8295 // 8296 // BUILTIN_INFO(HEXAGON.V6_vgtw_128B,QV_ftype_VIVI,2) 8297 // tag : V6_vgtw_128B 8298 def int_hexagon_V6_vgtw_128B : 8299 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_128B">; 8300 8301 // 8302 // BUILTIN_INFO(HEXAGON.V6_vgtw_and,QV_ftype_QVVIVI,3) 8303 // tag : V6_vgtw_and 8304 def int_hexagon_V6_vgtw_and : 8305 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_and">; 8306 8307 // 8308 // BUILTIN_INFO(HEXAGON.V6_vgtw_and_128B,QV_ftype_QVVIVI,3) 8309 // tag : V6_vgtw_and_128B 8310 def int_hexagon_V6_vgtw_and_128B : 8311 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_and_128B">; 8312 8313 // 8314 // BUILTIN_INFO(HEXAGON.V6_vgtw_or,QV_ftype_QVVIVI,3) 8315 // tag : V6_vgtw_or 8316 def int_hexagon_V6_vgtw_or : 8317 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_or">; 8318 8319 // 8320 // BUILTIN_INFO(HEXAGON.V6_vgtw_or_128B,QV_ftype_QVVIVI,3) 8321 // tag : V6_vgtw_or_128B 8322 def int_hexagon_V6_vgtw_or_128B : 8323 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_or_128B">; 8324 8325 // 8326 // BUILTIN_INFO(HEXAGON.V6_vgtw_xor,QV_ftype_QVVIVI,3) 8327 // tag : V6_vgtw_xor 8328 def int_hexagon_V6_vgtw_xor : 8329 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_xor">; 8330 8331 // 8332 // BUILTIN_INFO(HEXAGON.V6_vgtw_xor_128B,QV_ftype_QVVIVI,3) 8333 // tag : V6_vgtw_xor_128B 8334 def int_hexagon_V6_vgtw_xor_128B : 8335 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_xor_128B">; 8336 8337 // 8338 // BUILTIN_INFO(HEXAGON.V6_veqw,QV_ftype_VIVI,2) 8339 // tag : V6_veqw 8340 def int_hexagon_V6_veqw : 8341 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqw">; 8342 8343 // 8344 // BUILTIN_INFO(HEXAGON.V6_veqw_128B,QV_ftype_VIVI,2) 8345 // tag : V6_veqw_128B 8346 def int_hexagon_V6_veqw_128B : 8347 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_128B">; 8348 8349 // 8350 // BUILTIN_INFO(HEXAGON.V6_veqw_and,QV_ftype_QVVIVI,3) 8351 // tag : V6_veqw_and 8352 def int_hexagon_V6_veqw_and : 8353 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_and">; 8354 8355 // 8356 // BUILTIN_INFO(HEXAGON.V6_veqw_and_128B,QV_ftype_QVVIVI,3) 8357 // tag : V6_veqw_and_128B 8358 def int_hexagon_V6_veqw_and_128B : 8359 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_and_128B">; 8360 8361 // 8362 // BUILTIN_INFO(HEXAGON.V6_veqw_or,QV_ftype_QVVIVI,3) 8363 // tag : V6_veqw_or 8364 def int_hexagon_V6_veqw_or : 8365 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_or">; 8366 8367 // 8368 // BUILTIN_INFO(HEXAGON.V6_veqw_or_128B,QV_ftype_QVVIVI,3) 8369 // tag : V6_veqw_or_128B 8370 def int_hexagon_V6_veqw_or_128B : 8371 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_or_128B">; 8372 8373 // 8374 // BUILTIN_INFO(HEXAGON.V6_veqw_xor,QV_ftype_QVVIVI,3) 8375 // tag : V6_veqw_xor 8376 def int_hexagon_V6_veqw_xor : 8377 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_xor">; 8378 8379 // 8380 // BUILTIN_INFO(HEXAGON.V6_veqw_xor_128B,QV_ftype_QVVIVI,3) 8381 // tag : V6_veqw_xor_128B 8382 def int_hexagon_V6_veqw_xor_128B : 8383 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_xor_128B">; 8384 8385 // 8386 // BUILTIN_INFO(HEXAGON.V6_vgth,QV_ftype_VIVI,2) 8387 // tag : V6_vgth 8388 def int_hexagon_V6_vgth : 8389 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgth">; 8390 8391 // 8392 // BUILTIN_INFO(HEXAGON.V6_vgth_128B,QV_ftype_VIVI,2) 8393 // tag : V6_vgth_128B 8394 def int_hexagon_V6_vgth_128B : 8395 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_128B">; 8396 8397 // 8398 // BUILTIN_INFO(HEXAGON.V6_vgth_and,QV_ftype_QVVIVI,3) 8399 // tag : V6_vgth_and 8400 def int_hexagon_V6_vgth_and : 8401 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_and">; 8402 8403 // 8404 // BUILTIN_INFO(HEXAGON.V6_vgth_and_128B,QV_ftype_QVVIVI,3) 8405 // tag : V6_vgth_and_128B 8406 def int_hexagon_V6_vgth_and_128B : 8407 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_and_128B">; 8408 8409 // 8410 // BUILTIN_INFO(HEXAGON.V6_vgth_or,QV_ftype_QVVIVI,3) 8411 // tag : V6_vgth_or 8412 def int_hexagon_V6_vgth_or : 8413 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_or">; 8414 8415 // 8416 // BUILTIN_INFO(HEXAGON.V6_vgth_or_128B,QV_ftype_QVVIVI,3) 8417 // tag : V6_vgth_or_128B 8418 def int_hexagon_V6_vgth_or_128B : 8419 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_or_128B">; 8420 8421 // 8422 // BUILTIN_INFO(HEXAGON.V6_vgth_xor,QV_ftype_QVVIVI,3) 8423 // tag : V6_vgth_xor 8424 def int_hexagon_V6_vgth_xor : 8425 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_xor">; 8426 8427 // 8428 // BUILTIN_INFO(HEXAGON.V6_vgth_xor_128B,QV_ftype_QVVIVI,3) 8429 // tag : V6_vgth_xor_128B 8430 def int_hexagon_V6_vgth_xor_128B : 8431 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_xor_128B">; 8432 8433 // 8434 // BUILTIN_INFO(HEXAGON.V6_veqh,QV_ftype_VIVI,2) 8435 // tag : V6_veqh 8436 def int_hexagon_V6_veqh : 8437 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqh">; 8438 8439 // 8440 // BUILTIN_INFO(HEXAGON.V6_veqh_128B,QV_ftype_VIVI,2) 8441 // tag : V6_veqh_128B 8442 def int_hexagon_V6_veqh_128B : 8443 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_128B">; 8444 8445 // 8446 // BUILTIN_INFO(HEXAGON.V6_veqh_and,QV_ftype_QVVIVI,3) 8447 // tag : V6_veqh_and 8448 def int_hexagon_V6_veqh_and : 8449 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_and">; 8450 8451 // 8452 // BUILTIN_INFO(HEXAGON.V6_veqh_and_128B,QV_ftype_QVVIVI,3) 8453 // tag : V6_veqh_and_128B 8454 def int_hexagon_V6_veqh_and_128B : 8455 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_and_128B">; 8456 8457 // 8458 // BUILTIN_INFO(HEXAGON.V6_veqh_or,QV_ftype_QVVIVI,3) 8459 // tag : V6_veqh_or 8460 def int_hexagon_V6_veqh_or : 8461 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_or">; 8462 8463 // 8464 // BUILTIN_INFO(HEXAGON.V6_veqh_or_128B,QV_ftype_QVVIVI,3) 8465 // tag : V6_veqh_or_128B 8466 def int_hexagon_V6_veqh_or_128B : 8467 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_or_128B">; 8468 8469 // 8470 // BUILTIN_INFO(HEXAGON.V6_veqh_xor,QV_ftype_QVVIVI,3) 8471 // tag : V6_veqh_xor 8472 def int_hexagon_V6_veqh_xor : 8473 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_xor">; 8474 8475 // 8476 // BUILTIN_INFO(HEXAGON.V6_veqh_xor_128B,QV_ftype_QVVIVI,3) 8477 // tag : V6_veqh_xor_128B 8478 def int_hexagon_V6_veqh_xor_128B : 8479 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_xor_128B">; 8480 8481 // 8482 // BUILTIN_INFO(HEXAGON.V6_vgtb,QV_ftype_VIVI,2) 8483 // tag : V6_vgtb 8484 def int_hexagon_V6_vgtb : 8485 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtb">; 8486 8487 // 8488 // BUILTIN_INFO(HEXAGON.V6_vgtb_128B,QV_ftype_VIVI,2) 8489 // tag : V6_vgtb_128B 8490 def int_hexagon_V6_vgtb_128B : 8491 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_128B">; 8492 8493 // 8494 // BUILTIN_INFO(HEXAGON.V6_vgtb_and,QV_ftype_QVVIVI,3) 8495 // tag : V6_vgtb_and 8496 def int_hexagon_V6_vgtb_and : 8497 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_and">; 8498 8499 // 8500 // BUILTIN_INFO(HEXAGON.V6_vgtb_and_128B,QV_ftype_QVVIVI,3) 8501 // tag : V6_vgtb_and_128B 8502 def int_hexagon_V6_vgtb_and_128B : 8503 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_and_128B">; 8504 8505 // 8506 // BUILTIN_INFO(HEXAGON.V6_vgtb_or,QV_ftype_QVVIVI,3) 8507 // tag : V6_vgtb_or 8508 def int_hexagon_V6_vgtb_or : 8509 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_or">; 8510 8511 // 8512 // BUILTIN_INFO(HEXAGON.V6_vgtb_or_128B,QV_ftype_QVVIVI,3) 8513 // tag : V6_vgtb_or_128B 8514 def int_hexagon_V6_vgtb_or_128B : 8515 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_or_128B">; 8516 8517 // 8518 // BUILTIN_INFO(HEXAGON.V6_vgtb_xor,QV_ftype_QVVIVI,3) 8519 // tag : V6_vgtb_xor 8520 def int_hexagon_V6_vgtb_xor : 8521 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_xor">; 8522 8523 // 8524 // BUILTIN_INFO(HEXAGON.V6_vgtb_xor_128B,QV_ftype_QVVIVI,3) 8525 // tag : V6_vgtb_xor_128B 8526 def int_hexagon_V6_vgtb_xor_128B : 8527 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_xor_128B">; 8528 8529 // 8530 // BUILTIN_INFO(HEXAGON.V6_veqb,QV_ftype_VIVI,2) 8531 // tag : V6_veqb 8532 def int_hexagon_V6_veqb : 8533 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqb">; 8534 8535 // 8536 // BUILTIN_INFO(HEXAGON.V6_veqb_128B,QV_ftype_VIVI,2) 8537 // tag : V6_veqb_128B 8538 def int_hexagon_V6_veqb_128B : 8539 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_128B">; 8540 8541 // 8542 // BUILTIN_INFO(HEXAGON.V6_veqb_and,QV_ftype_QVVIVI,3) 8543 // tag : V6_veqb_and 8544 def int_hexagon_V6_veqb_and : 8545 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_and">; 8546 8547 // 8548 // BUILTIN_INFO(HEXAGON.V6_veqb_and_128B,QV_ftype_QVVIVI,3) 8549 // tag : V6_veqb_and_128B 8550 def int_hexagon_V6_veqb_and_128B : 8551 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_and_128B">; 8552 8553 // 8554 // BUILTIN_INFO(HEXAGON.V6_veqb_or,QV_ftype_QVVIVI,3) 8555 // tag : V6_veqb_or 8556 def int_hexagon_V6_veqb_or : 8557 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_or">; 8558 8559 // 8560 // BUILTIN_INFO(HEXAGON.V6_veqb_or_128B,QV_ftype_QVVIVI,3) 8561 // tag : V6_veqb_or_128B 8562 def int_hexagon_V6_veqb_or_128B : 8563 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_or_128B">; 8564 8565 // 8566 // BUILTIN_INFO(HEXAGON.V6_veqb_xor,QV_ftype_QVVIVI,3) 8567 // tag : V6_veqb_xor 8568 def int_hexagon_V6_veqb_xor : 8569 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_xor">; 8570 8571 // 8572 // BUILTIN_INFO(HEXAGON.V6_veqb_xor_128B,QV_ftype_QVVIVI,3) 8573 // tag : V6_veqb_xor_128B 8574 def int_hexagon_V6_veqb_xor_128B : 8575 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_xor_128B">; 8576 8577 // 8578 // BUILTIN_INFO(HEXAGON.V6_vgtuw,QV_ftype_VIVI,2) 8579 // tag : V6_vgtuw 8580 def int_hexagon_V6_vgtuw : 8581 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw">; 8582 8583 // 8584 // BUILTIN_INFO(HEXAGON.V6_vgtuw_128B,QV_ftype_VIVI,2) 8585 // tag : V6_vgtuw_128B 8586 def int_hexagon_V6_vgtuw_128B : 8587 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_128B">; 8588 8589 // 8590 // BUILTIN_INFO(HEXAGON.V6_vgtuw_and,QV_ftype_QVVIVI,3) 8591 // tag : V6_vgtuw_and 8592 def int_hexagon_V6_vgtuw_and : 8593 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_and">; 8594 8595 // 8596 // BUILTIN_INFO(HEXAGON.V6_vgtuw_and_128B,QV_ftype_QVVIVI,3) 8597 // tag : V6_vgtuw_and_128B 8598 def int_hexagon_V6_vgtuw_and_128B : 8599 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_and_128B">; 8600 8601 // 8602 // BUILTIN_INFO(HEXAGON.V6_vgtuw_or,QV_ftype_QVVIVI,3) 8603 // tag : V6_vgtuw_or 8604 def int_hexagon_V6_vgtuw_or : 8605 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_or">; 8606 8607 // 8608 // BUILTIN_INFO(HEXAGON.V6_vgtuw_or_128B,QV_ftype_QVVIVI,3) 8609 // tag : V6_vgtuw_or_128B 8610 def int_hexagon_V6_vgtuw_or_128B : 8611 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_or_128B">; 8612 8613 // 8614 // BUILTIN_INFO(HEXAGON.V6_vgtuw_xor,QV_ftype_QVVIVI,3) 8615 // tag : V6_vgtuw_xor 8616 def int_hexagon_V6_vgtuw_xor : 8617 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_xor">; 8618 8619 // 8620 // BUILTIN_INFO(HEXAGON.V6_vgtuw_xor_128B,QV_ftype_QVVIVI,3) 8621 // tag : V6_vgtuw_xor_128B 8622 def int_hexagon_V6_vgtuw_xor_128B : 8623 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_xor_128B">; 8624 8625 // 8626 // BUILTIN_INFO(HEXAGON.V6_vgtuh,QV_ftype_VIVI,2) 8627 // tag : V6_vgtuh 8628 def int_hexagon_V6_vgtuh : 8629 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh">; 8630 8631 // 8632 // BUILTIN_INFO(HEXAGON.V6_vgtuh_128B,QV_ftype_VIVI,2) 8633 // tag : V6_vgtuh_128B 8634 def int_hexagon_V6_vgtuh_128B : 8635 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_128B">; 8636 8637 // 8638 // BUILTIN_INFO(HEXAGON.V6_vgtuh_and,QV_ftype_QVVIVI,3) 8639 // tag : V6_vgtuh_and 8640 def int_hexagon_V6_vgtuh_and : 8641 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_and">; 8642 8643 // 8644 // BUILTIN_INFO(HEXAGON.V6_vgtuh_and_128B,QV_ftype_QVVIVI,3) 8645 // tag : V6_vgtuh_and_128B 8646 def int_hexagon_V6_vgtuh_and_128B : 8647 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_and_128B">; 8648 8649 // 8650 // BUILTIN_INFO(HEXAGON.V6_vgtuh_or,QV_ftype_QVVIVI,3) 8651 // tag : V6_vgtuh_or 8652 def int_hexagon_V6_vgtuh_or : 8653 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_or">; 8654 8655 // 8656 // BUILTIN_INFO(HEXAGON.V6_vgtuh_or_128B,QV_ftype_QVVIVI,3) 8657 // tag : V6_vgtuh_or_128B 8658 def int_hexagon_V6_vgtuh_or_128B : 8659 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_or_128B">; 8660 8661 // 8662 // BUILTIN_INFO(HEXAGON.V6_vgtuh_xor,QV_ftype_QVVIVI,3) 8663 // tag : V6_vgtuh_xor 8664 def int_hexagon_V6_vgtuh_xor : 8665 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_xor">; 8666 8667 // 8668 // BUILTIN_INFO(HEXAGON.V6_vgtuh_xor_128B,QV_ftype_QVVIVI,3) 8669 // tag : V6_vgtuh_xor_128B 8670 def int_hexagon_V6_vgtuh_xor_128B : 8671 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_xor_128B">; 8672 8673 // 8674 // BUILTIN_INFO(HEXAGON.V6_vgtub,QV_ftype_VIVI,2) 8675 // tag : V6_vgtub 8676 def int_hexagon_V6_vgtub : 8677 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtub">; 8678 8679 // 8680 // BUILTIN_INFO(HEXAGON.V6_vgtub_128B,QV_ftype_VIVI,2) 8681 // tag : V6_vgtub_128B 8682 def int_hexagon_V6_vgtub_128B : 8683 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_128B">; 8684 8685 // 8686 // BUILTIN_INFO(HEXAGON.V6_vgtub_and,QV_ftype_QVVIVI,3) 8687 // tag : V6_vgtub_and 8688 def int_hexagon_V6_vgtub_and : 8689 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_and">; 8690 8691 // 8692 // BUILTIN_INFO(HEXAGON.V6_vgtub_and_128B,QV_ftype_QVVIVI,3) 8693 // tag : V6_vgtub_and_128B 8694 def int_hexagon_V6_vgtub_and_128B : 8695 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_and_128B">; 8696 8697 // 8698 // BUILTIN_INFO(HEXAGON.V6_vgtub_or,QV_ftype_QVVIVI,3) 8699 // tag : V6_vgtub_or 8700 def int_hexagon_V6_vgtub_or : 8701 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_or">; 8702 8703 // 8704 // BUILTIN_INFO(HEXAGON.V6_vgtub_or_128B,QV_ftype_QVVIVI,3) 8705 // tag : V6_vgtub_or_128B 8706 def int_hexagon_V6_vgtub_or_128B : 8707 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_or_128B">; 8708 8709 // 8710 // BUILTIN_INFO(HEXAGON.V6_vgtub_xor,QV_ftype_QVVIVI,3) 8711 // tag : V6_vgtub_xor 8712 def int_hexagon_V6_vgtub_xor : 8713 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_xor">; 8714 8715 // 8716 // BUILTIN_INFO(HEXAGON.V6_vgtub_xor_128B,QV_ftype_QVVIVI,3) 8717 // tag : V6_vgtub_xor_128B 8718 def int_hexagon_V6_vgtub_xor_128B : 8719 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_xor_128B">; 8720 8721 // 8722 // BUILTIN_INFO(HEXAGON.V6_pred_or,QV_ftype_QVQV,2) 8723 // tag : V6_pred_or 8724 def int_hexagon_V6_pred_or : 8725 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_or">; 8726 8727 // 8728 // BUILTIN_INFO(HEXAGON.V6_pred_or_128B,QV_ftype_QVQV,2) 8729 // tag : V6_pred_or_128B 8730 def int_hexagon_V6_pred_or_128B : 8731 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_or_128B">; 8732 8733 // 8734 // BUILTIN_INFO(HEXAGON.V6_pred_and,QV_ftype_QVQV,2) 8735 // tag : V6_pred_and 8736 def int_hexagon_V6_pred_and : 8737 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_and">; 8738 8739 // 8740 // BUILTIN_INFO(HEXAGON.V6_pred_and_128B,QV_ftype_QVQV,2) 8741 // tag : V6_pred_and_128B 8742 def int_hexagon_V6_pred_and_128B : 8743 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_and_128B">; 8744 8745 // 8746 // BUILTIN_INFO(HEXAGON.V6_pred_not,QV_ftype_QV,1) 8747 // tag : V6_pred_not 8748 def int_hexagon_V6_pred_not : 8749 Hexagon_v64iv64i_Intrinsic<"HEXAGON_V6_pred_not">; 8750 8751 // 8752 // BUILTIN_INFO(HEXAGON.V6_pred_not_128B,QV_ftype_QV,1) 8753 // tag : V6_pred_not_128B 8754 def int_hexagon_V6_pred_not_128B : 8755 Hexagon_v128iv128i_Intrinsic<"HEXAGON_V6_pred_not_128B">; 8756 8757 // 8758 // BUILTIN_INFO(HEXAGON.V6_pred_xor,QV_ftype_QVQV,2) 8759 // tag : V6_pred_xor 8760 def int_hexagon_V6_pred_xor : 8761 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_xor">; 8762 8763 // 8764 // BUILTIN_INFO(HEXAGON.V6_pred_xor_128B,QV_ftype_QVQV,2) 8765 // tag : V6_pred_xor_128B 8766 def int_hexagon_V6_pred_xor_128B : 8767 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_xor_128B">; 8768 8769 // 8770 // BUILTIN_INFO(HEXAGON.V6_pred_and_n,QV_ftype_QVQV,2) 8771 // tag : V6_pred_and_n 8772 def int_hexagon_V6_pred_and_n : 8773 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_and_n">; 8774 8775 // 8776 // BUILTIN_INFO(HEXAGON.V6_pred_and_n_128B,QV_ftype_QVQV,2) 8777 // tag : V6_pred_and_n_128B 8778 def int_hexagon_V6_pred_and_n_128B : 8779 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_and_n_128B">; 8780 8781 // 8782 // BUILTIN_INFO(HEXAGON.V6_pred_or_n,QV_ftype_QVQV,2) 8783 // tag : V6_pred_or_n 8784 def int_hexagon_V6_pred_or_n : 8785 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_or_n">; 8786 8787 // 8788 // BUILTIN_INFO(HEXAGON.V6_pred_or_n_128B,QV_ftype_QVQV,2) 8789 // tag : V6_pred_or_n_128B 8790 def int_hexagon_V6_pred_or_n_128B : 8791 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_or_n_128B">; 8792 8793 // 8794 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2,QV_ftype_SI,1) 8795 // tag : V6_pred_scalar2 8796 def int_hexagon_V6_pred_scalar2 : 8797 Hexagon_v64ii_Intrinsic<"HEXAGON_V6_pred_scalar2">; 8798 8799 // 8800 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2_128B,QV_ftype_SI,1) 8801 // tag : V6_pred_scalar2_128B 8802 def int_hexagon_V6_pred_scalar2_128B : 8803 Hexagon_v128ii_Intrinsic<"HEXAGON_V6_pred_scalar2_128B">; 8804 8805 // 8806 // BUILTIN_INFO(HEXAGON.V6_vmux,VI_ftype_QVVIVI,3) 8807 // tag : V6_vmux 8808 def int_hexagon_V6_vmux : 8809 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vmux">; 8810 8811 // 8812 // BUILTIN_INFO(HEXAGON.V6_vmux_128B,VI_ftype_QVVIVI,3) 8813 // tag : V6_vmux_128B 8814 def int_hexagon_V6_vmux_128B : 8815 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vmux_128B">; 8816 8817 // 8818 // BUILTIN_INFO(HEXAGON.V6_vswap,VD_ftype_QVVIVI,3) 8819 // tag : V6_vswap 8820 def int_hexagon_V6_vswap : 8821 Hexagon_v1024v64iv512v512_Intrinsic<"HEXAGON_V6_vswap">; 8822 8823 // 8824 // BUILTIN_INFO(HEXAGON.V6_vswap_128B,VD_ftype_QVVIVI,3) 8825 // tag : V6_vswap_128B 8826 def int_hexagon_V6_vswap_128B : 8827 Hexagon_v2048v128iv1024v1024_Intrinsic<"HEXAGON_V6_vswap_128B">; 8828 8829 // 8830 // BUILTIN_INFO(HEXAGON.V6_vmaxub,VI_ftype_VIVI,2) 8831 // tag : V6_vmaxub 8832 def int_hexagon_V6_vmaxub : 8833 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxub">; 8834 8835 // 8836 // BUILTIN_INFO(HEXAGON.V6_vmaxub_128B,VI_ftype_VIVI,2) 8837 // tag : V6_vmaxub_128B 8838 def int_hexagon_V6_vmaxub_128B : 8839 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxub_128B">; 8840 8841 // 8842 // BUILTIN_INFO(HEXAGON.V6_vminub,VI_ftype_VIVI,2) 8843 // tag : V6_vminub 8844 def int_hexagon_V6_vminub : 8845 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminub">; 8846 8847 // 8848 // BUILTIN_INFO(HEXAGON.V6_vminub_128B,VI_ftype_VIVI,2) 8849 // tag : V6_vminub_128B 8850 def int_hexagon_V6_vminub_128B : 8851 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminub_128B">; 8852 8853 // 8854 // BUILTIN_INFO(HEXAGON.V6_vmaxuh,VI_ftype_VIVI,2) 8855 // tag : V6_vmaxuh 8856 def int_hexagon_V6_vmaxuh : 8857 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxuh">; 8858 8859 // 8860 // BUILTIN_INFO(HEXAGON.V6_vmaxuh_128B,VI_ftype_VIVI,2) 8861 // tag : V6_vmaxuh_128B 8862 def int_hexagon_V6_vmaxuh_128B : 8863 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxuh_128B">; 8864 8865 // 8866 // BUILTIN_INFO(HEXAGON.V6_vminuh,VI_ftype_VIVI,2) 8867 // tag : V6_vminuh 8868 def int_hexagon_V6_vminuh : 8869 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminuh">; 8870 8871 // 8872 // BUILTIN_INFO(HEXAGON.V6_vminuh_128B,VI_ftype_VIVI,2) 8873 // tag : V6_vminuh_128B 8874 def int_hexagon_V6_vminuh_128B : 8875 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminuh_128B">; 8876 8877 // 8878 // BUILTIN_INFO(HEXAGON.V6_vmaxh,VI_ftype_VIVI,2) 8879 // tag : V6_vmaxh 8880 def int_hexagon_V6_vmaxh : 8881 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxh">; 8882 8883 // 8884 // BUILTIN_INFO(HEXAGON.V6_vmaxh_128B,VI_ftype_VIVI,2) 8885 // tag : V6_vmaxh_128B 8886 def int_hexagon_V6_vmaxh_128B : 8887 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxh_128B">; 8888 8889 // 8890 // BUILTIN_INFO(HEXAGON.V6_vminh,VI_ftype_VIVI,2) 8891 // tag : V6_vminh 8892 def int_hexagon_V6_vminh : 8893 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminh">; 8894 8895 // 8896 // BUILTIN_INFO(HEXAGON.V6_vminh_128B,VI_ftype_VIVI,2) 8897 // tag : V6_vminh_128B 8898 def int_hexagon_V6_vminh_128B : 8899 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminh_128B">; 8900 8901 // 8902 // BUILTIN_INFO(HEXAGON.V6_vmaxw,VI_ftype_VIVI,2) 8903 // tag : V6_vmaxw 8904 def int_hexagon_V6_vmaxw : 8905 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxw">; 8906 8907 // 8908 // BUILTIN_INFO(HEXAGON.V6_vmaxw_128B,VI_ftype_VIVI,2) 8909 // tag : V6_vmaxw_128B 8910 def int_hexagon_V6_vmaxw_128B : 8911 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxw_128B">; 8912 8913 // 8914 // BUILTIN_INFO(HEXAGON.V6_vminw,VI_ftype_VIVI,2) 8915 // tag : V6_vminw 8916 def int_hexagon_V6_vminw : 8917 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminw">; 8918 8919 // 8920 // BUILTIN_INFO(HEXAGON.V6_vminw_128B,VI_ftype_VIVI,2) 8921 // tag : V6_vminw_128B 8922 def int_hexagon_V6_vminw_128B : 8923 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminw_128B">; 8924 8925 // 8926 // BUILTIN_INFO(HEXAGON.V6_vsathub,VI_ftype_VIVI,2) 8927 // tag : V6_vsathub 8928 def int_hexagon_V6_vsathub : 8929 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsathub">; 8930 8931 // 8932 // BUILTIN_INFO(HEXAGON.V6_vsathub_128B,VI_ftype_VIVI,2) 8933 // tag : V6_vsathub_128B 8934 def int_hexagon_V6_vsathub_128B : 8935 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsathub_128B">; 8936 8937 // 8938 // BUILTIN_INFO(HEXAGON.V6_vsatwh,VI_ftype_VIVI,2) 8939 // tag : V6_vsatwh 8940 def int_hexagon_V6_vsatwh : 8941 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsatwh">; 8942 8943 // 8944 // BUILTIN_INFO(HEXAGON.V6_vsatwh_128B,VI_ftype_VIVI,2) 8945 // tag : V6_vsatwh_128B 8946 def int_hexagon_V6_vsatwh_128B : 8947 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsatwh_128B">; 8948 8949 // 8950 // BUILTIN_INFO(HEXAGON.V6_vshuffeb,VI_ftype_VIVI,2) 8951 // tag : V6_vshuffeb 8952 def int_hexagon_V6_vshuffeb : 8953 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshuffeb">; 8954 8955 // 8956 // BUILTIN_INFO(HEXAGON.V6_vshuffeb_128B,VI_ftype_VIVI,2) 8957 // tag : V6_vshuffeb_128B 8958 def int_hexagon_V6_vshuffeb_128B : 8959 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshuffeb_128B">; 8960 8961 // 8962 // BUILTIN_INFO(HEXAGON.V6_vshuffob,VI_ftype_VIVI,2) 8963 // tag : V6_vshuffob 8964 def int_hexagon_V6_vshuffob : 8965 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshuffob">; 8966 8967 // 8968 // BUILTIN_INFO(HEXAGON.V6_vshuffob_128B,VI_ftype_VIVI,2) 8969 // tag : V6_vshuffob_128B 8970 def int_hexagon_V6_vshuffob_128B : 8971 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshuffob_128B">; 8972 8973 // 8974 // BUILTIN_INFO(HEXAGON.V6_vshufeh,VI_ftype_VIVI,2) 8975 // tag : V6_vshufeh 8976 def int_hexagon_V6_vshufeh : 8977 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshufeh">; 8978 8979 // 8980 // BUILTIN_INFO(HEXAGON.V6_vshufeh_128B,VI_ftype_VIVI,2) 8981 // tag : V6_vshufeh_128B 8982 def int_hexagon_V6_vshufeh_128B : 8983 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshufeh_128B">; 8984 8985 // 8986 // BUILTIN_INFO(HEXAGON.V6_vshufoh,VI_ftype_VIVI,2) 8987 // tag : V6_vshufoh 8988 def int_hexagon_V6_vshufoh : 8989 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshufoh">; 8990 8991 // 8992 // BUILTIN_INFO(HEXAGON.V6_vshufoh_128B,VI_ftype_VIVI,2) 8993 // tag : V6_vshufoh_128B 8994 def int_hexagon_V6_vshufoh_128B : 8995 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshufoh_128B">; 8996 8997 // 8998 // BUILTIN_INFO(HEXAGON.V6_vshuffvdd,VD_ftype_VIVISI,3) 8999 // tag : V6_vshuffvdd 9000 def int_hexagon_V6_vshuffvdd : 9001 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vshuffvdd">; 9002 9003 // 9004 // BUILTIN_INFO(HEXAGON.V6_vshuffvdd_128B,VD_ftype_VIVISI,3) 9005 // tag : V6_vshuffvdd_128B 9006 def int_hexagon_V6_vshuffvdd_128B : 9007 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vshuffvdd_128B">; 9008 9009 // 9010 // BUILTIN_INFO(HEXAGON.V6_vdealvdd,VD_ftype_VIVISI,3) 9011 // tag : V6_vdealvdd 9012 def int_hexagon_V6_vdealvdd : 9013 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vdealvdd">; 9014 9015 // 9016 // BUILTIN_INFO(HEXAGON.V6_vdealvdd_128B,VD_ftype_VIVISI,3) 9017 // tag : V6_vdealvdd_128B 9018 def int_hexagon_V6_vdealvdd_128B : 9019 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vdealvdd_128B">; 9020 9021 // 9022 // BUILTIN_INFO(HEXAGON.V6_vshufoeh,VD_ftype_VIVI,2) 9023 // tag : V6_vshufoeh 9024 def int_hexagon_V6_vshufoeh : 9025 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vshufoeh">; 9026 9027 // 9028 // BUILTIN_INFO(HEXAGON.V6_vshufoeh_128B,VD_ftype_VIVI,2) 9029 // tag : V6_vshufoeh_128B 9030 def int_hexagon_V6_vshufoeh_128B : 9031 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vshufoeh_128B">; 9032 9033 // 9034 // BUILTIN_INFO(HEXAGON.V6_vshufoeb,VD_ftype_VIVI,2) 9035 // tag : V6_vshufoeb 9036 def int_hexagon_V6_vshufoeb : 9037 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vshufoeb">; 9038 9039 // 9040 // BUILTIN_INFO(HEXAGON.V6_vshufoeb_128B,VD_ftype_VIVI,2) 9041 // tag : V6_vshufoeb_128B 9042 def int_hexagon_V6_vshufoeb_128B : 9043 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vshufoeb_128B">; 9044 9045 // 9046 // BUILTIN_INFO(HEXAGON.V6_vdealh,VI_ftype_VI,1) 9047 // tag : V6_vdealh 9048 def int_hexagon_V6_vdealh : 9049 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vdealh">; 9050 9051 // 9052 // BUILTIN_INFO(HEXAGON.V6_vdealh_128B,VI_ftype_VI,1) 9053 // tag : V6_vdealh_128B 9054 def int_hexagon_V6_vdealh_128B : 9055 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vdealh_128B">; 9056 9057 // 9058 // BUILTIN_INFO(HEXAGON.V6_vdealb,VI_ftype_VI,1) 9059 // tag : V6_vdealb 9060 def int_hexagon_V6_vdealb : 9061 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vdealb">; 9062 9063 // 9064 // BUILTIN_INFO(HEXAGON.V6_vdealb_128B,VI_ftype_VI,1) 9065 // tag : V6_vdealb_128B 9066 def int_hexagon_V6_vdealb_128B : 9067 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vdealb_128B">; 9068 9069 // 9070 // BUILTIN_INFO(HEXAGON.V6_vdealb4w,VI_ftype_VIVI,2) 9071 // tag : V6_vdealb4w 9072 def int_hexagon_V6_vdealb4w : 9073 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdealb4w">; 9074 9075 // 9076 // BUILTIN_INFO(HEXAGON.V6_vdealb4w_128B,VI_ftype_VIVI,2) 9077 // tag : V6_vdealb4w_128B 9078 def int_hexagon_V6_vdealb4w_128B : 9079 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdealb4w_128B">; 9080 9081 // 9082 // BUILTIN_INFO(HEXAGON.V6_vshuffh,VI_ftype_VI,1) 9083 // tag : V6_vshuffh 9084 def int_hexagon_V6_vshuffh : 9085 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vshuffh">; 9086 9087 // 9088 // BUILTIN_INFO(HEXAGON.V6_vshuffh_128B,VI_ftype_VI,1) 9089 // tag : V6_vshuffh_128B 9090 def int_hexagon_V6_vshuffh_128B : 9091 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vshuffh_128B">; 9092 9093 // 9094 // BUILTIN_INFO(HEXAGON.V6_vshuffb,VI_ftype_VI,1) 9095 // tag : V6_vshuffb 9096 def int_hexagon_V6_vshuffb : 9097 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vshuffb">; 9098 9099 // 9100 // BUILTIN_INFO(HEXAGON.V6_vshuffb_128B,VI_ftype_VI,1) 9101 // tag : V6_vshuffb_128B 9102 def int_hexagon_V6_vshuffb_128B : 9103 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vshuffb_128B">; 9104 9105 // 9106 // BUILTIN_INFO(HEXAGON.V6_extractw,SI_ftype_VISI,2) 9107 // tag : V6_extractw 9108 def int_hexagon_V6_extractw : 9109 Hexagon_iv512i_Intrinsic<"HEXAGON_V6_extractw">; 9110 9111 // 9112 // BUILTIN_INFO(HEXAGON.V6_extractw_128B,SI_ftype_VISI,2) 9113 // tag : V6_extractw_128B 9114 def int_hexagon_V6_extractw_128B : 9115 Hexagon_iv1024i_Intrinsic<"HEXAGON_V6_extractw_128B">; 9116 9117 // 9118 // BUILTIN_INFO(HEXAGON.V6_vinsertwr,VI_ftype_VISI,2) 9119 // tag : V6_vinsertwr 9120 def int_hexagon_V6_vinsertwr : 9121 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vinsertwr">; 9122 9123 // 9124 // BUILTIN_INFO(HEXAGON.V6_vinsertwr_128B,VI_ftype_VISI,2) 9125 // tag : V6_vinsertwr_128B 9126 def int_hexagon_V6_vinsertwr_128B : 9127 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vinsertwr_128B">; 9128 9129 // 9130 // BUILTIN_INFO(HEXAGON.V6_lvsplatw,VI_ftype_SI,1) 9131 // tag : V6_lvsplatw 9132 def int_hexagon_V6_lvsplatw : 9133 Hexagon_v512i_Intrinsic<"HEXAGON_V6_lvsplatw">; 9134 9135 // 9136 // BUILTIN_INFO(HEXAGON.V6_lvsplatw_128B,VI_ftype_SI,1) 9137 // tag : V6_lvsplatw_128B 9138 def int_hexagon_V6_lvsplatw_128B : 9139 Hexagon_v1024i_Intrinsic<"HEXAGON_V6_lvsplatw_128B">; 9140 9141 // 9142 // BUILTIN_INFO(HEXAGON.V6_vassign,VI_ftype_VI,1) 9143 // tag : V6_vassign 9144 def int_hexagon_V6_vassign : 9145 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vassign">; 9146 9147 // 9148 // BUILTIN_INFO(HEXAGON.V6_vassign_128B,VI_ftype_VI,1) 9149 // tag : V6_vassign_128B 9150 def int_hexagon_V6_vassign_128B : 9151 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vassign_128B">; 9152 9153 // 9154 // BUILTIN_INFO(HEXAGON.V6_vcombine,VD_ftype_VIVI,2) 9155 // tag : V6_vcombine 9156 def int_hexagon_V6_vcombine : 9157 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vcombine">; 9158 9159 // 9160 // BUILTIN_INFO(HEXAGON.V6_vcombine_128B,VD_ftype_VIVI,2) 9161 // tag : V6_vcombine_128B 9162 def int_hexagon_V6_vcombine_128B : 9163 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vcombine_128B">; 9164 9165 // 9166 // BUILTIN_INFO(HEXAGON.V6_vlutb,VI_ftype_VIDISI,3) 9167 // tag : V6_vlutb 9168 def int_hexagon_V6_vlutb : 9169 Hexagon_v512v512LLii_Intrinsic<"HEXAGON_V6_vlutb">; 9170 9171 // 9172 // BUILTIN_INFO(HEXAGON.V6_vlutb_128B,VI_ftype_VIDISI,3) 9173 // tag : V6_vlutb_128B 9174 def int_hexagon_V6_vlutb_128B : 9175 Hexagon_v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_128B">; 9176 9177 // 9178 // BUILTIN_INFO(HEXAGON.V6_vlutb_acc,VI_ftype_VIVIDISI,4) 9179 // tag : V6_vlutb_acc 9180 def int_hexagon_V6_vlutb_acc : 9181 Hexagon_v512v512v512LLii_Intrinsic<"HEXAGON_V6_vlutb_acc">; 9182 9183 // 9184 // BUILTIN_INFO(HEXAGON.V6_vlutb_acc_128B,VI_ftype_VIVIDISI,4) 9185 // tag : V6_vlutb_acc_128B 9186 def int_hexagon_V6_vlutb_acc_128B : 9187 Hexagon_v1024v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_acc_128B">; 9188 9189 // 9190 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv,VD_ftype_VDDISI,3) 9191 // tag : V6_vlutb_dv 9192 def int_hexagon_V6_vlutb_dv : 9193 Hexagon_v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_dv">; 9194 9195 // 9196 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_128B,VD_ftype_VDDISI,3) 9197 // tag : V6_vlutb_dv_128B 9198 def int_hexagon_V6_vlutb_dv_128B : 9199 Hexagon_v2048v2048LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_128B">; 9200 9201 // 9202 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_acc,VD_ftype_VDVDDISI,4) 9203 // tag : V6_vlutb_dv_acc 9204 def int_hexagon_V6_vlutb_dv_acc : 9205 Hexagon_v1024v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_acc">; 9206 9207 // 9208 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_acc_128B,VD_ftype_VDVDDISI,4) 9209 // tag : V6_vlutb_dv_acc_128B 9210 def int_hexagon_V6_vlutb_dv_acc_128B : 9211 Hexagon_v2048v2048v2048LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_acc_128B">; 9212 9213 // 9214 // BUILTIN_INFO(HEXAGON.V6_vdelta,VI_ftype_VIVI,2) 9215 // tag : V6_vdelta 9216 def int_hexagon_V6_vdelta : 9217 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdelta">; 9218 9219 // 9220 // BUILTIN_INFO(HEXAGON.V6_vdelta_128B,VI_ftype_VIVI,2) 9221 // tag : V6_vdelta_128B 9222 def int_hexagon_V6_vdelta_128B : 9223 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdelta_128B">; 9224 9225 // 9226 // BUILTIN_INFO(HEXAGON.V6_vrdelta,VI_ftype_VIVI,2) 9227 // tag : V6_vrdelta 9228 def int_hexagon_V6_vrdelta : 9229 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrdelta">; 9230 9231 // 9232 // BUILTIN_INFO(HEXAGON.V6_vrdelta_128B,VI_ftype_VIVI,2) 9233 // tag : V6_vrdelta_128B 9234 def int_hexagon_V6_vrdelta_128B : 9235 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrdelta_128B">; 9236 9237 // 9238 // BUILTIN_INFO(HEXAGON.V6_vcl0w,VI_ftype_VI,1) 9239 // tag : V6_vcl0w 9240 def int_hexagon_V6_vcl0w : 9241 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vcl0w">; 9242 9243 // 9244 // BUILTIN_INFO(HEXAGON.V6_vcl0w_128B,VI_ftype_VI,1) 9245 // tag : V6_vcl0w_128B 9246 def int_hexagon_V6_vcl0w_128B : 9247 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vcl0w_128B">; 9248 9249 // 9250 // BUILTIN_INFO(HEXAGON.V6_vcl0h,VI_ftype_VI,1) 9251 // tag : V6_vcl0h 9252 def int_hexagon_V6_vcl0h : 9253 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vcl0h">; 9254 9255 // 9256 // BUILTIN_INFO(HEXAGON.V6_vcl0h_128B,VI_ftype_VI,1) 9257 // tag : V6_vcl0h_128B 9258 def int_hexagon_V6_vcl0h_128B : 9259 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vcl0h_128B">; 9260 9261 // 9262 // BUILTIN_INFO(HEXAGON.V6_vnormamtw,VI_ftype_VI,1) 9263 // tag : V6_vnormamtw 9264 def int_hexagon_V6_vnormamtw : 9265 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnormamtw">; 9266 9267 // 9268 // BUILTIN_INFO(HEXAGON.V6_vnormamtw_128B,VI_ftype_VI,1) 9269 // tag : V6_vnormamtw_128B 9270 def int_hexagon_V6_vnormamtw_128B : 9271 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnormamtw_128B">; 9272 9273 // 9274 // BUILTIN_INFO(HEXAGON.V6_vnormamth,VI_ftype_VI,1) 9275 // tag : V6_vnormamth 9276 def int_hexagon_V6_vnormamth : 9277 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnormamth">; 9278 9279 // 9280 // BUILTIN_INFO(HEXAGON.V6_vnormamth_128B,VI_ftype_VI,1) 9281 // tag : V6_vnormamth_128B 9282 def int_hexagon_V6_vnormamth_128B : 9283 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnormamth_128B">; 9284 9285 // 9286 // BUILTIN_INFO(HEXAGON.V6_vpopcounth,VI_ftype_VI,1) 9287 // tag : V6_vpopcounth 9288 def int_hexagon_V6_vpopcounth : 9289 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vpopcounth">; 9290 9291 // 9292 // BUILTIN_INFO(HEXAGON.V6_vpopcounth_128B,VI_ftype_VI,1) 9293 // tag : V6_vpopcounth_128B 9294 def int_hexagon_V6_vpopcounth_128B : 9295 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vpopcounth_128B">; 9296 9297 // 9298 // BUILTIN_INFO(HEXAGON.V6_vlutvvb,VI_ftype_VIVISI,3) 9299 // tag : V6_vlutvvb 9300 def int_hexagon_V6_vlutvvb : 9301 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb">; 9302 9303 // 9304 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_128B,VI_ftype_VIVISI,3) 9305 // tag : V6_vlutvvb_128B 9306 def int_hexagon_V6_vlutvvb_128B : 9307 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_128B">; 9308 9309 // 9310 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracc,VI_ftype_VIVIVISI,4) 9311 // tag : V6_vlutvvb_oracc 9312 def int_hexagon_V6_vlutvvb_oracc : 9313 Hexagon_v512v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_oracc">; 9314 9315 // 9316 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracc_128B,VI_ftype_VIVIVISI,4) 9317 // tag : V6_vlutvvb_oracc_128B 9318 def int_hexagon_V6_vlutvvb_oracc_128B : 9319 Hexagon_v1024v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_oracc_128B">; 9320 9321 // 9322 // BUILTIN_INFO(HEXAGON.V6_vlutvwh,VD_ftype_VIVISI,3) 9323 // tag : V6_vlutvwh 9324 def int_hexagon_V6_vlutvwh : 9325 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh">; 9326 9327 // 9328 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_128B,VD_ftype_VIVISI,3) 9329 // tag : V6_vlutvwh_128B 9330 def int_hexagon_V6_vlutvwh_128B : 9331 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_128B">; 9332 9333 // 9334 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracc,VD_ftype_VDVIVISI,4) 9335 // tag : V6_vlutvwh_oracc 9336 def int_hexagon_V6_vlutvwh_oracc : 9337 Hexagon_v1024v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_oracc">; 9338 9339 // 9340 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracc_128B,VD_ftype_VDVIVISI,4) 9341 // tag : V6_vlutvwh_oracc_128B 9342 def int_hexagon_V6_vlutvwh_oracc_128B : 9343 Hexagon_v2048v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_oracc_128B">; 9344 9345 // 9346 // Masked vector stores 9347 // 9348 def int_hexagon_V6_vmaskedstoreq : 9349 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstoreq">; 9350 9351 def int_hexagon_V6_vmaskedstorenq : 9352 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorenq">; 9353 9354 def int_hexagon_V6_vmaskedstorentq : 9355 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorentq">; 9356 9357 def int_hexagon_V6_vmaskedstorentnq : 9358 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorentnq">; 9359 9360 def int_hexagon_V6_vmaskedstoreq_128B : 9361 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstoreq_128B">; 9362 9363 def int_hexagon_V6_vmaskedstorenq_128B : 9364 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorenq_128B">; 9365 9366 def int_hexagon_V6_vmaskedstorentq_128B : 9367 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorentq_128B">; 9368 9369 def int_hexagon_V6_vmaskedstorentnq_128B : 9370 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorentnq_128B">; 9371 9372 9373 /// 9374 /// HexagonV62 intrinsics 9375 /// 9376 9377 // 9378 // Hexagon_LLiLLiLLi_Intrinsic<string GCCIntSuffix> 9379 // tag : M6_vabsdiffb 9380 class Hexagon_LLiLLiLLi_Intrinsic<string GCCIntSuffix> 9381 : Hexagon_Intrinsic<GCCIntSuffix, 9382 [llvm_i64_ty], [llvm_i64_ty,llvm_i64_ty], 9383 [IntrNoMem]>; 9384 9385 // 9386 // Hexagon_LLii_Intrinsic<string GCCIntSuffix> 9387 // tag : S6_vsplatrbp 9388 class Hexagon_LLii_Intrinsic<string GCCIntSuffix> 9389 : Hexagon_Intrinsic<GCCIntSuffix, 9390 [llvm_i64_ty], [llvm_i32_ty], 9391 [IntrNoMem]>; 9392 9393 // 9394 // Hexagon_V62_v512v512i_Intrinsic<string GCCIntSuffix> 9395 // tag : V6_vlsrb 9396 class Hexagon_V62_v512v512i_Intrinsic<string GCCIntSuffix> 9397 : Hexagon_Intrinsic<GCCIntSuffix, 9398 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 9399 [IntrNoMem]>; 9400 9401 // 9402 // Hexagon_V62_v1024v1024i_Intrinsic<string GCCIntSuffix> 9403 // tag : V6_vlsrb_128B 9404 class Hexagon_V62_v1024v1024i_Intrinsic<string GCCIntSuffix> 9405 : Hexagon_Intrinsic<GCCIntSuffix, 9406 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 9407 [IntrNoMem]>; 9408 9409 // 9410 // Hexagon_V62_v512v512v512i_Intrinsic<string GCCIntSuffix> 9411 // tag : V6_vasrwuhrndsat 9412 class Hexagon_V62_v512v512v512i_Intrinsic<string GCCIntSuffix> 9413 : Hexagon_Intrinsic<GCCIntSuffix, 9414 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9415 [IntrNoMem]>; 9416 9417 // 9418 // Hexagon_V62_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9419 // tag : V6_vasrwuhrndsat_128B 9420 class Hexagon_V62_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9421 : Hexagon_Intrinsic<GCCIntSuffix, 9422 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9423 [IntrNoMem]>; 9424 9425 // 9426 // Hexagon_V62_v512v512v512_Intrinsic<string GCCIntSuffix> 9427 // tag : V6_vrounduwuh 9428 class Hexagon_V62_v512v512v512_Intrinsic<string GCCIntSuffix> 9429 : Hexagon_Intrinsic<GCCIntSuffix, 9430 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 9431 [IntrNoMem]>; 9432 9433 // 9434 // Hexagon_V62_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 9435 // tag : V6_vrounduwuh_128B 9436 class Hexagon_V62_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 9437 : Hexagon_Intrinsic<GCCIntSuffix, 9438 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 9439 [IntrNoMem]>; 9440 9441 // 9442 // Hexagon_V62_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 9443 // tag : V6_vadduwsat_dv_128B 9444 class Hexagon_V62_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 9445 : Hexagon_Intrinsic<GCCIntSuffix, 9446 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty], 9447 [IntrNoMem]>; 9448 9449 // 9450 // Hexagon_V62_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 9451 // tag : V6_vaddhw_acc 9452 class Hexagon_V62_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 9453 : Hexagon_Intrinsic<GCCIntSuffix, 9454 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 9455 [IntrNoMem]>; 9456 9457 // 9458 // Hexagon_V62_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9459 // tag : V6_vaddhw_acc_128B 9460 class Hexagon_V62_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9461 : Hexagon_Intrinsic<GCCIntSuffix, 9462 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 9463 [IntrNoMem]>; 9464 9465 // 9466 // Hexagon_V62_v1024v512v512_Intrinsic<string GCCIntSuffix> 9467 // tag : V6_vmpyewuh_64 9468 class Hexagon_V62_v1024v512v512_Intrinsic<string GCCIntSuffix> 9469 : Hexagon_Intrinsic<GCCIntSuffix, 9470 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 9471 [IntrNoMem]>; 9472 9473 // 9474 // Hexagon_V62_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9475 // tag : V6_vmpyewuh_64_128B 9476 class Hexagon_V62_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9477 : Hexagon_Intrinsic<GCCIntSuffix, 9478 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 9479 [IntrNoMem]>; 9480 9481 // 9482 // Hexagon_V62_v2048v2048i_Intrinsic<string GCCIntSuffix> 9483 // tag : V6_vmpauhb_128B 9484 class Hexagon_V62_v2048v2048i_Intrinsic<string GCCIntSuffix> 9485 : Hexagon_Intrinsic<GCCIntSuffix, 9486 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 9487 [IntrNoMem]>; 9488 9489 // 9490 // Hexagon_V62_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 9491 // tag : V6_vmpauhb_acc_128B 9492 class Hexagon_V62_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 9493 : Hexagon_Intrinsic<GCCIntSuffix, 9494 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty], 9495 [IntrNoMem]>; 9496 9497 // 9498 // Hexagon_V62_v512v64ii_Intrinsic<string GCCIntSuffix> 9499 // tag : V6_vandnqrt 9500 class Hexagon_V62_v512v64ii_Intrinsic<string GCCIntSuffix> 9501 : Hexagon_Intrinsic<GCCIntSuffix, 9502 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_i32_ty], 9503 [IntrNoMem]>; 9504 9505 // 9506 // Hexagon_V62_v1024v128ii_Intrinsic<string GCCIntSuffix> 9507 // tag : V6_vandnqrt_128B 9508 class Hexagon_V62_v1024v128ii_Intrinsic<string GCCIntSuffix> 9509 : Hexagon_Intrinsic<GCCIntSuffix, 9510 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_i32_ty], 9511 [IntrNoMem]>; 9512 9513 // 9514 // Hexagon_V62_v512v512v64ii_Intrinsic<string GCCIntSuffix> 9515 // tag : V6_vandnqrt_acc 9516 class Hexagon_V62_v512v512v64ii_Intrinsic<string GCCIntSuffix> 9517 : Hexagon_Intrinsic<GCCIntSuffix, 9518 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v512i1_ty,llvm_i32_ty], 9519 [IntrNoMem]>; 9520 9521 // 9522 // Hexagon_V62_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 9523 // tag : V6_vandnqrt_acc_128B 9524 class Hexagon_V62_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 9525 : Hexagon_Intrinsic<GCCIntSuffix, 9526 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v1024i1_ty,llvm_i32_ty], 9527 [IntrNoMem]>; 9528 9529 // 9530 // Hexagon_V62_v512v64iv512_Intrinsic<string GCCIntSuffix> 9531 // tag : V6_vandvqv 9532 class Hexagon_V62_v512v64iv512_Intrinsic<string GCCIntSuffix> 9533 : Hexagon_Intrinsic<GCCIntSuffix, 9534 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty], 9535 [IntrNoMem]>; 9536 9537 // 9538 // Hexagon_V62_v1024v128iv1024_Intrinsic<string GCCIntSuffix> 9539 // tag : V6_vandvqv_128B 9540 class Hexagon_V62_v1024v128iv1024_Intrinsic<string GCCIntSuffix> 9541 : Hexagon_Intrinsic<GCCIntSuffix, 9542 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty], 9543 [IntrNoMem]>; 9544 9545 // 9546 // Hexagon_V62_v64ii_Intrinsic<string GCCIntSuffix> 9547 // tag : V6_pred_scalar2v2 9548 class Hexagon_V62_v64ii_Intrinsic<string GCCIntSuffix> 9549 : Hexagon_Intrinsic<GCCIntSuffix, 9550 [llvm_v512i1_ty], [llvm_i32_ty], 9551 [IntrNoMem]>; 9552 9553 // 9554 // Hexagon_V62_v128ii_Intrinsic<string GCCIntSuffix> 9555 // tag : V6_pred_scalar2v2_128B 9556 class Hexagon_V62_v128ii_Intrinsic<string GCCIntSuffix> 9557 : Hexagon_Intrinsic<GCCIntSuffix, 9558 [llvm_v1024i1_ty], [llvm_i32_ty], 9559 [IntrNoMem]>; 9560 9561 // 9562 // Hexagon_V62_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 9563 // tag : V6_shuffeqw 9564 class Hexagon_V62_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 9565 : Hexagon_Intrinsic<GCCIntSuffix, 9566 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v512i1_ty], 9567 [IntrNoMem]>; 9568 9569 // 9570 // Hexagon_V62_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 9571 // tag : V6_shuffeqw_128B 9572 class Hexagon_V62_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 9573 : Hexagon_Intrinsic<GCCIntSuffix, 9574 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v1024i1_ty], 9575 [IntrNoMem]>; 9576 9577 // 9578 // Hexagon_V62_v512i_Intrinsic<string GCCIntSuffix> 9579 // tag : V6_lvsplath 9580 class Hexagon_V62_v512i_Intrinsic<string GCCIntSuffix> 9581 : Hexagon_Intrinsic<GCCIntSuffix, 9582 [llvm_v16i32_ty], [llvm_i32_ty], 9583 [IntrNoMem]>; 9584 9585 // 9586 // Hexagon_V62_v1024i_Intrinsic<string GCCIntSuffix> 9587 // tag : V6_lvsplath_128B 9588 class Hexagon_V62_v1024i_Intrinsic<string GCCIntSuffix> 9589 : Hexagon_Intrinsic<GCCIntSuffix, 9590 [llvm_v32i32_ty], [llvm_i32_ty], 9591 [IntrNoMem]>; 9592 9593 // 9594 // Hexagon_V62_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 9595 // tag : V6_vlutvvb_oracci 9596 class Hexagon_V62_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 9597 : Hexagon_Intrinsic<GCCIntSuffix, 9598 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9599 [IntrNoMem]>; 9600 9601 // 9602 // Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9603 // tag : V6_vlutvvb_oracci_128B 9604 class Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9605 : Hexagon_Intrinsic<GCCIntSuffix, 9606 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9607 [IntrNoMem]>; 9608 9609 // 9610 // Hexagon_V62_v1024v512v512i_Intrinsic<string GCCIntSuffix> 9611 // tag : V6_vlutvwhi 9612 class Hexagon_V62_v1024v512v512i_Intrinsic<string GCCIntSuffix> 9613 : Hexagon_Intrinsic<GCCIntSuffix, 9614 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9615 [IntrNoMem]>; 9616 9617 // 9618 // Hexagon_V62_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9619 // tag : V6_vlutvwhi_128B 9620 class Hexagon_V62_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9621 : Hexagon_Intrinsic<GCCIntSuffix, 9622 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9623 [IntrNoMem]>; 9624 9625 // 9626 // Hexagon_V62_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 9627 // tag : V6_vlutvwh_oracci 9628 class Hexagon_V62_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 9629 : Hexagon_Intrinsic<GCCIntSuffix, 9630 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9631 [IntrNoMem]>; 9632 9633 // 9634 // Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9635 // tag : V6_vlutvwh_oracci_128B 9636 class Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9637 : Hexagon_Intrinsic<GCCIntSuffix, 9638 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9639 [IntrNoMem]>; 9640 9641 9642 // 9643 // BUILTIN_INFO(HEXAGON.M6_vabsdiffb,DI_ftype_DIDI,2) 9644 // tag : M6_vabsdiffb 9645 def int_hexagon_M6_vabsdiffb : 9646 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_M6_vabsdiffb">; 9647 9648 // 9649 // BUILTIN_INFO(HEXAGON.M6_vabsdiffub,DI_ftype_DIDI,2) 9650 // tag : M6_vabsdiffub 9651 def int_hexagon_M6_vabsdiffub : 9652 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_M6_vabsdiffub">; 9653 9654 // 9655 // BUILTIN_INFO(HEXAGON.S6_vtrunehb_ppp,DI_ftype_DIDI,2) 9656 // tag : S6_vtrunehb_ppp 9657 def int_hexagon_S6_vtrunehb_ppp : 9658 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_S6_vtrunehb_ppp">; 9659 9660 // 9661 // BUILTIN_INFO(HEXAGON.S6_vtrunohb_ppp,DI_ftype_DIDI,2) 9662 // tag : S6_vtrunohb_ppp 9663 def int_hexagon_S6_vtrunohb_ppp : 9664 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_S6_vtrunohb_ppp">; 9665 9666 // 9667 // BUILTIN_INFO(HEXAGON.S6_vsplatrbp,DI_ftype_SI,1) 9668 // tag : S6_vsplatrbp 9669 def int_hexagon_S6_vsplatrbp : 9670 Hexagon_LLii_Intrinsic<"HEXAGON_S6_vsplatrbp">; 9671 9672 // 9673 // BUILTIN_INFO(HEXAGON.V6_vlsrb,VI_ftype_VISI,2) 9674 // tag : V6_vlsrb 9675 def int_hexagon_V6_vlsrb : 9676 Hexagon_V62_v512v512i_Intrinsic<"HEXAGON_V6_vlsrb">; 9677 9678 // 9679 // BUILTIN_INFO(HEXAGON.V6_vlsrb_128B,VI_ftype_VISI,2) 9680 // tag : V6_vlsrb_128B 9681 def int_hexagon_V6_vlsrb_128B : 9682 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrb_128B">; 9683 9684 // 9685 // BUILTIN_INFO(HEXAGON.V6_vasrwuhrndsat,VI_ftype_VIVISI,3) 9686 // tag : V6_vasrwuhrndsat 9687 def int_hexagon_V6_vasrwuhrndsat : 9688 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwuhrndsat">; 9689 9690 // 9691 // BUILTIN_INFO(HEXAGON.V6_vasrwuhrndsat_128B,VI_ftype_VIVISI,3) 9692 // tag : V6_vasrwuhrndsat_128B 9693 def int_hexagon_V6_vasrwuhrndsat_128B : 9694 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwuhrndsat_128B">; 9695 9696 // 9697 // BUILTIN_INFO(HEXAGON.V6_vasruwuhrndsat,VI_ftype_VIVISI,3) 9698 // tag : V6_vasruwuhrndsat 9699 def int_hexagon_V6_vasruwuhrndsat : 9700 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasruwuhrndsat">; 9701 9702 // 9703 // BUILTIN_INFO(HEXAGON.V6_vasruwuhrndsat_128B,VI_ftype_VIVISI,3) 9704 // tag : V6_vasruwuhrndsat_128B 9705 def int_hexagon_V6_vasruwuhrndsat_128B : 9706 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasruwuhrndsat_128B">; 9707 9708 // 9709 // BUILTIN_INFO(HEXAGON.V6_vasrhbsat,VI_ftype_VIVISI,3) 9710 // tag : V6_vasrhbsat 9711 def int_hexagon_V6_vasrhbsat : 9712 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhbsat">; 9713 9714 // 9715 // BUILTIN_INFO(HEXAGON.V6_vasrhbsat_128B,VI_ftype_VIVISI,3) 9716 // tag : V6_vasrhbsat_128B 9717 def int_hexagon_V6_vasrhbsat_128B : 9718 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhbsat_128B">; 9719 9720 // 9721 // BUILTIN_INFO(HEXAGON.V6_vrounduwuh,VI_ftype_VIVI,2) 9722 // tag : V6_vrounduwuh 9723 def int_hexagon_V6_vrounduwuh : 9724 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vrounduwuh">; 9725 9726 // 9727 // BUILTIN_INFO(HEXAGON.V6_vrounduwuh_128B,VI_ftype_VIVI,2) 9728 // tag : V6_vrounduwuh_128B 9729 def int_hexagon_V6_vrounduwuh_128B : 9730 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrounduwuh_128B">; 9731 9732 // 9733 // BUILTIN_INFO(HEXAGON.V6_vrounduhub,VI_ftype_VIVI,2) 9734 // tag : V6_vrounduhub 9735 def int_hexagon_V6_vrounduhub : 9736 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vrounduhub">; 9737 9738 // 9739 // BUILTIN_INFO(HEXAGON.V6_vrounduhub_128B,VI_ftype_VIVI,2) 9740 // tag : V6_vrounduhub_128B 9741 def int_hexagon_V6_vrounduhub_128B : 9742 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrounduhub_128B">; 9743 9744 // 9745 // BUILTIN_INFO(HEXAGON.V6_vadduwsat,VI_ftype_VIVI,2) 9746 // tag : V6_vadduwsat 9747 def int_hexagon_V6_vadduwsat : 9748 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vadduwsat">; 9749 9750 // 9751 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_128B,VI_ftype_VIVI,2) 9752 // tag : V6_vadduwsat_128B 9753 def int_hexagon_V6_vadduwsat_128B : 9754 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduwsat_128B">; 9755 9756 // 9757 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_dv,VD_ftype_VDVD,2) 9758 // tag : V6_vadduwsat_dv 9759 def int_hexagon_V6_vadduwsat_dv : 9760 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduwsat_dv">; 9761 9762 // 9763 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_dv_128B,VD_ftype_VDVD,2) 9764 // tag : V6_vadduwsat_dv_128B 9765 def int_hexagon_V6_vadduwsat_dv_128B : 9766 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vadduwsat_dv_128B">; 9767 9768 // 9769 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat,VI_ftype_VIVI,2) 9770 // tag : V6_vsubuwsat 9771 def int_hexagon_V6_vsubuwsat : 9772 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubuwsat">; 9773 9774 // 9775 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_128B,VI_ftype_VIVI,2) 9776 // tag : V6_vsubuwsat_128B 9777 def int_hexagon_V6_vsubuwsat_128B : 9778 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuwsat_128B">; 9779 9780 // 9781 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_dv,VD_ftype_VDVD,2) 9782 // tag : V6_vsubuwsat_dv 9783 def int_hexagon_V6_vsubuwsat_dv : 9784 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuwsat_dv">; 9785 9786 // 9787 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_dv_128B,VD_ftype_VDVD,2) 9788 // tag : V6_vsubuwsat_dv_128B 9789 def int_hexagon_V6_vsubuwsat_dv_128B : 9790 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubuwsat_dv_128B">; 9791 9792 // 9793 // BUILTIN_INFO(HEXAGON.V6_vaddbsat,VI_ftype_VIVI,2) 9794 // tag : V6_vaddbsat 9795 def int_hexagon_V6_vaddbsat : 9796 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddbsat">; 9797 9798 // 9799 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_128B,VI_ftype_VIVI,2) 9800 // tag : V6_vaddbsat_128B 9801 def int_hexagon_V6_vaddbsat_128B : 9802 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddbsat_128B">; 9803 9804 // 9805 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_dv,VD_ftype_VDVD,2) 9806 // tag : V6_vaddbsat_dv 9807 def int_hexagon_V6_vaddbsat_dv : 9808 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddbsat_dv">; 9809 9810 // 9811 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_dv_128B,VD_ftype_VDVD,2) 9812 // tag : V6_vaddbsat_dv_128B 9813 def int_hexagon_V6_vaddbsat_dv_128B : 9814 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddbsat_dv_128B">; 9815 9816 // 9817 // BUILTIN_INFO(HEXAGON.V6_vsubbsat,VI_ftype_VIVI,2) 9818 // tag : V6_vsubbsat 9819 def int_hexagon_V6_vsubbsat : 9820 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubbsat">; 9821 9822 // 9823 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_128B,VI_ftype_VIVI,2) 9824 // tag : V6_vsubbsat_128B 9825 def int_hexagon_V6_vsubbsat_128B : 9826 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubbsat_128B">; 9827 9828 // 9829 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_dv,VD_ftype_VDVD,2) 9830 // tag : V6_vsubbsat_dv 9831 def int_hexagon_V6_vsubbsat_dv : 9832 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubbsat_dv">; 9833 9834 // 9835 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_dv_128B,VD_ftype_VDVD,2) 9836 // tag : V6_vsubbsat_dv_128B 9837 def int_hexagon_V6_vsubbsat_dv_128B : 9838 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubbsat_dv_128B">; 9839 9840 // 9841 // BUILTIN_INFO(HEXAGON.V6_vaddububb_sat,VI_ftype_VIVI,2) 9842 // tag : V6_vaddububb_sat 9843 def int_hexagon_V6_vaddububb_sat : 9844 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddububb_sat">; 9845 9846 // 9847 // BUILTIN_INFO(HEXAGON.V6_vaddububb_sat_128B,VI_ftype_VIVI,2) 9848 // tag : V6_vaddububb_sat_128B 9849 def int_hexagon_V6_vaddububb_sat_128B : 9850 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddububb_sat_128B">; 9851 9852 // 9853 // BUILTIN_INFO(HEXAGON.V6_vsubububb_sat,VI_ftype_VIVI,2) 9854 // tag : V6_vsubububb_sat 9855 def int_hexagon_V6_vsubububb_sat : 9856 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubububb_sat">; 9857 9858 // 9859 // BUILTIN_INFO(HEXAGON.V6_vsubububb_sat_128B,VI_ftype_VIVI,2) 9860 // tag : V6_vsubububb_sat_128B 9861 def int_hexagon_V6_vsubububb_sat_128B : 9862 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubububb_sat_128B">; 9863 9864 // 9865 // BUILTIN_INFO(HEXAGON.V6_vaddhw_acc,VD_ftype_VDVIVI,3) 9866 // tag : V6_vaddhw_acc 9867 def int_hexagon_V6_vaddhw_acc : 9868 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vaddhw_acc">; 9869 9870 // 9871 // BUILTIN_INFO(HEXAGON.V6_vaddhw_acc_128B,VD_ftype_VDVIVI,3) 9872 // tag : V6_vaddhw_acc_128B 9873 def int_hexagon_V6_vaddhw_acc_128B : 9874 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddhw_acc_128B">; 9875 9876 // 9877 // BUILTIN_INFO(HEXAGON.V6_vadduhw_acc,VD_ftype_VDVIVI,3) 9878 // tag : V6_vadduhw_acc 9879 def int_hexagon_V6_vadduhw_acc : 9880 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vadduhw_acc">; 9881 9882 // 9883 // BUILTIN_INFO(HEXAGON.V6_vadduhw_acc_128B,VD_ftype_VDVIVI,3) 9884 // tag : V6_vadduhw_acc_128B 9885 def int_hexagon_V6_vadduhw_acc_128B : 9886 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vadduhw_acc_128B">; 9887 9888 // 9889 // BUILTIN_INFO(HEXAGON.V6_vaddubh_acc,VD_ftype_VDVIVI,3) 9890 // tag : V6_vaddubh_acc 9891 def int_hexagon_V6_vaddubh_acc : 9892 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vaddubh_acc">; 9893 9894 // 9895 // BUILTIN_INFO(HEXAGON.V6_vaddubh_acc_128B,VD_ftype_VDVIVI,3) 9896 // tag : V6_vaddubh_acc_128B 9897 def int_hexagon_V6_vaddubh_acc_128B : 9898 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddubh_acc_128B">; 9899 9900 // 9901 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_64,VD_ftype_VIVI,2) 9902 // tag : V6_vmpyewuh_64 9903 def int_hexagon_V6_vmpyewuh_64 : 9904 Hexagon_V62_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyewuh_64">; 9905 9906 // 9907 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_64_128B,VD_ftype_VIVI,2) 9908 // tag : V6_vmpyewuh_64_128B 9909 def int_hexagon_V6_vmpyewuh_64_128B : 9910 Hexagon_V62_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyewuh_64_128B">; 9911 9912 // 9913 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_64_acc,VD_ftype_VDVIVI,3) 9914 // tag : V6_vmpyowh_64_acc 9915 def int_hexagon_V6_vmpyowh_64_acc : 9916 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_64_acc">; 9917 9918 // 9919 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_64_acc_128B,VD_ftype_VDVIVI,3) 9920 // tag : V6_vmpyowh_64_acc_128B 9921 def int_hexagon_V6_vmpyowh_64_acc_128B : 9922 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_64_acc_128B">; 9923 9924 // 9925 // BUILTIN_INFO(HEXAGON.V6_vmpauhb,VD_ftype_VDSI,2) 9926 // tag : V6_vmpauhb 9927 def int_hexagon_V6_vmpauhb : 9928 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpauhb">; 9929 9930 // 9931 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_128B,VD_ftype_VDSI,2) 9932 // tag : V6_vmpauhb_128B 9933 def int_hexagon_V6_vmpauhb_128B : 9934 Hexagon_V62_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpauhb_128B">; 9935 9936 // 9937 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_acc,VD_ftype_VDVDSI,3) 9938 // tag : V6_vmpauhb_acc 9939 def int_hexagon_V6_vmpauhb_acc : 9940 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpauhb_acc">; 9941 9942 // 9943 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_acc_128B,VD_ftype_VDVDSI,3) 9944 // tag : V6_vmpauhb_acc_128B 9945 def int_hexagon_V6_vmpauhb_acc_128B : 9946 Hexagon_V62_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpauhb_acc_128B">; 9947 9948 // 9949 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub,VI_ftype_VISI,2) 9950 // tag : V6_vmpyiwub 9951 def int_hexagon_V6_vmpyiwub : 9952 Hexagon_V62_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwub">; 9953 9954 // 9955 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_128B,VI_ftype_VISI,2) 9956 // tag : V6_vmpyiwub_128B 9957 def int_hexagon_V6_vmpyiwub_128B : 9958 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwub_128B">; 9959 9960 // 9961 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_acc,VI_ftype_VIVISI,3) 9962 // tag : V6_vmpyiwub_acc 9963 def int_hexagon_V6_vmpyiwub_acc : 9964 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwub_acc">; 9965 9966 // 9967 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_acc_128B,VI_ftype_VIVISI,3) 9968 // tag : V6_vmpyiwub_acc_128B 9969 def int_hexagon_V6_vmpyiwub_acc_128B : 9970 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwub_acc_128B">; 9971 9972 // 9973 // BUILTIN_INFO(HEXAGON.V6_vandnqrt,VI_ftype_QVSI,2) 9974 // tag : V6_vandnqrt 9975 def int_hexagon_V6_vandnqrt : 9976 Hexagon_V62_v512v64ii_Intrinsic<"HEXAGON_V6_vandnqrt">; 9977 9978 // 9979 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_128B,VI_ftype_QVSI,2) 9980 // tag : V6_vandnqrt_128B 9981 def int_hexagon_V6_vandnqrt_128B : 9982 Hexagon_V62_v1024v128ii_Intrinsic<"HEXAGON_V6_vandnqrt_128B">; 9983 9984 // 9985 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_acc,VI_ftype_VIQVSI,3) 9986 // tag : V6_vandnqrt_acc 9987 def int_hexagon_V6_vandnqrt_acc : 9988 Hexagon_V62_v512v512v64ii_Intrinsic<"HEXAGON_V6_vandnqrt_acc">; 9989 9990 // 9991 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_acc_128B,VI_ftype_VIQVSI,3) 9992 // tag : V6_vandnqrt_acc_128B 9993 def int_hexagon_V6_vandnqrt_acc_128B : 9994 Hexagon_V62_v1024v1024v128ii_Intrinsic<"HEXAGON_V6_vandnqrt_acc_128B">; 9995 9996 // 9997 // BUILTIN_INFO(HEXAGON.V6_vandvqv,VI_ftype_QVVI,2) 9998 // tag : V6_vandvqv 9999 def int_hexagon_V6_vandvqv : 10000 Hexagon_V62_v512v64iv512_Intrinsic<"HEXAGON_V6_vandvqv">; 10001 10002 // 10003 // BUILTIN_INFO(HEXAGON.V6_vandvqv_128B,VI_ftype_QVVI,2) 10004 // tag : V6_vandvqv_128B 10005 def int_hexagon_V6_vandvqv_128B : 10006 Hexagon_V62_v1024v128iv1024_Intrinsic<"HEXAGON_V6_vandvqv_128B">; 10007 10008 // 10009 // BUILTIN_INFO(HEXAGON.V6_vandvnqv,VI_ftype_QVVI,2) 10010 // tag : V6_vandvnqv 10011 def int_hexagon_V6_vandvnqv : 10012 Hexagon_V62_v512v64iv512_Intrinsic<"HEXAGON_V6_vandvnqv">; 10013 10014 // 10015 // BUILTIN_INFO(HEXAGON.V6_vandvnqv_128B,VI_ftype_QVVI,2) 10016 // tag : V6_vandvnqv_128B 10017 def int_hexagon_V6_vandvnqv_128B : 10018 Hexagon_V62_v1024v128iv1024_Intrinsic<"HEXAGON_V6_vandvnqv_128B">; 10019 10020 // 10021 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2v2,QV_ftype_SI,1) 10022 // tag : V6_pred_scalar2v2 10023 def int_hexagon_V6_pred_scalar2v2 : 10024 Hexagon_V62_v64ii_Intrinsic<"HEXAGON_V6_pred_scalar2v2">; 10025 10026 // 10027 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2v2_128B,QV_ftype_SI,1) 10028 // tag : V6_pred_scalar2v2_128B 10029 def int_hexagon_V6_pred_scalar2v2_128B : 10030 Hexagon_V62_v128ii_Intrinsic<"HEXAGON_V6_pred_scalar2v2_128B">; 10031 10032 // 10033 // BUILTIN_INFO(HEXAGON.V6_shuffeqw,QV_ftype_QVQV,2) 10034 // tag : V6_shuffeqw 10035 def int_hexagon_V6_shuffeqw : 10036 Hexagon_V62_v64iv64iv64i_Intrinsic<"HEXAGON_V6_shuffeqw">; 10037 10038 // 10039 // BUILTIN_INFO(HEXAGON.V6_shuffeqw_128B,QV_ftype_QVQV,2) 10040 // tag : V6_shuffeqw_128B 10041 def int_hexagon_V6_shuffeqw_128B : 10042 Hexagon_V62_v128iv128iv128i_Intrinsic<"HEXAGON_V6_shuffeqw_128B">; 10043 10044 // 10045 // BUILTIN_INFO(HEXAGON.V6_shuffeqh,QV_ftype_QVQV,2) 10046 // tag : V6_shuffeqh 10047 def int_hexagon_V6_shuffeqh : 10048 Hexagon_V62_v64iv64iv64i_Intrinsic<"HEXAGON_V6_shuffeqh">; 10049 10050 // 10051 // BUILTIN_INFO(HEXAGON.V6_shuffeqh_128B,QV_ftype_QVQV,2) 10052 // tag : V6_shuffeqh_128B 10053 def int_hexagon_V6_shuffeqh_128B : 10054 Hexagon_V62_v128iv128iv128i_Intrinsic<"HEXAGON_V6_shuffeqh_128B">; 10055 10056 // 10057 // BUILTIN_INFO(HEXAGON.V6_vmaxb,VI_ftype_VIVI,2) 10058 // tag : V6_vmaxb 10059 def int_hexagon_V6_vmaxb : 10060 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxb">; 10061 10062 // 10063 // BUILTIN_INFO(HEXAGON.V6_vmaxb_128B,VI_ftype_VIVI,2) 10064 // tag : V6_vmaxb_128B 10065 def int_hexagon_V6_vmaxb_128B : 10066 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxb_128B">; 10067 10068 // 10069 // BUILTIN_INFO(HEXAGON.V6_vminb,VI_ftype_VIVI,2) 10070 // tag : V6_vminb 10071 def int_hexagon_V6_vminb : 10072 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vminb">; 10073 10074 // 10075 // BUILTIN_INFO(HEXAGON.V6_vminb_128B,VI_ftype_VIVI,2) 10076 // tag : V6_vminb_128B 10077 def int_hexagon_V6_vminb_128B : 10078 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminb_128B">; 10079 10080 // 10081 // BUILTIN_INFO(HEXAGON.V6_vsatuwuh,VI_ftype_VIVI,2) 10082 // tag : V6_vsatuwuh 10083 def int_hexagon_V6_vsatuwuh : 10084 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsatuwuh">; 10085 10086 // 10087 // BUILTIN_INFO(HEXAGON.V6_vsatuwuh_128B,VI_ftype_VIVI,2) 10088 // tag : V6_vsatuwuh_128B 10089 def int_hexagon_V6_vsatuwuh_128B : 10090 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsatuwuh_128B">; 10091 10092 // 10093 // BUILTIN_INFO(HEXAGON.V6_lvsplath,VI_ftype_SI,1) 10094 // tag : V6_lvsplath 10095 def int_hexagon_V6_lvsplath : 10096 Hexagon_V62_v512i_Intrinsic<"HEXAGON_V6_lvsplath">; 10097 10098 // 10099 // BUILTIN_INFO(HEXAGON.V6_lvsplath_128B,VI_ftype_SI,1) 10100 // tag : V6_lvsplath_128B 10101 def int_hexagon_V6_lvsplath_128B : 10102 Hexagon_V62_v1024i_Intrinsic<"HEXAGON_V6_lvsplath_128B">; 10103 10104 // 10105 // BUILTIN_INFO(HEXAGON.V6_lvsplatb,VI_ftype_SI,1) 10106 // tag : V6_lvsplatb 10107 def int_hexagon_V6_lvsplatb : 10108 Hexagon_V62_v512i_Intrinsic<"HEXAGON_V6_lvsplatb">; 10109 10110 // 10111 // BUILTIN_INFO(HEXAGON.V6_lvsplatb_128B,VI_ftype_SI,1) 10112 // tag : V6_lvsplatb_128B 10113 def int_hexagon_V6_lvsplatb_128B : 10114 Hexagon_V62_v1024i_Intrinsic<"HEXAGON_V6_lvsplatb_128B">; 10115 10116 // 10117 // BUILTIN_INFO(HEXAGON.V6_vaddclbw,VI_ftype_VIVI,2) 10118 // tag : V6_vaddclbw 10119 def int_hexagon_V6_vaddclbw : 10120 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddclbw">; 10121 10122 // 10123 // BUILTIN_INFO(HEXAGON.V6_vaddclbw_128B,VI_ftype_VIVI,2) 10124 // tag : V6_vaddclbw_128B 10125 def int_hexagon_V6_vaddclbw_128B : 10126 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddclbw_128B">; 10127 10128 // 10129 // BUILTIN_INFO(HEXAGON.V6_vaddclbh,VI_ftype_VIVI,2) 10130 // tag : V6_vaddclbh 10131 def int_hexagon_V6_vaddclbh : 10132 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddclbh">; 10133 10134 // 10135 // BUILTIN_INFO(HEXAGON.V6_vaddclbh_128B,VI_ftype_VIVI,2) 10136 // tag : V6_vaddclbh_128B 10137 def int_hexagon_V6_vaddclbh_128B : 10138 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddclbh_128B">; 10139 10140 // 10141 // BUILTIN_INFO(HEXAGON.V6_vlutvvbi,VI_ftype_VIVISI,3) 10142 // tag : V6_vlutvvbi 10143 def int_hexagon_V6_vlutvvbi : 10144 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvbi">; 10145 10146 // 10147 // BUILTIN_INFO(HEXAGON.V6_vlutvvbi_128B,VI_ftype_VIVISI,3) 10148 // tag : V6_vlutvvbi_128B 10149 def int_hexagon_V6_vlutvvbi_128B : 10150 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvbi_128B">; 10151 10152 // 10153 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracci,VI_ftype_VIVIVISI,4) 10154 // tag : V6_vlutvvb_oracci 10155 def int_hexagon_V6_vlutvvb_oracci : 10156 Hexagon_V62_v512v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_oracci">; 10157 10158 // 10159 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracci_128B,VI_ftype_VIVIVISI,4) 10160 // tag : V6_vlutvvb_oracci_128B 10161 def int_hexagon_V6_vlutvvb_oracci_128B : 10162 Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_oracci_128B">; 10163 10164 // 10165 // BUILTIN_INFO(HEXAGON.V6_vlutvwhi,VD_ftype_VIVISI,3) 10166 // tag : V6_vlutvwhi 10167 def int_hexagon_V6_vlutvwhi : 10168 Hexagon_V62_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwhi">; 10169 10170 // 10171 // BUILTIN_INFO(HEXAGON.V6_vlutvwhi_128B,VD_ftype_VIVISI,3) 10172 // tag : V6_vlutvwhi_128B 10173 def int_hexagon_V6_vlutvwhi_128B : 10174 Hexagon_V62_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwhi_128B">; 10175 10176 // 10177 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracci,VD_ftype_VDVIVISI,4) 10178 // tag : V6_vlutvwh_oracci 10179 def int_hexagon_V6_vlutvwh_oracci : 10180 Hexagon_V62_v1024v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_oracci">; 10181 10182 // 10183 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracci_128B,VD_ftype_VDVIVISI,4) 10184 // tag : V6_vlutvwh_oracci_128B 10185 def int_hexagon_V6_vlutvwh_oracci_128B : 10186 Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_oracci_128B">; 10187 10188 // 10189 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_nm,VI_ftype_VIVISI,3) 10190 // tag : V6_vlutvvb_nm 10191 def int_hexagon_V6_vlutvvb_nm : 10192 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_nm">; 10193 10194 // 10195 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_nm_128B,VI_ftype_VIVISI,3) 10196 // tag : V6_vlutvvb_nm_128B 10197 def int_hexagon_V6_vlutvvb_nm_128B : 10198 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_nm_128B">; 10199 10200 // 10201 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_nm,VD_ftype_VIVISI,3) 10202 // tag : V6_vlutvwh_nm 10203 def int_hexagon_V6_vlutvwh_nm : 10204 Hexagon_V62_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_nm">; 10205 10206 // 10207 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_nm_128B,VD_ftype_VIVISI,3) 10208 // tag : V6_vlutvwh_nm_128B 10209 def int_hexagon_V6_vlutvwh_nm_128B : 10210 Hexagon_V62_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_nm_128B">; 10211 10212
