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      1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
      2 |*                                                                            *|
      3 |* Intrinsic Function Source Fragment                                         *|
      4 |*                                                                            *|
      5 |* Automatically generated file, do not edit!                                 *|
      6 |*                                                                            *|
      7 \*===----------------------------------------------------------------------===*/
      8 
      9 // VisualStudio defines setjmp as _setjmp
     10 #if defined(_MSC_VER) && defined(setjmp) && \
     11                          !defined(setjmp_undefined_for_msvc)
     12 #  pragma push_macro("setjmp")
     13 #  undef setjmp
     14 #  define setjmp_undefined_for_msvc
     15 #endif
     16 
     17 // Enum values for Intrinsics.h
     18 #ifdef GET_INTRINSIC_ENUM_VALUES
     19     addressofreturnaddress,                    // llvm.addressofreturnaddress
     20     adjust_trampoline,                         // llvm.adjust.trampoline
     21     annotation,                                // llvm.annotation
     22     assume,                                    // llvm.assume
     23     bitreverse,                                // llvm.bitreverse
     24     bswap,                                     // llvm.bswap
     25     canonicalize,                              // llvm.canonicalize
     26     ceil,                                      // llvm.ceil
     27     clear_cache,                               // llvm.clear_cache
     28     codeview_annotation,                       // llvm.codeview.annotation
     29     convert_from_fp16,                         // llvm.convert.from.fp16
     30     convert_to_fp16,                           // llvm.convert.to.fp16
     31     copysign,                                  // llvm.copysign
     32     coro_alloc,                                // llvm.coro.alloc
     33     coro_begin,                                // llvm.coro.begin
     34     coro_destroy,                              // llvm.coro.destroy
     35     coro_done,                                 // llvm.coro.done
     36     coro_end,                                  // llvm.coro.end
     37     coro_frame,                                // llvm.coro.frame
     38     coro_free,                                 // llvm.coro.free
     39     coro_id,                                   // llvm.coro.id
     40     coro_param,                                // llvm.coro.param
     41     coro_promise,                              // llvm.coro.promise
     42     coro_resume,                               // llvm.coro.resume
     43     coro_save,                                 // llvm.coro.save
     44     coro_size,                                 // llvm.coro.size
     45     coro_subfn_addr,                           // llvm.coro.subfn.addr
     46     coro_suspend,                              // llvm.coro.suspend
     47     cos,                                       // llvm.cos
     48     ctlz,                                      // llvm.ctlz
     49     ctpop,                                     // llvm.ctpop
     50     cttz,                                      // llvm.cttz
     51     dbg_addr,                                  // llvm.dbg.addr
     52     dbg_declare,                               // llvm.dbg.declare
     53     dbg_value,                                 // llvm.dbg.value
     54     debugtrap,                                 // llvm.debugtrap
     55     donothing,                                 // llvm.donothing
     56     eh_dwarf_cfa,                              // llvm.eh.dwarf.cfa
     57     eh_exceptioncode,                          // llvm.eh.exceptioncode
     58     eh_exceptionpointer,                       // llvm.eh.exceptionpointer
     59     eh_return_i32,                             // llvm.eh.return.i32
     60     eh_return_i64,                             // llvm.eh.return.i64
     61     eh_sjlj_callsite,                          // llvm.eh.sjlj.callsite
     62     eh_sjlj_functioncontext,                   // llvm.eh.sjlj.functioncontext
     63     eh_sjlj_longjmp,                           // llvm.eh.sjlj.longjmp
     64     eh_sjlj_lsda,                              // llvm.eh.sjlj.lsda
     65     eh_sjlj_setjmp,                            // llvm.eh.sjlj.setjmp
     66     eh_sjlj_setup_dispatch,                    // llvm.eh.sjlj.setup.dispatch
     67     eh_typeid_for,                             // llvm.eh.typeid.for
     68     eh_unwind_init,                            // llvm.eh.unwind.init
     69     exp,                                       // llvm.exp
     70     exp2,                                      // llvm.exp2
     71     expect,                                    // llvm.expect
     72     experimental_constrained_cos,              // llvm.experimental.constrained.cos
     73     experimental_constrained_exp,              // llvm.experimental.constrained.exp
     74     experimental_constrained_exp2,             // llvm.experimental.constrained.exp2
     75     experimental_constrained_fadd,             // llvm.experimental.constrained.fadd
     76     experimental_constrained_fdiv,             // llvm.experimental.constrained.fdiv
     77     experimental_constrained_fma,              // llvm.experimental.constrained.fma
     78     experimental_constrained_fmul,             // llvm.experimental.constrained.fmul
     79     experimental_constrained_frem,             // llvm.experimental.constrained.frem
     80     experimental_constrained_fsub,             // llvm.experimental.constrained.fsub
     81     experimental_constrained_log,              // llvm.experimental.constrained.log
     82     experimental_constrained_log10,            // llvm.experimental.constrained.log10
     83     experimental_constrained_log2,             // llvm.experimental.constrained.log2
     84     experimental_constrained_nearbyint,        // llvm.experimental.constrained.nearbyint
     85     experimental_constrained_pow,              // llvm.experimental.constrained.pow
     86     experimental_constrained_powi,             // llvm.experimental.constrained.powi
     87     experimental_constrained_rint,             // llvm.experimental.constrained.rint
     88     experimental_constrained_sin,              // llvm.experimental.constrained.sin
     89     experimental_constrained_sqrt,             // llvm.experimental.constrained.sqrt
     90     experimental_deoptimize,                   // llvm.experimental.deoptimize
     91     experimental_gc_relocate,                  // llvm.experimental.gc.relocate
     92     experimental_gc_result,                    // llvm.experimental.gc.result
     93     experimental_gc_statepoint,                // llvm.experimental.gc.statepoint
     94     experimental_guard,                        // llvm.experimental.guard
     95     experimental_patchpoint_i64,               // llvm.experimental.patchpoint.i64
     96     experimental_patchpoint_void,              // llvm.experimental.patchpoint.void
     97     experimental_stackmap,                     // llvm.experimental.stackmap
     98     experimental_vector_reduce_add,            // llvm.experimental.vector.reduce.add
     99     experimental_vector_reduce_and,            // llvm.experimental.vector.reduce.and
    100     experimental_vector_reduce_fadd,           // llvm.experimental.vector.reduce.fadd
    101     experimental_vector_reduce_fmax,           // llvm.experimental.vector.reduce.fmax
    102     experimental_vector_reduce_fmin,           // llvm.experimental.vector.reduce.fmin
    103     experimental_vector_reduce_fmul,           // llvm.experimental.vector.reduce.fmul
    104     experimental_vector_reduce_mul,            // llvm.experimental.vector.reduce.mul
    105     experimental_vector_reduce_or,             // llvm.experimental.vector.reduce.or
    106     experimental_vector_reduce_smax,           // llvm.experimental.vector.reduce.smax
    107     experimental_vector_reduce_smin,           // llvm.experimental.vector.reduce.smin
    108     experimental_vector_reduce_umax,           // llvm.experimental.vector.reduce.umax
    109     experimental_vector_reduce_umin,           // llvm.experimental.vector.reduce.umin
    110     experimental_vector_reduce_xor,            // llvm.experimental.vector.reduce.xor
    111     fabs,                                      // llvm.fabs
    112     floor,                                     // llvm.floor
    113     flt_rounds,                                // llvm.flt.rounds
    114     fma,                                       // llvm.fma
    115     fmuladd,                                   // llvm.fmuladd
    116     frameaddress,                              // llvm.frameaddress
    117     gcread,                                    // llvm.gcread
    118     gcroot,                                    // llvm.gcroot
    119     gcwrite,                                   // llvm.gcwrite
    120     get_dynamic_area_offset,                   // llvm.get.dynamic.area.offset
    121     init_trampoline,                           // llvm.init.trampoline
    122     instrprof_increment,                       // llvm.instrprof.increment
    123     instrprof_increment_step,                  // llvm.instrprof.increment.step
    124     instrprof_value_profile,                   // llvm.instrprof.value.profile
    125     invariant_end,                             // llvm.invariant.end
    126     invariant_group_barrier,                   // llvm.invariant.group.barrier
    127     invariant_start,                           // llvm.invariant.start
    128     lifetime_end,                              // llvm.lifetime.end
    129     lifetime_start,                            // llvm.lifetime.start
    130     load_relative,                             // llvm.load.relative
    131     localaddress,                              // llvm.localaddress
    132     localescape,                               // llvm.localescape
    133     localrecover,                              // llvm.localrecover
    134     log,                                       // llvm.log
    135     log10,                                     // llvm.log10
    136     log2,                                      // llvm.log2
    137     longjmp,                                   // llvm.longjmp
    138     masked_compressstore,                      // llvm.masked.compressstore
    139     masked_expandload,                         // llvm.masked.expandload
    140     masked_gather,                             // llvm.masked.gather
    141     masked_load,                               // llvm.masked.load
    142     masked_scatter,                            // llvm.masked.scatter
    143     masked_store,                              // llvm.masked.store
    144     maxnum,                                    // llvm.maxnum
    145     memcpy,                                    // llvm.memcpy
    146     memcpy_element_unordered_atomic,           // llvm.memcpy.element.unordered.atomic
    147     memmove,                                   // llvm.memmove
    148     memmove_element_unordered_atomic,          // llvm.memmove.element.unordered.atomic
    149     memset,                                    // llvm.memset
    150     memset_element_unordered_atomic,           // llvm.memset.element.unordered.atomic
    151     minnum,                                    // llvm.minnum
    152     nearbyint,                                 // llvm.nearbyint
    153     objectsize,                                // llvm.objectsize
    154     pcmarker,                                  // llvm.pcmarker
    155     pow,                                       // llvm.pow
    156     powi,                                      // llvm.powi
    157     prefetch,                                  // llvm.prefetch
    158     ptr_annotation,                            // llvm.ptr.annotation
    159     read_register,                             // llvm.read_register
    160     readcyclecounter,                          // llvm.readcyclecounter
    161     returnaddress,                             // llvm.returnaddress
    162     rint,                                      // llvm.rint
    163     round,                                     // llvm.round
    164     sadd_with_overflow,                        // llvm.sadd.with.overflow
    165     setjmp,                                    // llvm.setjmp
    166     siglongjmp,                                // llvm.siglongjmp
    167     sigsetjmp,                                 // llvm.sigsetjmp
    168     sin,                                       // llvm.sin
    169     smul_with_overflow,                        // llvm.smul.with.overflow
    170     sqrt,                                      // llvm.sqrt
    171     ssa_copy,                                  // llvm.ssa.copy
    172     ssub_with_overflow,                        // llvm.ssub.with.overflow
    173     stackguard,                                // llvm.stackguard
    174     stackprotector,                            // llvm.stackprotector
    175     stackrestore,                              // llvm.stackrestore
    176     stacksave,                                 // llvm.stacksave
    177     thread_pointer,                            // llvm.thread.pointer
    178     trap,                                      // llvm.trap
    179     trunc,                                     // llvm.trunc
    180     type_checked_load,                         // llvm.type.checked.load
    181     type_test,                                 // llvm.type.test
    182     uadd_with_overflow,                        // llvm.uadd.with.overflow
    183     umul_with_overflow,                        // llvm.umul.with.overflow
    184     usub_with_overflow,                        // llvm.usub.with.overflow
    185     vacopy,                                    // llvm.va_copy
    186     vaend,                                     // llvm.va_end
    187     vastart,                                   // llvm.va_start
    188     var_annotation,                            // llvm.var.annotation
    189     write_register,                            // llvm.write_register
    190     xray_customevent,                          // llvm.xray.customevent
    191     aarch64_clrex,                             // llvm.aarch64.clrex
    192     aarch64_crc32b,                            // llvm.aarch64.crc32b
    193     aarch64_crc32cb,                           // llvm.aarch64.crc32cb
    194     aarch64_crc32ch,                           // llvm.aarch64.crc32ch
    195     aarch64_crc32cw,                           // llvm.aarch64.crc32cw
    196     aarch64_crc32cx,                           // llvm.aarch64.crc32cx
    197     aarch64_crc32h,                            // llvm.aarch64.crc32h
    198     aarch64_crc32w,                            // llvm.aarch64.crc32w
    199     aarch64_crc32x,                            // llvm.aarch64.crc32x
    200     aarch64_crypto_aesd,                       // llvm.aarch64.crypto.aesd
    201     aarch64_crypto_aese,                       // llvm.aarch64.crypto.aese
    202     aarch64_crypto_aesimc,                     // llvm.aarch64.crypto.aesimc
    203     aarch64_crypto_aesmc,                      // llvm.aarch64.crypto.aesmc
    204     aarch64_crypto_sha1c,                      // llvm.aarch64.crypto.sha1c
    205     aarch64_crypto_sha1h,                      // llvm.aarch64.crypto.sha1h
    206     aarch64_crypto_sha1m,                      // llvm.aarch64.crypto.sha1m
    207     aarch64_crypto_sha1p,                      // llvm.aarch64.crypto.sha1p
    208     aarch64_crypto_sha1su0,                    // llvm.aarch64.crypto.sha1su0
    209     aarch64_crypto_sha1su1,                    // llvm.aarch64.crypto.sha1su1
    210     aarch64_crypto_sha256h,                    // llvm.aarch64.crypto.sha256h
    211     aarch64_crypto_sha256h2,                   // llvm.aarch64.crypto.sha256h2
    212     aarch64_crypto_sha256su0,                  // llvm.aarch64.crypto.sha256su0
    213     aarch64_crypto_sha256su1,                  // llvm.aarch64.crypto.sha256su1
    214     aarch64_dmb,                               // llvm.aarch64.dmb
    215     aarch64_dsb,                               // llvm.aarch64.dsb
    216     aarch64_hint,                              // llvm.aarch64.hint
    217     aarch64_isb,                               // llvm.aarch64.isb
    218     aarch64_ldaxp,                             // llvm.aarch64.ldaxp
    219     aarch64_ldaxr,                             // llvm.aarch64.ldaxr
    220     aarch64_ldxp,                              // llvm.aarch64.ldxp
    221     aarch64_ldxr,                              // llvm.aarch64.ldxr
    222     aarch64_neon_abs,                          // llvm.aarch64.neon.abs
    223     aarch64_neon_addhn,                        // llvm.aarch64.neon.addhn
    224     aarch64_neon_addp,                         // llvm.aarch64.neon.addp
    225     aarch64_neon_cls,                          // llvm.aarch64.neon.cls
    226     aarch64_neon_fabd,                         // llvm.aarch64.neon.fabd
    227     aarch64_neon_facge,                        // llvm.aarch64.neon.facge
    228     aarch64_neon_facgt,                        // llvm.aarch64.neon.facgt
    229     aarch64_neon_faddv,                        // llvm.aarch64.neon.faddv
    230     aarch64_neon_fcvtas,                       // llvm.aarch64.neon.fcvtas
    231     aarch64_neon_fcvtau,                       // llvm.aarch64.neon.fcvtau
    232     aarch64_neon_fcvtms,                       // llvm.aarch64.neon.fcvtms
    233     aarch64_neon_fcvtmu,                       // llvm.aarch64.neon.fcvtmu
    234     aarch64_neon_fcvtns,                       // llvm.aarch64.neon.fcvtns
    235     aarch64_neon_fcvtnu,                       // llvm.aarch64.neon.fcvtnu
    236     aarch64_neon_fcvtps,                       // llvm.aarch64.neon.fcvtps
    237     aarch64_neon_fcvtpu,                       // llvm.aarch64.neon.fcvtpu
    238     aarch64_neon_fcvtxn,                       // llvm.aarch64.neon.fcvtxn
    239     aarch64_neon_fcvtzs,                       // llvm.aarch64.neon.fcvtzs
    240     aarch64_neon_fcvtzu,                       // llvm.aarch64.neon.fcvtzu
    241     aarch64_neon_fmax,                         // llvm.aarch64.neon.fmax
    242     aarch64_neon_fmaxnm,                       // llvm.aarch64.neon.fmaxnm
    243     aarch64_neon_fmaxnmp,                      // llvm.aarch64.neon.fmaxnmp
    244     aarch64_neon_fmaxnmv,                      // llvm.aarch64.neon.fmaxnmv
    245     aarch64_neon_fmaxp,                        // llvm.aarch64.neon.fmaxp
    246     aarch64_neon_fmaxv,                        // llvm.aarch64.neon.fmaxv
    247     aarch64_neon_fmin,                         // llvm.aarch64.neon.fmin
    248     aarch64_neon_fminnm,                       // llvm.aarch64.neon.fminnm
    249     aarch64_neon_fminnmp,                      // llvm.aarch64.neon.fminnmp
    250     aarch64_neon_fminnmv,                      // llvm.aarch64.neon.fminnmv
    251     aarch64_neon_fminp,                        // llvm.aarch64.neon.fminp
    252     aarch64_neon_fminv,                        // llvm.aarch64.neon.fminv
    253     aarch64_neon_fmulx,                        // llvm.aarch64.neon.fmulx
    254     aarch64_neon_frecpe,                       // llvm.aarch64.neon.frecpe
    255     aarch64_neon_frecps,                       // llvm.aarch64.neon.frecps
    256     aarch64_neon_frecpx,                       // llvm.aarch64.neon.frecpx
    257     aarch64_neon_frintn,                       // llvm.aarch64.neon.frintn
    258     aarch64_neon_frsqrte,                      // llvm.aarch64.neon.frsqrte
    259     aarch64_neon_frsqrts,                      // llvm.aarch64.neon.frsqrts
    260     aarch64_neon_ld1x2,                        // llvm.aarch64.neon.ld1x2
    261     aarch64_neon_ld1x3,                        // llvm.aarch64.neon.ld1x3
    262     aarch64_neon_ld1x4,                        // llvm.aarch64.neon.ld1x4
    263     aarch64_neon_ld2,                          // llvm.aarch64.neon.ld2
    264     aarch64_neon_ld2lane,                      // llvm.aarch64.neon.ld2lane
    265     aarch64_neon_ld2r,                         // llvm.aarch64.neon.ld2r
    266     aarch64_neon_ld3,                          // llvm.aarch64.neon.ld3
    267     aarch64_neon_ld3lane,                      // llvm.aarch64.neon.ld3lane
    268     aarch64_neon_ld3r,                         // llvm.aarch64.neon.ld3r
    269     aarch64_neon_ld4,                          // llvm.aarch64.neon.ld4
    270     aarch64_neon_ld4lane,                      // llvm.aarch64.neon.ld4lane
    271     aarch64_neon_ld4r,                         // llvm.aarch64.neon.ld4r
    272     aarch64_neon_pmul,                         // llvm.aarch64.neon.pmul
    273     aarch64_neon_pmull,                        // llvm.aarch64.neon.pmull
    274     aarch64_neon_pmull64,                      // llvm.aarch64.neon.pmull64
    275     aarch64_neon_raddhn,                       // llvm.aarch64.neon.raddhn
    276     aarch64_neon_rbit,                         // llvm.aarch64.neon.rbit
    277     aarch64_neon_rshrn,                        // llvm.aarch64.neon.rshrn
    278     aarch64_neon_rsubhn,                       // llvm.aarch64.neon.rsubhn
    279     aarch64_neon_sabd,                         // llvm.aarch64.neon.sabd
    280     aarch64_neon_saddlp,                       // llvm.aarch64.neon.saddlp
    281     aarch64_neon_saddlv,                       // llvm.aarch64.neon.saddlv
    282     aarch64_neon_saddv,                        // llvm.aarch64.neon.saddv
    283     aarch64_neon_scalar_sqxtn,                 // llvm.aarch64.neon.scalar.sqxtn
    284     aarch64_neon_scalar_sqxtun,                // llvm.aarch64.neon.scalar.sqxtun
    285     aarch64_neon_scalar_uqxtn,                 // llvm.aarch64.neon.scalar.uqxtn
    286     aarch64_neon_shadd,                        // llvm.aarch64.neon.shadd
    287     aarch64_neon_shll,                         // llvm.aarch64.neon.shll
    288     aarch64_neon_shsub,                        // llvm.aarch64.neon.shsub
    289     aarch64_neon_smax,                         // llvm.aarch64.neon.smax
    290     aarch64_neon_smaxp,                        // llvm.aarch64.neon.smaxp
    291     aarch64_neon_smaxv,                        // llvm.aarch64.neon.smaxv
    292     aarch64_neon_smin,                         // llvm.aarch64.neon.smin
    293     aarch64_neon_sminp,                        // llvm.aarch64.neon.sminp
    294     aarch64_neon_sminv,                        // llvm.aarch64.neon.sminv
    295     aarch64_neon_smull,                        // llvm.aarch64.neon.smull
    296     aarch64_neon_sqabs,                        // llvm.aarch64.neon.sqabs
    297     aarch64_neon_sqadd,                        // llvm.aarch64.neon.sqadd
    298     aarch64_neon_sqdmulh,                      // llvm.aarch64.neon.sqdmulh
    299     aarch64_neon_sqdmull,                      // llvm.aarch64.neon.sqdmull
    300     aarch64_neon_sqdmulls_scalar,              // llvm.aarch64.neon.sqdmulls.scalar
    301     aarch64_neon_sqneg,                        // llvm.aarch64.neon.sqneg
    302     aarch64_neon_sqrdmulh,                     // llvm.aarch64.neon.sqrdmulh
    303     aarch64_neon_sqrshl,                       // llvm.aarch64.neon.sqrshl
    304     aarch64_neon_sqrshrn,                      // llvm.aarch64.neon.sqrshrn
    305     aarch64_neon_sqrshrun,                     // llvm.aarch64.neon.sqrshrun
    306     aarch64_neon_sqshl,                        // llvm.aarch64.neon.sqshl
    307     aarch64_neon_sqshlu,                       // llvm.aarch64.neon.sqshlu
    308     aarch64_neon_sqshrn,                       // llvm.aarch64.neon.sqshrn
    309     aarch64_neon_sqshrun,                      // llvm.aarch64.neon.sqshrun
    310     aarch64_neon_sqsub,                        // llvm.aarch64.neon.sqsub
    311     aarch64_neon_sqxtn,                        // llvm.aarch64.neon.sqxtn
    312     aarch64_neon_sqxtun,                       // llvm.aarch64.neon.sqxtun
    313     aarch64_neon_srhadd,                       // llvm.aarch64.neon.srhadd
    314     aarch64_neon_srshl,                        // llvm.aarch64.neon.srshl
    315     aarch64_neon_sshl,                         // llvm.aarch64.neon.sshl
    316     aarch64_neon_sshll,                        // llvm.aarch64.neon.sshll
    317     aarch64_neon_st1x2,                        // llvm.aarch64.neon.st1x2
    318     aarch64_neon_st1x3,                        // llvm.aarch64.neon.st1x3
    319     aarch64_neon_st1x4,                        // llvm.aarch64.neon.st1x4
    320     aarch64_neon_st2,                          // llvm.aarch64.neon.st2
    321     aarch64_neon_st2lane,                      // llvm.aarch64.neon.st2lane
    322     aarch64_neon_st3,                          // llvm.aarch64.neon.st3
    323     aarch64_neon_st3lane,                      // llvm.aarch64.neon.st3lane
    324     aarch64_neon_st4,                          // llvm.aarch64.neon.st4
    325     aarch64_neon_st4lane,                      // llvm.aarch64.neon.st4lane
    326     aarch64_neon_subhn,                        // llvm.aarch64.neon.subhn
    327     aarch64_neon_suqadd,                       // llvm.aarch64.neon.suqadd
    328     aarch64_neon_tbl1,                         // llvm.aarch64.neon.tbl1
    329     aarch64_neon_tbl2,                         // llvm.aarch64.neon.tbl2
    330     aarch64_neon_tbl3,                         // llvm.aarch64.neon.tbl3
    331     aarch64_neon_tbl4,                         // llvm.aarch64.neon.tbl4
    332     aarch64_neon_tbx1,                         // llvm.aarch64.neon.tbx1
    333     aarch64_neon_tbx2,                         // llvm.aarch64.neon.tbx2
    334     aarch64_neon_tbx3,                         // llvm.aarch64.neon.tbx3
    335     aarch64_neon_tbx4,                         // llvm.aarch64.neon.tbx4
    336     aarch64_neon_uabd,                         // llvm.aarch64.neon.uabd
    337     aarch64_neon_uaddlp,                       // llvm.aarch64.neon.uaddlp
    338     aarch64_neon_uaddlv,                       // llvm.aarch64.neon.uaddlv
    339     aarch64_neon_uaddv,                        // llvm.aarch64.neon.uaddv
    340     aarch64_neon_uhadd,                        // llvm.aarch64.neon.uhadd
    341     aarch64_neon_uhsub,                        // llvm.aarch64.neon.uhsub
    342     aarch64_neon_umax,                         // llvm.aarch64.neon.umax
    343     aarch64_neon_umaxp,                        // llvm.aarch64.neon.umaxp
    344     aarch64_neon_umaxv,                        // llvm.aarch64.neon.umaxv
    345     aarch64_neon_umin,                         // llvm.aarch64.neon.umin
    346     aarch64_neon_uminp,                        // llvm.aarch64.neon.uminp
    347     aarch64_neon_uminv,                        // llvm.aarch64.neon.uminv
    348     aarch64_neon_umull,                        // llvm.aarch64.neon.umull
    349     aarch64_neon_uqadd,                        // llvm.aarch64.neon.uqadd
    350     aarch64_neon_uqrshl,                       // llvm.aarch64.neon.uqrshl
    351     aarch64_neon_uqrshrn,                      // llvm.aarch64.neon.uqrshrn
    352     aarch64_neon_uqshl,                        // llvm.aarch64.neon.uqshl
    353     aarch64_neon_uqshrn,                       // llvm.aarch64.neon.uqshrn
    354     aarch64_neon_uqsub,                        // llvm.aarch64.neon.uqsub
    355     aarch64_neon_uqxtn,                        // llvm.aarch64.neon.uqxtn
    356     aarch64_neon_urecpe,                       // llvm.aarch64.neon.urecpe
    357     aarch64_neon_urhadd,                       // llvm.aarch64.neon.urhadd
    358     aarch64_neon_urshl,                        // llvm.aarch64.neon.urshl
    359     aarch64_neon_ursqrte,                      // llvm.aarch64.neon.ursqrte
    360     aarch64_neon_ushl,                         // llvm.aarch64.neon.ushl
    361     aarch64_neon_ushll,                        // llvm.aarch64.neon.ushll
    362     aarch64_neon_usqadd,                       // llvm.aarch64.neon.usqadd
    363     aarch64_neon_vcopy_lane,                   // llvm.aarch64.neon.vcopy.lane
    364     aarch64_neon_vcvtfp2fxs,                   // llvm.aarch64.neon.vcvtfp2fxs
    365     aarch64_neon_vcvtfp2fxu,                   // llvm.aarch64.neon.vcvtfp2fxu
    366     aarch64_neon_vcvtfp2hf,                    // llvm.aarch64.neon.vcvtfp2hf
    367     aarch64_neon_vcvtfxs2fp,                   // llvm.aarch64.neon.vcvtfxs2fp
    368     aarch64_neon_vcvtfxu2fp,                   // llvm.aarch64.neon.vcvtfxu2fp
    369     aarch64_neon_vcvthf2fp,                    // llvm.aarch64.neon.vcvthf2fp
    370     aarch64_neon_vsli,                         // llvm.aarch64.neon.vsli
    371     aarch64_neon_vsri,                         // llvm.aarch64.neon.vsri
    372     aarch64_sdiv,                              // llvm.aarch64.sdiv
    373     aarch64_sisd_fabd,                         // llvm.aarch64.sisd.fabd
    374     aarch64_sisd_fcvtxn,                       // llvm.aarch64.sisd.fcvtxn
    375     aarch64_stlxp,                             // llvm.aarch64.stlxp
    376     aarch64_stlxr,                             // llvm.aarch64.stlxr
    377     aarch64_stxp,                              // llvm.aarch64.stxp
    378     aarch64_stxr,                              // llvm.aarch64.stxr
    379     aarch64_udiv,                              // llvm.aarch64.udiv
    380     amdgcn_alignbit,                           // llvm.amdgcn.alignbit
    381     amdgcn_alignbyte,                          // llvm.amdgcn.alignbyte
    382     amdgcn_atomic_dec,                         // llvm.amdgcn.atomic.dec
    383     amdgcn_atomic_inc,                         // llvm.amdgcn.atomic.inc
    384     amdgcn_break,                              // llvm.amdgcn.break
    385     amdgcn_buffer_atomic_add,                  // llvm.amdgcn.buffer.atomic.add
    386     amdgcn_buffer_atomic_and,                  // llvm.amdgcn.buffer.atomic.and
    387     amdgcn_buffer_atomic_cmpswap,              // llvm.amdgcn.buffer.atomic.cmpswap
    388     amdgcn_buffer_atomic_or,                   // llvm.amdgcn.buffer.atomic.or
    389     amdgcn_buffer_atomic_smax,                 // llvm.amdgcn.buffer.atomic.smax
    390     amdgcn_buffer_atomic_smin,                 // llvm.amdgcn.buffer.atomic.smin
    391     amdgcn_buffer_atomic_sub,                  // llvm.amdgcn.buffer.atomic.sub
    392     amdgcn_buffer_atomic_swap,                 // llvm.amdgcn.buffer.atomic.swap
    393     amdgcn_buffer_atomic_umax,                 // llvm.amdgcn.buffer.atomic.umax
    394     amdgcn_buffer_atomic_umin,                 // llvm.amdgcn.buffer.atomic.umin
    395     amdgcn_buffer_atomic_xor,                  // llvm.amdgcn.buffer.atomic.xor
    396     amdgcn_buffer_load,                        // llvm.amdgcn.buffer.load
    397     amdgcn_buffer_load_format,                 // llvm.amdgcn.buffer.load.format
    398     amdgcn_buffer_store,                       // llvm.amdgcn.buffer.store
    399     amdgcn_buffer_store_format,                // llvm.amdgcn.buffer.store.format
    400     amdgcn_buffer_wbinvl1,                     // llvm.amdgcn.buffer.wbinvl1
    401     amdgcn_buffer_wbinvl1_sc,                  // llvm.amdgcn.buffer.wbinvl1.sc
    402     amdgcn_buffer_wbinvl1_vol,                 // llvm.amdgcn.buffer.wbinvl1.vol
    403     amdgcn_class,                              // llvm.amdgcn.class
    404     amdgcn_cos,                                // llvm.amdgcn.cos
    405     amdgcn_cubeid,                             // llvm.amdgcn.cubeid
    406     amdgcn_cubema,                             // llvm.amdgcn.cubema
    407     amdgcn_cubesc,                             // llvm.amdgcn.cubesc
    408     amdgcn_cubetc,                             // llvm.amdgcn.cubetc
    409     amdgcn_cvt_pk_u8_f32,                      // llvm.amdgcn.cvt.pk.u8.f32
    410     amdgcn_cvt_pkrtz,                          // llvm.amdgcn.cvt.pkrtz
    411     amdgcn_dispatch_id,                        // llvm.amdgcn.dispatch.id
    412     amdgcn_dispatch_ptr,                       // llvm.amdgcn.dispatch.ptr
    413     amdgcn_div_fixup,                          // llvm.amdgcn.div.fixup
    414     amdgcn_div_fmas,                           // llvm.amdgcn.div.fmas
    415     amdgcn_div_scale,                          // llvm.amdgcn.div.scale
    416     amdgcn_ds_bpermute,                        // llvm.amdgcn.ds.bpermute
    417     amdgcn_ds_permute,                         // llvm.amdgcn.ds.permute
    418     amdgcn_ds_swizzle,                         // llvm.amdgcn.ds.swizzle
    419     amdgcn_else,                               // llvm.amdgcn.else
    420     amdgcn_else_break,                         // llvm.amdgcn.else.break
    421     amdgcn_end_cf,                             // llvm.amdgcn.end.cf
    422     amdgcn_exp,                                // llvm.amdgcn.exp
    423     amdgcn_exp_compr,                          // llvm.amdgcn.exp.compr
    424     amdgcn_fcmp,                               // llvm.amdgcn.fcmp
    425     amdgcn_fdiv_fast,                          // llvm.amdgcn.fdiv.fast
    426     amdgcn_fmed3,                              // llvm.amdgcn.fmed3
    427     amdgcn_fmul_legacy,                        // llvm.amdgcn.fmul.legacy
    428     amdgcn_fract,                              // llvm.amdgcn.fract
    429     amdgcn_frexp_exp,                          // llvm.amdgcn.frexp.exp
    430     amdgcn_frexp_mant,                         // llvm.amdgcn.frexp.mant
    431     amdgcn_groupstaticsize,                    // llvm.amdgcn.groupstaticsize
    432     amdgcn_icmp,                               // llvm.amdgcn.icmp
    433     amdgcn_if,                                 // llvm.amdgcn.if
    434     amdgcn_if_break,                           // llvm.amdgcn.if.break
    435     amdgcn_image_atomic_add,                   // llvm.amdgcn.image.atomic.add
    436     amdgcn_image_atomic_and,                   // llvm.amdgcn.image.atomic.and
    437     amdgcn_image_atomic_cmpswap,               // llvm.amdgcn.image.atomic.cmpswap
    438     amdgcn_image_atomic_dec,                   // llvm.amdgcn.image.atomic.dec
    439     amdgcn_image_atomic_inc,                   // llvm.amdgcn.image.atomic.inc
    440     amdgcn_image_atomic_or,                    // llvm.amdgcn.image.atomic.or
    441     amdgcn_image_atomic_smax,                  // llvm.amdgcn.image.atomic.smax
    442     amdgcn_image_atomic_smin,                  // llvm.amdgcn.image.atomic.smin
    443     amdgcn_image_atomic_sub,                   // llvm.amdgcn.image.atomic.sub
    444     amdgcn_image_atomic_swap,                  // llvm.amdgcn.image.atomic.swap
    445     amdgcn_image_atomic_umax,                  // llvm.amdgcn.image.atomic.umax
    446     amdgcn_image_atomic_umin,                  // llvm.amdgcn.image.atomic.umin
    447     amdgcn_image_atomic_xor,                   // llvm.amdgcn.image.atomic.xor
    448     amdgcn_image_gather4,                      // llvm.amdgcn.image.gather4
    449     amdgcn_image_gather4_b,                    // llvm.amdgcn.image.gather4.b
    450     amdgcn_image_gather4_b_cl,                 // llvm.amdgcn.image.gather4.b.cl
    451     amdgcn_image_gather4_b_cl_o,               // llvm.amdgcn.image.gather4.b.cl.o
    452     amdgcn_image_gather4_b_o,                  // llvm.amdgcn.image.gather4.b.o
    453     amdgcn_image_gather4_c,                    // llvm.amdgcn.image.gather4.c
    454     amdgcn_image_gather4_c_b,                  // llvm.amdgcn.image.gather4.c.b
    455     amdgcn_image_gather4_c_b_cl,               // llvm.amdgcn.image.gather4.c.b.cl
    456     amdgcn_image_gather4_c_b_cl_o,             // llvm.amdgcn.image.gather4.c.b.cl.o
    457     amdgcn_image_gather4_c_b_o,                // llvm.amdgcn.image.gather4.c.b.o
    458     amdgcn_image_gather4_c_cl,                 // llvm.amdgcn.image.gather4.c.cl
    459     amdgcn_image_gather4_c_cl_o,               // llvm.amdgcn.image.gather4.c.cl.o
    460     amdgcn_image_gather4_c_l,                  // llvm.amdgcn.image.gather4.c.l
    461     amdgcn_image_gather4_c_l_o,                // llvm.amdgcn.image.gather4.c.l.o
    462     amdgcn_image_gather4_c_lz,                 // llvm.amdgcn.image.gather4.c.lz
    463     amdgcn_image_gather4_c_lz_o,               // llvm.amdgcn.image.gather4.c.lz.o
    464     amdgcn_image_gather4_c_o,                  // llvm.amdgcn.image.gather4.c.o
    465     amdgcn_image_gather4_cl,                   // llvm.amdgcn.image.gather4.cl
    466     amdgcn_image_gather4_cl_o,                 // llvm.amdgcn.image.gather4.cl.o
    467     amdgcn_image_gather4_l,                    // llvm.amdgcn.image.gather4.l
    468     amdgcn_image_gather4_l_o,                  // llvm.amdgcn.image.gather4.l.o
    469     amdgcn_image_gather4_lz,                   // llvm.amdgcn.image.gather4.lz
    470     amdgcn_image_gather4_lz_o,                 // llvm.amdgcn.image.gather4.lz.o
    471     amdgcn_image_gather4_o,                    // llvm.amdgcn.image.gather4.o
    472     amdgcn_image_getlod,                       // llvm.amdgcn.image.getlod
    473     amdgcn_image_getresinfo,                   // llvm.amdgcn.image.getresinfo
    474     amdgcn_image_load,                         // llvm.amdgcn.image.load
    475     amdgcn_image_load_mip,                     // llvm.amdgcn.image.load.mip
    476     amdgcn_image_sample,                       // llvm.amdgcn.image.sample
    477     amdgcn_image_sample_b,                     // llvm.amdgcn.image.sample.b
    478     amdgcn_image_sample_b_cl,                  // llvm.amdgcn.image.sample.b.cl
    479     amdgcn_image_sample_b_cl_o,                // llvm.amdgcn.image.sample.b.cl.o
    480     amdgcn_image_sample_b_o,                   // llvm.amdgcn.image.sample.b.o
    481     amdgcn_image_sample_c,                     // llvm.amdgcn.image.sample.c
    482     amdgcn_image_sample_c_b,                   // llvm.amdgcn.image.sample.c.b
    483     amdgcn_image_sample_c_b_cl,                // llvm.amdgcn.image.sample.c.b.cl
    484     amdgcn_image_sample_c_b_cl_o,              // llvm.amdgcn.image.sample.c.b.cl.o
    485     amdgcn_image_sample_c_b_o,                 // llvm.amdgcn.image.sample.c.b.o
    486     amdgcn_image_sample_c_cd,                  // llvm.amdgcn.image.sample.c.cd
    487     amdgcn_image_sample_c_cd_cl,               // llvm.amdgcn.image.sample.c.cd.cl
    488     amdgcn_image_sample_c_cd_cl_o,             // llvm.amdgcn.image.sample.c.cd.cl.o
    489     amdgcn_image_sample_c_cd_o,                // llvm.amdgcn.image.sample.c.cd.o
    490     amdgcn_image_sample_c_cl,                  // llvm.amdgcn.image.sample.c.cl
    491     amdgcn_image_sample_c_cl_o,                // llvm.amdgcn.image.sample.c.cl.o
    492     amdgcn_image_sample_c_d,                   // llvm.amdgcn.image.sample.c.d
    493     amdgcn_image_sample_c_d_cl,                // llvm.amdgcn.image.sample.c.d.cl
    494     amdgcn_image_sample_c_d_cl_o,              // llvm.amdgcn.image.sample.c.d.cl.o
    495     amdgcn_image_sample_c_d_o,                 // llvm.amdgcn.image.sample.c.d.o
    496     amdgcn_image_sample_c_l,                   // llvm.amdgcn.image.sample.c.l
    497     amdgcn_image_sample_c_l_o,                 // llvm.amdgcn.image.sample.c.l.o
    498     amdgcn_image_sample_c_lz,                  // llvm.amdgcn.image.sample.c.lz
    499     amdgcn_image_sample_c_lz_o,                // llvm.amdgcn.image.sample.c.lz.o
    500     amdgcn_image_sample_c_o,                   // llvm.amdgcn.image.sample.c.o
    501     amdgcn_image_sample_cd,                    // llvm.amdgcn.image.sample.cd
    502     amdgcn_image_sample_cd_cl,                 // llvm.amdgcn.image.sample.cd.cl
    503     amdgcn_image_sample_cd_cl_o,               // llvm.amdgcn.image.sample.cd.cl.o
    504     amdgcn_image_sample_cd_o,                  // llvm.amdgcn.image.sample.cd.o
    505     amdgcn_image_sample_cl,                    // llvm.amdgcn.image.sample.cl
    506     amdgcn_image_sample_cl_o,                  // llvm.amdgcn.image.sample.cl.o
    507     amdgcn_image_sample_d,                     // llvm.amdgcn.image.sample.d
    508     amdgcn_image_sample_d_cl,                  // llvm.amdgcn.image.sample.d.cl
    509     amdgcn_image_sample_d_cl_o,                // llvm.amdgcn.image.sample.d.cl.o
    510     amdgcn_image_sample_d_o,                   // llvm.amdgcn.image.sample.d.o
    511     amdgcn_image_sample_l,                     // llvm.amdgcn.image.sample.l
    512     amdgcn_image_sample_l_o,                   // llvm.amdgcn.image.sample.l.o
    513     amdgcn_image_sample_lz,                    // llvm.amdgcn.image.sample.lz
    514     amdgcn_image_sample_lz_o,                  // llvm.amdgcn.image.sample.lz.o
    515     amdgcn_image_sample_o,                     // llvm.amdgcn.image.sample.o
    516     amdgcn_image_store,                        // llvm.amdgcn.image.store
    517     amdgcn_image_store_mip,                    // llvm.amdgcn.image.store.mip
    518     amdgcn_implicit_buffer_ptr,                // llvm.amdgcn.implicit.buffer.ptr
    519     amdgcn_implicitarg_ptr,                    // llvm.amdgcn.implicitarg.ptr
    520     amdgcn_init_exec,                          // llvm.amdgcn.init.exec
    521     amdgcn_init_exec_from_input,               // llvm.amdgcn.init.exec.from.input
    522     amdgcn_interp_mov,                         // llvm.amdgcn.interp.mov
    523     amdgcn_interp_p1,                          // llvm.amdgcn.interp.p1
    524     amdgcn_interp_p2,                          // llvm.amdgcn.interp.p2
    525     amdgcn_kernarg_segment_ptr,                // llvm.amdgcn.kernarg.segment.ptr
    526     amdgcn_ldexp,                              // llvm.amdgcn.ldexp
    527     amdgcn_lerp,                               // llvm.amdgcn.lerp
    528     amdgcn_log_clamp,                          // llvm.amdgcn.log.clamp
    529     amdgcn_loop,                               // llvm.amdgcn.loop
    530     amdgcn_mbcnt_hi,                           // llvm.amdgcn.mbcnt.hi
    531     amdgcn_mbcnt_lo,                           // llvm.amdgcn.mbcnt.lo
    532     amdgcn_mov_dpp,                            // llvm.amdgcn.mov.dpp
    533     amdgcn_mqsad_pk_u16_u8,                    // llvm.amdgcn.mqsad.pk.u16.u8
    534     amdgcn_mqsad_u32_u8,                       // llvm.amdgcn.mqsad.u32.u8
    535     amdgcn_msad_u8,                            // llvm.amdgcn.msad.u8
    536     amdgcn_ps_live,                            // llvm.amdgcn.ps.live
    537     amdgcn_qsad_pk_u16_u8,                     // llvm.amdgcn.qsad.pk.u16.u8
    538     amdgcn_queue_ptr,                          // llvm.amdgcn.queue.ptr
    539     amdgcn_rcp,                                // llvm.amdgcn.rcp
    540     amdgcn_rcp_legacy,                         // llvm.amdgcn.rcp.legacy
    541     amdgcn_readfirstlane,                      // llvm.amdgcn.readfirstlane
    542     amdgcn_readlane,                           // llvm.amdgcn.readlane
    543     amdgcn_rsq,                                // llvm.amdgcn.rsq
    544     amdgcn_rsq_clamp,                          // llvm.amdgcn.rsq.clamp
    545     amdgcn_rsq_legacy,                         // llvm.amdgcn.rsq.legacy
    546     amdgcn_s_barrier,                          // llvm.amdgcn.s.barrier
    547     amdgcn_s_dcache_inv,                       // llvm.amdgcn.s.dcache.inv
    548     amdgcn_s_dcache_inv_vol,                   // llvm.amdgcn.s.dcache.inv.vol
    549     amdgcn_s_dcache_wb,                        // llvm.amdgcn.s.dcache.wb
    550     amdgcn_s_dcache_wb_vol,                    // llvm.amdgcn.s.dcache.wb.vol
    551     amdgcn_s_decperflevel,                     // llvm.amdgcn.s.decperflevel
    552     amdgcn_s_getpc,                            // llvm.amdgcn.s.getpc
    553     amdgcn_s_getreg,                           // llvm.amdgcn.s.getreg
    554     amdgcn_s_incperflevel,                     // llvm.amdgcn.s.incperflevel
    555     amdgcn_s_memrealtime,                      // llvm.amdgcn.s.memrealtime
    556     amdgcn_s_memtime,                          // llvm.amdgcn.s.memtime
    557     amdgcn_s_sendmsg,                          // llvm.amdgcn.s.sendmsg
    558     amdgcn_s_sendmsghalt,                      // llvm.amdgcn.s.sendmsghalt
    559     amdgcn_s_sleep,                            // llvm.amdgcn.s.sleep
    560     amdgcn_s_waitcnt,                          // llvm.amdgcn.s.waitcnt
    561     amdgcn_sad_hi_u8,                          // llvm.amdgcn.sad.hi.u8
    562     amdgcn_sad_u16,                            // llvm.amdgcn.sad.u16
    563     amdgcn_sad_u8,                             // llvm.amdgcn.sad.u8
    564     amdgcn_sbfe,                               // llvm.amdgcn.sbfe
    565     amdgcn_set_inactive,                       // llvm.amdgcn.set.inactive
    566     amdgcn_sffbh,                              // llvm.amdgcn.sffbh
    567     amdgcn_sin,                                // llvm.amdgcn.sin
    568     amdgcn_tbuffer_load,                       // llvm.amdgcn.tbuffer.load
    569     amdgcn_tbuffer_store,                      // llvm.amdgcn.tbuffer.store
    570     amdgcn_trig_preop,                         // llvm.amdgcn.trig.preop
    571     amdgcn_ubfe,                               // llvm.amdgcn.ubfe
    572     amdgcn_unreachable,                        // llvm.amdgcn.unreachable
    573     amdgcn_update_dpp,                         // llvm.amdgcn.update.dpp
    574     amdgcn_wave_barrier,                       // llvm.amdgcn.wave.barrier
    575     amdgcn_workgroup_id_x,                     // llvm.amdgcn.workgroup.id.x
    576     amdgcn_workgroup_id_y,                     // llvm.amdgcn.workgroup.id.y
    577     amdgcn_workgroup_id_z,                     // llvm.amdgcn.workgroup.id.z
    578     amdgcn_workitem_id_x,                      // llvm.amdgcn.workitem.id.x
    579     amdgcn_workitem_id_y,                      // llvm.amdgcn.workitem.id.y
    580     amdgcn_workitem_id_z,                      // llvm.amdgcn.workitem.id.z
    581     amdgcn_wqm,                                // llvm.amdgcn.wqm
    582     amdgcn_wwm,                                // llvm.amdgcn.wwm
    583     arm_cdp,                                   // llvm.arm.cdp
    584     arm_cdp2,                                  // llvm.arm.cdp2
    585     arm_clrex,                                 // llvm.arm.clrex
    586     arm_crc32b,                                // llvm.arm.crc32b
    587     arm_crc32cb,                               // llvm.arm.crc32cb
    588     arm_crc32ch,                               // llvm.arm.crc32ch
    589     arm_crc32cw,                               // llvm.arm.crc32cw
    590     arm_crc32h,                                // llvm.arm.crc32h
    591     arm_crc32w,                                // llvm.arm.crc32w
    592     arm_dbg,                                   // llvm.arm.dbg
    593     arm_dmb,                                   // llvm.arm.dmb
    594     arm_dsb,                                   // llvm.arm.dsb
    595     arm_get_fpscr,                             // llvm.arm.get.fpscr
    596     arm_hint,                                  // llvm.arm.hint
    597     arm_isb,                                   // llvm.arm.isb
    598     arm_ldaex,                                 // llvm.arm.ldaex
    599     arm_ldaexd,                                // llvm.arm.ldaexd
    600     arm_ldc,                                   // llvm.arm.ldc
    601     arm_ldc2,                                  // llvm.arm.ldc2
    602     arm_ldc2l,                                 // llvm.arm.ldc2l
    603     arm_ldcl,                                  // llvm.arm.ldcl
    604     arm_ldrex,                                 // llvm.arm.ldrex
    605     arm_ldrexd,                                // llvm.arm.ldrexd
    606     arm_mcr,                                   // llvm.arm.mcr
    607     arm_mcr2,                                  // llvm.arm.mcr2
    608     arm_mcrr,                                  // llvm.arm.mcrr
    609     arm_mcrr2,                                 // llvm.arm.mcrr2
    610     arm_mrc,                                   // llvm.arm.mrc
    611     arm_mrc2,                                  // llvm.arm.mrc2
    612     arm_mrrc,                                  // llvm.arm.mrrc
    613     arm_mrrc2,                                 // llvm.arm.mrrc2
    614     arm_neon_aesd,                             // llvm.arm.neon.aesd
    615     arm_neon_aese,                             // llvm.arm.neon.aese
    616     arm_neon_aesimc,                           // llvm.arm.neon.aesimc
    617     arm_neon_aesmc,                            // llvm.arm.neon.aesmc
    618     arm_neon_sha1c,                            // llvm.arm.neon.sha1c
    619     arm_neon_sha1h,                            // llvm.arm.neon.sha1h
    620     arm_neon_sha1m,                            // llvm.arm.neon.sha1m
    621     arm_neon_sha1p,                            // llvm.arm.neon.sha1p
    622     arm_neon_sha1su0,                          // llvm.arm.neon.sha1su0
    623     arm_neon_sha1su1,                          // llvm.arm.neon.sha1su1
    624     arm_neon_sha256h,                          // llvm.arm.neon.sha256h
    625     arm_neon_sha256h2,                         // llvm.arm.neon.sha256h2
    626     arm_neon_sha256su0,                        // llvm.arm.neon.sha256su0
    627     arm_neon_sha256su1,                        // llvm.arm.neon.sha256su1
    628     arm_neon_vabds,                            // llvm.arm.neon.vabds
    629     arm_neon_vabdu,                            // llvm.arm.neon.vabdu
    630     arm_neon_vabs,                             // llvm.arm.neon.vabs
    631     arm_neon_vacge,                            // llvm.arm.neon.vacge
    632     arm_neon_vacgt,                            // llvm.arm.neon.vacgt
    633     arm_neon_vbsl,                             // llvm.arm.neon.vbsl
    634     arm_neon_vcls,                             // llvm.arm.neon.vcls
    635     arm_neon_vcvtas,                           // llvm.arm.neon.vcvtas
    636     arm_neon_vcvtau,                           // llvm.arm.neon.vcvtau
    637     arm_neon_vcvtfp2fxs,                       // llvm.arm.neon.vcvtfp2fxs
    638     arm_neon_vcvtfp2fxu,                       // llvm.arm.neon.vcvtfp2fxu
    639     arm_neon_vcvtfp2hf,                        // llvm.arm.neon.vcvtfp2hf
    640     arm_neon_vcvtfxs2fp,                       // llvm.arm.neon.vcvtfxs2fp
    641     arm_neon_vcvtfxu2fp,                       // llvm.arm.neon.vcvtfxu2fp
    642     arm_neon_vcvthf2fp,                        // llvm.arm.neon.vcvthf2fp
    643     arm_neon_vcvtms,                           // llvm.arm.neon.vcvtms
    644     arm_neon_vcvtmu,                           // llvm.arm.neon.vcvtmu
    645     arm_neon_vcvtns,                           // llvm.arm.neon.vcvtns
    646     arm_neon_vcvtnu,                           // llvm.arm.neon.vcvtnu
    647     arm_neon_vcvtps,                           // llvm.arm.neon.vcvtps
    648     arm_neon_vcvtpu,                           // llvm.arm.neon.vcvtpu
    649     arm_neon_vhadds,                           // llvm.arm.neon.vhadds
    650     arm_neon_vhaddu,                           // llvm.arm.neon.vhaddu
    651     arm_neon_vhsubs,                           // llvm.arm.neon.vhsubs
    652     arm_neon_vhsubu,                           // llvm.arm.neon.vhsubu
    653     arm_neon_vld1,                             // llvm.arm.neon.vld1
    654     arm_neon_vld2,                             // llvm.arm.neon.vld2
    655     arm_neon_vld2lane,                         // llvm.arm.neon.vld2lane
    656     arm_neon_vld3,                             // llvm.arm.neon.vld3
    657     arm_neon_vld3lane,                         // llvm.arm.neon.vld3lane
    658     arm_neon_vld4,                             // llvm.arm.neon.vld4
    659     arm_neon_vld4lane,                         // llvm.arm.neon.vld4lane
    660     arm_neon_vmaxnm,                           // llvm.arm.neon.vmaxnm
    661     arm_neon_vmaxs,                            // llvm.arm.neon.vmaxs
    662     arm_neon_vmaxu,                            // llvm.arm.neon.vmaxu
    663     arm_neon_vminnm,                           // llvm.arm.neon.vminnm
    664     arm_neon_vmins,                            // llvm.arm.neon.vmins
    665     arm_neon_vminu,                            // llvm.arm.neon.vminu
    666     arm_neon_vmullp,                           // llvm.arm.neon.vmullp
    667     arm_neon_vmulls,                           // llvm.arm.neon.vmulls
    668     arm_neon_vmullu,                           // llvm.arm.neon.vmullu
    669     arm_neon_vmulp,                            // llvm.arm.neon.vmulp
    670     arm_neon_vpadals,                          // llvm.arm.neon.vpadals
    671     arm_neon_vpadalu,                          // llvm.arm.neon.vpadalu
    672     arm_neon_vpadd,                            // llvm.arm.neon.vpadd
    673     arm_neon_vpaddls,                          // llvm.arm.neon.vpaddls
    674     arm_neon_vpaddlu,                          // llvm.arm.neon.vpaddlu
    675     arm_neon_vpmaxs,                           // llvm.arm.neon.vpmaxs
    676     arm_neon_vpmaxu,                           // llvm.arm.neon.vpmaxu
    677     arm_neon_vpmins,                           // llvm.arm.neon.vpmins
    678     arm_neon_vpminu,                           // llvm.arm.neon.vpminu
    679     arm_neon_vqabs,                            // llvm.arm.neon.vqabs
    680     arm_neon_vqadds,                           // llvm.arm.neon.vqadds
    681     arm_neon_vqaddu,                           // llvm.arm.neon.vqaddu
    682     arm_neon_vqdmulh,                          // llvm.arm.neon.vqdmulh
    683     arm_neon_vqdmull,                          // llvm.arm.neon.vqdmull
    684     arm_neon_vqmovns,                          // llvm.arm.neon.vqmovns
    685     arm_neon_vqmovnsu,                         // llvm.arm.neon.vqmovnsu
    686     arm_neon_vqmovnu,                          // llvm.arm.neon.vqmovnu
    687     arm_neon_vqneg,                            // llvm.arm.neon.vqneg
    688     arm_neon_vqrdmulh,                         // llvm.arm.neon.vqrdmulh
    689     arm_neon_vqrshiftns,                       // llvm.arm.neon.vqrshiftns
    690     arm_neon_vqrshiftnsu,                      // llvm.arm.neon.vqrshiftnsu
    691     arm_neon_vqrshiftnu,                       // llvm.arm.neon.vqrshiftnu
    692     arm_neon_vqrshifts,                        // llvm.arm.neon.vqrshifts
    693     arm_neon_vqrshiftu,                        // llvm.arm.neon.vqrshiftu
    694     arm_neon_vqshiftns,                        // llvm.arm.neon.vqshiftns
    695     arm_neon_vqshiftnsu,                       // llvm.arm.neon.vqshiftnsu
    696     arm_neon_vqshiftnu,                        // llvm.arm.neon.vqshiftnu
    697     arm_neon_vqshifts,                         // llvm.arm.neon.vqshifts
    698     arm_neon_vqshiftsu,                        // llvm.arm.neon.vqshiftsu
    699     arm_neon_vqshiftu,                         // llvm.arm.neon.vqshiftu
    700     arm_neon_vqsubs,                           // llvm.arm.neon.vqsubs
    701     arm_neon_vqsubu,                           // llvm.arm.neon.vqsubu
    702     arm_neon_vraddhn,                          // llvm.arm.neon.vraddhn
    703     arm_neon_vrecpe,                           // llvm.arm.neon.vrecpe
    704     arm_neon_vrecps,                           // llvm.arm.neon.vrecps
    705     arm_neon_vrhadds,                          // llvm.arm.neon.vrhadds
    706     arm_neon_vrhaddu,                          // llvm.arm.neon.vrhaddu
    707     arm_neon_vrinta,                           // llvm.arm.neon.vrinta
    708     arm_neon_vrintm,                           // llvm.arm.neon.vrintm
    709     arm_neon_vrintn,                           // llvm.arm.neon.vrintn
    710     arm_neon_vrintp,                           // llvm.arm.neon.vrintp
    711     arm_neon_vrintx,                           // llvm.arm.neon.vrintx
    712     arm_neon_vrintz,                           // llvm.arm.neon.vrintz
    713     arm_neon_vrshiftn,                         // llvm.arm.neon.vrshiftn
    714     arm_neon_vrshifts,                         // llvm.arm.neon.vrshifts
    715     arm_neon_vrshiftu,                         // llvm.arm.neon.vrshiftu
    716     arm_neon_vrsqrte,                          // llvm.arm.neon.vrsqrte
    717     arm_neon_vrsqrts,                          // llvm.arm.neon.vrsqrts
    718     arm_neon_vrsubhn,                          // llvm.arm.neon.vrsubhn
    719     arm_neon_vshiftins,                        // llvm.arm.neon.vshiftins
    720     arm_neon_vshifts,                          // llvm.arm.neon.vshifts
    721     arm_neon_vshiftu,                          // llvm.arm.neon.vshiftu
    722     arm_neon_vst1,                             // llvm.arm.neon.vst1
    723     arm_neon_vst2,                             // llvm.arm.neon.vst2
    724     arm_neon_vst2lane,                         // llvm.arm.neon.vst2lane
    725     arm_neon_vst3,                             // llvm.arm.neon.vst3
    726     arm_neon_vst3lane,                         // llvm.arm.neon.vst3lane
    727     arm_neon_vst4,                             // llvm.arm.neon.vst4
    728     arm_neon_vst4lane,                         // llvm.arm.neon.vst4lane
    729     arm_neon_vtbl1,                            // llvm.arm.neon.vtbl1
    730     arm_neon_vtbl2,                            // llvm.arm.neon.vtbl2
    731     arm_neon_vtbl3,                            // llvm.arm.neon.vtbl3
    732     arm_neon_vtbl4,                            // llvm.arm.neon.vtbl4
    733     arm_neon_vtbx1,                            // llvm.arm.neon.vtbx1
    734     arm_neon_vtbx2,                            // llvm.arm.neon.vtbx2
    735     arm_neon_vtbx3,                            // llvm.arm.neon.vtbx3
    736     arm_neon_vtbx4,                            // llvm.arm.neon.vtbx4
    737     arm_qadd,                                  // llvm.arm.qadd
    738     arm_qadd16,                                // llvm.arm.qadd16
    739     arm_qadd8,                                 // llvm.arm.qadd8
    740     arm_qasx,                                  // llvm.arm.qasx
    741     arm_qsax,                                  // llvm.arm.qsax
    742     arm_qsub,                                  // llvm.arm.qsub
    743     arm_qsub16,                                // llvm.arm.qsub16
    744     arm_qsub8,                                 // llvm.arm.qsub8
    745     arm_sadd16,                                // llvm.arm.sadd16
    746     arm_sadd8,                                 // llvm.arm.sadd8
    747     arm_sasx,                                  // llvm.arm.sasx
    748     arm_sel,                                   // llvm.arm.sel
    749     arm_set_fpscr,                             // llvm.arm.set.fpscr
    750     arm_shadd16,                               // llvm.arm.shadd16
    751     arm_shadd8,                                // llvm.arm.shadd8
    752     arm_shasx,                                 // llvm.arm.shasx
    753     arm_shsax,                                 // llvm.arm.shsax
    754     arm_shsub16,                               // llvm.arm.shsub16
    755     arm_shsub8,                                // llvm.arm.shsub8
    756     arm_smlabb,                                // llvm.arm.smlabb
    757     arm_smlabt,                                // llvm.arm.smlabt
    758     arm_smlad,                                 // llvm.arm.smlad
    759     arm_smladx,                                // llvm.arm.smladx
    760     arm_smlald,                                // llvm.arm.smlald
    761     arm_smlaldx,                               // llvm.arm.smlaldx
    762     arm_smlatb,                                // llvm.arm.smlatb
    763     arm_smlatt,                                // llvm.arm.smlatt
    764     arm_smlawb,                                // llvm.arm.smlawb
    765     arm_smlawt,                                // llvm.arm.smlawt
    766     arm_smlsd,                                 // llvm.arm.smlsd
    767     arm_smlsdx,                                // llvm.arm.smlsdx
    768     arm_smlsld,                                // llvm.arm.smlsld
    769     arm_smlsldx,                               // llvm.arm.smlsldx
    770     arm_smuad,                                 // llvm.arm.smuad
    771     arm_smuadx,                                // llvm.arm.smuadx
    772     arm_smulbb,                                // llvm.arm.smulbb
    773     arm_smulbt,                                // llvm.arm.smulbt
    774     arm_smultb,                                // llvm.arm.smultb
    775     arm_smultt,                                // llvm.arm.smultt
    776     arm_smulwb,                                // llvm.arm.smulwb
    777     arm_smulwt,                                // llvm.arm.smulwt
    778     arm_smusd,                                 // llvm.arm.smusd
    779     arm_smusdx,                                // llvm.arm.smusdx
    780     arm_space,                                 // llvm.arm.space
    781     arm_ssat,                                  // llvm.arm.ssat
    782     arm_ssat16,                                // llvm.arm.ssat16
    783     arm_ssax,                                  // llvm.arm.ssax
    784     arm_ssub16,                                // llvm.arm.ssub16
    785     arm_ssub8,                                 // llvm.arm.ssub8
    786     arm_stc,                                   // llvm.arm.stc
    787     arm_stc2,                                  // llvm.arm.stc2
    788     arm_stc2l,                                 // llvm.arm.stc2l
    789     arm_stcl,                                  // llvm.arm.stcl
    790     arm_stlex,                                 // llvm.arm.stlex
    791     arm_stlexd,                                // llvm.arm.stlexd
    792     arm_strex,                                 // llvm.arm.strex
    793     arm_strexd,                                // llvm.arm.strexd
    794     arm_sxtab16,                               // llvm.arm.sxtab16
    795     arm_sxtb16,                                // llvm.arm.sxtb16
    796     arm_uadd16,                                // llvm.arm.uadd16
    797     arm_uadd8,                                 // llvm.arm.uadd8
    798     arm_uasx,                                  // llvm.arm.uasx
    799     arm_uhadd16,                               // llvm.arm.uhadd16
    800     arm_uhadd8,                                // llvm.arm.uhadd8
    801     arm_uhasx,                                 // llvm.arm.uhasx
    802     arm_uhsax,                                 // llvm.arm.uhsax
    803     arm_uhsub16,                               // llvm.arm.uhsub16
    804     arm_uhsub8,                                // llvm.arm.uhsub8
    805     arm_undefined,                             // llvm.arm.undefined
    806     arm_uqadd16,                               // llvm.arm.uqadd16
    807     arm_uqadd8,                                // llvm.arm.uqadd8
    808     arm_uqasx,                                 // llvm.arm.uqasx
    809     arm_uqsax,                                 // llvm.arm.uqsax
    810     arm_uqsub16,                               // llvm.arm.uqsub16
    811     arm_uqsub8,                                // llvm.arm.uqsub8
    812     arm_usad8,                                 // llvm.arm.usad8
    813     arm_usada8,                                // llvm.arm.usada8
    814     arm_usat,                                  // llvm.arm.usat
    815     arm_usat16,                                // llvm.arm.usat16
    816     arm_usax,                                  // llvm.arm.usax
    817     arm_usub16,                                // llvm.arm.usub16
    818     arm_usub8,                                 // llvm.arm.usub8
    819     arm_uxtab16,                               // llvm.arm.uxtab16
    820     arm_uxtb16,                                // llvm.arm.uxtb16
    821     arm_vcvtr,                                 // llvm.arm.vcvtr
    822     arm_vcvtru,                                // llvm.arm.vcvtru
    823     bpf_load_byte,                             // llvm.bpf.load.byte
    824     bpf_load_half,                             // llvm.bpf.load.half
    825     bpf_load_word,                             // llvm.bpf.load.word
    826     bpf_pseudo,                                // llvm.bpf.pseudo
    827     hexagon_A2_abs,                            // llvm.hexagon.A2.abs
    828     hexagon_A2_absp,                           // llvm.hexagon.A2.absp
    829     hexagon_A2_abssat,                         // llvm.hexagon.A2.abssat
    830     hexagon_A2_add,                            // llvm.hexagon.A2.add
    831     hexagon_A2_addh_h16_hh,                    // llvm.hexagon.A2.addh.h16.hh
    832     hexagon_A2_addh_h16_hl,                    // llvm.hexagon.A2.addh.h16.hl
    833     hexagon_A2_addh_h16_lh,                    // llvm.hexagon.A2.addh.h16.lh
    834     hexagon_A2_addh_h16_ll,                    // llvm.hexagon.A2.addh.h16.ll
    835     hexagon_A2_addh_h16_sat_hh,                // llvm.hexagon.A2.addh.h16.sat.hh
    836     hexagon_A2_addh_h16_sat_hl,                // llvm.hexagon.A2.addh.h16.sat.hl
    837     hexagon_A2_addh_h16_sat_lh,                // llvm.hexagon.A2.addh.h16.sat.lh
    838     hexagon_A2_addh_h16_sat_ll,                // llvm.hexagon.A2.addh.h16.sat.ll
    839     hexagon_A2_addh_l16_hl,                    // llvm.hexagon.A2.addh.l16.hl
    840     hexagon_A2_addh_l16_ll,                    // llvm.hexagon.A2.addh.l16.ll
    841     hexagon_A2_addh_l16_sat_hl,                // llvm.hexagon.A2.addh.l16.sat.hl
    842     hexagon_A2_addh_l16_sat_ll,                // llvm.hexagon.A2.addh.l16.sat.ll
    843     hexagon_A2_addi,                           // llvm.hexagon.A2.addi
    844     hexagon_A2_addp,                           // llvm.hexagon.A2.addp
    845     hexagon_A2_addpsat,                        // llvm.hexagon.A2.addpsat
    846     hexagon_A2_addsat,                         // llvm.hexagon.A2.addsat
    847     hexagon_A2_addsp,                          // llvm.hexagon.A2.addsp
    848     hexagon_A2_and,                            // llvm.hexagon.A2.and
    849     hexagon_A2_andir,                          // llvm.hexagon.A2.andir
    850     hexagon_A2_andp,                           // llvm.hexagon.A2.andp
    851     hexagon_A2_aslh,                           // llvm.hexagon.A2.aslh
    852     hexagon_A2_asrh,                           // llvm.hexagon.A2.asrh
    853     hexagon_A2_combine_hh,                     // llvm.hexagon.A2.combine.hh
    854     hexagon_A2_combine_hl,                     // llvm.hexagon.A2.combine.hl
    855     hexagon_A2_combine_lh,                     // llvm.hexagon.A2.combine.lh
    856     hexagon_A2_combine_ll,                     // llvm.hexagon.A2.combine.ll
    857     hexagon_A2_combineii,                      // llvm.hexagon.A2.combineii
    858     hexagon_A2_combinew,                       // llvm.hexagon.A2.combinew
    859     hexagon_A2_max,                            // llvm.hexagon.A2.max
    860     hexagon_A2_maxp,                           // llvm.hexagon.A2.maxp
    861     hexagon_A2_maxu,                           // llvm.hexagon.A2.maxu
    862     hexagon_A2_maxup,                          // llvm.hexagon.A2.maxup
    863     hexagon_A2_min,                            // llvm.hexagon.A2.min
    864     hexagon_A2_minp,                           // llvm.hexagon.A2.minp
    865     hexagon_A2_minu,                           // llvm.hexagon.A2.minu
    866     hexagon_A2_minup,                          // llvm.hexagon.A2.minup
    867     hexagon_A2_neg,                            // llvm.hexagon.A2.neg
    868     hexagon_A2_negp,                           // llvm.hexagon.A2.negp
    869     hexagon_A2_negsat,                         // llvm.hexagon.A2.negsat
    870     hexagon_A2_not,                            // llvm.hexagon.A2.not
    871     hexagon_A2_notp,                           // llvm.hexagon.A2.notp
    872     hexagon_A2_or,                             // llvm.hexagon.A2.or
    873     hexagon_A2_orir,                           // llvm.hexagon.A2.orir
    874     hexagon_A2_orp,                            // llvm.hexagon.A2.orp
    875     hexagon_A2_roundsat,                       // llvm.hexagon.A2.roundsat
    876     hexagon_A2_sat,                            // llvm.hexagon.A2.sat
    877     hexagon_A2_satb,                           // llvm.hexagon.A2.satb
    878     hexagon_A2_sath,                           // llvm.hexagon.A2.sath
    879     hexagon_A2_satub,                          // llvm.hexagon.A2.satub
    880     hexagon_A2_satuh,                          // llvm.hexagon.A2.satuh
    881     hexagon_A2_sub,                            // llvm.hexagon.A2.sub
    882     hexagon_A2_subh_h16_hh,                    // llvm.hexagon.A2.subh.h16.hh
    883     hexagon_A2_subh_h16_hl,                    // llvm.hexagon.A2.subh.h16.hl
    884     hexagon_A2_subh_h16_lh,                    // llvm.hexagon.A2.subh.h16.lh
    885     hexagon_A2_subh_h16_ll,                    // llvm.hexagon.A2.subh.h16.ll
    886     hexagon_A2_subh_h16_sat_hh,                // llvm.hexagon.A2.subh.h16.sat.hh
    887     hexagon_A2_subh_h16_sat_hl,                // llvm.hexagon.A2.subh.h16.sat.hl
    888     hexagon_A2_subh_h16_sat_lh,                // llvm.hexagon.A2.subh.h16.sat.lh
    889     hexagon_A2_subh_h16_sat_ll,                // llvm.hexagon.A2.subh.h16.sat.ll
    890     hexagon_A2_subh_l16_hl,                    // llvm.hexagon.A2.subh.l16.hl
    891     hexagon_A2_subh_l16_ll,                    // llvm.hexagon.A2.subh.l16.ll
    892     hexagon_A2_subh_l16_sat_hl,                // llvm.hexagon.A2.subh.l16.sat.hl
    893     hexagon_A2_subh_l16_sat_ll,                // llvm.hexagon.A2.subh.l16.sat.ll
    894     hexagon_A2_subp,                           // llvm.hexagon.A2.subp
    895     hexagon_A2_subri,                          // llvm.hexagon.A2.subri
    896     hexagon_A2_subsat,                         // llvm.hexagon.A2.subsat
    897     hexagon_A2_svaddh,                         // llvm.hexagon.A2.svaddh
    898     hexagon_A2_svaddhs,                        // llvm.hexagon.A2.svaddhs
    899     hexagon_A2_svadduhs,                       // llvm.hexagon.A2.svadduhs
    900     hexagon_A2_svavgh,                         // llvm.hexagon.A2.svavgh
    901     hexagon_A2_svavghs,                        // llvm.hexagon.A2.svavghs
    902     hexagon_A2_svnavgh,                        // llvm.hexagon.A2.svnavgh
    903     hexagon_A2_svsubh,                         // llvm.hexagon.A2.svsubh
    904     hexagon_A2_svsubhs,                        // llvm.hexagon.A2.svsubhs
    905     hexagon_A2_svsubuhs,                       // llvm.hexagon.A2.svsubuhs
    906     hexagon_A2_swiz,                           // llvm.hexagon.A2.swiz
    907     hexagon_A2_sxtb,                           // llvm.hexagon.A2.sxtb
    908     hexagon_A2_sxth,                           // llvm.hexagon.A2.sxth
    909     hexagon_A2_sxtw,                           // llvm.hexagon.A2.sxtw
    910     hexagon_A2_tfr,                            // llvm.hexagon.A2.tfr
    911     hexagon_A2_tfrih,                          // llvm.hexagon.A2.tfrih
    912     hexagon_A2_tfril,                          // llvm.hexagon.A2.tfril
    913     hexagon_A2_tfrp,                           // llvm.hexagon.A2.tfrp
    914     hexagon_A2_tfrpi,                          // llvm.hexagon.A2.tfrpi
    915     hexagon_A2_tfrsi,                          // llvm.hexagon.A2.tfrsi
    916     hexagon_A2_vabsh,                          // llvm.hexagon.A2.vabsh
    917     hexagon_A2_vabshsat,                       // llvm.hexagon.A2.vabshsat
    918     hexagon_A2_vabsw,                          // llvm.hexagon.A2.vabsw
    919     hexagon_A2_vabswsat,                       // llvm.hexagon.A2.vabswsat
    920     hexagon_A2_vaddb_map,                      // llvm.hexagon.A2.vaddb.map
    921     hexagon_A2_vaddh,                          // llvm.hexagon.A2.vaddh
    922     hexagon_A2_vaddhs,                         // llvm.hexagon.A2.vaddhs
    923     hexagon_A2_vaddub,                         // llvm.hexagon.A2.vaddub
    924     hexagon_A2_vaddubs,                        // llvm.hexagon.A2.vaddubs
    925     hexagon_A2_vadduhs,                        // llvm.hexagon.A2.vadduhs
    926     hexagon_A2_vaddw,                          // llvm.hexagon.A2.vaddw
    927     hexagon_A2_vaddws,                         // llvm.hexagon.A2.vaddws
    928     hexagon_A2_vavgh,                          // llvm.hexagon.A2.vavgh
    929     hexagon_A2_vavghcr,                        // llvm.hexagon.A2.vavghcr
    930     hexagon_A2_vavghr,                         // llvm.hexagon.A2.vavghr
    931     hexagon_A2_vavgub,                         // llvm.hexagon.A2.vavgub
    932     hexagon_A2_vavgubr,                        // llvm.hexagon.A2.vavgubr
    933     hexagon_A2_vavguh,                         // llvm.hexagon.A2.vavguh
    934     hexagon_A2_vavguhr,                        // llvm.hexagon.A2.vavguhr
    935     hexagon_A2_vavguw,                         // llvm.hexagon.A2.vavguw
    936     hexagon_A2_vavguwr,                        // llvm.hexagon.A2.vavguwr
    937     hexagon_A2_vavgw,                          // llvm.hexagon.A2.vavgw
    938     hexagon_A2_vavgwcr,                        // llvm.hexagon.A2.vavgwcr
    939     hexagon_A2_vavgwr,                         // llvm.hexagon.A2.vavgwr
    940     hexagon_A2_vcmpbeq,                        // llvm.hexagon.A2.vcmpbeq
    941     hexagon_A2_vcmpbgtu,                       // llvm.hexagon.A2.vcmpbgtu
    942     hexagon_A2_vcmpheq,                        // llvm.hexagon.A2.vcmpheq
    943     hexagon_A2_vcmphgt,                        // llvm.hexagon.A2.vcmphgt
    944     hexagon_A2_vcmphgtu,                       // llvm.hexagon.A2.vcmphgtu
    945     hexagon_A2_vcmpweq,                        // llvm.hexagon.A2.vcmpweq
    946     hexagon_A2_vcmpwgt,                        // llvm.hexagon.A2.vcmpwgt
    947     hexagon_A2_vcmpwgtu,                       // llvm.hexagon.A2.vcmpwgtu
    948     hexagon_A2_vconj,                          // llvm.hexagon.A2.vconj
    949     hexagon_A2_vmaxb,                          // llvm.hexagon.A2.vmaxb
    950     hexagon_A2_vmaxh,                          // llvm.hexagon.A2.vmaxh
    951     hexagon_A2_vmaxub,                         // llvm.hexagon.A2.vmaxub
    952     hexagon_A2_vmaxuh,                         // llvm.hexagon.A2.vmaxuh
    953     hexagon_A2_vmaxuw,                         // llvm.hexagon.A2.vmaxuw
    954     hexagon_A2_vmaxw,                          // llvm.hexagon.A2.vmaxw
    955     hexagon_A2_vminb,                          // llvm.hexagon.A2.vminb
    956     hexagon_A2_vminh,                          // llvm.hexagon.A2.vminh
    957     hexagon_A2_vminub,                         // llvm.hexagon.A2.vminub
    958     hexagon_A2_vminuh,                         // llvm.hexagon.A2.vminuh
    959     hexagon_A2_vminuw,                         // llvm.hexagon.A2.vminuw
    960     hexagon_A2_vminw,                          // llvm.hexagon.A2.vminw
    961     hexagon_A2_vnavgh,                         // llvm.hexagon.A2.vnavgh
    962     hexagon_A2_vnavghcr,                       // llvm.hexagon.A2.vnavghcr
    963     hexagon_A2_vnavghr,                        // llvm.hexagon.A2.vnavghr
    964     hexagon_A2_vnavgw,                         // llvm.hexagon.A2.vnavgw
    965     hexagon_A2_vnavgwcr,                       // llvm.hexagon.A2.vnavgwcr
    966     hexagon_A2_vnavgwr,                        // llvm.hexagon.A2.vnavgwr
    967     hexagon_A2_vraddub,                        // llvm.hexagon.A2.vraddub
    968     hexagon_A2_vraddub_acc,                    // llvm.hexagon.A2.vraddub.acc
    969     hexagon_A2_vrsadub,                        // llvm.hexagon.A2.vrsadub
    970     hexagon_A2_vrsadub_acc,                    // llvm.hexagon.A2.vrsadub.acc
    971     hexagon_A2_vsubb_map,                      // llvm.hexagon.A2.vsubb.map
    972     hexagon_A2_vsubh,                          // llvm.hexagon.A2.vsubh
    973     hexagon_A2_vsubhs,                         // llvm.hexagon.A2.vsubhs
    974     hexagon_A2_vsubub,                         // llvm.hexagon.A2.vsubub
    975     hexagon_A2_vsububs,                        // llvm.hexagon.A2.vsububs
    976     hexagon_A2_vsubuhs,                        // llvm.hexagon.A2.vsubuhs
    977     hexagon_A2_vsubw,                          // llvm.hexagon.A2.vsubw
    978     hexagon_A2_vsubws,                         // llvm.hexagon.A2.vsubws
    979     hexagon_A2_xor,                            // llvm.hexagon.A2.xor
    980     hexagon_A2_xorp,                           // llvm.hexagon.A2.xorp
    981     hexagon_A2_zxtb,                           // llvm.hexagon.A2.zxtb
    982     hexagon_A2_zxth,                           // llvm.hexagon.A2.zxth
    983     hexagon_A4_andn,                           // llvm.hexagon.A4.andn
    984     hexagon_A4_andnp,                          // llvm.hexagon.A4.andnp
    985     hexagon_A4_bitsplit,                       // llvm.hexagon.A4.bitsplit
    986     hexagon_A4_bitspliti,                      // llvm.hexagon.A4.bitspliti
    987     hexagon_A4_boundscheck,                    // llvm.hexagon.A4.boundscheck
    988     hexagon_A4_cmpbeq,                         // llvm.hexagon.A4.cmpbeq
    989     hexagon_A4_cmpbeqi,                        // llvm.hexagon.A4.cmpbeqi
    990     hexagon_A4_cmpbgt,                         // llvm.hexagon.A4.cmpbgt
    991     hexagon_A4_cmpbgti,                        // llvm.hexagon.A4.cmpbgti
    992     hexagon_A4_cmpbgtu,                        // llvm.hexagon.A4.cmpbgtu
    993     hexagon_A4_cmpbgtui,                       // llvm.hexagon.A4.cmpbgtui
    994     hexagon_A4_cmpheq,                         // llvm.hexagon.A4.cmpheq
    995     hexagon_A4_cmpheqi,                        // llvm.hexagon.A4.cmpheqi
    996     hexagon_A4_cmphgt,                         // llvm.hexagon.A4.cmphgt
    997     hexagon_A4_cmphgti,                        // llvm.hexagon.A4.cmphgti
    998     hexagon_A4_cmphgtu,                        // llvm.hexagon.A4.cmphgtu
    999     hexagon_A4_cmphgtui,                       // llvm.hexagon.A4.cmphgtui
   1000     hexagon_A4_combineir,                      // llvm.hexagon.A4.combineir
   1001     hexagon_A4_combineri,                      // llvm.hexagon.A4.combineri
   1002     hexagon_A4_cround_ri,                      // llvm.hexagon.A4.cround.ri
   1003     hexagon_A4_cround_rr,                      // llvm.hexagon.A4.cround.rr
   1004     hexagon_A4_modwrapu,                       // llvm.hexagon.A4.modwrapu
   1005     hexagon_A4_orn,                            // llvm.hexagon.A4.orn
   1006     hexagon_A4_ornp,                           // llvm.hexagon.A4.ornp
   1007     hexagon_A4_rcmpeq,                         // llvm.hexagon.A4.rcmpeq
   1008     hexagon_A4_rcmpeqi,                        // llvm.hexagon.A4.rcmpeqi
   1009     hexagon_A4_rcmpneq,                        // llvm.hexagon.A4.rcmpneq
   1010     hexagon_A4_rcmpneqi,                       // llvm.hexagon.A4.rcmpneqi
   1011     hexagon_A4_round_ri,                       // llvm.hexagon.A4.round.ri
   1012     hexagon_A4_round_ri_sat,                   // llvm.hexagon.A4.round.ri.sat
   1013     hexagon_A4_round_rr,                       // llvm.hexagon.A4.round.rr
   1014     hexagon_A4_round_rr_sat,                   // llvm.hexagon.A4.round.rr.sat
   1015     hexagon_A4_tlbmatch,                       // llvm.hexagon.A4.tlbmatch
   1016     hexagon_A4_vcmpbeq_any,                    // llvm.hexagon.A4.vcmpbeq.any
   1017     hexagon_A4_vcmpbeqi,                       // llvm.hexagon.A4.vcmpbeqi
   1018     hexagon_A4_vcmpbgt,                        // llvm.hexagon.A4.vcmpbgt
   1019     hexagon_A4_vcmpbgti,                       // llvm.hexagon.A4.vcmpbgti
   1020     hexagon_A4_vcmpbgtui,                      // llvm.hexagon.A4.vcmpbgtui
   1021     hexagon_A4_vcmpheqi,                       // llvm.hexagon.A4.vcmpheqi
   1022     hexagon_A4_vcmphgti,                       // llvm.hexagon.A4.vcmphgti
   1023     hexagon_A4_vcmphgtui,                      // llvm.hexagon.A4.vcmphgtui
   1024     hexagon_A4_vcmpweqi,                       // llvm.hexagon.A4.vcmpweqi
   1025     hexagon_A4_vcmpwgti,                       // llvm.hexagon.A4.vcmpwgti
   1026     hexagon_A4_vcmpwgtui,                      // llvm.hexagon.A4.vcmpwgtui
   1027     hexagon_A4_vrmaxh,                         // llvm.hexagon.A4.vrmaxh
   1028     hexagon_A4_vrmaxuh,                        // llvm.hexagon.A4.vrmaxuh
   1029     hexagon_A4_vrmaxuw,                        // llvm.hexagon.A4.vrmaxuw
   1030     hexagon_A4_vrmaxw,                         // llvm.hexagon.A4.vrmaxw
   1031     hexagon_A4_vrminh,                         // llvm.hexagon.A4.vrminh
   1032     hexagon_A4_vrminuh,                        // llvm.hexagon.A4.vrminuh
   1033     hexagon_A4_vrminuw,                        // llvm.hexagon.A4.vrminuw
   1034     hexagon_A4_vrminw,                         // llvm.hexagon.A4.vrminw
   1035     hexagon_A5_vaddhubs,                       // llvm.hexagon.A5.vaddhubs
   1036     hexagon_C2_all8,                           // llvm.hexagon.C2.all8
   1037     hexagon_C2_and,                            // llvm.hexagon.C2.and
   1038     hexagon_C2_andn,                           // llvm.hexagon.C2.andn
   1039     hexagon_C2_any8,                           // llvm.hexagon.C2.any8
   1040     hexagon_C2_bitsclr,                        // llvm.hexagon.C2.bitsclr
   1041     hexagon_C2_bitsclri,                       // llvm.hexagon.C2.bitsclri
   1042     hexagon_C2_bitsset,                        // llvm.hexagon.C2.bitsset
   1043     hexagon_C2_cmpeq,                          // llvm.hexagon.C2.cmpeq
   1044     hexagon_C2_cmpeqi,                         // llvm.hexagon.C2.cmpeqi
   1045     hexagon_C2_cmpeqp,                         // llvm.hexagon.C2.cmpeqp
   1046     hexagon_C2_cmpgei,                         // llvm.hexagon.C2.cmpgei
   1047     hexagon_C2_cmpgeui,                        // llvm.hexagon.C2.cmpgeui
   1048     hexagon_C2_cmpgt,                          // llvm.hexagon.C2.cmpgt
   1049     hexagon_C2_cmpgti,                         // llvm.hexagon.C2.cmpgti
   1050     hexagon_C2_cmpgtp,                         // llvm.hexagon.C2.cmpgtp
   1051     hexagon_C2_cmpgtu,                         // llvm.hexagon.C2.cmpgtu
   1052     hexagon_C2_cmpgtui,                        // llvm.hexagon.C2.cmpgtui
   1053     hexagon_C2_cmpgtup,                        // llvm.hexagon.C2.cmpgtup
   1054     hexagon_C2_cmplt,                          // llvm.hexagon.C2.cmplt
   1055     hexagon_C2_cmpltu,                         // llvm.hexagon.C2.cmpltu
   1056     hexagon_C2_mask,                           // llvm.hexagon.C2.mask
   1057     hexagon_C2_mux,                            // llvm.hexagon.C2.mux
   1058     hexagon_C2_muxii,                          // llvm.hexagon.C2.muxii
   1059     hexagon_C2_muxir,                          // llvm.hexagon.C2.muxir
   1060     hexagon_C2_muxri,                          // llvm.hexagon.C2.muxri
   1061     hexagon_C2_not,                            // llvm.hexagon.C2.not
   1062     hexagon_C2_or,                             // llvm.hexagon.C2.or
   1063     hexagon_C2_orn,                            // llvm.hexagon.C2.orn
   1064     hexagon_C2_pxfer_map,                      // llvm.hexagon.C2.pxfer.map
   1065     hexagon_C2_tfrpr,                          // llvm.hexagon.C2.tfrpr
   1066     hexagon_C2_tfrrp,                          // llvm.hexagon.C2.tfrrp
   1067     hexagon_C2_vitpack,                        // llvm.hexagon.C2.vitpack
   1068     hexagon_C2_vmux,                           // llvm.hexagon.C2.vmux
   1069     hexagon_C2_xor,                            // llvm.hexagon.C2.xor
   1070     hexagon_C4_and_and,                        // llvm.hexagon.C4.and.and
   1071     hexagon_C4_and_andn,                       // llvm.hexagon.C4.and.andn
   1072     hexagon_C4_and_or,                         // llvm.hexagon.C4.and.or
   1073     hexagon_C4_and_orn,                        // llvm.hexagon.C4.and.orn
   1074     hexagon_C4_cmplte,                         // llvm.hexagon.C4.cmplte
   1075     hexagon_C4_cmpltei,                        // llvm.hexagon.C4.cmpltei
   1076     hexagon_C4_cmplteu,                        // llvm.hexagon.C4.cmplteu
   1077     hexagon_C4_cmplteui,                       // llvm.hexagon.C4.cmplteui
   1078     hexagon_C4_cmpneq,                         // llvm.hexagon.C4.cmpneq
   1079     hexagon_C4_cmpneqi,                        // llvm.hexagon.C4.cmpneqi
   1080     hexagon_C4_fastcorner9,                    // llvm.hexagon.C4.fastcorner9
   1081     hexagon_C4_fastcorner9_not,                // llvm.hexagon.C4.fastcorner9.not
   1082     hexagon_C4_nbitsclr,                       // llvm.hexagon.C4.nbitsclr
   1083     hexagon_C4_nbitsclri,                      // llvm.hexagon.C4.nbitsclri
   1084     hexagon_C4_nbitsset,                       // llvm.hexagon.C4.nbitsset
   1085     hexagon_C4_or_and,                         // llvm.hexagon.C4.or.and
   1086     hexagon_C4_or_andn,                        // llvm.hexagon.C4.or.andn
   1087     hexagon_C4_or_or,                          // llvm.hexagon.C4.or.or
   1088     hexagon_C4_or_orn,                         // llvm.hexagon.C4.or.orn
   1089     hexagon_F2_conv_d2df,                      // llvm.hexagon.F2.conv.d2df
   1090     hexagon_F2_conv_d2sf,                      // llvm.hexagon.F2.conv.d2sf
   1091     hexagon_F2_conv_df2d,                      // llvm.hexagon.F2.conv.df2d
   1092     hexagon_F2_conv_df2d_chop,                 // llvm.hexagon.F2.conv.df2d.chop
   1093     hexagon_F2_conv_df2sf,                     // llvm.hexagon.F2.conv.df2sf
   1094     hexagon_F2_conv_df2ud,                     // llvm.hexagon.F2.conv.df2ud
   1095     hexagon_F2_conv_df2ud_chop,                // llvm.hexagon.F2.conv.df2ud.chop
   1096     hexagon_F2_conv_df2uw,                     // llvm.hexagon.F2.conv.df2uw
   1097     hexagon_F2_conv_df2uw_chop,                // llvm.hexagon.F2.conv.df2uw.chop
   1098     hexagon_F2_conv_df2w,                      // llvm.hexagon.F2.conv.df2w
   1099     hexagon_F2_conv_df2w_chop,                 // llvm.hexagon.F2.conv.df2w.chop
   1100     hexagon_F2_conv_sf2d,                      // llvm.hexagon.F2.conv.sf2d
   1101     hexagon_F2_conv_sf2d_chop,                 // llvm.hexagon.F2.conv.sf2d.chop
   1102     hexagon_F2_conv_sf2df,                     // llvm.hexagon.F2.conv.sf2df
   1103     hexagon_F2_conv_sf2ud,                     // llvm.hexagon.F2.conv.sf2ud
   1104     hexagon_F2_conv_sf2ud_chop,                // llvm.hexagon.F2.conv.sf2ud.chop
   1105     hexagon_F2_conv_sf2uw,                     // llvm.hexagon.F2.conv.sf2uw
   1106     hexagon_F2_conv_sf2uw_chop,                // llvm.hexagon.F2.conv.sf2uw.chop
   1107     hexagon_F2_conv_sf2w,                      // llvm.hexagon.F2.conv.sf2w
   1108     hexagon_F2_conv_sf2w_chop,                 // llvm.hexagon.F2.conv.sf2w.chop
   1109     hexagon_F2_conv_ud2df,                     // llvm.hexagon.F2.conv.ud2df
   1110     hexagon_F2_conv_ud2sf,                     // llvm.hexagon.F2.conv.ud2sf
   1111     hexagon_F2_conv_uw2df,                     // llvm.hexagon.F2.conv.uw2df
   1112     hexagon_F2_conv_uw2sf,                     // llvm.hexagon.F2.conv.uw2sf
   1113     hexagon_F2_conv_w2df,                      // llvm.hexagon.F2.conv.w2df
   1114     hexagon_F2_conv_w2sf,                      // llvm.hexagon.F2.conv.w2sf
   1115     hexagon_F2_dfclass,                        // llvm.hexagon.F2.dfclass
   1116     hexagon_F2_dfcmpeq,                        // llvm.hexagon.F2.dfcmpeq
   1117     hexagon_F2_dfcmpge,                        // llvm.hexagon.F2.dfcmpge
   1118     hexagon_F2_dfcmpgt,                        // llvm.hexagon.F2.dfcmpgt
   1119     hexagon_F2_dfcmpuo,                        // llvm.hexagon.F2.dfcmpuo
   1120     hexagon_F2_dfimm_n,                        // llvm.hexagon.F2.dfimm.n
   1121     hexagon_F2_dfimm_p,                        // llvm.hexagon.F2.dfimm.p
   1122     hexagon_F2_sfadd,                          // llvm.hexagon.F2.sfadd
   1123     hexagon_F2_sfclass,                        // llvm.hexagon.F2.sfclass
   1124     hexagon_F2_sfcmpeq,                        // llvm.hexagon.F2.sfcmpeq
   1125     hexagon_F2_sfcmpge,                        // llvm.hexagon.F2.sfcmpge
   1126     hexagon_F2_sfcmpgt,                        // llvm.hexagon.F2.sfcmpgt
   1127     hexagon_F2_sfcmpuo,                        // llvm.hexagon.F2.sfcmpuo
   1128     hexagon_F2_sffixupd,                       // llvm.hexagon.F2.sffixupd
   1129     hexagon_F2_sffixupn,                       // llvm.hexagon.F2.sffixupn
   1130     hexagon_F2_sffixupr,                       // llvm.hexagon.F2.sffixupr
   1131     hexagon_F2_sffma,                          // llvm.hexagon.F2.sffma
   1132     hexagon_F2_sffma_lib,                      // llvm.hexagon.F2.sffma.lib
   1133     hexagon_F2_sffma_sc,                       // llvm.hexagon.F2.sffma.sc
   1134     hexagon_F2_sffms,                          // llvm.hexagon.F2.sffms
   1135     hexagon_F2_sffms_lib,                      // llvm.hexagon.F2.sffms.lib
   1136     hexagon_F2_sfimm_n,                        // llvm.hexagon.F2.sfimm.n
   1137     hexagon_F2_sfimm_p,                        // llvm.hexagon.F2.sfimm.p
   1138     hexagon_F2_sfmax,                          // llvm.hexagon.F2.sfmax
   1139     hexagon_F2_sfmin,                          // llvm.hexagon.F2.sfmin
   1140     hexagon_F2_sfmpy,                          // llvm.hexagon.F2.sfmpy
   1141     hexagon_F2_sfsub,                          // llvm.hexagon.F2.sfsub
   1142     hexagon_L2_loadw_locked,                   // llvm.hexagon.L2.loadw.locked
   1143     hexagon_L4_loadd_locked,                   // llvm.hexagon.L4.loadd.locked
   1144     hexagon_M2_acci,                           // llvm.hexagon.M2.acci
   1145     hexagon_M2_accii,                          // llvm.hexagon.M2.accii
   1146     hexagon_M2_cmaci_s0,                       // llvm.hexagon.M2.cmaci.s0
   1147     hexagon_M2_cmacr_s0,                       // llvm.hexagon.M2.cmacr.s0
   1148     hexagon_M2_cmacs_s0,                       // llvm.hexagon.M2.cmacs.s0
   1149     hexagon_M2_cmacs_s1,                       // llvm.hexagon.M2.cmacs.s1
   1150     hexagon_M2_cmacsc_s0,                      // llvm.hexagon.M2.cmacsc.s0
   1151     hexagon_M2_cmacsc_s1,                      // llvm.hexagon.M2.cmacsc.s1
   1152     hexagon_M2_cmpyi_s0,                       // llvm.hexagon.M2.cmpyi.s0
   1153     hexagon_M2_cmpyr_s0,                       // llvm.hexagon.M2.cmpyr.s0
   1154     hexagon_M2_cmpyrs_s0,                      // llvm.hexagon.M2.cmpyrs.s0
   1155     hexagon_M2_cmpyrs_s1,                      // llvm.hexagon.M2.cmpyrs.s1
   1156     hexagon_M2_cmpyrsc_s0,                     // llvm.hexagon.M2.cmpyrsc.s0
   1157     hexagon_M2_cmpyrsc_s1,                     // llvm.hexagon.M2.cmpyrsc.s1
   1158     hexagon_M2_cmpys_s0,                       // llvm.hexagon.M2.cmpys.s0
   1159     hexagon_M2_cmpys_s1,                       // llvm.hexagon.M2.cmpys.s1
   1160     hexagon_M2_cmpysc_s0,                      // llvm.hexagon.M2.cmpysc.s0
   1161     hexagon_M2_cmpysc_s1,                      // llvm.hexagon.M2.cmpysc.s1
   1162     hexagon_M2_cnacs_s0,                       // llvm.hexagon.M2.cnacs.s0
   1163     hexagon_M2_cnacs_s1,                       // llvm.hexagon.M2.cnacs.s1
   1164     hexagon_M2_cnacsc_s0,                      // llvm.hexagon.M2.cnacsc.s0
   1165     hexagon_M2_cnacsc_s1,                      // llvm.hexagon.M2.cnacsc.s1
   1166     hexagon_M2_dpmpyss_acc_s0,                 // llvm.hexagon.M2.dpmpyss.acc.s0
   1167     hexagon_M2_dpmpyss_nac_s0,                 // llvm.hexagon.M2.dpmpyss.nac.s0
   1168     hexagon_M2_dpmpyss_rnd_s0,                 // llvm.hexagon.M2.dpmpyss.rnd.s0
   1169     hexagon_M2_dpmpyss_s0,                     // llvm.hexagon.M2.dpmpyss.s0
   1170     hexagon_M2_dpmpyuu_acc_s0,                 // llvm.hexagon.M2.dpmpyuu.acc.s0
   1171     hexagon_M2_dpmpyuu_nac_s0,                 // llvm.hexagon.M2.dpmpyuu.nac.s0
   1172     hexagon_M2_dpmpyuu_s0,                     // llvm.hexagon.M2.dpmpyuu.s0
   1173     hexagon_M2_hmmpyh_rs1,                     // llvm.hexagon.M2.hmmpyh.rs1
   1174     hexagon_M2_hmmpyh_s1,                      // llvm.hexagon.M2.hmmpyh.s1
   1175     hexagon_M2_hmmpyl_rs1,                     // llvm.hexagon.M2.hmmpyl.rs1
   1176     hexagon_M2_hmmpyl_s1,                      // llvm.hexagon.M2.hmmpyl.s1
   1177     hexagon_M2_maci,                           // llvm.hexagon.M2.maci
   1178     hexagon_M2_macsin,                         // llvm.hexagon.M2.macsin
   1179     hexagon_M2_macsip,                         // llvm.hexagon.M2.macsip
   1180     hexagon_M2_mmachs_rs0,                     // llvm.hexagon.M2.mmachs.rs0
   1181     hexagon_M2_mmachs_rs1,                     // llvm.hexagon.M2.mmachs.rs1
   1182     hexagon_M2_mmachs_s0,                      // llvm.hexagon.M2.mmachs.s0
   1183     hexagon_M2_mmachs_s1,                      // llvm.hexagon.M2.mmachs.s1
   1184     hexagon_M2_mmacls_rs0,                     // llvm.hexagon.M2.mmacls.rs0
   1185     hexagon_M2_mmacls_rs1,                     // llvm.hexagon.M2.mmacls.rs1
   1186     hexagon_M2_mmacls_s0,                      // llvm.hexagon.M2.mmacls.s0
   1187     hexagon_M2_mmacls_s1,                      // llvm.hexagon.M2.mmacls.s1
   1188     hexagon_M2_mmacuhs_rs0,                    // llvm.hexagon.M2.mmacuhs.rs0
   1189     hexagon_M2_mmacuhs_rs1,                    // llvm.hexagon.M2.mmacuhs.rs1
   1190     hexagon_M2_mmacuhs_s0,                     // llvm.hexagon.M2.mmacuhs.s0
   1191     hexagon_M2_mmacuhs_s1,                     // llvm.hexagon.M2.mmacuhs.s1
   1192     hexagon_M2_mmaculs_rs0,                    // llvm.hexagon.M2.mmaculs.rs0
   1193     hexagon_M2_mmaculs_rs1,                    // llvm.hexagon.M2.mmaculs.rs1
   1194     hexagon_M2_mmaculs_s0,                     // llvm.hexagon.M2.mmaculs.s0
   1195     hexagon_M2_mmaculs_s1,                     // llvm.hexagon.M2.mmaculs.s1
   1196     hexagon_M2_mmpyh_rs0,                      // llvm.hexagon.M2.mmpyh.rs0
   1197     hexagon_M2_mmpyh_rs1,                      // llvm.hexagon.M2.mmpyh.rs1
   1198     hexagon_M2_mmpyh_s0,                       // llvm.hexagon.M2.mmpyh.s0
   1199     hexagon_M2_mmpyh_s1,                       // llvm.hexagon.M2.mmpyh.s1
   1200     hexagon_M2_mmpyl_rs0,                      // llvm.hexagon.M2.mmpyl.rs0
   1201     hexagon_M2_mmpyl_rs1,                      // llvm.hexagon.M2.mmpyl.rs1
   1202     hexagon_M2_mmpyl_s0,                       // llvm.hexagon.M2.mmpyl.s0
   1203     hexagon_M2_mmpyl_s1,                       // llvm.hexagon.M2.mmpyl.s1
   1204     hexagon_M2_mmpyuh_rs0,                     // llvm.hexagon.M2.mmpyuh.rs0
   1205     hexagon_M2_mmpyuh_rs1,                     // llvm.hexagon.M2.mmpyuh.rs1
   1206     hexagon_M2_mmpyuh_s0,                      // llvm.hexagon.M2.mmpyuh.s0
   1207     hexagon_M2_mmpyuh_s1,                      // llvm.hexagon.M2.mmpyuh.s1
   1208     hexagon_M2_mmpyul_rs0,                     // llvm.hexagon.M2.mmpyul.rs0
   1209     hexagon_M2_mmpyul_rs1,                     // llvm.hexagon.M2.mmpyul.rs1
   1210     hexagon_M2_mmpyul_s0,                      // llvm.hexagon.M2.mmpyul.s0
   1211     hexagon_M2_mmpyul_s1,                      // llvm.hexagon.M2.mmpyul.s1
   1212     hexagon_M2_mpy_acc_hh_s0,                  // llvm.hexagon.M2.mpy.acc.hh.s0
   1213     hexagon_M2_mpy_acc_hh_s1,                  // llvm.hexagon.M2.mpy.acc.hh.s1
   1214     hexagon_M2_mpy_acc_hl_s0,                  // llvm.hexagon.M2.mpy.acc.hl.s0
   1215     hexagon_M2_mpy_acc_hl_s1,                  // llvm.hexagon.M2.mpy.acc.hl.s1
   1216     hexagon_M2_mpy_acc_lh_s0,                  // llvm.hexagon.M2.mpy.acc.lh.s0
   1217     hexagon_M2_mpy_acc_lh_s1,                  // llvm.hexagon.M2.mpy.acc.lh.s1
   1218     hexagon_M2_mpy_acc_ll_s0,                  // llvm.hexagon.M2.mpy.acc.ll.s0
   1219     hexagon_M2_mpy_acc_ll_s1,                  // llvm.hexagon.M2.mpy.acc.ll.s1
   1220     hexagon_M2_mpy_acc_sat_hh_s0,              // llvm.hexagon.M2.mpy.acc.sat.hh.s0
   1221     hexagon_M2_mpy_acc_sat_hh_s1,              // llvm.hexagon.M2.mpy.acc.sat.hh.s1
   1222     hexagon_M2_mpy_acc_sat_hl_s0,              // llvm.hexagon.M2.mpy.acc.sat.hl.s0
   1223     hexagon_M2_mpy_acc_sat_hl_s1,              // llvm.hexagon.M2.mpy.acc.sat.hl.s1
   1224     hexagon_M2_mpy_acc_sat_lh_s0,              // llvm.hexagon.M2.mpy.acc.sat.lh.s0
   1225     hexagon_M2_mpy_acc_sat_lh_s1,              // llvm.hexagon.M2.mpy.acc.sat.lh.s1
   1226     hexagon_M2_mpy_acc_sat_ll_s0,              // llvm.hexagon.M2.mpy.acc.sat.ll.s0
   1227     hexagon_M2_mpy_acc_sat_ll_s1,              // llvm.hexagon.M2.mpy.acc.sat.ll.s1
   1228     hexagon_M2_mpy_hh_s0,                      // llvm.hexagon.M2.mpy.hh.s0
   1229     hexagon_M2_mpy_hh_s1,                      // llvm.hexagon.M2.mpy.hh.s1
   1230     hexagon_M2_mpy_hl_s0,                      // llvm.hexagon.M2.mpy.hl.s0
   1231     hexagon_M2_mpy_hl_s1,                      // llvm.hexagon.M2.mpy.hl.s1
   1232     hexagon_M2_mpy_lh_s0,                      // llvm.hexagon.M2.mpy.lh.s0
   1233     hexagon_M2_mpy_lh_s1,                      // llvm.hexagon.M2.mpy.lh.s1
   1234     hexagon_M2_mpy_ll_s0,                      // llvm.hexagon.M2.mpy.ll.s0
   1235     hexagon_M2_mpy_ll_s1,                      // llvm.hexagon.M2.mpy.ll.s1
   1236     hexagon_M2_mpy_nac_hh_s0,                  // llvm.hexagon.M2.mpy.nac.hh.s0
   1237     hexagon_M2_mpy_nac_hh_s1,                  // llvm.hexagon.M2.mpy.nac.hh.s1
   1238     hexagon_M2_mpy_nac_hl_s0,                  // llvm.hexagon.M2.mpy.nac.hl.s0
   1239     hexagon_M2_mpy_nac_hl_s1,                  // llvm.hexagon.M2.mpy.nac.hl.s1
   1240     hexagon_M2_mpy_nac_lh_s0,                  // llvm.hexagon.M2.mpy.nac.lh.s0
   1241     hexagon_M2_mpy_nac_lh_s1,                  // llvm.hexagon.M2.mpy.nac.lh.s1
   1242     hexagon_M2_mpy_nac_ll_s0,                  // llvm.hexagon.M2.mpy.nac.ll.s0
   1243     hexagon_M2_mpy_nac_ll_s1,                  // llvm.hexagon.M2.mpy.nac.ll.s1
   1244     hexagon_M2_mpy_nac_sat_hh_s0,              // llvm.hexagon.M2.mpy.nac.sat.hh.s0
   1245     hexagon_M2_mpy_nac_sat_hh_s1,              // llvm.hexagon.M2.mpy.nac.sat.hh.s1
   1246     hexagon_M2_mpy_nac_sat_hl_s0,              // llvm.hexagon.M2.mpy.nac.sat.hl.s0
   1247     hexagon_M2_mpy_nac_sat_hl_s1,              // llvm.hexagon.M2.mpy.nac.sat.hl.s1
   1248     hexagon_M2_mpy_nac_sat_lh_s0,              // llvm.hexagon.M2.mpy.nac.sat.lh.s0
   1249     hexagon_M2_mpy_nac_sat_lh_s1,              // llvm.hexagon.M2.mpy.nac.sat.lh.s1
   1250     hexagon_M2_mpy_nac_sat_ll_s0,              // llvm.hexagon.M2.mpy.nac.sat.ll.s0
   1251     hexagon_M2_mpy_nac_sat_ll_s1,              // llvm.hexagon.M2.mpy.nac.sat.ll.s1
   1252     hexagon_M2_mpy_rnd_hh_s0,                  // llvm.hexagon.M2.mpy.rnd.hh.s0
   1253     hexagon_M2_mpy_rnd_hh_s1,                  // llvm.hexagon.M2.mpy.rnd.hh.s1
   1254     hexagon_M2_mpy_rnd_hl_s0,                  // llvm.hexagon.M2.mpy.rnd.hl.s0
   1255     hexagon_M2_mpy_rnd_hl_s1,                  // llvm.hexagon.M2.mpy.rnd.hl.s1
   1256     hexagon_M2_mpy_rnd_lh_s0,                  // llvm.hexagon.M2.mpy.rnd.lh.s0
   1257     hexagon_M2_mpy_rnd_lh_s1,                  // llvm.hexagon.M2.mpy.rnd.lh.s1
   1258     hexagon_M2_mpy_rnd_ll_s0,                  // llvm.hexagon.M2.mpy.rnd.ll.s0
   1259     hexagon_M2_mpy_rnd_ll_s1,                  // llvm.hexagon.M2.mpy.rnd.ll.s1
   1260     hexagon_M2_mpy_sat_hh_s0,                  // llvm.hexagon.M2.mpy.sat.hh.s0
   1261     hexagon_M2_mpy_sat_hh_s1,                  // llvm.hexagon.M2.mpy.sat.hh.s1
   1262     hexagon_M2_mpy_sat_hl_s0,                  // llvm.hexagon.M2.mpy.sat.hl.s0
   1263     hexagon_M2_mpy_sat_hl_s1,                  // llvm.hexagon.M2.mpy.sat.hl.s1
   1264     hexagon_M2_mpy_sat_lh_s0,                  // llvm.hexagon.M2.mpy.sat.lh.s0
   1265     hexagon_M2_mpy_sat_lh_s1,                  // llvm.hexagon.M2.mpy.sat.lh.s1
   1266     hexagon_M2_mpy_sat_ll_s0,                  // llvm.hexagon.M2.mpy.sat.ll.s0
   1267     hexagon_M2_mpy_sat_ll_s1,                  // llvm.hexagon.M2.mpy.sat.ll.s1
   1268     hexagon_M2_mpy_sat_rnd_hh_s0,              // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
   1269     hexagon_M2_mpy_sat_rnd_hh_s1,              // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
   1270     hexagon_M2_mpy_sat_rnd_hl_s0,              // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
   1271     hexagon_M2_mpy_sat_rnd_hl_s1,              // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
   1272     hexagon_M2_mpy_sat_rnd_lh_s0,              // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
   1273     hexagon_M2_mpy_sat_rnd_lh_s1,              // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
   1274     hexagon_M2_mpy_sat_rnd_ll_s0,              // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
   1275     hexagon_M2_mpy_sat_rnd_ll_s1,              // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
   1276     hexagon_M2_mpy_up,                         // llvm.hexagon.M2.mpy.up
   1277     hexagon_M2_mpy_up_s1,                      // llvm.hexagon.M2.mpy.up.s1
   1278     hexagon_M2_mpy_up_s1_sat,                  // llvm.hexagon.M2.mpy.up.s1.sat
   1279     hexagon_M2_mpyd_acc_hh_s0,                 // llvm.hexagon.M2.mpyd.acc.hh.s0
   1280     hexagon_M2_mpyd_acc_hh_s1,                 // llvm.hexagon.M2.mpyd.acc.hh.s1
   1281     hexagon_M2_mpyd_acc_hl_s0,                 // llvm.hexagon.M2.mpyd.acc.hl.s0
   1282     hexagon_M2_mpyd_acc_hl_s1,                 // llvm.hexagon.M2.mpyd.acc.hl.s1
   1283     hexagon_M2_mpyd_acc_lh_s0,                 // llvm.hexagon.M2.mpyd.acc.lh.s0
   1284     hexagon_M2_mpyd_acc_lh_s1,                 // llvm.hexagon.M2.mpyd.acc.lh.s1
   1285     hexagon_M2_mpyd_acc_ll_s0,                 // llvm.hexagon.M2.mpyd.acc.ll.s0
   1286     hexagon_M2_mpyd_acc_ll_s1,                 // llvm.hexagon.M2.mpyd.acc.ll.s1
   1287     hexagon_M2_mpyd_hh_s0,                     // llvm.hexagon.M2.mpyd.hh.s0
   1288     hexagon_M2_mpyd_hh_s1,                     // llvm.hexagon.M2.mpyd.hh.s1
   1289     hexagon_M2_mpyd_hl_s0,                     // llvm.hexagon.M2.mpyd.hl.s0
   1290     hexagon_M2_mpyd_hl_s1,                     // llvm.hexagon.M2.mpyd.hl.s1
   1291     hexagon_M2_mpyd_lh_s0,                     // llvm.hexagon.M2.mpyd.lh.s0
   1292     hexagon_M2_mpyd_lh_s1,                     // llvm.hexagon.M2.mpyd.lh.s1
   1293     hexagon_M2_mpyd_ll_s0,                     // llvm.hexagon.M2.mpyd.ll.s0
   1294     hexagon_M2_mpyd_ll_s1,                     // llvm.hexagon.M2.mpyd.ll.s1
   1295     hexagon_M2_mpyd_nac_hh_s0,                 // llvm.hexagon.M2.mpyd.nac.hh.s0
   1296     hexagon_M2_mpyd_nac_hh_s1,                 // llvm.hexagon.M2.mpyd.nac.hh.s1
   1297     hexagon_M2_mpyd_nac_hl_s0,                 // llvm.hexagon.M2.mpyd.nac.hl.s0
   1298     hexagon_M2_mpyd_nac_hl_s1,                 // llvm.hexagon.M2.mpyd.nac.hl.s1
   1299     hexagon_M2_mpyd_nac_lh_s0,                 // llvm.hexagon.M2.mpyd.nac.lh.s0
   1300     hexagon_M2_mpyd_nac_lh_s1,                 // llvm.hexagon.M2.mpyd.nac.lh.s1
   1301     hexagon_M2_mpyd_nac_ll_s0,                 // llvm.hexagon.M2.mpyd.nac.ll.s0
   1302     hexagon_M2_mpyd_nac_ll_s1,                 // llvm.hexagon.M2.mpyd.nac.ll.s1
   1303     hexagon_M2_mpyd_rnd_hh_s0,                 // llvm.hexagon.M2.mpyd.rnd.hh.s0
   1304     hexagon_M2_mpyd_rnd_hh_s1,                 // llvm.hexagon.M2.mpyd.rnd.hh.s1
   1305     hexagon_M2_mpyd_rnd_hl_s0,                 // llvm.hexagon.M2.mpyd.rnd.hl.s0
   1306     hexagon_M2_mpyd_rnd_hl_s1,                 // llvm.hexagon.M2.mpyd.rnd.hl.s1
   1307     hexagon_M2_mpyd_rnd_lh_s0,                 // llvm.hexagon.M2.mpyd.rnd.lh.s0
   1308     hexagon_M2_mpyd_rnd_lh_s1,                 // llvm.hexagon.M2.mpyd.rnd.lh.s1
   1309     hexagon_M2_mpyd_rnd_ll_s0,                 // llvm.hexagon.M2.mpyd.rnd.ll.s0
   1310     hexagon_M2_mpyd_rnd_ll_s1,                 // llvm.hexagon.M2.mpyd.rnd.ll.s1
   1311     hexagon_M2_mpyi,                           // llvm.hexagon.M2.mpyi
   1312     hexagon_M2_mpysmi,                         // llvm.hexagon.M2.mpysmi
   1313     hexagon_M2_mpysu_up,                       // llvm.hexagon.M2.mpysu.up
   1314     hexagon_M2_mpyu_acc_hh_s0,                 // llvm.hexagon.M2.mpyu.acc.hh.s0
   1315     hexagon_M2_mpyu_acc_hh_s1,                 // llvm.hexagon.M2.mpyu.acc.hh.s1
   1316     hexagon_M2_mpyu_acc_hl_s0,                 // llvm.hexagon.M2.mpyu.acc.hl.s0
   1317     hexagon_M2_mpyu_acc_hl_s1,                 // llvm.hexagon.M2.mpyu.acc.hl.s1
   1318     hexagon_M2_mpyu_acc_lh_s0,                 // llvm.hexagon.M2.mpyu.acc.lh.s0
   1319     hexagon_M2_mpyu_acc_lh_s1,                 // llvm.hexagon.M2.mpyu.acc.lh.s1
   1320     hexagon_M2_mpyu_acc_ll_s0,                 // llvm.hexagon.M2.mpyu.acc.ll.s0
   1321     hexagon_M2_mpyu_acc_ll_s1,                 // llvm.hexagon.M2.mpyu.acc.ll.s1
   1322     hexagon_M2_mpyu_hh_s0,                     // llvm.hexagon.M2.mpyu.hh.s0
   1323     hexagon_M2_mpyu_hh_s1,                     // llvm.hexagon.M2.mpyu.hh.s1
   1324     hexagon_M2_mpyu_hl_s0,                     // llvm.hexagon.M2.mpyu.hl.s0
   1325     hexagon_M2_mpyu_hl_s1,                     // llvm.hexagon.M2.mpyu.hl.s1
   1326     hexagon_M2_mpyu_lh_s0,                     // llvm.hexagon.M2.mpyu.lh.s0
   1327     hexagon_M2_mpyu_lh_s1,                     // llvm.hexagon.M2.mpyu.lh.s1
   1328     hexagon_M2_mpyu_ll_s0,                     // llvm.hexagon.M2.mpyu.ll.s0
   1329     hexagon_M2_mpyu_ll_s1,                     // llvm.hexagon.M2.mpyu.ll.s1
   1330     hexagon_M2_mpyu_nac_hh_s0,                 // llvm.hexagon.M2.mpyu.nac.hh.s0
   1331     hexagon_M2_mpyu_nac_hh_s1,                 // llvm.hexagon.M2.mpyu.nac.hh.s1
   1332     hexagon_M2_mpyu_nac_hl_s0,                 // llvm.hexagon.M2.mpyu.nac.hl.s0
   1333     hexagon_M2_mpyu_nac_hl_s1,                 // llvm.hexagon.M2.mpyu.nac.hl.s1
   1334     hexagon_M2_mpyu_nac_lh_s0,                 // llvm.hexagon.M2.mpyu.nac.lh.s0
   1335     hexagon_M2_mpyu_nac_lh_s1,                 // llvm.hexagon.M2.mpyu.nac.lh.s1
   1336     hexagon_M2_mpyu_nac_ll_s0,                 // llvm.hexagon.M2.mpyu.nac.ll.s0
   1337     hexagon_M2_mpyu_nac_ll_s1,                 // llvm.hexagon.M2.mpyu.nac.ll.s1
   1338     hexagon_M2_mpyu_up,                        // llvm.hexagon.M2.mpyu.up
   1339     hexagon_M2_mpyud_acc_hh_s0,                // llvm.hexagon.M2.mpyud.acc.hh.s0
   1340     hexagon_M2_mpyud_acc_hh_s1,                // llvm.hexagon.M2.mpyud.acc.hh.s1
   1341     hexagon_M2_mpyud_acc_hl_s0,                // llvm.hexagon.M2.mpyud.acc.hl.s0
   1342     hexagon_M2_mpyud_acc_hl_s1,                // llvm.hexagon.M2.mpyud.acc.hl.s1
   1343     hexagon_M2_mpyud_acc_lh_s0,                // llvm.hexagon.M2.mpyud.acc.lh.s0
   1344     hexagon_M2_mpyud_acc_lh_s1,                // llvm.hexagon.M2.mpyud.acc.lh.s1
   1345     hexagon_M2_mpyud_acc_ll_s0,                // llvm.hexagon.M2.mpyud.acc.ll.s0
   1346     hexagon_M2_mpyud_acc_ll_s1,                // llvm.hexagon.M2.mpyud.acc.ll.s1
   1347     hexagon_M2_mpyud_hh_s0,                    // llvm.hexagon.M2.mpyud.hh.s0
   1348     hexagon_M2_mpyud_hh_s1,                    // llvm.hexagon.M2.mpyud.hh.s1
   1349     hexagon_M2_mpyud_hl_s0,                    // llvm.hexagon.M2.mpyud.hl.s0
   1350     hexagon_M2_mpyud_hl_s1,                    // llvm.hexagon.M2.mpyud.hl.s1
   1351     hexagon_M2_mpyud_lh_s0,                    // llvm.hexagon.M2.mpyud.lh.s0
   1352     hexagon_M2_mpyud_lh_s1,                    // llvm.hexagon.M2.mpyud.lh.s1
   1353     hexagon_M2_mpyud_ll_s0,                    // llvm.hexagon.M2.mpyud.ll.s0
   1354     hexagon_M2_mpyud_ll_s1,                    // llvm.hexagon.M2.mpyud.ll.s1
   1355     hexagon_M2_mpyud_nac_hh_s0,                // llvm.hexagon.M2.mpyud.nac.hh.s0
   1356     hexagon_M2_mpyud_nac_hh_s1,                // llvm.hexagon.M2.mpyud.nac.hh.s1
   1357     hexagon_M2_mpyud_nac_hl_s0,                // llvm.hexagon.M2.mpyud.nac.hl.s0
   1358     hexagon_M2_mpyud_nac_hl_s1,                // llvm.hexagon.M2.mpyud.nac.hl.s1
   1359     hexagon_M2_mpyud_nac_lh_s0,                // llvm.hexagon.M2.mpyud.nac.lh.s0
   1360     hexagon_M2_mpyud_nac_lh_s1,                // llvm.hexagon.M2.mpyud.nac.lh.s1
   1361     hexagon_M2_mpyud_nac_ll_s0,                // llvm.hexagon.M2.mpyud.nac.ll.s0
   1362     hexagon_M2_mpyud_nac_ll_s1,                // llvm.hexagon.M2.mpyud.nac.ll.s1
   1363     hexagon_M2_mpyui,                          // llvm.hexagon.M2.mpyui
   1364     hexagon_M2_nacci,                          // llvm.hexagon.M2.nacci
   1365     hexagon_M2_naccii,                         // llvm.hexagon.M2.naccii
   1366     hexagon_M2_subacc,                         // llvm.hexagon.M2.subacc
   1367     hexagon_M2_vabsdiffh,                      // llvm.hexagon.M2.vabsdiffh
   1368     hexagon_M2_vabsdiffw,                      // llvm.hexagon.M2.vabsdiffw
   1369     hexagon_M2_vcmac_s0_sat_i,                 // llvm.hexagon.M2.vcmac.s0.sat.i
   1370     hexagon_M2_vcmac_s0_sat_r,                 // llvm.hexagon.M2.vcmac.s0.sat.r
   1371     hexagon_M2_vcmpy_s0_sat_i,                 // llvm.hexagon.M2.vcmpy.s0.sat.i
   1372     hexagon_M2_vcmpy_s0_sat_r,                 // llvm.hexagon.M2.vcmpy.s0.sat.r
   1373     hexagon_M2_vcmpy_s1_sat_i,                 // llvm.hexagon.M2.vcmpy.s1.sat.i
   1374     hexagon_M2_vcmpy_s1_sat_r,                 // llvm.hexagon.M2.vcmpy.s1.sat.r
   1375     hexagon_M2_vdmacs_s0,                      // llvm.hexagon.M2.vdmacs.s0
   1376     hexagon_M2_vdmacs_s1,                      // llvm.hexagon.M2.vdmacs.s1
   1377     hexagon_M2_vdmpyrs_s0,                     // llvm.hexagon.M2.vdmpyrs.s0
   1378     hexagon_M2_vdmpyrs_s1,                     // llvm.hexagon.M2.vdmpyrs.s1
   1379     hexagon_M2_vdmpys_s0,                      // llvm.hexagon.M2.vdmpys.s0
   1380     hexagon_M2_vdmpys_s1,                      // llvm.hexagon.M2.vdmpys.s1
   1381     hexagon_M2_vmac2,                          // llvm.hexagon.M2.vmac2
   1382     hexagon_M2_vmac2es,                        // llvm.hexagon.M2.vmac2es
   1383     hexagon_M2_vmac2es_s0,                     // llvm.hexagon.M2.vmac2es.s0
   1384     hexagon_M2_vmac2es_s1,                     // llvm.hexagon.M2.vmac2es.s1
   1385     hexagon_M2_vmac2s_s0,                      // llvm.hexagon.M2.vmac2s.s0
   1386     hexagon_M2_vmac2s_s1,                      // llvm.hexagon.M2.vmac2s.s1
   1387     hexagon_M2_vmac2su_s0,                     // llvm.hexagon.M2.vmac2su.s0
   1388     hexagon_M2_vmac2su_s1,                     // llvm.hexagon.M2.vmac2su.s1
   1389     hexagon_M2_vmpy2es_s0,                     // llvm.hexagon.M2.vmpy2es.s0
   1390     hexagon_M2_vmpy2es_s1,                     // llvm.hexagon.M2.vmpy2es.s1
   1391     hexagon_M2_vmpy2s_s0,                      // llvm.hexagon.M2.vmpy2s.s0
   1392     hexagon_M2_vmpy2s_s0pack,                  // llvm.hexagon.M2.vmpy2s.s0pack
   1393     hexagon_M2_vmpy2s_s1,                      // llvm.hexagon.M2.vmpy2s.s1
   1394     hexagon_M2_vmpy2s_s1pack,                  // llvm.hexagon.M2.vmpy2s.s1pack
   1395     hexagon_M2_vmpy2su_s0,                     // llvm.hexagon.M2.vmpy2su.s0
   1396     hexagon_M2_vmpy2su_s1,                     // llvm.hexagon.M2.vmpy2su.s1
   1397     hexagon_M2_vraddh,                         // llvm.hexagon.M2.vraddh
   1398     hexagon_M2_vradduh,                        // llvm.hexagon.M2.vradduh
   1399     hexagon_M2_vrcmaci_s0,                     // llvm.hexagon.M2.vrcmaci.s0
   1400     hexagon_M2_vrcmaci_s0c,                    // llvm.hexagon.M2.vrcmaci.s0c
   1401     hexagon_M2_vrcmacr_s0,                     // llvm.hexagon.M2.vrcmacr.s0
   1402     hexagon_M2_vrcmacr_s0c,                    // llvm.hexagon.M2.vrcmacr.s0c
   1403     hexagon_M2_vrcmpyi_s0,                     // llvm.hexagon.M2.vrcmpyi.s0
   1404     hexagon_M2_vrcmpyi_s0c,                    // llvm.hexagon.M2.vrcmpyi.s0c
   1405     hexagon_M2_vrcmpyr_s0,                     // llvm.hexagon.M2.vrcmpyr.s0
   1406     hexagon_M2_vrcmpyr_s0c,                    // llvm.hexagon.M2.vrcmpyr.s0c
   1407     hexagon_M2_vrcmpys_acc_s1,                 // llvm.hexagon.M2.vrcmpys.acc.s1
   1408     hexagon_M2_vrcmpys_s1,                     // llvm.hexagon.M2.vrcmpys.s1
   1409     hexagon_M2_vrcmpys_s1rp,                   // llvm.hexagon.M2.vrcmpys.s1rp
   1410     hexagon_M2_vrmac_s0,                       // llvm.hexagon.M2.vrmac.s0
   1411     hexagon_M2_vrmpy_s0,                       // llvm.hexagon.M2.vrmpy.s0
   1412     hexagon_M2_xor_xacc,                       // llvm.hexagon.M2.xor.xacc
   1413     hexagon_M4_and_and,                        // llvm.hexagon.M4.and.and
   1414     hexagon_M4_and_andn,                       // llvm.hexagon.M4.and.andn
   1415     hexagon_M4_and_or,                         // llvm.hexagon.M4.and.or
   1416     hexagon_M4_and_xor,                        // llvm.hexagon.M4.and.xor
   1417     hexagon_M4_cmpyi_wh,                       // llvm.hexagon.M4.cmpyi.wh
   1418     hexagon_M4_cmpyi_whc,                      // llvm.hexagon.M4.cmpyi.whc
   1419     hexagon_M4_cmpyr_wh,                       // llvm.hexagon.M4.cmpyr.wh
   1420     hexagon_M4_cmpyr_whc,                      // llvm.hexagon.M4.cmpyr.whc
   1421     hexagon_M4_mac_up_s1_sat,                  // llvm.hexagon.M4.mac.up.s1.sat
   1422     hexagon_M4_mpyri_addi,                     // llvm.hexagon.M4.mpyri.addi
   1423     hexagon_M4_mpyri_addr,                     // llvm.hexagon.M4.mpyri.addr
   1424     hexagon_M4_mpyri_addr_u2,                  // llvm.hexagon.M4.mpyri.addr.u2
   1425     hexagon_M4_mpyrr_addi,                     // llvm.hexagon.M4.mpyrr.addi
   1426     hexagon_M4_mpyrr_addr,                     // llvm.hexagon.M4.mpyrr.addr
   1427     hexagon_M4_nac_up_s1_sat,                  // llvm.hexagon.M4.nac.up.s1.sat
   1428     hexagon_M4_or_and,                         // llvm.hexagon.M4.or.and
   1429     hexagon_M4_or_andn,                        // llvm.hexagon.M4.or.andn
   1430     hexagon_M4_or_or,                          // llvm.hexagon.M4.or.or
   1431     hexagon_M4_or_xor,                         // llvm.hexagon.M4.or.xor
   1432     hexagon_M4_pmpyw,                          // llvm.hexagon.M4.pmpyw
   1433     hexagon_M4_pmpyw_acc,                      // llvm.hexagon.M4.pmpyw.acc
   1434     hexagon_M4_vpmpyh,                         // llvm.hexagon.M4.vpmpyh
   1435     hexagon_M4_vpmpyh_acc,                     // llvm.hexagon.M4.vpmpyh.acc
   1436     hexagon_M4_vrmpyeh_acc_s0,                 // llvm.hexagon.M4.vrmpyeh.acc.s0
   1437     hexagon_M4_vrmpyeh_acc_s1,                 // llvm.hexagon.M4.vrmpyeh.acc.s1
   1438     hexagon_M4_vrmpyeh_s0,                     // llvm.hexagon.M4.vrmpyeh.s0
   1439     hexagon_M4_vrmpyeh_s1,                     // llvm.hexagon.M4.vrmpyeh.s1
   1440     hexagon_M4_vrmpyoh_acc_s0,                 // llvm.hexagon.M4.vrmpyoh.acc.s0
   1441     hexagon_M4_vrmpyoh_acc_s1,                 // llvm.hexagon.M4.vrmpyoh.acc.s1
   1442     hexagon_M4_vrmpyoh_s0,                     // llvm.hexagon.M4.vrmpyoh.s0
   1443     hexagon_M4_vrmpyoh_s1,                     // llvm.hexagon.M4.vrmpyoh.s1
   1444     hexagon_M4_xor_and,                        // llvm.hexagon.M4.xor.and
   1445     hexagon_M4_xor_andn,                       // llvm.hexagon.M4.xor.andn
   1446     hexagon_M4_xor_or,                         // llvm.hexagon.M4.xor.or
   1447     hexagon_M4_xor_xacc,                       // llvm.hexagon.M4.xor.xacc
   1448     hexagon_M5_vdmacbsu,                       // llvm.hexagon.M5.vdmacbsu
   1449     hexagon_M5_vdmpybsu,                       // llvm.hexagon.M5.vdmpybsu
   1450     hexagon_M5_vmacbsu,                        // llvm.hexagon.M5.vmacbsu
   1451     hexagon_M5_vmacbuu,                        // llvm.hexagon.M5.vmacbuu
   1452     hexagon_M5_vmpybsu,                        // llvm.hexagon.M5.vmpybsu
   1453     hexagon_M5_vmpybuu,                        // llvm.hexagon.M5.vmpybuu
   1454     hexagon_M5_vrmacbsu,                       // llvm.hexagon.M5.vrmacbsu
   1455     hexagon_M5_vrmacbuu,                       // llvm.hexagon.M5.vrmacbuu
   1456     hexagon_M5_vrmpybsu,                       // llvm.hexagon.M5.vrmpybsu
   1457     hexagon_M5_vrmpybuu,                       // llvm.hexagon.M5.vrmpybuu
   1458     hexagon_M6_vabsdiffb,                      // llvm.hexagon.M6.vabsdiffb
   1459     hexagon_M6_vabsdiffub,                     // llvm.hexagon.M6.vabsdiffub
   1460     hexagon_S2_addasl_rrri,                    // llvm.hexagon.S2.addasl.rrri
   1461     hexagon_S2_asl_i_p,                        // llvm.hexagon.S2.asl.i.p
   1462     hexagon_S2_asl_i_p_acc,                    // llvm.hexagon.S2.asl.i.p.acc
   1463     hexagon_S2_asl_i_p_and,                    // llvm.hexagon.S2.asl.i.p.and
   1464     hexagon_S2_asl_i_p_nac,                    // llvm.hexagon.S2.asl.i.p.nac
   1465     hexagon_S2_asl_i_p_or,                     // llvm.hexagon.S2.asl.i.p.or
   1466     hexagon_S2_asl_i_p_xacc,                   // llvm.hexagon.S2.asl.i.p.xacc
   1467     hexagon_S2_asl_i_r,                        // llvm.hexagon.S2.asl.i.r
   1468     hexagon_S2_asl_i_r_acc,                    // llvm.hexagon.S2.asl.i.r.acc
   1469     hexagon_S2_asl_i_r_and,                    // llvm.hexagon.S2.asl.i.r.and
   1470     hexagon_S2_asl_i_r_nac,                    // llvm.hexagon.S2.asl.i.r.nac
   1471     hexagon_S2_asl_i_r_or,                     // llvm.hexagon.S2.asl.i.r.or
   1472     hexagon_S2_asl_i_r_sat,                    // llvm.hexagon.S2.asl.i.r.sat
   1473     hexagon_S2_asl_i_r_xacc,                   // llvm.hexagon.S2.asl.i.r.xacc
   1474     hexagon_S2_asl_i_vh,                       // llvm.hexagon.S2.asl.i.vh
   1475     hexagon_S2_asl_i_vw,                       // llvm.hexagon.S2.asl.i.vw
   1476     hexagon_S2_asl_r_p,                        // llvm.hexagon.S2.asl.r.p
   1477     hexagon_S2_asl_r_p_acc,                    // llvm.hexagon.S2.asl.r.p.acc
   1478     hexagon_S2_asl_r_p_and,                    // llvm.hexagon.S2.asl.r.p.and
   1479     hexagon_S2_asl_r_p_nac,                    // llvm.hexagon.S2.asl.r.p.nac
   1480     hexagon_S2_asl_r_p_or,                     // llvm.hexagon.S2.asl.r.p.or
   1481     hexagon_S2_asl_r_p_xor,                    // llvm.hexagon.S2.asl.r.p.xor
   1482     hexagon_S2_asl_r_r,                        // llvm.hexagon.S2.asl.r.r
   1483     hexagon_S2_asl_r_r_acc,                    // llvm.hexagon.S2.asl.r.r.acc
   1484     hexagon_S2_asl_r_r_and,                    // llvm.hexagon.S2.asl.r.r.and
   1485     hexagon_S2_asl_r_r_nac,                    // llvm.hexagon.S2.asl.r.r.nac
   1486     hexagon_S2_asl_r_r_or,                     // llvm.hexagon.S2.asl.r.r.or
   1487     hexagon_S2_asl_r_r_sat,                    // llvm.hexagon.S2.asl.r.r.sat
   1488     hexagon_S2_asl_r_vh,                       // llvm.hexagon.S2.asl.r.vh
   1489     hexagon_S2_asl_r_vw,                       // llvm.hexagon.S2.asl.r.vw
   1490     hexagon_S2_asr_i_p,                        // llvm.hexagon.S2.asr.i.p
   1491     hexagon_S2_asr_i_p_acc,                    // llvm.hexagon.S2.asr.i.p.acc
   1492     hexagon_S2_asr_i_p_and,                    // llvm.hexagon.S2.asr.i.p.and
   1493     hexagon_S2_asr_i_p_nac,                    // llvm.hexagon.S2.asr.i.p.nac
   1494     hexagon_S2_asr_i_p_or,                     // llvm.hexagon.S2.asr.i.p.or
   1495     hexagon_S2_asr_i_p_rnd,                    // llvm.hexagon.S2.asr.i.p.rnd
   1496     hexagon_S2_asr_i_p_rnd_goodsyntax,         // llvm.hexagon.S2.asr.i.p.rnd.goodsyntax
   1497     hexagon_S2_asr_i_r,                        // llvm.hexagon.S2.asr.i.r
   1498     hexagon_S2_asr_i_r_acc,                    // llvm.hexagon.S2.asr.i.r.acc
   1499     hexagon_S2_asr_i_r_and,                    // llvm.hexagon.S2.asr.i.r.and
   1500     hexagon_S2_asr_i_r_nac,                    // llvm.hexagon.S2.asr.i.r.nac
   1501     hexagon_S2_asr_i_r_or,                     // llvm.hexagon.S2.asr.i.r.or
   1502     hexagon_S2_asr_i_r_rnd,                    // llvm.hexagon.S2.asr.i.r.rnd
   1503     hexagon_S2_asr_i_r_rnd_goodsyntax,         // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
   1504     hexagon_S2_asr_i_svw_trun,                 // llvm.hexagon.S2.asr.i.svw.trun
   1505     hexagon_S2_asr_i_vh,                       // llvm.hexagon.S2.asr.i.vh
   1506     hexagon_S2_asr_i_vw,                       // llvm.hexagon.S2.asr.i.vw
   1507     hexagon_S2_asr_r_p,                        // llvm.hexagon.S2.asr.r.p
   1508     hexagon_S2_asr_r_p_acc,                    // llvm.hexagon.S2.asr.r.p.acc
   1509     hexagon_S2_asr_r_p_and,                    // llvm.hexagon.S2.asr.r.p.and
   1510     hexagon_S2_asr_r_p_nac,                    // llvm.hexagon.S2.asr.r.p.nac
   1511     hexagon_S2_asr_r_p_or,                     // llvm.hexagon.S2.asr.r.p.or
   1512     hexagon_S2_asr_r_p_xor,                    // llvm.hexagon.S2.asr.r.p.xor
   1513     hexagon_S2_asr_r_r,                        // llvm.hexagon.S2.asr.r.r
   1514     hexagon_S2_asr_r_r_acc,                    // llvm.hexagon.S2.asr.r.r.acc
   1515     hexagon_S2_asr_r_r_and,                    // llvm.hexagon.S2.asr.r.r.and
   1516     hexagon_S2_asr_r_r_nac,                    // llvm.hexagon.S2.asr.r.r.nac
   1517     hexagon_S2_asr_r_r_or,                     // llvm.hexagon.S2.asr.r.r.or
   1518     hexagon_S2_asr_r_r_sat,                    // llvm.hexagon.S2.asr.r.r.sat
   1519     hexagon_S2_asr_r_svw_trun,                 // llvm.hexagon.S2.asr.r.svw.trun
   1520     hexagon_S2_asr_r_vh,                       // llvm.hexagon.S2.asr.r.vh
   1521     hexagon_S2_asr_r_vw,                       // llvm.hexagon.S2.asr.r.vw
   1522     hexagon_S2_brev,                           // llvm.hexagon.S2.brev
   1523     hexagon_S2_brevp,                          // llvm.hexagon.S2.brevp
   1524     hexagon_S2_cabacencbin,                    // llvm.hexagon.S2.cabacencbin
   1525     hexagon_S2_cl0,                            // llvm.hexagon.S2.cl0
   1526     hexagon_S2_cl0p,                           // llvm.hexagon.S2.cl0p
   1527     hexagon_S2_cl1,                            // llvm.hexagon.S2.cl1
   1528     hexagon_S2_cl1p,                           // llvm.hexagon.S2.cl1p
   1529     hexagon_S2_clb,                            // llvm.hexagon.S2.clb
   1530     hexagon_S2_clbnorm,                        // llvm.hexagon.S2.clbnorm
   1531     hexagon_S2_clbp,                           // llvm.hexagon.S2.clbp
   1532     hexagon_S2_clrbit_i,                       // llvm.hexagon.S2.clrbit.i
   1533     hexagon_S2_clrbit_r,                       // llvm.hexagon.S2.clrbit.r
   1534     hexagon_S2_ct0,                            // llvm.hexagon.S2.ct0
   1535     hexagon_S2_ct0p,                           // llvm.hexagon.S2.ct0p
   1536     hexagon_S2_ct1,                            // llvm.hexagon.S2.ct1
   1537     hexagon_S2_ct1p,                           // llvm.hexagon.S2.ct1p
   1538     hexagon_S2_deinterleave,                   // llvm.hexagon.S2.deinterleave
   1539     hexagon_S2_extractu,                       // llvm.hexagon.S2.extractu
   1540     hexagon_S2_extractu_rp,                    // llvm.hexagon.S2.extractu.rp
   1541     hexagon_S2_extractup,                      // llvm.hexagon.S2.extractup
   1542     hexagon_S2_extractup_rp,                   // llvm.hexagon.S2.extractup.rp
   1543     hexagon_S2_insert,                         // llvm.hexagon.S2.insert
   1544     hexagon_S2_insert_rp,                      // llvm.hexagon.S2.insert.rp
   1545     hexagon_S2_insertp,                        // llvm.hexagon.S2.insertp
   1546     hexagon_S2_insertp_rp,                     // llvm.hexagon.S2.insertp.rp
   1547     hexagon_S2_interleave,                     // llvm.hexagon.S2.interleave
   1548     hexagon_S2_lfsp,                           // llvm.hexagon.S2.lfsp
   1549     hexagon_S2_lsl_r_p,                        // llvm.hexagon.S2.lsl.r.p
   1550     hexagon_S2_lsl_r_p_acc,                    // llvm.hexagon.S2.lsl.r.p.acc
   1551     hexagon_S2_lsl_r_p_and,                    // llvm.hexagon.S2.lsl.r.p.and
   1552     hexagon_S2_lsl_r_p_nac,                    // llvm.hexagon.S2.lsl.r.p.nac
   1553     hexagon_S2_lsl_r_p_or,                     // llvm.hexagon.S2.lsl.r.p.or
   1554     hexagon_S2_lsl_r_p_xor,                    // llvm.hexagon.S2.lsl.r.p.xor
   1555     hexagon_S2_lsl_r_r,                        // llvm.hexagon.S2.lsl.r.r
   1556     hexagon_S2_lsl_r_r_acc,                    // llvm.hexagon.S2.lsl.r.r.acc
   1557     hexagon_S2_lsl_r_r_and,                    // llvm.hexagon.S2.lsl.r.r.and
   1558     hexagon_S2_lsl_r_r_nac,                    // llvm.hexagon.S2.lsl.r.r.nac
   1559     hexagon_S2_lsl_r_r_or,                     // llvm.hexagon.S2.lsl.r.r.or
   1560     hexagon_S2_lsl_r_vh,                       // llvm.hexagon.S2.lsl.r.vh
   1561     hexagon_S2_lsl_r_vw,                       // llvm.hexagon.S2.lsl.r.vw
   1562     hexagon_S2_lsr_i_p,                        // llvm.hexagon.S2.lsr.i.p
   1563     hexagon_S2_lsr_i_p_acc,                    // llvm.hexagon.S2.lsr.i.p.acc
   1564     hexagon_S2_lsr_i_p_and,                    // llvm.hexagon.S2.lsr.i.p.and
   1565     hexagon_S2_lsr_i_p_nac,                    // llvm.hexagon.S2.lsr.i.p.nac
   1566     hexagon_S2_lsr_i_p_or,                     // llvm.hexagon.S2.lsr.i.p.or
   1567     hexagon_S2_lsr_i_p_xacc,                   // llvm.hexagon.S2.lsr.i.p.xacc
   1568     hexagon_S2_lsr_i_r,                        // llvm.hexagon.S2.lsr.i.r
   1569     hexagon_S2_lsr_i_r_acc,                    // llvm.hexagon.S2.lsr.i.r.acc
   1570     hexagon_S2_lsr_i_r_and,                    // llvm.hexagon.S2.lsr.i.r.and
   1571     hexagon_S2_lsr_i_r_nac,                    // llvm.hexagon.S2.lsr.i.r.nac
   1572     hexagon_S2_lsr_i_r_or,                     // llvm.hexagon.S2.lsr.i.r.or
   1573     hexagon_S2_lsr_i_r_xacc,                   // llvm.hexagon.S2.lsr.i.r.xacc
   1574     hexagon_S2_lsr_i_vh,                       // llvm.hexagon.S2.lsr.i.vh
   1575     hexagon_S2_lsr_i_vw,                       // llvm.hexagon.S2.lsr.i.vw
   1576     hexagon_S2_lsr_r_p,                        // llvm.hexagon.S2.lsr.r.p
   1577     hexagon_S2_lsr_r_p_acc,                    // llvm.hexagon.S2.lsr.r.p.acc
   1578     hexagon_S2_lsr_r_p_and,                    // llvm.hexagon.S2.lsr.r.p.and
   1579     hexagon_S2_lsr_r_p_nac,                    // llvm.hexagon.S2.lsr.r.p.nac
   1580     hexagon_S2_lsr_r_p_or,                     // llvm.hexagon.S2.lsr.r.p.or
   1581     hexagon_S2_lsr_r_p_xor,                    // llvm.hexagon.S2.lsr.r.p.xor
   1582     hexagon_S2_lsr_r_r,                        // llvm.hexagon.S2.lsr.r.r
   1583     hexagon_S2_lsr_r_r_acc,                    // llvm.hexagon.S2.lsr.r.r.acc
   1584     hexagon_S2_lsr_r_r_and,                    // llvm.hexagon.S2.lsr.r.r.and
   1585     hexagon_S2_lsr_r_r_nac,                    // llvm.hexagon.S2.lsr.r.r.nac
   1586     hexagon_S2_lsr_r_r_or,                     // llvm.hexagon.S2.lsr.r.r.or
   1587     hexagon_S2_lsr_r_vh,                       // llvm.hexagon.S2.lsr.r.vh
   1588     hexagon_S2_lsr_r_vw,                       // llvm.hexagon.S2.lsr.r.vw
   1589     hexagon_S2_packhl,                         // llvm.hexagon.S2.packhl
   1590     hexagon_S2_parityp,                        // llvm.hexagon.S2.parityp
   1591     hexagon_S2_setbit_i,                       // llvm.hexagon.S2.setbit.i
   1592     hexagon_S2_setbit_r,                       // llvm.hexagon.S2.setbit.r
   1593     hexagon_S2_shuffeb,                        // llvm.hexagon.S2.shuffeb
   1594     hexagon_S2_shuffeh,                        // llvm.hexagon.S2.shuffeh
   1595     hexagon_S2_shuffob,                        // llvm.hexagon.S2.shuffob
   1596     hexagon_S2_shuffoh,                        // llvm.hexagon.S2.shuffoh
   1597     hexagon_S2_storew_locked,                  // llvm.hexagon.S2.storew.locked
   1598     hexagon_S2_svsathb,                        // llvm.hexagon.S2.svsathb
   1599     hexagon_S2_svsathub,                       // llvm.hexagon.S2.svsathub
   1600     hexagon_S2_tableidxb_goodsyntax,           // llvm.hexagon.S2.tableidxb.goodsyntax
   1601     hexagon_S2_tableidxd_goodsyntax,           // llvm.hexagon.S2.tableidxd.goodsyntax
   1602     hexagon_S2_tableidxh_goodsyntax,           // llvm.hexagon.S2.tableidxh.goodsyntax
   1603     hexagon_S2_tableidxw_goodsyntax,           // llvm.hexagon.S2.tableidxw.goodsyntax
   1604     hexagon_S2_togglebit_i,                    // llvm.hexagon.S2.togglebit.i
   1605     hexagon_S2_togglebit_r,                    // llvm.hexagon.S2.togglebit.r
   1606     hexagon_S2_tstbit_i,                       // llvm.hexagon.S2.tstbit.i
   1607     hexagon_S2_tstbit_r,                       // llvm.hexagon.S2.tstbit.r
   1608     hexagon_S2_valignib,                       // llvm.hexagon.S2.valignib
   1609     hexagon_S2_valignrb,                       // llvm.hexagon.S2.valignrb
   1610     hexagon_S2_vcnegh,                         // llvm.hexagon.S2.vcnegh
   1611     hexagon_S2_vcrotate,                       // llvm.hexagon.S2.vcrotate
   1612     hexagon_S2_vrcnegh,                        // llvm.hexagon.S2.vrcnegh
   1613     hexagon_S2_vrndpackwh,                     // llvm.hexagon.S2.vrndpackwh
   1614     hexagon_S2_vrndpackwhs,                    // llvm.hexagon.S2.vrndpackwhs
   1615     hexagon_S2_vsathb,                         // llvm.hexagon.S2.vsathb
   1616     hexagon_S2_vsathb_nopack,                  // llvm.hexagon.S2.vsathb.nopack
   1617     hexagon_S2_vsathub,                        // llvm.hexagon.S2.vsathub
   1618     hexagon_S2_vsathub_nopack,                 // llvm.hexagon.S2.vsathub.nopack
   1619     hexagon_S2_vsatwh,                         // llvm.hexagon.S2.vsatwh
   1620     hexagon_S2_vsatwh_nopack,                  // llvm.hexagon.S2.vsatwh.nopack
   1621     hexagon_S2_vsatwuh,                        // llvm.hexagon.S2.vsatwuh
   1622     hexagon_S2_vsatwuh_nopack,                 // llvm.hexagon.S2.vsatwuh.nopack
   1623     hexagon_S2_vsplatrb,                       // llvm.hexagon.S2.vsplatrb
   1624     hexagon_S2_vsplatrh,                       // llvm.hexagon.S2.vsplatrh
   1625     hexagon_S2_vspliceib,                      // llvm.hexagon.S2.vspliceib
   1626     hexagon_S2_vsplicerb,                      // llvm.hexagon.S2.vsplicerb
   1627     hexagon_S2_vsxtbh,                         // llvm.hexagon.S2.vsxtbh
   1628     hexagon_S2_vsxthw,                         // llvm.hexagon.S2.vsxthw
   1629     hexagon_S2_vtrunehb,                       // llvm.hexagon.S2.vtrunehb
   1630     hexagon_S2_vtrunewh,                       // llvm.hexagon.S2.vtrunewh
   1631     hexagon_S2_vtrunohb,                       // llvm.hexagon.S2.vtrunohb
   1632     hexagon_S2_vtrunowh,                       // llvm.hexagon.S2.vtrunowh
   1633     hexagon_S2_vzxtbh,                         // llvm.hexagon.S2.vzxtbh
   1634     hexagon_S2_vzxthw,                         // llvm.hexagon.S2.vzxthw
   1635     hexagon_S4_addaddi,                        // llvm.hexagon.S4.addaddi
   1636     hexagon_S4_addi_asl_ri,                    // llvm.hexagon.S4.addi.asl.ri
   1637     hexagon_S4_addi_lsr_ri,                    // llvm.hexagon.S4.addi.lsr.ri
   1638     hexagon_S4_andi_asl_ri,                    // llvm.hexagon.S4.andi.asl.ri
   1639     hexagon_S4_andi_lsr_ri,                    // llvm.hexagon.S4.andi.lsr.ri
   1640     hexagon_S4_clbaddi,                        // llvm.hexagon.S4.clbaddi
   1641     hexagon_S4_clbpaddi,                       // llvm.hexagon.S4.clbpaddi
   1642     hexagon_S4_clbpnorm,                       // llvm.hexagon.S4.clbpnorm
   1643     hexagon_S4_extract,                        // llvm.hexagon.S4.extract
   1644     hexagon_S4_extract_rp,                     // llvm.hexagon.S4.extract.rp
   1645     hexagon_S4_extractp,                       // llvm.hexagon.S4.extractp
   1646     hexagon_S4_extractp_rp,                    // llvm.hexagon.S4.extractp.rp
   1647     hexagon_S4_lsli,                           // llvm.hexagon.S4.lsli
   1648     hexagon_S4_ntstbit_i,                      // llvm.hexagon.S4.ntstbit.i
   1649     hexagon_S4_ntstbit_r,                      // llvm.hexagon.S4.ntstbit.r
   1650     hexagon_S4_or_andi,                        // llvm.hexagon.S4.or.andi
   1651     hexagon_S4_or_andix,                       // llvm.hexagon.S4.or.andix
   1652     hexagon_S4_or_ori,                         // llvm.hexagon.S4.or.ori
   1653     hexagon_S4_ori_asl_ri,                     // llvm.hexagon.S4.ori.asl.ri
   1654     hexagon_S4_ori_lsr_ri,                     // llvm.hexagon.S4.ori.lsr.ri
   1655     hexagon_S4_parity,                         // llvm.hexagon.S4.parity
   1656     hexagon_S4_stored_locked,                  // llvm.hexagon.S4.stored.locked
   1657     hexagon_S4_subaddi,                        // llvm.hexagon.S4.subaddi
   1658     hexagon_S4_subi_asl_ri,                    // llvm.hexagon.S4.subi.asl.ri
   1659     hexagon_S4_subi_lsr_ri,                    // llvm.hexagon.S4.subi.lsr.ri
   1660     hexagon_S4_vrcrotate,                      // llvm.hexagon.S4.vrcrotate
   1661     hexagon_S4_vrcrotate_acc,                  // llvm.hexagon.S4.vrcrotate.acc
   1662     hexagon_S4_vxaddsubh,                      // llvm.hexagon.S4.vxaddsubh
   1663     hexagon_S4_vxaddsubhr,                     // llvm.hexagon.S4.vxaddsubhr
   1664     hexagon_S4_vxaddsubw,                      // llvm.hexagon.S4.vxaddsubw
   1665     hexagon_S4_vxsubaddh,                      // llvm.hexagon.S4.vxsubaddh
   1666     hexagon_S4_vxsubaddhr,                     // llvm.hexagon.S4.vxsubaddhr
   1667     hexagon_S4_vxsubaddw,                      // llvm.hexagon.S4.vxsubaddw
   1668     hexagon_S5_asrhub_rnd_sat_goodsyntax,      // llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax
   1669     hexagon_S5_asrhub_sat,                     // llvm.hexagon.S5.asrhub.sat
   1670     hexagon_S5_popcountp,                      // llvm.hexagon.S5.popcountp
   1671     hexagon_S5_vasrhrnd_goodsyntax,            // llvm.hexagon.S5.vasrhrnd.goodsyntax
   1672     hexagon_S6_rol_i_p,                        // llvm.hexagon.S6.rol.i.p
   1673     hexagon_S6_rol_i_p_acc,                    // llvm.hexagon.S6.rol.i.p.acc
   1674     hexagon_S6_rol_i_p_and,                    // llvm.hexagon.S6.rol.i.p.and
   1675     hexagon_S6_rol_i_p_nac,                    // llvm.hexagon.S6.rol.i.p.nac
   1676     hexagon_S6_rol_i_p_or,                     // llvm.hexagon.S6.rol.i.p.or
   1677     hexagon_S6_rol_i_p_xacc,                   // llvm.hexagon.S6.rol.i.p.xacc
   1678     hexagon_S6_rol_i_r,                        // llvm.hexagon.S6.rol.i.r
   1679     hexagon_S6_rol_i_r_acc,                    // llvm.hexagon.S6.rol.i.r.acc
   1680     hexagon_S6_rol_i_r_and,                    // llvm.hexagon.S6.rol.i.r.and
   1681     hexagon_S6_rol_i_r_nac,                    // llvm.hexagon.S6.rol.i.r.nac
   1682     hexagon_S6_rol_i_r_or,                     // llvm.hexagon.S6.rol.i.r.or
   1683     hexagon_S6_rol_i_r_xacc,                   // llvm.hexagon.S6.rol.i.r.xacc
   1684     hexagon_S6_vsplatrbp,                      // llvm.hexagon.S6.vsplatrbp
   1685     hexagon_S6_vtrunehb_ppp,                   // llvm.hexagon.S6.vtrunehb.ppp
   1686     hexagon_S6_vtrunohb_ppp,                   // llvm.hexagon.S6.vtrunohb.ppp
   1687     hexagon_SI_to_SXTHI_asrh,                  // llvm.hexagon.SI.to.SXTHI.asrh
   1688     hexagon_V6_extractw,                       // llvm.hexagon.V6.extractw
   1689     hexagon_V6_extractw_128B,                  // llvm.hexagon.V6.extractw.128B
   1690     hexagon_V6_hi,                             // llvm.hexagon.V6.hi
   1691     hexagon_V6_hi_128B,                        // llvm.hexagon.V6.hi.128B
   1692     hexagon_V6_lo,                             // llvm.hexagon.V6.lo
   1693     hexagon_V6_lo_128B,                        // llvm.hexagon.V6.lo.128B
   1694     hexagon_V6_lvsplatb,                       // llvm.hexagon.V6.lvsplatb
   1695     hexagon_V6_lvsplatb_128B,                  // llvm.hexagon.V6.lvsplatb.128B
   1696     hexagon_V6_lvsplath,                       // llvm.hexagon.V6.lvsplath
   1697     hexagon_V6_lvsplath_128B,                  // llvm.hexagon.V6.lvsplath.128B
   1698     hexagon_V6_lvsplatw,                       // llvm.hexagon.V6.lvsplatw
   1699     hexagon_V6_lvsplatw_128B,                  // llvm.hexagon.V6.lvsplatw.128B
   1700     hexagon_V6_pred_and,                       // llvm.hexagon.V6.pred.and
   1701     hexagon_V6_pred_and_128B,                  // llvm.hexagon.V6.pred.and.128B
   1702     hexagon_V6_pred_and_n,                     // llvm.hexagon.V6.pred.and.n
   1703     hexagon_V6_pred_and_n_128B,                // llvm.hexagon.V6.pred.and.n.128B
   1704     hexagon_V6_pred_not,                       // llvm.hexagon.V6.pred.not
   1705     hexagon_V6_pred_not_128B,                  // llvm.hexagon.V6.pred.not.128B
   1706     hexagon_V6_pred_or,                        // llvm.hexagon.V6.pred.or
   1707     hexagon_V6_pred_or_128B,                   // llvm.hexagon.V6.pred.or.128B
   1708     hexagon_V6_pred_or_n,                      // llvm.hexagon.V6.pred.or.n
   1709     hexagon_V6_pred_or_n_128B,                 // llvm.hexagon.V6.pred.or.n.128B
   1710     hexagon_V6_pred_scalar2,                   // llvm.hexagon.V6.pred.scalar2
   1711     hexagon_V6_pred_scalar2_128B,              // llvm.hexagon.V6.pred.scalar2.128B
   1712     hexagon_V6_pred_scalar2v2,                 // llvm.hexagon.V6.pred.scalar2v2
   1713     hexagon_V6_pred_scalar2v2_128B,            // llvm.hexagon.V6.pred.scalar2v2.128B
   1714     hexagon_V6_pred_xor,                       // llvm.hexagon.V6.pred.xor
   1715     hexagon_V6_pred_xor_128B,                  // llvm.hexagon.V6.pred.xor.128B
   1716     hexagon_V6_shuffeqh,                       // llvm.hexagon.V6.shuffeqh
   1717     hexagon_V6_shuffeqh_128B,                  // llvm.hexagon.V6.shuffeqh.128B
   1718     hexagon_V6_shuffeqw,                       // llvm.hexagon.V6.shuffeqw
   1719     hexagon_V6_shuffeqw_128B,                  // llvm.hexagon.V6.shuffeqw.128B
   1720     hexagon_V6_vabsdiffh,                      // llvm.hexagon.V6.vabsdiffh
   1721     hexagon_V6_vabsdiffh_128B,                 // llvm.hexagon.V6.vabsdiffh.128B
   1722     hexagon_V6_vabsdiffub,                     // llvm.hexagon.V6.vabsdiffub
   1723     hexagon_V6_vabsdiffub_128B,                // llvm.hexagon.V6.vabsdiffub.128B
   1724     hexagon_V6_vabsdiffuh,                     // llvm.hexagon.V6.vabsdiffuh
   1725     hexagon_V6_vabsdiffuh_128B,                // llvm.hexagon.V6.vabsdiffuh.128B
   1726     hexagon_V6_vabsdiffw,                      // llvm.hexagon.V6.vabsdiffw
   1727     hexagon_V6_vabsdiffw_128B,                 // llvm.hexagon.V6.vabsdiffw.128B
   1728     hexagon_V6_vabsh,                          // llvm.hexagon.V6.vabsh
   1729     hexagon_V6_vabsh_128B,                     // llvm.hexagon.V6.vabsh.128B
   1730     hexagon_V6_vabsh_sat,                      // llvm.hexagon.V6.vabsh.sat
   1731     hexagon_V6_vabsh_sat_128B,                 // llvm.hexagon.V6.vabsh.sat.128B
   1732     hexagon_V6_vabsw,                          // llvm.hexagon.V6.vabsw
   1733     hexagon_V6_vabsw_128B,                     // llvm.hexagon.V6.vabsw.128B
   1734     hexagon_V6_vabsw_sat,                      // llvm.hexagon.V6.vabsw.sat
   1735     hexagon_V6_vabsw_sat_128B,                 // llvm.hexagon.V6.vabsw.sat.128B
   1736     hexagon_V6_vaddb,                          // llvm.hexagon.V6.vaddb
   1737     hexagon_V6_vaddb_128B,                     // llvm.hexagon.V6.vaddb.128B
   1738     hexagon_V6_vaddb_dv,                       // llvm.hexagon.V6.vaddb.dv
   1739     hexagon_V6_vaddb_dv_128B,                  // llvm.hexagon.V6.vaddb.dv.128B
   1740     hexagon_V6_vaddbnq,                        // llvm.hexagon.V6.vaddbnq
   1741     hexagon_V6_vaddbnq_128B,                   // llvm.hexagon.V6.vaddbnq.128B
   1742     hexagon_V6_vaddbq,                         // llvm.hexagon.V6.vaddbq
   1743     hexagon_V6_vaddbq_128B,                    // llvm.hexagon.V6.vaddbq.128B
   1744     hexagon_V6_vaddbsat,                       // llvm.hexagon.V6.vaddbsat
   1745     hexagon_V6_vaddbsat_128B,                  // llvm.hexagon.V6.vaddbsat.128B
   1746     hexagon_V6_vaddbsat_dv,                    // llvm.hexagon.V6.vaddbsat.dv
   1747     hexagon_V6_vaddbsat_dv_128B,               // llvm.hexagon.V6.vaddbsat.dv.128B
   1748     hexagon_V6_vaddclbh,                       // llvm.hexagon.V6.vaddclbh
   1749     hexagon_V6_vaddclbh_128B,                  // llvm.hexagon.V6.vaddclbh.128B
   1750     hexagon_V6_vaddclbw,                       // llvm.hexagon.V6.vaddclbw
   1751     hexagon_V6_vaddclbw_128B,                  // llvm.hexagon.V6.vaddclbw.128B
   1752     hexagon_V6_vaddh,                          // llvm.hexagon.V6.vaddh
   1753     hexagon_V6_vaddh_128B,                     // llvm.hexagon.V6.vaddh.128B
   1754     hexagon_V6_vaddh_dv,                       // llvm.hexagon.V6.vaddh.dv
   1755     hexagon_V6_vaddh_dv_128B,                  // llvm.hexagon.V6.vaddh.dv.128B
   1756     hexagon_V6_vaddhnq,                        // llvm.hexagon.V6.vaddhnq
   1757     hexagon_V6_vaddhnq_128B,                   // llvm.hexagon.V6.vaddhnq.128B
   1758     hexagon_V6_vaddhq,                         // llvm.hexagon.V6.vaddhq
   1759     hexagon_V6_vaddhq_128B,                    // llvm.hexagon.V6.vaddhq.128B
   1760     hexagon_V6_vaddhsat,                       // llvm.hexagon.V6.vaddhsat
   1761     hexagon_V6_vaddhsat_128B,                  // llvm.hexagon.V6.vaddhsat.128B
   1762     hexagon_V6_vaddhsat_dv,                    // llvm.hexagon.V6.vaddhsat.dv
   1763     hexagon_V6_vaddhsat_dv_128B,               // llvm.hexagon.V6.vaddhsat.dv.128B
   1764     hexagon_V6_vaddhw,                         // llvm.hexagon.V6.vaddhw
   1765     hexagon_V6_vaddhw_128B,                    // llvm.hexagon.V6.vaddhw.128B
   1766     hexagon_V6_vaddhw_acc,                     // llvm.hexagon.V6.vaddhw.acc
   1767     hexagon_V6_vaddhw_acc_128B,                // llvm.hexagon.V6.vaddhw.acc.128B
   1768     hexagon_V6_vaddubh,                        // llvm.hexagon.V6.vaddubh
   1769     hexagon_V6_vaddubh_128B,                   // llvm.hexagon.V6.vaddubh.128B
   1770     hexagon_V6_vaddubh_acc,                    // llvm.hexagon.V6.vaddubh.acc
   1771     hexagon_V6_vaddubh_acc_128B,               // llvm.hexagon.V6.vaddubh.acc.128B
   1772     hexagon_V6_vaddubsat,                      // llvm.hexagon.V6.vaddubsat
   1773     hexagon_V6_vaddubsat_128B,                 // llvm.hexagon.V6.vaddubsat.128B
   1774     hexagon_V6_vaddubsat_dv,                   // llvm.hexagon.V6.vaddubsat.dv
   1775     hexagon_V6_vaddubsat_dv_128B,              // llvm.hexagon.V6.vaddubsat.dv.128B
   1776     hexagon_V6_vaddububb_sat,                  // llvm.hexagon.V6.vaddububb.sat
   1777     hexagon_V6_vaddububb_sat_128B,             // llvm.hexagon.V6.vaddububb.sat.128B
   1778     hexagon_V6_vadduhsat,                      // llvm.hexagon.V6.vadduhsat
   1779     hexagon_V6_vadduhsat_128B,                 // llvm.hexagon.V6.vadduhsat.128B
   1780     hexagon_V6_vadduhsat_dv,                   // llvm.hexagon.V6.vadduhsat.dv
   1781     hexagon_V6_vadduhsat_dv_128B,              // llvm.hexagon.V6.vadduhsat.dv.128B
   1782     hexagon_V6_vadduhw,                        // llvm.hexagon.V6.vadduhw
   1783     hexagon_V6_vadduhw_128B,                   // llvm.hexagon.V6.vadduhw.128B
   1784     hexagon_V6_vadduhw_acc,                    // llvm.hexagon.V6.vadduhw.acc
   1785     hexagon_V6_vadduhw_acc_128B,               // llvm.hexagon.V6.vadduhw.acc.128B
   1786     hexagon_V6_vadduwsat,                      // llvm.hexagon.V6.vadduwsat
   1787     hexagon_V6_vadduwsat_128B,                 // llvm.hexagon.V6.vadduwsat.128B
   1788     hexagon_V6_vadduwsat_dv,                   // llvm.hexagon.V6.vadduwsat.dv
   1789     hexagon_V6_vadduwsat_dv_128B,              // llvm.hexagon.V6.vadduwsat.dv.128B
   1790     hexagon_V6_vaddw,                          // llvm.hexagon.V6.vaddw
   1791     hexagon_V6_vaddw_128B,                     // llvm.hexagon.V6.vaddw.128B
   1792     hexagon_V6_vaddw_dv,                       // llvm.hexagon.V6.vaddw.dv
   1793     hexagon_V6_vaddw_dv_128B,                  // llvm.hexagon.V6.vaddw.dv.128B
   1794     hexagon_V6_vaddwnq,                        // llvm.hexagon.V6.vaddwnq
   1795     hexagon_V6_vaddwnq_128B,                   // llvm.hexagon.V6.vaddwnq.128B
   1796     hexagon_V6_vaddwq,                         // llvm.hexagon.V6.vaddwq
   1797     hexagon_V6_vaddwq_128B,                    // llvm.hexagon.V6.vaddwq.128B
   1798     hexagon_V6_vaddwsat,                       // llvm.hexagon.V6.vaddwsat
   1799     hexagon_V6_vaddwsat_128B,                  // llvm.hexagon.V6.vaddwsat.128B
   1800     hexagon_V6_vaddwsat_dv,                    // llvm.hexagon.V6.vaddwsat.dv
   1801     hexagon_V6_vaddwsat_dv_128B,               // llvm.hexagon.V6.vaddwsat.dv.128B
   1802     hexagon_V6_valignb,                        // llvm.hexagon.V6.valignb
   1803     hexagon_V6_valignb_128B,                   // llvm.hexagon.V6.valignb.128B
   1804     hexagon_V6_valignbi,                       // llvm.hexagon.V6.valignbi
   1805     hexagon_V6_valignbi_128B,                  // llvm.hexagon.V6.valignbi.128B
   1806     hexagon_V6_vand,                           // llvm.hexagon.V6.vand
   1807     hexagon_V6_vand_128B,                      // llvm.hexagon.V6.vand.128B
   1808     hexagon_V6_vandnqrt,                       // llvm.hexagon.V6.vandnqrt
   1809     hexagon_V6_vandnqrt_128B,                  // llvm.hexagon.V6.vandnqrt.128B
   1810     hexagon_V6_vandnqrt_acc,                   // llvm.hexagon.V6.vandnqrt.acc
   1811     hexagon_V6_vandnqrt_acc_128B,              // llvm.hexagon.V6.vandnqrt.acc.128B
   1812     hexagon_V6_vandqrt,                        // llvm.hexagon.V6.vandqrt
   1813     hexagon_V6_vandqrt_128B,                   // llvm.hexagon.V6.vandqrt.128B
   1814     hexagon_V6_vandqrt_acc,                    // llvm.hexagon.V6.vandqrt.acc
   1815     hexagon_V6_vandqrt_acc_128B,               // llvm.hexagon.V6.vandqrt.acc.128B
   1816     hexagon_V6_vandvnqv,                       // llvm.hexagon.V6.vandvnqv
   1817     hexagon_V6_vandvnqv_128B,                  // llvm.hexagon.V6.vandvnqv.128B
   1818     hexagon_V6_vandvqv,                        // llvm.hexagon.V6.vandvqv
   1819     hexagon_V6_vandvqv_128B,                   // llvm.hexagon.V6.vandvqv.128B
   1820     hexagon_V6_vandvrt,                        // llvm.hexagon.V6.vandvrt
   1821     hexagon_V6_vandvrt_128B,                   // llvm.hexagon.V6.vandvrt.128B
   1822     hexagon_V6_vandvrt_acc,                    // llvm.hexagon.V6.vandvrt.acc
   1823     hexagon_V6_vandvrt_acc_128B,               // llvm.hexagon.V6.vandvrt.acc.128B
   1824     hexagon_V6_vaslh,                          // llvm.hexagon.V6.vaslh
   1825     hexagon_V6_vaslh_128B,                     // llvm.hexagon.V6.vaslh.128B
   1826     hexagon_V6_vaslhv,                         // llvm.hexagon.V6.vaslhv
   1827     hexagon_V6_vaslhv_128B,                    // llvm.hexagon.V6.vaslhv.128B
   1828     hexagon_V6_vaslw,                          // llvm.hexagon.V6.vaslw
   1829     hexagon_V6_vaslw_128B,                     // llvm.hexagon.V6.vaslw.128B
   1830     hexagon_V6_vaslw_acc,                      // llvm.hexagon.V6.vaslw.acc
   1831     hexagon_V6_vaslw_acc_128B,                 // llvm.hexagon.V6.vaslw.acc.128B
   1832     hexagon_V6_vaslwv,                         // llvm.hexagon.V6.vaslwv
   1833     hexagon_V6_vaslwv_128B,                    // llvm.hexagon.V6.vaslwv.128B
   1834     hexagon_V6_vasrh,                          // llvm.hexagon.V6.vasrh
   1835     hexagon_V6_vasrh_128B,                     // llvm.hexagon.V6.vasrh.128B
   1836     hexagon_V6_vasrhbrndsat,                   // llvm.hexagon.V6.vasrhbrndsat
   1837     hexagon_V6_vasrhbrndsat_128B,              // llvm.hexagon.V6.vasrhbrndsat.128B
   1838     hexagon_V6_vasrhbsat,                      // llvm.hexagon.V6.vasrhbsat
   1839     hexagon_V6_vasrhbsat_128B,                 // llvm.hexagon.V6.vasrhbsat.128B
   1840     hexagon_V6_vasrhubrndsat,                  // llvm.hexagon.V6.vasrhubrndsat
   1841     hexagon_V6_vasrhubrndsat_128B,             // llvm.hexagon.V6.vasrhubrndsat.128B
   1842     hexagon_V6_vasrhubsat,                     // llvm.hexagon.V6.vasrhubsat
   1843     hexagon_V6_vasrhubsat_128B,                // llvm.hexagon.V6.vasrhubsat.128B
   1844     hexagon_V6_vasrhv,                         // llvm.hexagon.V6.vasrhv
   1845     hexagon_V6_vasrhv_128B,                    // llvm.hexagon.V6.vasrhv.128B
   1846     hexagon_V6_vasruwuhrndsat,                 // llvm.hexagon.V6.vasruwuhrndsat
   1847     hexagon_V6_vasruwuhrndsat_128B,            // llvm.hexagon.V6.vasruwuhrndsat.128B
   1848     hexagon_V6_vasrw,                          // llvm.hexagon.V6.vasrw
   1849     hexagon_V6_vasrw_128B,                     // llvm.hexagon.V6.vasrw.128B
   1850     hexagon_V6_vasrw_acc,                      // llvm.hexagon.V6.vasrw.acc
   1851     hexagon_V6_vasrw_acc_128B,                 // llvm.hexagon.V6.vasrw.acc.128B
   1852     hexagon_V6_vasrwh,                         // llvm.hexagon.V6.vasrwh
   1853     hexagon_V6_vasrwh_128B,                    // llvm.hexagon.V6.vasrwh.128B
   1854     hexagon_V6_vasrwhrndsat,                   // llvm.hexagon.V6.vasrwhrndsat
   1855     hexagon_V6_vasrwhrndsat_128B,              // llvm.hexagon.V6.vasrwhrndsat.128B
   1856     hexagon_V6_vasrwhsat,                      // llvm.hexagon.V6.vasrwhsat
   1857     hexagon_V6_vasrwhsat_128B,                 // llvm.hexagon.V6.vasrwhsat.128B
   1858     hexagon_V6_vasrwuhrndsat,                  // llvm.hexagon.V6.vasrwuhrndsat
   1859     hexagon_V6_vasrwuhrndsat_128B,             // llvm.hexagon.V6.vasrwuhrndsat.128B
   1860     hexagon_V6_vasrwuhsat,                     // llvm.hexagon.V6.vasrwuhsat
   1861     hexagon_V6_vasrwuhsat_128B,                // llvm.hexagon.V6.vasrwuhsat.128B
   1862     hexagon_V6_vasrwv,                         // llvm.hexagon.V6.vasrwv
   1863     hexagon_V6_vasrwv_128B,                    // llvm.hexagon.V6.vasrwv.128B
   1864     hexagon_V6_vassign,                        // llvm.hexagon.V6.vassign
   1865     hexagon_V6_vassign_128B,                   // llvm.hexagon.V6.vassign.128B
   1866     hexagon_V6_vassignp,                       // llvm.hexagon.V6.vassignp
   1867     hexagon_V6_vassignp_128B,                  // llvm.hexagon.V6.vassignp.128B
   1868     hexagon_V6_vavgh,                          // llvm.hexagon.V6.vavgh
   1869     hexagon_V6_vavgh_128B,                     // llvm.hexagon.V6.vavgh.128B
   1870     hexagon_V6_vavghrnd,                       // llvm.hexagon.V6.vavghrnd
   1871     hexagon_V6_vavghrnd_128B,                  // llvm.hexagon.V6.vavghrnd.128B
   1872     hexagon_V6_vavgub,                         // llvm.hexagon.V6.vavgub
   1873     hexagon_V6_vavgub_128B,                    // llvm.hexagon.V6.vavgub.128B
   1874     hexagon_V6_vavgubrnd,                      // llvm.hexagon.V6.vavgubrnd
   1875     hexagon_V6_vavgubrnd_128B,                 // llvm.hexagon.V6.vavgubrnd.128B
   1876     hexagon_V6_vavguh,                         // llvm.hexagon.V6.vavguh
   1877     hexagon_V6_vavguh_128B,                    // llvm.hexagon.V6.vavguh.128B
   1878     hexagon_V6_vavguhrnd,                      // llvm.hexagon.V6.vavguhrnd
   1879     hexagon_V6_vavguhrnd_128B,                 // llvm.hexagon.V6.vavguhrnd.128B
   1880     hexagon_V6_vavgw,                          // llvm.hexagon.V6.vavgw
   1881     hexagon_V6_vavgw_128B,                     // llvm.hexagon.V6.vavgw.128B
   1882     hexagon_V6_vavgwrnd,                       // llvm.hexagon.V6.vavgwrnd
   1883     hexagon_V6_vavgwrnd_128B,                  // llvm.hexagon.V6.vavgwrnd.128B
   1884     hexagon_V6_vcl0h,                          // llvm.hexagon.V6.vcl0h
   1885     hexagon_V6_vcl0h_128B,                     // llvm.hexagon.V6.vcl0h.128B
   1886     hexagon_V6_vcl0w,                          // llvm.hexagon.V6.vcl0w
   1887     hexagon_V6_vcl0w_128B,                     // llvm.hexagon.V6.vcl0w.128B
   1888     hexagon_V6_vcombine,                       // llvm.hexagon.V6.vcombine
   1889     hexagon_V6_vcombine_128B,                  // llvm.hexagon.V6.vcombine.128B
   1890     hexagon_V6_vd0,                            // llvm.hexagon.V6.vd0
   1891     hexagon_V6_vd0_128B,                       // llvm.hexagon.V6.vd0.128B
   1892     hexagon_V6_vdealb,                         // llvm.hexagon.V6.vdealb
   1893     hexagon_V6_vdealb_128B,                    // llvm.hexagon.V6.vdealb.128B
   1894     hexagon_V6_vdealb4w,                       // llvm.hexagon.V6.vdealb4w
   1895     hexagon_V6_vdealb4w_128B,                  // llvm.hexagon.V6.vdealb4w.128B
   1896     hexagon_V6_vdealh,                         // llvm.hexagon.V6.vdealh
   1897     hexagon_V6_vdealh_128B,                    // llvm.hexagon.V6.vdealh.128B
   1898     hexagon_V6_vdealvdd,                       // llvm.hexagon.V6.vdealvdd
   1899     hexagon_V6_vdealvdd_128B,                  // llvm.hexagon.V6.vdealvdd.128B
   1900     hexagon_V6_vdelta,                         // llvm.hexagon.V6.vdelta
   1901     hexagon_V6_vdelta_128B,                    // llvm.hexagon.V6.vdelta.128B
   1902     hexagon_V6_vdmpybus,                       // llvm.hexagon.V6.vdmpybus
   1903     hexagon_V6_vdmpybus_128B,                  // llvm.hexagon.V6.vdmpybus.128B
   1904     hexagon_V6_vdmpybus_acc,                   // llvm.hexagon.V6.vdmpybus.acc
   1905     hexagon_V6_vdmpybus_acc_128B,              // llvm.hexagon.V6.vdmpybus.acc.128B
   1906     hexagon_V6_vdmpybus_dv,                    // llvm.hexagon.V6.vdmpybus.dv
   1907     hexagon_V6_vdmpybus_dv_128B,               // llvm.hexagon.V6.vdmpybus.dv.128B
   1908     hexagon_V6_vdmpybus_dv_acc,                // llvm.hexagon.V6.vdmpybus.dv.acc
   1909     hexagon_V6_vdmpybus_dv_acc_128B,           // llvm.hexagon.V6.vdmpybus.dv.acc.128B
   1910     hexagon_V6_vdmpyhb,                        // llvm.hexagon.V6.vdmpyhb
   1911     hexagon_V6_vdmpyhb_128B,                   // llvm.hexagon.V6.vdmpyhb.128B
   1912     hexagon_V6_vdmpyhb_acc,                    // llvm.hexagon.V6.vdmpyhb.acc
   1913     hexagon_V6_vdmpyhb_acc_128B,               // llvm.hexagon.V6.vdmpyhb.acc.128B
   1914     hexagon_V6_vdmpyhb_dv,                     // llvm.hexagon.V6.vdmpyhb.dv
   1915     hexagon_V6_vdmpyhb_dv_128B,                // llvm.hexagon.V6.vdmpyhb.dv.128B
   1916     hexagon_V6_vdmpyhb_dv_acc,                 // llvm.hexagon.V6.vdmpyhb.dv.acc
   1917     hexagon_V6_vdmpyhb_dv_acc_128B,            // llvm.hexagon.V6.vdmpyhb.dv.acc.128B
   1918     hexagon_V6_vdmpyhisat,                     // llvm.hexagon.V6.vdmpyhisat
   1919     hexagon_V6_vdmpyhisat_128B,                // llvm.hexagon.V6.vdmpyhisat.128B
   1920     hexagon_V6_vdmpyhisat_acc,                 // llvm.hexagon.V6.vdmpyhisat.acc
   1921     hexagon_V6_vdmpyhisat_acc_128B,            // llvm.hexagon.V6.vdmpyhisat.acc.128B
   1922     hexagon_V6_vdmpyhsat,                      // llvm.hexagon.V6.vdmpyhsat
   1923     hexagon_V6_vdmpyhsat_128B,                 // llvm.hexagon.V6.vdmpyhsat.128B
   1924     hexagon_V6_vdmpyhsat_acc,                  // llvm.hexagon.V6.vdmpyhsat.acc
   1925     hexagon_V6_vdmpyhsat_acc_128B,             // llvm.hexagon.V6.vdmpyhsat.acc.128B
   1926     hexagon_V6_vdmpyhsuisat,                   // llvm.hexagon.V6.vdmpyhsuisat
   1927     hexagon_V6_vdmpyhsuisat_128B,              // llvm.hexagon.V6.vdmpyhsuisat.128B
   1928     hexagon_V6_vdmpyhsuisat_acc,               // llvm.hexagon.V6.vdmpyhsuisat.acc
   1929     hexagon_V6_vdmpyhsuisat_acc_128B,          // llvm.hexagon.V6.vdmpyhsuisat.acc.128B
   1930     hexagon_V6_vdmpyhsusat,                    // llvm.hexagon.V6.vdmpyhsusat
   1931     hexagon_V6_vdmpyhsusat_128B,               // llvm.hexagon.V6.vdmpyhsusat.128B
   1932     hexagon_V6_vdmpyhsusat_acc,                // llvm.hexagon.V6.vdmpyhsusat.acc
   1933     hexagon_V6_vdmpyhsusat_acc_128B,           // llvm.hexagon.V6.vdmpyhsusat.acc.128B
   1934     hexagon_V6_vdmpyhvsat,                     // llvm.hexagon.V6.vdmpyhvsat
   1935     hexagon_V6_vdmpyhvsat_128B,                // llvm.hexagon.V6.vdmpyhvsat.128B
   1936     hexagon_V6_vdmpyhvsat_acc,                 // llvm.hexagon.V6.vdmpyhvsat.acc
   1937     hexagon_V6_vdmpyhvsat_acc_128B,            // llvm.hexagon.V6.vdmpyhvsat.acc.128B
   1938     hexagon_V6_vdsaduh,                        // llvm.hexagon.V6.vdsaduh
   1939     hexagon_V6_vdsaduh_128B,                   // llvm.hexagon.V6.vdsaduh.128B
   1940     hexagon_V6_vdsaduh_acc,                    // llvm.hexagon.V6.vdsaduh.acc
   1941     hexagon_V6_vdsaduh_acc_128B,               // llvm.hexagon.V6.vdsaduh.acc.128B
   1942     hexagon_V6_veqb,                           // llvm.hexagon.V6.veqb
   1943     hexagon_V6_veqb_128B,                      // llvm.hexagon.V6.veqb.128B
   1944     hexagon_V6_veqb_and,                       // llvm.hexagon.V6.veqb.and
   1945     hexagon_V6_veqb_and_128B,                  // llvm.hexagon.V6.veqb.and.128B
   1946     hexagon_V6_veqb_or,                        // llvm.hexagon.V6.veqb.or
   1947     hexagon_V6_veqb_or_128B,                   // llvm.hexagon.V6.veqb.or.128B
   1948     hexagon_V6_veqb_xor,                       // llvm.hexagon.V6.veqb.xor
   1949     hexagon_V6_veqb_xor_128B,                  // llvm.hexagon.V6.veqb.xor.128B
   1950     hexagon_V6_veqh,                           // llvm.hexagon.V6.veqh
   1951     hexagon_V6_veqh_128B,                      // llvm.hexagon.V6.veqh.128B
   1952     hexagon_V6_veqh_and,                       // llvm.hexagon.V6.veqh.and
   1953     hexagon_V6_veqh_and_128B,                  // llvm.hexagon.V6.veqh.and.128B
   1954     hexagon_V6_veqh_or,                        // llvm.hexagon.V6.veqh.or
   1955     hexagon_V6_veqh_or_128B,                   // llvm.hexagon.V6.veqh.or.128B
   1956     hexagon_V6_veqh_xor,                       // llvm.hexagon.V6.veqh.xor
   1957     hexagon_V6_veqh_xor_128B,                  // llvm.hexagon.V6.veqh.xor.128B
   1958     hexagon_V6_veqw,                           // llvm.hexagon.V6.veqw
   1959     hexagon_V6_veqw_128B,                      // llvm.hexagon.V6.veqw.128B
   1960     hexagon_V6_veqw_and,                       // llvm.hexagon.V6.veqw.and
   1961     hexagon_V6_veqw_and_128B,                  // llvm.hexagon.V6.veqw.and.128B
   1962     hexagon_V6_veqw_or,                        // llvm.hexagon.V6.veqw.or
   1963     hexagon_V6_veqw_or_128B,                   // llvm.hexagon.V6.veqw.or.128B
   1964     hexagon_V6_veqw_xor,                       // llvm.hexagon.V6.veqw.xor
   1965     hexagon_V6_veqw_xor_128B,                  // llvm.hexagon.V6.veqw.xor.128B
   1966     hexagon_V6_vgtb,                           // llvm.hexagon.V6.vgtb
   1967     hexagon_V6_vgtb_128B,                      // llvm.hexagon.V6.vgtb.128B
   1968     hexagon_V6_vgtb_and,                       // llvm.hexagon.V6.vgtb.and
   1969     hexagon_V6_vgtb_and_128B,                  // llvm.hexagon.V6.vgtb.and.128B
   1970     hexagon_V6_vgtb_or,                        // llvm.hexagon.V6.vgtb.or
   1971     hexagon_V6_vgtb_or_128B,                   // llvm.hexagon.V6.vgtb.or.128B
   1972     hexagon_V6_vgtb_xor,                       // llvm.hexagon.V6.vgtb.xor
   1973     hexagon_V6_vgtb_xor_128B,                  // llvm.hexagon.V6.vgtb.xor.128B
   1974     hexagon_V6_vgth,                           // llvm.hexagon.V6.vgth
   1975     hexagon_V6_vgth_128B,                      // llvm.hexagon.V6.vgth.128B
   1976     hexagon_V6_vgth_and,                       // llvm.hexagon.V6.vgth.and
   1977     hexagon_V6_vgth_and_128B,                  // llvm.hexagon.V6.vgth.and.128B
   1978     hexagon_V6_vgth_or,                        // llvm.hexagon.V6.vgth.or
   1979     hexagon_V6_vgth_or_128B,                   // llvm.hexagon.V6.vgth.or.128B
   1980     hexagon_V6_vgth_xor,                       // llvm.hexagon.V6.vgth.xor
   1981     hexagon_V6_vgth_xor_128B,                  // llvm.hexagon.V6.vgth.xor.128B
   1982     hexagon_V6_vgtub,                          // llvm.hexagon.V6.vgtub
   1983     hexagon_V6_vgtub_128B,                     // llvm.hexagon.V6.vgtub.128B
   1984     hexagon_V6_vgtub_and,                      // llvm.hexagon.V6.vgtub.and
   1985     hexagon_V6_vgtub_and_128B,                 // llvm.hexagon.V6.vgtub.and.128B
   1986     hexagon_V6_vgtub_or,                       // llvm.hexagon.V6.vgtub.or
   1987     hexagon_V6_vgtub_or_128B,                  // llvm.hexagon.V6.vgtub.or.128B
   1988     hexagon_V6_vgtub_xor,                      // llvm.hexagon.V6.vgtub.xor
   1989     hexagon_V6_vgtub_xor_128B,                 // llvm.hexagon.V6.vgtub.xor.128B
   1990     hexagon_V6_vgtuh,                          // llvm.hexagon.V6.vgtuh
   1991     hexagon_V6_vgtuh_128B,                     // llvm.hexagon.V6.vgtuh.128B
   1992     hexagon_V6_vgtuh_and,                      // llvm.hexagon.V6.vgtuh.and
   1993     hexagon_V6_vgtuh_and_128B,                 // llvm.hexagon.V6.vgtuh.and.128B
   1994     hexagon_V6_vgtuh_or,                       // llvm.hexagon.V6.vgtuh.or
   1995     hexagon_V6_vgtuh_or_128B,                  // llvm.hexagon.V6.vgtuh.or.128B
   1996     hexagon_V6_vgtuh_xor,                      // llvm.hexagon.V6.vgtuh.xor
   1997     hexagon_V6_vgtuh_xor_128B,                 // llvm.hexagon.V6.vgtuh.xor.128B
   1998     hexagon_V6_vgtuw,                          // llvm.hexagon.V6.vgtuw
   1999     hexagon_V6_vgtuw_128B,                     // llvm.hexagon.V6.vgtuw.128B
   2000     hexagon_V6_vgtuw_and,                      // llvm.hexagon.V6.vgtuw.and
   2001     hexagon_V6_vgtuw_and_128B,                 // llvm.hexagon.V6.vgtuw.and.128B
   2002     hexagon_V6_vgtuw_or,                       // llvm.hexagon.V6.vgtuw.or
   2003     hexagon_V6_vgtuw_or_128B,                  // llvm.hexagon.V6.vgtuw.or.128B
   2004     hexagon_V6_vgtuw_xor,                      // llvm.hexagon.V6.vgtuw.xor
   2005     hexagon_V6_vgtuw_xor_128B,                 // llvm.hexagon.V6.vgtuw.xor.128B
   2006     hexagon_V6_vgtw,                           // llvm.hexagon.V6.vgtw
   2007     hexagon_V6_vgtw_128B,                      // llvm.hexagon.V6.vgtw.128B
   2008     hexagon_V6_vgtw_and,                       // llvm.hexagon.V6.vgtw.and
   2009     hexagon_V6_vgtw_and_128B,                  // llvm.hexagon.V6.vgtw.and.128B
   2010     hexagon_V6_vgtw_or,                        // llvm.hexagon.V6.vgtw.or
   2011     hexagon_V6_vgtw_or_128B,                   // llvm.hexagon.V6.vgtw.or.128B
   2012     hexagon_V6_vgtw_xor,                       // llvm.hexagon.V6.vgtw.xor
   2013     hexagon_V6_vgtw_xor_128B,                  // llvm.hexagon.V6.vgtw.xor.128B
   2014     hexagon_V6_vinsertwr,                      // llvm.hexagon.V6.vinsertwr
   2015     hexagon_V6_vinsertwr_128B,                 // llvm.hexagon.V6.vinsertwr.128B
   2016     hexagon_V6_vlalignb,                       // llvm.hexagon.V6.vlalignb
   2017     hexagon_V6_vlalignb_128B,                  // llvm.hexagon.V6.vlalignb.128B
   2018     hexagon_V6_vlalignbi,                      // llvm.hexagon.V6.vlalignbi
   2019     hexagon_V6_vlalignbi_128B,                 // llvm.hexagon.V6.vlalignbi.128B
   2020     hexagon_V6_vlsrb,                          // llvm.hexagon.V6.vlsrb
   2021     hexagon_V6_vlsrb_128B,                     // llvm.hexagon.V6.vlsrb.128B
   2022     hexagon_V6_vlsrh,                          // llvm.hexagon.V6.vlsrh
   2023     hexagon_V6_vlsrh_128B,                     // llvm.hexagon.V6.vlsrh.128B
   2024     hexagon_V6_vlsrhv,                         // llvm.hexagon.V6.vlsrhv
   2025     hexagon_V6_vlsrhv_128B,                    // llvm.hexagon.V6.vlsrhv.128B
   2026     hexagon_V6_vlsrw,                          // llvm.hexagon.V6.vlsrw
   2027     hexagon_V6_vlsrw_128B,                     // llvm.hexagon.V6.vlsrw.128B
   2028     hexagon_V6_vlsrwv,                         // llvm.hexagon.V6.vlsrwv
   2029     hexagon_V6_vlsrwv_128B,                    // llvm.hexagon.V6.vlsrwv.128B
   2030     hexagon_V6_vlutb,                          // llvm.hexagon.V6.vlutb
   2031     hexagon_V6_vlutb_128B,                     // llvm.hexagon.V6.vlutb.128B
   2032     hexagon_V6_vlutb_acc,                      // llvm.hexagon.V6.vlutb.acc
   2033     hexagon_V6_vlutb_acc_128B,                 // llvm.hexagon.V6.vlutb.acc.128B
   2034     hexagon_V6_vlutb_dv,                       // llvm.hexagon.V6.vlutb.dv
   2035     hexagon_V6_vlutb_dv_128B,                  // llvm.hexagon.V6.vlutb.dv.128B
   2036     hexagon_V6_vlutb_dv_acc,                   // llvm.hexagon.V6.vlutb.dv.acc
   2037     hexagon_V6_vlutb_dv_acc_128B,              // llvm.hexagon.V6.vlutb.dv.acc.128B
   2038     hexagon_V6_vlutvvb,                        // llvm.hexagon.V6.vlutvvb
   2039     hexagon_V6_vlutvvb_128B,                   // llvm.hexagon.V6.vlutvvb.128B
   2040     hexagon_V6_vlutvvb_nm,                     // llvm.hexagon.V6.vlutvvb.nm
   2041     hexagon_V6_vlutvvb_nm_128B,                // llvm.hexagon.V6.vlutvvb.nm.128B
   2042     hexagon_V6_vlutvvb_oracc,                  // llvm.hexagon.V6.vlutvvb.oracc
   2043     hexagon_V6_vlutvvb_oracc_128B,             // llvm.hexagon.V6.vlutvvb.oracc.128B
   2044     hexagon_V6_vlutvvb_oracci,                 // llvm.hexagon.V6.vlutvvb.oracci
   2045     hexagon_V6_vlutvvb_oracci_128B,            // llvm.hexagon.V6.vlutvvb.oracci.128B
   2046     hexagon_V6_vlutvvbi,                       // llvm.hexagon.V6.vlutvvbi
   2047     hexagon_V6_vlutvvbi_128B,                  // llvm.hexagon.V6.vlutvvbi.128B
   2048     hexagon_V6_vlutvwh,                        // llvm.hexagon.V6.vlutvwh
   2049     hexagon_V6_vlutvwh_128B,                   // llvm.hexagon.V6.vlutvwh.128B
   2050     hexagon_V6_vlutvwh_nm,                     // llvm.hexagon.V6.vlutvwh.nm
   2051     hexagon_V6_vlutvwh_nm_128B,                // llvm.hexagon.V6.vlutvwh.nm.128B
   2052     hexagon_V6_vlutvwh_oracc,                  // llvm.hexagon.V6.vlutvwh.oracc
   2053     hexagon_V6_vlutvwh_oracc_128B,             // llvm.hexagon.V6.vlutvwh.oracc.128B
   2054     hexagon_V6_vlutvwh_oracci,                 // llvm.hexagon.V6.vlutvwh.oracci
   2055     hexagon_V6_vlutvwh_oracci_128B,            // llvm.hexagon.V6.vlutvwh.oracci.128B
   2056     hexagon_V6_vlutvwhi,                       // llvm.hexagon.V6.vlutvwhi
   2057     hexagon_V6_vlutvwhi_128B,                  // llvm.hexagon.V6.vlutvwhi.128B
   2058     hexagon_V6_vmaskedstorenq,                 // llvm.hexagon.V6.vmaskedstorenq
   2059     hexagon_V6_vmaskedstorenq_128B,            // llvm.hexagon.V6.vmaskedstorenq.128B
   2060     hexagon_V6_vmaskedstorentnq,               // llvm.hexagon.V6.vmaskedstorentnq
   2061     hexagon_V6_vmaskedstorentnq_128B,          // llvm.hexagon.V6.vmaskedstorentnq.128B
   2062     hexagon_V6_vmaskedstorentq,                // llvm.hexagon.V6.vmaskedstorentq
   2063     hexagon_V6_vmaskedstorentq_128B,           // llvm.hexagon.V6.vmaskedstorentq.128B
   2064     hexagon_V6_vmaskedstoreq,                  // llvm.hexagon.V6.vmaskedstoreq
   2065     hexagon_V6_vmaskedstoreq_128B,             // llvm.hexagon.V6.vmaskedstoreq.128B
   2066     hexagon_V6_vmaxb,                          // llvm.hexagon.V6.vmaxb
   2067     hexagon_V6_vmaxb_128B,                     // llvm.hexagon.V6.vmaxb.128B
   2068     hexagon_V6_vmaxh,                          // llvm.hexagon.V6.vmaxh
   2069     hexagon_V6_vmaxh_128B,                     // llvm.hexagon.V6.vmaxh.128B
   2070     hexagon_V6_vmaxub,                         // llvm.hexagon.V6.vmaxub
   2071     hexagon_V6_vmaxub_128B,                    // llvm.hexagon.V6.vmaxub.128B
   2072     hexagon_V6_vmaxuh,                         // llvm.hexagon.V6.vmaxuh
   2073     hexagon_V6_vmaxuh_128B,                    // llvm.hexagon.V6.vmaxuh.128B
   2074     hexagon_V6_vmaxw,                          // llvm.hexagon.V6.vmaxw
   2075     hexagon_V6_vmaxw_128B,                     // llvm.hexagon.V6.vmaxw.128B
   2076     hexagon_V6_vminb,                          // llvm.hexagon.V6.vminb
   2077     hexagon_V6_vminb_128B,                     // llvm.hexagon.V6.vminb.128B
   2078     hexagon_V6_vminh,                          // llvm.hexagon.V6.vminh
   2079     hexagon_V6_vminh_128B,                     // llvm.hexagon.V6.vminh.128B
   2080     hexagon_V6_vminub,                         // llvm.hexagon.V6.vminub
   2081     hexagon_V6_vminub_128B,                    // llvm.hexagon.V6.vminub.128B
   2082     hexagon_V6_vminuh,                         // llvm.hexagon.V6.vminuh
   2083     hexagon_V6_vminuh_128B,                    // llvm.hexagon.V6.vminuh.128B
   2084     hexagon_V6_vminw,                          // llvm.hexagon.V6.vminw
   2085     hexagon_V6_vminw_128B,                     // llvm.hexagon.V6.vminw.128B
   2086     hexagon_V6_vmpabus,                        // llvm.hexagon.V6.vmpabus
   2087     hexagon_V6_vmpabus_128B,                   // llvm.hexagon.V6.vmpabus.128B
   2088     hexagon_V6_vmpabus_acc,                    // llvm.hexagon.V6.vmpabus.acc
   2089     hexagon_V6_vmpabus_acc_128B,               // llvm.hexagon.V6.vmpabus.acc.128B
   2090     hexagon_V6_vmpabusv,                       // llvm.hexagon.V6.vmpabusv
   2091     hexagon_V6_vmpabusv_128B,                  // llvm.hexagon.V6.vmpabusv.128B
   2092     hexagon_V6_vmpabuuv,                       // llvm.hexagon.V6.vmpabuuv
   2093     hexagon_V6_vmpabuuv_128B,                  // llvm.hexagon.V6.vmpabuuv.128B
   2094     hexagon_V6_vmpahb,                         // llvm.hexagon.V6.vmpahb
   2095     hexagon_V6_vmpahb_128B,                    // llvm.hexagon.V6.vmpahb.128B
   2096     hexagon_V6_vmpahb_acc,                     // llvm.hexagon.V6.vmpahb.acc
   2097     hexagon_V6_vmpahb_acc_128B,                // llvm.hexagon.V6.vmpahb.acc.128B
   2098     hexagon_V6_vmpauhb,                        // llvm.hexagon.V6.vmpauhb
   2099     hexagon_V6_vmpauhb_128B,                   // llvm.hexagon.V6.vmpauhb.128B
   2100     hexagon_V6_vmpauhb_acc,                    // llvm.hexagon.V6.vmpauhb.acc
   2101     hexagon_V6_vmpauhb_acc_128B,               // llvm.hexagon.V6.vmpauhb.acc.128B
   2102     hexagon_V6_vmpybus,                        // llvm.hexagon.V6.vmpybus
   2103     hexagon_V6_vmpybus_128B,                   // llvm.hexagon.V6.vmpybus.128B
   2104     hexagon_V6_vmpybus_acc,                    // llvm.hexagon.V6.vmpybus.acc
   2105     hexagon_V6_vmpybus_acc_128B,               // llvm.hexagon.V6.vmpybus.acc.128B
   2106     hexagon_V6_vmpybusv,                       // llvm.hexagon.V6.vmpybusv
   2107     hexagon_V6_vmpybusv_128B,                  // llvm.hexagon.V6.vmpybusv.128B
   2108     hexagon_V6_vmpybusv_acc,                   // llvm.hexagon.V6.vmpybusv.acc
   2109     hexagon_V6_vmpybusv_acc_128B,              // llvm.hexagon.V6.vmpybusv.acc.128B
   2110     hexagon_V6_vmpybv,                         // llvm.hexagon.V6.vmpybv
   2111     hexagon_V6_vmpybv_128B,                    // llvm.hexagon.V6.vmpybv.128B
   2112     hexagon_V6_vmpybv_acc,                     // llvm.hexagon.V6.vmpybv.acc
   2113     hexagon_V6_vmpybv_acc_128B,                // llvm.hexagon.V6.vmpybv.acc.128B
   2114     hexagon_V6_vmpyewuh,                       // llvm.hexagon.V6.vmpyewuh
   2115     hexagon_V6_vmpyewuh_128B,                  // llvm.hexagon.V6.vmpyewuh.128B
   2116     hexagon_V6_vmpyewuh_64,                    // llvm.hexagon.V6.vmpyewuh.64
   2117     hexagon_V6_vmpyewuh_64_128B,               // llvm.hexagon.V6.vmpyewuh.64.128B
   2118     hexagon_V6_vmpyh,                          // llvm.hexagon.V6.vmpyh
   2119     hexagon_V6_vmpyh_128B,                     // llvm.hexagon.V6.vmpyh.128B
   2120     hexagon_V6_vmpyhsat_acc,                   // llvm.hexagon.V6.vmpyhsat.acc
   2121     hexagon_V6_vmpyhsat_acc_128B,              // llvm.hexagon.V6.vmpyhsat.acc.128B
   2122     hexagon_V6_vmpyhsrs,                       // llvm.hexagon.V6.vmpyhsrs
   2123     hexagon_V6_vmpyhsrs_128B,                  // llvm.hexagon.V6.vmpyhsrs.128B
   2124     hexagon_V6_vmpyhss,                        // llvm.hexagon.V6.vmpyhss
   2125     hexagon_V6_vmpyhss_128B,                   // llvm.hexagon.V6.vmpyhss.128B
   2126     hexagon_V6_vmpyhus,                        // llvm.hexagon.V6.vmpyhus
   2127     hexagon_V6_vmpyhus_128B,                   // llvm.hexagon.V6.vmpyhus.128B
   2128     hexagon_V6_vmpyhus_acc,                    // llvm.hexagon.V6.vmpyhus.acc
   2129     hexagon_V6_vmpyhus_acc_128B,               // llvm.hexagon.V6.vmpyhus.acc.128B
   2130     hexagon_V6_vmpyhv,                         // llvm.hexagon.V6.vmpyhv
   2131     hexagon_V6_vmpyhv_128B,                    // llvm.hexagon.V6.vmpyhv.128B
   2132     hexagon_V6_vmpyhv_acc,                     // llvm.hexagon.V6.vmpyhv.acc
   2133     hexagon_V6_vmpyhv_acc_128B,                // llvm.hexagon.V6.vmpyhv.acc.128B
   2134     hexagon_V6_vmpyhvsrs,                      // llvm.hexagon.V6.vmpyhvsrs
   2135     hexagon_V6_vmpyhvsrs_128B,                 // llvm.hexagon.V6.vmpyhvsrs.128B
   2136     hexagon_V6_vmpyieoh,                       // llvm.hexagon.V6.vmpyieoh
   2137     hexagon_V6_vmpyieoh_128B,                  // llvm.hexagon.V6.vmpyieoh.128B
   2138     hexagon_V6_vmpyiewh_acc,                   // llvm.hexagon.V6.vmpyiewh.acc
   2139     hexagon_V6_vmpyiewh_acc_128B,              // llvm.hexagon.V6.vmpyiewh.acc.128B
   2140     hexagon_V6_vmpyiewuh,                      // llvm.hexagon.V6.vmpyiewuh
   2141     hexagon_V6_vmpyiewuh_128B,                 // llvm.hexagon.V6.vmpyiewuh.128B
   2142     hexagon_V6_vmpyiewuh_acc,                  // llvm.hexagon.V6.vmpyiewuh.acc
   2143     hexagon_V6_vmpyiewuh_acc_128B,             // llvm.hexagon.V6.vmpyiewuh.acc.128B
   2144     hexagon_V6_vmpyih,                         // llvm.hexagon.V6.vmpyih
   2145     hexagon_V6_vmpyih_128B,                    // llvm.hexagon.V6.vmpyih.128B
   2146     hexagon_V6_vmpyih_acc,                     // llvm.hexagon.V6.vmpyih.acc
   2147     hexagon_V6_vmpyih_acc_128B,                // llvm.hexagon.V6.vmpyih.acc.128B
   2148     hexagon_V6_vmpyihb,                        // llvm.hexagon.V6.vmpyihb
   2149     hexagon_V6_vmpyihb_128B,                   // llvm.hexagon.V6.vmpyihb.128B
   2150     hexagon_V6_vmpyihb_acc,                    // llvm.hexagon.V6.vmpyihb.acc
   2151     hexagon_V6_vmpyihb_acc_128B,               // llvm.hexagon.V6.vmpyihb.acc.128B
   2152     hexagon_V6_vmpyiowh,                       // llvm.hexagon.V6.vmpyiowh
   2153     hexagon_V6_vmpyiowh_128B,                  // llvm.hexagon.V6.vmpyiowh.128B
   2154     hexagon_V6_vmpyiwb,                        // llvm.hexagon.V6.vmpyiwb
   2155     hexagon_V6_vmpyiwb_128B,                   // llvm.hexagon.V6.vmpyiwb.128B
   2156     hexagon_V6_vmpyiwb_acc,                    // llvm.hexagon.V6.vmpyiwb.acc
   2157     hexagon_V6_vmpyiwb_acc_128B,               // llvm.hexagon.V6.vmpyiwb.acc.128B
   2158     hexagon_V6_vmpyiwh,                        // llvm.hexagon.V6.vmpyiwh
   2159     hexagon_V6_vmpyiwh_128B,                   // llvm.hexagon.V6.vmpyiwh.128B
   2160     hexagon_V6_vmpyiwh_acc,                    // llvm.hexagon.V6.vmpyiwh.acc
   2161     hexagon_V6_vmpyiwh_acc_128B,               // llvm.hexagon.V6.vmpyiwh.acc.128B
   2162     hexagon_V6_vmpyiwub,                       // llvm.hexagon.V6.vmpyiwub
   2163     hexagon_V6_vmpyiwub_128B,                  // llvm.hexagon.V6.vmpyiwub.128B
   2164     hexagon_V6_vmpyiwub_acc,                   // llvm.hexagon.V6.vmpyiwub.acc
   2165     hexagon_V6_vmpyiwub_acc_128B,              // llvm.hexagon.V6.vmpyiwub.acc.128B
   2166     hexagon_V6_vmpyowh,                        // llvm.hexagon.V6.vmpyowh
   2167     hexagon_V6_vmpyowh_128B,                   // llvm.hexagon.V6.vmpyowh.128B
   2168     hexagon_V6_vmpyowh_64_acc,                 // llvm.hexagon.V6.vmpyowh.64.acc
   2169     hexagon_V6_vmpyowh_64_acc_128B,            // llvm.hexagon.V6.vmpyowh.64.acc.128B
   2170     hexagon_V6_vmpyowh_rnd,                    // llvm.hexagon.V6.vmpyowh.rnd
   2171     hexagon_V6_vmpyowh_rnd_128B,               // llvm.hexagon.V6.vmpyowh.rnd.128B
   2172     hexagon_V6_vmpyowh_rnd_sacc,               // llvm.hexagon.V6.vmpyowh.rnd.sacc
   2173     hexagon_V6_vmpyowh_rnd_sacc_128B,          // llvm.hexagon.V6.vmpyowh.rnd.sacc.128B
   2174     hexagon_V6_vmpyowh_sacc,                   // llvm.hexagon.V6.vmpyowh.sacc
   2175     hexagon_V6_vmpyowh_sacc_128B,              // llvm.hexagon.V6.vmpyowh.sacc.128B
   2176     hexagon_V6_vmpyub,                         // llvm.hexagon.V6.vmpyub
   2177     hexagon_V6_vmpyub_128B,                    // llvm.hexagon.V6.vmpyub.128B
   2178     hexagon_V6_vmpyub_acc,                     // llvm.hexagon.V6.vmpyub.acc
   2179     hexagon_V6_vmpyub_acc_128B,                // llvm.hexagon.V6.vmpyub.acc.128B
   2180     hexagon_V6_vmpyubv,                        // llvm.hexagon.V6.vmpyubv
   2181     hexagon_V6_vmpyubv_128B,                   // llvm.hexagon.V6.vmpyubv.128B
   2182     hexagon_V6_vmpyubv_acc,                    // llvm.hexagon.V6.vmpyubv.acc
   2183     hexagon_V6_vmpyubv_acc_128B,               // llvm.hexagon.V6.vmpyubv.acc.128B
   2184     hexagon_V6_vmpyuh,                         // llvm.hexagon.V6.vmpyuh
   2185     hexagon_V6_vmpyuh_128B,                    // llvm.hexagon.V6.vmpyuh.128B
   2186     hexagon_V6_vmpyuh_acc,                     // llvm.hexagon.V6.vmpyuh.acc
   2187     hexagon_V6_vmpyuh_acc_128B,                // llvm.hexagon.V6.vmpyuh.acc.128B
   2188     hexagon_V6_vmpyuhv,                        // llvm.hexagon.V6.vmpyuhv
   2189     hexagon_V6_vmpyuhv_128B,                   // llvm.hexagon.V6.vmpyuhv.128B
   2190     hexagon_V6_vmpyuhv_acc,                    // llvm.hexagon.V6.vmpyuhv.acc
   2191     hexagon_V6_vmpyuhv_acc_128B,               // llvm.hexagon.V6.vmpyuhv.acc.128B
   2192     hexagon_V6_vmux,                           // llvm.hexagon.V6.vmux
   2193     hexagon_V6_vmux_128B,                      // llvm.hexagon.V6.vmux.128B
   2194     hexagon_V6_vnavgh,                         // llvm.hexagon.V6.vnavgh
   2195     hexagon_V6_vnavgh_128B,                    // llvm.hexagon.V6.vnavgh.128B
   2196     hexagon_V6_vnavgub,                        // llvm.hexagon.V6.vnavgub
   2197     hexagon_V6_vnavgub_128B,                   // llvm.hexagon.V6.vnavgub.128B
   2198     hexagon_V6_vnavgw,                         // llvm.hexagon.V6.vnavgw
   2199     hexagon_V6_vnavgw_128B,                    // llvm.hexagon.V6.vnavgw.128B
   2200     hexagon_V6_vnormamth,                      // llvm.hexagon.V6.vnormamth
   2201     hexagon_V6_vnormamth_128B,                 // llvm.hexagon.V6.vnormamth.128B
   2202     hexagon_V6_vnormamtw,                      // llvm.hexagon.V6.vnormamtw
   2203     hexagon_V6_vnormamtw_128B,                 // llvm.hexagon.V6.vnormamtw.128B
   2204     hexagon_V6_vnot,                           // llvm.hexagon.V6.vnot
   2205     hexagon_V6_vnot_128B,                      // llvm.hexagon.V6.vnot.128B
   2206     hexagon_V6_vor,                            // llvm.hexagon.V6.vor
   2207     hexagon_V6_vor_128B,                       // llvm.hexagon.V6.vor.128B
   2208     hexagon_V6_vpackeb,                        // llvm.hexagon.V6.vpackeb
   2209     hexagon_V6_vpackeb_128B,                   // llvm.hexagon.V6.vpackeb.128B
   2210     hexagon_V6_vpackeh,                        // llvm.hexagon.V6.vpackeh
   2211     hexagon_V6_vpackeh_128B,                   // llvm.hexagon.V6.vpackeh.128B
   2212     hexagon_V6_vpackhb_sat,                    // llvm.hexagon.V6.vpackhb.sat
   2213     hexagon_V6_vpackhb_sat_128B,               // llvm.hexagon.V6.vpackhb.sat.128B
   2214     hexagon_V6_vpackhub_sat,                   // llvm.hexagon.V6.vpackhub.sat
   2215     hexagon_V6_vpackhub_sat_128B,              // llvm.hexagon.V6.vpackhub.sat.128B
   2216     hexagon_V6_vpackob,                        // llvm.hexagon.V6.vpackob
   2217     hexagon_V6_vpackob_128B,                   // llvm.hexagon.V6.vpackob.128B
   2218     hexagon_V6_vpackoh,                        // llvm.hexagon.V6.vpackoh
   2219     hexagon_V6_vpackoh_128B,                   // llvm.hexagon.V6.vpackoh.128B
   2220     hexagon_V6_vpackwh_sat,                    // llvm.hexagon.V6.vpackwh.sat
   2221     hexagon_V6_vpackwh_sat_128B,               // llvm.hexagon.V6.vpackwh.sat.128B
   2222     hexagon_V6_vpackwuh_sat,                   // llvm.hexagon.V6.vpackwuh.sat
   2223     hexagon_V6_vpackwuh_sat_128B,              // llvm.hexagon.V6.vpackwuh.sat.128B
   2224     hexagon_V6_vpopcounth,                     // llvm.hexagon.V6.vpopcounth
   2225     hexagon_V6_vpopcounth_128B,                // llvm.hexagon.V6.vpopcounth.128B
   2226     hexagon_V6_vrdelta,                        // llvm.hexagon.V6.vrdelta
   2227     hexagon_V6_vrdelta_128B,                   // llvm.hexagon.V6.vrdelta.128B
   2228     hexagon_V6_vrmpybus,                       // llvm.hexagon.V6.vrmpybus
   2229     hexagon_V6_vrmpybus_128B,                  // llvm.hexagon.V6.vrmpybus.128B
   2230     hexagon_V6_vrmpybus_acc,                   // llvm.hexagon.V6.vrmpybus.acc
   2231     hexagon_V6_vrmpybus_acc_128B,              // llvm.hexagon.V6.vrmpybus.acc.128B
   2232     hexagon_V6_vrmpybusi,                      // llvm.hexagon.V6.vrmpybusi
   2233     hexagon_V6_vrmpybusi_128B,                 // llvm.hexagon.V6.vrmpybusi.128B
   2234     hexagon_V6_vrmpybusi_acc,                  // llvm.hexagon.V6.vrmpybusi.acc
   2235     hexagon_V6_vrmpybusi_acc_128B,             // llvm.hexagon.V6.vrmpybusi.acc.128B
   2236     hexagon_V6_vrmpybusv,                      // llvm.hexagon.V6.vrmpybusv
   2237     hexagon_V6_vrmpybusv_128B,                 // llvm.hexagon.V6.vrmpybusv.128B
   2238     hexagon_V6_vrmpybusv_acc,                  // llvm.hexagon.V6.vrmpybusv.acc
   2239     hexagon_V6_vrmpybusv_acc_128B,             // llvm.hexagon.V6.vrmpybusv.acc.128B
   2240     hexagon_V6_vrmpybv,                        // llvm.hexagon.V6.vrmpybv
   2241     hexagon_V6_vrmpybv_128B,                   // llvm.hexagon.V6.vrmpybv.128B
   2242     hexagon_V6_vrmpybv_acc,                    // llvm.hexagon.V6.vrmpybv.acc
   2243     hexagon_V6_vrmpybv_acc_128B,               // llvm.hexagon.V6.vrmpybv.acc.128B
   2244     hexagon_V6_vrmpyub,                        // llvm.hexagon.V6.vrmpyub
   2245     hexagon_V6_vrmpyub_128B,                   // llvm.hexagon.V6.vrmpyub.128B
   2246     hexagon_V6_vrmpyub_acc,                    // llvm.hexagon.V6.vrmpyub.acc
   2247     hexagon_V6_vrmpyub_acc_128B,               // llvm.hexagon.V6.vrmpyub.acc.128B
   2248     hexagon_V6_vrmpyubi,                       // llvm.hexagon.V6.vrmpyubi
   2249     hexagon_V6_vrmpyubi_128B,                  // llvm.hexagon.V6.vrmpyubi.128B
   2250     hexagon_V6_vrmpyubi_acc,                   // llvm.hexagon.V6.vrmpyubi.acc
   2251     hexagon_V6_vrmpyubi_acc_128B,              // llvm.hexagon.V6.vrmpyubi.acc.128B
   2252     hexagon_V6_vrmpyubv,                       // llvm.hexagon.V6.vrmpyubv
   2253     hexagon_V6_vrmpyubv_128B,                  // llvm.hexagon.V6.vrmpyubv.128B
   2254     hexagon_V6_vrmpyubv_acc,                   // llvm.hexagon.V6.vrmpyubv.acc
   2255     hexagon_V6_vrmpyubv_acc_128B,              // llvm.hexagon.V6.vrmpyubv.acc.128B
   2256     hexagon_V6_vror,                           // llvm.hexagon.V6.vror
   2257     hexagon_V6_vror_128B,                      // llvm.hexagon.V6.vror.128B
   2258     hexagon_V6_vroundhb,                       // llvm.hexagon.V6.vroundhb
   2259     hexagon_V6_vroundhb_128B,                  // llvm.hexagon.V6.vroundhb.128B
   2260     hexagon_V6_vroundhub,                      // llvm.hexagon.V6.vroundhub
   2261     hexagon_V6_vroundhub_128B,                 // llvm.hexagon.V6.vroundhub.128B
   2262     hexagon_V6_vrounduhub,                     // llvm.hexagon.V6.vrounduhub
   2263     hexagon_V6_vrounduhub_128B,                // llvm.hexagon.V6.vrounduhub.128B
   2264     hexagon_V6_vrounduwuh,                     // llvm.hexagon.V6.vrounduwuh
   2265     hexagon_V6_vrounduwuh_128B,                // llvm.hexagon.V6.vrounduwuh.128B
   2266     hexagon_V6_vroundwh,                       // llvm.hexagon.V6.vroundwh
   2267     hexagon_V6_vroundwh_128B,                  // llvm.hexagon.V6.vroundwh.128B
   2268     hexagon_V6_vroundwuh,                      // llvm.hexagon.V6.vroundwuh
   2269     hexagon_V6_vroundwuh_128B,                 // llvm.hexagon.V6.vroundwuh.128B
   2270     hexagon_V6_vrsadubi,                       // llvm.hexagon.V6.vrsadubi
   2271     hexagon_V6_vrsadubi_128B,                  // llvm.hexagon.V6.vrsadubi.128B
   2272     hexagon_V6_vrsadubi_acc,                   // llvm.hexagon.V6.vrsadubi.acc
   2273     hexagon_V6_vrsadubi_acc_128B,              // llvm.hexagon.V6.vrsadubi.acc.128B
   2274     hexagon_V6_vsathub,                        // llvm.hexagon.V6.vsathub
   2275     hexagon_V6_vsathub_128B,                   // llvm.hexagon.V6.vsathub.128B
   2276     hexagon_V6_vsatuwuh,                       // llvm.hexagon.V6.vsatuwuh
   2277     hexagon_V6_vsatuwuh_128B,                  // llvm.hexagon.V6.vsatuwuh.128B
   2278     hexagon_V6_vsatwh,                         // llvm.hexagon.V6.vsatwh
   2279     hexagon_V6_vsatwh_128B,                    // llvm.hexagon.V6.vsatwh.128B
   2280     hexagon_V6_vsb,                            // llvm.hexagon.V6.vsb
   2281     hexagon_V6_vsb_128B,                       // llvm.hexagon.V6.vsb.128B
   2282     hexagon_V6_vsh,                            // llvm.hexagon.V6.vsh
   2283     hexagon_V6_vsh_128B,                       // llvm.hexagon.V6.vsh.128B
   2284     hexagon_V6_vshufeh,                        // llvm.hexagon.V6.vshufeh
   2285     hexagon_V6_vshufeh_128B,                   // llvm.hexagon.V6.vshufeh.128B
   2286     hexagon_V6_vshuffb,                        // llvm.hexagon.V6.vshuffb
   2287     hexagon_V6_vshuffb_128B,                   // llvm.hexagon.V6.vshuffb.128B
   2288     hexagon_V6_vshuffeb,                       // llvm.hexagon.V6.vshuffeb
   2289     hexagon_V6_vshuffeb_128B,                  // llvm.hexagon.V6.vshuffeb.128B
   2290     hexagon_V6_vshuffh,                        // llvm.hexagon.V6.vshuffh
   2291     hexagon_V6_vshuffh_128B,                   // llvm.hexagon.V6.vshuffh.128B
   2292     hexagon_V6_vshuffob,                       // llvm.hexagon.V6.vshuffob
   2293     hexagon_V6_vshuffob_128B,                  // llvm.hexagon.V6.vshuffob.128B
   2294     hexagon_V6_vshuffvdd,                      // llvm.hexagon.V6.vshuffvdd
   2295     hexagon_V6_vshuffvdd_128B,                 // llvm.hexagon.V6.vshuffvdd.128B
   2296     hexagon_V6_vshufoeb,                       // llvm.hexagon.V6.vshufoeb
   2297     hexagon_V6_vshufoeb_128B,                  // llvm.hexagon.V6.vshufoeb.128B
   2298     hexagon_V6_vshufoeh,                       // llvm.hexagon.V6.vshufoeh
   2299     hexagon_V6_vshufoeh_128B,                  // llvm.hexagon.V6.vshufoeh.128B
   2300     hexagon_V6_vshufoh,                        // llvm.hexagon.V6.vshufoh
   2301     hexagon_V6_vshufoh_128B,                   // llvm.hexagon.V6.vshufoh.128B
   2302     hexagon_V6_vsubb,                          // llvm.hexagon.V6.vsubb
   2303     hexagon_V6_vsubb_128B,                     // llvm.hexagon.V6.vsubb.128B
   2304     hexagon_V6_vsubb_dv,                       // llvm.hexagon.V6.vsubb.dv
   2305     hexagon_V6_vsubb_dv_128B,                  // llvm.hexagon.V6.vsubb.dv.128B
   2306     hexagon_V6_vsubbnq,                        // llvm.hexagon.V6.vsubbnq
   2307     hexagon_V6_vsubbnq_128B,                   // llvm.hexagon.V6.vsubbnq.128B
   2308     hexagon_V6_vsubbq,                         // llvm.hexagon.V6.vsubbq
   2309     hexagon_V6_vsubbq_128B,                    // llvm.hexagon.V6.vsubbq.128B
   2310     hexagon_V6_vsubbsat,                       // llvm.hexagon.V6.vsubbsat
   2311     hexagon_V6_vsubbsat_128B,                  // llvm.hexagon.V6.vsubbsat.128B
   2312     hexagon_V6_vsubbsat_dv,                    // llvm.hexagon.V6.vsubbsat.dv
   2313     hexagon_V6_vsubbsat_dv_128B,               // llvm.hexagon.V6.vsubbsat.dv.128B
   2314     hexagon_V6_vsubh,                          // llvm.hexagon.V6.vsubh
   2315     hexagon_V6_vsubh_128B,                     // llvm.hexagon.V6.vsubh.128B
   2316     hexagon_V6_vsubh_dv,                       // llvm.hexagon.V6.vsubh.dv
   2317     hexagon_V6_vsubh_dv_128B,                  // llvm.hexagon.V6.vsubh.dv.128B
   2318     hexagon_V6_vsubhnq,                        // llvm.hexagon.V6.vsubhnq
   2319     hexagon_V6_vsubhnq_128B,                   // llvm.hexagon.V6.vsubhnq.128B
   2320     hexagon_V6_vsubhq,                         // llvm.hexagon.V6.vsubhq
   2321     hexagon_V6_vsubhq_128B,                    // llvm.hexagon.V6.vsubhq.128B
   2322     hexagon_V6_vsubhsat,                       // llvm.hexagon.V6.vsubhsat
   2323     hexagon_V6_vsubhsat_128B,                  // llvm.hexagon.V6.vsubhsat.128B
   2324     hexagon_V6_vsubhsat_dv,                    // llvm.hexagon.V6.vsubhsat.dv
   2325     hexagon_V6_vsubhsat_dv_128B,               // llvm.hexagon.V6.vsubhsat.dv.128B
   2326     hexagon_V6_vsubhw,                         // llvm.hexagon.V6.vsubhw
   2327     hexagon_V6_vsubhw_128B,                    // llvm.hexagon.V6.vsubhw.128B
   2328     hexagon_V6_vsububh,                        // llvm.hexagon.V6.vsububh
   2329     hexagon_V6_vsububh_128B,                   // llvm.hexagon.V6.vsububh.128B
   2330     hexagon_V6_vsububsat,                      // llvm.hexagon.V6.vsububsat
   2331     hexagon_V6_vsububsat_128B,                 // llvm.hexagon.V6.vsububsat.128B
   2332     hexagon_V6_vsububsat_dv,                   // llvm.hexagon.V6.vsububsat.dv
   2333     hexagon_V6_vsububsat_dv_128B,              // llvm.hexagon.V6.vsububsat.dv.128B
   2334     hexagon_V6_vsubububb_sat,                  // llvm.hexagon.V6.vsubububb.sat
   2335     hexagon_V6_vsubububb_sat_128B,             // llvm.hexagon.V6.vsubububb.sat.128B
   2336     hexagon_V6_vsubuhsat,                      // llvm.hexagon.V6.vsubuhsat
   2337     hexagon_V6_vsubuhsat_128B,                 // llvm.hexagon.V6.vsubuhsat.128B
   2338     hexagon_V6_vsubuhsat_dv,                   // llvm.hexagon.V6.vsubuhsat.dv
   2339     hexagon_V6_vsubuhsat_dv_128B,              // llvm.hexagon.V6.vsubuhsat.dv.128B
   2340     hexagon_V6_vsubuhw,                        // llvm.hexagon.V6.vsubuhw
   2341     hexagon_V6_vsubuhw_128B,                   // llvm.hexagon.V6.vsubuhw.128B
   2342     hexagon_V6_vsubuwsat,                      // llvm.hexagon.V6.vsubuwsat
   2343     hexagon_V6_vsubuwsat_128B,                 // llvm.hexagon.V6.vsubuwsat.128B
   2344     hexagon_V6_vsubuwsat_dv,                   // llvm.hexagon.V6.vsubuwsat.dv
   2345     hexagon_V6_vsubuwsat_dv_128B,              // llvm.hexagon.V6.vsubuwsat.dv.128B
   2346     hexagon_V6_vsubw,                          // llvm.hexagon.V6.vsubw
   2347     hexagon_V6_vsubw_128B,                     // llvm.hexagon.V6.vsubw.128B
   2348     hexagon_V6_vsubw_dv,                       // llvm.hexagon.V6.vsubw.dv
   2349     hexagon_V6_vsubw_dv_128B,                  // llvm.hexagon.V6.vsubw.dv.128B
   2350     hexagon_V6_vsubwnq,                        // llvm.hexagon.V6.vsubwnq
   2351     hexagon_V6_vsubwnq_128B,                   // llvm.hexagon.V6.vsubwnq.128B
   2352     hexagon_V6_vsubwq,                         // llvm.hexagon.V6.vsubwq
   2353     hexagon_V6_vsubwq_128B,                    // llvm.hexagon.V6.vsubwq.128B
   2354     hexagon_V6_vsubwsat,                       // llvm.hexagon.V6.vsubwsat
   2355     hexagon_V6_vsubwsat_128B,                  // llvm.hexagon.V6.vsubwsat.128B
   2356     hexagon_V6_vsubwsat_dv,                    // llvm.hexagon.V6.vsubwsat.dv
   2357     hexagon_V6_vsubwsat_dv_128B,               // llvm.hexagon.V6.vsubwsat.dv.128B
   2358     hexagon_V6_vswap,                          // llvm.hexagon.V6.vswap
   2359     hexagon_V6_vswap_128B,                     // llvm.hexagon.V6.vswap.128B
   2360     hexagon_V6_vtmpyb,                         // llvm.hexagon.V6.vtmpyb
   2361     hexagon_V6_vtmpyb_128B,                    // llvm.hexagon.V6.vtmpyb.128B
   2362     hexagon_V6_vtmpyb_acc,                     // llvm.hexagon.V6.vtmpyb.acc
   2363     hexagon_V6_vtmpyb_acc_128B,                // llvm.hexagon.V6.vtmpyb.acc.128B
   2364     hexagon_V6_vtmpybus,                       // llvm.hexagon.V6.vtmpybus
   2365     hexagon_V6_vtmpybus_128B,                  // llvm.hexagon.V6.vtmpybus.128B
   2366     hexagon_V6_vtmpybus_acc,                   // llvm.hexagon.V6.vtmpybus.acc
   2367     hexagon_V6_vtmpybus_acc_128B,              // llvm.hexagon.V6.vtmpybus.acc.128B
   2368     hexagon_V6_vtmpyhb,                        // llvm.hexagon.V6.vtmpyhb
   2369     hexagon_V6_vtmpyhb_128B,                   // llvm.hexagon.V6.vtmpyhb.128B
   2370     hexagon_V6_vtmpyhb_acc,                    // llvm.hexagon.V6.vtmpyhb.acc
   2371     hexagon_V6_vtmpyhb_acc_128B,               // llvm.hexagon.V6.vtmpyhb.acc.128B
   2372     hexagon_V6_vunpackb,                       // llvm.hexagon.V6.vunpackb
   2373     hexagon_V6_vunpackb_128B,                  // llvm.hexagon.V6.vunpackb.128B
   2374     hexagon_V6_vunpackh,                       // llvm.hexagon.V6.vunpackh
   2375     hexagon_V6_vunpackh_128B,                  // llvm.hexagon.V6.vunpackh.128B
   2376     hexagon_V6_vunpackob,                      // llvm.hexagon.V6.vunpackob
   2377     hexagon_V6_vunpackob_128B,                 // llvm.hexagon.V6.vunpackob.128B
   2378     hexagon_V6_vunpackoh,                      // llvm.hexagon.V6.vunpackoh
   2379     hexagon_V6_vunpackoh_128B,                 // llvm.hexagon.V6.vunpackoh.128B
   2380     hexagon_V6_vunpackub,                      // llvm.hexagon.V6.vunpackub
   2381     hexagon_V6_vunpackub_128B,                 // llvm.hexagon.V6.vunpackub.128B
   2382     hexagon_V6_vunpackuh,                      // llvm.hexagon.V6.vunpackuh
   2383     hexagon_V6_vunpackuh_128B,                 // llvm.hexagon.V6.vunpackuh.128B
   2384     hexagon_V6_vxor,                           // llvm.hexagon.V6.vxor
   2385     hexagon_V6_vxor_128B,                      // llvm.hexagon.V6.vxor.128B
   2386     hexagon_V6_vzb,                            // llvm.hexagon.V6.vzb
   2387     hexagon_V6_vzb_128B,                       // llvm.hexagon.V6.vzb.128B
   2388     hexagon_V6_vzh,                            // llvm.hexagon.V6.vzh
   2389     hexagon_V6_vzh_128B,                       // llvm.hexagon.V6.vzh.128B
   2390     hexagon_Y2_dccleana,                       // llvm.hexagon.Y2.dccleana
   2391     hexagon_Y2_dccleaninva,                    // llvm.hexagon.Y2.dccleaninva
   2392     hexagon_Y2_dcinva,                         // llvm.hexagon.Y2.dcinva
   2393     hexagon_Y2_dczeroa,                        // llvm.hexagon.Y2.dczeroa
   2394     hexagon_Y4_l2fetch,                        // llvm.hexagon.Y4.l2fetch
   2395     hexagon_Y5_l2fetch,                        // llvm.hexagon.Y5.l2fetch
   2396     hexagon_brev_ldb,                          // llvm.hexagon.brev.ldb
   2397     hexagon_brev_ldd,                          // llvm.hexagon.brev.ldd
   2398     hexagon_brev_ldh,                          // llvm.hexagon.brev.ldh
   2399     hexagon_brev_ldub,                         // llvm.hexagon.brev.ldub
   2400     hexagon_brev_lduh,                         // llvm.hexagon.brev.lduh
   2401     hexagon_brev_ldw,                          // llvm.hexagon.brev.ldw
   2402     hexagon_brev_stb,                          // llvm.hexagon.brev.stb
   2403     hexagon_brev_std,                          // llvm.hexagon.brev.std
   2404     hexagon_brev_sth,                          // llvm.hexagon.brev.sth
   2405     hexagon_brev_sthhi,                        // llvm.hexagon.brev.sthhi
   2406     hexagon_brev_stw,                          // llvm.hexagon.brev.stw
   2407     hexagon_circ_ldb,                          // llvm.hexagon.circ.ldb
   2408     hexagon_circ_ldd,                          // llvm.hexagon.circ.ldd
   2409     hexagon_circ_ldh,                          // llvm.hexagon.circ.ldh
   2410     hexagon_circ_ldub,                         // llvm.hexagon.circ.ldub
   2411     hexagon_circ_lduh,                         // llvm.hexagon.circ.lduh
   2412     hexagon_circ_ldw,                          // llvm.hexagon.circ.ldw
   2413     hexagon_circ_stb,                          // llvm.hexagon.circ.stb
   2414     hexagon_circ_std,                          // llvm.hexagon.circ.std
   2415     hexagon_circ_sth,                          // llvm.hexagon.circ.sth
   2416     hexagon_circ_sthhi,                        // llvm.hexagon.circ.sthhi
   2417     hexagon_circ_stw,                          // llvm.hexagon.circ.stw
   2418     hexagon_mm256i_vaddw,                      // llvm.hexagon.mm256i.vaddw
   2419     hexagon_prefetch,                          // llvm.hexagon.prefetch
   2420     mips_absq_s_ph,                            // llvm.mips.absq.s.ph
   2421     mips_absq_s_qb,                            // llvm.mips.absq.s.qb
   2422     mips_absq_s_w,                             // llvm.mips.absq.s.w
   2423     mips_add_a_b,                              // llvm.mips.add.a.b
   2424     mips_add_a_d,                              // llvm.mips.add.a.d
   2425     mips_add_a_h,                              // llvm.mips.add.a.h
   2426     mips_add_a_w,                              // llvm.mips.add.a.w
   2427     mips_addq_ph,                              // llvm.mips.addq.ph
   2428     mips_addq_s_ph,                            // llvm.mips.addq.s.ph
   2429     mips_addq_s_w,                             // llvm.mips.addq.s.w
   2430     mips_addqh_ph,                             // llvm.mips.addqh.ph
   2431     mips_addqh_r_ph,                           // llvm.mips.addqh.r.ph
   2432     mips_addqh_r_w,                            // llvm.mips.addqh.r.w
   2433     mips_addqh_w,                              // llvm.mips.addqh.w
   2434     mips_adds_a_b,                             // llvm.mips.adds.a.b
   2435     mips_adds_a_d,                             // llvm.mips.adds.a.d
   2436     mips_adds_a_h,                             // llvm.mips.adds.a.h
   2437     mips_adds_a_w,                             // llvm.mips.adds.a.w
   2438     mips_adds_s_b,                             // llvm.mips.adds.s.b
   2439     mips_adds_s_d,                             // llvm.mips.adds.s.d
   2440     mips_adds_s_h,                             // llvm.mips.adds.s.h
   2441     mips_adds_s_w,                             // llvm.mips.adds.s.w
   2442     mips_adds_u_b,                             // llvm.mips.adds.u.b
   2443     mips_adds_u_d,                             // llvm.mips.adds.u.d
   2444     mips_adds_u_h,                             // llvm.mips.adds.u.h
   2445     mips_adds_u_w,                             // llvm.mips.adds.u.w
   2446     mips_addsc,                                // llvm.mips.addsc
   2447     mips_addu_ph,                              // llvm.mips.addu.ph
   2448     mips_addu_qb,                              // llvm.mips.addu.qb
   2449     mips_addu_s_ph,                            // llvm.mips.addu.s.ph
   2450     mips_addu_s_qb,                            // llvm.mips.addu.s.qb
   2451     mips_adduh_qb,                             // llvm.mips.adduh.qb
   2452     mips_adduh_r_qb,                           // llvm.mips.adduh.r.qb
   2453     mips_addv_b,                               // llvm.mips.addv.b
   2454     mips_addv_d,                               // llvm.mips.addv.d
   2455     mips_addv_h,                               // llvm.mips.addv.h
   2456     mips_addv_w,                               // llvm.mips.addv.w
   2457     mips_addvi_b,                              // llvm.mips.addvi.b
   2458     mips_addvi_d,                              // llvm.mips.addvi.d
   2459     mips_addvi_h,                              // llvm.mips.addvi.h
   2460     mips_addvi_w,                              // llvm.mips.addvi.w
   2461     mips_addwc,                                // llvm.mips.addwc
   2462     mips_and_v,                                // llvm.mips.and.v
   2463     mips_andi_b,                               // llvm.mips.andi.b
   2464     mips_append,                               // llvm.mips.append
   2465     mips_asub_s_b,                             // llvm.mips.asub.s.b
   2466     mips_asub_s_d,                             // llvm.mips.asub.s.d
   2467     mips_asub_s_h,                             // llvm.mips.asub.s.h
   2468     mips_asub_s_w,                             // llvm.mips.asub.s.w
   2469     mips_asub_u_b,                             // llvm.mips.asub.u.b
   2470     mips_asub_u_d,                             // llvm.mips.asub.u.d
   2471     mips_asub_u_h,                             // llvm.mips.asub.u.h
   2472     mips_asub_u_w,                             // llvm.mips.asub.u.w
   2473     mips_ave_s_b,                              // llvm.mips.ave.s.b
   2474     mips_ave_s_d,                              // llvm.mips.ave.s.d
   2475     mips_ave_s_h,                              // llvm.mips.ave.s.h
   2476     mips_ave_s_w,                              // llvm.mips.ave.s.w
   2477     mips_ave_u_b,                              // llvm.mips.ave.u.b
   2478     mips_ave_u_d,                              // llvm.mips.ave.u.d
   2479     mips_ave_u_h,                              // llvm.mips.ave.u.h
   2480     mips_ave_u_w,                              // llvm.mips.ave.u.w
   2481     mips_aver_s_b,                             // llvm.mips.aver.s.b
   2482     mips_aver_s_d,                             // llvm.mips.aver.s.d
   2483     mips_aver_s_h,                             // llvm.mips.aver.s.h
   2484     mips_aver_s_w,                             // llvm.mips.aver.s.w
   2485     mips_aver_u_b,                             // llvm.mips.aver.u.b
   2486     mips_aver_u_d,                             // llvm.mips.aver.u.d
   2487     mips_aver_u_h,                             // llvm.mips.aver.u.h
   2488     mips_aver_u_w,                             // llvm.mips.aver.u.w
   2489     mips_balign,                               // llvm.mips.balign
   2490     mips_bclr_b,                               // llvm.mips.bclr.b
   2491     mips_bclr_d,                               // llvm.mips.bclr.d
   2492     mips_bclr_h,                               // llvm.mips.bclr.h
   2493     mips_bclr_w,                               // llvm.mips.bclr.w
   2494     mips_bclri_b,                              // llvm.mips.bclri.b
   2495     mips_bclri_d,                              // llvm.mips.bclri.d
   2496     mips_bclri_h,                              // llvm.mips.bclri.h
   2497     mips_bclri_w,                              // llvm.mips.bclri.w
   2498     mips_binsl_b,                              // llvm.mips.binsl.b
   2499     mips_binsl_d,                              // llvm.mips.binsl.d
   2500     mips_binsl_h,                              // llvm.mips.binsl.h
   2501     mips_binsl_w,                              // llvm.mips.binsl.w
   2502     mips_binsli_b,                             // llvm.mips.binsli.b
   2503     mips_binsli_d,                             // llvm.mips.binsli.d
   2504     mips_binsli_h,                             // llvm.mips.binsli.h
   2505     mips_binsli_w,                             // llvm.mips.binsli.w
   2506     mips_binsr_b,                              // llvm.mips.binsr.b
   2507     mips_binsr_d,                              // llvm.mips.binsr.d
   2508     mips_binsr_h,                              // llvm.mips.binsr.h
   2509     mips_binsr_w,                              // llvm.mips.binsr.w
   2510     mips_binsri_b,                             // llvm.mips.binsri.b
   2511     mips_binsri_d,                             // llvm.mips.binsri.d
   2512     mips_binsri_h,                             // llvm.mips.binsri.h
   2513     mips_binsri_w,                             // llvm.mips.binsri.w
   2514     mips_bitrev,                               // llvm.mips.bitrev
   2515     mips_bmnz_v,                               // llvm.mips.bmnz.v
   2516     mips_bmnzi_b,                              // llvm.mips.bmnzi.b
   2517     mips_bmz_v,                                // llvm.mips.bmz.v
   2518     mips_bmzi_b,                               // llvm.mips.bmzi.b
   2519     mips_bneg_b,                               // llvm.mips.bneg.b
   2520     mips_bneg_d,                               // llvm.mips.bneg.d
   2521     mips_bneg_h,                               // llvm.mips.bneg.h
   2522     mips_bneg_w,                               // llvm.mips.bneg.w
   2523     mips_bnegi_b,                              // llvm.mips.bnegi.b
   2524     mips_bnegi_d,                              // llvm.mips.bnegi.d
   2525     mips_bnegi_h,                              // llvm.mips.bnegi.h
   2526     mips_bnegi_w,                              // llvm.mips.bnegi.w
   2527     mips_bnz_b,                                // llvm.mips.bnz.b
   2528     mips_bnz_d,                                // llvm.mips.bnz.d
   2529     mips_bnz_h,                                // llvm.mips.bnz.h
   2530     mips_bnz_v,                                // llvm.mips.bnz.v
   2531     mips_bnz_w,                                // llvm.mips.bnz.w
   2532     mips_bposge32,                             // llvm.mips.bposge32
   2533     mips_bsel_v,                               // llvm.mips.bsel.v
   2534     mips_bseli_b,                              // llvm.mips.bseli.b
   2535     mips_bset_b,                               // llvm.mips.bset.b
   2536     mips_bset_d,                               // llvm.mips.bset.d
   2537     mips_bset_h,                               // llvm.mips.bset.h
   2538     mips_bset_w,                               // llvm.mips.bset.w
   2539     mips_bseti_b,                              // llvm.mips.bseti.b
   2540     mips_bseti_d,                              // llvm.mips.bseti.d
   2541     mips_bseti_h,                              // llvm.mips.bseti.h
   2542     mips_bseti_w,                              // llvm.mips.bseti.w
   2543     mips_bz_b,                                 // llvm.mips.bz.b
   2544     mips_bz_d,                                 // llvm.mips.bz.d
   2545     mips_bz_h,                                 // llvm.mips.bz.h
   2546     mips_bz_v,                                 // llvm.mips.bz.v
   2547     mips_bz_w,                                 // llvm.mips.bz.w
   2548     mips_ceq_b,                                // llvm.mips.ceq.b
   2549     mips_ceq_d,                                // llvm.mips.ceq.d
   2550     mips_ceq_h,                                // llvm.mips.ceq.h
   2551     mips_ceq_w,                                // llvm.mips.ceq.w
   2552     mips_ceqi_b,                               // llvm.mips.ceqi.b
   2553     mips_ceqi_d,                               // llvm.mips.ceqi.d
   2554     mips_ceqi_h,                               // llvm.mips.ceqi.h
   2555     mips_ceqi_w,                               // llvm.mips.ceqi.w
   2556     mips_cfcmsa,                               // llvm.mips.cfcmsa
   2557     mips_cle_s_b,                              // llvm.mips.cle.s.b
   2558     mips_cle_s_d,                              // llvm.mips.cle.s.d
   2559     mips_cle_s_h,                              // llvm.mips.cle.s.h
   2560     mips_cle_s_w,                              // llvm.mips.cle.s.w
   2561     mips_cle_u_b,                              // llvm.mips.cle.u.b
   2562     mips_cle_u_d,                              // llvm.mips.cle.u.d
   2563     mips_cle_u_h,                              // llvm.mips.cle.u.h
   2564     mips_cle_u_w,                              // llvm.mips.cle.u.w
   2565     mips_clei_s_b,                             // llvm.mips.clei.s.b
   2566     mips_clei_s_d,                             // llvm.mips.clei.s.d
   2567     mips_clei_s_h,                             // llvm.mips.clei.s.h
   2568     mips_clei_s_w,                             // llvm.mips.clei.s.w
   2569     mips_clei_u_b,                             // llvm.mips.clei.u.b
   2570     mips_clei_u_d,                             // llvm.mips.clei.u.d
   2571     mips_clei_u_h,                             // llvm.mips.clei.u.h
   2572     mips_clei_u_w,                             // llvm.mips.clei.u.w
   2573     mips_clt_s_b,                              // llvm.mips.clt.s.b
   2574     mips_clt_s_d,                              // llvm.mips.clt.s.d
   2575     mips_clt_s_h,                              // llvm.mips.clt.s.h
   2576     mips_clt_s_w,                              // llvm.mips.clt.s.w
   2577     mips_clt_u_b,                              // llvm.mips.clt.u.b
   2578     mips_clt_u_d,                              // llvm.mips.clt.u.d
   2579     mips_clt_u_h,                              // llvm.mips.clt.u.h
   2580     mips_clt_u_w,                              // llvm.mips.clt.u.w
   2581     mips_clti_s_b,                             // llvm.mips.clti.s.b
   2582     mips_clti_s_d,                             // llvm.mips.clti.s.d
   2583     mips_clti_s_h,                             // llvm.mips.clti.s.h
   2584     mips_clti_s_w,                             // llvm.mips.clti.s.w
   2585     mips_clti_u_b,                             // llvm.mips.clti.u.b
   2586     mips_clti_u_d,                             // llvm.mips.clti.u.d
   2587     mips_clti_u_h,                             // llvm.mips.clti.u.h
   2588     mips_clti_u_w,                             // llvm.mips.clti.u.w
   2589     mips_cmp_eq_ph,                            // llvm.mips.cmp.eq.ph
   2590     mips_cmp_le_ph,                            // llvm.mips.cmp.le.ph
   2591     mips_cmp_lt_ph,                            // llvm.mips.cmp.lt.ph
   2592     mips_cmpgdu_eq_qb,                         // llvm.mips.cmpgdu.eq.qb
   2593     mips_cmpgdu_le_qb,                         // llvm.mips.cmpgdu.le.qb
   2594     mips_cmpgdu_lt_qb,                         // llvm.mips.cmpgdu.lt.qb
   2595     mips_cmpgu_eq_qb,                          // llvm.mips.cmpgu.eq.qb
   2596     mips_cmpgu_le_qb,                          // llvm.mips.cmpgu.le.qb
   2597     mips_cmpgu_lt_qb,                          // llvm.mips.cmpgu.lt.qb
   2598     mips_cmpu_eq_qb,                           // llvm.mips.cmpu.eq.qb
   2599     mips_cmpu_le_qb,                           // llvm.mips.cmpu.le.qb
   2600     mips_cmpu_lt_qb,                           // llvm.mips.cmpu.lt.qb
   2601     mips_copy_s_b,                             // llvm.mips.copy.s.b
   2602     mips_copy_s_d,                             // llvm.mips.copy.s.d
   2603     mips_copy_s_h,                             // llvm.mips.copy.s.h
   2604     mips_copy_s_w,                             // llvm.mips.copy.s.w
   2605     mips_copy_u_b,                             // llvm.mips.copy.u.b
   2606     mips_copy_u_d,                             // llvm.mips.copy.u.d
   2607     mips_copy_u_h,                             // llvm.mips.copy.u.h
   2608     mips_copy_u_w,                             // llvm.mips.copy.u.w
   2609     mips_ctcmsa,                               // llvm.mips.ctcmsa
   2610     mips_div_s_b,                              // llvm.mips.div.s.b
   2611     mips_div_s_d,                              // llvm.mips.div.s.d
   2612     mips_div_s_h,                              // llvm.mips.div.s.h
   2613     mips_div_s_w,                              // llvm.mips.div.s.w
   2614     mips_div_u_b,                              // llvm.mips.div.u.b
   2615     mips_div_u_d,                              // llvm.mips.div.u.d
   2616     mips_div_u_h,                              // llvm.mips.div.u.h
   2617     mips_div_u_w,                              // llvm.mips.div.u.w
   2618     mips_dlsa,                                 // llvm.mips.dlsa
   2619     mips_dotp_s_d,                             // llvm.mips.dotp.s.d
   2620     mips_dotp_s_h,                             // llvm.mips.dotp.s.h
   2621     mips_dotp_s_w,                             // llvm.mips.dotp.s.w
   2622     mips_dotp_u_d,                             // llvm.mips.dotp.u.d
   2623     mips_dotp_u_h,                             // llvm.mips.dotp.u.h
   2624     mips_dotp_u_w,                             // llvm.mips.dotp.u.w
   2625     mips_dpa_w_ph,                             // llvm.mips.dpa.w.ph
   2626     mips_dpadd_s_d,                            // llvm.mips.dpadd.s.d
   2627     mips_dpadd_s_h,                            // llvm.mips.dpadd.s.h
   2628     mips_dpadd_s_w,                            // llvm.mips.dpadd.s.w
   2629     mips_dpadd_u_d,                            // llvm.mips.dpadd.u.d
   2630     mips_dpadd_u_h,                            // llvm.mips.dpadd.u.h
   2631     mips_dpadd_u_w,                            // llvm.mips.dpadd.u.w
   2632     mips_dpaq_s_w_ph,                          // llvm.mips.dpaq.s.w.ph
   2633     mips_dpaq_sa_l_w,                          // llvm.mips.dpaq.sa.l.w
   2634     mips_dpaqx_s_w_ph,                         // llvm.mips.dpaqx.s.w.ph
   2635     mips_dpaqx_sa_w_ph,                        // llvm.mips.dpaqx.sa.w.ph
   2636     mips_dpau_h_qbl,                           // llvm.mips.dpau.h.qbl
   2637     mips_dpau_h_qbr,                           // llvm.mips.dpau.h.qbr
   2638     mips_dpax_w_ph,                            // llvm.mips.dpax.w.ph
   2639     mips_dps_w_ph,                             // llvm.mips.dps.w.ph
   2640     mips_dpsq_s_w_ph,                          // llvm.mips.dpsq.s.w.ph
   2641     mips_dpsq_sa_l_w,                          // llvm.mips.dpsq.sa.l.w
   2642     mips_dpsqx_s_w_ph,                         // llvm.mips.dpsqx.s.w.ph
   2643     mips_dpsqx_sa_w_ph,                        // llvm.mips.dpsqx.sa.w.ph
   2644     mips_dpsu_h_qbl,                           // llvm.mips.dpsu.h.qbl
   2645     mips_dpsu_h_qbr,                           // llvm.mips.dpsu.h.qbr
   2646     mips_dpsub_s_d,                            // llvm.mips.dpsub.s.d
   2647     mips_dpsub_s_h,                            // llvm.mips.dpsub.s.h
   2648     mips_dpsub_s_w,                            // llvm.mips.dpsub.s.w
   2649     mips_dpsub_u_d,                            // llvm.mips.dpsub.u.d
   2650     mips_dpsub_u_h,                            // llvm.mips.dpsub.u.h
   2651     mips_dpsub_u_w,                            // llvm.mips.dpsub.u.w
   2652     mips_dpsx_w_ph,                            // llvm.mips.dpsx.w.ph
   2653     mips_extp,                                 // llvm.mips.extp
   2654     mips_extpdp,                               // llvm.mips.extpdp
   2655     mips_extr_r_w,                             // llvm.mips.extr.r.w
   2656     mips_extr_rs_w,                            // llvm.mips.extr.rs.w
   2657     mips_extr_s_h,                             // llvm.mips.extr.s.h
   2658     mips_extr_w,                               // llvm.mips.extr.w
   2659     mips_fadd_d,                               // llvm.mips.fadd.d
   2660     mips_fadd_w,                               // llvm.mips.fadd.w
   2661     mips_fcaf_d,                               // llvm.mips.fcaf.d
   2662     mips_fcaf_w,                               // llvm.mips.fcaf.w
   2663     mips_fceq_d,                               // llvm.mips.fceq.d
   2664     mips_fceq_w,                               // llvm.mips.fceq.w
   2665     mips_fclass_d,                             // llvm.mips.fclass.d
   2666     mips_fclass_w,                             // llvm.mips.fclass.w
   2667     mips_fcle_d,                               // llvm.mips.fcle.d
   2668     mips_fcle_w,                               // llvm.mips.fcle.w
   2669     mips_fclt_d,                               // llvm.mips.fclt.d
   2670     mips_fclt_w,                               // llvm.mips.fclt.w
   2671     mips_fcne_d,                               // llvm.mips.fcne.d
   2672     mips_fcne_w,                               // llvm.mips.fcne.w
   2673     mips_fcor_d,                               // llvm.mips.fcor.d
   2674     mips_fcor_w,                               // llvm.mips.fcor.w
   2675     mips_fcueq_d,                              // llvm.mips.fcueq.d
   2676     mips_fcueq_w,                              // llvm.mips.fcueq.w
   2677     mips_fcule_d,                              // llvm.mips.fcule.d
   2678     mips_fcule_w,                              // llvm.mips.fcule.w
   2679     mips_fcult_d,                              // llvm.mips.fcult.d
   2680     mips_fcult_w,                              // llvm.mips.fcult.w
   2681     mips_fcun_d,                               // llvm.mips.fcun.d
   2682     mips_fcun_w,                               // llvm.mips.fcun.w
   2683     mips_fcune_d,                              // llvm.mips.fcune.d
   2684     mips_fcune_w,                              // llvm.mips.fcune.w
   2685     mips_fdiv_d,                               // llvm.mips.fdiv.d
   2686     mips_fdiv_w,                               // llvm.mips.fdiv.w
   2687     mips_fexdo_h,                              // llvm.mips.fexdo.h
   2688     mips_fexdo_w,                              // llvm.mips.fexdo.w
   2689     mips_fexp2_d,                              // llvm.mips.fexp2.d
   2690     mips_fexp2_w,                              // llvm.mips.fexp2.w
   2691     mips_fexupl_d,                             // llvm.mips.fexupl.d
   2692     mips_fexupl_w,                             // llvm.mips.fexupl.w
   2693     mips_fexupr_d,                             // llvm.mips.fexupr.d
   2694     mips_fexupr_w,                             // llvm.mips.fexupr.w
   2695     mips_ffint_s_d,                            // llvm.mips.ffint.s.d
   2696     mips_ffint_s_w,                            // llvm.mips.ffint.s.w
   2697     mips_ffint_u_d,                            // llvm.mips.ffint.u.d
   2698     mips_ffint_u_w,                            // llvm.mips.ffint.u.w
   2699     mips_ffql_d,                               // llvm.mips.ffql.d
   2700     mips_ffql_w,                               // llvm.mips.ffql.w
   2701     mips_ffqr_d,                               // llvm.mips.ffqr.d
   2702     mips_ffqr_w,                               // llvm.mips.ffqr.w
   2703     mips_fill_b,                               // llvm.mips.fill.b
   2704     mips_fill_d,                               // llvm.mips.fill.d
   2705     mips_fill_h,                               // llvm.mips.fill.h
   2706     mips_fill_w,                               // llvm.mips.fill.w
   2707     mips_flog2_d,                              // llvm.mips.flog2.d
   2708     mips_flog2_w,                              // llvm.mips.flog2.w
   2709     mips_fmadd_d,                              // llvm.mips.fmadd.d
   2710     mips_fmadd_w,                              // llvm.mips.fmadd.w
   2711     mips_fmax_a_d,                             // llvm.mips.fmax.a.d
   2712     mips_fmax_a_w,                             // llvm.mips.fmax.a.w
   2713     mips_fmax_d,                               // llvm.mips.fmax.d
   2714     mips_fmax_w,                               // llvm.mips.fmax.w
   2715     mips_fmin_a_d,                             // llvm.mips.fmin.a.d
   2716     mips_fmin_a_w,                             // llvm.mips.fmin.a.w
   2717     mips_fmin_d,                               // llvm.mips.fmin.d
   2718     mips_fmin_w,                               // llvm.mips.fmin.w
   2719     mips_fmsub_d,                              // llvm.mips.fmsub.d
   2720     mips_fmsub_w,                              // llvm.mips.fmsub.w
   2721     mips_fmul_d,                               // llvm.mips.fmul.d
   2722     mips_fmul_w,                               // llvm.mips.fmul.w
   2723     mips_frcp_d,                               // llvm.mips.frcp.d
   2724     mips_frcp_w,                               // llvm.mips.frcp.w
   2725     mips_frint_d,                              // llvm.mips.frint.d
   2726     mips_frint_w,                              // llvm.mips.frint.w
   2727     mips_frsqrt_d,                             // llvm.mips.frsqrt.d
   2728     mips_frsqrt_w,                             // llvm.mips.frsqrt.w
   2729     mips_fsaf_d,                               // llvm.mips.fsaf.d
   2730     mips_fsaf_w,                               // llvm.mips.fsaf.w
   2731     mips_fseq_d,                               // llvm.mips.fseq.d
   2732     mips_fseq_w,                               // llvm.mips.fseq.w
   2733     mips_fsle_d,                               // llvm.mips.fsle.d
   2734     mips_fsle_w,                               // llvm.mips.fsle.w
   2735     mips_fslt_d,                               // llvm.mips.fslt.d
   2736     mips_fslt_w,                               // llvm.mips.fslt.w
   2737     mips_fsne_d,                               // llvm.mips.fsne.d
   2738     mips_fsne_w,                               // llvm.mips.fsne.w
   2739     mips_fsor_d,                               // llvm.mips.fsor.d
   2740     mips_fsor_w,                               // llvm.mips.fsor.w
   2741     mips_fsqrt_d,                              // llvm.mips.fsqrt.d
   2742     mips_fsqrt_w,                              // llvm.mips.fsqrt.w
   2743     mips_fsub_d,                               // llvm.mips.fsub.d
   2744     mips_fsub_w,                               // llvm.mips.fsub.w
   2745     mips_fsueq_d,                              // llvm.mips.fsueq.d
   2746     mips_fsueq_w,                              // llvm.mips.fsueq.w
   2747     mips_fsule_d,                              // llvm.mips.fsule.d
   2748     mips_fsule_w,                              // llvm.mips.fsule.w
   2749     mips_fsult_d,                              // llvm.mips.fsult.d
   2750     mips_fsult_w,                              // llvm.mips.fsult.w
   2751     mips_fsun_d,                               // llvm.mips.fsun.d
   2752     mips_fsun_w,                               // llvm.mips.fsun.w
   2753     mips_fsune_d,                              // llvm.mips.fsune.d
   2754     mips_fsune_w,                              // llvm.mips.fsune.w
   2755     mips_ftint_s_d,                            // llvm.mips.ftint.s.d
   2756     mips_ftint_s_w,                            // llvm.mips.ftint.s.w
   2757     mips_ftint_u_d,                            // llvm.mips.ftint.u.d
   2758     mips_ftint_u_w,                            // llvm.mips.ftint.u.w
   2759     mips_ftq_h,                                // llvm.mips.ftq.h
   2760     mips_ftq_w,                                // llvm.mips.ftq.w
   2761     mips_ftrunc_s_d,                           // llvm.mips.ftrunc.s.d
   2762     mips_ftrunc_s_w,                           // llvm.mips.ftrunc.s.w
   2763     mips_ftrunc_u_d,                           // llvm.mips.ftrunc.u.d
   2764     mips_ftrunc_u_w,                           // llvm.mips.ftrunc.u.w
   2765     mips_hadd_s_d,                             // llvm.mips.hadd.s.d
   2766     mips_hadd_s_h,                             // llvm.mips.hadd.s.h
   2767     mips_hadd_s_w,                             // llvm.mips.hadd.s.w
   2768     mips_hadd_u_d,                             // llvm.mips.hadd.u.d
   2769     mips_hadd_u_h,                             // llvm.mips.hadd.u.h
   2770     mips_hadd_u_w,                             // llvm.mips.hadd.u.w
   2771     mips_hsub_s_d,                             // llvm.mips.hsub.s.d
   2772     mips_hsub_s_h,                             // llvm.mips.hsub.s.h
   2773     mips_hsub_s_w,                             // llvm.mips.hsub.s.w
   2774     mips_hsub_u_d,                             // llvm.mips.hsub.u.d
   2775     mips_hsub_u_h,                             // llvm.mips.hsub.u.h
   2776     mips_hsub_u_w,                             // llvm.mips.hsub.u.w
   2777     mips_ilvev_b,                              // llvm.mips.ilvev.b
   2778     mips_ilvev_d,                              // llvm.mips.ilvev.d
   2779     mips_ilvev_h,                              // llvm.mips.ilvev.h
   2780     mips_ilvev_w,                              // llvm.mips.ilvev.w
   2781     mips_ilvl_b,                               // llvm.mips.ilvl.b
   2782     mips_ilvl_d,                               // llvm.mips.ilvl.d
   2783     mips_ilvl_h,                               // llvm.mips.ilvl.h
   2784     mips_ilvl_w,                               // llvm.mips.ilvl.w
   2785     mips_ilvod_b,                              // llvm.mips.ilvod.b
   2786     mips_ilvod_d,                              // llvm.mips.ilvod.d
   2787     mips_ilvod_h,                              // llvm.mips.ilvod.h
   2788     mips_ilvod_w,                              // llvm.mips.ilvod.w
   2789     mips_ilvr_b,                               // llvm.mips.ilvr.b
   2790     mips_ilvr_d,                               // llvm.mips.ilvr.d
   2791     mips_ilvr_h,                               // llvm.mips.ilvr.h
   2792     mips_ilvr_w,                               // llvm.mips.ilvr.w
   2793     mips_insert_b,                             // llvm.mips.insert.b
   2794     mips_insert_d,                             // llvm.mips.insert.d
   2795     mips_insert_h,                             // llvm.mips.insert.h
   2796     mips_insert_w,                             // llvm.mips.insert.w
   2797     mips_insv,                                 // llvm.mips.insv
   2798     mips_insve_b,                              // llvm.mips.insve.b
   2799     mips_insve_d,                              // llvm.mips.insve.d
   2800     mips_insve_h,                              // llvm.mips.insve.h
   2801     mips_insve_w,                              // llvm.mips.insve.w
   2802     mips_lbux,                                 // llvm.mips.lbux
   2803     mips_ld_b,                                 // llvm.mips.ld.b
   2804     mips_ld_d,                                 // llvm.mips.ld.d
   2805     mips_ld_h,                                 // llvm.mips.ld.h
   2806     mips_ld_w,                                 // llvm.mips.ld.w
   2807     mips_ldi_b,                                // llvm.mips.ldi.b
   2808     mips_ldi_d,                                // llvm.mips.ldi.d
   2809     mips_ldi_h,                                // llvm.mips.ldi.h
   2810     mips_ldi_w,                                // llvm.mips.ldi.w
   2811     mips_lhx,                                  // llvm.mips.lhx
   2812     mips_lsa,                                  // llvm.mips.lsa
   2813     mips_lwx,                                  // llvm.mips.lwx
   2814     mips_madd,                                 // llvm.mips.madd
   2815     mips_madd_q_h,                             // llvm.mips.madd.q.h
   2816     mips_madd_q_w,                             // llvm.mips.madd.q.w
   2817     mips_maddr_q_h,                            // llvm.mips.maddr.q.h
   2818     mips_maddr_q_w,                            // llvm.mips.maddr.q.w
   2819     mips_maddu,                                // llvm.mips.maddu
   2820     mips_maddv_b,                              // llvm.mips.maddv.b
   2821     mips_maddv_d,                              // llvm.mips.maddv.d
   2822     mips_maddv_h,                              // llvm.mips.maddv.h
   2823     mips_maddv_w,                              // llvm.mips.maddv.w
   2824     mips_maq_s_w_phl,                          // llvm.mips.maq.s.w.phl
   2825     mips_maq_s_w_phr,                          // llvm.mips.maq.s.w.phr
   2826     mips_maq_sa_w_phl,                         // llvm.mips.maq.sa.w.phl
   2827     mips_maq_sa_w_phr,                         // llvm.mips.maq.sa.w.phr
   2828     mips_max_a_b,                              // llvm.mips.max.a.b
   2829     mips_max_a_d,                              // llvm.mips.max.a.d
   2830     mips_max_a_h,                              // llvm.mips.max.a.h
   2831     mips_max_a_w,                              // llvm.mips.max.a.w
   2832     mips_max_s_b,                              // llvm.mips.max.s.b
   2833     mips_max_s_d,                              // llvm.mips.max.s.d
   2834     mips_max_s_h,                              // llvm.mips.max.s.h
   2835     mips_max_s_w,                              // llvm.mips.max.s.w
   2836     mips_max_u_b,                              // llvm.mips.max.u.b
   2837     mips_max_u_d,                              // llvm.mips.max.u.d
   2838     mips_max_u_h,                              // llvm.mips.max.u.h
   2839     mips_max_u_w,                              // llvm.mips.max.u.w
   2840     mips_maxi_s_b,                             // llvm.mips.maxi.s.b
   2841     mips_maxi_s_d,                             // llvm.mips.maxi.s.d
   2842     mips_maxi_s_h,                             // llvm.mips.maxi.s.h
   2843     mips_maxi_s_w,                             // llvm.mips.maxi.s.w
   2844     mips_maxi_u_b,                             // llvm.mips.maxi.u.b
   2845     mips_maxi_u_d,                             // llvm.mips.maxi.u.d
   2846     mips_maxi_u_h,                             // llvm.mips.maxi.u.h
   2847     mips_maxi_u_w,                             // llvm.mips.maxi.u.w
   2848     mips_min_a_b,                              // llvm.mips.min.a.b
   2849     mips_min_a_d,                              // llvm.mips.min.a.d
   2850     mips_min_a_h,                              // llvm.mips.min.a.h
   2851     mips_min_a_w,                              // llvm.mips.min.a.w
   2852     mips_min_s_b,                              // llvm.mips.min.s.b
   2853     mips_min_s_d,                              // llvm.mips.min.s.d
   2854     mips_min_s_h,                              // llvm.mips.min.s.h
   2855     mips_min_s_w,                              // llvm.mips.min.s.w
   2856     mips_min_u_b,                              // llvm.mips.min.u.b
   2857     mips_min_u_d,                              // llvm.mips.min.u.d
   2858     mips_min_u_h,                              // llvm.mips.min.u.h
   2859     mips_min_u_w,                              // llvm.mips.min.u.w
   2860     mips_mini_s_b,                             // llvm.mips.mini.s.b
   2861     mips_mini_s_d,                             // llvm.mips.mini.s.d
   2862     mips_mini_s_h,                             // llvm.mips.mini.s.h
   2863     mips_mini_s_w,                             // llvm.mips.mini.s.w
   2864     mips_mini_u_b,                             // llvm.mips.mini.u.b
   2865     mips_mini_u_d,                             // llvm.mips.mini.u.d
   2866     mips_mini_u_h,                             // llvm.mips.mini.u.h
   2867     mips_mini_u_w,                             // llvm.mips.mini.u.w
   2868     mips_mod_s_b,                              // llvm.mips.mod.s.b
   2869     mips_mod_s_d,                              // llvm.mips.mod.s.d
   2870     mips_mod_s_h,                              // llvm.mips.mod.s.h
   2871     mips_mod_s_w,                              // llvm.mips.mod.s.w
   2872     mips_mod_u_b,                              // llvm.mips.mod.u.b
   2873     mips_mod_u_d,                              // llvm.mips.mod.u.d
   2874     mips_mod_u_h,                              // llvm.mips.mod.u.h
   2875     mips_mod_u_w,                              // llvm.mips.mod.u.w
   2876     mips_modsub,                               // llvm.mips.modsub
   2877     mips_move_v,                               // llvm.mips.move.v
   2878     mips_msub,                                 // llvm.mips.msub
   2879     mips_msub_q_h,                             // llvm.mips.msub.q.h
   2880     mips_msub_q_w,                             // llvm.mips.msub.q.w
   2881     mips_msubr_q_h,                            // llvm.mips.msubr.q.h
   2882     mips_msubr_q_w,                            // llvm.mips.msubr.q.w
   2883     mips_msubu,                                // llvm.mips.msubu
   2884     mips_msubv_b,                              // llvm.mips.msubv.b
   2885     mips_msubv_d,                              // llvm.mips.msubv.d
   2886     mips_msubv_h,                              // llvm.mips.msubv.h
   2887     mips_msubv_w,                              // llvm.mips.msubv.w
   2888     mips_mthlip,                               // llvm.mips.mthlip
   2889     mips_mul_ph,                               // llvm.mips.mul.ph
   2890     mips_mul_q_h,                              // llvm.mips.mul.q.h
   2891     mips_mul_q_w,                              // llvm.mips.mul.q.w
   2892     mips_mul_s_ph,                             // llvm.mips.mul.s.ph
   2893     mips_muleq_s_w_phl,                        // llvm.mips.muleq.s.w.phl
   2894     mips_muleq_s_w_phr,                        // llvm.mips.muleq.s.w.phr
   2895     mips_muleu_s_ph_qbl,                       // llvm.mips.muleu.s.ph.qbl
   2896     mips_muleu_s_ph_qbr,                       // llvm.mips.muleu.s.ph.qbr
   2897     mips_mulq_rs_ph,                           // llvm.mips.mulq.rs.ph
   2898     mips_mulq_rs_w,                            // llvm.mips.mulq.rs.w
   2899     mips_mulq_s_ph,                            // llvm.mips.mulq.s.ph
   2900     mips_mulq_s_w,                             // llvm.mips.mulq.s.w
   2901     mips_mulr_q_h,                             // llvm.mips.mulr.q.h
   2902     mips_mulr_q_w,                             // llvm.mips.mulr.q.w
   2903     mips_mulsa_w_ph,                           // llvm.mips.mulsa.w.ph
   2904     mips_mulsaq_s_w_ph,                        // llvm.mips.mulsaq.s.w.ph
   2905     mips_mult,                                 // llvm.mips.mult
   2906     mips_multu,                                // llvm.mips.multu
   2907     mips_mulv_b,                               // llvm.mips.mulv.b
   2908     mips_mulv_d,                               // llvm.mips.mulv.d
   2909     mips_mulv_h,                               // llvm.mips.mulv.h
   2910     mips_mulv_w,                               // llvm.mips.mulv.w
   2911     mips_nloc_b,                               // llvm.mips.nloc.b
   2912     mips_nloc_d,                               // llvm.mips.nloc.d
   2913     mips_nloc_h,                               // llvm.mips.nloc.h
   2914     mips_nloc_w,                               // llvm.mips.nloc.w
   2915     mips_nlzc_b,                               // llvm.mips.nlzc.b
   2916     mips_nlzc_d,                               // llvm.mips.nlzc.d
   2917     mips_nlzc_h,                               // llvm.mips.nlzc.h
   2918     mips_nlzc_w,                               // llvm.mips.nlzc.w
   2919     mips_nor_v,                                // llvm.mips.nor.v
   2920     mips_nori_b,                               // llvm.mips.nori.b
   2921     mips_or_v,                                 // llvm.mips.or.v
   2922     mips_ori_b,                                // llvm.mips.ori.b
   2923     mips_packrl_ph,                            // llvm.mips.packrl.ph
   2924     mips_pckev_b,                              // llvm.mips.pckev.b
   2925     mips_pckev_d,                              // llvm.mips.pckev.d
   2926     mips_pckev_h,                              // llvm.mips.pckev.h
   2927     mips_pckev_w,                              // llvm.mips.pckev.w
   2928     mips_pckod_b,                              // llvm.mips.pckod.b
   2929     mips_pckod_d,                              // llvm.mips.pckod.d
   2930     mips_pckod_h,                              // llvm.mips.pckod.h
   2931     mips_pckod_w,                              // llvm.mips.pckod.w
   2932     mips_pcnt_b,                               // llvm.mips.pcnt.b
   2933     mips_pcnt_d,                               // llvm.mips.pcnt.d
   2934     mips_pcnt_h,                               // llvm.mips.pcnt.h
   2935     mips_pcnt_w,                               // llvm.mips.pcnt.w
   2936     mips_pick_ph,                              // llvm.mips.pick.ph
   2937     mips_pick_qb,                              // llvm.mips.pick.qb
   2938     mips_preceq_w_phl,                         // llvm.mips.preceq.w.phl
   2939     mips_preceq_w_phr,                         // llvm.mips.preceq.w.phr
   2940     mips_precequ_ph_qbl,                       // llvm.mips.precequ.ph.qbl
   2941     mips_precequ_ph_qbla,                      // llvm.mips.precequ.ph.qbla
   2942     mips_precequ_ph_qbr,                       // llvm.mips.precequ.ph.qbr
   2943     mips_precequ_ph_qbra,                      // llvm.mips.precequ.ph.qbra
   2944     mips_preceu_ph_qbl,                        // llvm.mips.preceu.ph.qbl
   2945     mips_preceu_ph_qbla,                       // llvm.mips.preceu.ph.qbla
   2946     mips_preceu_ph_qbr,                        // llvm.mips.preceu.ph.qbr
   2947     mips_preceu_ph_qbra,                       // llvm.mips.preceu.ph.qbra
   2948     mips_precr_qb_ph,                          // llvm.mips.precr.qb.ph
   2949     mips_precr_sra_ph_w,                       // llvm.mips.precr.sra.ph.w
   2950     mips_precr_sra_r_ph_w,                     // llvm.mips.precr.sra.r.ph.w
   2951     mips_precrq_ph_w,                          // llvm.mips.precrq.ph.w
   2952     mips_precrq_qb_ph,                         // llvm.mips.precrq.qb.ph
   2953     mips_precrq_rs_ph_w,                       // llvm.mips.precrq.rs.ph.w
   2954     mips_precrqu_s_qb_ph,                      // llvm.mips.precrqu.s.qb.ph
   2955     mips_prepend,                              // llvm.mips.prepend
   2956     mips_raddu_w_qb,                           // llvm.mips.raddu.w.qb
   2957     mips_rddsp,                                // llvm.mips.rddsp
   2958     mips_repl_ph,                              // llvm.mips.repl.ph
   2959     mips_repl_qb,                              // llvm.mips.repl.qb
   2960     mips_sat_s_b,                              // llvm.mips.sat.s.b
   2961     mips_sat_s_d,                              // llvm.mips.sat.s.d
   2962     mips_sat_s_h,                              // llvm.mips.sat.s.h
   2963     mips_sat_s_w,                              // llvm.mips.sat.s.w
   2964     mips_sat_u_b,                              // llvm.mips.sat.u.b
   2965     mips_sat_u_d,                              // llvm.mips.sat.u.d
   2966     mips_sat_u_h,                              // llvm.mips.sat.u.h
   2967     mips_sat_u_w,                              // llvm.mips.sat.u.w
   2968     mips_shf_b,                                // llvm.mips.shf.b
   2969     mips_shf_h,                                // llvm.mips.shf.h
   2970     mips_shf_w,                                // llvm.mips.shf.w
   2971     mips_shilo,                                // llvm.mips.shilo
   2972     mips_shll_ph,                              // llvm.mips.shll.ph
   2973     mips_shll_qb,                              // llvm.mips.shll.qb
   2974     mips_shll_s_ph,                            // llvm.mips.shll.s.ph
   2975     mips_shll_s_w,                             // llvm.mips.shll.s.w
   2976     mips_shra_ph,                              // llvm.mips.shra.ph
   2977     mips_shra_qb,                              // llvm.mips.shra.qb
   2978     mips_shra_r_ph,                            // llvm.mips.shra.r.ph
   2979     mips_shra_r_qb,                            // llvm.mips.shra.r.qb
   2980     mips_shra_r_w,                             // llvm.mips.shra.r.w
   2981     mips_shrl_ph,                              // llvm.mips.shrl.ph
   2982     mips_shrl_qb,                              // llvm.mips.shrl.qb
   2983     mips_sld_b,                                // llvm.mips.sld.b
   2984     mips_sld_d,                                // llvm.mips.sld.d
   2985     mips_sld_h,                                // llvm.mips.sld.h
   2986     mips_sld_w,                                // llvm.mips.sld.w
   2987     mips_sldi_b,                               // llvm.mips.sldi.b
   2988     mips_sldi_d,                               // llvm.mips.sldi.d
   2989     mips_sldi_h,                               // llvm.mips.sldi.h
   2990     mips_sldi_w,                               // llvm.mips.sldi.w
   2991     mips_sll_b,                                // llvm.mips.sll.b
   2992     mips_sll_d,                                // llvm.mips.sll.d
   2993     mips_sll_h,                                // llvm.mips.sll.h
   2994     mips_sll_w,                                // llvm.mips.sll.w
   2995     mips_slli_b,                               // llvm.mips.slli.b
   2996     mips_slli_d,                               // llvm.mips.slli.d
   2997     mips_slli_h,                               // llvm.mips.slli.h
   2998     mips_slli_w,                               // llvm.mips.slli.w
   2999     mips_splat_b,                              // llvm.mips.splat.b
   3000     mips_splat_d,                              // llvm.mips.splat.d
   3001     mips_splat_h,                              // llvm.mips.splat.h
   3002     mips_splat_w,                              // llvm.mips.splat.w
   3003     mips_splati_b,                             // llvm.mips.splati.b
   3004     mips_splati_d,                             // llvm.mips.splati.d
   3005     mips_splati_h,                             // llvm.mips.splati.h
   3006     mips_splati_w,                             // llvm.mips.splati.w
   3007     mips_sra_b,                                // llvm.mips.sra.b
   3008     mips_sra_d,                                // llvm.mips.sra.d
   3009     mips_sra_h,                                // llvm.mips.sra.h
   3010     mips_sra_w,                                // llvm.mips.sra.w
   3011     mips_srai_b,                               // llvm.mips.srai.b
   3012     mips_srai_d,                               // llvm.mips.srai.d
   3013     mips_srai_h,                               // llvm.mips.srai.h
   3014     mips_srai_w,                               // llvm.mips.srai.w
   3015     mips_srar_b,                               // llvm.mips.srar.b
   3016     mips_srar_d,                               // llvm.mips.srar.d
   3017     mips_srar_h,                               // llvm.mips.srar.h
   3018     mips_srar_w,                               // llvm.mips.srar.w
   3019     mips_srari_b,                              // llvm.mips.srari.b
   3020     mips_srari_d,                              // llvm.mips.srari.d
   3021     mips_srari_h,                              // llvm.mips.srari.h
   3022     mips_srari_w,                              // llvm.mips.srari.w
   3023     mips_srl_b,                                // llvm.mips.srl.b
   3024     mips_srl_d,                                // llvm.mips.srl.d
   3025     mips_srl_h,                                // llvm.mips.srl.h
   3026     mips_srl_w,                                // llvm.mips.srl.w
   3027     mips_srli_b,                               // llvm.mips.srli.b
   3028     mips_srli_d,                               // llvm.mips.srli.d
   3029     mips_srli_h,                               // llvm.mips.srli.h
   3030     mips_srli_w,                               // llvm.mips.srli.w
   3031     mips_srlr_b,                               // llvm.mips.srlr.b
   3032     mips_srlr_d,                               // llvm.mips.srlr.d
   3033     mips_srlr_h,                               // llvm.mips.srlr.h
   3034     mips_srlr_w,                               // llvm.mips.srlr.w
   3035     mips_srlri_b,                              // llvm.mips.srlri.b
   3036     mips_srlri_d,                              // llvm.mips.srlri.d
   3037     mips_srlri_h,                              // llvm.mips.srlri.h
   3038     mips_srlri_w,                              // llvm.mips.srlri.w
   3039     mips_st_b,                                 // llvm.mips.st.b
   3040     mips_st_d,                                 // llvm.mips.st.d
   3041     mips_st_h,                                 // llvm.mips.st.h
   3042     mips_st_w,                                 // llvm.mips.st.w
   3043     mips_subq_ph,                              // llvm.mips.subq.ph
   3044     mips_subq_s_ph,                            // llvm.mips.subq.s.ph
   3045     mips_subq_s_w,                             // llvm.mips.subq.s.w
   3046     mips_subqh_ph,                             // llvm.mips.subqh.ph
   3047     mips_subqh_r_ph,                           // llvm.mips.subqh.r.ph
   3048     mips_subqh_r_w,                            // llvm.mips.subqh.r.w
   3049     mips_subqh_w,                              // llvm.mips.subqh.w
   3050     mips_subs_s_b,                             // llvm.mips.subs.s.b
   3051     mips_subs_s_d,                             // llvm.mips.subs.s.d
   3052     mips_subs_s_h,                             // llvm.mips.subs.s.h
   3053     mips_subs_s_w,                             // llvm.mips.subs.s.w
   3054     mips_subs_u_b,                             // llvm.mips.subs.u.b
   3055     mips_subs_u_d,                             // llvm.mips.subs.u.d
   3056     mips_subs_u_h,                             // llvm.mips.subs.u.h
   3057     mips_subs_u_w,                             // llvm.mips.subs.u.w
   3058     mips_subsus_u_b,                           // llvm.mips.subsus.u.b
   3059     mips_subsus_u_d,                           // llvm.mips.subsus.u.d
   3060     mips_subsus_u_h,                           // llvm.mips.subsus.u.h
   3061     mips_subsus_u_w,                           // llvm.mips.subsus.u.w
   3062     mips_subsuu_s_b,                           // llvm.mips.subsuu.s.b
   3063     mips_subsuu_s_d,                           // llvm.mips.subsuu.s.d
   3064     mips_subsuu_s_h,                           // llvm.mips.subsuu.s.h
   3065     mips_subsuu_s_w,                           // llvm.mips.subsuu.s.w
   3066     mips_subu_ph,                              // llvm.mips.subu.ph
   3067     mips_subu_qb,                              // llvm.mips.subu.qb
   3068     mips_subu_s_ph,                            // llvm.mips.subu.s.ph
   3069     mips_subu_s_qb,                            // llvm.mips.subu.s.qb
   3070     mips_subuh_qb,                             // llvm.mips.subuh.qb
   3071     mips_subuh_r_qb,                           // llvm.mips.subuh.r.qb
   3072     mips_subv_b,                               // llvm.mips.subv.b
   3073     mips_subv_d,                               // llvm.mips.subv.d
   3074     mips_subv_h,                               // llvm.mips.subv.h
   3075     mips_subv_w,                               // llvm.mips.subv.w
   3076     mips_subvi_b,                              // llvm.mips.subvi.b
   3077     mips_subvi_d,                              // llvm.mips.subvi.d
   3078     mips_subvi_h,                              // llvm.mips.subvi.h
   3079     mips_subvi_w,                              // llvm.mips.subvi.w
   3080     mips_vshf_b,                               // llvm.mips.vshf.b
   3081     mips_vshf_d,                               // llvm.mips.vshf.d
   3082     mips_vshf_h,                               // llvm.mips.vshf.h
   3083     mips_vshf_w,                               // llvm.mips.vshf.w
   3084     mips_wrdsp,                                // llvm.mips.wrdsp
   3085     mips_xor_v,                                // llvm.mips.xor.v
   3086     mips_xori_b,                               // llvm.mips.xori.b
   3087     nvvm_add_rm_d,                             // llvm.nvvm.add.rm.d
   3088     nvvm_add_rm_f,                             // llvm.nvvm.add.rm.f
   3089     nvvm_add_rm_ftz_f,                         // llvm.nvvm.add.rm.ftz.f
   3090     nvvm_add_rn_d,                             // llvm.nvvm.add.rn.d
   3091     nvvm_add_rn_f,                             // llvm.nvvm.add.rn.f
   3092     nvvm_add_rn_ftz_f,                         // llvm.nvvm.add.rn.ftz.f
   3093     nvvm_add_rp_d,                             // llvm.nvvm.add.rp.d
   3094     nvvm_add_rp_f,                             // llvm.nvvm.add.rp.f
   3095     nvvm_add_rp_ftz_f,                         // llvm.nvvm.add.rp.ftz.f
   3096     nvvm_add_rz_d,                             // llvm.nvvm.add.rz.d
   3097     nvvm_add_rz_f,                             // llvm.nvvm.add.rz.f
   3098     nvvm_add_rz_ftz_f,                         // llvm.nvvm.add.rz.ftz.f
   3099     nvvm_atomic_add_gen_f_cta,                 // llvm.nvvm.atomic.add.gen.f.cta
   3100     nvvm_atomic_add_gen_f_sys,                 // llvm.nvvm.atomic.add.gen.f.sys
   3101     nvvm_atomic_add_gen_i_cta,                 // llvm.nvvm.atomic.add.gen.i.cta
   3102     nvvm_atomic_add_gen_i_sys,                 // llvm.nvvm.atomic.add.gen.i.sys
   3103     nvvm_atomic_and_gen_i_cta,                 // llvm.nvvm.atomic.and.gen.i.cta
   3104     nvvm_atomic_and_gen_i_sys,                 // llvm.nvvm.atomic.and.gen.i.sys
   3105     nvvm_atomic_cas_gen_i_cta,                 // llvm.nvvm.atomic.cas.gen.i.cta
   3106     nvvm_atomic_cas_gen_i_sys,                 // llvm.nvvm.atomic.cas.gen.i.sys
   3107     nvvm_atomic_dec_gen_i_cta,                 // llvm.nvvm.atomic.dec.gen.i.cta
   3108     nvvm_atomic_dec_gen_i_sys,                 // llvm.nvvm.atomic.dec.gen.i.sys
   3109     nvvm_atomic_exch_gen_i_cta,                // llvm.nvvm.atomic.exch.gen.i.cta
   3110     nvvm_atomic_exch_gen_i_sys,                // llvm.nvvm.atomic.exch.gen.i.sys
   3111     nvvm_atomic_inc_gen_i_cta,                 // llvm.nvvm.atomic.inc.gen.i.cta
   3112     nvvm_atomic_inc_gen_i_sys,                 // llvm.nvvm.atomic.inc.gen.i.sys
   3113     nvvm_atomic_load_add_f32,                  // llvm.nvvm.atomic.load.add.f32
   3114     nvvm_atomic_load_dec_32,                   // llvm.nvvm.atomic.load.dec.32
   3115     nvvm_atomic_load_inc_32,                   // llvm.nvvm.atomic.load.inc.32
   3116     nvvm_atomic_max_gen_i_cta,                 // llvm.nvvm.atomic.max.gen.i.cta
   3117     nvvm_atomic_max_gen_i_sys,                 // llvm.nvvm.atomic.max.gen.i.sys
   3118     nvvm_atomic_min_gen_i_cta,                 // llvm.nvvm.atomic.min.gen.i.cta
   3119     nvvm_atomic_min_gen_i_sys,                 // llvm.nvvm.atomic.min.gen.i.sys
   3120     nvvm_atomic_or_gen_i_cta,                  // llvm.nvvm.atomic.or.gen.i.cta
   3121     nvvm_atomic_or_gen_i_sys,                  // llvm.nvvm.atomic.or.gen.i.sys
   3122     nvvm_atomic_xor_gen_i_cta,                 // llvm.nvvm.atomic.xor.gen.i.cta
   3123     nvvm_atomic_xor_gen_i_sys,                 // llvm.nvvm.atomic.xor.gen.i.sys
   3124     nvvm_bar_sync,                             // llvm.nvvm.bar.sync
   3125     nvvm_bar_warp_sync,                        // llvm.nvvm.bar.warp.sync
   3126     nvvm_barrier,                              // llvm.nvvm.barrier
   3127     nvvm_barrier_n,                            // llvm.nvvm.barrier.n
   3128     nvvm_barrier_sync,                         // llvm.nvvm.barrier.sync
   3129     nvvm_barrier_sync_cnt,                     // llvm.nvvm.barrier.sync.cnt
   3130     nvvm_barrier0,                             // llvm.nvvm.barrier0
   3131     nvvm_barrier0_and,                         // llvm.nvvm.barrier0.and
   3132     nvvm_barrier0_or,                          // llvm.nvvm.barrier0.or
   3133     nvvm_barrier0_popc,                        // llvm.nvvm.barrier0.popc
   3134     nvvm_bitcast_d2ll,                         // llvm.nvvm.bitcast.d2ll
   3135     nvvm_bitcast_f2i,                          // llvm.nvvm.bitcast.f2i
   3136     nvvm_bitcast_i2f,                          // llvm.nvvm.bitcast.i2f
   3137     nvvm_bitcast_ll2d,                         // llvm.nvvm.bitcast.ll2d
   3138     nvvm_ceil_d,                               // llvm.nvvm.ceil.d
   3139     nvvm_ceil_f,                               // llvm.nvvm.ceil.f
   3140     nvvm_ceil_ftz_f,                           // llvm.nvvm.ceil.ftz.f
   3141     nvvm_compiler_error,                       // llvm.nvvm.compiler.error
   3142     nvvm_compiler_warn,                        // llvm.nvvm.compiler.warn
   3143     nvvm_cos_approx_f,                         // llvm.nvvm.cos.approx.f
   3144     nvvm_cos_approx_ftz_f,                     // llvm.nvvm.cos.approx.ftz.f
   3145     nvvm_d2f_rm,                               // llvm.nvvm.d2f.rm
   3146     nvvm_d2f_rm_ftz,                           // llvm.nvvm.d2f.rm.ftz
   3147     nvvm_d2f_rn,                               // llvm.nvvm.d2f.rn
   3148     nvvm_d2f_rn_ftz,                           // llvm.nvvm.d2f.rn.ftz
   3149     nvvm_d2f_rp,                               // llvm.nvvm.d2f.rp
   3150     nvvm_d2f_rp_ftz,                           // llvm.nvvm.d2f.rp.ftz
   3151     nvvm_d2f_rz,                               // llvm.nvvm.d2f.rz
   3152     nvvm_d2f_rz_ftz,                           // llvm.nvvm.d2f.rz.ftz
   3153     nvvm_d2i_hi,                               // llvm.nvvm.d2i.hi
   3154     nvvm_d2i_lo,                               // llvm.nvvm.d2i.lo
   3155     nvvm_d2i_rm,                               // llvm.nvvm.d2i.rm
   3156     nvvm_d2i_rn,                               // llvm.nvvm.d2i.rn
   3157     nvvm_d2i_rp,                               // llvm.nvvm.d2i.rp
   3158     nvvm_d2i_rz,                               // llvm.nvvm.d2i.rz
   3159     nvvm_d2ll_rm,                              // llvm.nvvm.d2ll.rm
   3160     nvvm_d2ll_rn,                              // llvm.nvvm.d2ll.rn
   3161     nvvm_d2ll_rp,                              // llvm.nvvm.d2ll.rp
   3162     nvvm_d2ll_rz,                              // llvm.nvvm.d2ll.rz
   3163     nvvm_d2ui_rm,                              // llvm.nvvm.d2ui.rm
   3164     nvvm_d2ui_rn,                              // llvm.nvvm.d2ui.rn
   3165     nvvm_d2ui_rp,                              // llvm.nvvm.d2ui.rp
   3166     nvvm_d2ui_rz,                              // llvm.nvvm.d2ui.rz
   3167     nvvm_d2ull_rm,                             // llvm.nvvm.d2ull.rm
   3168     nvvm_d2ull_rn,                             // llvm.nvvm.d2ull.rn
   3169     nvvm_d2ull_rp,                             // llvm.nvvm.d2ull.rp
   3170     nvvm_d2ull_rz,                             // llvm.nvvm.d2ull.rz
   3171     nvvm_div_approx_f,                         // llvm.nvvm.div.approx.f
   3172     nvvm_div_approx_ftz_f,                     // llvm.nvvm.div.approx.ftz.f
   3173     nvvm_div_rm_d,                             // llvm.nvvm.div.rm.d
   3174     nvvm_div_rm_f,                             // llvm.nvvm.div.rm.f
   3175     nvvm_div_rm_ftz_f,                         // llvm.nvvm.div.rm.ftz.f
   3176     nvvm_div_rn_d,                             // llvm.nvvm.div.rn.d
   3177     nvvm_div_rn_f,                             // llvm.nvvm.div.rn.f
   3178     nvvm_div_rn_ftz_f,                         // llvm.nvvm.div.rn.ftz.f
   3179     nvvm_div_rp_d,                             // llvm.nvvm.div.rp.d
   3180     nvvm_div_rp_f,                             // llvm.nvvm.div.rp.f
   3181     nvvm_div_rp_ftz_f,                         // llvm.nvvm.div.rp.ftz.f
   3182     nvvm_div_rz_d,                             // llvm.nvvm.div.rz.d
   3183     nvvm_div_rz_f,                             // llvm.nvvm.div.rz.f
   3184     nvvm_div_rz_ftz_f,                         // llvm.nvvm.div.rz.ftz.f
   3185     nvvm_ex2_approx_d,                         // llvm.nvvm.ex2.approx.d
   3186     nvvm_ex2_approx_f,                         // llvm.nvvm.ex2.approx.f
   3187     nvvm_ex2_approx_ftz_f,                     // llvm.nvvm.ex2.approx.ftz.f
   3188     nvvm_f2h_rn,                               // llvm.nvvm.f2h.rn
   3189     nvvm_f2h_rn_ftz,                           // llvm.nvvm.f2h.rn.ftz
   3190     nvvm_f2i_rm,                               // llvm.nvvm.f2i.rm
   3191     nvvm_f2i_rm_ftz,                           // llvm.nvvm.f2i.rm.ftz
   3192     nvvm_f2i_rn,                               // llvm.nvvm.f2i.rn
   3193     nvvm_f2i_rn_ftz,                           // llvm.nvvm.f2i.rn.ftz
   3194     nvvm_f2i_rp,                               // llvm.nvvm.f2i.rp
   3195     nvvm_f2i_rp_ftz,                           // llvm.nvvm.f2i.rp.ftz
   3196     nvvm_f2i_rz,                               // llvm.nvvm.f2i.rz
   3197     nvvm_f2i_rz_ftz,                           // llvm.nvvm.f2i.rz.ftz
   3198     nvvm_f2ll_rm,                              // llvm.nvvm.f2ll.rm
   3199     nvvm_f2ll_rm_ftz,                          // llvm.nvvm.f2ll.rm.ftz
   3200     nvvm_f2ll_rn,                              // llvm.nvvm.f2ll.rn
   3201     nvvm_f2ll_rn_ftz,                          // llvm.nvvm.f2ll.rn.ftz
   3202     nvvm_f2ll_rp,                              // llvm.nvvm.f2ll.rp
   3203     nvvm_f2ll_rp_ftz,                          // llvm.nvvm.f2ll.rp.ftz
   3204     nvvm_f2ll_rz,                              // llvm.nvvm.f2ll.rz
   3205     nvvm_f2ll_rz_ftz,                          // llvm.nvvm.f2ll.rz.ftz
   3206     nvvm_f2ui_rm,                              // llvm.nvvm.f2ui.rm
   3207     nvvm_f2ui_rm_ftz,                          // llvm.nvvm.f2ui.rm.ftz
   3208     nvvm_f2ui_rn,                              // llvm.nvvm.f2ui.rn
   3209     nvvm_f2ui_rn_ftz,                          // llvm.nvvm.f2ui.rn.ftz
   3210     nvvm_f2ui_rp,                              // llvm.nvvm.f2ui.rp
   3211     nvvm_f2ui_rp_ftz,                          // llvm.nvvm.f2ui.rp.ftz
   3212     nvvm_f2ui_rz,                              // llvm.nvvm.f2ui.rz
   3213     nvvm_f2ui_rz_ftz,                          // llvm.nvvm.f2ui.rz.ftz
   3214     nvvm_f2ull_rm,                             // llvm.nvvm.f2ull.rm
   3215     nvvm_f2ull_rm_ftz,                         // llvm.nvvm.f2ull.rm.ftz
   3216     nvvm_f2ull_rn,                             // llvm.nvvm.f2ull.rn
   3217     nvvm_f2ull_rn_ftz,                         // llvm.nvvm.f2ull.rn.ftz
   3218     nvvm_f2ull_rp,                             // llvm.nvvm.f2ull.rp
   3219     nvvm_f2ull_rp_ftz,                         // llvm.nvvm.f2ull.rp.ftz
   3220     nvvm_f2ull_rz,                             // llvm.nvvm.f2ull.rz
   3221     nvvm_f2ull_rz_ftz,                         // llvm.nvvm.f2ull.rz.ftz
   3222     nvvm_fabs_d,                               // llvm.nvvm.fabs.d
   3223     nvvm_fabs_f,                               // llvm.nvvm.fabs.f
   3224     nvvm_fabs_ftz_f,                           // llvm.nvvm.fabs.ftz.f
   3225     nvvm_floor_d,                              // llvm.nvvm.floor.d
   3226     nvvm_floor_f,                              // llvm.nvvm.floor.f
   3227     nvvm_floor_ftz_f,                          // llvm.nvvm.floor.ftz.f
   3228     nvvm_fma_rm_d,                             // llvm.nvvm.fma.rm.d
   3229     nvvm_fma_rm_f,                             // llvm.nvvm.fma.rm.f
   3230     nvvm_fma_rm_ftz_f,                         // llvm.nvvm.fma.rm.ftz.f
   3231     nvvm_fma_rn_d,                             // llvm.nvvm.fma.rn.d
   3232     nvvm_fma_rn_f,                             // llvm.nvvm.fma.rn.f
   3233     nvvm_fma_rn_ftz_f,                         // llvm.nvvm.fma.rn.ftz.f
   3234     nvvm_fma_rp_d,                             // llvm.nvvm.fma.rp.d
   3235     nvvm_fma_rp_f,                             // llvm.nvvm.fma.rp.f
   3236     nvvm_fma_rp_ftz_f,                         // llvm.nvvm.fma.rp.ftz.f
   3237     nvvm_fma_rz_d,                             // llvm.nvvm.fma.rz.d
   3238     nvvm_fma_rz_f,                             // llvm.nvvm.fma.rz.f
   3239     nvvm_fma_rz_ftz_f,                         // llvm.nvvm.fma.rz.ftz.f
   3240     nvvm_fmax_d,                               // llvm.nvvm.fmax.d
   3241     nvvm_fmax_f,                               // llvm.nvvm.fmax.f
   3242     nvvm_fmax_ftz_f,                           // llvm.nvvm.fmax.ftz.f
   3243     nvvm_fmin_d,                               // llvm.nvvm.fmin.d
   3244     nvvm_fmin_f,                               // llvm.nvvm.fmin.f
   3245     nvvm_fmin_ftz_f,                           // llvm.nvvm.fmin.ftz.f
   3246     nvvm_i2d_rm,                               // llvm.nvvm.i2d.rm
   3247     nvvm_i2d_rn,                               // llvm.nvvm.i2d.rn
   3248     nvvm_i2d_rp,                               // llvm.nvvm.i2d.rp
   3249     nvvm_i2d_rz,                               // llvm.nvvm.i2d.rz
   3250     nvvm_i2f_rm,                               // llvm.nvvm.i2f.rm
   3251     nvvm_i2f_rn,                               // llvm.nvvm.i2f.rn
   3252     nvvm_i2f_rp,                               // llvm.nvvm.i2f.rp
   3253     nvvm_i2f_rz,                               // llvm.nvvm.i2f.rz
   3254     nvvm_isspacep_const,                       // llvm.nvvm.isspacep.const
   3255     nvvm_isspacep_global,                      // llvm.nvvm.isspacep.global
   3256     nvvm_isspacep_local,                       // llvm.nvvm.isspacep.local
   3257     nvvm_isspacep_shared,                      // llvm.nvvm.isspacep.shared
   3258     nvvm_istypep_sampler,                      // llvm.nvvm.istypep.sampler
   3259     nvvm_istypep_surface,                      // llvm.nvvm.istypep.surface
   3260     nvvm_istypep_texture,                      // llvm.nvvm.istypep.texture
   3261     nvvm_ldg_global_f,                         // llvm.nvvm.ldg.global.f
   3262     nvvm_ldg_global_i,                         // llvm.nvvm.ldg.global.i
   3263     nvvm_ldg_global_p,                         // llvm.nvvm.ldg.global.p
   3264     nvvm_ldu_global_f,                         // llvm.nvvm.ldu.global.f
   3265     nvvm_ldu_global_i,                         // llvm.nvvm.ldu.global.i
   3266     nvvm_ldu_global_p,                         // llvm.nvvm.ldu.global.p
   3267     nvvm_lg2_approx_d,                         // llvm.nvvm.lg2.approx.d
   3268     nvvm_lg2_approx_f,                         // llvm.nvvm.lg2.approx.f
   3269     nvvm_lg2_approx_ftz_f,                     // llvm.nvvm.lg2.approx.ftz.f
   3270     nvvm_ll2d_rm,                              // llvm.nvvm.ll2d.rm
   3271     nvvm_ll2d_rn,                              // llvm.nvvm.ll2d.rn
   3272     nvvm_ll2d_rp,                              // llvm.nvvm.ll2d.rp
   3273     nvvm_ll2d_rz,                              // llvm.nvvm.ll2d.rz
   3274     nvvm_ll2f_rm,                              // llvm.nvvm.ll2f.rm
   3275     nvvm_ll2f_rn,                              // llvm.nvvm.ll2f.rn
   3276     nvvm_ll2f_rp,                              // llvm.nvvm.ll2f.rp
   3277     nvvm_ll2f_rz,                              // llvm.nvvm.ll2f.rz
   3278     nvvm_lohi_i2d,                             // llvm.nvvm.lohi.i2d
   3279     nvvm_match_all_sync_i32p,                  // llvm.nvvm.match.all.sync.i32p
   3280     nvvm_match_all_sync_i64p,                  // llvm.nvvm.match.all.sync.i64p
   3281     nvvm_match_any_sync_i32,                   // llvm.nvvm.match.any.sync.i32
   3282     nvvm_match_any_sync_i64,                   // llvm.nvvm.match.any.sync.i64
   3283     nvvm_membar_cta,                           // llvm.nvvm.membar.cta
   3284     nvvm_membar_gl,                            // llvm.nvvm.membar.gl
   3285     nvvm_membar_sys,                           // llvm.nvvm.membar.sys
   3286     nvvm_move_double,                          // llvm.nvvm.move.double
   3287     nvvm_move_float,                           // llvm.nvvm.move.float
   3288     nvvm_move_i16,                             // llvm.nvvm.move.i16
   3289     nvvm_move_i32,                             // llvm.nvvm.move.i32
   3290     nvvm_move_i64,                             // llvm.nvvm.move.i64
   3291     nvvm_move_ptr,                             // llvm.nvvm.move.ptr
   3292     nvvm_mul_rm_d,                             // llvm.nvvm.mul.rm.d
   3293     nvvm_mul_rm_f,                             // llvm.nvvm.mul.rm.f
   3294     nvvm_mul_rm_ftz_f,                         // llvm.nvvm.mul.rm.ftz.f
   3295     nvvm_mul_rn_d,                             // llvm.nvvm.mul.rn.d
   3296     nvvm_mul_rn_f,                             // llvm.nvvm.mul.rn.f
   3297     nvvm_mul_rn_ftz_f,                         // llvm.nvvm.mul.rn.ftz.f
   3298     nvvm_mul_rp_d,                             // llvm.nvvm.mul.rp.d
   3299     nvvm_mul_rp_f,                             // llvm.nvvm.mul.rp.f
   3300     nvvm_mul_rp_ftz_f,                         // llvm.nvvm.mul.rp.ftz.f
   3301     nvvm_mul_rz_d,                             // llvm.nvvm.mul.rz.d
   3302     nvvm_mul_rz_f,                             // llvm.nvvm.mul.rz.f
   3303     nvvm_mul_rz_ftz_f,                         // llvm.nvvm.mul.rz.ftz.f
   3304     nvvm_mul24_i,                              // llvm.nvvm.mul24.i
   3305     nvvm_mul24_ui,                             // llvm.nvvm.mul24.ui
   3306     nvvm_mulhi_i,                              // llvm.nvvm.mulhi.i
   3307     nvvm_mulhi_ll,                             // llvm.nvvm.mulhi.ll
   3308     nvvm_mulhi_ui,                             // llvm.nvvm.mulhi.ui
   3309     nvvm_mulhi_ull,                            // llvm.nvvm.mulhi.ull
   3310     nvvm_prmt,                                 // llvm.nvvm.prmt
   3311     nvvm_ptr_constant_to_gen,                  // llvm.nvvm.ptr.constant.to.gen
   3312     nvvm_ptr_gen_to_constant,                  // llvm.nvvm.ptr.gen.to.constant
   3313     nvvm_ptr_gen_to_global,                    // llvm.nvvm.ptr.gen.to.global
   3314     nvvm_ptr_gen_to_local,                     // llvm.nvvm.ptr.gen.to.local
   3315     nvvm_ptr_gen_to_param,                     // llvm.nvvm.ptr.gen.to.param
   3316     nvvm_ptr_gen_to_shared,                    // llvm.nvvm.ptr.gen.to.shared
   3317     nvvm_ptr_global_to_gen,                    // llvm.nvvm.ptr.global.to.gen
   3318     nvvm_ptr_local_to_gen,                     // llvm.nvvm.ptr.local.to.gen
   3319     nvvm_ptr_shared_to_gen,                    // llvm.nvvm.ptr.shared.to.gen
   3320     nvvm_rcp_approx_ftz_d,                     // llvm.nvvm.rcp.approx.ftz.d
   3321     nvvm_rcp_rm_d,                             // llvm.nvvm.rcp.rm.d
   3322     nvvm_rcp_rm_f,                             // llvm.nvvm.rcp.rm.f
   3323     nvvm_rcp_rm_ftz_f,                         // llvm.nvvm.rcp.rm.ftz.f
   3324     nvvm_rcp_rn_d,                             // llvm.nvvm.rcp.rn.d
   3325     nvvm_rcp_rn_f,                             // llvm.nvvm.rcp.rn.f
   3326     nvvm_rcp_rn_ftz_f,                         // llvm.nvvm.rcp.rn.ftz.f
   3327     nvvm_rcp_rp_d,                             // llvm.nvvm.rcp.rp.d
   3328     nvvm_rcp_rp_f,                             // llvm.nvvm.rcp.rp.f
   3329     nvvm_rcp_rp_ftz_f,                         // llvm.nvvm.rcp.rp.ftz.f
   3330     nvvm_rcp_rz_d,                             // llvm.nvvm.rcp.rz.d
   3331     nvvm_rcp_rz_f,                             // llvm.nvvm.rcp.rz.f
   3332     nvvm_rcp_rz_ftz_f,                         // llvm.nvvm.rcp.rz.ftz.f
   3333     nvvm_read_ptx_sreg_clock,                  // llvm.nvvm.read.ptx.sreg.clock
   3334     nvvm_read_ptx_sreg_clock64,                // llvm.nvvm.read.ptx.sreg.clock64
   3335     nvvm_read_ptx_sreg_ctaid_w,                // llvm.nvvm.read.ptx.sreg.ctaid.w
   3336     nvvm_read_ptx_sreg_ctaid_x,                // llvm.nvvm.read.ptx.sreg.ctaid.x
   3337     nvvm_read_ptx_sreg_ctaid_y,                // llvm.nvvm.read.ptx.sreg.ctaid.y
   3338     nvvm_read_ptx_sreg_ctaid_z,                // llvm.nvvm.read.ptx.sreg.ctaid.z
   3339     nvvm_read_ptx_sreg_envreg0,                // llvm.nvvm.read.ptx.sreg.envreg0
   3340     nvvm_read_ptx_sreg_envreg1,                // llvm.nvvm.read.ptx.sreg.envreg1
   3341     nvvm_read_ptx_sreg_envreg10,               // llvm.nvvm.read.ptx.sreg.envreg10
   3342     nvvm_read_ptx_sreg_envreg11,               // llvm.nvvm.read.ptx.sreg.envreg11
   3343     nvvm_read_ptx_sreg_envreg12,               // llvm.nvvm.read.ptx.sreg.envreg12
   3344     nvvm_read_ptx_sreg_envreg13,               // llvm.nvvm.read.ptx.sreg.envreg13
   3345     nvvm_read_ptx_sreg_envreg14,               // llvm.nvvm.read.ptx.sreg.envreg14
   3346     nvvm_read_ptx_sreg_envreg15,               // llvm.nvvm.read.ptx.sreg.envreg15
   3347     nvvm_read_ptx_sreg_envreg16,               // llvm.nvvm.read.ptx.sreg.envreg16
   3348     nvvm_read_ptx_sreg_envreg17,               // llvm.nvvm.read.ptx.sreg.envreg17
   3349     nvvm_read_ptx_sreg_envreg18,               // llvm.nvvm.read.ptx.sreg.envreg18
   3350     nvvm_read_ptx_sreg_envreg19,               // llvm.nvvm.read.ptx.sreg.envreg19
   3351     nvvm_read_ptx_sreg_envreg2,                // llvm.nvvm.read.ptx.sreg.envreg2
   3352     nvvm_read_ptx_sreg_envreg20,               // llvm.nvvm.read.ptx.sreg.envreg20
   3353     nvvm_read_ptx_sreg_envreg21,               // llvm.nvvm.read.ptx.sreg.envreg21
   3354     nvvm_read_ptx_sreg_envreg22,               // llvm.nvvm.read.ptx.sreg.envreg22
   3355     nvvm_read_ptx_sreg_envreg23,               // llvm.nvvm.read.ptx.sreg.envreg23
   3356     nvvm_read_ptx_sreg_envreg24,               // llvm.nvvm.read.ptx.sreg.envreg24
   3357     nvvm_read_ptx_sreg_envreg25,               // llvm.nvvm.read.ptx.sreg.envreg25
   3358     nvvm_read_ptx_sreg_envreg26,               // llvm.nvvm.read.ptx.sreg.envreg26
   3359     nvvm_read_ptx_sreg_envreg27,               // llvm.nvvm.read.ptx.sreg.envreg27
   3360     nvvm_read_ptx_sreg_envreg28,               // llvm.nvvm.read.ptx.sreg.envreg28
   3361     nvvm_read_ptx_sreg_envreg29,               // llvm.nvvm.read.ptx.sreg.envreg29
   3362     nvvm_read_ptx_sreg_envreg3,                // llvm.nvvm.read.ptx.sreg.envreg3
   3363     nvvm_read_ptx_sreg_envreg30,               // llvm.nvvm.read.ptx.sreg.envreg30
   3364     nvvm_read_ptx_sreg_envreg31,               // llvm.nvvm.read.ptx.sreg.envreg31
   3365     nvvm_read_ptx_sreg_envreg4,                // llvm.nvvm.read.ptx.sreg.envreg4
   3366     nvvm_read_ptx_sreg_envreg5,                // llvm.nvvm.read.ptx.sreg.envreg5
   3367     nvvm_read_ptx_sreg_envreg6,                // llvm.nvvm.read.ptx.sreg.envreg6
   3368     nvvm_read_ptx_sreg_envreg7,                // llvm.nvvm.read.ptx.sreg.envreg7
   3369     nvvm_read_ptx_sreg_envreg8,                // llvm.nvvm.read.ptx.sreg.envreg8
   3370     nvvm_read_ptx_sreg_envreg9,                // llvm.nvvm.read.ptx.sreg.envreg9
   3371     nvvm_read_ptx_sreg_gridid,                 // llvm.nvvm.read.ptx.sreg.gridid
   3372     nvvm_read_ptx_sreg_laneid,                 // llvm.nvvm.read.ptx.sreg.laneid
   3373     nvvm_read_ptx_sreg_lanemask_eq,            // llvm.nvvm.read.ptx.sreg.lanemask.eq
   3374     nvvm_read_ptx_sreg_lanemask_ge,            // llvm.nvvm.read.ptx.sreg.lanemask.ge
   3375     nvvm_read_ptx_sreg_lanemask_gt,            // llvm.nvvm.read.ptx.sreg.lanemask.gt
   3376     nvvm_read_ptx_sreg_lanemask_le,            // llvm.nvvm.read.ptx.sreg.lanemask.le
   3377     nvvm_read_ptx_sreg_lanemask_lt,            // llvm.nvvm.read.ptx.sreg.lanemask.lt
   3378     nvvm_read_ptx_sreg_nctaid_w,               // llvm.nvvm.read.ptx.sreg.nctaid.w
   3379     nvvm_read_ptx_sreg_nctaid_x,               // llvm.nvvm.read.ptx.sreg.nctaid.x
   3380     nvvm_read_ptx_sreg_nctaid_y,               // llvm.nvvm.read.ptx.sreg.nctaid.y
   3381     nvvm_read_ptx_sreg_nctaid_z,               // llvm.nvvm.read.ptx.sreg.nctaid.z
   3382     nvvm_read_ptx_sreg_nsmid,                  // llvm.nvvm.read.ptx.sreg.nsmid
   3383     nvvm_read_ptx_sreg_ntid_w,                 // llvm.nvvm.read.ptx.sreg.ntid.w
   3384     nvvm_read_ptx_sreg_ntid_x,                 // llvm.nvvm.read.ptx.sreg.ntid.x
   3385     nvvm_read_ptx_sreg_ntid_y,                 // llvm.nvvm.read.ptx.sreg.ntid.y
   3386     nvvm_read_ptx_sreg_ntid_z,                 // llvm.nvvm.read.ptx.sreg.ntid.z
   3387     nvvm_read_ptx_sreg_nwarpid,                // llvm.nvvm.read.ptx.sreg.nwarpid
   3388     nvvm_read_ptx_sreg_pm0,                    // llvm.nvvm.read.ptx.sreg.pm0
   3389     nvvm_read_ptx_sreg_pm1,                    // llvm.nvvm.read.ptx.sreg.pm1
   3390     nvvm_read_ptx_sreg_pm2,                    // llvm.nvvm.read.ptx.sreg.pm2
   3391     nvvm_read_ptx_sreg_pm3,                    // llvm.nvvm.read.ptx.sreg.pm3
   3392     nvvm_read_ptx_sreg_smid,                   // llvm.nvvm.read.ptx.sreg.smid
   3393     nvvm_read_ptx_sreg_tid_w,                  // llvm.nvvm.read.ptx.sreg.tid.w
   3394     nvvm_read_ptx_sreg_tid_x,                  // llvm.nvvm.read.ptx.sreg.tid.x
   3395     nvvm_read_ptx_sreg_tid_y,                  // llvm.nvvm.read.ptx.sreg.tid.y
   3396     nvvm_read_ptx_sreg_tid_z,                  // llvm.nvvm.read.ptx.sreg.tid.z
   3397     nvvm_read_ptx_sreg_warpid,                 // llvm.nvvm.read.ptx.sreg.warpid
   3398     nvvm_read_ptx_sreg_warpsize,               // llvm.nvvm.read.ptx.sreg.warpsize
   3399     nvvm_reflect,                              // llvm.nvvm.reflect
   3400     nvvm_rotate_b32,                           // llvm.nvvm.rotate.b32
   3401     nvvm_rotate_b64,                           // llvm.nvvm.rotate.b64
   3402     nvvm_rotate_right_b64,                     // llvm.nvvm.rotate.right.b64
   3403     nvvm_round_d,                              // llvm.nvvm.round.d
   3404     nvvm_round_f,                              // llvm.nvvm.round.f
   3405     nvvm_round_ftz_f,                          // llvm.nvvm.round.ftz.f
   3406     nvvm_rsqrt_approx_d,                       // llvm.nvvm.rsqrt.approx.d
   3407     nvvm_rsqrt_approx_f,                       // llvm.nvvm.rsqrt.approx.f
   3408     nvvm_rsqrt_approx_ftz_f,                   // llvm.nvvm.rsqrt.approx.ftz.f
   3409     nvvm_sad_i,                                // llvm.nvvm.sad.i
   3410     nvvm_sad_ui,                               // llvm.nvvm.sad.ui
   3411     nvvm_saturate_d,                           // llvm.nvvm.saturate.d
   3412     nvvm_saturate_f,                           // llvm.nvvm.saturate.f
   3413     nvvm_saturate_ftz_f,                       // llvm.nvvm.saturate.ftz.f
   3414     nvvm_shfl_bfly_f32,                        // llvm.nvvm.shfl.bfly.f32
   3415     nvvm_shfl_bfly_i32,                        // llvm.nvvm.shfl.bfly.i32
   3416     nvvm_shfl_down_f32,                        // llvm.nvvm.shfl.down.f32
   3417     nvvm_shfl_down_i32,                        // llvm.nvvm.shfl.down.i32
   3418     nvvm_shfl_idx_f32,                         // llvm.nvvm.shfl.idx.f32
   3419     nvvm_shfl_idx_i32,                         // llvm.nvvm.shfl.idx.i32
   3420     nvvm_shfl_sync_bfly_f32,                   // llvm.nvvm.shfl.sync.bfly.f32
   3421     nvvm_shfl_sync_bfly_i32,                   // llvm.nvvm.shfl.sync.bfly.i32
   3422     nvvm_shfl_sync_down_f32,                   // llvm.nvvm.shfl.sync.down.f32
   3423     nvvm_shfl_sync_down_i32,                   // llvm.nvvm.shfl.sync.down.i32
   3424     nvvm_shfl_sync_idx_f32,                    // llvm.nvvm.shfl.sync.idx.f32
   3425     nvvm_shfl_sync_idx_i32,                    // llvm.nvvm.shfl.sync.idx.i32
   3426     nvvm_shfl_sync_up_f32,                     // llvm.nvvm.shfl.sync.up.f32
   3427     nvvm_shfl_sync_up_i32,                     // llvm.nvvm.shfl.sync.up.i32
   3428     nvvm_shfl_up_f32,                          // llvm.nvvm.shfl.up.f32
   3429     nvvm_shfl_up_i32,                          // llvm.nvvm.shfl.up.i32
   3430     nvvm_sin_approx_f,                         // llvm.nvvm.sin.approx.f
   3431     nvvm_sin_approx_ftz_f,                     // llvm.nvvm.sin.approx.ftz.f
   3432     nvvm_sqrt_approx_f,                        // llvm.nvvm.sqrt.approx.f
   3433     nvvm_sqrt_approx_ftz_f,                    // llvm.nvvm.sqrt.approx.ftz.f
   3434     nvvm_sqrt_f,                               // llvm.nvvm.sqrt.f
   3435     nvvm_sqrt_rm_d,                            // llvm.nvvm.sqrt.rm.d
   3436     nvvm_sqrt_rm_f,                            // llvm.nvvm.sqrt.rm.f
   3437     nvvm_sqrt_rm_ftz_f,                        // llvm.nvvm.sqrt.rm.ftz.f
   3438     nvvm_sqrt_rn_d,                            // llvm.nvvm.sqrt.rn.d
   3439     nvvm_sqrt_rn_f,                            // llvm.nvvm.sqrt.rn.f
   3440     nvvm_sqrt_rn_ftz_f,                        // llvm.nvvm.sqrt.rn.ftz.f
   3441     nvvm_sqrt_rp_d,                            // llvm.nvvm.sqrt.rp.d
   3442     nvvm_sqrt_rp_f,                            // llvm.nvvm.sqrt.rp.f
   3443     nvvm_sqrt_rp_ftz_f,                        // llvm.nvvm.sqrt.rp.ftz.f
   3444     nvvm_sqrt_rz_d,                            // llvm.nvvm.sqrt.rz.d
   3445     nvvm_sqrt_rz_f,                            // llvm.nvvm.sqrt.rz.f
   3446     nvvm_sqrt_rz_ftz_f,                        // llvm.nvvm.sqrt.rz.ftz.f
   3447     nvvm_suld_1d_array_i16_clamp,              // llvm.nvvm.suld.1d.array.i16.clamp
   3448     nvvm_suld_1d_array_i16_trap,               // llvm.nvvm.suld.1d.array.i16.trap
   3449     nvvm_suld_1d_array_i16_zero,               // llvm.nvvm.suld.1d.array.i16.zero
   3450     nvvm_suld_1d_array_i32_clamp,              // llvm.nvvm.suld.1d.array.i32.clamp
   3451     nvvm_suld_1d_array_i32_trap,               // llvm.nvvm.suld.1d.array.i32.trap
   3452     nvvm_suld_1d_array_i32_zero,               // llvm.nvvm.suld.1d.array.i32.zero
   3453     nvvm_suld_1d_array_i64_clamp,              // llvm.nvvm.suld.1d.array.i64.clamp
   3454     nvvm_suld_1d_array_i64_trap,               // llvm.nvvm.suld.1d.array.i64.trap
   3455     nvvm_suld_1d_array_i64_zero,               // llvm.nvvm.suld.1d.array.i64.zero
   3456     nvvm_suld_1d_array_i8_clamp,               // llvm.nvvm.suld.1d.array.i8.clamp
   3457     nvvm_suld_1d_array_i8_trap,                // llvm.nvvm.suld.1d.array.i8.trap
   3458     nvvm_suld_1d_array_i8_zero,                // llvm.nvvm.suld.1d.array.i8.zero
   3459     nvvm_suld_1d_array_v2i16_clamp,            // llvm.nvvm.suld.1d.array.v2i16.clamp
   3460     nvvm_suld_1d_array_v2i16_trap,             // llvm.nvvm.suld.1d.array.v2i16.trap
   3461     nvvm_suld_1d_array_v2i16_zero,             // llvm.nvvm.suld.1d.array.v2i16.zero
   3462     nvvm_suld_1d_array_v2i32_clamp,            // llvm.nvvm.suld.1d.array.v2i32.clamp
   3463     nvvm_suld_1d_array_v2i32_trap,             // llvm.nvvm.suld.1d.array.v2i32.trap
   3464     nvvm_suld_1d_array_v2i32_zero,             // llvm.nvvm.suld.1d.array.v2i32.zero
   3465     nvvm_suld_1d_array_v2i64_clamp,            // llvm.nvvm.suld.1d.array.v2i64.clamp
   3466     nvvm_suld_1d_array_v2i64_trap,             // llvm.nvvm.suld.1d.array.v2i64.trap
   3467     nvvm_suld_1d_array_v2i64_zero,             // llvm.nvvm.suld.1d.array.v2i64.zero
   3468     nvvm_suld_1d_array_v2i8_clamp,             // llvm.nvvm.suld.1d.array.v2i8.clamp
   3469     nvvm_suld_1d_array_v2i8_trap,              // llvm.nvvm.suld.1d.array.v2i8.trap
   3470     nvvm_suld_1d_array_v2i8_zero,              // llvm.nvvm.suld.1d.array.v2i8.zero
   3471     nvvm_suld_1d_array_v4i16_clamp,            // llvm.nvvm.suld.1d.array.v4i16.clamp
   3472     nvvm_suld_1d_array_v4i16_trap,             // llvm.nvvm.suld.1d.array.v4i16.trap
   3473     nvvm_suld_1d_array_v4i16_zero,             // llvm.nvvm.suld.1d.array.v4i16.zero
   3474     nvvm_suld_1d_array_v4i32_clamp,            // llvm.nvvm.suld.1d.array.v4i32.clamp
   3475     nvvm_suld_1d_array_v4i32_trap,             // llvm.nvvm.suld.1d.array.v4i32.trap
   3476     nvvm_suld_1d_array_v4i32_zero,             // llvm.nvvm.suld.1d.array.v4i32.zero
   3477     nvvm_suld_1d_array_v4i8_clamp,             // llvm.nvvm.suld.1d.array.v4i8.clamp
   3478     nvvm_suld_1d_array_v4i8_trap,              // llvm.nvvm.suld.1d.array.v4i8.trap
   3479     nvvm_suld_1d_array_v4i8_zero,              // llvm.nvvm.suld.1d.array.v4i8.zero
   3480     nvvm_suld_1d_i16_clamp,                    // llvm.nvvm.suld.1d.i16.clamp
   3481     nvvm_suld_1d_i16_trap,                     // llvm.nvvm.suld.1d.i16.trap
   3482     nvvm_suld_1d_i16_zero,                     // llvm.nvvm.suld.1d.i16.zero
   3483     nvvm_suld_1d_i32_clamp,                    // llvm.nvvm.suld.1d.i32.clamp
   3484     nvvm_suld_1d_i32_trap,                     // llvm.nvvm.suld.1d.i32.trap
   3485     nvvm_suld_1d_i32_zero,                     // llvm.nvvm.suld.1d.i32.zero
   3486     nvvm_suld_1d_i64_clamp,                    // llvm.nvvm.suld.1d.i64.clamp
   3487     nvvm_suld_1d_i64_trap,                     // llvm.nvvm.suld.1d.i64.trap
   3488     nvvm_suld_1d_i64_zero,                     // llvm.nvvm.suld.1d.i64.zero
   3489     nvvm_suld_1d_i8_clamp,                     // llvm.nvvm.suld.1d.i8.clamp
   3490     nvvm_suld_1d_i8_trap,                      // llvm.nvvm.suld.1d.i8.trap
   3491     nvvm_suld_1d_i8_zero,                      // llvm.nvvm.suld.1d.i8.zero
   3492     nvvm_suld_1d_v2i16_clamp,                  // llvm.nvvm.suld.1d.v2i16.clamp
   3493     nvvm_suld_1d_v2i16_trap,                   // llvm.nvvm.suld.1d.v2i16.trap
   3494     nvvm_suld_1d_v2i16_zero,                   // llvm.nvvm.suld.1d.v2i16.zero
   3495     nvvm_suld_1d_v2i32_clamp,                  // llvm.nvvm.suld.1d.v2i32.clamp
   3496     nvvm_suld_1d_v2i32_trap,                   // llvm.nvvm.suld.1d.v2i32.trap
   3497     nvvm_suld_1d_v2i32_zero,                   // llvm.nvvm.suld.1d.v2i32.zero
   3498     nvvm_suld_1d_v2i64_clamp,                  // llvm.nvvm.suld.1d.v2i64.clamp
   3499     nvvm_suld_1d_v2i64_trap,                   // llvm.nvvm.suld.1d.v2i64.trap
   3500     nvvm_suld_1d_v2i64_zero,                   // llvm.nvvm.suld.1d.v2i64.zero
   3501     nvvm_suld_1d_v2i8_clamp,                   // llvm.nvvm.suld.1d.v2i8.clamp
   3502     nvvm_suld_1d_v2i8_trap,                    // llvm.nvvm.suld.1d.v2i8.trap
   3503     nvvm_suld_1d_v2i8_zero,                    // llvm.nvvm.suld.1d.v2i8.zero
   3504     nvvm_suld_1d_v4i16_clamp,                  // llvm.nvvm.suld.1d.v4i16.clamp
   3505     nvvm_suld_1d_v4i16_trap,                   // llvm.nvvm.suld.1d.v4i16.trap
   3506     nvvm_suld_1d_v4i16_zero,                   // llvm.nvvm.suld.1d.v4i16.zero
   3507     nvvm_suld_1d_v4i32_clamp,                  // llvm.nvvm.suld.1d.v4i32.clamp
   3508     nvvm_suld_1d_v4i32_trap,                   // llvm.nvvm.suld.1d.v4i32.trap
   3509     nvvm_suld_1d_v4i32_zero,                   // llvm.nvvm.suld.1d.v4i32.zero
   3510     nvvm_suld_1d_v4i8_clamp,                   // llvm.nvvm.suld.1d.v4i8.clamp
   3511     nvvm_suld_1d_v4i8_trap,                    // llvm.nvvm.suld.1d.v4i8.trap
   3512     nvvm_suld_1d_v4i8_zero,                    // llvm.nvvm.suld.1d.v4i8.zero
   3513     nvvm_suld_2d_array_i16_clamp,              // llvm.nvvm.suld.2d.array.i16.clamp
   3514     nvvm_suld_2d_array_i16_trap,               // llvm.nvvm.suld.2d.array.i16.trap
   3515     nvvm_suld_2d_array_i16_zero,               // llvm.nvvm.suld.2d.array.i16.zero
   3516     nvvm_suld_2d_array_i32_clamp,              // llvm.nvvm.suld.2d.array.i32.clamp
   3517     nvvm_suld_2d_array_i32_trap,               // llvm.nvvm.suld.2d.array.i32.trap
   3518     nvvm_suld_2d_array_i32_zero,               // llvm.nvvm.suld.2d.array.i32.zero
   3519     nvvm_suld_2d_array_i64_clamp,              // llvm.nvvm.suld.2d.array.i64.clamp
   3520     nvvm_suld_2d_array_i64_trap,               // llvm.nvvm.suld.2d.array.i64.trap
   3521     nvvm_suld_2d_array_i64_zero,               // llvm.nvvm.suld.2d.array.i64.zero
   3522     nvvm_suld_2d_array_i8_clamp,               // llvm.nvvm.suld.2d.array.i8.clamp
   3523     nvvm_suld_2d_array_i8_trap,                // llvm.nvvm.suld.2d.array.i8.trap
   3524     nvvm_suld_2d_array_i8_zero,                // llvm.nvvm.suld.2d.array.i8.zero
   3525     nvvm_suld_2d_array_v2i16_clamp,            // llvm.nvvm.suld.2d.array.v2i16.clamp
   3526     nvvm_suld_2d_array_v2i16_trap,             // llvm.nvvm.suld.2d.array.v2i16.trap
   3527     nvvm_suld_2d_array_v2i16_zero,             // llvm.nvvm.suld.2d.array.v2i16.zero
   3528     nvvm_suld_2d_array_v2i32_clamp,            // llvm.nvvm.suld.2d.array.v2i32.clamp
   3529     nvvm_suld_2d_array_v2i32_trap,             // llvm.nvvm.suld.2d.array.v2i32.trap
   3530     nvvm_suld_2d_array_v2i32_zero,             // llvm.nvvm.suld.2d.array.v2i32.zero
   3531     nvvm_suld_2d_array_v2i64_clamp,            // llvm.nvvm.suld.2d.array.v2i64.clamp
   3532     nvvm_suld_2d_array_v2i64_trap,             // llvm.nvvm.suld.2d.array.v2i64.trap
   3533     nvvm_suld_2d_array_v2i64_zero,             // llvm.nvvm.suld.2d.array.v2i64.zero
   3534     nvvm_suld_2d_array_v2i8_clamp,             // llvm.nvvm.suld.2d.array.v2i8.clamp
   3535     nvvm_suld_2d_array_v2i8_trap,              // llvm.nvvm.suld.2d.array.v2i8.trap
   3536     nvvm_suld_2d_array_v2i8_zero,              // llvm.nvvm.suld.2d.array.v2i8.zero
   3537     nvvm_suld_2d_array_v4i16_clamp,            // llvm.nvvm.suld.2d.array.v4i16.clamp
   3538     nvvm_suld_2d_array_v4i16_trap,             // llvm.nvvm.suld.2d.array.v4i16.trap
   3539     nvvm_suld_2d_array_v4i16_zero,             // llvm.nvvm.suld.2d.array.v4i16.zero
   3540     nvvm_suld_2d_array_v4i32_clamp,            // llvm.nvvm.suld.2d.array.v4i32.clamp
   3541     nvvm_suld_2d_array_v4i32_trap,             // llvm.nvvm.suld.2d.array.v4i32.trap
   3542     nvvm_suld_2d_array_v4i32_zero,             // llvm.nvvm.suld.2d.array.v4i32.zero
   3543     nvvm_suld_2d_array_v4i8_clamp,             // llvm.nvvm.suld.2d.array.v4i8.clamp
   3544     nvvm_suld_2d_array_v4i8_trap,              // llvm.nvvm.suld.2d.array.v4i8.trap
   3545     nvvm_suld_2d_array_v4i8_zero,              // llvm.nvvm.suld.2d.array.v4i8.zero
   3546     nvvm_suld_2d_i16_clamp,                    // llvm.nvvm.suld.2d.i16.clamp
   3547     nvvm_suld_2d_i16_trap,                     // llvm.nvvm.suld.2d.i16.trap
   3548     nvvm_suld_2d_i16_zero,                     // llvm.nvvm.suld.2d.i16.zero
   3549     nvvm_suld_2d_i32_clamp,                    // llvm.nvvm.suld.2d.i32.clamp
   3550     nvvm_suld_2d_i32_trap,                     // llvm.nvvm.suld.2d.i32.trap
   3551     nvvm_suld_2d_i32_zero,                     // llvm.nvvm.suld.2d.i32.zero
   3552     nvvm_suld_2d_i64_clamp,                    // llvm.nvvm.suld.2d.i64.clamp
   3553     nvvm_suld_2d_i64_trap,                     // llvm.nvvm.suld.2d.i64.trap
   3554     nvvm_suld_2d_i64_zero,                     // llvm.nvvm.suld.2d.i64.zero
   3555     nvvm_suld_2d_i8_clamp,                     // llvm.nvvm.suld.2d.i8.clamp
   3556     nvvm_suld_2d_i8_trap,                      // llvm.nvvm.suld.2d.i8.trap
   3557     nvvm_suld_2d_i8_zero,                      // llvm.nvvm.suld.2d.i8.zero
   3558     nvvm_suld_2d_v2i16_clamp,                  // llvm.nvvm.suld.2d.v2i16.clamp
   3559     nvvm_suld_2d_v2i16_trap,                   // llvm.nvvm.suld.2d.v2i16.trap
   3560     nvvm_suld_2d_v2i16_zero,                   // llvm.nvvm.suld.2d.v2i16.zero
   3561     nvvm_suld_2d_v2i32_clamp,                  // llvm.nvvm.suld.2d.v2i32.clamp
   3562     nvvm_suld_2d_v2i32_trap,                   // llvm.nvvm.suld.2d.v2i32.trap
   3563     nvvm_suld_2d_v2i32_zero,                   // llvm.nvvm.suld.2d.v2i32.zero
   3564     nvvm_suld_2d_v2i64_clamp,                  // llvm.nvvm.suld.2d.v2i64.clamp
   3565     nvvm_suld_2d_v2i64_trap,                   // llvm.nvvm.suld.2d.v2i64.trap
   3566     nvvm_suld_2d_v2i64_zero,                   // llvm.nvvm.suld.2d.v2i64.zero
   3567     nvvm_suld_2d_v2i8_clamp,                   // llvm.nvvm.suld.2d.v2i8.clamp
   3568     nvvm_suld_2d_v2i8_trap,                    // llvm.nvvm.suld.2d.v2i8.trap
   3569     nvvm_suld_2d_v2i8_zero,                    // llvm.nvvm.suld.2d.v2i8.zero
   3570     nvvm_suld_2d_v4i16_clamp,                  // llvm.nvvm.suld.2d.v4i16.clamp
   3571     nvvm_suld_2d_v4i16_trap,                   // llvm.nvvm.suld.2d.v4i16.trap
   3572     nvvm_suld_2d_v4i16_zero,                   // llvm.nvvm.suld.2d.v4i16.zero
   3573     nvvm_suld_2d_v4i32_clamp,                  // llvm.nvvm.suld.2d.v4i32.clamp
   3574     nvvm_suld_2d_v4i32_trap,                   // llvm.nvvm.suld.2d.v4i32.trap
   3575     nvvm_suld_2d_v4i32_zero,                   // llvm.nvvm.suld.2d.v4i32.zero
   3576     nvvm_suld_2d_v4i8_clamp,                   // llvm.nvvm.suld.2d.v4i8.clamp
   3577     nvvm_suld_2d_v4i8_trap,                    // llvm.nvvm.suld.2d.v4i8.trap
   3578     nvvm_suld_2d_v4i8_zero,                    // llvm.nvvm.suld.2d.v4i8.zero
   3579     nvvm_suld_3d_i16_clamp,                    // llvm.nvvm.suld.3d.i16.clamp
   3580     nvvm_suld_3d_i16_trap,                     // llvm.nvvm.suld.3d.i16.trap
   3581     nvvm_suld_3d_i16_zero,                     // llvm.nvvm.suld.3d.i16.zero
   3582     nvvm_suld_3d_i32_clamp,                    // llvm.nvvm.suld.3d.i32.clamp
   3583     nvvm_suld_3d_i32_trap,                     // llvm.nvvm.suld.3d.i32.trap
   3584     nvvm_suld_3d_i32_zero,                     // llvm.nvvm.suld.3d.i32.zero
   3585     nvvm_suld_3d_i64_clamp,                    // llvm.nvvm.suld.3d.i64.clamp
   3586     nvvm_suld_3d_i64_trap,                     // llvm.nvvm.suld.3d.i64.trap
   3587     nvvm_suld_3d_i64_zero,                     // llvm.nvvm.suld.3d.i64.zero
   3588     nvvm_suld_3d_i8_clamp,                     // llvm.nvvm.suld.3d.i8.clamp
   3589     nvvm_suld_3d_i8_trap,                      // llvm.nvvm.suld.3d.i8.trap
   3590     nvvm_suld_3d_i8_zero,                      // llvm.nvvm.suld.3d.i8.zero
   3591     nvvm_suld_3d_v2i16_clamp,                  // llvm.nvvm.suld.3d.v2i16.clamp
   3592     nvvm_suld_3d_v2i16_trap,                   // llvm.nvvm.suld.3d.v2i16.trap
   3593     nvvm_suld_3d_v2i16_zero,                   // llvm.nvvm.suld.3d.v2i16.zero
   3594     nvvm_suld_3d_v2i32_clamp,                  // llvm.nvvm.suld.3d.v2i32.clamp
   3595     nvvm_suld_3d_v2i32_trap,                   // llvm.nvvm.suld.3d.v2i32.trap
   3596     nvvm_suld_3d_v2i32_zero,                   // llvm.nvvm.suld.3d.v2i32.zero
   3597     nvvm_suld_3d_v2i64_clamp,                  // llvm.nvvm.suld.3d.v2i64.clamp
   3598     nvvm_suld_3d_v2i64_trap,                   // llvm.nvvm.suld.3d.v2i64.trap
   3599     nvvm_suld_3d_v2i64_zero,                   // llvm.nvvm.suld.3d.v2i64.zero
   3600     nvvm_suld_3d_v2i8_clamp,                   // llvm.nvvm.suld.3d.v2i8.clamp
   3601     nvvm_suld_3d_v2i8_trap,                    // llvm.nvvm.suld.3d.v2i8.trap
   3602     nvvm_suld_3d_v2i8_zero,                    // llvm.nvvm.suld.3d.v2i8.zero
   3603     nvvm_suld_3d_v4i16_clamp,                  // llvm.nvvm.suld.3d.v4i16.clamp
   3604     nvvm_suld_3d_v4i16_trap,                   // llvm.nvvm.suld.3d.v4i16.trap
   3605     nvvm_suld_3d_v4i16_zero,                   // llvm.nvvm.suld.3d.v4i16.zero
   3606     nvvm_suld_3d_v4i32_clamp,                  // llvm.nvvm.suld.3d.v4i32.clamp
   3607     nvvm_suld_3d_v4i32_trap,                   // llvm.nvvm.suld.3d.v4i32.trap
   3608     nvvm_suld_3d_v4i32_zero,                   // llvm.nvvm.suld.3d.v4i32.zero
   3609     nvvm_suld_3d_v4i8_clamp,                   // llvm.nvvm.suld.3d.v4i8.clamp
   3610     nvvm_suld_3d_v4i8_trap,                    // llvm.nvvm.suld.3d.v4i8.trap
   3611     nvvm_suld_3d_v4i8_zero,                    // llvm.nvvm.suld.3d.v4i8.zero
   3612     nvvm_suq_array_size,                       // llvm.nvvm.suq.array.size
   3613     nvvm_suq_channel_data_type,                // llvm.nvvm.suq.channel.data.type
   3614     nvvm_suq_channel_order,                    // llvm.nvvm.suq.channel.order
   3615     nvvm_suq_depth,                            // llvm.nvvm.suq.depth
   3616     nvvm_suq_height,                           // llvm.nvvm.suq.height
   3617     nvvm_suq_width,                            // llvm.nvvm.suq.width
   3618     nvvm_sust_b_1d_array_i16_clamp,            // llvm.nvvm.sust.b.1d.array.i16.clamp
   3619     nvvm_sust_b_1d_array_i16_trap,             // llvm.nvvm.sust.b.1d.array.i16.trap
   3620     nvvm_sust_b_1d_array_i16_zero,             // llvm.nvvm.sust.b.1d.array.i16.zero
   3621     nvvm_sust_b_1d_array_i32_clamp,            // llvm.nvvm.sust.b.1d.array.i32.clamp
   3622     nvvm_sust_b_1d_array_i32_trap,             // llvm.nvvm.sust.b.1d.array.i32.trap
   3623     nvvm_sust_b_1d_array_i32_zero,             // llvm.nvvm.sust.b.1d.array.i32.zero
   3624     nvvm_sust_b_1d_array_i64_clamp,            // llvm.nvvm.sust.b.1d.array.i64.clamp
   3625     nvvm_sust_b_1d_array_i64_trap,             // llvm.nvvm.sust.b.1d.array.i64.trap
   3626     nvvm_sust_b_1d_array_i64_zero,             // llvm.nvvm.sust.b.1d.array.i64.zero
   3627     nvvm_sust_b_1d_array_i8_clamp,             // llvm.nvvm.sust.b.1d.array.i8.clamp
   3628     nvvm_sust_b_1d_array_i8_trap,              // llvm.nvvm.sust.b.1d.array.i8.trap
   3629     nvvm_sust_b_1d_array_i8_zero,              // llvm.nvvm.sust.b.1d.array.i8.zero
   3630     nvvm_sust_b_1d_array_v2i16_clamp,          // llvm.nvvm.sust.b.1d.array.v2i16.clamp
   3631     nvvm_sust_b_1d_array_v2i16_trap,           // llvm.nvvm.sust.b.1d.array.v2i16.trap
   3632     nvvm_sust_b_1d_array_v2i16_zero,           // llvm.nvvm.sust.b.1d.array.v2i16.zero
   3633     nvvm_sust_b_1d_array_v2i32_clamp,          // llvm.nvvm.sust.b.1d.array.v2i32.clamp
   3634     nvvm_sust_b_1d_array_v2i32_trap,           // llvm.nvvm.sust.b.1d.array.v2i32.trap
   3635     nvvm_sust_b_1d_array_v2i32_zero,           // llvm.nvvm.sust.b.1d.array.v2i32.zero
   3636     nvvm_sust_b_1d_array_v2i64_clamp,          // llvm.nvvm.sust.b.1d.array.v2i64.clamp
   3637     nvvm_sust_b_1d_array_v2i64_trap,           // llvm.nvvm.sust.b.1d.array.v2i64.trap
   3638     nvvm_sust_b_1d_array_v2i64_zero,           // llvm.nvvm.sust.b.1d.array.v2i64.zero
   3639     nvvm_sust_b_1d_array_v2i8_clamp,           // llvm.nvvm.sust.b.1d.array.v2i8.clamp
   3640     nvvm_sust_b_1d_array_v2i8_trap,            // llvm.nvvm.sust.b.1d.array.v2i8.trap
   3641     nvvm_sust_b_1d_array_v2i8_zero,            // llvm.nvvm.sust.b.1d.array.v2i8.zero
   3642     nvvm_sust_b_1d_array_v4i16_clamp,          // llvm.nvvm.sust.b.1d.array.v4i16.clamp
   3643     nvvm_sust_b_1d_array_v4i16_trap,           // llvm.nvvm.sust.b.1d.array.v4i16.trap
   3644     nvvm_sust_b_1d_array_v4i16_zero,           // llvm.nvvm.sust.b.1d.array.v4i16.zero
   3645     nvvm_sust_b_1d_array_v4i32_clamp,          // llvm.nvvm.sust.b.1d.array.v4i32.clamp
   3646     nvvm_sust_b_1d_array_v4i32_trap,           // llvm.nvvm.sust.b.1d.array.v4i32.trap
   3647     nvvm_sust_b_1d_array_v4i32_zero,           // llvm.nvvm.sust.b.1d.array.v4i32.zero
   3648     nvvm_sust_b_1d_array_v4i8_clamp,           // llvm.nvvm.sust.b.1d.array.v4i8.clamp
   3649     nvvm_sust_b_1d_array_v4i8_trap,            // llvm.nvvm.sust.b.1d.array.v4i8.trap
   3650     nvvm_sust_b_1d_array_v4i8_zero,            // llvm.nvvm.sust.b.1d.array.v4i8.zero
   3651     nvvm_sust_b_1d_i16_clamp,                  // llvm.nvvm.sust.b.1d.i16.clamp
   3652     nvvm_sust_b_1d_i16_trap,                   // llvm.nvvm.sust.b.1d.i16.trap
   3653     nvvm_sust_b_1d_i16_zero,                   // llvm.nvvm.sust.b.1d.i16.zero
   3654     nvvm_sust_b_1d_i32_clamp,                  // llvm.nvvm.sust.b.1d.i32.clamp
   3655     nvvm_sust_b_1d_i32_trap,                   // llvm.nvvm.sust.b.1d.i32.trap
   3656     nvvm_sust_b_1d_i32_zero,                   // llvm.nvvm.sust.b.1d.i32.zero
   3657     nvvm_sust_b_1d_i64_clamp,                  // llvm.nvvm.sust.b.1d.i64.clamp
   3658     nvvm_sust_b_1d_i64_trap,                   // llvm.nvvm.sust.b.1d.i64.trap
   3659     nvvm_sust_b_1d_i64_zero,                   // llvm.nvvm.sust.b.1d.i64.zero
   3660     nvvm_sust_b_1d_i8_clamp,                   // llvm.nvvm.sust.b.1d.i8.clamp
   3661     nvvm_sust_b_1d_i8_trap,                    // llvm.nvvm.sust.b.1d.i8.trap
   3662     nvvm_sust_b_1d_i8_zero,                    // llvm.nvvm.sust.b.1d.i8.zero
   3663     nvvm_sust_b_1d_v2i16_clamp,                // llvm.nvvm.sust.b.1d.v2i16.clamp
   3664     nvvm_sust_b_1d_v2i16_trap,                 // llvm.nvvm.sust.b.1d.v2i16.trap
   3665     nvvm_sust_b_1d_v2i16_zero,                 // llvm.nvvm.sust.b.1d.v2i16.zero
   3666     nvvm_sust_b_1d_v2i32_clamp,                // llvm.nvvm.sust.b.1d.v2i32.clamp
   3667     nvvm_sust_b_1d_v2i32_trap,                 // llvm.nvvm.sust.b.1d.v2i32.trap
   3668     nvvm_sust_b_1d_v2i32_zero,                 // llvm.nvvm.sust.b.1d.v2i32.zero
   3669     nvvm_sust_b_1d_v2i64_clamp,                // llvm.nvvm.sust.b.1d.v2i64.clamp
   3670     nvvm_sust_b_1d_v2i64_trap,                 // llvm.nvvm.sust.b.1d.v2i64.trap
   3671     nvvm_sust_b_1d_v2i64_zero,                 // llvm.nvvm.sust.b.1d.v2i64.zero
   3672     nvvm_sust_b_1d_v2i8_clamp,                 // llvm.nvvm.sust.b.1d.v2i8.clamp
   3673     nvvm_sust_b_1d_v2i8_trap,                  // llvm.nvvm.sust.b.1d.v2i8.trap
   3674     nvvm_sust_b_1d_v2i8_zero,                  // llvm.nvvm.sust.b.1d.v2i8.zero
   3675     nvvm_sust_b_1d_v4i16_clamp,                // llvm.nvvm.sust.b.1d.v4i16.clamp
   3676     nvvm_sust_b_1d_v4i16_trap,                 // llvm.nvvm.sust.b.1d.v4i16.trap
   3677     nvvm_sust_b_1d_v4i16_zero,                 // llvm.nvvm.sust.b.1d.v4i16.zero
   3678     nvvm_sust_b_1d_v4i32_clamp,                // llvm.nvvm.sust.b.1d.v4i32.clamp
   3679     nvvm_sust_b_1d_v4i32_trap,                 // llvm.nvvm.sust.b.1d.v4i32.trap
   3680     nvvm_sust_b_1d_v4i32_zero,                 // llvm.nvvm.sust.b.1d.v4i32.zero
   3681     nvvm_sust_b_1d_v4i8_clamp,                 // llvm.nvvm.sust.b.1d.v4i8.clamp
   3682     nvvm_sust_b_1d_v4i8_trap,                  // llvm.nvvm.sust.b.1d.v4i8.trap
   3683     nvvm_sust_b_1d_v4i8_zero,                  // llvm.nvvm.sust.b.1d.v4i8.zero
   3684     nvvm_sust_b_2d_array_i16_clamp,            // llvm.nvvm.sust.b.2d.array.i16.clamp
   3685     nvvm_sust_b_2d_array_i16_trap,             // llvm.nvvm.sust.b.2d.array.i16.trap
   3686     nvvm_sust_b_2d_array_i16_zero,             // llvm.nvvm.sust.b.2d.array.i16.zero
   3687     nvvm_sust_b_2d_array_i32_clamp,            // llvm.nvvm.sust.b.2d.array.i32.clamp
   3688     nvvm_sust_b_2d_array_i32_trap,             // llvm.nvvm.sust.b.2d.array.i32.trap
   3689     nvvm_sust_b_2d_array_i32_zero,             // llvm.nvvm.sust.b.2d.array.i32.zero
   3690     nvvm_sust_b_2d_array_i64_clamp,            // llvm.nvvm.sust.b.2d.array.i64.clamp
   3691     nvvm_sust_b_2d_array_i64_trap,             // llvm.nvvm.sust.b.2d.array.i64.trap
   3692     nvvm_sust_b_2d_array_i64_zero,             // llvm.nvvm.sust.b.2d.array.i64.zero
   3693     nvvm_sust_b_2d_array_i8_clamp,             // llvm.nvvm.sust.b.2d.array.i8.clamp
   3694     nvvm_sust_b_2d_array_i8_trap,              // llvm.nvvm.sust.b.2d.array.i8.trap
   3695     nvvm_sust_b_2d_array_i8_zero,              // llvm.nvvm.sust.b.2d.array.i8.zero
   3696     nvvm_sust_b_2d_array_v2i16_clamp,          // llvm.nvvm.sust.b.2d.array.v2i16.clamp
   3697     nvvm_sust_b_2d_array_v2i16_trap,           // llvm.nvvm.sust.b.2d.array.v2i16.trap
   3698     nvvm_sust_b_2d_array_v2i16_zero,           // llvm.nvvm.sust.b.2d.array.v2i16.zero
   3699     nvvm_sust_b_2d_array_v2i32_clamp,          // llvm.nvvm.sust.b.2d.array.v2i32.clamp
   3700     nvvm_sust_b_2d_array_v2i32_trap,           // llvm.nvvm.sust.b.2d.array.v2i32.trap
   3701     nvvm_sust_b_2d_array_v2i32_zero,           // llvm.nvvm.sust.b.2d.array.v2i32.zero
   3702     nvvm_sust_b_2d_array_v2i64_clamp,          // llvm.nvvm.sust.b.2d.array.v2i64.clamp
   3703     nvvm_sust_b_2d_array_v2i64_trap,           // llvm.nvvm.sust.b.2d.array.v2i64.trap
   3704     nvvm_sust_b_2d_array_v2i64_zero,           // llvm.nvvm.sust.b.2d.array.v2i64.zero
   3705     nvvm_sust_b_2d_array_v2i8_clamp,           // llvm.nvvm.sust.b.2d.array.v2i8.clamp
   3706     nvvm_sust_b_2d_array_v2i8_trap,            // llvm.nvvm.sust.b.2d.array.v2i8.trap
   3707     nvvm_sust_b_2d_array_v2i8_zero,            // llvm.nvvm.sust.b.2d.array.v2i8.zero
   3708     nvvm_sust_b_2d_array_v4i16_clamp,          // llvm.nvvm.sust.b.2d.array.v4i16.clamp
   3709     nvvm_sust_b_2d_array_v4i16_trap,           // llvm.nvvm.sust.b.2d.array.v4i16.trap
   3710     nvvm_sust_b_2d_array_v4i16_zero,           // llvm.nvvm.sust.b.2d.array.v4i16.zero
   3711     nvvm_sust_b_2d_array_v4i32_clamp,          // llvm.nvvm.sust.b.2d.array.v4i32.clamp
   3712     nvvm_sust_b_2d_array_v4i32_trap,           // llvm.nvvm.sust.b.2d.array.v4i32.trap
   3713     nvvm_sust_b_2d_array_v4i32_zero,           // llvm.nvvm.sust.b.2d.array.v4i32.zero
   3714     nvvm_sust_b_2d_array_v4i8_clamp,           // llvm.nvvm.sust.b.2d.array.v4i8.clamp
   3715     nvvm_sust_b_2d_array_v4i8_trap,            // llvm.nvvm.sust.b.2d.array.v4i8.trap
   3716     nvvm_sust_b_2d_array_v4i8_zero,            // llvm.nvvm.sust.b.2d.array.v4i8.zero
   3717     nvvm_sust_b_2d_i16_clamp,                  // llvm.nvvm.sust.b.2d.i16.clamp
   3718     nvvm_sust_b_2d_i16_trap,                   // llvm.nvvm.sust.b.2d.i16.trap
   3719     nvvm_sust_b_2d_i16_zero,                   // llvm.nvvm.sust.b.2d.i16.zero
   3720     nvvm_sust_b_2d_i32_clamp,                  // llvm.nvvm.sust.b.2d.i32.clamp
   3721     nvvm_sust_b_2d_i32_trap,                   // llvm.nvvm.sust.b.2d.i32.trap
   3722     nvvm_sust_b_2d_i32_zero,                   // llvm.nvvm.sust.b.2d.i32.zero
   3723     nvvm_sust_b_2d_i64_clamp,                  // llvm.nvvm.sust.b.2d.i64.clamp
   3724     nvvm_sust_b_2d_i64_trap,                   // llvm.nvvm.sust.b.2d.i64.trap
   3725     nvvm_sust_b_2d_i64_zero,                   // llvm.nvvm.sust.b.2d.i64.zero
   3726     nvvm_sust_b_2d_i8_clamp,                   // llvm.nvvm.sust.b.2d.i8.clamp
   3727     nvvm_sust_b_2d_i8_trap,                    // llvm.nvvm.sust.b.2d.i8.trap
   3728     nvvm_sust_b_2d_i8_zero,                    // llvm.nvvm.sust.b.2d.i8.zero
   3729     nvvm_sust_b_2d_v2i16_clamp,                // llvm.nvvm.sust.b.2d.v2i16.clamp
   3730     nvvm_sust_b_2d_v2i16_trap,                 // llvm.nvvm.sust.b.2d.v2i16.trap
   3731     nvvm_sust_b_2d_v2i16_zero,                 // llvm.nvvm.sust.b.2d.v2i16.zero
   3732     nvvm_sust_b_2d_v2i32_clamp,                // llvm.nvvm.sust.b.2d.v2i32.clamp
   3733     nvvm_sust_b_2d_v2i32_trap,                 // llvm.nvvm.sust.b.2d.v2i32.trap
   3734     nvvm_sust_b_2d_v2i32_zero,                 // llvm.nvvm.sust.b.2d.v2i32.zero
   3735     nvvm_sust_b_2d_v2i64_clamp,                // llvm.nvvm.sust.b.2d.v2i64.clamp
   3736     nvvm_sust_b_2d_v2i64_trap,                 // llvm.nvvm.sust.b.2d.v2i64.trap
   3737     nvvm_sust_b_2d_v2i64_zero,                 // llvm.nvvm.sust.b.2d.v2i64.zero
   3738     nvvm_sust_b_2d_v2i8_clamp,                 // llvm.nvvm.sust.b.2d.v2i8.clamp
   3739     nvvm_sust_b_2d_v2i8_trap,                  // llvm.nvvm.sust.b.2d.v2i8.trap
   3740     nvvm_sust_b_2d_v2i8_zero,                  // llvm.nvvm.sust.b.2d.v2i8.zero
   3741     nvvm_sust_b_2d_v4i16_clamp,                // llvm.nvvm.sust.b.2d.v4i16.clamp
   3742     nvvm_sust_b_2d_v4i16_trap,                 // llvm.nvvm.sust.b.2d.v4i16.trap
   3743     nvvm_sust_b_2d_v4i16_zero,                 // llvm.nvvm.sust.b.2d.v4i16.zero
   3744     nvvm_sust_b_2d_v4i32_clamp,                // llvm.nvvm.sust.b.2d.v4i32.clamp
   3745     nvvm_sust_b_2d_v4i32_trap,                 // llvm.nvvm.sust.b.2d.v4i32.trap
   3746     nvvm_sust_b_2d_v4i32_zero,                 // llvm.nvvm.sust.b.2d.v4i32.zero
   3747     nvvm_sust_b_2d_v4i8_clamp,                 // llvm.nvvm.sust.b.2d.v4i8.clamp
   3748     nvvm_sust_b_2d_v4i8_trap,                  // llvm.nvvm.sust.b.2d.v4i8.trap
   3749     nvvm_sust_b_2d_v4i8_zero,                  // llvm.nvvm.sust.b.2d.v4i8.zero
   3750     nvvm_sust_b_3d_i16_clamp,                  // llvm.nvvm.sust.b.3d.i16.clamp
   3751     nvvm_sust_b_3d_i16_trap,                   // llvm.nvvm.sust.b.3d.i16.trap
   3752     nvvm_sust_b_3d_i16_zero,                   // llvm.nvvm.sust.b.3d.i16.zero
   3753     nvvm_sust_b_3d_i32_clamp,                  // llvm.nvvm.sust.b.3d.i32.clamp
   3754     nvvm_sust_b_3d_i32_trap,                   // llvm.nvvm.sust.b.3d.i32.trap
   3755     nvvm_sust_b_3d_i32_zero,                   // llvm.nvvm.sust.b.3d.i32.zero
   3756     nvvm_sust_b_3d_i64_clamp,                  // llvm.nvvm.sust.b.3d.i64.clamp
   3757     nvvm_sust_b_3d_i64_trap,                   // llvm.nvvm.sust.b.3d.i64.trap
   3758     nvvm_sust_b_3d_i64_zero,                   // llvm.nvvm.sust.b.3d.i64.zero
   3759     nvvm_sust_b_3d_i8_clamp,                   // llvm.nvvm.sust.b.3d.i8.clamp
   3760     nvvm_sust_b_3d_i8_trap,                    // llvm.nvvm.sust.b.3d.i8.trap
   3761     nvvm_sust_b_3d_i8_zero,                    // llvm.nvvm.sust.b.3d.i8.zero
   3762     nvvm_sust_b_3d_v2i16_clamp,                // llvm.nvvm.sust.b.3d.v2i16.clamp
   3763     nvvm_sust_b_3d_v2i16_trap,                 // llvm.nvvm.sust.b.3d.v2i16.trap
   3764     nvvm_sust_b_3d_v2i16_zero,                 // llvm.nvvm.sust.b.3d.v2i16.zero
   3765     nvvm_sust_b_3d_v2i32_clamp,                // llvm.nvvm.sust.b.3d.v2i32.clamp
   3766     nvvm_sust_b_3d_v2i32_trap,                 // llvm.nvvm.sust.b.3d.v2i32.trap
   3767     nvvm_sust_b_3d_v2i32_zero,                 // llvm.nvvm.sust.b.3d.v2i32.zero
   3768     nvvm_sust_b_3d_v2i64_clamp,                // llvm.nvvm.sust.b.3d.v2i64.clamp
   3769     nvvm_sust_b_3d_v2i64_trap,                 // llvm.nvvm.sust.b.3d.v2i64.trap
   3770     nvvm_sust_b_3d_v2i64_zero,                 // llvm.nvvm.sust.b.3d.v2i64.zero
   3771     nvvm_sust_b_3d_v2i8_clamp,                 // llvm.nvvm.sust.b.3d.v2i8.clamp
   3772     nvvm_sust_b_3d_v2i8_trap,                  // llvm.nvvm.sust.b.3d.v2i8.trap
   3773     nvvm_sust_b_3d_v2i8_zero,                  // llvm.nvvm.sust.b.3d.v2i8.zero
   3774     nvvm_sust_b_3d_v4i16_clamp,                // llvm.nvvm.sust.b.3d.v4i16.clamp
   3775     nvvm_sust_b_3d_v4i16_trap,                 // llvm.nvvm.sust.b.3d.v4i16.trap
   3776     nvvm_sust_b_3d_v4i16_zero,                 // llvm.nvvm.sust.b.3d.v4i16.zero
   3777     nvvm_sust_b_3d_v4i32_clamp,                // llvm.nvvm.sust.b.3d.v4i32.clamp
   3778     nvvm_sust_b_3d_v4i32_trap,                 // llvm.nvvm.sust.b.3d.v4i32.trap
   3779     nvvm_sust_b_3d_v4i32_zero,                 // llvm.nvvm.sust.b.3d.v4i32.zero
   3780     nvvm_sust_b_3d_v4i8_clamp,                 // llvm.nvvm.sust.b.3d.v4i8.clamp
   3781     nvvm_sust_b_3d_v4i8_trap,                  // llvm.nvvm.sust.b.3d.v4i8.trap
   3782     nvvm_sust_b_3d_v4i8_zero,                  // llvm.nvvm.sust.b.3d.v4i8.zero
   3783     nvvm_sust_p_1d_array_i16_trap,             // llvm.nvvm.sust.p.1d.array.i16.trap
   3784     nvvm_sust_p_1d_array_i32_trap,             // llvm.nvvm.sust.p.1d.array.i32.trap
   3785     nvvm_sust_p_1d_array_i8_trap,              // llvm.nvvm.sust.p.1d.array.i8.trap
   3786     nvvm_sust_p_1d_array_v2i16_trap,           // llvm.nvvm.sust.p.1d.array.v2i16.trap
   3787     nvvm_sust_p_1d_array_v2i32_trap,           // llvm.nvvm.sust.p.1d.array.v2i32.trap
   3788     nvvm_sust_p_1d_array_v2i8_trap,            // llvm.nvvm.sust.p.1d.array.v2i8.trap
   3789     nvvm_sust_p_1d_array_v4i16_trap,           // llvm.nvvm.sust.p.1d.array.v4i16.trap
   3790     nvvm_sust_p_1d_array_v4i32_trap,           // llvm.nvvm.sust.p.1d.array.v4i32.trap
   3791     nvvm_sust_p_1d_array_v4i8_trap,            // llvm.nvvm.sust.p.1d.array.v4i8.trap
   3792     nvvm_sust_p_1d_i16_trap,                   // llvm.nvvm.sust.p.1d.i16.trap
   3793     nvvm_sust_p_1d_i32_trap,                   // llvm.nvvm.sust.p.1d.i32.trap
   3794     nvvm_sust_p_1d_i8_trap,                    // llvm.nvvm.sust.p.1d.i8.trap
   3795     nvvm_sust_p_1d_v2i16_trap,                 // llvm.nvvm.sust.p.1d.v2i16.trap
   3796     nvvm_sust_p_1d_v2i32_trap,                 // llvm.nvvm.sust.p.1d.v2i32.trap
   3797     nvvm_sust_p_1d_v2i8_trap,                  // llvm.nvvm.sust.p.1d.v2i8.trap
   3798     nvvm_sust_p_1d_v4i16_trap,                 // llvm.nvvm.sust.p.1d.v4i16.trap
   3799     nvvm_sust_p_1d_v4i32_trap,                 // llvm.nvvm.sust.p.1d.v4i32.trap
   3800     nvvm_sust_p_1d_v4i8_trap,                  // llvm.nvvm.sust.p.1d.v4i8.trap
   3801     nvvm_sust_p_2d_array_i16_trap,             // llvm.nvvm.sust.p.2d.array.i16.trap
   3802     nvvm_sust_p_2d_array_i32_trap,             // llvm.nvvm.sust.p.2d.array.i32.trap
   3803     nvvm_sust_p_2d_array_i8_trap,              // llvm.nvvm.sust.p.2d.array.i8.trap
   3804     nvvm_sust_p_2d_array_v2i16_trap,           // llvm.nvvm.sust.p.2d.array.v2i16.trap
   3805     nvvm_sust_p_2d_array_v2i32_trap,           // llvm.nvvm.sust.p.2d.array.v2i32.trap
   3806     nvvm_sust_p_2d_array_v2i8_trap,            // llvm.nvvm.sust.p.2d.array.v2i8.trap
   3807     nvvm_sust_p_2d_array_v4i16_trap,           // llvm.nvvm.sust.p.2d.array.v4i16.trap
   3808     nvvm_sust_p_2d_array_v4i32_trap,           // llvm.nvvm.sust.p.2d.array.v4i32.trap
   3809     nvvm_sust_p_2d_array_v4i8_trap,            // llvm.nvvm.sust.p.2d.array.v4i8.trap
   3810     nvvm_sust_p_2d_i16_trap,                   // llvm.nvvm.sust.p.2d.i16.trap
   3811     nvvm_sust_p_2d_i32_trap,                   // llvm.nvvm.sust.p.2d.i32.trap
   3812     nvvm_sust_p_2d_i8_trap,                    // llvm.nvvm.sust.p.2d.i8.trap
   3813     nvvm_sust_p_2d_v2i16_trap,                 // llvm.nvvm.sust.p.2d.v2i16.trap
   3814     nvvm_sust_p_2d_v2i32_trap,                 // llvm.nvvm.sust.p.2d.v2i32.trap
   3815     nvvm_sust_p_2d_v2i8_trap,                  // llvm.nvvm.sust.p.2d.v2i8.trap
   3816     nvvm_sust_p_2d_v4i16_trap,                 // llvm.nvvm.sust.p.2d.v4i16.trap
   3817     nvvm_sust_p_2d_v4i32_trap,                 // llvm.nvvm.sust.p.2d.v4i32.trap
   3818     nvvm_sust_p_2d_v4i8_trap,                  // llvm.nvvm.sust.p.2d.v4i8.trap
   3819     nvvm_sust_p_3d_i16_trap,                   // llvm.nvvm.sust.p.3d.i16.trap
   3820     nvvm_sust_p_3d_i32_trap,                   // llvm.nvvm.sust.p.3d.i32.trap
   3821     nvvm_sust_p_3d_i8_trap,                    // llvm.nvvm.sust.p.3d.i8.trap
   3822     nvvm_sust_p_3d_v2i16_trap,                 // llvm.nvvm.sust.p.3d.v2i16.trap
   3823     nvvm_sust_p_3d_v2i32_trap,                 // llvm.nvvm.sust.p.3d.v2i32.trap
   3824     nvvm_sust_p_3d_v2i8_trap,                  // llvm.nvvm.sust.p.3d.v2i8.trap
   3825     nvvm_sust_p_3d_v4i16_trap,                 // llvm.nvvm.sust.p.3d.v4i16.trap
   3826     nvvm_sust_p_3d_v4i32_trap,                 // llvm.nvvm.sust.p.3d.v4i32.trap
   3827     nvvm_sust_p_3d_v4i8_trap,                  // llvm.nvvm.sust.p.3d.v4i8.trap
   3828     nvvm_swap_lo_hi_b64,                       // llvm.nvvm.swap.lo.hi.b64
   3829     nvvm_tex_1d_array_grad_v4f32_f32,          // llvm.nvvm.tex.1d.array.grad.v4f32.f32
   3830     nvvm_tex_1d_array_grad_v4s32_f32,          // llvm.nvvm.tex.1d.array.grad.v4s32.f32
   3831     nvvm_tex_1d_array_grad_v4u32_f32,          // llvm.nvvm.tex.1d.array.grad.v4u32.f32
   3832     nvvm_tex_1d_array_level_v4f32_f32,         // llvm.nvvm.tex.1d.array.level.v4f32.f32
   3833     nvvm_tex_1d_array_level_v4s32_f32,         // llvm.nvvm.tex.1d.array.level.v4s32.f32
   3834     nvvm_tex_1d_array_level_v4u32_f32,         // llvm.nvvm.tex.1d.array.level.v4u32.f32
   3835     nvvm_tex_1d_array_v4f32_f32,               // llvm.nvvm.tex.1d.array.v4f32.f32
   3836     nvvm_tex_1d_array_v4f32_s32,               // llvm.nvvm.tex.1d.array.v4f32.s32
   3837     nvvm_tex_1d_array_v4s32_f32,               // llvm.nvvm.tex.1d.array.v4s32.f32
   3838     nvvm_tex_1d_array_v4s32_s32,               // llvm.nvvm.tex.1d.array.v4s32.s32
   3839     nvvm_tex_1d_array_v4u32_f32,               // llvm.nvvm.tex.1d.array.v4u32.f32
   3840     nvvm_tex_1d_array_v4u32_s32,               // llvm.nvvm.tex.1d.array.v4u32.s32
   3841     nvvm_tex_1d_grad_v4f32_f32,                // llvm.nvvm.tex.1d.grad.v4f32.f32
   3842     nvvm_tex_1d_grad_v4s32_f32,                // llvm.nvvm.tex.1d.grad.v4s32.f32
   3843     nvvm_tex_1d_grad_v4u32_f32,                // llvm.nvvm.tex.1d.grad.v4u32.f32
   3844     nvvm_tex_1d_level_v4f32_f32,               // llvm.nvvm.tex.1d.level.v4f32.f32
   3845     nvvm_tex_1d_level_v4s32_f32,               // llvm.nvvm.tex.1d.level.v4s32.f32
   3846     nvvm_tex_1d_level_v4u32_f32,               // llvm.nvvm.tex.1d.level.v4u32.f32
   3847     nvvm_tex_1d_v4f32_f32,                     // llvm.nvvm.tex.1d.v4f32.f32
   3848     nvvm_tex_1d_v4f32_s32,                     // llvm.nvvm.tex.1d.v4f32.s32
   3849     nvvm_tex_1d_v4s32_f32,                     // llvm.nvvm.tex.1d.v4s32.f32
   3850     nvvm_tex_1d_v4s32_s32,                     // llvm.nvvm.tex.1d.v4s32.s32
   3851     nvvm_tex_1d_v4u32_f32,                     // llvm.nvvm.tex.1d.v4u32.f32
   3852     nvvm_tex_1d_v4u32_s32,                     // llvm.nvvm.tex.1d.v4u32.s32
   3853     nvvm_tex_2d_array_grad_v4f32_f32,          // llvm.nvvm.tex.2d.array.grad.v4f32.f32
   3854     nvvm_tex_2d_array_grad_v4s32_f32,          // llvm.nvvm.tex.2d.array.grad.v4s32.f32
   3855     nvvm_tex_2d_array_grad_v4u32_f32,          // llvm.nvvm.tex.2d.array.grad.v4u32.f32
   3856     nvvm_tex_2d_array_level_v4f32_f32,         // llvm.nvvm.tex.2d.array.level.v4f32.f32
   3857     nvvm_tex_2d_array_level_v4s32_f32,         // llvm.nvvm.tex.2d.array.level.v4s32.f32
   3858     nvvm_tex_2d_array_level_v4u32_f32,         // llvm.nvvm.tex.2d.array.level.v4u32.f32
   3859     nvvm_tex_2d_array_v4f32_f32,               // llvm.nvvm.tex.2d.array.v4f32.f32
   3860     nvvm_tex_2d_array_v4f32_s32,               // llvm.nvvm.tex.2d.array.v4f32.s32
   3861     nvvm_tex_2d_array_v4s32_f32,               // llvm.nvvm.tex.2d.array.v4s32.f32
   3862     nvvm_tex_2d_array_v4s32_s32,               // llvm.nvvm.tex.2d.array.v4s32.s32
   3863     nvvm_tex_2d_array_v4u32_f32,               // llvm.nvvm.tex.2d.array.v4u32.f32
   3864     nvvm_tex_2d_array_v4u32_s32,               // llvm.nvvm.tex.2d.array.v4u32.s32
   3865     nvvm_tex_2d_grad_v4f32_f32,                // llvm.nvvm.tex.2d.grad.v4f32.f32
   3866     nvvm_tex_2d_grad_v4s32_f32,                // llvm.nvvm.tex.2d.grad.v4s32.f32
   3867     nvvm_tex_2d_grad_v4u32_f32,                // llvm.nvvm.tex.2d.grad.v4u32.f32
   3868     nvvm_tex_2d_level_v4f32_f32,               // llvm.nvvm.tex.2d.level.v4f32.f32
   3869     nvvm_tex_2d_level_v4s32_f32,               // llvm.nvvm.tex.2d.level.v4s32.f32
   3870     nvvm_tex_2d_level_v4u32_f32,               // llvm.nvvm.tex.2d.level.v4u32.f32
   3871     nvvm_tex_2d_v4f32_f32,                     // llvm.nvvm.tex.2d.v4f32.f32
   3872     nvvm_tex_2d_v4f32_s32,                     // llvm.nvvm.tex.2d.v4f32.s32
   3873     nvvm_tex_2d_v4s32_f32,                     // llvm.nvvm.tex.2d.v4s32.f32
   3874     nvvm_tex_2d_v4s32_s32,                     // llvm.nvvm.tex.2d.v4s32.s32
   3875     nvvm_tex_2d_v4u32_f32,                     // llvm.nvvm.tex.2d.v4u32.f32
   3876     nvvm_tex_2d_v4u32_s32,                     // llvm.nvvm.tex.2d.v4u32.s32
   3877     nvvm_tex_3d_grad_v4f32_f32,                // llvm.nvvm.tex.3d.grad.v4f32.f32
   3878     nvvm_tex_3d_grad_v4s32_f32,                // llvm.nvvm.tex.3d.grad.v4s32.f32
   3879     nvvm_tex_3d_grad_v4u32_f32,                // llvm.nvvm.tex.3d.grad.v4u32.f32
   3880     nvvm_tex_3d_level_v4f32_f32,               // llvm.nvvm.tex.3d.level.v4f32.f32
   3881     nvvm_tex_3d_level_v4s32_f32,               // llvm.nvvm.tex.3d.level.v4s32.f32
   3882     nvvm_tex_3d_level_v4u32_f32,               // llvm.nvvm.tex.3d.level.v4u32.f32
   3883     nvvm_tex_3d_v4f32_f32,                     // llvm.nvvm.tex.3d.v4f32.f32
   3884     nvvm_tex_3d_v4f32_s32,                     // llvm.nvvm.tex.3d.v4f32.s32
   3885     nvvm_tex_3d_v4s32_f32,                     // llvm.nvvm.tex.3d.v4s32.f32
   3886     nvvm_tex_3d_v4s32_s32,                     // llvm.nvvm.tex.3d.v4s32.s32
   3887     nvvm_tex_3d_v4u32_f32,                     // llvm.nvvm.tex.3d.v4u32.f32
   3888     nvvm_tex_3d_v4u32_s32,                     // llvm.nvvm.tex.3d.v4u32.s32
   3889     nvvm_tex_cube_array_level_v4f32_f32,       // llvm.nvvm.tex.cube.array.level.v4f32.f32
   3890     nvvm_tex_cube_array_level_v4s32_f32,       // llvm.nvvm.tex.cube.array.level.v4s32.f32
   3891     nvvm_tex_cube_array_level_v4u32_f32,       // llvm.nvvm.tex.cube.array.level.v4u32.f32
   3892     nvvm_tex_cube_array_v4f32_f32,             // llvm.nvvm.tex.cube.array.v4f32.f32
   3893     nvvm_tex_cube_array_v4s32_f32,             // llvm.nvvm.tex.cube.array.v4s32.f32
   3894     nvvm_tex_cube_array_v4u32_f32,             // llvm.nvvm.tex.cube.array.v4u32.f32
   3895     nvvm_tex_cube_level_v4f32_f32,             // llvm.nvvm.tex.cube.level.v4f32.f32
   3896     nvvm_tex_cube_level_v4s32_f32,             // llvm.nvvm.tex.cube.level.v4s32.f32
   3897     nvvm_tex_cube_level_v4u32_f32,             // llvm.nvvm.tex.cube.level.v4u32.f32
   3898     nvvm_tex_cube_v4f32_f32,                   // llvm.nvvm.tex.cube.v4f32.f32
   3899     nvvm_tex_cube_v4s32_f32,                   // llvm.nvvm.tex.cube.v4s32.f32
   3900     nvvm_tex_cube_v4u32_f32,                   // llvm.nvvm.tex.cube.v4u32.f32
   3901     nvvm_tex_unified_1d_array_grad_v4f32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32
   3902     nvvm_tex_unified_1d_array_grad_v4s32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32
   3903     nvvm_tex_unified_1d_array_grad_v4u32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32
   3904     nvvm_tex_unified_1d_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32
   3905     nvvm_tex_unified_1d_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32
   3906     nvvm_tex_unified_1d_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32
   3907     nvvm_tex_unified_1d_array_v4f32_f32,       // llvm.nvvm.tex.unified.1d.array.v4f32.f32
   3908     nvvm_tex_unified_1d_array_v4f32_s32,       // llvm.nvvm.tex.unified.1d.array.v4f32.s32
   3909     nvvm_tex_unified_1d_array_v4s32_f32,       // llvm.nvvm.tex.unified.1d.array.v4s32.f32
   3910     nvvm_tex_unified_1d_array_v4s32_s32,       // llvm.nvvm.tex.unified.1d.array.v4s32.s32
   3911     nvvm_tex_unified_1d_array_v4u32_f32,       // llvm.nvvm.tex.unified.1d.array.v4u32.f32
   3912     nvvm_tex_unified_1d_array_v4u32_s32,       // llvm.nvvm.tex.unified.1d.array.v4u32.s32
   3913     nvvm_tex_unified_1d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4f32.f32
   3914     nvvm_tex_unified_1d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4s32.f32
   3915     nvvm_tex_unified_1d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4u32.f32
   3916     nvvm_tex_unified_1d_level_v4f32_f32,       // llvm.nvvm.tex.unified.1d.level.v4f32.f32
   3917     nvvm_tex_unified_1d_level_v4s32_f32,       // llvm.nvvm.tex.unified.1d.level.v4s32.f32
   3918     nvvm_tex_unified_1d_level_v4u32_f32,       // llvm.nvvm.tex.unified.1d.level.v4u32.f32
   3919     nvvm_tex_unified_1d_v4f32_f32,             // llvm.nvvm.tex.unified.1d.v4f32.f32
   3920     nvvm_tex_unified_1d_v4f32_s32,             // llvm.nvvm.tex.unified.1d.v4f32.s32
   3921     nvvm_tex_unified_1d_v4s32_f32,             // llvm.nvvm.tex.unified.1d.v4s32.f32
   3922     nvvm_tex_unified_1d_v4s32_s32,             // llvm.nvvm.tex.unified.1d.v4s32.s32
   3923     nvvm_tex_unified_1d_v4u32_f32,             // llvm.nvvm.tex.unified.1d.v4u32.f32
   3924     nvvm_tex_unified_1d_v4u32_s32,             // llvm.nvvm.tex.unified.1d.v4u32.s32
   3925     nvvm_tex_unified_2d_array_grad_v4f32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32
   3926     nvvm_tex_unified_2d_array_grad_v4s32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32
   3927     nvvm_tex_unified_2d_array_grad_v4u32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32
   3928     nvvm_tex_unified_2d_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32
   3929     nvvm_tex_unified_2d_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32
   3930     nvvm_tex_unified_2d_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32
   3931     nvvm_tex_unified_2d_array_v4f32_f32,       // llvm.nvvm.tex.unified.2d.array.v4f32.f32
   3932     nvvm_tex_unified_2d_array_v4f32_s32,       // llvm.nvvm.tex.unified.2d.array.v4f32.s32
   3933     nvvm_tex_unified_2d_array_v4s32_f32,       // llvm.nvvm.tex.unified.2d.array.v4s32.f32
   3934     nvvm_tex_unified_2d_array_v4s32_s32,       // llvm.nvvm.tex.unified.2d.array.v4s32.s32
   3935     nvvm_tex_unified_2d_array_v4u32_f32,       // llvm.nvvm.tex.unified.2d.array.v4u32.f32
   3936     nvvm_tex_unified_2d_array_v4u32_s32,       // llvm.nvvm.tex.unified.2d.array.v4u32.s32
   3937     nvvm_tex_unified_2d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4f32.f32
   3938     nvvm_tex_unified_2d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4s32.f32
   3939     nvvm_tex_unified_2d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4u32.f32
   3940     nvvm_tex_unified_2d_level_v4f32_f32,       // llvm.nvvm.tex.unified.2d.level.v4f32.f32
   3941     nvvm_tex_unified_2d_level_v4s32_f32,       // llvm.nvvm.tex.unified.2d.level.v4s32.f32
   3942     nvvm_tex_unified_2d_level_v4u32_f32,       // llvm.nvvm.tex.unified.2d.level.v4u32.f32
   3943     nvvm_tex_unified_2d_v4f32_f32,             // llvm.nvvm.tex.unified.2d.v4f32.f32
   3944     nvvm_tex_unified_2d_v4f32_s32,             // llvm.nvvm.tex.unified.2d.v4f32.s32
   3945     nvvm_tex_unified_2d_v4s32_f32,             // llvm.nvvm.tex.unified.2d.v4s32.f32
   3946     nvvm_tex_unified_2d_v4s32_s32,             // llvm.nvvm.tex.unified.2d.v4s32.s32
   3947     nvvm_tex_unified_2d_v4u32_f32,             // llvm.nvvm.tex.unified.2d.v4u32.f32
   3948     nvvm_tex_unified_2d_v4u32_s32,             // llvm.nvvm.tex.unified.2d.v4u32.s32
   3949     nvvm_tex_unified_3d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4f32.f32
   3950     nvvm_tex_unified_3d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4s32.f32
   3951     nvvm_tex_unified_3d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4u32.f32
   3952     nvvm_tex_unified_3d_level_v4f32_f32,       // llvm.nvvm.tex.unified.3d.level.v4f32.f32
   3953     nvvm_tex_unified_3d_level_v4s32_f32,       // llvm.nvvm.tex.unified.3d.level.v4s32.f32
   3954     nvvm_tex_unified_3d_level_v4u32_f32,       // llvm.nvvm.tex.unified.3d.level.v4u32.f32
   3955     nvvm_tex_unified_3d_v4f32_f32,             // llvm.nvvm.tex.unified.3d.v4f32.f32
   3956     nvvm_tex_unified_3d_v4f32_s32,             // llvm.nvvm.tex.unified.3d.v4f32.s32
   3957     nvvm_tex_unified_3d_v4s32_f32,             // llvm.nvvm.tex.unified.3d.v4s32.f32
   3958     nvvm_tex_unified_3d_v4s32_s32,             // llvm.nvvm.tex.unified.3d.v4s32.s32
   3959     nvvm_tex_unified_3d_v4u32_f32,             // llvm.nvvm.tex.unified.3d.v4u32.f32
   3960     nvvm_tex_unified_3d_v4u32_s32,             // llvm.nvvm.tex.unified.3d.v4u32.s32
   3961     nvvm_tex_unified_cube_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32
   3962     nvvm_tex_unified_cube_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32
   3963     nvvm_tex_unified_cube_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32
   3964     nvvm_tex_unified_cube_array_v4f32_f32,     // llvm.nvvm.tex.unified.cube.array.v4f32.f32
   3965     nvvm_tex_unified_cube_array_v4s32_f32,     // llvm.nvvm.tex.unified.cube.array.v4s32.f32
   3966     nvvm_tex_unified_cube_array_v4u32_f32,     // llvm.nvvm.tex.unified.cube.array.v4u32.f32
   3967     nvvm_tex_unified_cube_level_v4f32_f32,     // llvm.nvvm.tex.unified.cube.level.v4f32.f32
   3968     nvvm_tex_unified_cube_level_v4s32_f32,     // llvm.nvvm.tex.unified.cube.level.v4s32.f32
   3969     nvvm_tex_unified_cube_level_v4u32_f32,     // llvm.nvvm.tex.unified.cube.level.v4u32.f32
   3970     nvvm_tex_unified_cube_v4f32_f32,           // llvm.nvvm.tex.unified.cube.v4f32.f32
   3971     nvvm_tex_unified_cube_v4s32_f32,           // llvm.nvvm.tex.unified.cube.v4s32.f32
   3972     nvvm_tex_unified_cube_v4u32_f32,           // llvm.nvvm.tex.unified.cube.v4u32.f32
   3973     nvvm_texsurf_handle,                       // llvm.nvvm.texsurf.handle
   3974     nvvm_texsurf_handle_internal,              // llvm.nvvm.texsurf.handle.internal
   3975     nvvm_tld4_a_2d_v4f32_f32,                  // llvm.nvvm.tld4.a.2d.v4f32.f32
   3976     nvvm_tld4_a_2d_v4s32_f32,                  // llvm.nvvm.tld4.a.2d.v4s32.f32
   3977     nvvm_tld4_a_2d_v4u32_f32,                  // llvm.nvvm.tld4.a.2d.v4u32.f32
   3978     nvvm_tld4_b_2d_v4f32_f32,                  // llvm.nvvm.tld4.b.2d.v4f32.f32
   3979     nvvm_tld4_b_2d_v4s32_f32,                  // llvm.nvvm.tld4.b.2d.v4s32.f32
   3980     nvvm_tld4_b_2d_v4u32_f32,                  // llvm.nvvm.tld4.b.2d.v4u32.f32
   3981     nvvm_tld4_g_2d_v4f32_f32,                  // llvm.nvvm.tld4.g.2d.v4f32.f32
   3982     nvvm_tld4_g_2d_v4s32_f32,                  // llvm.nvvm.tld4.g.2d.v4s32.f32
   3983     nvvm_tld4_g_2d_v4u32_f32,                  // llvm.nvvm.tld4.g.2d.v4u32.f32
   3984     nvvm_tld4_r_2d_v4f32_f32,                  // llvm.nvvm.tld4.r.2d.v4f32.f32
   3985     nvvm_tld4_r_2d_v4s32_f32,                  // llvm.nvvm.tld4.r.2d.v4s32.f32
   3986     nvvm_tld4_r_2d_v4u32_f32,                  // llvm.nvvm.tld4.r.2d.v4u32.f32
   3987     nvvm_tld4_unified_a_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4f32.f32
   3988     nvvm_tld4_unified_a_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4s32.f32
   3989     nvvm_tld4_unified_a_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4u32.f32
   3990     nvvm_tld4_unified_b_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4f32.f32
   3991     nvvm_tld4_unified_b_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4s32.f32
   3992     nvvm_tld4_unified_b_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4u32.f32
   3993     nvvm_tld4_unified_g_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4f32.f32
   3994     nvvm_tld4_unified_g_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4s32.f32
   3995     nvvm_tld4_unified_g_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4u32.f32
   3996     nvvm_tld4_unified_r_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4f32.f32
   3997     nvvm_tld4_unified_r_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4s32.f32
   3998     nvvm_tld4_unified_r_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4u32.f32
   3999     nvvm_trunc_d,                              // llvm.nvvm.trunc.d
   4000     nvvm_trunc_f,                              // llvm.nvvm.trunc.f
   4001     nvvm_trunc_ftz_f,                          // llvm.nvvm.trunc.ftz.f
   4002     nvvm_txq_array_size,                       // llvm.nvvm.txq.array.size
   4003     nvvm_txq_channel_data_type,                // llvm.nvvm.txq.channel.data.type
   4004     nvvm_txq_channel_order,                    // llvm.nvvm.txq.channel.order
   4005     nvvm_txq_depth,                            // llvm.nvvm.txq.depth
   4006     nvvm_txq_height,                           // llvm.nvvm.txq.height
   4007     nvvm_txq_num_mipmap_levels,                // llvm.nvvm.txq.num.mipmap.levels
   4008     nvvm_txq_num_samples,                      // llvm.nvvm.txq.num.samples
   4009     nvvm_txq_width,                            // llvm.nvvm.txq.width
   4010     nvvm_ui2d_rm,                              // llvm.nvvm.ui2d.rm
   4011     nvvm_ui2d_rn,                              // llvm.nvvm.ui2d.rn
   4012     nvvm_ui2d_rp,                              // llvm.nvvm.ui2d.rp
   4013     nvvm_ui2d_rz,                              // llvm.nvvm.ui2d.rz
   4014     nvvm_ui2f_rm,                              // llvm.nvvm.ui2f.rm
   4015     nvvm_ui2f_rn,                              // llvm.nvvm.ui2f.rn
   4016     nvvm_ui2f_rp,                              // llvm.nvvm.ui2f.rp
   4017     nvvm_ui2f_rz,                              // llvm.nvvm.ui2f.rz
   4018     nvvm_ull2d_rm,                             // llvm.nvvm.ull2d.rm
   4019     nvvm_ull2d_rn,                             // llvm.nvvm.ull2d.rn
   4020     nvvm_ull2d_rp,                             // llvm.nvvm.ull2d.rp
   4021     nvvm_ull2d_rz,                             // llvm.nvvm.ull2d.rz
   4022     nvvm_ull2f_rm,                             // llvm.nvvm.ull2f.rm
   4023     nvvm_ull2f_rn,                             // llvm.nvvm.ull2f.rn
   4024     nvvm_ull2f_rp,                             // llvm.nvvm.ull2f.rp
   4025     nvvm_ull2f_rz,                             // llvm.nvvm.ull2f.rz
   4026     nvvm_vote_all,                             // llvm.nvvm.vote.all
   4027     nvvm_vote_all_sync,                        // llvm.nvvm.vote.all.sync
   4028     nvvm_vote_any,                             // llvm.nvvm.vote.any
   4029     nvvm_vote_any_sync,                        // llvm.nvvm.vote.any.sync
   4030     nvvm_vote_ballot,                          // llvm.nvvm.vote.ballot
   4031     nvvm_vote_ballot_sync,                     // llvm.nvvm.vote.ballot.sync
   4032     nvvm_vote_uni,                             // llvm.nvvm.vote.uni
   4033     nvvm_vote_uni_sync,                        // llvm.nvvm.vote.uni.sync
   4034     nvvm_wmma_load_a_f16_col,                  // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.f16
   4035     nvvm_wmma_load_a_f16_col_global,           // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.f16
   4036     nvvm_wmma_load_a_f16_col_global_stride,    // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.stride.f16
   4037     nvvm_wmma_load_a_f16_col_shared,           // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.f16
   4038     nvvm_wmma_load_a_f16_col_shared_stride,    // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.stride.f16
   4039     nvvm_wmma_load_a_f16_col_stride,           // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.stride.f16
   4040     nvvm_wmma_load_a_f16_row,                  // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.f16
   4041     nvvm_wmma_load_a_f16_row_global,           // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.f16
   4042     nvvm_wmma_load_a_f16_row_global_stride,    // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.stride.f16
   4043     nvvm_wmma_load_a_f16_row_shared,           // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.f16
   4044     nvvm_wmma_load_a_f16_row_shared_stride,    // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.stride.f16
   4045     nvvm_wmma_load_a_f16_row_stride,           // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.stride.f16
   4046     nvvm_wmma_load_b_f16_col,                  // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.f16
   4047     nvvm_wmma_load_b_f16_col_global,           // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.f16
   4048     nvvm_wmma_load_b_f16_col_global_stride,    // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.stride.f16
   4049     nvvm_wmma_load_b_f16_col_shared,           // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.f16
   4050     nvvm_wmma_load_b_f16_col_shared_stride,    // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.stride.f16
   4051     nvvm_wmma_load_b_f16_col_stride,           // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.stride.f16
   4052     nvvm_wmma_load_b_f16_row,                  // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.f16
   4053     nvvm_wmma_load_b_f16_row_global,           // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.f16
   4054     nvvm_wmma_load_b_f16_row_global_stride,    // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.stride.f16
   4055     nvvm_wmma_load_b_f16_row_shared,           // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.f16
   4056     nvvm_wmma_load_b_f16_row_shared_stride,    // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.stride.f16
   4057     nvvm_wmma_load_b_f16_row_stride,           // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.stride.f16
   4058     nvvm_wmma_load_c_f16_col,                  // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f16
   4059     nvvm_wmma_load_c_f32_col,                  // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f32
   4060     nvvm_wmma_load_c_f16_col_global,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f16
   4061     nvvm_wmma_load_c_f32_col_global,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f32
   4062     nvvm_wmma_load_c_f16_col_global_stride,    // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f16
   4063     nvvm_wmma_load_c_f32_col_global_stride,    // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f32
   4064     nvvm_wmma_load_c_f16_col_shared,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f16
   4065     nvvm_wmma_load_c_f32_col_shared,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f32
   4066     nvvm_wmma_load_c_f16_col_shared_stride,    // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f16
   4067     nvvm_wmma_load_c_f32_col_shared_stride,    // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f32
   4068     nvvm_wmma_load_c_f16_col_stride,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f16
   4069     nvvm_wmma_load_c_f32_col_stride,           // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f32
   4070     nvvm_wmma_load_c_f16_row,                  // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f16
   4071     nvvm_wmma_load_c_f32_row,                  // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f32
   4072     nvvm_wmma_load_c_f16_row_global,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f16
   4073     nvvm_wmma_load_c_f32_row_global,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f32
   4074     nvvm_wmma_load_c_f16_row_global_stride,    // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f16
   4075     nvvm_wmma_load_c_f32_row_global_stride,    // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f32
   4076     nvvm_wmma_load_c_f16_row_shared,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f16
   4077     nvvm_wmma_load_c_f32_row_shared,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f32
   4078     nvvm_wmma_load_c_f16_row_shared_stride,    // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f16
   4079     nvvm_wmma_load_c_f32_row_shared_stride,    // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f32
   4080     nvvm_wmma_load_c_f16_row_stride,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f16
   4081     nvvm_wmma_load_c_f32_row_stride,           // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f32
   4082     nvvm_wmma_mma_sync_col_col_f16_f16,        // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16
   4083     nvvm_wmma_mma_sync_col_col_f16_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16.satfinite
   4084     nvvm_wmma_mma_sync_col_col_f16_f32,        // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32
   4085     nvvm_wmma_mma_sync_col_col_f16_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32.satfinite
   4086     nvvm_wmma_mma_sync_col_col_f32_f16,        // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16
   4087     nvvm_wmma_mma_sync_col_col_f32_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16.satfinite
   4088     nvvm_wmma_mma_sync_col_col_f32_f32,        // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32
   4089     nvvm_wmma_mma_sync_col_col_f32_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32.satfinite
   4090     nvvm_wmma_mma_sync_col_row_f16_f16,        // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16
   4091     nvvm_wmma_mma_sync_col_row_f16_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16.satfinite
   4092     nvvm_wmma_mma_sync_col_row_f16_f32,        // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32
   4093     nvvm_wmma_mma_sync_col_row_f16_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32.satfinite
   4094     nvvm_wmma_mma_sync_col_row_f32_f16,        // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16
   4095     nvvm_wmma_mma_sync_col_row_f32_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16.satfinite
   4096     nvvm_wmma_mma_sync_col_row_f32_f32,        // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32
   4097     nvvm_wmma_mma_sync_col_row_f32_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32.satfinite
   4098     nvvm_wmma_mma_sync_row_col_f16_f16,        // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16
   4099     nvvm_wmma_mma_sync_row_col_f16_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16.satfinite
   4100     nvvm_wmma_mma_sync_row_col_f16_f32,        // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32
   4101     nvvm_wmma_mma_sync_row_col_f16_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32.satfinite
   4102     nvvm_wmma_mma_sync_row_col_f32_f16,        // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16
   4103     nvvm_wmma_mma_sync_row_col_f32_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16.satfinite
   4104     nvvm_wmma_mma_sync_row_col_f32_f32,        // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32
   4105     nvvm_wmma_mma_sync_row_col_f32_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32.satfinite
   4106     nvvm_wmma_mma_sync_row_row_f16_f16,        // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16
   4107     nvvm_wmma_mma_sync_row_row_f16_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16.satfinite
   4108     nvvm_wmma_mma_sync_row_row_f16_f32,        // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32
   4109     nvvm_wmma_mma_sync_row_row_f16_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32.satfinite
   4110     nvvm_wmma_mma_sync_row_row_f32_f16,        // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16
   4111     nvvm_wmma_mma_sync_row_row_f32_f16_satfinite,  // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16.satfinite
   4112     nvvm_wmma_mma_sync_row_row_f32_f32,        // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32
   4113     nvvm_wmma_mma_sync_row_row_f32_f32_satfinite,  // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32.satfinite
   4114     nvvm_wmma_store_d_f16_col,                 // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f16
   4115     nvvm_wmma_store_d_f32_col,                 // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f32
   4116     nvvm_wmma_store_d_f16_col_global,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f16
   4117     nvvm_wmma_store_d_f32_col_global,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f32
   4118     nvvm_wmma_store_d_f16_col_global_stride,   // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f16
   4119     nvvm_wmma_store_d_f32_col_global_stride,   // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f32
   4120     nvvm_wmma_store_d_f16_col_shared,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f16
   4121     nvvm_wmma_store_d_f32_col_shared,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f32
   4122     nvvm_wmma_store_d_f16_col_shared_stride,   // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f16
   4123     nvvm_wmma_store_d_f32_col_shared_stride,   // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f32
   4124     nvvm_wmma_store_d_f16_col_stride,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f16
   4125     nvvm_wmma_store_d_f32_col_stride,          // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f32
   4126     nvvm_wmma_store_d_f16_row,                 // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f16
   4127     nvvm_wmma_store_d_f32_row,                 // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f32
   4128     nvvm_wmma_store_d_f16_row_global,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f16
   4129     nvvm_wmma_store_d_f32_row_global,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f32
   4130     nvvm_wmma_store_d_f16_row_global_stride,   // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f16
   4131     nvvm_wmma_store_d_f32_row_global_stride,   // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f32
   4132     nvvm_wmma_store_d_f16_row_shared,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f16
   4133     nvvm_wmma_store_d_f32_row_shared,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f32
   4134     nvvm_wmma_store_d_f16_row_shared_stride,   // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f16
   4135     nvvm_wmma_store_d_f32_row_shared_stride,   // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f32
   4136     nvvm_wmma_store_d_f16_row_stride,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f16
   4137     nvvm_wmma_store_d_f32_row_stride,          // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f32
   4138     ppc_altivec_crypto_vcipher,                // llvm.ppc.altivec.crypto.vcipher
   4139     ppc_altivec_crypto_vcipherlast,            // llvm.ppc.altivec.crypto.vcipherlast
   4140     ppc_altivec_crypto_vncipher,               // llvm.ppc.altivec.crypto.vncipher
   4141     ppc_altivec_crypto_vncipherlast,           // llvm.ppc.altivec.crypto.vncipherlast
   4142     ppc_altivec_crypto_vpermxor,               // llvm.ppc.altivec.crypto.vpermxor
   4143     ppc_altivec_crypto_vpmsumb,                // llvm.ppc.altivec.crypto.vpmsumb
   4144     ppc_altivec_crypto_vpmsumd,                // llvm.ppc.altivec.crypto.vpmsumd
   4145     ppc_altivec_crypto_vpmsumh,                // llvm.ppc.altivec.crypto.vpmsumh
   4146     ppc_altivec_crypto_vpmsumw,                // llvm.ppc.altivec.crypto.vpmsumw
   4147     ppc_altivec_crypto_vsbox,                  // llvm.ppc.altivec.crypto.vsbox
   4148     ppc_altivec_crypto_vshasigmad,             // llvm.ppc.altivec.crypto.vshasigmad
   4149     ppc_altivec_crypto_vshasigmaw,             // llvm.ppc.altivec.crypto.vshasigmaw
   4150     ppc_altivec_dss,                           // llvm.ppc.altivec.dss
   4151     ppc_altivec_dssall,                        // llvm.ppc.altivec.dssall
   4152     ppc_altivec_dst,                           // llvm.ppc.altivec.dst
   4153     ppc_altivec_dstst,                         // llvm.ppc.altivec.dstst
   4154     ppc_altivec_dststt,                        // llvm.ppc.altivec.dststt
   4155     ppc_altivec_dstt,                          // llvm.ppc.altivec.dstt
   4156     ppc_altivec_lvebx,                         // llvm.ppc.altivec.lvebx
   4157     ppc_altivec_lvehx,                         // llvm.ppc.altivec.lvehx
   4158     ppc_altivec_lvewx,                         // llvm.ppc.altivec.lvewx
   4159     ppc_altivec_lvsl,                          // llvm.ppc.altivec.lvsl
   4160     ppc_altivec_lvsr,                          // llvm.ppc.altivec.lvsr
   4161     ppc_altivec_lvx,                           // llvm.ppc.altivec.lvx
   4162     ppc_altivec_lvxl,                          // llvm.ppc.altivec.lvxl
   4163     ppc_altivec_mfvscr,                        // llvm.ppc.altivec.mfvscr
   4164     ppc_altivec_mtvscr,                        // llvm.ppc.altivec.mtvscr
   4165     ppc_altivec_stvebx,                        // llvm.ppc.altivec.stvebx
   4166     ppc_altivec_stvehx,                        // llvm.ppc.altivec.stvehx
   4167     ppc_altivec_stvewx,                        // llvm.ppc.altivec.stvewx
   4168     ppc_altivec_stvx,                          // llvm.ppc.altivec.stvx
   4169     ppc_altivec_stvxl,                         // llvm.ppc.altivec.stvxl
   4170     ppc_altivec_vabsdub,                       // llvm.ppc.altivec.vabsdub
   4171     ppc_altivec_vabsduh,                       // llvm.ppc.altivec.vabsduh
   4172     ppc_altivec_vabsduw,                       // llvm.ppc.altivec.vabsduw
   4173     ppc_altivec_vaddcuq,                       // llvm.ppc.altivec.vaddcuq
   4174     ppc_altivec_vaddcuw,                       // llvm.ppc.altivec.vaddcuw
   4175     ppc_altivec_vaddecuq,                      // llvm.ppc.altivec.vaddecuq
   4176     ppc_altivec_vaddeuqm,                      // llvm.ppc.altivec.vaddeuqm
   4177     ppc_altivec_vaddsbs,                       // llvm.ppc.altivec.vaddsbs
   4178     ppc_altivec_vaddshs,                       // llvm.ppc.altivec.vaddshs
   4179     ppc_altivec_vaddsws,                       // llvm.ppc.altivec.vaddsws
   4180     ppc_altivec_vaddubs,                       // llvm.ppc.altivec.vaddubs
   4181     ppc_altivec_vadduhs,                       // llvm.ppc.altivec.vadduhs
   4182     ppc_altivec_vadduws,                       // llvm.ppc.altivec.vadduws
   4183     ppc_altivec_vavgsb,                        // llvm.ppc.altivec.vavgsb
   4184     ppc_altivec_vavgsh,                        // llvm.ppc.altivec.vavgsh
   4185     ppc_altivec_vavgsw,                        // llvm.ppc.altivec.vavgsw
   4186     ppc_altivec_vavgub,                        // llvm.ppc.altivec.vavgub
   4187     ppc_altivec_vavguh,                        // llvm.ppc.altivec.vavguh
   4188     ppc_altivec_vavguw,                        // llvm.ppc.altivec.vavguw
   4189     ppc_altivec_vbpermq,                       // llvm.ppc.altivec.vbpermq
   4190     ppc_altivec_vcfsx,                         // llvm.ppc.altivec.vcfsx
   4191     ppc_altivec_vcfux,                         // llvm.ppc.altivec.vcfux
   4192     ppc_altivec_vclzlsbb,                      // llvm.ppc.altivec.vclzlsbb
   4193     ppc_altivec_vcmpbfp,                       // llvm.ppc.altivec.vcmpbfp
   4194     ppc_altivec_vcmpbfp_p,                     // llvm.ppc.altivec.vcmpbfp.p
   4195     ppc_altivec_vcmpeqfp,                      // llvm.ppc.altivec.vcmpeqfp
   4196     ppc_altivec_vcmpeqfp_p,                    // llvm.ppc.altivec.vcmpeqfp.p
   4197     ppc_altivec_vcmpequb,                      // llvm.ppc.altivec.vcmpequb
   4198     ppc_altivec_vcmpequb_p,                    // llvm.ppc.altivec.vcmpequb.p
   4199     ppc_altivec_vcmpequd,                      // llvm.ppc.altivec.vcmpequd
   4200     ppc_altivec_vcmpequd_p,                    // llvm.ppc.altivec.vcmpequd.p
   4201     ppc_altivec_vcmpequh,                      // llvm.ppc.altivec.vcmpequh
   4202     ppc_altivec_vcmpequh_p,                    // llvm.ppc.altivec.vcmpequh.p
   4203     ppc_altivec_vcmpequw,                      // llvm.ppc.altivec.vcmpequw
   4204     ppc_altivec_vcmpequw_p,                    // llvm.ppc.altivec.vcmpequw.p
   4205     ppc_altivec_vcmpgefp,                      // llvm.ppc.altivec.vcmpgefp
   4206     ppc_altivec_vcmpgefp_p,                    // llvm.ppc.altivec.vcmpgefp.p
   4207     ppc_altivec_vcmpgtfp,                      // llvm.ppc.altivec.vcmpgtfp
   4208     ppc_altivec_vcmpgtfp_p,                    // llvm.ppc.altivec.vcmpgtfp.p
   4209     ppc_altivec_vcmpgtsb,                      // llvm.ppc.altivec.vcmpgtsb
   4210     ppc_altivec_vcmpgtsb_p,                    // llvm.ppc.altivec.vcmpgtsb.p
   4211     ppc_altivec_vcmpgtsd,                      // llvm.ppc.altivec.vcmpgtsd
   4212     ppc_altivec_vcmpgtsd_p,                    // llvm.ppc.altivec.vcmpgtsd.p
   4213     ppc_altivec_vcmpgtsh,                      // llvm.ppc.altivec.vcmpgtsh
   4214     ppc_altivec_vcmpgtsh_p,                    // llvm.ppc.altivec.vcmpgtsh.p
   4215     ppc_altivec_vcmpgtsw,                      // llvm.ppc.altivec.vcmpgtsw
   4216     ppc_altivec_vcmpgtsw_p,                    // llvm.ppc.altivec.vcmpgtsw.p
   4217     ppc_altivec_vcmpgtub,                      // llvm.ppc.altivec.vcmpgtub
   4218     ppc_altivec_vcmpgtub_p,                    // llvm.ppc.altivec.vcmpgtub.p
   4219     ppc_altivec_vcmpgtud,                      // llvm.ppc.altivec.vcmpgtud
   4220     ppc_altivec_vcmpgtud_p,                    // llvm.ppc.altivec.vcmpgtud.p
   4221     ppc_altivec_vcmpgtuh,                      // llvm.ppc.altivec.vcmpgtuh
   4222     ppc_altivec_vcmpgtuh_p,                    // llvm.ppc.altivec.vcmpgtuh.p
   4223     ppc_altivec_vcmpgtuw,                      // llvm.ppc.altivec.vcmpgtuw
   4224     ppc_altivec_vcmpgtuw_p,                    // llvm.ppc.altivec.vcmpgtuw.p
   4225     ppc_altivec_vcmpneb,                       // llvm.ppc.altivec.vcmpneb
   4226     ppc_altivec_vcmpneb_p,                     // llvm.ppc.altivec.vcmpneb.p
   4227     ppc_altivec_vcmpneh,                       // llvm.ppc.altivec.vcmpneh
   4228     ppc_altivec_vcmpneh_p,                     // llvm.ppc.altivec.vcmpneh.p
   4229     ppc_altivec_vcmpnew,                       // llvm.ppc.altivec.vcmpnew
   4230     ppc_altivec_vcmpnew_p,                     // llvm.ppc.altivec.vcmpnew.p
   4231     ppc_altivec_vcmpnezb,                      // llvm.ppc.altivec.vcmpnezb
   4232     ppc_altivec_vcmpnezb_p,                    // llvm.ppc.altivec.vcmpnezb.p
   4233     ppc_altivec_vcmpnezh,                      // llvm.ppc.altivec.vcmpnezh
   4234     ppc_altivec_vcmpnezh_p,                    // llvm.ppc.altivec.vcmpnezh.p
   4235     ppc_altivec_vcmpnezw,                      // llvm.ppc.altivec.vcmpnezw
   4236     ppc_altivec_vcmpnezw_p,                    // llvm.ppc.altivec.vcmpnezw.p
   4237     ppc_altivec_vctsxs,                        // llvm.ppc.altivec.vctsxs
   4238     ppc_altivec_vctuxs,                        // llvm.ppc.altivec.vctuxs
   4239     ppc_altivec_vctzlsbb,                      // llvm.ppc.altivec.vctzlsbb
   4240     ppc_altivec_vexptefp,                      // llvm.ppc.altivec.vexptefp
   4241     ppc_altivec_vgbbd,                         // llvm.ppc.altivec.vgbbd
   4242     ppc_altivec_vlogefp,                       // llvm.ppc.altivec.vlogefp
   4243     ppc_altivec_vmaddfp,                       // llvm.ppc.altivec.vmaddfp
   4244     ppc_altivec_vmaxfp,                        // llvm.ppc.altivec.vmaxfp
   4245     ppc_altivec_vmaxsb,                        // llvm.ppc.altivec.vmaxsb
   4246     ppc_altivec_vmaxsd,                        // llvm.ppc.altivec.vmaxsd
   4247     ppc_altivec_vmaxsh,                        // llvm.ppc.altivec.vmaxsh
   4248     ppc_altivec_vmaxsw,                        // llvm.ppc.altivec.vmaxsw
   4249     ppc_altivec_vmaxub,                        // llvm.ppc.altivec.vmaxub
   4250     ppc_altivec_vmaxud,                        // llvm.ppc.altivec.vmaxud
   4251     ppc_altivec_vmaxuh,                        // llvm.ppc.altivec.vmaxuh
   4252     ppc_altivec_vmaxuw,                        // llvm.ppc.altivec.vmaxuw
   4253     ppc_altivec_vmhaddshs,                     // llvm.ppc.altivec.vmhaddshs
   4254     ppc_altivec_vmhraddshs,                    // llvm.ppc.altivec.vmhraddshs
   4255     ppc_altivec_vminfp,                        // llvm.ppc.altivec.vminfp
   4256     ppc_altivec_vminsb,                        // llvm.ppc.altivec.vminsb
   4257     ppc_altivec_vminsd,                        // llvm.ppc.altivec.vminsd
   4258     ppc_altivec_vminsh,                        // llvm.ppc.altivec.vminsh
   4259     ppc_altivec_vminsw,                        // llvm.ppc.altivec.vminsw
   4260     ppc_altivec_vminub,                        // llvm.ppc.altivec.vminub
   4261     ppc_altivec_vminud,                        // llvm.ppc.altivec.vminud
   4262     ppc_altivec_vminuh,                        // llvm.ppc.altivec.vminuh
   4263     ppc_altivec_vminuw,                        // llvm.ppc.altivec.vminuw
   4264     ppc_altivec_vmladduhm,                     // llvm.ppc.altivec.vmladduhm
   4265     ppc_altivec_vmsummbm,                      // llvm.ppc.altivec.vmsummbm
   4266     ppc_altivec_vmsumshm,                      // llvm.ppc.altivec.vmsumshm
   4267     ppc_altivec_vmsumshs,                      // llvm.ppc.altivec.vmsumshs
   4268     ppc_altivec_vmsumubm,                      // llvm.ppc.altivec.vmsumubm
   4269     ppc_altivec_vmsumuhm,                      // llvm.ppc.altivec.vmsumuhm
   4270     ppc_altivec_vmsumuhs,                      // llvm.ppc.altivec.vmsumuhs
   4271     ppc_altivec_vmulesb,                       // llvm.ppc.altivec.vmulesb
   4272     ppc_altivec_vmulesh,                       // llvm.ppc.altivec.vmulesh
   4273     ppc_altivec_vmulesw,                       // llvm.ppc.altivec.vmulesw
   4274     ppc_altivec_vmuleub,                       // llvm.ppc.altivec.vmuleub
   4275     ppc_altivec_vmuleuh,                       // llvm.ppc.altivec.vmuleuh
   4276     ppc_altivec_vmuleuw,                       // llvm.ppc.altivec.vmuleuw
   4277     ppc_altivec_vmulosb,                       // llvm.ppc.altivec.vmulosb
   4278     ppc_altivec_vmulosh,                       // llvm.ppc.altivec.vmulosh
   4279     ppc_altivec_vmulosw,                       // llvm.ppc.altivec.vmulosw
   4280     ppc_altivec_vmuloub,                       // llvm.ppc.altivec.vmuloub
   4281     ppc_altivec_vmulouh,                       // llvm.ppc.altivec.vmulouh
   4282     ppc_altivec_vmulouw,                       // llvm.ppc.altivec.vmulouw
   4283     ppc_altivec_vnmsubfp,                      // llvm.ppc.altivec.vnmsubfp
   4284     ppc_altivec_vperm,                         // llvm.ppc.altivec.vperm
   4285     ppc_altivec_vpkpx,                         // llvm.ppc.altivec.vpkpx
   4286     ppc_altivec_vpksdss,                       // llvm.ppc.altivec.vpksdss
   4287     ppc_altivec_vpksdus,                       // llvm.ppc.altivec.vpksdus
   4288     ppc_altivec_vpkshss,                       // llvm.ppc.altivec.vpkshss
   4289     ppc_altivec_vpkshus,                       // llvm.ppc.altivec.vpkshus
   4290     ppc_altivec_vpkswss,                       // llvm.ppc.altivec.vpkswss
   4291     ppc_altivec_vpkswus,                       // llvm.ppc.altivec.vpkswus
   4292     ppc_altivec_vpkudus,                       // llvm.ppc.altivec.vpkudus
   4293     ppc_altivec_vpkuhus,                       // llvm.ppc.altivec.vpkuhus
   4294     ppc_altivec_vpkuwus,                       // llvm.ppc.altivec.vpkuwus
   4295     ppc_altivec_vprtybd,                       // llvm.ppc.altivec.vprtybd
   4296     ppc_altivec_vprtybq,                       // llvm.ppc.altivec.vprtybq
   4297     ppc_altivec_vprtybw,                       // llvm.ppc.altivec.vprtybw
   4298     ppc_altivec_vrefp,                         // llvm.ppc.altivec.vrefp
   4299     ppc_altivec_vrfim,                         // llvm.ppc.altivec.vrfim
   4300     ppc_altivec_vrfin,                         // llvm.ppc.altivec.vrfin
   4301     ppc_altivec_vrfip,                         // llvm.ppc.altivec.vrfip
   4302     ppc_altivec_vrfiz,                         // llvm.ppc.altivec.vrfiz
   4303     ppc_altivec_vrlb,                          // llvm.ppc.altivec.vrlb
   4304     ppc_altivec_vrld,                          // llvm.ppc.altivec.vrld
   4305     ppc_altivec_vrldmi,                        // llvm.ppc.altivec.vrldmi
   4306     ppc_altivec_vrldnm,                        // llvm.ppc.altivec.vrldnm
   4307     ppc_altivec_vrlh,                          // llvm.ppc.altivec.vrlh
   4308     ppc_altivec_vrlw,                          // llvm.ppc.altivec.vrlw
   4309     ppc_altivec_vrlwmi,                        // llvm.ppc.altivec.vrlwmi
   4310     ppc_altivec_vrlwnm,                        // llvm.ppc.altivec.vrlwnm
   4311     ppc_altivec_vrsqrtefp,                     // llvm.ppc.altivec.vrsqrtefp
   4312     ppc_altivec_vsel,                          // llvm.ppc.altivec.vsel
   4313     ppc_altivec_vsl,                           // llvm.ppc.altivec.vsl
   4314     ppc_altivec_vslb,                          // llvm.ppc.altivec.vslb
   4315     ppc_altivec_vslh,                          // llvm.ppc.altivec.vslh
   4316     ppc_altivec_vslo,                          // llvm.ppc.altivec.vslo
   4317     ppc_altivec_vslv,                          // llvm.ppc.altivec.vslv
   4318     ppc_altivec_vslw,                          // llvm.ppc.altivec.vslw
   4319     ppc_altivec_vsr,                           // llvm.ppc.altivec.vsr
   4320     ppc_altivec_vsrab,                         // llvm.ppc.altivec.vsrab
   4321     ppc_altivec_vsrah,                         // llvm.ppc.altivec.vsrah
   4322     ppc_altivec_vsraw,                         // llvm.ppc.altivec.vsraw
   4323     ppc_altivec_vsrb,                          // llvm.ppc.altivec.vsrb
   4324     ppc_altivec_vsrh,                          // llvm.ppc.altivec.vsrh
   4325     ppc_altivec_vsro,                          // llvm.ppc.altivec.vsro
   4326     ppc_altivec_vsrv,                          // llvm.ppc.altivec.vsrv
   4327     ppc_altivec_vsrw,                          // llvm.ppc.altivec.vsrw
   4328     ppc_altivec_vsubcuq,                       // llvm.ppc.altivec.vsubcuq
   4329     ppc_altivec_vsubcuw,                       // llvm.ppc.altivec.vsubcuw
   4330     ppc_altivec_vsubecuq,                      // llvm.ppc.altivec.vsubecuq
   4331     ppc_altivec_vsubeuqm,                      // llvm.ppc.altivec.vsubeuqm
   4332     ppc_altivec_vsubsbs,                       // llvm.ppc.altivec.vsubsbs
   4333     ppc_altivec_vsubshs,                       // llvm.ppc.altivec.vsubshs
   4334     ppc_altivec_vsubsws,                       // llvm.ppc.altivec.vsubsws
   4335     ppc_altivec_vsububs,                       // llvm.ppc.altivec.vsububs
   4336     ppc_altivec_vsubuhs,                       // llvm.ppc.altivec.vsubuhs
   4337     ppc_altivec_vsubuws,                       // llvm.ppc.altivec.vsubuws
   4338     ppc_altivec_vsum2sws,                      // llvm.ppc.altivec.vsum2sws
   4339     ppc_altivec_vsum4sbs,                      // llvm.ppc.altivec.vsum4sbs
   4340     ppc_altivec_vsum4shs,                      // llvm.ppc.altivec.vsum4shs
   4341     ppc_altivec_vsum4ubs,                      // llvm.ppc.altivec.vsum4ubs
   4342     ppc_altivec_vsumsws,                       // llvm.ppc.altivec.vsumsws
   4343     ppc_altivec_vupkhpx,                       // llvm.ppc.altivec.vupkhpx
   4344     ppc_altivec_vupkhsb,                       // llvm.ppc.altivec.vupkhsb
   4345     ppc_altivec_vupkhsh,                       // llvm.ppc.altivec.vupkhsh
   4346     ppc_altivec_vupkhsw,                       // llvm.ppc.altivec.vupkhsw
   4347     ppc_altivec_vupklpx,                       // llvm.ppc.altivec.vupklpx
   4348     ppc_altivec_vupklsb,                       // llvm.ppc.altivec.vupklsb
   4349     ppc_altivec_vupklsh,                       // llvm.ppc.altivec.vupklsh
   4350     ppc_altivec_vupklsw,                       // llvm.ppc.altivec.vupklsw
   4351     ppc_bpermd,                                // llvm.ppc.bpermd
   4352     ppc_cfence,                                // llvm.ppc.cfence
   4353     ppc_dcba,                                  // llvm.ppc.dcba
   4354     ppc_dcbf,                                  // llvm.ppc.dcbf
   4355     ppc_dcbi,                                  // llvm.ppc.dcbi
   4356     ppc_dcbst,                                 // llvm.ppc.dcbst
   4357     ppc_dcbt,                                  // llvm.ppc.dcbt
   4358     ppc_dcbtst,                                // llvm.ppc.dcbtst
   4359     ppc_dcbz,                                  // llvm.ppc.dcbz
   4360     ppc_dcbzl,                                 // llvm.ppc.dcbzl
   4361     ppc_divde,                                 // llvm.ppc.divde
   4362     ppc_divdeu,                                // llvm.ppc.divdeu
   4363     ppc_divwe,                                 // llvm.ppc.divwe
   4364     ppc_divweu,                                // llvm.ppc.divweu
   4365     ppc_get_texasr,                            // llvm.ppc.get.texasr
   4366     ppc_get_texasru,                           // llvm.ppc.get.texasru
   4367     ppc_get_tfhar,                             // llvm.ppc.get.tfhar
   4368     ppc_get_tfiar,                             // llvm.ppc.get.tfiar
   4369     ppc_is_decremented_ctr_nonzero,            // llvm.ppc.is.decremented.ctr.nonzero
   4370     ppc_lwsync,                                // llvm.ppc.lwsync
   4371     ppc_mtctr,                                 // llvm.ppc.mtctr
   4372     ppc_qpx_qvfabs,                            // llvm.ppc.qpx.qvfabs
   4373     ppc_qpx_qvfadd,                            // llvm.ppc.qpx.qvfadd
   4374     ppc_qpx_qvfadds,                           // llvm.ppc.qpx.qvfadds
   4375     ppc_qpx_qvfcfid,                           // llvm.ppc.qpx.qvfcfid
   4376     ppc_qpx_qvfcfids,                          // llvm.ppc.qpx.qvfcfids
   4377     ppc_qpx_qvfcfidu,                          // llvm.ppc.qpx.qvfcfidu
   4378     ppc_qpx_qvfcfidus,                         // llvm.ppc.qpx.qvfcfidus
   4379     ppc_qpx_qvfcmpeq,                          // llvm.ppc.qpx.qvfcmpeq
   4380     ppc_qpx_qvfcmpgt,                          // llvm.ppc.qpx.qvfcmpgt
   4381     ppc_qpx_qvfcmplt,                          // llvm.ppc.qpx.qvfcmplt
   4382     ppc_qpx_qvfcpsgn,                          // llvm.ppc.qpx.qvfcpsgn
   4383     ppc_qpx_qvfctid,                           // llvm.ppc.qpx.qvfctid
   4384     ppc_qpx_qvfctidu,                          // llvm.ppc.qpx.qvfctidu
   4385     ppc_qpx_qvfctiduz,                         // llvm.ppc.qpx.qvfctiduz
   4386     ppc_qpx_qvfctidz,                          // llvm.ppc.qpx.qvfctidz
   4387     ppc_qpx_qvfctiw,                           // llvm.ppc.qpx.qvfctiw
   4388     ppc_qpx_qvfctiwu,                          // llvm.ppc.qpx.qvfctiwu
   4389     ppc_qpx_qvfctiwuz,                         // llvm.ppc.qpx.qvfctiwuz
   4390     ppc_qpx_qvfctiwz,                          // llvm.ppc.qpx.qvfctiwz
   4391     ppc_qpx_qvflogical,                        // llvm.ppc.qpx.qvflogical
   4392     ppc_qpx_qvfmadd,                           // llvm.ppc.qpx.qvfmadd
   4393     ppc_qpx_qvfmadds,                          // llvm.ppc.qpx.qvfmadds
   4394     ppc_qpx_qvfmsub,                           // llvm.ppc.qpx.qvfmsub
   4395     ppc_qpx_qvfmsubs,                          // llvm.ppc.qpx.qvfmsubs
   4396     ppc_qpx_qvfmul,                            // llvm.ppc.qpx.qvfmul
   4397     ppc_qpx_qvfmuls,                           // llvm.ppc.qpx.qvfmuls
   4398     ppc_qpx_qvfnabs,                           // llvm.ppc.qpx.qvfnabs
   4399     ppc_qpx_qvfneg,                            // llvm.ppc.qpx.qvfneg
   4400     ppc_qpx_qvfnmadd,                          // llvm.ppc.qpx.qvfnmadd
   4401     ppc_qpx_qvfnmadds,                         // llvm.ppc.qpx.qvfnmadds
   4402     ppc_qpx_qvfnmsub,                          // llvm.ppc.qpx.qvfnmsub
   4403     ppc_qpx_qvfnmsubs,                         // llvm.ppc.qpx.qvfnmsubs
   4404     ppc_qpx_qvfperm,                           // llvm.ppc.qpx.qvfperm
   4405     ppc_qpx_qvfre,                             // llvm.ppc.qpx.qvfre
   4406     ppc_qpx_qvfres,                            // llvm.ppc.qpx.qvfres
   4407     ppc_qpx_qvfrim,                            // llvm.ppc.qpx.qvfrim
   4408     ppc_qpx_qvfrin,                            // llvm.ppc.qpx.qvfrin
   4409     ppc_qpx_qvfrip,                            // llvm.ppc.qpx.qvfrip
   4410     ppc_qpx_qvfriz,                            // llvm.ppc.qpx.qvfriz
   4411     ppc_qpx_qvfrsp,                            // llvm.ppc.qpx.qvfrsp
   4412     ppc_qpx_qvfrsqrte,                         // llvm.ppc.qpx.qvfrsqrte
   4413     ppc_qpx_qvfrsqrtes,                        // llvm.ppc.qpx.qvfrsqrtes
   4414     ppc_qpx_qvfsel,                            // llvm.ppc.qpx.qvfsel
   4415     ppc_qpx_qvfsub,                            // llvm.ppc.qpx.qvfsub
   4416     ppc_qpx_qvfsubs,                           // llvm.ppc.qpx.qvfsubs
   4417     ppc_qpx_qvftstnan,                         // llvm.ppc.qpx.qvftstnan
   4418     ppc_qpx_qvfxmadd,                          // llvm.ppc.qpx.qvfxmadd
   4419     ppc_qpx_qvfxmadds,                         // llvm.ppc.qpx.qvfxmadds
   4420     ppc_qpx_qvfxmul,                           // llvm.ppc.qpx.qvfxmul
   4421     ppc_qpx_qvfxmuls,                          // llvm.ppc.qpx.qvfxmuls
   4422     ppc_qpx_qvfxxcpnmadd,                      // llvm.ppc.qpx.qvfxxcpnmadd
   4423     ppc_qpx_qvfxxcpnmadds,                     // llvm.ppc.qpx.qvfxxcpnmadds
   4424     ppc_qpx_qvfxxmadd,                         // llvm.ppc.qpx.qvfxxmadd
   4425     ppc_qpx_qvfxxmadds,                        // llvm.ppc.qpx.qvfxxmadds
   4426     ppc_qpx_qvfxxnpmadd,                       // llvm.ppc.qpx.qvfxxnpmadd
   4427     ppc_qpx_qvfxxnpmadds,                      // llvm.ppc.qpx.qvfxxnpmadds
   4428     ppc_qpx_qvgpci,                            // llvm.ppc.qpx.qvgpci
   4429     ppc_qpx_qvlfcd,                            // llvm.ppc.qpx.qvlfcd
   4430     ppc_qpx_qvlfcda,                           // llvm.ppc.qpx.qvlfcda
   4431     ppc_qpx_qvlfcs,                            // llvm.ppc.qpx.qvlfcs
   4432     ppc_qpx_qvlfcsa,                           // llvm.ppc.qpx.qvlfcsa
   4433     ppc_qpx_qvlfd,                             // llvm.ppc.qpx.qvlfd
   4434     ppc_qpx_qvlfda,                            // llvm.ppc.qpx.qvlfda
   4435     ppc_qpx_qvlfiwa,                           // llvm.ppc.qpx.qvlfiwa
   4436     ppc_qpx_qvlfiwaa,                          // llvm.ppc.qpx.qvlfiwaa
   4437     ppc_qpx_qvlfiwz,                           // llvm.ppc.qpx.qvlfiwz
   4438     ppc_qpx_qvlfiwza,                          // llvm.ppc.qpx.qvlfiwza
   4439     ppc_qpx_qvlfs,                             // llvm.ppc.qpx.qvlfs
   4440     ppc_qpx_qvlfsa,                            // llvm.ppc.qpx.qvlfsa
   4441     ppc_qpx_qvlpcld,                           // llvm.ppc.qpx.qvlpcld
   4442     ppc_qpx_qvlpcls,                           // llvm.ppc.qpx.qvlpcls
   4443     ppc_qpx_qvlpcrd,                           // llvm.ppc.qpx.qvlpcrd
   4444     ppc_qpx_qvlpcrs,                           // llvm.ppc.qpx.qvlpcrs
   4445     ppc_qpx_qvstfcd,                           // llvm.ppc.qpx.qvstfcd
   4446     ppc_qpx_qvstfcda,                          // llvm.ppc.qpx.qvstfcda
   4447     ppc_qpx_qvstfcs,                           // llvm.ppc.qpx.qvstfcs
   4448     ppc_qpx_qvstfcsa,                          // llvm.ppc.qpx.qvstfcsa
   4449     ppc_qpx_qvstfd,                            // llvm.ppc.qpx.qvstfd
   4450     ppc_qpx_qvstfda,                           // llvm.ppc.qpx.qvstfda
   4451     ppc_qpx_qvstfiw,                           // llvm.ppc.qpx.qvstfiw
   4452     ppc_qpx_qvstfiwa,                          // llvm.ppc.qpx.qvstfiwa
   4453     ppc_qpx_qvstfs,                            // llvm.ppc.qpx.qvstfs
   4454     ppc_qpx_qvstfsa,                           // llvm.ppc.qpx.qvstfsa
   4455     ppc_set_texasr,                            // llvm.ppc.set.texasr
   4456     ppc_set_texasru,                           // llvm.ppc.set.texasru
   4457     ppc_set_tfhar,                             // llvm.ppc.set.tfhar
   4458     ppc_set_tfiar,                             // llvm.ppc.set.tfiar
   4459     ppc_sync,                                  // llvm.ppc.sync
   4460     ppc_tabort,                                // llvm.ppc.tabort
   4461     ppc_tabortdc,                              // llvm.ppc.tabortdc
   4462     ppc_tabortdci,                             // llvm.ppc.tabortdci
   4463     ppc_tabortwc,                              // llvm.ppc.tabortwc
   4464     ppc_tabortwci,                             // llvm.ppc.tabortwci
   4465     ppc_tbegin,                                // llvm.ppc.tbegin
   4466     ppc_tcheck,                                // llvm.ppc.tcheck
   4467     ppc_tend,                                  // llvm.ppc.tend
   4468     ppc_tendall,                               // llvm.ppc.tendall
   4469     ppc_trechkpt,                              // llvm.ppc.trechkpt
   4470     ppc_treclaim,                              // llvm.ppc.treclaim
   4471     ppc_tresume,                               // llvm.ppc.tresume
   4472     ppc_tsr,                                   // llvm.ppc.tsr
   4473     ppc_tsuspend,                              // llvm.ppc.tsuspend
   4474     ppc_ttest,                                 // llvm.ppc.ttest
   4475     ppc_vsx_lxvd2x,                            // llvm.ppc.vsx.lxvd2x
   4476     ppc_vsx_lxvd2x_be,                         // llvm.ppc.vsx.lxvd2x.be
   4477     ppc_vsx_lxvl,                              // llvm.ppc.vsx.lxvl
   4478     ppc_vsx_lxvll,                             // llvm.ppc.vsx.lxvll
   4479     ppc_vsx_lxvw4x,                            // llvm.ppc.vsx.lxvw4x
   4480     ppc_vsx_lxvw4x_be,                         // llvm.ppc.vsx.lxvw4x.be
   4481     ppc_vsx_stxvd2x,                           // llvm.ppc.vsx.stxvd2x
   4482     ppc_vsx_stxvd2x_be,                        // llvm.ppc.vsx.stxvd2x.be
   4483     ppc_vsx_stxvl,                             // llvm.ppc.vsx.stxvl
   4484     ppc_vsx_stxvll,                            // llvm.ppc.vsx.stxvll
   4485     ppc_vsx_stxvw4x,                           // llvm.ppc.vsx.stxvw4x
   4486     ppc_vsx_stxvw4x_be,                        // llvm.ppc.vsx.stxvw4x.be
   4487     ppc_vsx_xsmaxdp,                           // llvm.ppc.vsx.xsmaxdp
   4488     ppc_vsx_xsmindp,                           // llvm.ppc.vsx.xsmindp
   4489     ppc_vsx_xvcmpeqdp,                         // llvm.ppc.vsx.xvcmpeqdp
   4490     ppc_vsx_xvcmpeqdp_p,                       // llvm.ppc.vsx.xvcmpeqdp.p
   4491     ppc_vsx_xvcmpeqsp,                         // llvm.ppc.vsx.xvcmpeqsp
   4492     ppc_vsx_xvcmpeqsp_p,                       // llvm.ppc.vsx.xvcmpeqsp.p
   4493     ppc_vsx_xvcmpgedp,                         // llvm.ppc.vsx.xvcmpgedp
   4494     ppc_vsx_xvcmpgedp_p,                       // llvm.ppc.vsx.xvcmpgedp.p
   4495     ppc_vsx_xvcmpgesp,                         // llvm.ppc.vsx.xvcmpgesp
   4496     ppc_vsx_xvcmpgesp_p,                       // llvm.ppc.vsx.xvcmpgesp.p
   4497     ppc_vsx_xvcmpgtdp,                         // llvm.ppc.vsx.xvcmpgtdp
   4498     ppc_vsx_xvcmpgtdp_p,                       // llvm.ppc.vsx.xvcmpgtdp.p
   4499     ppc_vsx_xvcmpgtsp,                         // llvm.ppc.vsx.xvcmpgtsp
   4500     ppc_vsx_xvcmpgtsp_p,                       // llvm.ppc.vsx.xvcmpgtsp.p
   4501     ppc_vsx_xvcvdpsp,                          // llvm.ppc.vsx.xvcvdpsp
   4502     ppc_vsx_xvcvdpsxws,                        // llvm.ppc.vsx.xvcvdpsxws
   4503     ppc_vsx_xvcvdpuxws,                        // llvm.ppc.vsx.xvcvdpuxws
   4504     ppc_vsx_xvcvhpsp,                          // llvm.ppc.vsx.xvcvhpsp
   4505     ppc_vsx_xvcvspdp,                          // llvm.ppc.vsx.xvcvspdp
   4506     ppc_vsx_xvcvsphp,                          // llvm.ppc.vsx.xvcvsphp
   4507     ppc_vsx_xvcvsxdsp,                         // llvm.ppc.vsx.xvcvsxdsp
   4508     ppc_vsx_xvcvsxwdp,                         // llvm.ppc.vsx.xvcvsxwdp
   4509     ppc_vsx_xvcvuxdsp,                         // llvm.ppc.vsx.xvcvuxdsp
   4510     ppc_vsx_xvcvuxwdp,                         // llvm.ppc.vsx.xvcvuxwdp
   4511     ppc_vsx_xvdivdp,                           // llvm.ppc.vsx.xvdivdp
   4512     ppc_vsx_xvdivsp,                           // llvm.ppc.vsx.xvdivsp
   4513     ppc_vsx_xviexpdp,                          // llvm.ppc.vsx.xviexpdp
   4514     ppc_vsx_xviexpsp,                          // llvm.ppc.vsx.xviexpsp
   4515     ppc_vsx_xvmaxdp,                           // llvm.ppc.vsx.xvmaxdp
   4516     ppc_vsx_xvmaxsp,                           // llvm.ppc.vsx.xvmaxsp
   4517     ppc_vsx_xvmindp,                           // llvm.ppc.vsx.xvmindp
   4518     ppc_vsx_xvminsp,                           // llvm.ppc.vsx.xvminsp
   4519     ppc_vsx_xvrdpip,                           // llvm.ppc.vsx.xvrdpip
   4520     ppc_vsx_xvredp,                            // llvm.ppc.vsx.xvredp
   4521     ppc_vsx_xvresp,                            // llvm.ppc.vsx.xvresp
   4522     ppc_vsx_xvrspip,                           // llvm.ppc.vsx.xvrspip
   4523     ppc_vsx_xvrsqrtedp,                        // llvm.ppc.vsx.xvrsqrtedp
   4524     ppc_vsx_xvrsqrtesp,                        // llvm.ppc.vsx.xvrsqrtesp
   4525     ppc_vsx_xvtstdcdp,                         // llvm.ppc.vsx.xvtstdcdp
   4526     ppc_vsx_xvtstdcsp,                         // llvm.ppc.vsx.xvtstdcsp
   4527     ppc_vsx_xvxexpdp,                          // llvm.ppc.vsx.xvxexpdp
   4528     ppc_vsx_xvxexpsp,                          // llvm.ppc.vsx.xvxexpsp
   4529     ppc_vsx_xvxsigdp,                          // llvm.ppc.vsx.xvxsigdp
   4530     ppc_vsx_xvxsigsp,                          // llvm.ppc.vsx.xvxsigsp
   4531     ppc_vsx_xxextractuw,                       // llvm.ppc.vsx.xxextractuw
   4532     ppc_vsx_xxinsertw,                         // llvm.ppc.vsx.xxinsertw
   4533     ppc_vsx_xxleqv,                            // llvm.ppc.vsx.xxleqv
   4534     r600_cube,                                 // llvm.r600.cube
   4535     r600_group_barrier,                        // llvm.r600.group.barrier
   4536     r600_implicitarg_ptr,                      // llvm.r600.implicitarg.ptr
   4537     r600_rat_store_typed,                      // llvm.r600.rat.store.typed
   4538     r600_read_global_size_x,                   // llvm.r600.read.global.size.x
   4539     r600_read_global_size_y,                   // llvm.r600.read.global.size.y
   4540     r600_read_global_size_z,                   // llvm.r600.read.global.size.z
   4541     r600_read_local_size_x,                    // llvm.r600.read.local.size.x
   4542     r600_read_local_size_y,                    // llvm.r600.read.local.size.y
   4543     r600_read_local_size_z,                    // llvm.r600.read.local.size.z
   4544     r600_read_ngroups_x,                       // llvm.r600.read.ngroups.x
   4545     r600_read_ngroups_y,                       // llvm.r600.read.ngroups.y
   4546     r600_read_ngroups_z,                       // llvm.r600.read.ngroups.z
   4547     r600_read_tgid_x,                          // llvm.r600.read.tgid.x
   4548     r600_read_tgid_y,                          // llvm.r600.read.tgid.y
   4549     r600_read_tgid_z,                          // llvm.r600.read.tgid.z
   4550     r600_read_tidig_x,                         // llvm.r600.read.tidig.x
   4551     r600_read_tidig_y,                         // llvm.r600.read.tidig.y
   4552     r600_read_tidig_z,                         // llvm.r600.read.tidig.z
   4553     r600_recipsqrt_clamped,                    // llvm.r600.recipsqrt.clamped
   4554     r600_recipsqrt_ieee,                       // llvm.r600.recipsqrt.ieee
   4555     s390_efpc,                                 // llvm.s390.efpc
   4556     s390_etnd,                                 // llvm.s390.etnd
   4557     s390_lcbb,                                 // llvm.s390.lcbb
   4558     s390_ntstg,                                // llvm.s390.ntstg
   4559     s390_ppa_txassist,                         // llvm.s390.ppa.txassist
   4560     s390_sfpc,                                 // llvm.s390.sfpc
   4561     s390_tabort,                               // llvm.s390.tabort
   4562     s390_tbegin,                               // llvm.s390.tbegin
   4563     s390_tbegin_nofloat,                       // llvm.s390.tbegin.nofloat
   4564     s390_tbeginc,                              // llvm.s390.tbeginc
   4565     s390_tdc,                                  // llvm.s390.tdc
   4566     s390_tend,                                 // llvm.s390.tend
   4567     s390_vaccb,                                // llvm.s390.vaccb
   4568     s390_vacccq,                               // llvm.s390.vacccq
   4569     s390_vaccf,                                // llvm.s390.vaccf
   4570     s390_vaccg,                                // llvm.s390.vaccg
   4571     s390_vacch,                                // llvm.s390.vacch
   4572     s390_vaccq,                                // llvm.s390.vaccq
   4573     s390_vacq,                                 // llvm.s390.vacq
   4574     s390_vaq,                                  // llvm.s390.vaq
   4575     s390_vavgb,                                // llvm.s390.vavgb
   4576     s390_vavgf,                                // llvm.s390.vavgf
   4577     s390_vavgg,                                // llvm.s390.vavgg
   4578     s390_vavgh,                                // llvm.s390.vavgh
   4579     s390_vavglb,                               // llvm.s390.vavglb
   4580     s390_vavglf,                               // llvm.s390.vavglf
   4581     s390_vavglg,                               // llvm.s390.vavglg
   4582     s390_vavglh,                               // llvm.s390.vavglh
   4583     s390_vbperm,                               // llvm.s390.vbperm
   4584     s390_vceqbs,                               // llvm.s390.vceqbs
   4585     s390_vceqfs,                               // llvm.s390.vceqfs
   4586     s390_vceqgs,                               // llvm.s390.vceqgs
   4587     s390_vceqhs,                               // llvm.s390.vceqhs
   4588     s390_vchbs,                                // llvm.s390.vchbs
   4589     s390_vchfs,                                // llvm.s390.vchfs
   4590     s390_vchgs,                                // llvm.s390.vchgs
   4591     s390_vchhs,                                // llvm.s390.vchhs
   4592     s390_vchlbs,                               // llvm.s390.vchlbs
   4593     s390_vchlfs,                               // llvm.s390.vchlfs
   4594     s390_vchlgs,                               // llvm.s390.vchlgs
   4595     s390_vchlhs,                               // llvm.s390.vchlhs
   4596     s390_vcksm,                                // llvm.s390.vcksm
   4597     s390_verimb,                               // llvm.s390.verimb
   4598     s390_verimf,                               // llvm.s390.verimf
   4599     s390_verimg,                               // llvm.s390.verimg
   4600     s390_verimh,                               // llvm.s390.verimh
   4601     s390_verllb,                               // llvm.s390.verllb
   4602     s390_verllf,                               // llvm.s390.verllf
   4603     s390_verllg,                               // llvm.s390.verllg
   4604     s390_verllh,                               // llvm.s390.verllh
   4605     s390_verllvb,                              // llvm.s390.verllvb
   4606     s390_verllvf,                              // llvm.s390.verllvf
   4607     s390_verllvg,                              // llvm.s390.verllvg
   4608     s390_verllvh,                              // llvm.s390.verllvh
   4609     s390_vfaeb,                                // llvm.s390.vfaeb
   4610     s390_vfaebs,                               // llvm.s390.vfaebs
   4611     s390_vfaef,                                // llvm.s390.vfaef
   4612     s390_vfaefs,                               // llvm.s390.vfaefs
   4613     s390_vfaeh,                                // llvm.s390.vfaeh
   4614     s390_vfaehs,                               // llvm.s390.vfaehs
   4615     s390_vfaezb,                               // llvm.s390.vfaezb
   4616     s390_vfaezbs,                              // llvm.s390.vfaezbs
   4617     s390_vfaezf,                               // llvm.s390.vfaezf
   4618     s390_vfaezfs,                              // llvm.s390.vfaezfs
   4619     s390_vfaezh,                               // llvm.s390.vfaezh
   4620     s390_vfaezhs,                              // llvm.s390.vfaezhs
   4621     s390_vfcedbs,                              // llvm.s390.vfcedbs
   4622     s390_vfcesbs,                              // llvm.s390.vfcesbs
   4623     s390_vfchdbs,                              // llvm.s390.vfchdbs
   4624     s390_vfchedbs,                             // llvm.s390.vfchedbs
   4625     s390_vfchesbs,                             // llvm.s390.vfchesbs
   4626     s390_vfchsbs,                              // llvm.s390.vfchsbs
   4627     s390_vfeeb,                                // llvm.s390.vfeeb
   4628     s390_vfeebs,                               // llvm.s390.vfeebs
   4629     s390_vfeef,                                // llvm.s390.vfeef
   4630     s390_vfeefs,                               // llvm.s390.vfeefs
   4631     s390_vfeeh,                                // llvm.s390.vfeeh
   4632     s390_vfeehs,                               // llvm.s390.vfeehs
   4633     s390_vfeezb,                               // llvm.s390.vfeezb
   4634     s390_vfeezbs,                              // llvm.s390.vfeezbs
   4635     s390_vfeezf,                               // llvm.s390.vfeezf
   4636     s390_vfeezfs,                              // llvm.s390.vfeezfs
   4637     s390_vfeezh,                               // llvm.s390.vfeezh
   4638     s390_vfeezhs,                              // llvm.s390.vfeezhs
   4639     s390_vfeneb,                               // llvm.s390.vfeneb
   4640     s390_vfenebs,                              // llvm.s390.vfenebs
   4641     s390_vfenef,                               // llvm.s390.vfenef
   4642     s390_vfenefs,                              // llvm.s390.vfenefs
   4643     s390_vfeneh,                               // llvm.s390.vfeneh
   4644     s390_vfenehs,                              // llvm.s390.vfenehs
   4645     s390_vfenezb,                              // llvm.s390.vfenezb
   4646     s390_vfenezbs,                             // llvm.s390.vfenezbs
   4647     s390_vfenezf,                              // llvm.s390.vfenezf
   4648     s390_vfenezfs,                             // llvm.s390.vfenezfs
   4649     s390_vfenezh,                              // llvm.s390.vfenezh
   4650     s390_vfenezhs,                             // llvm.s390.vfenezhs
   4651     s390_vfidb,                                // llvm.s390.vfidb
   4652     s390_vfisb,                                // llvm.s390.vfisb
   4653     s390_vfmaxdb,                              // llvm.s390.vfmaxdb
   4654     s390_vfmaxsb,                              // llvm.s390.vfmaxsb
   4655     s390_vfmindb,                              // llvm.s390.vfmindb
   4656     s390_vfminsb,                              // llvm.s390.vfminsb
   4657     s390_vftcidb,                              // llvm.s390.vftcidb
   4658     s390_vftcisb,                              // llvm.s390.vftcisb
   4659     s390_vgfmab,                               // llvm.s390.vgfmab
   4660     s390_vgfmaf,                               // llvm.s390.vgfmaf
   4661     s390_vgfmag,                               // llvm.s390.vgfmag
   4662     s390_vgfmah,                               // llvm.s390.vgfmah
   4663     s390_vgfmb,                                // llvm.s390.vgfmb
   4664     s390_vgfmf,                                // llvm.s390.vgfmf
   4665     s390_vgfmg,                                // llvm.s390.vgfmg
   4666     s390_vgfmh,                                // llvm.s390.vgfmh
   4667     s390_vistrb,                               // llvm.s390.vistrb
   4668     s390_vistrbs,                              // llvm.s390.vistrbs
   4669     s390_vistrf,                               // llvm.s390.vistrf
   4670     s390_vistrfs,                              // llvm.s390.vistrfs
   4671     s390_vistrh,                               // llvm.s390.vistrh
   4672     s390_vistrhs,                              // llvm.s390.vistrhs
   4673     s390_vlbb,                                 // llvm.s390.vlbb
   4674     s390_vll,                                  // llvm.s390.vll
   4675     s390_vlrl,                                 // llvm.s390.vlrl
   4676     s390_vmaeb,                                // llvm.s390.vmaeb
   4677     s390_vmaef,                                // llvm.s390.vmaef
   4678     s390_vmaeh,                                // llvm.s390.vmaeh
   4679     s390_vmahb,                                // llvm.s390.vmahb
   4680     s390_vmahf,                                // llvm.s390.vmahf
   4681     s390_vmahh,                                // llvm.s390.vmahh
   4682     s390_vmaleb,                               // llvm.s390.vmaleb
   4683     s390_vmalef,                               // llvm.s390.vmalef
   4684     s390_vmaleh,                               // llvm.s390.vmaleh
   4685     s390_vmalhb,                               // llvm.s390.vmalhb
   4686     s390_vmalhf,                               // llvm.s390.vmalhf
   4687     s390_vmalhh,                               // llvm.s390.vmalhh
   4688     s390_vmalob,                               // llvm.s390.vmalob
   4689     s390_vmalof,                               // llvm.s390.vmalof
   4690     s390_vmaloh,                               // llvm.s390.vmaloh
   4691     s390_vmaob,                                // llvm.s390.vmaob
   4692     s390_vmaof,                                // llvm.s390.vmaof
   4693     s390_vmaoh,                                // llvm.s390.vmaoh
   4694     s390_vmeb,                                 // llvm.s390.vmeb
   4695     s390_vmef,                                 // llvm.s390.vmef
   4696     s390_vmeh,                                 // llvm.s390.vmeh
   4697     s390_vmhb,                                 // llvm.s390.vmhb
   4698     s390_vmhf,                                 // llvm.s390.vmhf
   4699     s390_vmhh,                                 // llvm.s390.vmhh
   4700     s390_vmleb,                                // llvm.s390.vmleb
   4701     s390_vmlef,                                // llvm.s390.vmlef
   4702     s390_vmleh,                                // llvm.s390.vmleh
   4703     s390_vmlhb,                                // llvm.s390.vmlhb
   4704     s390_vmlhf,                                // llvm.s390.vmlhf
   4705     s390_vmlhh,                                // llvm.s390.vmlhh
   4706     s390_vmlob,                                // llvm.s390.vmlob
   4707     s390_vmlof,                                // llvm.s390.vmlof
   4708     s390_vmloh,                                // llvm.s390.vmloh
   4709     s390_vmob,                                 // llvm.s390.vmob
   4710     s390_vmof,                                 // llvm.s390.vmof
   4711     s390_vmoh,                                 // llvm.s390.vmoh
   4712     s390_vmslg,                                // llvm.s390.vmslg
   4713     s390_vpdi,                                 // llvm.s390.vpdi
   4714     s390_vperm,                                // llvm.s390.vperm
   4715     s390_vpklsf,                               // llvm.s390.vpklsf
   4716     s390_vpklsfs,                              // llvm.s390.vpklsfs
   4717     s390_vpklsg,                               // llvm.s390.vpklsg
   4718     s390_vpklsgs,                              // llvm.s390.vpklsgs
   4719     s390_vpklsh,                               // llvm.s390.vpklsh
   4720     s390_vpklshs,                              // llvm.s390.vpklshs
   4721     s390_vpksf,                                // llvm.s390.vpksf
   4722     s390_vpksfs,                               // llvm.s390.vpksfs
   4723     s390_vpksg,                                // llvm.s390.vpksg
   4724     s390_vpksgs,                               // llvm.s390.vpksgs
   4725     s390_vpksh,                                // llvm.s390.vpksh
   4726     s390_vpkshs,                               // llvm.s390.vpkshs
   4727     s390_vsbcbiq,                              // llvm.s390.vsbcbiq
   4728     s390_vsbiq,                                // llvm.s390.vsbiq
   4729     s390_vscbib,                               // llvm.s390.vscbib
   4730     s390_vscbif,                               // llvm.s390.vscbif
   4731     s390_vscbig,                               // llvm.s390.vscbig
   4732     s390_vscbih,                               // llvm.s390.vscbih
   4733     s390_vscbiq,                               // llvm.s390.vscbiq
   4734     s390_vsl,                                  // llvm.s390.vsl
   4735     s390_vslb,                                 // llvm.s390.vslb
   4736     s390_vsldb,                                // llvm.s390.vsldb
   4737     s390_vsq,                                  // llvm.s390.vsq
   4738     s390_vsra,                                 // llvm.s390.vsra
   4739     s390_vsrab,                                // llvm.s390.vsrab
   4740     s390_vsrl,                                 // llvm.s390.vsrl
   4741     s390_vsrlb,                                // llvm.s390.vsrlb
   4742     s390_vstl,                                 // llvm.s390.vstl
   4743     s390_vstrcb,                               // llvm.s390.vstrcb
   4744     s390_vstrcbs,                              // llvm.s390.vstrcbs
   4745     s390_vstrcf,                               // llvm.s390.vstrcf
   4746     s390_vstrcfs,                              // llvm.s390.vstrcfs
   4747     s390_vstrch,                               // llvm.s390.vstrch
   4748     s390_vstrchs,                              // llvm.s390.vstrchs
   4749     s390_vstrczb,                              // llvm.s390.vstrczb
   4750     s390_vstrczbs,                             // llvm.s390.vstrczbs
   4751     s390_vstrczf,                              // llvm.s390.vstrczf
   4752     s390_vstrczfs,                             // llvm.s390.vstrczfs
   4753     s390_vstrczh,                              // llvm.s390.vstrczh
   4754     s390_vstrczhs,                             // llvm.s390.vstrczhs
   4755     s390_vstrl,                                // llvm.s390.vstrl
   4756     s390_vsumb,                                // llvm.s390.vsumb
   4757     s390_vsumgf,                               // llvm.s390.vsumgf
   4758     s390_vsumgh,                               // llvm.s390.vsumgh
   4759     s390_vsumh,                                // llvm.s390.vsumh
   4760     s390_vsumqf,                               // llvm.s390.vsumqf
   4761     s390_vsumqg,                               // llvm.s390.vsumqg
   4762     s390_vtm,                                  // llvm.s390.vtm
   4763     s390_vuphb,                                // llvm.s390.vuphb
   4764     s390_vuphf,                                // llvm.s390.vuphf
   4765     s390_vuphh,                                // llvm.s390.vuphh
   4766     s390_vuplb,                                // llvm.s390.vuplb
   4767     s390_vuplf,                                // llvm.s390.vuplf
   4768     s390_vuplhb,                               // llvm.s390.vuplhb
   4769     s390_vuplhf,                               // llvm.s390.vuplhf
   4770     s390_vuplhh,                               // llvm.s390.vuplhh
   4771     s390_vuplhw,                               // llvm.s390.vuplhw
   4772     s390_vupllb,                               // llvm.s390.vupllb
   4773     s390_vupllf,                               // llvm.s390.vupllf
   4774     s390_vupllh,                               // llvm.s390.vupllh
   4775     wasm_current_memory,                       // llvm.wasm.current.memory
   4776     wasm_grow_memory,                          // llvm.wasm.grow.memory
   4777     wasm_rethrow,                              // llvm.wasm.rethrow
   4778     wasm_throw,                                // llvm.wasm.throw
   4779     x86_3dnow_pavgusb,                         // llvm.x86.3dnow.pavgusb
   4780     x86_3dnow_pf2id,                           // llvm.x86.3dnow.pf2id
   4781     x86_3dnow_pfacc,                           // llvm.x86.3dnow.pfacc
   4782     x86_3dnow_pfadd,                           // llvm.x86.3dnow.pfadd
   4783     x86_3dnow_pfcmpeq,                         // llvm.x86.3dnow.pfcmpeq
   4784     x86_3dnow_pfcmpge,                         // llvm.x86.3dnow.pfcmpge
   4785     x86_3dnow_pfcmpgt,                         // llvm.x86.3dnow.pfcmpgt
   4786     x86_3dnow_pfmax,                           // llvm.x86.3dnow.pfmax
   4787     x86_3dnow_pfmin,                           // llvm.x86.3dnow.pfmin
   4788     x86_3dnow_pfmul,                           // llvm.x86.3dnow.pfmul
   4789     x86_3dnow_pfrcp,                           // llvm.x86.3dnow.pfrcp
   4790     x86_3dnow_pfrcpit1,                        // llvm.x86.3dnow.pfrcpit1
   4791     x86_3dnow_pfrcpit2,                        // llvm.x86.3dnow.pfrcpit2
   4792     x86_3dnow_pfrsqit1,                        // llvm.x86.3dnow.pfrsqit1
   4793     x86_3dnow_pfrsqrt,                         // llvm.x86.3dnow.pfrsqrt
   4794     x86_3dnow_pfsub,                           // llvm.x86.3dnow.pfsub
   4795     x86_3dnow_pfsubr,                          // llvm.x86.3dnow.pfsubr
   4796     x86_3dnow_pi2fd,                           // llvm.x86.3dnow.pi2fd
   4797     x86_3dnow_pmulhrw,                         // llvm.x86.3dnow.pmulhrw
   4798     x86_3dnowa_pf2iw,                          // llvm.x86.3dnowa.pf2iw
   4799     x86_3dnowa_pfnacc,                         // llvm.x86.3dnowa.pfnacc
   4800     x86_3dnowa_pfpnacc,                        // llvm.x86.3dnowa.pfpnacc
   4801     x86_3dnowa_pi2fw,                          // llvm.x86.3dnowa.pi2fw
   4802     x86_3dnowa_pswapd,                         // llvm.x86.3dnowa.pswapd
   4803     x86_addcarry_u32,                          // llvm.x86.addcarry.u32
   4804     x86_addcarry_u64,                          // llvm.x86.addcarry.u64
   4805     x86_addcarryx_u32,                         // llvm.x86.addcarryx.u32
   4806     x86_addcarryx_u64,                         // llvm.x86.addcarryx.u64
   4807     x86_aesni_aesdec,                          // llvm.x86.aesni.aesdec
   4808     x86_aesni_aesdeclast,                      // llvm.x86.aesni.aesdeclast
   4809     x86_aesni_aesenc,                          // llvm.x86.aesni.aesenc
   4810     x86_aesni_aesenclast,                      // llvm.x86.aesni.aesenclast
   4811     x86_aesni_aesimc,                          // llvm.x86.aesni.aesimc
   4812     x86_aesni_aeskeygenassist,                 // llvm.x86.aesni.aeskeygenassist
   4813     x86_avx_addsub_pd_256,                     // llvm.x86.avx.addsub.pd.256
   4814     x86_avx_addsub_ps_256,                     // llvm.x86.avx.addsub.ps.256
   4815     x86_avx_blendv_pd_256,                     // llvm.x86.avx.blendv.pd.256
   4816     x86_avx_blendv_ps_256,                     // llvm.x86.avx.blendv.ps.256
   4817     x86_avx_cmp_pd_256,                        // llvm.x86.avx.cmp.pd.256
   4818     x86_avx_cmp_ps_256,                        // llvm.x86.avx.cmp.ps.256
   4819     x86_avx_cvt_pd2_ps_256,                    // llvm.x86.avx.cvt.pd2.ps.256
   4820     x86_avx_cvt_pd2dq_256,                     // llvm.x86.avx.cvt.pd2dq.256
   4821     x86_avx_cvt_ps2dq_256,                     // llvm.x86.avx.cvt.ps2dq.256
   4822     x86_avx_cvtdq2_ps_256,                     // llvm.x86.avx.cvtdq2.ps.256
   4823     x86_avx_cvtt_pd2dq_256,                    // llvm.x86.avx.cvtt.pd2dq.256
   4824     x86_avx_cvtt_ps2dq_256,                    // llvm.x86.avx.cvtt.ps2dq.256
   4825     x86_avx_dp_ps_256,                         // llvm.x86.avx.dp.ps.256
   4826     x86_avx_hadd_pd_256,                       // llvm.x86.avx.hadd.pd.256
   4827     x86_avx_hadd_ps_256,                       // llvm.x86.avx.hadd.ps.256
   4828     x86_avx_hsub_pd_256,                       // llvm.x86.avx.hsub.pd.256
   4829     x86_avx_hsub_ps_256,                       // llvm.x86.avx.hsub.ps.256
   4830     x86_avx_ldu_dq_256,                        // llvm.x86.avx.ldu.dq.256
   4831     x86_avx_maskload_pd,                       // llvm.x86.avx.maskload.pd
   4832     x86_avx_maskload_pd_256,                   // llvm.x86.avx.maskload.pd.256
   4833     x86_avx_maskload_ps,                       // llvm.x86.avx.maskload.ps
   4834     x86_avx_maskload_ps_256,                   // llvm.x86.avx.maskload.ps.256
   4835     x86_avx_maskstore_pd,                      // llvm.x86.avx.maskstore.pd
   4836     x86_avx_maskstore_pd_256,                  // llvm.x86.avx.maskstore.pd.256
   4837     x86_avx_maskstore_ps,                      // llvm.x86.avx.maskstore.ps
   4838     x86_avx_maskstore_ps_256,                  // llvm.x86.avx.maskstore.ps.256
   4839     x86_avx_max_pd_256,                        // llvm.x86.avx.max.pd.256
   4840     x86_avx_max_ps_256,                        // llvm.x86.avx.max.ps.256
   4841     x86_avx_min_pd_256,                        // llvm.x86.avx.min.pd.256
   4842     x86_avx_min_ps_256,                        // llvm.x86.avx.min.ps.256
   4843     x86_avx_movmsk_pd_256,                     // llvm.x86.avx.movmsk.pd.256
   4844     x86_avx_movmsk_ps_256,                     // llvm.x86.avx.movmsk.ps.256
   4845     x86_avx_ptestc_256,                        // llvm.x86.avx.ptestc.256
   4846     x86_avx_ptestnzc_256,                      // llvm.x86.avx.ptestnzc.256
   4847     x86_avx_ptestz_256,                        // llvm.x86.avx.ptestz.256
   4848     x86_avx_rcp_ps_256,                        // llvm.x86.avx.rcp.ps.256
   4849     x86_avx_round_pd_256,                      // llvm.x86.avx.round.pd.256
   4850     x86_avx_round_ps_256,                      // llvm.x86.avx.round.ps.256
   4851     x86_avx_rsqrt_ps_256,                      // llvm.x86.avx.rsqrt.ps.256
   4852     x86_avx_sqrt_pd_256,                       // llvm.x86.avx.sqrt.pd.256
   4853     x86_avx_sqrt_ps_256,                       // llvm.x86.avx.sqrt.ps.256
   4854     x86_avx_vpermilvar_pd,                     // llvm.x86.avx.vpermilvar.pd
   4855     x86_avx_vpermilvar_pd_256,                 // llvm.x86.avx.vpermilvar.pd.256
   4856     x86_avx_vpermilvar_ps,                     // llvm.x86.avx.vpermilvar.ps
   4857     x86_avx_vpermilvar_ps_256,                 // llvm.x86.avx.vpermilvar.ps.256
   4858     x86_avx_vtestc_pd,                         // llvm.x86.avx.vtestc.pd
   4859     x86_avx_vtestc_pd_256,                     // llvm.x86.avx.vtestc.pd.256
   4860     x86_avx_vtestc_ps,                         // llvm.x86.avx.vtestc.ps
   4861     x86_avx_vtestc_ps_256,                     // llvm.x86.avx.vtestc.ps.256
   4862     x86_avx_vtestnzc_pd,                       // llvm.x86.avx.vtestnzc.pd
   4863     x86_avx_vtestnzc_pd_256,                   // llvm.x86.avx.vtestnzc.pd.256
   4864     x86_avx_vtestnzc_ps,                       // llvm.x86.avx.vtestnzc.ps
   4865     x86_avx_vtestnzc_ps_256,                   // llvm.x86.avx.vtestnzc.ps.256
   4866     x86_avx_vtestz_pd,                         // llvm.x86.avx.vtestz.pd
   4867     x86_avx_vtestz_pd_256,                     // llvm.x86.avx.vtestz.pd.256
   4868     x86_avx_vtestz_ps,                         // llvm.x86.avx.vtestz.ps
   4869     x86_avx_vtestz_ps_256,                     // llvm.x86.avx.vtestz.ps.256
   4870     x86_avx_vzeroall,                          // llvm.x86.avx.vzeroall
   4871     x86_avx_vzeroupper,                        // llvm.x86.avx.vzeroupper
   4872     x86_avx2_gather_d_d,                       // llvm.x86.avx2.gather.d.d
   4873     x86_avx2_gather_d_d_256,                   // llvm.x86.avx2.gather.d.d.256
   4874     x86_avx2_gather_d_pd,                      // llvm.x86.avx2.gather.d.pd
   4875     x86_avx2_gather_d_pd_256,                  // llvm.x86.avx2.gather.d.pd.256
   4876     x86_avx2_gather_d_ps,                      // llvm.x86.avx2.gather.d.ps
   4877     x86_avx2_gather_d_ps_256,                  // llvm.x86.avx2.gather.d.ps.256
   4878     x86_avx2_gather_d_q,                       // llvm.x86.avx2.gather.d.q
   4879     x86_avx2_gather_d_q_256,                   // llvm.x86.avx2.gather.d.q.256
   4880     x86_avx2_gather_q_d,                       // llvm.x86.avx2.gather.q.d
   4881     x86_avx2_gather_q_d_256,                   // llvm.x86.avx2.gather.q.d.256
   4882     x86_avx2_gather_q_pd,                      // llvm.x86.avx2.gather.q.pd
   4883     x86_avx2_gather_q_pd_256,                  // llvm.x86.avx2.gather.q.pd.256
   4884     x86_avx2_gather_q_ps,                      // llvm.x86.avx2.gather.q.ps
   4885     x86_avx2_gather_q_ps_256,                  // llvm.x86.avx2.gather.q.ps.256
   4886     x86_avx2_gather_q_q,                       // llvm.x86.avx2.gather.q.q
   4887     x86_avx2_gather_q_q_256,                   // llvm.x86.avx2.gather.q.q.256
   4888     x86_avx2_maskload_d,                       // llvm.x86.avx2.maskload.d
   4889     x86_avx2_maskload_d_256,                   // llvm.x86.avx2.maskload.d.256
   4890     x86_avx2_maskload_q,                       // llvm.x86.avx2.maskload.q
   4891     x86_avx2_maskload_q_256,                   // llvm.x86.avx2.maskload.q.256
   4892     x86_avx2_maskstore_d,                      // llvm.x86.avx2.maskstore.d
   4893     x86_avx2_maskstore_d_256,                  // llvm.x86.avx2.maskstore.d.256
   4894     x86_avx2_maskstore_q,                      // llvm.x86.avx2.maskstore.q
   4895     x86_avx2_maskstore_q_256,                  // llvm.x86.avx2.maskstore.q.256
   4896     x86_avx2_mpsadbw,                          // llvm.x86.avx2.mpsadbw
   4897     x86_avx2_packssdw,                         // llvm.x86.avx2.packssdw
   4898     x86_avx2_packsswb,                         // llvm.x86.avx2.packsswb
   4899     x86_avx2_packusdw,                         // llvm.x86.avx2.packusdw
   4900     x86_avx2_packuswb,                         // llvm.x86.avx2.packuswb
   4901     x86_avx2_padds_b,                          // llvm.x86.avx2.padds.b
   4902     x86_avx2_padds_w,                          // llvm.x86.avx2.padds.w
   4903     x86_avx2_paddus_b,                         // llvm.x86.avx2.paddus.b
   4904     x86_avx2_paddus_w,                         // llvm.x86.avx2.paddus.w
   4905     x86_avx2_pblendvb,                         // llvm.x86.avx2.pblendvb
   4906     x86_avx2_permd,                            // llvm.x86.avx2.permd
   4907     x86_avx2_permps,                           // llvm.x86.avx2.permps
   4908     x86_avx2_phadd_d,                          // llvm.x86.avx2.phadd.d
   4909     x86_avx2_phadd_sw,                         // llvm.x86.avx2.phadd.sw
   4910     x86_avx2_phadd_w,                          // llvm.x86.avx2.phadd.w
   4911     x86_avx2_phsub_d,                          // llvm.x86.avx2.phsub.d
   4912     x86_avx2_phsub_sw,                         // llvm.x86.avx2.phsub.sw
   4913     x86_avx2_phsub_w,                          // llvm.x86.avx2.phsub.w
   4914     x86_avx2_pmadd_ub_sw,                      // llvm.x86.avx2.pmadd.ub.sw
   4915     x86_avx2_pmadd_wd,                         // llvm.x86.avx2.pmadd.wd
   4916     x86_avx2_pmovmskb,                         // llvm.x86.avx2.pmovmskb
   4917     x86_avx2_pmul_dq,                          // llvm.x86.avx2.pmul.dq
   4918     x86_avx2_pmul_hr_sw,                       // llvm.x86.avx2.pmul.hr.sw
   4919     x86_avx2_pmulh_w,                          // llvm.x86.avx2.pmulh.w
   4920     x86_avx2_pmulhu_w,                         // llvm.x86.avx2.pmulhu.w
   4921     x86_avx2_pmulu_dq,                         // llvm.x86.avx2.pmulu.dq
   4922     x86_avx2_psad_bw,                          // llvm.x86.avx2.psad.bw
   4923     x86_avx2_pshuf_b,                          // llvm.x86.avx2.pshuf.b
   4924     x86_avx2_psign_b,                          // llvm.x86.avx2.psign.b
   4925     x86_avx2_psign_d,                          // llvm.x86.avx2.psign.d
   4926     x86_avx2_psign_w,                          // llvm.x86.avx2.psign.w
   4927     x86_avx2_psll_d,                           // llvm.x86.avx2.psll.d
   4928     x86_avx2_psll_q,                           // llvm.x86.avx2.psll.q
   4929     x86_avx2_psll_w,                           // llvm.x86.avx2.psll.w
   4930     x86_avx2_pslli_d,                          // llvm.x86.avx2.pslli.d
   4931     x86_avx2_pslli_q,                          // llvm.x86.avx2.pslli.q
   4932     x86_avx2_pslli_w,                          // llvm.x86.avx2.pslli.w
   4933     x86_avx2_psllv_d,                          // llvm.x86.avx2.psllv.d
   4934     x86_avx2_psllv_d_256,                      // llvm.x86.avx2.psllv.d.256
   4935     x86_avx2_psllv_q,                          // llvm.x86.avx2.psllv.q
   4936     x86_avx2_psllv_q_256,                      // llvm.x86.avx2.psllv.q.256
   4937     x86_avx2_psra_d,                           // llvm.x86.avx2.psra.d
   4938     x86_avx2_psra_w,                           // llvm.x86.avx2.psra.w
   4939     x86_avx2_psrai_d,                          // llvm.x86.avx2.psrai.d
   4940     x86_avx2_psrai_w,                          // llvm.x86.avx2.psrai.w
   4941     x86_avx2_psrav_d,                          // llvm.x86.avx2.psrav.d
   4942     x86_avx2_psrav_d_256,                      // llvm.x86.avx2.psrav.d.256
   4943     x86_avx2_psrl_d,                           // llvm.x86.avx2.psrl.d
   4944     x86_avx2_psrl_q,                           // llvm.x86.avx2.psrl.q
   4945     x86_avx2_psrl_w,                           // llvm.x86.avx2.psrl.w
   4946     x86_avx2_psrli_d,                          // llvm.x86.avx2.psrli.d
   4947     x86_avx2_psrli_q,                          // llvm.x86.avx2.psrli.q
   4948     x86_avx2_psrli_w,                          // llvm.x86.avx2.psrli.w
   4949     x86_avx2_psrlv_d,                          // llvm.x86.avx2.psrlv.d
   4950     x86_avx2_psrlv_d_256,                      // llvm.x86.avx2.psrlv.d.256
   4951     x86_avx2_psrlv_q,                          // llvm.x86.avx2.psrlv.q
   4952     x86_avx2_psrlv_q_256,                      // llvm.x86.avx2.psrlv.q.256
   4953     x86_avx2_psubs_b,                          // llvm.x86.avx2.psubs.b
   4954     x86_avx2_psubs_w,                          // llvm.x86.avx2.psubs.w
   4955     x86_avx2_psubus_b,                         // llvm.x86.avx2.psubus.b
   4956     x86_avx2_psubus_w,                         // llvm.x86.avx2.psubus.w
   4957     x86_avx512_broadcastmb_128,                // llvm.x86.avx512.broadcastmb.128
   4958     x86_avx512_broadcastmb_256,                // llvm.x86.avx512.broadcastmb.256
   4959     x86_avx512_broadcastmb_512,                // llvm.x86.avx512.broadcastmb.512
   4960     x86_avx512_broadcastmw_128,                // llvm.x86.avx512.broadcastmw.128
   4961     x86_avx512_broadcastmw_256,                // llvm.x86.avx512.broadcastmw.256
   4962     x86_avx512_broadcastmw_512,                // llvm.x86.avx512.broadcastmw.512
   4963     x86_avx512_cvtb2mask_128,                  // llvm.x86.avx512.cvtb2mask.128
   4964     x86_avx512_cvtb2mask_256,                  // llvm.x86.avx512.cvtb2mask.256
   4965     x86_avx512_cvtb2mask_512,                  // llvm.x86.avx512.cvtb2mask.512
   4966     x86_avx512_cvtd2mask_128,                  // llvm.x86.avx512.cvtd2mask.128
   4967     x86_avx512_cvtd2mask_256,                  // llvm.x86.avx512.cvtd2mask.256
   4968     x86_avx512_cvtd2mask_512,                  // llvm.x86.avx512.cvtd2mask.512
   4969     x86_avx512_cvtq2mask_128,                  // llvm.x86.avx512.cvtq2mask.128
   4970     x86_avx512_cvtq2mask_256,                  // llvm.x86.avx512.cvtq2mask.256
   4971     x86_avx512_cvtq2mask_512,                  // llvm.x86.avx512.cvtq2mask.512
   4972     x86_avx512_cvtsi2sd64,                     // llvm.x86.avx512.cvtsi2sd64
   4973     x86_avx512_cvtsi2ss32,                     // llvm.x86.avx512.cvtsi2ss32
   4974     x86_avx512_cvtsi2ss64,                     // llvm.x86.avx512.cvtsi2ss64
   4975     x86_avx512_cvttsd2si,                      // llvm.x86.avx512.cvttsd2si
   4976     x86_avx512_cvttsd2si64,                    // llvm.x86.avx512.cvttsd2si64
   4977     x86_avx512_cvttsd2usi,                     // llvm.x86.avx512.cvttsd2usi
   4978     x86_avx512_cvttsd2usi64,                   // llvm.x86.avx512.cvttsd2usi64
   4979     x86_avx512_cvttss2si,                      // llvm.x86.avx512.cvttss2si
   4980     x86_avx512_cvttss2si64,                    // llvm.x86.avx512.cvttss2si64
   4981     x86_avx512_cvttss2usi,                     // llvm.x86.avx512.cvttss2usi
   4982     x86_avx512_cvttss2usi64,                   // llvm.x86.avx512.cvttss2usi64
   4983     x86_avx512_cvtusi2sd,                      // llvm.x86.avx512.cvtusi2sd
   4984     x86_avx512_cvtusi2ss,                      // llvm.x86.avx512.cvtusi2ss
   4985     x86_avx512_cvtusi642sd,                    // llvm.x86.avx512.cvtusi642sd
   4986     x86_avx512_cvtusi642ss,                    // llvm.x86.avx512.cvtusi642ss
   4987     x86_avx512_cvtw2mask_128,                  // llvm.x86.avx512.cvtw2mask.128
   4988     x86_avx512_cvtw2mask_256,                  // llvm.x86.avx512.cvtw2mask.256
   4989     x86_avx512_cvtw2mask_512,                  // llvm.x86.avx512.cvtw2mask.512
   4990     x86_avx512_exp2_pd,                        // llvm.x86.avx512.exp2.pd
   4991     x86_avx512_exp2_ps,                        // llvm.x86.avx512.exp2.ps
   4992     x86_avx512_gather_dpd_512,                 // llvm.x86.avx512.gather.dpd.512
   4993     x86_avx512_gather_dpi_512,                 // llvm.x86.avx512.gather.dpi.512
   4994     x86_avx512_gather_dpq_512,                 // llvm.x86.avx512.gather.dpq.512
   4995     x86_avx512_gather_dps_512,                 // llvm.x86.avx512.gather.dps.512
   4996     x86_avx512_gather_qpd_512,                 // llvm.x86.avx512.gather.qpd.512
   4997     x86_avx512_gather_qpi_512,                 // llvm.x86.avx512.gather.qpi.512
   4998     x86_avx512_gather_qpq_512,                 // llvm.x86.avx512.gather.qpq.512
   4999     x86_avx512_gather_qps_512,                 // llvm.x86.avx512.gather.qps.512
   5000     x86_avx512_gather3div2_df,                 // llvm.x86.avx512.gather3div2.df
   5001     x86_avx512_gather3div2_di,                 // llvm.x86.avx512.gather3div2.di
   5002     x86_avx512_gather3div4_df,                 // llvm.x86.avx512.gather3div4.df
   5003     x86_avx512_gather3div4_di,                 // llvm.x86.avx512.gather3div4.di
   5004     x86_avx512_gather3div4_sf,                 // llvm.x86.avx512.gather3div4.sf
   5005     x86_avx512_gather3div4_si,                 // llvm.x86.avx512.gather3div4.si
   5006     x86_avx512_gather3div8_sf,                 // llvm.x86.avx512.gather3div8.sf
   5007     x86_avx512_gather3div8_si,                 // llvm.x86.avx512.gather3div8.si
   5008     x86_avx512_gather3siv2_df,                 // llvm.x86.avx512.gather3siv2.df
   5009     x86_avx512_gather3siv2_di,                 // llvm.x86.avx512.gather3siv2.di
   5010     x86_avx512_gather3siv4_df,                 // llvm.x86.avx512.gather3siv4.df
   5011     x86_avx512_gather3siv4_di,                 // llvm.x86.avx512.gather3siv4.di
   5012     x86_avx512_gather3siv4_sf,                 // llvm.x86.avx512.gather3siv4.sf
   5013     x86_avx512_gather3siv4_si,                 // llvm.x86.avx512.gather3siv4.si
   5014     x86_avx512_gather3siv8_sf,                 // llvm.x86.avx512.gather3siv8.sf
   5015     x86_avx512_gather3siv8_si,                 // llvm.x86.avx512.gather3siv8.si
   5016     x86_avx512_gatherpf_dpd_512,               // llvm.x86.avx512.gatherpf.dpd.512
   5017     x86_avx512_gatherpf_dps_512,               // llvm.x86.avx512.gatherpf.dps.512
   5018     x86_avx512_gatherpf_qpd_512,               // llvm.x86.avx512.gatherpf.qpd.512
   5019     x86_avx512_gatherpf_qps_512,               // llvm.x86.avx512.gatherpf.qps.512
   5020     x86_avx512_kand_w,                         // llvm.x86.avx512.kand.w
   5021     x86_avx512_kandn_w,                        // llvm.x86.avx512.kandn.w
   5022     x86_avx512_knot_w,                         // llvm.x86.avx512.knot.w
   5023     x86_avx512_kor_w,                          // llvm.x86.avx512.kor.w
   5024     x86_avx512_kortestc_w,                     // llvm.x86.avx512.kortestc.w
   5025     x86_avx512_kortestz_w,                     // llvm.x86.avx512.kortestz.w
   5026     x86_avx512_kunpck_bw,                      // llvm.x86.avx512.kunpck.bw
   5027     x86_avx512_kunpck_dq,                      // llvm.x86.avx512.kunpck.dq
   5028     x86_avx512_kunpck_wd,                      // llvm.x86.avx512.kunpck.wd
   5029     x86_avx512_kxnor_w,                        // llvm.x86.avx512.kxnor.w
   5030     x86_avx512_kxor_w,                         // llvm.x86.avx512.kxor.w
   5031     x86_avx512_mask_add_pd_512,                // llvm.x86.avx512.mask.add.pd.512
   5032     x86_avx512_mask_add_ps_512,                // llvm.x86.avx512.mask.add.ps.512
   5033     x86_avx512_mask_add_sd_round,              // llvm.x86.avx512.mask.add.sd.round
   5034     x86_avx512_mask_add_ss_round,              // llvm.x86.avx512.mask.add.ss.round
   5035     x86_avx512_mask_cmp_pd_128,                // llvm.x86.avx512.mask.cmp.pd.128
   5036     x86_avx512_mask_cmp_pd_256,                // llvm.x86.avx512.mask.cmp.pd.256
   5037     x86_avx512_mask_cmp_pd_512,                // llvm.x86.avx512.mask.cmp.pd.512
   5038     x86_avx512_mask_cmp_ps_128,                // llvm.x86.avx512.mask.cmp.ps.128
   5039     x86_avx512_mask_cmp_ps_256,                // llvm.x86.avx512.mask.cmp.ps.256
   5040     x86_avx512_mask_cmp_ps_512,                // llvm.x86.avx512.mask.cmp.ps.512
   5041     x86_avx512_mask_cmp_sd,                    // llvm.x86.avx512.mask.cmp.sd
   5042     x86_avx512_mask_cmp_ss,                    // llvm.x86.avx512.mask.cmp.ss
   5043     x86_avx512_mask_compress_d_128,            // llvm.x86.avx512.mask.compress.d.128
   5044     x86_avx512_mask_compress_d_256,            // llvm.x86.avx512.mask.compress.d.256
   5045     x86_avx512_mask_compress_d_512,            // llvm.x86.avx512.mask.compress.d.512
   5046     x86_avx512_mask_compress_pd_128,           // llvm.x86.avx512.mask.compress.pd.128
   5047     x86_avx512_mask_compress_pd_256,           // llvm.x86.avx512.mask.compress.pd.256
   5048     x86_avx512_mask_compress_pd_512,           // llvm.x86.avx512.mask.compress.pd.512
   5049     x86_avx512_mask_compress_ps_128,           // llvm.x86.avx512.mask.compress.ps.128
   5050     x86_avx512_mask_compress_ps_256,           // llvm.x86.avx512.mask.compress.ps.256
   5051     x86_avx512_mask_compress_ps_512,           // llvm.x86.avx512.mask.compress.ps.512
   5052     x86_avx512_mask_compress_q_128,            // llvm.x86.avx512.mask.compress.q.128
   5053     x86_avx512_mask_compress_q_256,            // llvm.x86.avx512.mask.compress.q.256
   5054     x86_avx512_mask_compress_q_512,            // llvm.x86.avx512.mask.compress.q.512
   5055     x86_avx512_mask_compress_store_d_128,      // llvm.x86.avx512.mask.compress.store.d.128
   5056     x86_avx512_mask_compress_store_d_256,      // llvm.x86.avx512.mask.compress.store.d.256
   5057     x86_avx512_mask_compress_store_d_512,      // llvm.x86.avx512.mask.compress.store.d.512
   5058     x86_avx512_mask_compress_store_pd_128,     // llvm.x86.avx512.mask.compress.store.pd.128
   5059     x86_avx512_mask_compress_store_pd_256,     // llvm.x86.avx512.mask.compress.store.pd.256
   5060     x86_avx512_mask_compress_store_pd_512,     // llvm.x86.avx512.mask.compress.store.pd.512
   5061     x86_avx512_mask_compress_store_ps_128,     // llvm.x86.avx512.mask.compress.store.ps.128
   5062     x86_avx512_mask_compress_store_ps_256,     // llvm.x86.avx512.mask.compress.store.ps.256
   5063     x86_avx512_mask_compress_store_ps_512,     // llvm.x86.avx512.mask.compress.store.ps.512
   5064     x86_avx512_mask_compress_store_q_128,      // llvm.x86.avx512.mask.compress.store.q.128
   5065     x86_avx512_mask_compress_store_q_256,      // llvm.x86.avx512.mask.compress.store.q.256
   5066     x86_avx512_mask_compress_store_q_512,      // llvm.x86.avx512.mask.compress.store.q.512
   5067     x86_avx512_mask_conflict_d_128,            // llvm.x86.avx512.mask.conflict.d.128
   5068     x86_avx512_mask_conflict_d_256,            // llvm.x86.avx512.mask.conflict.d.256
   5069     x86_avx512_mask_conflict_d_512,            // llvm.x86.avx512.mask.conflict.d.512
   5070     x86_avx512_mask_conflict_q_128,            // llvm.x86.avx512.mask.conflict.q.128
   5071     x86_avx512_mask_conflict_q_256,            // llvm.x86.avx512.mask.conflict.q.256
   5072     x86_avx512_mask_conflict_q_512,            // llvm.x86.avx512.mask.conflict.q.512
   5073     x86_avx512_mask_cvtdq2ps_128,              // llvm.x86.avx512.mask.cvtdq2ps.128
   5074     x86_avx512_mask_cvtdq2ps_256,              // llvm.x86.avx512.mask.cvtdq2ps.256
   5075     x86_avx512_mask_cvtdq2ps_512,              // llvm.x86.avx512.mask.cvtdq2ps.512
   5076     x86_avx512_mask_cvtpd2dq_128,              // llvm.x86.avx512.mask.cvtpd2dq.128
   5077     x86_avx512_mask_cvtpd2dq_256,              // llvm.x86.avx512.mask.cvtpd2dq.256
   5078     x86_avx512_mask_cvtpd2dq_512,              // llvm.x86.avx512.mask.cvtpd2dq.512
   5079     x86_avx512_mask_cvtpd2ps,                  // llvm.x86.avx512.mask.cvtpd2ps
   5080     x86_avx512_mask_cvtpd2ps_256,              // llvm.x86.avx512.mask.cvtpd2ps.256
   5081     x86_avx512_mask_cvtpd2ps_512,              // llvm.x86.avx512.mask.cvtpd2ps.512
   5082     x86_avx512_mask_cvtpd2qq_128,              // llvm.x86.avx512.mask.cvtpd2qq.128
   5083     x86_avx512_mask_cvtpd2qq_256,              // llvm.x86.avx512.mask.cvtpd2qq.256
   5084     x86_avx512_mask_cvtpd2qq_512,              // llvm.x86.avx512.mask.cvtpd2qq.512
   5085     x86_avx512_mask_cvtpd2udq_128,             // llvm.x86.avx512.mask.cvtpd2udq.128
   5086     x86_avx512_mask_cvtpd2udq_256,             // llvm.x86.avx512.mask.cvtpd2udq.256
   5087     x86_avx512_mask_cvtpd2udq_512,             // llvm.x86.avx512.mask.cvtpd2udq.512
   5088     x86_avx512_mask_cvtpd2uqq_128,             // llvm.x86.avx512.mask.cvtpd2uqq.128
   5089     x86_avx512_mask_cvtpd2uqq_256,             // llvm.x86.avx512.mask.cvtpd2uqq.256
   5090     x86_avx512_mask_cvtpd2uqq_512,             // llvm.x86.avx512.mask.cvtpd2uqq.512
   5091     x86_avx512_mask_cvtps2dq_128,              // llvm.x86.avx512.mask.cvtps2dq.128
   5092     x86_avx512_mask_cvtps2dq_256,              // llvm.x86.avx512.mask.cvtps2dq.256
   5093     x86_avx512_mask_cvtps2dq_512,              // llvm.x86.avx512.mask.cvtps2dq.512
   5094     x86_avx512_mask_cvtps2pd_128,              // llvm.x86.avx512.mask.cvtps2pd.128
   5095     x86_avx512_mask_cvtps2pd_256,              // llvm.x86.avx512.mask.cvtps2pd.256
   5096     x86_avx512_mask_cvtps2pd_512,              // llvm.x86.avx512.mask.cvtps2pd.512
   5097     x86_avx512_mask_cvtps2qq_128,              // llvm.x86.avx512.mask.cvtps2qq.128
   5098     x86_avx512_mask_cvtps2qq_256,              // llvm.x86.avx512.mask.cvtps2qq.256
   5099     x86_avx512_mask_cvtps2qq_512,              // llvm.x86.avx512.mask.cvtps2qq.512
   5100     x86_avx512_mask_cvtps2udq_128,             // llvm.x86.avx512.mask.cvtps2udq.128
   5101     x86_avx512_mask_cvtps2udq_256,             // llvm.x86.avx512.mask.cvtps2udq.256
   5102     x86_avx512_mask_cvtps2udq_512,             // llvm.x86.avx512.mask.cvtps2udq.512
   5103     x86_avx512_mask_cvtps2uqq_128,             // llvm.x86.avx512.mask.cvtps2uqq.128
   5104     x86_avx512_mask_cvtps2uqq_256,             // llvm.x86.avx512.mask.cvtps2uqq.256
   5105     x86_avx512_mask_cvtps2uqq_512,             // llvm.x86.avx512.mask.cvtps2uqq.512
   5106     x86_avx512_mask_cvtqq2pd_128,              // llvm.x86.avx512.mask.cvtqq2pd.128
   5107     x86_avx512_mask_cvtqq2pd_256,              // llvm.x86.avx512.mask.cvtqq2pd.256
   5108     x86_avx512_mask_cvtqq2pd_512,              // llvm.x86.avx512.mask.cvtqq2pd.512
   5109     x86_avx512_mask_cvtqq2ps_128,              // llvm.x86.avx512.mask.cvtqq2ps.128
   5110     x86_avx512_mask_cvtqq2ps_256,              // llvm.x86.avx512.mask.cvtqq2ps.256
   5111     x86_avx512_mask_cvtqq2ps_512,              // llvm.x86.avx512.mask.cvtqq2ps.512
   5112     x86_avx512_mask_cvtsd2ss_round,            // llvm.x86.avx512.mask.cvtsd2ss.round
   5113     x86_avx512_mask_cvtss2sd_round,            // llvm.x86.avx512.mask.cvtss2sd.round
   5114     x86_avx512_mask_cvttpd2dq_128,             // llvm.x86.avx512.mask.cvttpd2dq.128
   5115     x86_avx512_mask_cvttpd2dq_256,             // llvm.x86.avx512.mask.cvttpd2dq.256
   5116     x86_avx512_mask_cvttpd2dq_512,             // llvm.x86.avx512.mask.cvttpd2dq.512
   5117     x86_avx512_mask_cvttpd2qq_128,             // llvm.x86.avx512.mask.cvttpd2qq.128
   5118     x86_avx512_mask_cvttpd2qq_256,             // llvm.x86.avx512.mask.cvttpd2qq.256
   5119     x86_avx512_mask_cvttpd2qq_512,             // llvm.x86.avx512.mask.cvttpd2qq.512
   5120     x86_avx512_mask_cvttpd2udq_128,            // llvm.x86.avx512.mask.cvttpd2udq.128
   5121     x86_avx512_mask_cvttpd2udq_256,            // llvm.x86.avx512.mask.cvttpd2udq.256
   5122     x86_avx512_mask_cvttpd2udq_512,            // llvm.x86.avx512.mask.cvttpd2udq.512
   5123     x86_avx512_mask_cvttpd2uqq_128,            // llvm.x86.avx512.mask.cvttpd2uqq.128
   5124     x86_avx512_mask_cvttpd2uqq_256,            // llvm.x86.avx512.mask.cvttpd2uqq.256
   5125     x86_avx512_mask_cvttpd2uqq_512,            // llvm.x86.avx512.mask.cvttpd2uqq.512
   5126     x86_avx512_mask_cvttps2dq_128,             // llvm.x86.avx512.mask.cvttps2dq.128
   5127     x86_avx512_mask_cvttps2dq_256,             // llvm.x86.avx512.mask.cvttps2dq.256
   5128     x86_avx512_mask_cvttps2dq_512,             // llvm.x86.avx512.mask.cvttps2dq.512
   5129     x86_avx512_mask_cvttps2qq_128,             // llvm.x86.avx512.mask.cvttps2qq.128
   5130     x86_avx512_mask_cvttps2qq_256,             // llvm.x86.avx512.mask.cvttps2qq.256
   5131     x86_avx512_mask_cvttps2qq_512,             // llvm.x86.avx512.mask.cvttps2qq.512
   5132     x86_avx512_mask_cvttps2udq_128,            // llvm.x86.avx512.mask.cvttps2udq.128
   5133     x86_avx512_mask_cvttps2udq_256,            // llvm.x86.avx512.mask.cvttps2udq.256
   5134     x86_avx512_mask_cvttps2udq_512,            // llvm.x86.avx512.mask.cvttps2udq.512
   5135     x86_avx512_mask_cvttps2uqq_128,            // llvm.x86.avx512.mask.cvttps2uqq.128
   5136     x86_avx512_mask_cvttps2uqq_256,            // llvm.x86.avx512.mask.cvttps2uqq.256
   5137     x86_avx512_mask_cvttps2uqq_512,            // llvm.x86.avx512.mask.cvttps2uqq.512
   5138     x86_avx512_mask_cvtudq2ps_128,             // llvm.x86.avx512.mask.cvtudq2ps.128
   5139     x86_avx512_mask_cvtudq2ps_256,             // llvm.x86.avx512.mask.cvtudq2ps.256
   5140     x86_avx512_mask_cvtudq2ps_512,             // llvm.x86.avx512.mask.cvtudq2ps.512
   5141     x86_avx512_mask_cvtuqq2pd_128,             // llvm.x86.avx512.mask.cvtuqq2pd.128
   5142     x86_avx512_mask_cvtuqq2pd_256,             // llvm.x86.avx512.mask.cvtuqq2pd.256
   5143     x86_avx512_mask_cvtuqq2pd_512,             // llvm.x86.avx512.mask.cvtuqq2pd.512
   5144     x86_avx512_mask_cvtuqq2ps_128,             // llvm.x86.avx512.mask.cvtuqq2ps.128
   5145     x86_avx512_mask_cvtuqq2ps_256,             // llvm.x86.avx512.mask.cvtuqq2ps.256
   5146     x86_avx512_mask_cvtuqq2ps_512,             // llvm.x86.avx512.mask.cvtuqq2ps.512
   5147     x86_avx512_mask_dbpsadbw_128,              // llvm.x86.avx512.mask.dbpsadbw.128
   5148     x86_avx512_mask_dbpsadbw_256,              // llvm.x86.avx512.mask.dbpsadbw.256
   5149     x86_avx512_mask_dbpsadbw_512,              // llvm.x86.avx512.mask.dbpsadbw.512
   5150     x86_avx512_mask_div_pd_512,                // llvm.x86.avx512.mask.div.pd.512
   5151     x86_avx512_mask_div_ps_512,                // llvm.x86.avx512.mask.div.ps.512
   5152     x86_avx512_mask_div_sd_round,              // llvm.x86.avx512.mask.div.sd.round
   5153     x86_avx512_mask_div_ss_round,              // llvm.x86.avx512.mask.div.ss.round
   5154     x86_avx512_mask_expand_d_128,              // llvm.x86.avx512.mask.expand.d.128
   5155     x86_avx512_mask_expand_d_256,              // llvm.x86.avx512.mask.expand.d.256
   5156     x86_avx512_mask_expand_d_512,              // llvm.x86.avx512.mask.expand.d.512
   5157     x86_avx512_mask_expand_load_d_128,         // llvm.x86.avx512.mask.expand.load.d.128
   5158     x86_avx512_mask_expand_load_d_256,         // llvm.x86.avx512.mask.expand.load.d.256
   5159     x86_avx512_mask_expand_load_d_512,         // llvm.x86.avx512.mask.expand.load.d.512
   5160     x86_avx512_mask_expand_load_pd_128,        // llvm.x86.avx512.mask.expand.load.pd.128
   5161     x86_avx512_mask_expand_load_pd_256,        // llvm.x86.avx512.mask.expand.load.pd.256
   5162     x86_avx512_mask_expand_load_pd_512,        // llvm.x86.avx512.mask.expand.load.pd.512
   5163     x86_avx512_mask_expand_load_ps_128,        // llvm.x86.avx512.mask.expand.load.ps.128
   5164     x86_avx512_mask_expand_load_ps_256,        // llvm.x86.avx512.mask.expand.load.ps.256
   5165     x86_avx512_mask_expand_load_ps_512,        // llvm.x86.avx512.mask.expand.load.ps.512
   5166     x86_avx512_mask_expand_load_q_128,         // llvm.x86.avx512.mask.expand.load.q.128
   5167     x86_avx512_mask_expand_load_q_256,         // llvm.x86.avx512.mask.expand.load.q.256
   5168     x86_avx512_mask_expand_load_q_512,         // llvm.x86.avx512.mask.expand.load.q.512
   5169     x86_avx512_mask_expand_pd_128,             // llvm.x86.avx512.mask.expand.pd.128
   5170     x86_avx512_mask_expand_pd_256,             // llvm.x86.avx512.mask.expand.pd.256
   5171     x86_avx512_mask_expand_pd_512,             // llvm.x86.avx512.mask.expand.pd.512
   5172     x86_avx512_mask_expand_ps_128,             // llvm.x86.avx512.mask.expand.ps.128
   5173     x86_avx512_mask_expand_ps_256,             // llvm.x86.avx512.mask.expand.ps.256
   5174     x86_avx512_mask_expand_ps_512,             // llvm.x86.avx512.mask.expand.ps.512
   5175     x86_avx512_mask_expand_q_128,              // llvm.x86.avx512.mask.expand.q.128
   5176     x86_avx512_mask_expand_q_256,              // llvm.x86.avx512.mask.expand.q.256
   5177     x86_avx512_mask_expand_q_512,              // llvm.x86.avx512.mask.expand.q.512
   5178     x86_avx512_mask_fixupimm_pd_128,           // llvm.x86.avx512.mask.fixupimm.pd.128
   5179     x86_avx512_mask_fixupimm_pd_256,           // llvm.x86.avx512.mask.fixupimm.pd.256
   5180     x86_avx512_mask_fixupimm_pd_512,           // llvm.x86.avx512.mask.fixupimm.pd.512
   5181     x86_avx512_mask_fixupimm_ps_128,           // llvm.x86.avx512.mask.fixupimm.ps.128
   5182     x86_avx512_mask_fixupimm_ps_256,           // llvm.x86.avx512.mask.fixupimm.ps.256
   5183     x86_avx512_mask_fixupimm_ps_512,           // llvm.x86.avx512.mask.fixupimm.ps.512
   5184     x86_avx512_mask_fixupimm_sd,               // llvm.x86.avx512.mask.fixupimm.sd
   5185     x86_avx512_mask_fixupimm_ss,               // llvm.x86.avx512.mask.fixupimm.ss
   5186     x86_avx512_mask_fpclass_pd_128,            // llvm.x86.avx512.mask.fpclass.pd.128
   5187     x86_avx512_mask_fpclass_pd_256,            // llvm.x86.avx512.mask.fpclass.pd.256
   5188     x86_avx512_mask_fpclass_pd_512,            // llvm.x86.avx512.mask.fpclass.pd.512
   5189     x86_avx512_mask_fpclass_ps_128,            // llvm.x86.avx512.mask.fpclass.ps.128
   5190     x86_avx512_mask_fpclass_ps_256,            // llvm.x86.avx512.mask.fpclass.ps.256
   5191     x86_avx512_mask_fpclass_ps_512,            // llvm.x86.avx512.mask.fpclass.ps.512
   5192     x86_avx512_mask_fpclass_sd,                // llvm.x86.avx512.mask.fpclass.sd
   5193     x86_avx512_mask_fpclass_ss,                // llvm.x86.avx512.mask.fpclass.ss
   5194     x86_avx512_mask_getexp_pd_128,             // llvm.x86.avx512.mask.getexp.pd.128
   5195     x86_avx512_mask_getexp_pd_256,             // llvm.x86.avx512.mask.getexp.pd.256
   5196     x86_avx512_mask_getexp_pd_512,             // llvm.x86.avx512.mask.getexp.pd.512
   5197     x86_avx512_mask_getexp_ps_128,             // llvm.x86.avx512.mask.getexp.ps.128
   5198     x86_avx512_mask_getexp_ps_256,             // llvm.x86.avx512.mask.getexp.ps.256
   5199     x86_avx512_mask_getexp_ps_512,             // llvm.x86.avx512.mask.getexp.ps.512
   5200     x86_avx512_mask_getexp_sd,                 // llvm.x86.avx512.mask.getexp.sd
   5201     x86_avx512_mask_getexp_ss,                 // llvm.x86.avx512.mask.getexp.ss
   5202     x86_avx512_mask_getmant_pd_128,            // llvm.x86.avx512.mask.getmant.pd.128
   5203     x86_avx512_mask_getmant_pd_256,            // llvm.x86.avx512.mask.getmant.pd.256
   5204     x86_avx512_mask_getmant_pd_512,            // llvm.x86.avx512.mask.getmant.pd.512
   5205     x86_avx512_mask_getmant_ps_128,            // llvm.x86.avx512.mask.getmant.ps.128
   5206     x86_avx512_mask_getmant_ps_256,            // llvm.x86.avx512.mask.getmant.ps.256
   5207     x86_avx512_mask_getmant_ps_512,            // llvm.x86.avx512.mask.getmant.ps.512
   5208     x86_avx512_mask_getmant_sd,                // llvm.x86.avx512.mask.getmant.sd
   5209     x86_avx512_mask_getmant_ss,                // llvm.x86.avx512.mask.getmant.ss
   5210     x86_avx512_mask_max_pd_512,                // llvm.x86.avx512.mask.max.pd.512
   5211     x86_avx512_mask_max_ps_512,                // llvm.x86.avx512.mask.max.ps.512
   5212     x86_avx512_mask_max_sd_round,              // llvm.x86.avx512.mask.max.sd.round
   5213     x86_avx512_mask_max_ss_round,              // llvm.x86.avx512.mask.max.ss.round
   5214     x86_avx512_mask_min_pd_512,                // llvm.x86.avx512.mask.min.pd.512
   5215     x86_avx512_mask_min_ps_512,                // llvm.x86.avx512.mask.min.ps.512
   5216     x86_avx512_mask_min_sd_round,              // llvm.x86.avx512.mask.min.sd.round
   5217     x86_avx512_mask_min_ss_round,              // llvm.x86.avx512.mask.min.ss.round
   5218     x86_avx512_mask_mul_pd_512,                // llvm.x86.avx512.mask.mul.pd.512
   5219     x86_avx512_mask_mul_ps_512,                // llvm.x86.avx512.mask.mul.ps.512
   5220     x86_avx512_mask_mul_sd_round,              // llvm.x86.avx512.mask.mul.sd.round
   5221     x86_avx512_mask_mul_ss_round,              // llvm.x86.avx512.mask.mul.ss.round
   5222     x86_avx512_mask_padds_b_128,               // llvm.x86.avx512.mask.padds.b.128
   5223     x86_avx512_mask_padds_b_256,               // llvm.x86.avx512.mask.padds.b.256
   5224     x86_avx512_mask_padds_b_512,               // llvm.x86.avx512.mask.padds.b.512
   5225     x86_avx512_mask_padds_w_128,               // llvm.x86.avx512.mask.padds.w.128
   5226     x86_avx512_mask_padds_w_256,               // llvm.x86.avx512.mask.padds.w.256
   5227     x86_avx512_mask_padds_w_512,               // llvm.x86.avx512.mask.padds.w.512
   5228     x86_avx512_mask_paddus_b_128,              // llvm.x86.avx512.mask.paddus.b.128
   5229     x86_avx512_mask_paddus_b_256,              // llvm.x86.avx512.mask.paddus.b.256
   5230     x86_avx512_mask_paddus_b_512,              // llvm.x86.avx512.mask.paddus.b.512
   5231     x86_avx512_mask_paddus_w_128,              // llvm.x86.avx512.mask.paddus.w.128
   5232     x86_avx512_mask_paddus_w_256,              // llvm.x86.avx512.mask.paddus.w.256
   5233     x86_avx512_mask_paddus_w_512,              // llvm.x86.avx512.mask.paddus.w.512
   5234     x86_avx512_mask_permvar_df_256,            // llvm.x86.avx512.mask.permvar.df.256
   5235     x86_avx512_mask_permvar_df_512,            // llvm.x86.avx512.mask.permvar.df.512
   5236     x86_avx512_mask_permvar_di_256,            // llvm.x86.avx512.mask.permvar.di.256
   5237     x86_avx512_mask_permvar_di_512,            // llvm.x86.avx512.mask.permvar.di.512
   5238     x86_avx512_mask_permvar_hi_128,            // llvm.x86.avx512.mask.permvar.hi.128
   5239     x86_avx512_mask_permvar_hi_256,            // llvm.x86.avx512.mask.permvar.hi.256
   5240     x86_avx512_mask_permvar_hi_512,            // llvm.x86.avx512.mask.permvar.hi.512
   5241     x86_avx512_mask_permvar_qi_128,            // llvm.x86.avx512.mask.permvar.qi.128
   5242     x86_avx512_mask_permvar_qi_256,            // llvm.x86.avx512.mask.permvar.qi.256
   5243     x86_avx512_mask_permvar_qi_512,            // llvm.x86.avx512.mask.permvar.qi.512
   5244     x86_avx512_mask_permvar_sf_256,            // llvm.x86.avx512.mask.permvar.sf.256
   5245     x86_avx512_mask_permvar_sf_512,            // llvm.x86.avx512.mask.permvar.sf.512
   5246     x86_avx512_mask_permvar_si_256,            // llvm.x86.avx512.mask.permvar.si.256
   5247     x86_avx512_mask_permvar_si_512,            // llvm.x86.avx512.mask.permvar.si.512
   5248     x86_avx512_mask_pmaddubs_w_128,            // llvm.x86.avx512.mask.pmaddubs.w.128
   5249     x86_avx512_mask_pmaddubs_w_256,            // llvm.x86.avx512.mask.pmaddubs.w.256
   5250     x86_avx512_mask_pmaddubs_w_512,            // llvm.x86.avx512.mask.pmaddubs.w.512
   5251     x86_avx512_mask_pmaddw_d_128,              // llvm.x86.avx512.mask.pmaddw.d.128
   5252     x86_avx512_mask_pmaddw_d_256,              // llvm.x86.avx512.mask.pmaddw.d.256
   5253     x86_avx512_mask_pmaddw_d_512,              // llvm.x86.avx512.mask.pmaddw.d.512
   5254     x86_avx512_mask_pmov_db_128,               // llvm.x86.avx512.mask.pmov.db.128
   5255     x86_avx512_mask_pmov_db_256,               // llvm.x86.avx512.mask.pmov.db.256
   5256     x86_avx512_mask_pmov_db_512,               // llvm.x86.avx512.mask.pmov.db.512
   5257     x86_avx512_mask_pmov_db_mem_128,           // llvm.x86.avx512.mask.pmov.db.mem.128
   5258     x86_avx512_mask_pmov_db_mem_256,           // llvm.x86.avx512.mask.pmov.db.mem.256
   5259     x86_avx512_mask_pmov_db_mem_512,           // llvm.x86.avx512.mask.pmov.db.mem.512
   5260     x86_avx512_mask_pmov_dw_128,               // llvm.x86.avx512.mask.pmov.dw.128
   5261     x86_avx512_mask_pmov_dw_256,               // llvm.x86.avx512.mask.pmov.dw.256
   5262     x86_avx512_mask_pmov_dw_512,               // llvm.x86.avx512.mask.pmov.dw.512
   5263     x86_avx512_mask_pmov_dw_mem_128,           // llvm.x86.avx512.mask.pmov.dw.mem.128
   5264     x86_avx512_mask_pmov_dw_mem_256,           // llvm.x86.avx512.mask.pmov.dw.mem.256
   5265     x86_avx512_mask_pmov_dw_mem_512,           // llvm.x86.avx512.mask.pmov.dw.mem.512
   5266     x86_avx512_mask_pmov_qb_128,               // llvm.x86.avx512.mask.pmov.qb.128
   5267     x86_avx512_mask_pmov_qb_256,               // llvm.x86.avx512.mask.pmov.qb.256
   5268     x86_avx512_mask_pmov_qb_512,               // llvm.x86.avx512.mask.pmov.qb.512
   5269     x86_avx512_mask_pmov_qb_mem_128,           // llvm.x86.avx512.mask.pmov.qb.mem.128
   5270     x86_avx512_mask_pmov_qb_mem_256,           // llvm.x86.avx512.mask.pmov.qb.mem.256
   5271     x86_avx512_mask_pmov_qb_mem_512,           // llvm.x86.avx512.mask.pmov.qb.mem.512
   5272     x86_avx512_mask_pmov_qd_128,               // llvm.x86.avx512.mask.pmov.qd.128
   5273     x86_avx512_mask_pmov_qd_256,               // llvm.x86.avx512.mask.pmov.qd.256
   5274     x86_avx512_mask_pmov_qd_512,               // llvm.x86.avx512.mask.pmov.qd.512
   5275     x86_avx512_mask_pmov_qd_mem_128,           // llvm.x86.avx512.mask.pmov.qd.mem.128
   5276     x86_avx512_mask_pmov_qd_mem_256,           // llvm.x86.avx512.mask.pmov.qd.mem.256
   5277     x86_avx512_mask_pmov_qd_mem_512,           // llvm.x86.avx512.mask.pmov.qd.mem.512
   5278     x86_avx512_mask_pmov_qw_128,               // llvm.x86.avx512.mask.pmov.qw.128
   5279     x86_avx512_mask_pmov_qw_256,               // llvm.x86.avx512.mask.pmov.qw.256
   5280     x86_avx512_mask_pmov_qw_512,               // llvm.x86.avx512.mask.pmov.qw.512
   5281     x86_avx512_mask_pmov_qw_mem_128,           // llvm.x86.avx512.mask.pmov.qw.mem.128
   5282     x86_avx512_mask_pmov_qw_mem_256,           // llvm.x86.avx512.mask.pmov.qw.mem.256
   5283     x86_avx512_mask_pmov_qw_mem_512,           // llvm.x86.avx512.mask.pmov.qw.mem.512
   5284     x86_avx512_mask_pmov_wb_128,               // llvm.x86.avx512.mask.pmov.wb.128
   5285     x86_avx512_mask_pmov_wb_256,               // llvm.x86.avx512.mask.pmov.wb.256
   5286     x86_avx512_mask_pmov_wb_512,               // llvm.x86.avx512.mask.pmov.wb.512
   5287     x86_avx512_mask_pmov_wb_mem_128,           // llvm.x86.avx512.mask.pmov.wb.mem.128
   5288     x86_avx512_mask_pmov_wb_mem_256,           // llvm.x86.avx512.mask.pmov.wb.mem.256
   5289     x86_avx512_mask_pmov_wb_mem_512,           // llvm.x86.avx512.mask.pmov.wb.mem.512
   5290     x86_avx512_mask_pmovs_db_128,              // llvm.x86.avx512.mask.pmovs.db.128
   5291     x86_avx512_mask_pmovs_db_256,              // llvm.x86.avx512.mask.pmovs.db.256
   5292     x86_avx512_mask_pmovs_db_512,              // llvm.x86.avx512.mask.pmovs.db.512
   5293     x86_avx512_mask_pmovs_db_mem_128,          // llvm.x86.avx512.mask.pmovs.db.mem.128
   5294     x86_avx512_mask_pmovs_db_mem_256,          // llvm.x86.avx512.mask.pmovs.db.mem.256
   5295     x86_avx512_mask_pmovs_db_mem_512,          // llvm.x86.avx512.mask.pmovs.db.mem.512
   5296     x86_avx512_mask_pmovs_dw_128,              // llvm.x86.avx512.mask.pmovs.dw.128
   5297     x86_avx512_mask_pmovs_dw_256,              // llvm.x86.avx512.mask.pmovs.dw.256
   5298     x86_avx512_mask_pmovs_dw_512,              // llvm.x86.avx512.mask.pmovs.dw.512
   5299     x86_avx512_mask_pmovs_dw_mem_128,          // llvm.x86.avx512.mask.pmovs.dw.mem.128
   5300     x86_avx512_mask_pmovs_dw_mem_256,          // llvm.x86.avx512.mask.pmovs.dw.mem.256
   5301     x86_avx512_mask_pmovs_dw_mem_512,          // llvm.x86.avx512.mask.pmovs.dw.mem.512
   5302     x86_avx512_mask_pmovs_qb_128,              // llvm.x86.avx512.mask.pmovs.qb.128
   5303     x86_avx512_mask_pmovs_qb_256,              // llvm.x86.avx512.mask.pmovs.qb.256
   5304     x86_avx512_mask_pmovs_qb_512,              // llvm.x86.avx512.mask.pmovs.qb.512
   5305     x86_avx512_mask_pmovs_qb_mem_128,          // llvm.x86.avx512.mask.pmovs.qb.mem.128
   5306     x86_avx512_mask_pmovs_qb_mem_256,          // llvm.x86.avx512.mask.pmovs.qb.mem.256
   5307     x86_avx512_mask_pmovs_qb_mem_512,          // llvm.x86.avx512.mask.pmovs.qb.mem.512
   5308     x86_avx512_mask_pmovs_qd_128,              // llvm.x86.avx512.mask.pmovs.qd.128
   5309     x86_avx512_mask_pmovs_qd_256,              // llvm.x86.avx512.mask.pmovs.qd.256
   5310     x86_avx512_mask_pmovs_qd_512,              // llvm.x86.avx512.mask.pmovs.qd.512
   5311     x86_avx512_mask_pmovs_qd_mem_128,          // llvm.x86.avx512.mask.pmovs.qd.mem.128
   5312     x86_avx512_mask_pmovs_qd_mem_256,          // llvm.x86.avx512.mask.pmovs.qd.mem.256
   5313     x86_avx512_mask_pmovs_qd_mem_512,          // llvm.x86.avx512.mask.pmovs.qd.mem.512
   5314     x86_avx512_mask_pmovs_qw_128,              // llvm.x86.avx512.mask.pmovs.qw.128
   5315     x86_avx512_mask_pmovs_qw_256,              // llvm.x86.avx512.mask.pmovs.qw.256
   5316     x86_avx512_mask_pmovs_qw_512,              // llvm.x86.avx512.mask.pmovs.qw.512
   5317     x86_avx512_mask_pmovs_qw_mem_128,          // llvm.x86.avx512.mask.pmovs.qw.mem.128
   5318     x86_avx512_mask_pmovs_qw_mem_256,          // llvm.x86.avx512.mask.pmovs.qw.mem.256
   5319     x86_avx512_mask_pmovs_qw_mem_512,          // llvm.x86.avx512.mask.pmovs.qw.mem.512
   5320     x86_avx512_mask_pmovs_wb_128,              // llvm.x86.avx512.mask.pmovs.wb.128
   5321     x86_avx512_mask_pmovs_wb_256,              // llvm.x86.avx512.mask.pmovs.wb.256
   5322     x86_avx512_mask_pmovs_wb_512,              // llvm.x86.avx512.mask.pmovs.wb.512
   5323     x86_avx512_mask_pmovs_wb_mem_128,          // llvm.x86.avx512.mask.pmovs.wb.mem.128
   5324     x86_avx512_mask_pmovs_wb_mem_256,          // llvm.x86.avx512.mask.pmovs.wb.mem.256
   5325     x86_avx512_mask_pmovs_wb_mem_512,          // llvm.x86.avx512.mask.pmovs.wb.mem.512
   5326     x86_avx512_mask_pmovus_db_128,             // llvm.x86.avx512.mask.pmovus.db.128
   5327     x86_avx512_mask_pmovus_db_256,             // llvm.x86.avx512.mask.pmovus.db.256
   5328     x86_avx512_mask_pmovus_db_512,             // llvm.x86.avx512.mask.pmovus.db.512
   5329     x86_avx512_mask_pmovus_db_mem_128,         // llvm.x86.avx512.mask.pmovus.db.mem.128
   5330     x86_avx512_mask_pmovus_db_mem_256,         // llvm.x86.avx512.mask.pmovus.db.mem.256
   5331     x86_avx512_mask_pmovus_db_mem_512,         // llvm.x86.avx512.mask.pmovus.db.mem.512
   5332     x86_avx512_mask_pmovus_dw_128,             // llvm.x86.avx512.mask.pmovus.dw.128
   5333     x86_avx512_mask_pmovus_dw_256,             // llvm.x86.avx512.mask.pmovus.dw.256
   5334     x86_avx512_mask_pmovus_dw_512,             // llvm.x86.avx512.mask.pmovus.dw.512
   5335     x86_avx512_mask_pmovus_dw_mem_128,         // llvm.x86.avx512.mask.pmovus.dw.mem.128
   5336     x86_avx512_mask_pmovus_dw_mem_256,         // llvm.x86.avx512.mask.pmovus.dw.mem.256
   5337     x86_avx512_mask_pmovus_dw_mem_512,         // llvm.x86.avx512.mask.pmovus.dw.mem.512
   5338     x86_avx512_mask_pmovus_qb_128,             // llvm.x86.avx512.mask.pmovus.qb.128
   5339     x86_avx512_mask_pmovus_qb_256,             // llvm.x86.avx512.mask.pmovus.qb.256
   5340     x86_avx512_mask_pmovus_qb_512,             // llvm.x86.avx512.mask.pmovus.qb.512
   5341     x86_avx512_mask_pmovus_qb_mem_128,         // llvm.x86.avx512.mask.pmovus.qb.mem.128
   5342     x86_avx512_mask_pmovus_qb_mem_256,         // llvm.x86.avx512.mask.pmovus.qb.mem.256
   5343     x86_avx512_mask_pmovus_qb_mem_512,         // llvm.x86.avx512.mask.pmovus.qb.mem.512
   5344     x86_avx512_mask_pmovus_qd_128,             // llvm.x86.avx512.mask.pmovus.qd.128
   5345     x86_avx512_mask_pmovus_qd_256,             // llvm.x86.avx512.mask.pmovus.qd.256
   5346     x86_avx512_mask_pmovus_qd_512,             // llvm.x86.avx512.mask.pmovus.qd.512
   5347     x86_avx512_mask_pmovus_qd_mem_128,         // llvm.x86.avx512.mask.pmovus.qd.mem.128
   5348     x86_avx512_mask_pmovus_qd_mem_256,         // llvm.x86.avx512.mask.pmovus.qd.mem.256
   5349     x86_avx512_mask_pmovus_qd_mem_512,         // llvm.x86.avx512.mask.pmovus.qd.mem.512
   5350     x86_avx512_mask_pmovus_qw_128,             // llvm.x86.avx512.mask.pmovus.qw.128
   5351     x86_avx512_mask_pmovus_qw_256,             // llvm.x86.avx512.mask.pmovus.qw.256
   5352     x86_avx512_mask_pmovus_qw_512,             // llvm.x86.avx512.mask.pmovus.qw.512
   5353     x86_avx512_mask_pmovus_qw_mem_128,         // llvm.x86.avx512.mask.pmovus.qw.mem.128
   5354     x86_avx512_mask_pmovus_qw_mem_256,         // llvm.x86.avx512.mask.pmovus.qw.mem.256
   5355     x86_avx512_mask_pmovus_qw_mem_512,         // llvm.x86.avx512.mask.pmovus.qw.mem.512
   5356     x86_avx512_mask_pmovus_wb_128,             // llvm.x86.avx512.mask.pmovus.wb.128
   5357     x86_avx512_mask_pmovus_wb_256,             // llvm.x86.avx512.mask.pmovus.wb.256
   5358     x86_avx512_mask_pmovus_wb_512,             // llvm.x86.avx512.mask.pmovus.wb.512
   5359     x86_avx512_mask_pmovus_wb_mem_128,         // llvm.x86.avx512.mask.pmovus.wb.mem.128
   5360     x86_avx512_mask_pmovus_wb_mem_256,         // llvm.x86.avx512.mask.pmovus.wb.mem.256
   5361     x86_avx512_mask_pmovus_wb_mem_512,         // llvm.x86.avx512.mask.pmovus.wb.mem.512
   5362     x86_avx512_mask_pmul_hr_sw_128,            // llvm.x86.avx512.mask.pmul.hr.sw.128
   5363     x86_avx512_mask_pmul_hr_sw_256,            // llvm.x86.avx512.mask.pmul.hr.sw.256
   5364     x86_avx512_mask_pmul_hr_sw_512,            // llvm.x86.avx512.mask.pmul.hr.sw.512
   5365     x86_avx512_mask_pmulh_w_128,               // llvm.x86.avx512.mask.pmulh.w.128
   5366     x86_avx512_mask_pmulh_w_256,               // llvm.x86.avx512.mask.pmulh.w.256
   5367     x86_avx512_mask_pmulh_w_512,               // llvm.x86.avx512.mask.pmulh.w.512
   5368     x86_avx512_mask_pmulhu_w_128,              // llvm.x86.avx512.mask.pmulhu.w.128
   5369     x86_avx512_mask_pmulhu_w_256,              // llvm.x86.avx512.mask.pmulhu.w.256
   5370     x86_avx512_mask_pmulhu_w_512,              // llvm.x86.avx512.mask.pmulhu.w.512
   5371     x86_avx512_mask_pmultishift_qb_128,        // llvm.x86.avx512.mask.pmultishift.qb.128
   5372     x86_avx512_mask_pmultishift_qb_256,        // llvm.x86.avx512.mask.pmultishift.qb.256
   5373     x86_avx512_mask_pmultishift_qb_512,        // llvm.x86.avx512.mask.pmultishift.qb.512
   5374     x86_avx512_mask_prol_d_128,                // llvm.x86.avx512.mask.prol.d.128
   5375     x86_avx512_mask_prol_d_256,                // llvm.x86.avx512.mask.prol.d.256
   5376     x86_avx512_mask_prol_d_512,                // llvm.x86.avx512.mask.prol.d.512
   5377     x86_avx512_mask_prol_q_128,                // llvm.x86.avx512.mask.prol.q.128
   5378     x86_avx512_mask_prol_q_256,                // llvm.x86.avx512.mask.prol.q.256
   5379     x86_avx512_mask_prol_q_512,                // llvm.x86.avx512.mask.prol.q.512
   5380     x86_avx512_mask_prolv_d_128,               // llvm.x86.avx512.mask.prolv.d.128
   5381     x86_avx512_mask_prolv_d_256,               // llvm.x86.avx512.mask.prolv.d.256
   5382     x86_avx512_mask_prolv_d_512,               // llvm.x86.avx512.mask.prolv.d.512
   5383     x86_avx512_mask_prolv_q_128,               // llvm.x86.avx512.mask.prolv.q.128
   5384     x86_avx512_mask_prolv_q_256,               // llvm.x86.avx512.mask.prolv.q.256
   5385     x86_avx512_mask_prolv_q_512,               // llvm.x86.avx512.mask.prolv.q.512
   5386     x86_avx512_mask_pror_d_128,                // llvm.x86.avx512.mask.pror.d.128
   5387     x86_avx512_mask_pror_d_256,                // llvm.x86.avx512.mask.pror.d.256
   5388     x86_avx512_mask_pror_d_512,                // llvm.x86.avx512.mask.pror.d.512
   5389     x86_avx512_mask_pror_q_128,                // llvm.x86.avx512.mask.pror.q.128
   5390     x86_avx512_mask_pror_q_256,                // llvm.x86.avx512.mask.pror.q.256
   5391     x86_avx512_mask_pror_q_512,                // llvm.x86.avx512.mask.pror.q.512
   5392     x86_avx512_mask_prorv_d_128,               // llvm.x86.avx512.mask.prorv.d.128
   5393     x86_avx512_mask_prorv_d_256,               // llvm.x86.avx512.mask.prorv.d.256
   5394     x86_avx512_mask_prorv_d_512,               // llvm.x86.avx512.mask.prorv.d.512
   5395     x86_avx512_mask_prorv_q_128,               // llvm.x86.avx512.mask.prorv.q.128
   5396     x86_avx512_mask_prorv_q_256,               // llvm.x86.avx512.mask.prorv.q.256
   5397     x86_avx512_mask_prorv_q_512,               // llvm.x86.avx512.mask.prorv.q.512
   5398     x86_avx512_mask_psubs_b_128,               // llvm.x86.avx512.mask.psubs.b.128
   5399     x86_avx512_mask_psubs_b_256,               // llvm.x86.avx512.mask.psubs.b.256
   5400     x86_avx512_mask_psubs_b_512,               // llvm.x86.avx512.mask.psubs.b.512
   5401     x86_avx512_mask_psubs_w_128,               // llvm.x86.avx512.mask.psubs.w.128
   5402     x86_avx512_mask_psubs_w_256,               // llvm.x86.avx512.mask.psubs.w.256
   5403     x86_avx512_mask_psubs_w_512,               // llvm.x86.avx512.mask.psubs.w.512
   5404     x86_avx512_mask_psubus_b_128,              // llvm.x86.avx512.mask.psubus.b.128
   5405     x86_avx512_mask_psubus_b_256,              // llvm.x86.avx512.mask.psubus.b.256
   5406     x86_avx512_mask_psubus_b_512,              // llvm.x86.avx512.mask.psubus.b.512
   5407     x86_avx512_mask_psubus_w_128,              // llvm.x86.avx512.mask.psubus.w.128
   5408     x86_avx512_mask_psubus_w_256,              // llvm.x86.avx512.mask.psubus.w.256
   5409     x86_avx512_mask_psubus_w_512,              // llvm.x86.avx512.mask.psubus.w.512
   5410     x86_avx512_mask_pternlog_d_128,            // llvm.x86.avx512.mask.pternlog.d.128
   5411     x86_avx512_mask_pternlog_d_256,            // llvm.x86.avx512.mask.pternlog.d.256
   5412     x86_avx512_mask_pternlog_d_512,            // llvm.x86.avx512.mask.pternlog.d.512
   5413     x86_avx512_mask_pternlog_q_128,            // llvm.x86.avx512.mask.pternlog.q.128
   5414     x86_avx512_mask_pternlog_q_256,            // llvm.x86.avx512.mask.pternlog.q.256
   5415     x86_avx512_mask_pternlog_q_512,            // llvm.x86.avx512.mask.pternlog.q.512
   5416     x86_avx512_mask_range_pd_128,              // llvm.x86.avx512.mask.range.pd.128
   5417     x86_avx512_mask_range_pd_256,              // llvm.x86.avx512.mask.range.pd.256
   5418     x86_avx512_mask_range_pd_512,              // llvm.x86.avx512.mask.range.pd.512
   5419     x86_avx512_mask_range_ps_128,              // llvm.x86.avx512.mask.range.ps.128
   5420     x86_avx512_mask_range_ps_256,              // llvm.x86.avx512.mask.range.ps.256
   5421     x86_avx512_mask_range_ps_512,              // llvm.x86.avx512.mask.range.ps.512
   5422     x86_avx512_mask_range_sd,                  // llvm.x86.avx512.mask.range.sd
   5423     x86_avx512_mask_range_ss,                  // llvm.x86.avx512.mask.range.ss
   5424     x86_avx512_mask_reduce_pd_128,             // llvm.x86.avx512.mask.reduce.pd.128
   5425     x86_avx512_mask_reduce_pd_256,             // llvm.x86.avx512.mask.reduce.pd.256
   5426     x86_avx512_mask_reduce_pd_512,             // llvm.x86.avx512.mask.reduce.pd.512
   5427     x86_avx512_mask_reduce_ps_128,             // llvm.x86.avx512.mask.reduce.ps.128
   5428     x86_avx512_mask_reduce_ps_256,             // llvm.x86.avx512.mask.reduce.ps.256
   5429     x86_avx512_mask_reduce_ps_512,             // llvm.x86.avx512.mask.reduce.ps.512
   5430     x86_avx512_mask_reduce_sd,                 // llvm.x86.avx512.mask.reduce.sd
   5431     x86_avx512_mask_reduce_ss,                 // llvm.x86.avx512.mask.reduce.ss
   5432     x86_avx512_mask_rndscale_pd_128,           // llvm.x86.avx512.mask.rndscale.pd.128
   5433     x86_avx512_mask_rndscale_pd_256,           // llvm.x86.avx512.mask.rndscale.pd.256
   5434     x86_avx512_mask_rndscale_pd_512,           // llvm.x86.avx512.mask.rndscale.pd.512
   5435     x86_avx512_mask_rndscale_ps_128,           // llvm.x86.avx512.mask.rndscale.ps.128
   5436     x86_avx512_mask_rndscale_ps_256,           // llvm.x86.avx512.mask.rndscale.ps.256
   5437     x86_avx512_mask_rndscale_ps_512,           // llvm.x86.avx512.mask.rndscale.ps.512
   5438     x86_avx512_mask_rndscale_sd,               // llvm.x86.avx512.mask.rndscale.sd
   5439     x86_avx512_mask_rndscale_ss,               // llvm.x86.avx512.mask.rndscale.ss
   5440     x86_avx512_mask_scalef_pd_128,             // llvm.x86.avx512.mask.scalef.pd.128
   5441     x86_avx512_mask_scalef_pd_256,             // llvm.x86.avx512.mask.scalef.pd.256
   5442     x86_avx512_mask_scalef_pd_512,             // llvm.x86.avx512.mask.scalef.pd.512
   5443     x86_avx512_mask_scalef_ps_128,             // llvm.x86.avx512.mask.scalef.ps.128
   5444     x86_avx512_mask_scalef_ps_256,             // llvm.x86.avx512.mask.scalef.ps.256
   5445     x86_avx512_mask_scalef_ps_512,             // llvm.x86.avx512.mask.scalef.ps.512
   5446     x86_avx512_mask_scalef_sd,                 // llvm.x86.avx512.mask.scalef.sd
   5447     x86_avx512_mask_scalef_ss,                 // llvm.x86.avx512.mask.scalef.ss
   5448     x86_avx512_mask_shuf_f32x4,                // llvm.x86.avx512.mask.shuf.f32x4
   5449     x86_avx512_mask_shuf_f32x4_256,            // llvm.x86.avx512.mask.shuf.f32x4.256
   5450     x86_avx512_mask_shuf_f64x2,                // llvm.x86.avx512.mask.shuf.f64x2
   5451     x86_avx512_mask_shuf_f64x2_256,            // llvm.x86.avx512.mask.shuf.f64x2.256
   5452     x86_avx512_mask_shuf_i32x4,                // llvm.x86.avx512.mask.shuf.i32x4
   5453     x86_avx512_mask_shuf_i32x4_256,            // llvm.x86.avx512.mask.shuf.i32x4.256
   5454     x86_avx512_mask_shuf_i64x2,                // llvm.x86.avx512.mask.shuf.i64x2
   5455     x86_avx512_mask_shuf_i64x2_256,            // llvm.x86.avx512.mask.shuf.i64x2.256
   5456     x86_avx512_mask_sqrt_pd_128,               // llvm.x86.avx512.mask.sqrt.pd.128
   5457     x86_avx512_mask_sqrt_pd_256,               // llvm.x86.avx512.mask.sqrt.pd.256
   5458     x86_avx512_mask_sqrt_pd_512,               // llvm.x86.avx512.mask.sqrt.pd.512
   5459     x86_avx512_mask_sqrt_ps_128,               // llvm.x86.avx512.mask.sqrt.ps.128
   5460     x86_avx512_mask_sqrt_ps_256,               // llvm.x86.avx512.mask.sqrt.ps.256
   5461     x86_avx512_mask_sqrt_ps_512,               // llvm.x86.avx512.mask.sqrt.ps.512
   5462     x86_avx512_mask_sqrt_sd,                   // llvm.x86.avx512.mask.sqrt.sd
   5463     x86_avx512_mask_sqrt_ss,                   // llvm.x86.avx512.mask.sqrt.ss
   5464     x86_avx512_mask_store_ss,                  // llvm.x86.avx512.mask.store.ss
   5465     x86_avx512_mask_sub_pd_512,                // llvm.x86.avx512.mask.sub.pd.512
   5466     x86_avx512_mask_sub_ps_512,                // llvm.x86.avx512.mask.sub.ps.512
   5467     x86_avx512_mask_sub_sd_round,              // llvm.x86.avx512.mask.sub.sd.round
   5468     x86_avx512_mask_sub_ss_round,              // llvm.x86.avx512.mask.sub.ss.round
   5469     x86_avx512_mask_vcvtph2ps_128,             // llvm.x86.avx512.mask.vcvtph2ps.128
   5470     x86_avx512_mask_vcvtph2ps_256,             // llvm.x86.avx512.mask.vcvtph2ps.256
   5471     x86_avx512_mask_vcvtph2ps_512,             // llvm.x86.avx512.mask.vcvtph2ps.512
   5472     x86_avx512_mask_vcvtps2ph_128,             // llvm.x86.avx512.mask.vcvtps2ph.128
   5473     x86_avx512_mask_vcvtps2ph_256,             // llvm.x86.avx512.mask.vcvtps2ph.256
   5474     x86_avx512_mask_vcvtps2ph_512,             // llvm.x86.avx512.mask.vcvtps2ph.512
   5475     x86_avx512_mask_vfmadd_pd_128,             // llvm.x86.avx512.mask.vfmadd.pd.128
   5476     x86_avx512_mask_vfmadd_pd_256,             // llvm.x86.avx512.mask.vfmadd.pd.256
   5477     x86_avx512_mask_vfmadd_pd_512,             // llvm.x86.avx512.mask.vfmadd.pd.512
   5478     x86_avx512_mask_vfmadd_ps_128,             // llvm.x86.avx512.mask.vfmadd.ps.128
   5479     x86_avx512_mask_vfmadd_ps_256,             // llvm.x86.avx512.mask.vfmadd.ps.256
   5480     x86_avx512_mask_vfmadd_ps_512,             // llvm.x86.avx512.mask.vfmadd.ps.512
   5481     x86_avx512_mask_vfmadd_sd,                 // llvm.x86.avx512.mask.vfmadd.sd
   5482     x86_avx512_mask_vfmadd_ss,                 // llvm.x86.avx512.mask.vfmadd.ss
   5483     x86_avx512_mask_vfmaddsub_pd_128,          // llvm.x86.avx512.mask.vfmaddsub.pd.128
   5484     x86_avx512_mask_vfmaddsub_pd_256,          // llvm.x86.avx512.mask.vfmaddsub.pd.256
   5485     x86_avx512_mask_vfmaddsub_pd_512,          // llvm.x86.avx512.mask.vfmaddsub.pd.512
   5486     x86_avx512_mask_vfmaddsub_ps_128,          // llvm.x86.avx512.mask.vfmaddsub.ps.128
   5487     x86_avx512_mask_vfmaddsub_ps_256,          // llvm.x86.avx512.mask.vfmaddsub.ps.256
   5488     x86_avx512_mask_vfmaddsub_ps_512,          // llvm.x86.avx512.mask.vfmaddsub.ps.512
   5489     x86_avx512_mask_vfnmadd_pd_128,            // llvm.x86.avx512.mask.vfnmadd.pd.128
   5490     x86_avx512_mask_vfnmadd_pd_256,            // llvm.x86.avx512.mask.vfnmadd.pd.256
   5491     x86_avx512_mask_vfnmadd_pd_512,            // llvm.x86.avx512.mask.vfnmadd.pd.512
   5492     x86_avx512_mask_vfnmadd_ps_128,            // llvm.x86.avx512.mask.vfnmadd.ps.128
   5493     x86_avx512_mask_vfnmadd_ps_256,            // llvm.x86.avx512.mask.vfnmadd.ps.256
   5494     x86_avx512_mask_vfnmadd_ps_512,            // llvm.x86.avx512.mask.vfnmadd.ps.512
   5495     x86_avx512_mask_vfnmsub_pd_128,            // llvm.x86.avx512.mask.vfnmsub.pd.128
   5496     x86_avx512_mask_vfnmsub_pd_256,            // llvm.x86.avx512.mask.vfnmsub.pd.256
   5497     x86_avx512_mask_vfnmsub_pd_512,            // llvm.x86.avx512.mask.vfnmsub.pd.512
   5498     x86_avx512_mask_vfnmsub_ps_128,            // llvm.x86.avx512.mask.vfnmsub.ps.128
   5499     x86_avx512_mask_vfnmsub_ps_256,            // llvm.x86.avx512.mask.vfnmsub.ps.256
   5500     x86_avx512_mask_vfnmsub_ps_512,            // llvm.x86.avx512.mask.vfnmsub.ps.512
   5501     x86_avx512_mask_vpermi2var_d_128,          // llvm.x86.avx512.mask.vpermi2var.d.128
   5502     x86_avx512_mask_vpermi2var_d_256,          // llvm.x86.avx512.mask.vpermi2var.d.256
   5503     x86_avx512_mask_vpermi2var_d_512,          // llvm.x86.avx512.mask.vpermi2var.d.512
   5504     x86_avx512_mask_vpermi2var_hi_128,         // llvm.x86.avx512.mask.vpermi2var.hi.128
   5505     x86_avx512_mask_vpermi2var_hi_256,         // llvm.x86.avx512.mask.vpermi2var.hi.256
   5506     x86_avx512_mask_vpermi2var_hi_512,         // llvm.x86.avx512.mask.vpermi2var.hi.512
   5507     x86_avx512_mask_vpermi2var_pd_128,         // llvm.x86.avx512.mask.vpermi2var.pd.128
   5508     x86_avx512_mask_vpermi2var_pd_256,         // llvm.x86.avx512.mask.vpermi2var.pd.256
   5509     x86_avx512_mask_vpermi2var_pd_512,         // llvm.x86.avx512.mask.vpermi2var.pd.512
   5510     x86_avx512_mask_vpermi2var_ps_128,         // llvm.x86.avx512.mask.vpermi2var.ps.128
   5511     x86_avx512_mask_vpermi2var_ps_256,         // llvm.x86.avx512.mask.vpermi2var.ps.256
   5512     x86_avx512_mask_vpermi2var_ps_512,         // llvm.x86.avx512.mask.vpermi2var.ps.512
   5513     x86_avx512_mask_vpermi2var_q_128,          // llvm.x86.avx512.mask.vpermi2var.q.128
   5514     x86_avx512_mask_vpermi2var_q_256,          // llvm.x86.avx512.mask.vpermi2var.q.256
   5515     x86_avx512_mask_vpermi2var_q_512,          // llvm.x86.avx512.mask.vpermi2var.q.512
   5516     x86_avx512_mask_vpermi2var_qi_128,         // llvm.x86.avx512.mask.vpermi2var.qi.128
   5517     x86_avx512_mask_vpermi2var_qi_256,         // llvm.x86.avx512.mask.vpermi2var.qi.256
   5518     x86_avx512_mask_vpermi2var_qi_512,         // llvm.x86.avx512.mask.vpermi2var.qi.512
   5519     x86_avx512_mask_vpermt2var_d_128,          // llvm.x86.avx512.mask.vpermt2var.d.128
   5520     x86_avx512_mask_vpermt2var_d_256,          // llvm.x86.avx512.mask.vpermt2var.d.256
   5521     x86_avx512_mask_vpermt2var_d_512,          // llvm.x86.avx512.mask.vpermt2var.d.512
   5522     x86_avx512_mask_vpermt2var_hi_128,         // llvm.x86.avx512.mask.vpermt2var.hi.128
   5523     x86_avx512_mask_vpermt2var_hi_256,         // llvm.x86.avx512.mask.vpermt2var.hi.256
   5524     x86_avx512_mask_vpermt2var_hi_512,         // llvm.x86.avx512.mask.vpermt2var.hi.512
   5525     x86_avx512_mask_vpermt2var_pd_128,         // llvm.x86.avx512.mask.vpermt2var.pd.128
   5526     x86_avx512_mask_vpermt2var_pd_256,         // llvm.x86.avx512.mask.vpermt2var.pd.256
   5527     x86_avx512_mask_vpermt2var_pd_512,         // llvm.x86.avx512.mask.vpermt2var.pd.512
   5528     x86_avx512_mask_vpermt2var_ps_128,         // llvm.x86.avx512.mask.vpermt2var.ps.128
   5529     x86_avx512_mask_vpermt2var_ps_256,         // llvm.x86.avx512.mask.vpermt2var.ps.256
   5530     x86_avx512_mask_vpermt2var_ps_512,         // llvm.x86.avx512.mask.vpermt2var.ps.512
   5531     x86_avx512_mask_vpermt2var_q_128,          // llvm.x86.avx512.mask.vpermt2var.q.128
   5532     x86_avx512_mask_vpermt2var_q_256,          // llvm.x86.avx512.mask.vpermt2var.q.256
   5533     x86_avx512_mask_vpermt2var_q_512,          // llvm.x86.avx512.mask.vpermt2var.q.512
   5534     x86_avx512_mask_vpermt2var_qi_128,         // llvm.x86.avx512.mask.vpermt2var.qi.128
   5535     x86_avx512_mask_vpermt2var_qi_256,         // llvm.x86.avx512.mask.vpermt2var.qi.256
   5536     x86_avx512_mask_vpermt2var_qi_512,         // llvm.x86.avx512.mask.vpermt2var.qi.512
   5537     x86_avx512_mask_vpmadd52h_uq_128,          // llvm.x86.avx512.mask.vpmadd52h.uq.128
   5538     x86_avx512_mask_vpmadd52h_uq_256,          // llvm.x86.avx512.mask.vpmadd52h.uq.256
   5539     x86_avx512_mask_vpmadd52h_uq_512,          // llvm.x86.avx512.mask.vpmadd52h.uq.512
   5540     x86_avx512_mask_vpmadd52l_uq_128,          // llvm.x86.avx512.mask.vpmadd52l.uq.128
   5541     x86_avx512_mask_vpmadd52l_uq_256,          // llvm.x86.avx512.mask.vpmadd52l.uq.256
   5542     x86_avx512_mask_vpmadd52l_uq_512,          // llvm.x86.avx512.mask.vpmadd52l.uq.512
   5543     x86_avx512_mask3_vfmadd_pd_128,            // llvm.x86.avx512.mask3.vfmadd.pd.128
   5544     x86_avx512_mask3_vfmadd_pd_256,            // llvm.x86.avx512.mask3.vfmadd.pd.256
   5545     x86_avx512_mask3_vfmadd_pd_512,            // llvm.x86.avx512.mask3.vfmadd.pd.512
   5546     x86_avx512_mask3_vfmadd_ps_128,            // llvm.x86.avx512.mask3.vfmadd.ps.128
   5547     x86_avx512_mask3_vfmadd_ps_256,            // llvm.x86.avx512.mask3.vfmadd.ps.256
   5548     x86_avx512_mask3_vfmadd_ps_512,            // llvm.x86.avx512.mask3.vfmadd.ps.512
   5549     x86_avx512_mask3_vfmadd_sd,                // llvm.x86.avx512.mask3.vfmadd.sd
   5550     x86_avx512_mask3_vfmadd_ss,                // llvm.x86.avx512.mask3.vfmadd.ss
   5551     x86_avx512_mask3_vfmaddsub_pd_128,         // llvm.x86.avx512.mask3.vfmaddsub.pd.128
   5552     x86_avx512_mask3_vfmaddsub_pd_256,         // llvm.x86.avx512.mask3.vfmaddsub.pd.256
   5553     x86_avx512_mask3_vfmaddsub_pd_512,         // llvm.x86.avx512.mask3.vfmaddsub.pd.512
   5554     x86_avx512_mask3_vfmaddsub_ps_128,         // llvm.x86.avx512.mask3.vfmaddsub.ps.128
   5555     x86_avx512_mask3_vfmaddsub_ps_256,         // llvm.x86.avx512.mask3.vfmaddsub.ps.256
   5556     x86_avx512_mask3_vfmaddsub_ps_512,         // llvm.x86.avx512.mask3.vfmaddsub.ps.512
   5557     x86_avx512_mask3_vfmsub_pd_128,            // llvm.x86.avx512.mask3.vfmsub.pd.128
   5558     x86_avx512_mask3_vfmsub_pd_256,            // llvm.x86.avx512.mask3.vfmsub.pd.256
   5559     x86_avx512_mask3_vfmsub_pd_512,            // llvm.x86.avx512.mask3.vfmsub.pd.512
   5560     x86_avx512_mask3_vfmsub_ps_128,            // llvm.x86.avx512.mask3.vfmsub.ps.128
   5561     x86_avx512_mask3_vfmsub_ps_256,            // llvm.x86.avx512.mask3.vfmsub.ps.256
   5562     x86_avx512_mask3_vfmsub_ps_512,            // llvm.x86.avx512.mask3.vfmsub.ps.512
   5563     x86_avx512_mask3_vfmsub_sd,                // llvm.x86.avx512.mask3.vfmsub.sd
   5564     x86_avx512_mask3_vfmsub_ss,                // llvm.x86.avx512.mask3.vfmsub.ss
   5565     x86_avx512_mask3_vfmsubadd_pd_128,         // llvm.x86.avx512.mask3.vfmsubadd.pd.128
   5566     x86_avx512_mask3_vfmsubadd_pd_256,         // llvm.x86.avx512.mask3.vfmsubadd.pd.256
   5567     x86_avx512_mask3_vfmsubadd_pd_512,         // llvm.x86.avx512.mask3.vfmsubadd.pd.512
   5568     x86_avx512_mask3_vfmsubadd_ps_128,         // llvm.x86.avx512.mask3.vfmsubadd.ps.128
   5569     x86_avx512_mask3_vfmsubadd_ps_256,         // llvm.x86.avx512.mask3.vfmsubadd.ps.256
   5570     x86_avx512_mask3_vfmsubadd_ps_512,         // llvm.x86.avx512.mask3.vfmsubadd.ps.512
   5571     x86_avx512_mask3_vfnmsub_pd_128,           // llvm.x86.avx512.mask3.vfnmsub.pd.128
   5572     x86_avx512_mask3_vfnmsub_pd_256,           // llvm.x86.avx512.mask3.vfnmsub.pd.256
   5573     x86_avx512_mask3_vfnmsub_pd_512,           // llvm.x86.avx512.mask3.vfnmsub.pd.512
   5574     x86_avx512_mask3_vfnmsub_ps_128,           // llvm.x86.avx512.mask3.vfnmsub.ps.128
   5575     x86_avx512_mask3_vfnmsub_ps_256,           // llvm.x86.avx512.mask3.vfnmsub.ps.256
   5576     x86_avx512_mask3_vfnmsub_ps_512,           // llvm.x86.avx512.mask3.vfnmsub.ps.512
   5577     x86_avx512_mask3_vfnmsub_sd,               // llvm.x86.avx512.mask3.vfnmsub.sd
   5578     x86_avx512_mask3_vfnmsub_ss,               // llvm.x86.avx512.mask3.vfnmsub.ss
   5579     x86_avx512_maskz_fixupimm_pd_128,          // llvm.x86.avx512.maskz.fixupimm.pd.128
   5580     x86_avx512_maskz_fixupimm_pd_256,          // llvm.x86.avx512.maskz.fixupimm.pd.256
   5581     x86_avx512_maskz_fixupimm_pd_512,          // llvm.x86.avx512.maskz.fixupimm.pd.512
   5582     x86_avx512_maskz_fixupimm_ps_128,          // llvm.x86.avx512.maskz.fixupimm.ps.128
   5583     x86_avx512_maskz_fixupimm_ps_256,          // llvm.x86.avx512.maskz.fixupimm.ps.256
   5584     x86_avx512_maskz_fixupimm_ps_512,          // llvm.x86.avx512.maskz.fixupimm.ps.512
   5585     x86_avx512_maskz_fixupimm_sd,              // llvm.x86.avx512.maskz.fixupimm.sd
   5586     x86_avx512_maskz_fixupimm_ss,              // llvm.x86.avx512.maskz.fixupimm.ss
   5587     x86_avx512_maskz_pternlog_d_128,           // llvm.x86.avx512.maskz.pternlog.d.128
   5588     x86_avx512_maskz_pternlog_d_256,           // llvm.x86.avx512.maskz.pternlog.d.256
   5589     x86_avx512_maskz_pternlog_d_512,           // llvm.x86.avx512.maskz.pternlog.d.512
   5590     x86_avx512_maskz_pternlog_q_128,           // llvm.x86.avx512.maskz.pternlog.q.128
   5591     x86_avx512_maskz_pternlog_q_256,           // llvm.x86.avx512.maskz.pternlog.q.256
   5592     x86_avx512_maskz_pternlog_q_512,           // llvm.x86.avx512.maskz.pternlog.q.512
   5593     x86_avx512_maskz_vfmadd_pd_128,            // llvm.x86.avx512.maskz.vfmadd.pd.128
   5594     x86_avx512_maskz_vfmadd_pd_256,            // llvm.x86.avx512.maskz.vfmadd.pd.256
   5595     x86_avx512_maskz_vfmadd_pd_512,            // llvm.x86.avx512.maskz.vfmadd.pd.512
   5596     x86_avx512_maskz_vfmadd_ps_128,            // llvm.x86.avx512.maskz.vfmadd.ps.128
   5597     x86_avx512_maskz_vfmadd_ps_256,            // llvm.x86.avx512.maskz.vfmadd.ps.256
   5598     x86_avx512_maskz_vfmadd_ps_512,            // llvm.x86.avx512.maskz.vfmadd.ps.512
   5599     x86_avx512_maskz_vfmadd_sd,                // llvm.x86.avx512.maskz.vfmadd.sd
   5600     x86_avx512_maskz_vfmadd_ss,                // llvm.x86.avx512.maskz.vfmadd.ss
   5601     x86_avx512_maskz_vfmaddsub_pd_128,         // llvm.x86.avx512.maskz.vfmaddsub.pd.128
   5602     x86_avx512_maskz_vfmaddsub_pd_256,         // llvm.x86.avx512.maskz.vfmaddsub.pd.256
   5603     x86_avx512_maskz_vfmaddsub_pd_512,         // llvm.x86.avx512.maskz.vfmaddsub.pd.512
   5604     x86_avx512_maskz_vfmaddsub_ps_128,         // llvm.x86.avx512.maskz.vfmaddsub.ps.128
   5605     x86_avx512_maskz_vfmaddsub_ps_256,         // llvm.x86.avx512.maskz.vfmaddsub.ps.256
   5606     x86_avx512_maskz_vfmaddsub_ps_512,         // llvm.x86.avx512.maskz.vfmaddsub.ps.512
   5607     x86_avx512_maskz_vpermt2var_d_128,         // llvm.x86.avx512.maskz.vpermt2var.d.128
   5608     x86_avx512_maskz_vpermt2var_d_256,         // llvm.x86.avx512.maskz.vpermt2var.d.256
   5609     x86_avx512_maskz_vpermt2var_d_512,         // llvm.x86.avx512.maskz.vpermt2var.d.512
   5610     x86_avx512_maskz_vpermt2var_hi_128,        // llvm.x86.avx512.maskz.vpermt2var.hi.128
   5611     x86_avx512_maskz_vpermt2var_hi_256,        // llvm.x86.avx512.maskz.vpermt2var.hi.256
   5612     x86_avx512_maskz_vpermt2var_hi_512,        // llvm.x86.avx512.maskz.vpermt2var.hi.512
   5613     x86_avx512_maskz_vpermt2var_pd_128,        // llvm.x86.avx512.maskz.vpermt2var.pd.128
   5614     x86_avx512_maskz_vpermt2var_pd_256,        // llvm.x86.avx512.maskz.vpermt2var.pd.256
   5615     x86_avx512_maskz_vpermt2var_pd_512,        // llvm.x86.avx512.maskz.vpermt2var.pd.512
   5616     x86_avx512_maskz_vpermt2var_ps_128,        // llvm.x86.avx512.maskz.vpermt2var.ps.128
   5617     x86_avx512_maskz_vpermt2var_ps_256,        // llvm.x86.avx512.maskz.vpermt2var.ps.256
   5618     x86_avx512_maskz_vpermt2var_ps_512,        // llvm.x86.avx512.maskz.vpermt2var.ps.512
   5619     x86_avx512_maskz_vpermt2var_q_128,         // llvm.x86.avx512.maskz.vpermt2var.q.128
   5620     x86_avx512_maskz_vpermt2var_q_256,         // llvm.x86.avx512.maskz.vpermt2var.q.256
   5621     x86_avx512_maskz_vpermt2var_q_512,         // llvm.x86.avx512.maskz.vpermt2var.q.512
   5622     x86_avx512_maskz_vpermt2var_qi_128,        // llvm.x86.avx512.maskz.vpermt2var.qi.128
   5623     x86_avx512_maskz_vpermt2var_qi_256,        // llvm.x86.avx512.maskz.vpermt2var.qi.256
   5624     x86_avx512_maskz_vpermt2var_qi_512,        // llvm.x86.avx512.maskz.vpermt2var.qi.512
   5625     x86_avx512_maskz_vpmadd52h_uq_128,         // llvm.x86.avx512.maskz.vpmadd52h.uq.128
   5626     x86_avx512_maskz_vpmadd52h_uq_256,         // llvm.x86.avx512.maskz.vpmadd52h.uq.256
   5627     x86_avx512_maskz_vpmadd52h_uq_512,         // llvm.x86.avx512.maskz.vpmadd52h.uq.512
   5628     x86_avx512_maskz_vpmadd52l_uq_128,         // llvm.x86.avx512.maskz.vpmadd52l.uq.128
   5629     x86_avx512_maskz_vpmadd52l_uq_256,         // llvm.x86.avx512.maskz.vpmadd52l.uq.256
   5630     x86_avx512_maskz_vpmadd52l_uq_512,         // llvm.x86.avx512.maskz.vpmadd52l.uq.512
   5631     x86_avx512_packssdw_512,                   // llvm.x86.avx512.packssdw.512
   5632     x86_avx512_packsswb_512,                   // llvm.x86.avx512.packsswb.512
   5633     x86_avx512_packusdw_512,                   // llvm.x86.avx512.packusdw.512
   5634     x86_avx512_packuswb_512,                   // llvm.x86.avx512.packuswb.512
   5635     x86_avx512_pmul_dq_512,                    // llvm.x86.avx512.pmul.dq.512
   5636     x86_avx512_pmulu_dq_512,                   // llvm.x86.avx512.pmulu.dq.512
   5637     x86_avx512_psad_bw_512,                    // llvm.x86.avx512.psad.bw.512
   5638     x86_avx512_pshuf_b_512,                    // llvm.x86.avx512.pshuf.b.512
   5639     x86_avx512_psll_d_512,                     // llvm.x86.avx512.psll.d.512
   5640     x86_avx512_psll_q_512,                     // llvm.x86.avx512.psll.q.512
   5641     x86_avx512_psll_w_512,                     // llvm.x86.avx512.psll.w.512
   5642     x86_avx512_pslli_d_512,                    // llvm.x86.avx512.pslli.d.512
   5643     x86_avx512_pslli_q_512,                    // llvm.x86.avx512.pslli.q.512
   5644     x86_avx512_pslli_w_512,                    // llvm.x86.avx512.pslli.w.512
   5645     x86_avx512_psllv_d_512,                    // llvm.x86.avx512.psllv.d.512
   5646     x86_avx512_psllv_q_512,                    // llvm.x86.avx512.psllv.q.512
   5647     x86_avx512_psllv_w_128,                    // llvm.x86.avx512.psllv.w.128
   5648     x86_avx512_psllv_w_256,                    // llvm.x86.avx512.psllv.w.256
   5649     x86_avx512_psllv_w_512,                    // llvm.x86.avx512.psllv.w.512
   5650     x86_avx512_psra_d_512,                     // llvm.x86.avx512.psra.d.512
   5651     x86_avx512_psra_q_128,                     // llvm.x86.avx512.psra.q.128
   5652     x86_avx512_psra_q_256,                     // llvm.x86.avx512.psra.q.256
   5653     x86_avx512_psra_q_512,                     // llvm.x86.avx512.psra.q.512
   5654     x86_avx512_psra_w_512,                     // llvm.x86.avx512.psra.w.512
   5655     x86_avx512_psrai_d_512,                    // llvm.x86.avx512.psrai.d.512
   5656     x86_avx512_psrai_q_128,                    // llvm.x86.avx512.psrai.q.128
   5657     x86_avx512_psrai_q_256,                    // llvm.x86.avx512.psrai.q.256
   5658     x86_avx512_psrai_q_512,                    // llvm.x86.avx512.psrai.q.512
   5659     x86_avx512_psrai_w_512,                    // llvm.x86.avx512.psrai.w.512
   5660     x86_avx512_psrav_d_512,                    // llvm.x86.avx512.psrav.d.512
   5661     x86_avx512_psrav_q_128,                    // llvm.x86.avx512.psrav.q.128
   5662     x86_avx512_psrav_q_256,                    // llvm.x86.avx512.psrav.q.256
   5663     x86_avx512_psrav_q_512,                    // llvm.x86.avx512.psrav.q.512
   5664     x86_avx512_psrav_w_128,                    // llvm.x86.avx512.psrav.w.128
   5665     x86_avx512_psrav_w_256,                    // llvm.x86.avx512.psrav.w.256
   5666     x86_avx512_psrav_w_512,                    // llvm.x86.avx512.psrav.w.512
   5667     x86_avx512_psrl_d_512,                     // llvm.x86.avx512.psrl.d.512
   5668     x86_avx512_psrl_q_512,                     // llvm.x86.avx512.psrl.q.512
   5669     x86_avx512_psrl_w_512,                     // llvm.x86.avx512.psrl.w.512
   5670     x86_avx512_psrli_d_512,                    // llvm.x86.avx512.psrli.d.512
   5671     x86_avx512_psrli_q_512,                    // llvm.x86.avx512.psrli.q.512
   5672     x86_avx512_psrli_w_512,                    // llvm.x86.avx512.psrli.w.512
   5673     x86_avx512_psrlv_d_512,                    // llvm.x86.avx512.psrlv.d.512
   5674     x86_avx512_psrlv_q_512,                    // llvm.x86.avx512.psrlv.q.512
   5675     x86_avx512_psrlv_w_128,                    // llvm.x86.avx512.psrlv.w.128
   5676     x86_avx512_psrlv_w_256,                    // llvm.x86.avx512.psrlv.w.256
   5677     x86_avx512_psrlv_w_512,                    // llvm.x86.avx512.psrlv.w.512
   5678     x86_avx512_ptestm_b_128,                   // llvm.x86.avx512.ptestm.b.128
   5679     x86_avx512_ptestm_b_256,                   // llvm.x86.avx512.ptestm.b.256
   5680     x86_avx512_ptestm_b_512,                   // llvm.x86.avx512.ptestm.b.512
   5681     x86_avx512_ptestm_d_128,                   // llvm.x86.avx512.ptestm.d.128
   5682     x86_avx512_ptestm_d_256,                   // llvm.x86.avx512.ptestm.d.256
   5683     x86_avx512_ptestm_d_512,                   // llvm.x86.avx512.ptestm.d.512
   5684     x86_avx512_ptestm_q_128,                   // llvm.x86.avx512.ptestm.q.128
   5685     x86_avx512_ptestm_q_256,                   // llvm.x86.avx512.ptestm.q.256
   5686     x86_avx512_ptestm_q_512,                   // llvm.x86.avx512.ptestm.q.512
   5687     x86_avx512_ptestm_w_128,                   // llvm.x86.avx512.ptestm.w.128
   5688     x86_avx512_ptestm_w_256,                   // llvm.x86.avx512.ptestm.w.256
   5689     x86_avx512_ptestm_w_512,                   // llvm.x86.avx512.ptestm.w.512
   5690     x86_avx512_ptestnm_b_128,                  // llvm.x86.avx512.ptestnm.b.128
   5691     x86_avx512_ptestnm_b_256,                  // llvm.x86.avx512.ptestnm.b.256
   5692     x86_avx512_ptestnm_b_512,                  // llvm.x86.avx512.ptestnm.b.512
   5693     x86_avx512_ptestnm_d_128,                  // llvm.x86.avx512.ptestnm.d.128
   5694     x86_avx512_ptestnm_d_256,                  // llvm.x86.avx512.ptestnm.d.256
   5695     x86_avx512_ptestnm_d_512,                  // llvm.x86.avx512.ptestnm.d.512
   5696     x86_avx512_ptestnm_q_128,                  // llvm.x86.avx512.ptestnm.q.128
   5697     x86_avx512_ptestnm_q_256,                  // llvm.x86.avx512.ptestnm.q.256
   5698     x86_avx512_ptestnm_q_512,                  // llvm.x86.avx512.ptestnm.q.512
   5699     x86_avx512_ptestnm_w_128,                  // llvm.x86.avx512.ptestnm.w.128
   5700     x86_avx512_ptestnm_w_256,                  // llvm.x86.avx512.ptestnm.w.256
   5701     x86_avx512_ptestnm_w_512,                  // llvm.x86.avx512.ptestnm.w.512
   5702     x86_avx512_rcp14_pd_128,                   // llvm.x86.avx512.rcp14.pd.128
   5703     x86_avx512_rcp14_pd_256,                   // llvm.x86.avx512.rcp14.pd.256
   5704     x86_avx512_rcp14_pd_512,                   // llvm.x86.avx512.rcp14.pd.512
   5705     x86_avx512_rcp14_ps_128,                   // llvm.x86.avx512.rcp14.ps.128
   5706     x86_avx512_rcp14_ps_256,                   // llvm.x86.avx512.rcp14.ps.256
   5707     x86_avx512_rcp14_ps_512,                   // llvm.x86.avx512.rcp14.ps.512
   5708     x86_avx512_rcp14_sd,                       // llvm.x86.avx512.rcp14.sd
   5709     x86_avx512_rcp14_ss,                       // llvm.x86.avx512.rcp14.ss
   5710     x86_avx512_rcp28_pd,                       // llvm.x86.avx512.rcp28.pd
   5711     x86_avx512_rcp28_ps,                       // llvm.x86.avx512.rcp28.ps
   5712     x86_avx512_rcp28_sd,                       // llvm.x86.avx512.rcp28.sd
   5713     x86_avx512_rcp28_ss,                       // llvm.x86.avx512.rcp28.ss
   5714     x86_avx512_rsqrt14_pd_128,                 // llvm.x86.avx512.rsqrt14.pd.128
   5715     x86_avx512_rsqrt14_pd_256,                 // llvm.x86.avx512.rsqrt14.pd.256
   5716     x86_avx512_rsqrt14_pd_512,                 // llvm.x86.avx512.rsqrt14.pd.512
   5717     x86_avx512_rsqrt14_ps_128,                 // llvm.x86.avx512.rsqrt14.ps.128
   5718     x86_avx512_rsqrt14_ps_256,                 // llvm.x86.avx512.rsqrt14.ps.256
   5719     x86_avx512_rsqrt14_ps_512,                 // llvm.x86.avx512.rsqrt14.ps.512
   5720     x86_avx512_rsqrt14_sd,                     // llvm.x86.avx512.rsqrt14.sd
   5721     x86_avx512_rsqrt14_ss,                     // llvm.x86.avx512.rsqrt14.ss
   5722     x86_avx512_rsqrt28_pd,                     // llvm.x86.avx512.rsqrt28.pd
   5723     x86_avx512_rsqrt28_ps,                     // llvm.x86.avx512.rsqrt28.ps
   5724     x86_avx512_rsqrt28_sd,                     // llvm.x86.avx512.rsqrt28.sd
   5725     x86_avx512_rsqrt28_ss,                     // llvm.x86.avx512.rsqrt28.ss
   5726     x86_avx512_scatter_dpd_512,                // llvm.x86.avx512.scatter.dpd.512
   5727     x86_avx512_scatter_dpi_512,                // llvm.x86.avx512.scatter.dpi.512
   5728     x86_avx512_scatter_dpq_512,                // llvm.x86.avx512.scatter.dpq.512
   5729     x86_avx512_scatter_dps_512,                // llvm.x86.avx512.scatter.dps.512
   5730     x86_avx512_scatter_qpd_512,                // llvm.x86.avx512.scatter.qpd.512
   5731     x86_avx512_scatter_qpi_512,                // llvm.x86.avx512.scatter.qpi.512
   5732     x86_avx512_scatter_qpq_512,                // llvm.x86.avx512.scatter.qpq.512
   5733     x86_avx512_scatter_qps_512,                // llvm.x86.avx512.scatter.qps.512
   5734     x86_avx512_scatterdiv2_df,                 // llvm.x86.avx512.scatterdiv2.df
   5735     x86_avx512_scatterdiv2_di,                 // llvm.x86.avx512.scatterdiv2.di
   5736     x86_avx512_scatterdiv4_df,                 // llvm.x86.avx512.scatterdiv4.df
   5737     x86_avx512_scatterdiv4_di,                 // llvm.x86.avx512.scatterdiv4.di
   5738     x86_avx512_scatterdiv4_sf,                 // llvm.x86.avx512.scatterdiv4.sf
   5739     x86_avx512_scatterdiv4_si,                 // llvm.x86.avx512.scatterdiv4.si
   5740     x86_avx512_scatterdiv8_sf,                 // llvm.x86.avx512.scatterdiv8.sf
   5741     x86_avx512_scatterdiv8_si,                 // llvm.x86.avx512.scatterdiv8.si
   5742     x86_avx512_scatterpf_dpd_512,              // llvm.x86.avx512.scatterpf.dpd.512
   5743     x86_avx512_scatterpf_dps_512,              // llvm.x86.avx512.scatterpf.dps.512
   5744     x86_avx512_scatterpf_qpd_512,              // llvm.x86.avx512.scatterpf.qpd.512
   5745     x86_avx512_scatterpf_qps_512,              // llvm.x86.avx512.scatterpf.qps.512
   5746     x86_avx512_scattersiv2_df,                 // llvm.x86.avx512.scattersiv2.df
   5747     x86_avx512_scattersiv2_di,                 // llvm.x86.avx512.scattersiv2.di
   5748     x86_avx512_scattersiv4_df,                 // llvm.x86.avx512.scattersiv4.df
   5749     x86_avx512_scattersiv4_di,                 // llvm.x86.avx512.scattersiv4.di
   5750     x86_avx512_scattersiv4_sf,                 // llvm.x86.avx512.scattersiv4.sf
   5751     x86_avx512_scattersiv4_si,                 // llvm.x86.avx512.scattersiv4.si
   5752     x86_avx512_scattersiv8_sf,                 // llvm.x86.avx512.scattersiv8.sf
   5753     x86_avx512_scattersiv8_si,                 // llvm.x86.avx512.scattersiv8.si
   5754     x86_avx512_vbroadcast_sd_512,              // llvm.x86.avx512.vbroadcast.sd.512
   5755     x86_avx512_vbroadcast_ss_512,              // llvm.x86.avx512.vbroadcast.ss.512
   5756     x86_avx512_vcomi_sd,                       // llvm.x86.avx512.vcomi.sd
   5757     x86_avx512_vcomi_ss,                       // llvm.x86.avx512.vcomi.ss
   5758     x86_avx512_vcvtsd2si32,                    // llvm.x86.avx512.vcvtsd2si32
   5759     x86_avx512_vcvtsd2si64,                    // llvm.x86.avx512.vcvtsd2si64
   5760     x86_avx512_vcvtsd2usi32,                   // llvm.x86.avx512.vcvtsd2usi32
   5761     x86_avx512_vcvtsd2usi64,                   // llvm.x86.avx512.vcvtsd2usi64
   5762     x86_avx512_vcvtss2si32,                    // llvm.x86.avx512.vcvtss2si32
   5763     x86_avx512_vcvtss2si64,                    // llvm.x86.avx512.vcvtss2si64
   5764     x86_avx512_vcvtss2usi32,                   // llvm.x86.avx512.vcvtss2usi32
   5765     x86_avx512_vcvtss2usi64,                   // llvm.x86.avx512.vcvtss2usi64
   5766     x86_avx512_vpermilvar_pd_512,              // llvm.x86.avx512.vpermilvar.pd.512
   5767     x86_avx512_vpermilvar_ps_512,              // llvm.x86.avx512.vpermilvar.ps.512
   5768     x86_bmi_bextr_32,                          // llvm.x86.bmi.bextr.32
   5769     x86_bmi_bextr_64,                          // llvm.x86.bmi.bextr.64
   5770     x86_bmi_bzhi_32,                           // llvm.x86.bmi.bzhi.32
   5771     x86_bmi_bzhi_64,                           // llvm.x86.bmi.bzhi.64
   5772     x86_bmi_pdep_32,                           // llvm.x86.bmi.pdep.32
   5773     x86_bmi_pdep_64,                           // llvm.x86.bmi.pdep.64
   5774     x86_bmi_pext_32,                           // llvm.x86.bmi.pext.32
   5775     x86_bmi_pext_64,                           // llvm.x86.bmi.pext.64
   5776     x86_clflushopt,                            // llvm.x86.clflushopt
   5777     x86_clwb,                                  // llvm.x86.clwb
   5778     x86_clzero,                                // llvm.x86.clzero
   5779     x86_flags_read_u32,                        // llvm.x86.flags.read.u32
   5780     x86_flags_read_u64,                        // llvm.x86.flags.read.u64
   5781     x86_flags_write_u32,                       // llvm.x86.flags.write.u32
   5782     x86_flags_write_u64,                       // llvm.x86.flags.write.u64
   5783     x86_fma_vfmadd_pd,                         // llvm.x86.fma.vfmadd.pd
   5784     x86_fma_vfmadd_pd_256,                     // llvm.x86.fma.vfmadd.pd.256
   5785     x86_fma_vfmadd_ps,                         // llvm.x86.fma.vfmadd.ps
   5786     x86_fma_vfmadd_ps_256,                     // llvm.x86.fma.vfmadd.ps.256
   5787     x86_fma_vfmadd_sd,                         // llvm.x86.fma.vfmadd.sd
   5788     x86_fma_vfmadd_ss,                         // llvm.x86.fma.vfmadd.ss
   5789     x86_fma_vfmaddsub_pd,                      // llvm.x86.fma.vfmaddsub.pd
   5790     x86_fma_vfmaddsub_pd_256,                  // llvm.x86.fma.vfmaddsub.pd.256
   5791     x86_fma_vfmaddsub_ps,                      // llvm.x86.fma.vfmaddsub.ps
   5792     x86_fma_vfmaddsub_ps_256,                  // llvm.x86.fma.vfmaddsub.ps.256
   5793     x86_fma_vfmsub_pd,                         // llvm.x86.fma.vfmsub.pd
   5794     x86_fma_vfmsub_pd_256,                     // llvm.x86.fma.vfmsub.pd.256
   5795     x86_fma_vfmsub_ps,                         // llvm.x86.fma.vfmsub.ps
   5796     x86_fma_vfmsub_ps_256,                     // llvm.x86.fma.vfmsub.ps.256
   5797     x86_fma_vfmsub_sd,                         // llvm.x86.fma.vfmsub.sd
   5798     x86_fma_vfmsub_ss,                         // llvm.x86.fma.vfmsub.ss
   5799     x86_fma_vfmsubadd_pd,                      // llvm.x86.fma.vfmsubadd.pd
   5800     x86_fma_vfmsubadd_pd_256,                  // llvm.x86.fma.vfmsubadd.pd.256
   5801     x86_fma_vfmsubadd_ps,                      // llvm.x86.fma.vfmsubadd.ps
   5802     x86_fma_vfmsubadd_ps_256,                  // llvm.x86.fma.vfmsubadd.ps.256
   5803     x86_fma_vfnmadd_pd,                        // llvm.x86.fma.vfnmadd.pd
   5804     x86_fma_vfnmadd_pd_256,                    // llvm.x86.fma.vfnmadd.pd.256
   5805     x86_fma_vfnmadd_ps,                        // llvm.x86.fma.vfnmadd.ps
   5806     x86_fma_vfnmadd_ps_256,                    // llvm.x86.fma.vfnmadd.ps.256
   5807     x86_fma_vfnmadd_sd,                        // llvm.x86.fma.vfnmadd.sd
   5808     x86_fma_vfnmadd_ss,                        // llvm.x86.fma.vfnmadd.ss
   5809     x86_fma_vfnmsub_pd,                        // llvm.x86.fma.vfnmsub.pd
   5810     x86_fma_vfnmsub_pd_256,                    // llvm.x86.fma.vfnmsub.pd.256
   5811     x86_fma_vfnmsub_ps,                        // llvm.x86.fma.vfnmsub.ps
   5812     x86_fma_vfnmsub_ps_256,                    // llvm.x86.fma.vfnmsub.ps.256
   5813     x86_fma_vfnmsub_sd,                        // llvm.x86.fma.vfnmsub.sd
   5814     x86_fma_vfnmsub_ss,                        // llvm.x86.fma.vfnmsub.ss
   5815     x86_fxrstor,                               // llvm.x86.fxrstor
   5816     x86_fxrstor64,                             // llvm.x86.fxrstor64
   5817     x86_fxsave,                                // llvm.x86.fxsave
   5818     x86_fxsave64,                              // llvm.x86.fxsave64
   5819     x86_int,                                   // llvm.x86.int
   5820     x86_llwpcb,                                // llvm.x86.llwpcb
   5821     x86_lwpins32,                              // llvm.x86.lwpins32
   5822     x86_lwpins64,                              // llvm.x86.lwpins64
   5823     x86_lwpval32,                              // llvm.x86.lwpval32
   5824     x86_lwpval64,                              // llvm.x86.lwpval64
   5825     x86_mmx_emms,                              // llvm.x86.mmx.emms
   5826     x86_mmx_femms,                             // llvm.x86.mmx.femms
   5827     x86_mmx_maskmovq,                          // llvm.x86.mmx.maskmovq
   5828     x86_mmx_movnt_dq,                          // llvm.x86.mmx.movnt.dq
   5829     x86_mmx_packssdw,                          // llvm.x86.mmx.packssdw
   5830     x86_mmx_packsswb,                          // llvm.x86.mmx.packsswb
   5831     x86_mmx_packuswb,                          // llvm.x86.mmx.packuswb
   5832     x86_mmx_padd_b,                            // llvm.x86.mmx.padd.b
   5833     x86_mmx_padd_d,                            // llvm.x86.mmx.padd.d
   5834     x86_mmx_padd_q,                            // llvm.x86.mmx.padd.q
   5835     x86_mmx_padd_w,                            // llvm.x86.mmx.padd.w
   5836     x86_mmx_padds_b,                           // llvm.x86.mmx.padds.b
   5837     x86_mmx_padds_w,                           // llvm.x86.mmx.padds.w
   5838     x86_mmx_paddus_b,                          // llvm.x86.mmx.paddus.b
   5839     x86_mmx_paddus_w,                          // llvm.x86.mmx.paddus.w
   5840     x86_mmx_palignr_b,                         // llvm.x86.mmx.palignr.b
   5841     x86_mmx_pand,                              // llvm.x86.mmx.pand
   5842     x86_mmx_pandn,                             // llvm.x86.mmx.pandn
   5843     x86_mmx_pavg_b,                            // llvm.x86.mmx.pavg.b
   5844     x86_mmx_pavg_w,                            // llvm.x86.mmx.pavg.w
   5845     x86_mmx_pcmpeq_b,                          // llvm.x86.mmx.pcmpeq.b
   5846     x86_mmx_pcmpeq_d,                          // llvm.x86.mmx.pcmpeq.d
   5847     x86_mmx_pcmpeq_w,                          // llvm.x86.mmx.pcmpeq.w
   5848     x86_mmx_pcmpgt_b,                          // llvm.x86.mmx.pcmpgt.b
   5849     x86_mmx_pcmpgt_d,                          // llvm.x86.mmx.pcmpgt.d
   5850     x86_mmx_pcmpgt_w,                          // llvm.x86.mmx.pcmpgt.w
   5851     x86_mmx_pextr_w,                           // llvm.x86.mmx.pextr.w
   5852     x86_mmx_pinsr_w,                           // llvm.x86.mmx.pinsr.w
   5853     x86_mmx_pmadd_wd,                          // llvm.x86.mmx.pmadd.wd
   5854     x86_mmx_pmaxs_w,                           // llvm.x86.mmx.pmaxs.w
   5855     x86_mmx_pmaxu_b,                           // llvm.x86.mmx.pmaxu.b
   5856     x86_mmx_pmins_w,                           // llvm.x86.mmx.pmins.w
   5857     x86_mmx_pminu_b,                           // llvm.x86.mmx.pminu.b
   5858     x86_mmx_pmovmskb,                          // llvm.x86.mmx.pmovmskb
   5859     x86_mmx_pmulh_w,                           // llvm.x86.mmx.pmulh.w
   5860     x86_mmx_pmulhu_w,                          // llvm.x86.mmx.pmulhu.w
   5861     x86_mmx_pmull_w,                           // llvm.x86.mmx.pmull.w
   5862     x86_mmx_pmulu_dq,                          // llvm.x86.mmx.pmulu.dq
   5863     x86_mmx_por,                               // llvm.x86.mmx.por
   5864     x86_mmx_psad_bw,                           // llvm.x86.mmx.psad.bw
   5865     x86_mmx_psll_d,                            // llvm.x86.mmx.psll.d
   5866     x86_mmx_psll_q,                            // llvm.x86.mmx.psll.q
   5867     x86_mmx_psll_w,                            // llvm.x86.mmx.psll.w
   5868     x86_mmx_pslli_d,                           // llvm.x86.mmx.pslli.d
   5869     x86_mmx_pslli_q,                           // llvm.x86.mmx.pslli.q
   5870     x86_mmx_pslli_w,                           // llvm.x86.mmx.pslli.w
   5871     x86_mmx_psra_d,                            // llvm.x86.mmx.psra.d
   5872     x86_mmx_psra_w,                            // llvm.x86.mmx.psra.w
   5873     x86_mmx_psrai_d,                           // llvm.x86.mmx.psrai.d
   5874     x86_mmx_psrai_w,                           // llvm.x86.mmx.psrai.w
   5875     x86_mmx_psrl_d,                            // llvm.x86.mmx.psrl.d
   5876     x86_mmx_psrl_q,                            // llvm.x86.mmx.psrl.q
   5877     x86_mmx_psrl_w,                            // llvm.x86.mmx.psrl.w
   5878     x86_mmx_psrli_d,                           // llvm.x86.mmx.psrli.d
   5879     x86_mmx_psrli_q,                           // llvm.x86.mmx.psrli.q
   5880     x86_mmx_psrli_w,                           // llvm.x86.mmx.psrli.w
   5881     x86_mmx_psub_b,                            // llvm.x86.mmx.psub.b
   5882     x86_mmx_psub_d,                            // llvm.x86.mmx.psub.d
   5883     x86_mmx_psub_q,                            // llvm.x86.mmx.psub.q
   5884     x86_mmx_psub_w,                            // llvm.x86.mmx.psub.w
   5885     x86_mmx_psubs_b,                           // llvm.x86.mmx.psubs.b
   5886     x86_mmx_psubs_w,                           // llvm.x86.mmx.psubs.w
   5887     x86_mmx_psubus_b,                          // llvm.x86.mmx.psubus.b
   5888     x86_mmx_psubus_w,                          // llvm.x86.mmx.psubus.w
   5889     x86_mmx_punpckhbw,                         // llvm.x86.mmx.punpckhbw
   5890     x86_mmx_punpckhdq,                         // llvm.x86.mmx.punpckhdq
   5891     x86_mmx_punpckhwd,                         // llvm.x86.mmx.punpckhwd
   5892     x86_mmx_punpcklbw,                         // llvm.x86.mmx.punpcklbw
   5893     x86_mmx_punpckldq,                         // llvm.x86.mmx.punpckldq
   5894     x86_mmx_punpcklwd,                         // llvm.x86.mmx.punpcklwd
   5895     x86_mmx_pxor,                              // llvm.x86.mmx.pxor
   5896     x86_monitorx,                              // llvm.x86.monitorx
   5897     x86_mwaitx,                                // llvm.x86.mwaitx
   5898     x86_pclmulqdq,                             // llvm.x86.pclmulqdq
   5899     x86_rdfsbase_32,                           // llvm.x86.rdfsbase.32
   5900     x86_rdfsbase_64,                           // llvm.x86.rdfsbase.64
   5901     x86_rdgsbase_32,                           // llvm.x86.rdgsbase.32
   5902     x86_rdgsbase_64,                           // llvm.x86.rdgsbase.64
   5903     x86_rdpkru,                                // llvm.x86.rdpkru
   5904     x86_rdpmc,                                 // llvm.x86.rdpmc
   5905     x86_rdrand_16,                             // llvm.x86.rdrand.16
   5906     x86_rdrand_32,                             // llvm.x86.rdrand.32
   5907     x86_rdrand_64,                             // llvm.x86.rdrand.64
   5908     x86_rdseed_16,                             // llvm.x86.rdseed.16
   5909     x86_rdseed_32,                             // llvm.x86.rdseed.32
   5910     x86_rdseed_64,                             // llvm.x86.rdseed.64
   5911     x86_rdtsc,                                 // llvm.x86.rdtsc
   5912     x86_rdtscp,                                // llvm.x86.rdtscp
   5913     x86_seh_ehguard,                           // llvm.x86.seh.ehguard
   5914     x86_seh_ehregnode,                         // llvm.x86.seh.ehregnode
   5915     x86_seh_lsda,                              // llvm.x86.seh.lsda
   5916     x86_seh_recoverfp,                         // llvm.x86.seh.recoverfp
   5917     x86_sha1msg1,                              // llvm.x86.sha1msg1
   5918     x86_sha1msg2,                              // llvm.x86.sha1msg2
   5919     x86_sha1nexte,                             // llvm.x86.sha1nexte
   5920     x86_sha1rnds4,                             // llvm.x86.sha1rnds4
   5921     x86_sha256msg1,                            // llvm.x86.sha256msg1
   5922     x86_sha256msg2,                            // llvm.x86.sha256msg2
   5923     x86_sha256rnds2,                           // llvm.x86.sha256rnds2
   5924     x86_slwpcb,                                // llvm.x86.slwpcb
   5925     x86_sse_cmp_ps,                            // llvm.x86.sse.cmp.ps
   5926     x86_sse_cmp_ss,                            // llvm.x86.sse.cmp.ss
   5927     x86_sse_comieq_ss,                         // llvm.x86.sse.comieq.ss
   5928     x86_sse_comige_ss,                         // llvm.x86.sse.comige.ss
   5929     x86_sse_comigt_ss,                         // llvm.x86.sse.comigt.ss
   5930     x86_sse_comile_ss,                         // llvm.x86.sse.comile.ss
   5931     x86_sse_comilt_ss,                         // llvm.x86.sse.comilt.ss
   5932     x86_sse_comineq_ss,                        // llvm.x86.sse.comineq.ss
   5933     x86_sse_cvtpd2pi,                          // llvm.x86.sse.cvtpd2pi
   5934     x86_sse_cvtpi2pd,                          // llvm.x86.sse.cvtpi2pd
   5935     x86_sse_cvtpi2ps,                          // llvm.x86.sse.cvtpi2ps
   5936     x86_sse_cvtps2pi,                          // llvm.x86.sse.cvtps2pi
   5937     x86_sse_cvtsi2ss,                          // llvm.x86.sse.cvtsi2ss
   5938     x86_sse_cvtsi642ss,                        // llvm.x86.sse.cvtsi642ss
   5939     x86_sse_cvtss2si,                          // llvm.x86.sse.cvtss2si
   5940     x86_sse_cvtss2si64,                        // llvm.x86.sse.cvtss2si64
   5941     x86_sse_cvttpd2pi,                         // llvm.x86.sse.cvttpd2pi
   5942     x86_sse_cvttps2pi,                         // llvm.x86.sse.cvttps2pi
   5943     x86_sse_cvttss2si,                         // llvm.x86.sse.cvttss2si
   5944     x86_sse_cvttss2si64,                       // llvm.x86.sse.cvttss2si64
   5945     x86_sse_ldmxcsr,                           // llvm.x86.sse.ldmxcsr
   5946     x86_sse_max_ps,                            // llvm.x86.sse.max.ps
   5947     x86_sse_max_ss,                            // llvm.x86.sse.max.ss
   5948     x86_sse_min_ps,                            // llvm.x86.sse.min.ps
   5949     x86_sse_min_ss,                            // llvm.x86.sse.min.ss
   5950     x86_sse_movmsk_ps,                         // llvm.x86.sse.movmsk.ps
   5951     x86_sse_pshuf_w,                           // llvm.x86.sse.pshuf.w
   5952     x86_sse_rcp_ps,                            // llvm.x86.sse.rcp.ps
   5953     x86_sse_rcp_ss,                            // llvm.x86.sse.rcp.ss
   5954     x86_sse_rsqrt_ps,                          // llvm.x86.sse.rsqrt.ps
   5955     x86_sse_rsqrt_ss,                          // llvm.x86.sse.rsqrt.ss
   5956     x86_sse_sfence,                            // llvm.x86.sse.sfence
   5957     x86_sse_sqrt_ps,                           // llvm.x86.sse.sqrt.ps
   5958     x86_sse_sqrt_ss,                           // llvm.x86.sse.sqrt.ss
   5959     x86_sse_stmxcsr,                           // llvm.x86.sse.stmxcsr
   5960     x86_sse_ucomieq_ss,                        // llvm.x86.sse.ucomieq.ss
   5961     x86_sse_ucomige_ss,                        // llvm.x86.sse.ucomige.ss
   5962     x86_sse_ucomigt_ss,                        // llvm.x86.sse.ucomigt.ss
   5963     x86_sse_ucomile_ss,                        // llvm.x86.sse.ucomile.ss
   5964     x86_sse_ucomilt_ss,                        // llvm.x86.sse.ucomilt.ss
   5965     x86_sse_ucomineq_ss,                       // llvm.x86.sse.ucomineq.ss
   5966     x86_sse2_clflush,                          // llvm.x86.sse2.clflush
   5967     x86_sse2_cmp_pd,                           // llvm.x86.sse2.cmp.pd
   5968     x86_sse2_cmp_sd,                           // llvm.x86.sse2.cmp.sd
   5969     x86_sse2_comieq_sd,                        // llvm.x86.sse2.comieq.sd
   5970     x86_sse2_comige_sd,                        // llvm.x86.sse2.comige.sd
   5971     x86_sse2_comigt_sd,                        // llvm.x86.sse2.comigt.sd
   5972     x86_sse2_comile_sd,                        // llvm.x86.sse2.comile.sd
   5973     x86_sse2_comilt_sd,                        // llvm.x86.sse2.comilt.sd
   5974     x86_sse2_comineq_sd,                       // llvm.x86.sse2.comineq.sd
   5975     x86_sse2_cvtdq2ps,                         // llvm.x86.sse2.cvtdq2ps
   5976     x86_sse2_cvtpd2dq,                         // llvm.x86.sse2.cvtpd2dq
   5977     x86_sse2_cvtpd2ps,                         // llvm.x86.sse2.cvtpd2ps
   5978     x86_sse2_cvtps2dq,                         // llvm.x86.sse2.cvtps2dq
   5979     x86_sse2_cvtsd2si,                         // llvm.x86.sse2.cvtsd2si
   5980     x86_sse2_cvtsd2si64,                       // llvm.x86.sse2.cvtsd2si64
   5981     x86_sse2_cvtsd2ss,                         // llvm.x86.sse2.cvtsd2ss
   5982     x86_sse2_cvtsi2sd,                         // llvm.x86.sse2.cvtsi2sd
   5983     x86_sse2_cvtsi642sd,                       // llvm.x86.sse2.cvtsi642sd
   5984     x86_sse2_cvtss2sd,                         // llvm.x86.sse2.cvtss2sd
   5985     x86_sse2_cvttpd2dq,                        // llvm.x86.sse2.cvttpd2dq
   5986     x86_sse2_cvttps2dq,                        // llvm.x86.sse2.cvttps2dq
   5987     x86_sse2_cvttsd2si,                        // llvm.x86.sse2.cvttsd2si
   5988     x86_sse2_cvttsd2si64,                      // llvm.x86.sse2.cvttsd2si64
   5989     x86_sse2_lfence,                           // llvm.x86.sse2.lfence
   5990     x86_sse2_maskmov_dqu,                      // llvm.x86.sse2.maskmov.dqu
   5991     x86_sse2_max_pd,                           // llvm.x86.sse2.max.pd
   5992     x86_sse2_max_sd,                           // llvm.x86.sse2.max.sd
   5993     x86_sse2_mfence,                           // llvm.x86.sse2.mfence
   5994     x86_sse2_min_pd,                           // llvm.x86.sse2.min.pd
   5995     x86_sse2_min_sd,                           // llvm.x86.sse2.min.sd
   5996     x86_sse2_movmsk_pd,                        // llvm.x86.sse2.movmsk.pd
   5997     x86_sse2_packssdw_128,                     // llvm.x86.sse2.packssdw.128
   5998     x86_sse2_packsswb_128,                     // llvm.x86.sse2.packsswb.128
   5999     x86_sse2_packuswb_128,                     // llvm.x86.sse2.packuswb.128
   6000     x86_sse2_padds_b,                          // llvm.x86.sse2.padds.b
   6001     x86_sse2_padds_w,                          // llvm.x86.sse2.padds.w
   6002     x86_sse2_paddus_b,                         // llvm.x86.sse2.paddus.b
   6003     x86_sse2_paddus_w,                         // llvm.x86.sse2.paddus.w
   6004     x86_sse2_pause,                            // llvm.x86.sse2.pause
   6005     x86_sse2_pmadd_wd,                         // llvm.x86.sse2.pmadd.wd
   6006     x86_sse2_pmovmskb_128,                     // llvm.x86.sse2.pmovmskb.128
   6007     x86_sse2_pmulh_w,                          // llvm.x86.sse2.pmulh.w
   6008     x86_sse2_pmulhu_w,                         // llvm.x86.sse2.pmulhu.w
   6009     x86_sse2_pmulu_dq,                         // llvm.x86.sse2.pmulu.dq
   6010     x86_sse2_psad_bw,                          // llvm.x86.sse2.psad.bw
   6011     x86_sse2_psll_d,                           // llvm.x86.sse2.psll.d
   6012     x86_sse2_psll_q,                           // llvm.x86.sse2.psll.q
   6013     x86_sse2_psll_w,                           // llvm.x86.sse2.psll.w
   6014     x86_sse2_pslli_d,                          // llvm.x86.sse2.pslli.d
   6015     x86_sse2_pslli_q,                          // llvm.x86.sse2.pslli.q
   6016     x86_sse2_pslli_w,                          // llvm.x86.sse2.pslli.w
   6017     x86_sse2_psra_d,                           // llvm.x86.sse2.psra.d
   6018     x86_sse2_psra_w,                           // llvm.x86.sse2.psra.w
   6019     x86_sse2_psrai_d,                          // llvm.x86.sse2.psrai.d
   6020     x86_sse2_psrai_w,                          // llvm.x86.sse2.psrai.w
   6021     x86_sse2_psrl_d,                           // llvm.x86.sse2.psrl.d
   6022     x86_sse2_psrl_q,                           // llvm.x86.sse2.psrl.q
   6023     x86_sse2_psrl_w,                           // llvm.x86.sse2.psrl.w
   6024     x86_sse2_psrli_d,                          // llvm.x86.sse2.psrli.d
   6025     x86_sse2_psrli_q,                          // llvm.x86.sse2.psrli.q
   6026     x86_sse2_psrli_w,                          // llvm.x86.sse2.psrli.w
   6027     x86_sse2_psubs_b,                          // llvm.x86.sse2.psubs.b
   6028     x86_sse2_psubs_w,                          // llvm.x86.sse2.psubs.w
   6029     x86_sse2_psubus_b,                         // llvm.x86.sse2.psubus.b
   6030     x86_sse2_psubus_w,                         // llvm.x86.sse2.psubus.w
   6031     x86_sse2_sqrt_pd,                          // llvm.x86.sse2.sqrt.pd
   6032     x86_sse2_sqrt_sd,                          // llvm.x86.sse2.sqrt.sd
   6033     x86_sse2_ucomieq_sd,                       // llvm.x86.sse2.ucomieq.sd
   6034     x86_sse2_ucomige_sd,                       // llvm.x86.sse2.ucomige.sd
   6035     x86_sse2_ucomigt_sd,                       // llvm.x86.sse2.ucomigt.sd
   6036     x86_sse2_ucomile_sd,                       // llvm.x86.sse2.ucomile.sd
   6037     x86_sse2_ucomilt_sd,                       // llvm.x86.sse2.ucomilt.sd
   6038     x86_sse2_ucomineq_sd,                      // llvm.x86.sse2.ucomineq.sd
   6039     x86_sse3_addsub_pd,                        // llvm.x86.sse3.addsub.pd
   6040     x86_sse3_addsub_ps,                        // llvm.x86.sse3.addsub.ps
   6041     x86_sse3_hadd_pd,                          // llvm.x86.sse3.hadd.pd
   6042     x86_sse3_hadd_ps,                          // llvm.x86.sse3.hadd.ps
   6043     x86_sse3_hsub_pd,                          // llvm.x86.sse3.hsub.pd
   6044     x86_sse3_hsub_ps,                          // llvm.x86.sse3.hsub.ps
   6045     x86_sse3_ldu_dq,                           // llvm.x86.sse3.ldu.dq
   6046     x86_sse3_monitor,                          // llvm.x86.sse3.monitor
   6047     x86_sse3_mwait,                            // llvm.x86.sse3.mwait
   6048     x86_sse41_blendvpd,                        // llvm.x86.sse41.blendvpd
   6049     x86_sse41_blendvps,                        // llvm.x86.sse41.blendvps
   6050     x86_sse41_dppd,                            // llvm.x86.sse41.dppd
   6051     x86_sse41_dpps,                            // llvm.x86.sse41.dpps
   6052     x86_sse41_insertps,                        // llvm.x86.sse41.insertps
   6053     x86_sse41_mpsadbw,                         // llvm.x86.sse41.mpsadbw
   6054     x86_sse41_packusdw,                        // llvm.x86.sse41.packusdw
   6055     x86_sse41_pblendvb,                        // llvm.x86.sse41.pblendvb
   6056     x86_sse41_phminposuw,                      // llvm.x86.sse41.phminposuw
   6057     x86_sse41_pmuldq,                          // llvm.x86.sse41.pmuldq
   6058     x86_sse41_ptestc,                          // llvm.x86.sse41.ptestc
   6059     x86_sse41_ptestnzc,                        // llvm.x86.sse41.ptestnzc
   6060     x86_sse41_ptestz,                          // llvm.x86.sse41.ptestz
   6061     x86_sse41_round_pd,                        // llvm.x86.sse41.round.pd
   6062     x86_sse41_round_ps,                        // llvm.x86.sse41.round.ps
   6063     x86_sse41_round_sd,                        // llvm.x86.sse41.round.sd
   6064     x86_sse41_round_ss,                        // llvm.x86.sse41.round.ss
   6065     x86_sse42_crc32_32_16,                     // llvm.x86.sse42.crc32.32.16
   6066     x86_sse42_crc32_32_32,                     // llvm.x86.sse42.crc32.32.32
   6067     x86_sse42_crc32_32_8,                      // llvm.x86.sse42.crc32.32.8
   6068     x86_sse42_crc32_64_64,                     // llvm.x86.sse42.crc32.64.64
   6069     x86_sse42_pcmpestri128,                    // llvm.x86.sse42.pcmpestri128
   6070     x86_sse42_pcmpestria128,                   // llvm.x86.sse42.pcmpestria128
   6071     x86_sse42_pcmpestric128,                   // llvm.x86.sse42.pcmpestric128
   6072     x86_sse42_pcmpestrio128,                   // llvm.x86.sse42.pcmpestrio128
   6073     x86_sse42_pcmpestris128,                   // llvm.x86.sse42.pcmpestris128
   6074     x86_sse42_pcmpestriz128,                   // llvm.x86.sse42.pcmpestriz128
   6075     x86_sse42_pcmpestrm128,                    // llvm.x86.sse42.pcmpestrm128
   6076     x86_sse42_pcmpistri128,                    // llvm.x86.sse42.pcmpistri128
   6077     x86_sse42_pcmpistria128,                   // llvm.x86.sse42.pcmpistria128
   6078     x86_sse42_pcmpistric128,                   // llvm.x86.sse42.pcmpistric128
   6079     x86_sse42_pcmpistrio128,                   // llvm.x86.sse42.pcmpistrio128
   6080     x86_sse42_pcmpistris128,                   // llvm.x86.sse42.pcmpistris128
   6081     x86_sse42_pcmpistriz128,                   // llvm.x86.sse42.pcmpistriz128
   6082     x86_sse42_pcmpistrm128,                    // llvm.x86.sse42.pcmpistrm128
   6083     x86_sse4a_extrq,                           // llvm.x86.sse4a.extrq
   6084     x86_sse4a_extrqi,                          // llvm.x86.sse4a.extrqi
   6085     x86_sse4a_insertq,                         // llvm.x86.sse4a.insertq
   6086     x86_sse4a_insertqi,                        // llvm.x86.sse4a.insertqi
   6087     x86_ssse3_pabs_b,                          // llvm.x86.ssse3.pabs.b
   6088     x86_ssse3_pabs_d,                          // llvm.x86.ssse3.pabs.d
   6089     x86_ssse3_pabs_w,                          // llvm.x86.ssse3.pabs.w
   6090     x86_ssse3_phadd_d,                         // llvm.x86.ssse3.phadd.d
   6091     x86_ssse3_phadd_d_128,                     // llvm.x86.ssse3.phadd.d.128
   6092     x86_ssse3_phadd_sw,                        // llvm.x86.ssse3.phadd.sw
   6093     x86_ssse3_phadd_sw_128,                    // llvm.x86.ssse3.phadd.sw.128
   6094     x86_ssse3_phadd_w,                         // llvm.x86.ssse3.phadd.w
   6095     x86_ssse3_phadd_w_128,                     // llvm.x86.ssse3.phadd.w.128
   6096     x86_ssse3_phsub_d,                         // llvm.x86.ssse3.phsub.d
   6097     x86_ssse3_phsub_d_128,                     // llvm.x86.ssse3.phsub.d.128
   6098     x86_ssse3_phsub_sw,                        // llvm.x86.ssse3.phsub.sw
   6099     x86_ssse3_phsub_sw_128,                    // llvm.x86.ssse3.phsub.sw.128
   6100     x86_ssse3_phsub_w,                         // llvm.x86.ssse3.phsub.w
   6101     x86_ssse3_phsub_w_128,                     // llvm.x86.ssse3.phsub.w.128
   6102     x86_ssse3_pmadd_ub_sw,                     // llvm.x86.ssse3.pmadd.ub.sw
   6103     x86_ssse3_pmadd_ub_sw_128,                 // llvm.x86.ssse3.pmadd.ub.sw.128
   6104     x86_ssse3_pmul_hr_sw,                      // llvm.x86.ssse3.pmul.hr.sw
   6105     x86_ssse3_pmul_hr_sw_128,                  // llvm.x86.ssse3.pmul.hr.sw.128
   6106     x86_ssse3_pshuf_b,                         // llvm.x86.ssse3.pshuf.b
   6107     x86_ssse3_pshuf_b_128,                     // llvm.x86.ssse3.pshuf.b.128
   6108     x86_ssse3_psign_b,                         // llvm.x86.ssse3.psign.b
   6109     x86_ssse3_psign_b_128,                     // llvm.x86.ssse3.psign.b.128
   6110     x86_ssse3_psign_d,                         // llvm.x86.ssse3.psign.d
   6111     x86_ssse3_psign_d_128,                     // llvm.x86.ssse3.psign.d.128
   6112     x86_ssse3_psign_w,                         // llvm.x86.ssse3.psign.w
   6113     x86_ssse3_psign_w_128,                     // llvm.x86.ssse3.psign.w.128
   6114     x86_subborrow_u32,                         // llvm.x86.subborrow.u32
   6115     x86_subborrow_u64,                         // llvm.x86.subborrow.u64
   6116     x86_tbm_bextri_u32,                        // llvm.x86.tbm.bextri.u32
   6117     x86_tbm_bextri_u64,                        // llvm.x86.tbm.bextri.u64
   6118     x86_vcvtph2ps_128,                         // llvm.x86.vcvtph2ps.128
   6119     x86_vcvtph2ps_256,                         // llvm.x86.vcvtph2ps.256
   6120     x86_vcvtps2ph_128,                         // llvm.x86.vcvtps2ph.128
   6121     x86_vcvtps2ph_256,                         // llvm.x86.vcvtps2ph.256
   6122     x86_wrfsbase_32,                           // llvm.x86.wrfsbase.32
   6123     x86_wrfsbase_64,                           // llvm.x86.wrfsbase.64
   6124     x86_wrgsbase_32,                           // llvm.x86.wrgsbase.32
   6125     x86_wrgsbase_64,                           // llvm.x86.wrgsbase.64
   6126     x86_wrpkru,                                // llvm.x86.wrpkru
   6127     x86_xabort,                                // llvm.x86.xabort
   6128     x86_xbegin,                                // llvm.x86.xbegin
   6129     x86_xend,                                  // llvm.x86.xend
   6130     x86_xgetbv,                                // llvm.x86.xgetbv
   6131     x86_xop_vfrcz_pd,                          // llvm.x86.xop.vfrcz.pd
   6132     x86_xop_vfrcz_pd_256,                      // llvm.x86.xop.vfrcz.pd.256
   6133     x86_xop_vfrcz_ps,                          // llvm.x86.xop.vfrcz.ps
   6134     x86_xop_vfrcz_ps_256,                      // llvm.x86.xop.vfrcz.ps.256
   6135     x86_xop_vfrcz_sd,                          // llvm.x86.xop.vfrcz.sd
   6136     x86_xop_vfrcz_ss,                          // llvm.x86.xop.vfrcz.ss
   6137     x86_xop_vpcomb,                            // llvm.x86.xop.vpcomb
   6138     x86_xop_vpcomd,                            // llvm.x86.xop.vpcomd
   6139     x86_xop_vpcomq,                            // llvm.x86.xop.vpcomq
   6140     x86_xop_vpcomub,                           // llvm.x86.xop.vpcomub
   6141     x86_xop_vpcomud,                           // llvm.x86.xop.vpcomud
   6142     x86_xop_vpcomuq,                           // llvm.x86.xop.vpcomuq
   6143     x86_xop_vpcomuw,                           // llvm.x86.xop.vpcomuw
   6144     x86_xop_vpcomw,                            // llvm.x86.xop.vpcomw
   6145     x86_xop_vpermil2pd,                        // llvm.x86.xop.vpermil2pd
   6146     x86_xop_vpermil2pd_256,                    // llvm.x86.xop.vpermil2pd.256
   6147     x86_xop_vpermil2ps,                        // llvm.x86.xop.vpermil2ps
   6148     x86_xop_vpermil2ps_256,                    // llvm.x86.xop.vpermil2ps.256
   6149     x86_xop_vphaddbd,                          // llvm.x86.xop.vphaddbd
   6150     x86_xop_vphaddbq,                          // llvm.x86.xop.vphaddbq
   6151     x86_xop_vphaddbw,                          // llvm.x86.xop.vphaddbw
   6152     x86_xop_vphadddq,                          // llvm.x86.xop.vphadddq
   6153     x86_xop_vphaddubd,                         // llvm.x86.xop.vphaddubd
   6154     x86_xop_vphaddubq,                         // llvm.x86.xop.vphaddubq
   6155     x86_xop_vphaddubw,                         // llvm.x86.xop.vphaddubw
   6156     x86_xop_vphaddudq,                         // llvm.x86.xop.vphaddudq
   6157     x86_xop_vphadduwd,                         // llvm.x86.xop.vphadduwd
   6158     x86_xop_vphadduwq,                         // llvm.x86.xop.vphadduwq
   6159     x86_xop_vphaddwd,                          // llvm.x86.xop.vphaddwd
   6160     x86_xop_vphaddwq,                          // llvm.x86.xop.vphaddwq
   6161     x86_xop_vphsubbw,                          // llvm.x86.xop.vphsubbw
   6162     x86_xop_vphsubdq,                          // llvm.x86.xop.vphsubdq
   6163     x86_xop_vphsubwd,                          // llvm.x86.xop.vphsubwd
   6164     x86_xop_vpmacsdd,                          // llvm.x86.xop.vpmacsdd
   6165     x86_xop_vpmacsdqh,                         // llvm.x86.xop.vpmacsdqh
   6166     x86_xop_vpmacsdql,                         // llvm.x86.xop.vpmacsdql
   6167     x86_xop_vpmacssdd,                         // llvm.x86.xop.vpmacssdd
   6168     x86_xop_vpmacssdqh,                        // llvm.x86.xop.vpmacssdqh
   6169     x86_xop_vpmacssdql,                        // llvm.x86.xop.vpmacssdql
   6170     x86_xop_vpmacsswd,                         // llvm.x86.xop.vpmacsswd
   6171     x86_xop_vpmacssww,                         // llvm.x86.xop.vpmacssww
   6172     x86_xop_vpmacswd,                          // llvm.x86.xop.vpmacswd
   6173     x86_xop_vpmacsww,                          // llvm.x86.xop.vpmacsww
   6174     x86_xop_vpmadcsswd,                        // llvm.x86.xop.vpmadcsswd
   6175     x86_xop_vpmadcswd,                         // llvm.x86.xop.vpmadcswd
   6176     x86_xop_vpperm,                            // llvm.x86.xop.vpperm
   6177     x86_xop_vprotb,                            // llvm.x86.xop.vprotb
   6178     x86_xop_vprotbi,                           // llvm.x86.xop.vprotbi
   6179     x86_xop_vprotd,                            // llvm.x86.xop.vprotd
   6180     x86_xop_vprotdi,                           // llvm.x86.xop.vprotdi
   6181     x86_xop_vprotq,                            // llvm.x86.xop.vprotq
   6182     x86_xop_vprotqi,                           // llvm.x86.xop.vprotqi
   6183     x86_xop_vprotw,                            // llvm.x86.xop.vprotw
   6184     x86_xop_vprotwi,                           // llvm.x86.xop.vprotwi
   6185     x86_xop_vpshab,                            // llvm.x86.xop.vpshab
   6186     x86_xop_vpshad,                            // llvm.x86.xop.vpshad
   6187     x86_xop_vpshaq,                            // llvm.x86.xop.vpshaq
   6188     x86_xop_vpshaw,                            // llvm.x86.xop.vpshaw
   6189     x86_xop_vpshlb,                            // llvm.x86.xop.vpshlb
   6190     x86_xop_vpshld,                            // llvm.x86.xop.vpshld
   6191     x86_xop_vpshlq,                            // llvm.x86.xop.vpshlq
   6192     x86_xop_vpshlw,                            // llvm.x86.xop.vpshlw
   6193     x86_xrstor,                                // llvm.x86.xrstor
   6194     x86_xrstor64,                              // llvm.x86.xrstor64
   6195     x86_xrstors,                               // llvm.x86.xrstors
   6196     x86_xrstors64,                             // llvm.x86.xrstors64
   6197     x86_xsave,                                 // llvm.x86.xsave
   6198     x86_xsave64,                               // llvm.x86.xsave64
   6199     x86_xsavec,                                // llvm.x86.xsavec
   6200     x86_xsavec64,                              // llvm.x86.xsavec64
   6201     x86_xsaveopt,                              // llvm.x86.xsaveopt
   6202     x86_xsaveopt64,                            // llvm.x86.xsaveopt64
   6203     x86_xsaves,                                // llvm.x86.xsaves
   6204     x86_xsaves64,                              // llvm.x86.xsaves64
   6205     x86_xsetbv,                                // llvm.x86.xsetbv
   6206     x86_xtest,                                 // llvm.x86.xtest
   6207     xcore_bitrev,                              // llvm.xcore.bitrev
   6208     xcore_checkevent,                          // llvm.xcore.checkevent
   6209     xcore_chkct,                               // llvm.xcore.chkct
   6210     xcore_clre,                                // llvm.xcore.clre
   6211     xcore_clrpt,                               // llvm.xcore.clrpt
   6212     xcore_clrsr,                               // llvm.xcore.clrsr
   6213     xcore_crc32,                               // llvm.xcore.crc32
   6214     xcore_crc8,                                // llvm.xcore.crc8
   6215     xcore_edu,                                 // llvm.xcore.edu
   6216     xcore_eeu,                                 // llvm.xcore.eeu
   6217     xcore_endin,                               // llvm.xcore.endin
   6218     xcore_freer,                               // llvm.xcore.freer
   6219     xcore_geted,                               // llvm.xcore.geted
   6220     xcore_getet,                               // llvm.xcore.getet
   6221     xcore_getid,                               // llvm.xcore.getid
   6222     xcore_getps,                               // llvm.xcore.getps
   6223     xcore_getr,                                // llvm.xcore.getr
   6224     xcore_getst,                               // llvm.xcore.getst
   6225     xcore_getts,                               // llvm.xcore.getts
   6226     xcore_in,                                  // llvm.xcore.in
   6227     xcore_inct,                                // llvm.xcore.inct
   6228     xcore_initcp,                              // llvm.xcore.initcp
   6229     xcore_initdp,                              // llvm.xcore.initdp
   6230     xcore_initlr,                              // llvm.xcore.initlr
   6231     xcore_initpc,                              // llvm.xcore.initpc
   6232     xcore_initsp,                              // llvm.xcore.initsp
   6233     xcore_inshr,                               // llvm.xcore.inshr
   6234     xcore_int,                                 // llvm.xcore.int
   6235     xcore_mjoin,                               // llvm.xcore.mjoin
   6236     xcore_msync,                               // llvm.xcore.msync
   6237     xcore_out,                                 // llvm.xcore.out
   6238     xcore_outct,                               // llvm.xcore.outct
   6239     xcore_outshr,                              // llvm.xcore.outshr
   6240     xcore_outt,                                // llvm.xcore.outt
   6241     xcore_peek,                                // llvm.xcore.peek
   6242     xcore_setc,                                // llvm.xcore.setc
   6243     xcore_setclk,                              // llvm.xcore.setclk
   6244     xcore_setd,                                // llvm.xcore.setd
   6245     xcore_setev,                               // llvm.xcore.setev
   6246     xcore_setps,                               // llvm.xcore.setps
   6247     xcore_setpsc,                              // llvm.xcore.setpsc
   6248     xcore_setpt,                               // llvm.xcore.setpt
   6249     xcore_setrdy,                              // llvm.xcore.setrdy
   6250     xcore_setsr,                               // llvm.xcore.setsr
   6251     xcore_settw,                               // llvm.xcore.settw
   6252     xcore_setv,                                // llvm.xcore.setv
   6253     xcore_sext,                                // llvm.xcore.sext
   6254     xcore_ssync,                               // llvm.xcore.ssync
   6255     xcore_syncr,                               // llvm.xcore.syncr
   6256     xcore_testct,                              // llvm.xcore.testct
   6257     xcore_testwct,                             // llvm.xcore.testwct
   6258     xcore_waitevent,                           // llvm.xcore.waitevent
   6259     xcore_zext                                 // llvm.xcore.zext
   6260 #endif
   6261 
   6262 // Target mapping
   6263 #ifdef GET_INTRINSIC_TARGET_DATA
   6264 struct IntrinsicTargetInfo {
   6265   llvm::StringLiteral Name;
   6266   size_t Offset;
   6267   size_t Count;
   6268 };
   6269 static constexpr IntrinsicTargetInfo TargetInfos[] = {
   6270   {llvm::StringLiteral(""), 0, 172},
   6271   {llvm::StringLiteral("aarch64"), 172, 189},
   6272   {llvm::StringLiteral("amdgcn"), 361, 203},
   6273   {llvm::StringLiteral("arm"), 564, 240},
   6274   {llvm::StringLiteral("bpf"), 804, 4},
   6275   {llvm::StringLiteral("hexagon"), 808, 1593},
   6276   {llvm::StringLiteral("mips"), 2401, 667},
   6277   {llvm::StringLiteral("nvvm"), 3068, 1051},
   6278   {llvm::StringLiteral("ppc"), 4119, 396},
   6279   {llvm::StringLiteral("r600"), 4515, 21},
   6280   {llvm::StringLiteral("s390"), 4536, 220},
   6281   {llvm::StringLiteral("wasm"), 4756, 4},
   6282   {llvm::StringLiteral("x86"), 4760, 1428},
   6283   {llvm::StringLiteral("xcore"), 6188, 53},
   6284 };
   6285 #endif
   6286 
   6287 // Intrinsic ID to name table
   6288 #ifdef GET_INTRINSIC_NAME_TABLE
   6289   // Note that entry #0 is the invalid intrinsic!
   6290   "llvm.addressofreturnaddress",
   6291   "llvm.adjust.trampoline",
   6292   "llvm.annotation",
   6293   "llvm.assume",
   6294   "llvm.bitreverse",
   6295   "llvm.bswap",
   6296   "llvm.canonicalize",
   6297   "llvm.ceil",
   6298   "llvm.clear_cache",
   6299   "llvm.codeview.annotation",
   6300   "llvm.convert.from.fp16",
   6301   "llvm.convert.to.fp16",
   6302   "llvm.copysign",
   6303   "llvm.coro.alloc",
   6304   "llvm.coro.begin",
   6305   "llvm.coro.destroy",
   6306   "llvm.coro.done",
   6307   "llvm.coro.end",
   6308   "llvm.coro.frame",
   6309   "llvm.coro.free",
   6310   "llvm.coro.id",
   6311   "llvm.coro.param",
   6312   "llvm.coro.promise",
   6313   "llvm.coro.resume",
   6314   "llvm.coro.save",
   6315   "llvm.coro.size",
   6316   "llvm.coro.subfn.addr",
   6317   "llvm.coro.suspend",
   6318   "llvm.cos",
   6319   "llvm.ctlz",
   6320   "llvm.ctpop",
   6321   "llvm.cttz",
   6322   "llvm.dbg.addr",
   6323   "llvm.dbg.declare",
   6324   "llvm.dbg.value",
   6325   "llvm.debugtrap",
   6326   "llvm.donothing",
   6327   "llvm.eh.dwarf.cfa",
   6328   "llvm.eh.exceptioncode",
   6329   "llvm.eh.exceptionpointer",
   6330   "llvm.eh.return.i32",
   6331   "llvm.eh.return.i64",
   6332   "llvm.eh.sjlj.callsite",
   6333   "llvm.eh.sjlj.functioncontext",
   6334   "llvm.eh.sjlj.longjmp",
   6335   "llvm.eh.sjlj.lsda",
   6336   "llvm.eh.sjlj.setjmp",
   6337   "llvm.eh.sjlj.setup.dispatch",
   6338   "llvm.eh.typeid.for",
   6339   "llvm.eh.unwind.init",
   6340   "llvm.exp",
   6341   "llvm.exp2",
   6342   "llvm.expect",
   6343   "llvm.experimental.constrained.cos",
   6344   "llvm.experimental.constrained.exp",
   6345   "llvm.experimental.constrained.exp2",
   6346   "llvm.experimental.constrained.fadd",
   6347   "llvm.experimental.constrained.fdiv",
   6348   "llvm.experimental.constrained.fma",
   6349   "llvm.experimental.constrained.fmul",
   6350   "llvm.experimental.constrained.frem",
   6351   "llvm.experimental.constrained.fsub",
   6352   "llvm.experimental.constrained.log",
   6353   "llvm.experimental.constrained.log10",
   6354   "llvm.experimental.constrained.log2",
   6355   "llvm.experimental.constrained.nearbyint",
   6356   "llvm.experimental.constrained.pow",
   6357   "llvm.experimental.constrained.powi",
   6358   "llvm.experimental.constrained.rint",
   6359   "llvm.experimental.constrained.sin",
   6360   "llvm.experimental.constrained.sqrt",
   6361   "llvm.experimental.deoptimize",
   6362   "llvm.experimental.gc.relocate",
   6363   "llvm.experimental.gc.result",
   6364   "llvm.experimental.gc.statepoint",
   6365   "llvm.experimental.guard",
   6366   "llvm.experimental.patchpoint.i64",
   6367   "llvm.experimental.patchpoint.void",
   6368   "llvm.experimental.stackmap",
   6369   "llvm.experimental.vector.reduce.add",
   6370   "llvm.experimental.vector.reduce.and",
   6371   "llvm.experimental.vector.reduce.fadd",
   6372   "llvm.experimental.vector.reduce.fmax",
   6373   "llvm.experimental.vector.reduce.fmin",
   6374   "llvm.experimental.vector.reduce.fmul",
   6375   "llvm.experimental.vector.reduce.mul",
   6376   "llvm.experimental.vector.reduce.or",
   6377   "llvm.experimental.vector.reduce.smax",
   6378   "llvm.experimental.vector.reduce.smin",
   6379   "llvm.experimental.vector.reduce.umax",
   6380   "llvm.experimental.vector.reduce.umin",
   6381   "llvm.experimental.vector.reduce.xor",
   6382   "llvm.fabs",
   6383   "llvm.floor",
   6384   "llvm.flt.rounds",
   6385   "llvm.fma",
   6386   "llvm.fmuladd",
   6387   "llvm.frameaddress",
   6388   "llvm.gcread",
   6389   "llvm.gcroot",
   6390   "llvm.gcwrite",
   6391   "llvm.get.dynamic.area.offset",
   6392   "llvm.init.trampoline",
   6393   "llvm.instrprof.increment",
   6394   "llvm.instrprof.increment.step",
   6395   "llvm.instrprof.value.profile",
   6396   "llvm.invariant.end",
   6397   "llvm.invariant.group.barrier",
   6398   "llvm.invariant.start",
   6399   "llvm.lifetime.end",
   6400   "llvm.lifetime.start",
   6401   "llvm.load.relative",
   6402   "llvm.localaddress",
   6403   "llvm.localescape",
   6404   "llvm.localrecover",
   6405   "llvm.log",
   6406   "llvm.log10",
   6407   "llvm.log2",
   6408   "llvm.longjmp",
   6409   "llvm.masked.compressstore",
   6410   "llvm.masked.expandload",
   6411   "llvm.masked.gather",
   6412   "llvm.masked.load",
   6413   "llvm.masked.scatter",
   6414   "llvm.masked.store",
   6415   "llvm.maxnum",
   6416   "llvm.memcpy",
   6417   "llvm.memcpy.element.unordered.atomic",
   6418   "llvm.memmove",
   6419   "llvm.memmove.element.unordered.atomic",
   6420   "llvm.memset",
   6421   "llvm.memset.element.unordered.atomic",
   6422   "llvm.minnum",
   6423   "llvm.nearbyint",
   6424   "llvm.objectsize",
   6425   "llvm.pcmarker",
   6426   "llvm.pow",
   6427   "llvm.powi",
   6428   "llvm.prefetch",
   6429   "llvm.ptr.annotation",
   6430   "llvm.read_register",
   6431   "llvm.readcyclecounter",
   6432   "llvm.returnaddress",
   6433   "llvm.rint",
   6434   "llvm.round",
   6435   "llvm.sadd.with.overflow",
   6436   "llvm.setjmp",
   6437   "llvm.siglongjmp",
   6438   "llvm.sigsetjmp",
   6439   "llvm.sin",
   6440   "llvm.smul.with.overflow",
   6441   "llvm.sqrt",
   6442   "llvm.ssa.copy",
   6443   "llvm.ssub.with.overflow",
   6444   "llvm.stackguard",
   6445   "llvm.stackprotector",
   6446   "llvm.stackrestore",
   6447   "llvm.stacksave",
   6448   "llvm.thread.pointer",
   6449   "llvm.trap",
   6450   "llvm.trunc",
   6451   "llvm.type.checked.load",
   6452   "llvm.type.test",
   6453   "llvm.uadd.with.overflow",
   6454   "llvm.umul.with.overflow",
   6455   "llvm.usub.with.overflow",
   6456   "llvm.va_copy",
   6457   "llvm.va_end",
   6458   "llvm.va_start",
   6459   "llvm.var.annotation",
   6460   "llvm.write_register",
   6461   "llvm.xray.customevent",
   6462   "llvm.aarch64.clrex",
   6463   "llvm.aarch64.crc32b",
   6464   "llvm.aarch64.crc32cb",
   6465   "llvm.aarch64.crc32ch",
   6466   "llvm.aarch64.crc32cw",
   6467   "llvm.aarch64.crc32cx",
   6468   "llvm.aarch64.crc32h",
   6469   "llvm.aarch64.crc32w",
   6470   "llvm.aarch64.crc32x",
   6471   "llvm.aarch64.crypto.aesd",
   6472   "llvm.aarch64.crypto.aese",
   6473   "llvm.aarch64.crypto.aesimc",
   6474   "llvm.aarch64.crypto.aesmc",
   6475   "llvm.aarch64.crypto.sha1c",
   6476   "llvm.aarch64.crypto.sha1h",
   6477   "llvm.aarch64.crypto.sha1m",
   6478   "llvm.aarch64.crypto.sha1p",
   6479   "llvm.aarch64.crypto.sha1su0",
   6480   "llvm.aarch64.crypto.sha1su1",
   6481   "llvm.aarch64.crypto.sha256h",
   6482   "llvm.aarch64.crypto.sha256h2",
   6483   "llvm.aarch64.crypto.sha256su0",
   6484   "llvm.aarch64.crypto.sha256su1",
   6485   "llvm.aarch64.dmb",
   6486   "llvm.aarch64.dsb",
   6487   "llvm.aarch64.hint",
   6488   "llvm.aarch64.isb",
   6489   "llvm.aarch64.ldaxp",
   6490   "llvm.aarch64.ldaxr",
   6491   "llvm.aarch64.ldxp",
   6492   "llvm.aarch64.ldxr",
   6493   "llvm.aarch64.neon.abs",
   6494   "llvm.aarch64.neon.addhn",
   6495   "llvm.aarch64.neon.addp",
   6496   "llvm.aarch64.neon.cls",
   6497   "llvm.aarch64.neon.fabd",
   6498   "llvm.aarch64.neon.facge",
   6499   "llvm.aarch64.neon.facgt",
   6500   "llvm.aarch64.neon.faddv",
   6501   "llvm.aarch64.neon.fcvtas",
   6502   "llvm.aarch64.neon.fcvtau",
   6503   "llvm.aarch64.neon.fcvtms",
   6504   "llvm.aarch64.neon.fcvtmu",
   6505   "llvm.aarch64.neon.fcvtns",
   6506   "llvm.aarch64.neon.fcvtnu",
   6507   "llvm.aarch64.neon.fcvtps",
   6508   "llvm.aarch64.neon.fcvtpu",
   6509   "llvm.aarch64.neon.fcvtxn",
   6510   "llvm.aarch64.neon.fcvtzs",
   6511   "llvm.aarch64.neon.fcvtzu",
   6512   "llvm.aarch64.neon.fmax",
   6513   "llvm.aarch64.neon.fmaxnm",
   6514   "llvm.aarch64.neon.fmaxnmp",
   6515   "llvm.aarch64.neon.fmaxnmv",
   6516   "llvm.aarch64.neon.fmaxp",
   6517   "llvm.aarch64.neon.fmaxv",
   6518   "llvm.aarch64.neon.fmin",
   6519   "llvm.aarch64.neon.fminnm",
   6520   "llvm.aarch64.neon.fminnmp",
   6521   "llvm.aarch64.neon.fminnmv",
   6522   "llvm.aarch64.neon.fminp",
   6523   "llvm.aarch64.neon.fminv",
   6524   "llvm.aarch64.neon.fmulx",
   6525   "llvm.aarch64.neon.frecpe",
   6526   "llvm.aarch64.neon.frecps",
   6527   "llvm.aarch64.neon.frecpx",
   6528   "llvm.aarch64.neon.frintn",
   6529   "llvm.aarch64.neon.frsqrte",
   6530   "llvm.aarch64.neon.frsqrts",
   6531   "llvm.aarch64.neon.ld1x2",
   6532   "llvm.aarch64.neon.ld1x3",
   6533   "llvm.aarch64.neon.ld1x4",
   6534   "llvm.aarch64.neon.ld2",
   6535   "llvm.aarch64.neon.ld2lane",
   6536   "llvm.aarch64.neon.ld2r",
   6537   "llvm.aarch64.neon.ld3",
   6538   "llvm.aarch64.neon.ld3lane",
   6539   "llvm.aarch64.neon.ld3r",
   6540   "llvm.aarch64.neon.ld4",
   6541   "llvm.aarch64.neon.ld4lane",
   6542   "llvm.aarch64.neon.ld4r",
   6543   "llvm.aarch64.neon.pmul",
   6544   "llvm.aarch64.neon.pmull",
   6545   "llvm.aarch64.neon.pmull64",
   6546   "llvm.aarch64.neon.raddhn",
   6547   "llvm.aarch64.neon.rbit",
   6548   "llvm.aarch64.neon.rshrn",
   6549   "llvm.aarch64.neon.rsubhn",
   6550   "llvm.aarch64.neon.sabd",
   6551   "llvm.aarch64.neon.saddlp",
   6552   "llvm.aarch64.neon.saddlv",
   6553   "llvm.aarch64.neon.saddv",
   6554   "llvm.aarch64.neon.scalar.sqxtn",
   6555   "llvm.aarch64.neon.scalar.sqxtun",
   6556   "llvm.aarch64.neon.scalar.uqxtn",
   6557   "llvm.aarch64.neon.shadd",
   6558   "llvm.aarch64.neon.shll",
   6559   "llvm.aarch64.neon.shsub",
   6560   "llvm.aarch64.neon.smax",
   6561   "llvm.aarch64.neon.smaxp",
   6562   "llvm.aarch64.neon.smaxv",
   6563   "llvm.aarch64.neon.smin",
   6564   "llvm.aarch64.neon.sminp",
   6565   "llvm.aarch64.neon.sminv",
   6566   "llvm.aarch64.neon.smull",
   6567   "llvm.aarch64.neon.sqabs",
   6568   "llvm.aarch64.neon.sqadd",
   6569   "llvm.aarch64.neon.sqdmulh",
   6570   "llvm.aarch64.neon.sqdmull",
   6571   "llvm.aarch64.neon.sqdmulls.scalar",
   6572   "llvm.aarch64.neon.sqneg",
   6573   "llvm.aarch64.neon.sqrdmulh",
   6574   "llvm.aarch64.neon.sqrshl",
   6575   "llvm.aarch64.neon.sqrshrn",
   6576   "llvm.aarch64.neon.sqrshrun",
   6577   "llvm.aarch64.neon.sqshl",
   6578   "llvm.aarch64.neon.sqshlu",
   6579   "llvm.aarch64.neon.sqshrn",
   6580   "llvm.aarch64.neon.sqshrun",
   6581   "llvm.aarch64.neon.sqsub",
   6582   "llvm.aarch64.neon.sqxtn",
   6583   "llvm.aarch64.neon.sqxtun",
   6584   "llvm.aarch64.neon.srhadd",
   6585   "llvm.aarch64.neon.srshl",
   6586   "llvm.aarch64.neon.sshl",
   6587   "llvm.aarch64.neon.sshll",
   6588   "llvm.aarch64.neon.st1x2",
   6589   "llvm.aarch64.neon.st1x3",
   6590   "llvm.aarch64.neon.st1x4",
   6591   "llvm.aarch64.neon.st2",
   6592   "llvm.aarch64.neon.st2lane",
   6593   "llvm.aarch64.neon.st3",
   6594   "llvm.aarch64.neon.st3lane",
   6595   "llvm.aarch64.neon.st4",
   6596   "llvm.aarch64.neon.st4lane",
   6597   "llvm.aarch64.neon.subhn",
   6598   "llvm.aarch64.neon.suqadd",
   6599   "llvm.aarch64.neon.tbl1",
   6600   "llvm.aarch64.neon.tbl2",
   6601   "llvm.aarch64.neon.tbl3",
   6602   "llvm.aarch64.neon.tbl4",
   6603   "llvm.aarch64.neon.tbx1",
   6604   "llvm.aarch64.neon.tbx2",
   6605   "llvm.aarch64.neon.tbx3",
   6606   "llvm.aarch64.neon.tbx4",
   6607   "llvm.aarch64.neon.uabd",
   6608   "llvm.aarch64.neon.uaddlp",
   6609   "llvm.aarch64.neon.uaddlv",
   6610   "llvm.aarch64.neon.uaddv",
   6611   "llvm.aarch64.neon.uhadd",
   6612   "llvm.aarch64.neon.uhsub",
   6613   "llvm.aarch64.neon.umax",
   6614   "llvm.aarch64.neon.umaxp",
   6615   "llvm.aarch64.neon.umaxv",
   6616   "llvm.aarch64.neon.umin",
   6617   "llvm.aarch64.neon.uminp",
   6618   "llvm.aarch64.neon.uminv",
   6619   "llvm.aarch64.neon.umull",
   6620   "llvm.aarch64.neon.uqadd",
   6621   "llvm.aarch64.neon.uqrshl",
   6622   "llvm.aarch64.neon.uqrshrn",
   6623   "llvm.aarch64.neon.uqshl",
   6624   "llvm.aarch64.neon.uqshrn",
   6625   "llvm.aarch64.neon.uqsub",
   6626   "llvm.aarch64.neon.uqxtn",
   6627   "llvm.aarch64.neon.urecpe",
   6628   "llvm.aarch64.neon.urhadd",
   6629   "llvm.aarch64.neon.urshl",
   6630   "llvm.aarch64.neon.ursqrte",
   6631   "llvm.aarch64.neon.ushl",
   6632   "llvm.aarch64.neon.ushll",
   6633   "llvm.aarch64.neon.usqadd",
   6634   "llvm.aarch64.neon.vcopy.lane",
   6635   "llvm.aarch64.neon.vcvtfp2fxs",
   6636   "llvm.aarch64.neon.vcvtfp2fxu",
   6637   "llvm.aarch64.neon.vcvtfp2hf",
   6638   "llvm.aarch64.neon.vcvtfxs2fp",
   6639   "llvm.aarch64.neon.vcvtfxu2fp",
   6640   "llvm.aarch64.neon.vcvthf2fp",
   6641   "llvm.aarch64.neon.vsli",
   6642   "llvm.aarch64.neon.vsri",
   6643   "llvm.aarch64.sdiv",
   6644   "llvm.aarch64.sisd.fabd",
   6645   "llvm.aarch64.sisd.fcvtxn",
   6646   "llvm.aarch64.stlxp",
   6647   "llvm.aarch64.stlxr",
   6648   "llvm.aarch64.stxp",
   6649   "llvm.aarch64.stxr",
   6650   "llvm.aarch64.udiv",
   6651   "llvm.amdgcn.alignbit",
   6652   "llvm.amdgcn.alignbyte",
   6653   "llvm.amdgcn.atomic.dec",
   6654   "llvm.amdgcn.atomic.inc",
   6655   "llvm.amdgcn.break",
   6656   "llvm.amdgcn.buffer.atomic.add",
   6657   "llvm.amdgcn.buffer.atomic.and",
   6658   "llvm.amdgcn.buffer.atomic.cmpswap",
   6659   "llvm.amdgcn.buffer.atomic.or",
   6660   "llvm.amdgcn.buffer.atomic.smax",
   6661   "llvm.amdgcn.buffer.atomic.smin",
   6662   "llvm.amdgcn.buffer.atomic.sub",
   6663   "llvm.amdgcn.buffer.atomic.swap",
   6664   "llvm.amdgcn.buffer.atomic.umax",
   6665   "llvm.amdgcn.buffer.atomic.umin",
   6666   "llvm.amdgcn.buffer.atomic.xor",
   6667   "llvm.amdgcn.buffer.load",
   6668   "llvm.amdgcn.buffer.load.format",
   6669   "llvm.amdgcn.buffer.store",
   6670   "llvm.amdgcn.buffer.store.format",
   6671   "llvm.amdgcn.buffer.wbinvl1",
   6672   "llvm.amdgcn.buffer.wbinvl1.sc",
   6673   "llvm.amdgcn.buffer.wbinvl1.vol",
   6674   "llvm.amdgcn.class",
   6675   "llvm.amdgcn.cos",
   6676   "llvm.amdgcn.cubeid",
   6677   "llvm.amdgcn.cubema",
   6678   "llvm.amdgcn.cubesc",
   6679   "llvm.amdgcn.cubetc",
   6680   "llvm.amdgcn.cvt.pk.u8.f32",
   6681   "llvm.amdgcn.cvt.pkrtz",
   6682   "llvm.amdgcn.dispatch.id",
   6683   "llvm.amdgcn.dispatch.ptr",
   6684   "llvm.amdgcn.div.fixup",
   6685   "llvm.amdgcn.div.fmas",
   6686   "llvm.amdgcn.div.scale",
   6687   "llvm.amdgcn.ds.bpermute",
   6688   "llvm.amdgcn.ds.permute",
   6689   "llvm.amdgcn.ds.swizzle",
   6690   "llvm.amdgcn.else",
   6691   "llvm.amdgcn.else.break",
   6692   "llvm.amdgcn.end.cf",
   6693   "llvm.amdgcn.exp",
   6694   "llvm.amdgcn.exp.compr",
   6695   "llvm.amdgcn.fcmp",
   6696   "llvm.amdgcn.fdiv.fast",
   6697   "llvm.amdgcn.fmed3",
   6698   "llvm.amdgcn.fmul.legacy",
   6699   "llvm.amdgcn.fract",
   6700   "llvm.amdgcn.frexp.exp",
   6701   "llvm.amdgcn.frexp.mant",
   6702   "llvm.amdgcn.groupstaticsize",
   6703   "llvm.amdgcn.icmp",
   6704   "llvm.amdgcn.if",
   6705   "llvm.amdgcn.if.break",
   6706   "llvm.amdgcn.image.atomic.add",
   6707   "llvm.amdgcn.image.atomic.and",
   6708   "llvm.amdgcn.image.atomic.cmpswap",
   6709   "llvm.amdgcn.image.atomic.dec",
   6710   "llvm.amdgcn.image.atomic.inc",
   6711   "llvm.amdgcn.image.atomic.or",
   6712   "llvm.amdgcn.image.atomic.smax",
   6713   "llvm.amdgcn.image.atomic.smin",
   6714   "llvm.amdgcn.image.atomic.sub",
   6715   "llvm.amdgcn.image.atomic.swap",
   6716   "llvm.amdgcn.image.atomic.umax",
   6717   "llvm.amdgcn.image.atomic.umin",
   6718   "llvm.amdgcn.image.atomic.xor",
   6719   "llvm.amdgcn.image.gather4",
   6720   "llvm.amdgcn.image.gather4.b",
   6721   "llvm.amdgcn.image.gather4.b.cl",
   6722   "llvm.amdgcn.image.gather4.b.cl.o",
   6723   "llvm.amdgcn.image.gather4.b.o",
   6724   "llvm.amdgcn.image.gather4.c",
   6725   "llvm.amdgcn.image.gather4.c.b",
   6726   "llvm.amdgcn.image.gather4.c.b.cl",
   6727   "llvm.amdgcn.image.gather4.c.b.cl.o",
   6728   "llvm.amdgcn.image.gather4.c.b.o",
   6729   "llvm.amdgcn.image.gather4.c.cl",
   6730   "llvm.amdgcn.image.gather4.c.cl.o",
   6731   "llvm.amdgcn.image.gather4.c.l",
   6732   "llvm.amdgcn.image.gather4.c.l.o",
   6733   "llvm.amdgcn.image.gather4.c.lz",
   6734   "llvm.amdgcn.image.gather4.c.lz.o",
   6735   "llvm.amdgcn.image.gather4.c.o",
   6736   "llvm.amdgcn.image.gather4.cl",
   6737   "llvm.amdgcn.image.gather4.cl.o",
   6738   "llvm.amdgcn.image.gather4.l",
   6739   "llvm.amdgcn.image.gather4.l.o",
   6740   "llvm.amdgcn.image.gather4.lz",
   6741   "llvm.amdgcn.image.gather4.lz.o",
   6742   "llvm.amdgcn.image.gather4.o",
   6743   "llvm.amdgcn.image.getlod",
   6744   "llvm.amdgcn.image.getresinfo",
   6745   "llvm.amdgcn.image.load",
   6746   "llvm.amdgcn.image.load.mip",
   6747   "llvm.amdgcn.image.sample",
   6748   "llvm.amdgcn.image.sample.b",
   6749   "llvm.amdgcn.image.sample.b.cl",
   6750   "llvm.amdgcn.image.sample.b.cl.o",
   6751   "llvm.amdgcn.image.sample.b.o",
   6752   "llvm.amdgcn.image.sample.c",
   6753   "llvm.amdgcn.image.sample.c.b",
   6754   "llvm.amdgcn.image.sample.c.b.cl",
   6755   "llvm.amdgcn.image.sample.c.b.cl.o",
   6756   "llvm.amdgcn.image.sample.c.b.o",
   6757   "llvm.amdgcn.image.sample.c.cd",
   6758   "llvm.amdgcn.image.sample.c.cd.cl",
   6759   "llvm.amdgcn.image.sample.c.cd.cl.o",
   6760   "llvm.amdgcn.image.sample.c.cd.o",
   6761   "llvm.amdgcn.image.sample.c.cl",
   6762   "llvm.amdgcn.image.sample.c.cl.o",
   6763   "llvm.amdgcn.image.sample.c.d",
   6764   "llvm.amdgcn.image.sample.c.d.cl",
   6765   "llvm.amdgcn.image.sample.c.d.cl.o",
   6766   "llvm.amdgcn.image.sample.c.d.o",
   6767   "llvm.amdgcn.image.sample.c.l",
   6768   "llvm.amdgcn.image.sample.c.l.o",
   6769   "llvm.amdgcn.image.sample.c.lz",
   6770   "llvm.amdgcn.image.sample.c.lz.o",
   6771   "llvm.amdgcn.image.sample.c.o",
   6772   "llvm.amdgcn.image.sample.cd",
   6773   "llvm.amdgcn.image.sample.cd.cl",
   6774   "llvm.amdgcn.image.sample.cd.cl.o",
   6775   "llvm.amdgcn.image.sample.cd.o",
   6776   "llvm.amdgcn.image.sample.cl",
   6777   "llvm.amdgcn.image.sample.cl.o",
   6778   "llvm.amdgcn.image.sample.d",
   6779   "llvm.amdgcn.image.sample.d.cl",
   6780   "llvm.amdgcn.image.sample.d.cl.o",
   6781   "llvm.amdgcn.image.sample.d.o",
   6782   "llvm.amdgcn.image.sample.l",
   6783   "llvm.amdgcn.image.sample.l.o",
   6784   "llvm.amdgcn.image.sample.lz",
   6785   "llvm.amdgcn.image.sample.lz.o",
   6786   "llvm.amdgcn.image.sample.o",
   6787   "llvm.amdgcn.image.store",
   6788   "llvm.amdgcn.image.store.mip",
   6789   "llvm.amdgcn.implicit.buffer.ptr",
   6790   "llvm.amdgcn.implicitarg.ptr",
   6791   "llvm.amdgcn.init.exec",
   6792   "llvm.amdgcn.init.exec.from.input",
   6793   "llvm.amdgcn.interp.mov",
   6794   "llvm.amdgcn.interp.p1",
   6795   "llvm.amdgcn.interp.p2",
   6796   "llvm.amdgcn.kernarg.segment.ptr",
   6797   "llvm.amdgcn.ldexp",
   6798   "llvm.amdgcn.lerp",
   6799   "llvm.amdgcn.log.clamp",
   6800   "llvm.amdgcn.loop",
   6801   "llvm.amdgcn.mbcnt.hi",
   6802   "llvm.amdgcn.mbcnt.lo",
   6803   "llvm.amdgcn.mov.dpp",
   6804   "llvm.amdgcn.mqsad.pk.u16.u8",
   6805   "llvm.amdgcn.mqsad.u32.u8",
   6806   "llvm.amdgcn.msad.u8",
   6807   "llvm.amdgcn.ps.live",
   6808   "llvm.amdgcn.qsad.pk.u16.u8",
   6809   "llvm.amdgcn.queue.ptr",
   6810   "llvm.amdgcn.rcp",
   6811   "llvm.amdgcn.rcp.legacy",
   6812   "llvm.amdgcn.readfirstlane",
   6813   "llvm.amdgcn.readlane",
   6814   "llvm.amdgcn.rsq",
   6815   "llvm.amdgcn.rsq.clamp",
   6816   "llvm.amdgcn.rsq.legacy",
   6817   "llvm.amdgcn.s.barrier",
   6818   "llvm.amdgcn.s.dcache.inv",
   6819   "llvm.amdgcn.s.dcache.inv.vol",
   6820   "llvm.amdgcn.s.dcache.wb",
   6821   "llvm.amdgcn.s.dcache.wb.vol",
   6822   "llvm.amdgcn.s.decperflevel",
   6823   "llvm.amdgcn.s.getpc",
   6824   "llvm.amdgcn.s.getreg",
   6825   "llvm.amdgcn.s.incperflevel",
   6826   "llvm.amdgcn.s.memrealtime",
   6827   "llvm.amdgcn.s.memtime",
   6828   "llvm.amdgcn.s.sendmsg",
   6829   "llvm.amdgcn.s.sendmsghalt",
   6830   "llvm.amdgcn.s.sleep",
   6831   "llvm.amdgcn.s.waitcnt",
   6832   "llvm.amdgcn.sad.hi.u8",
   6833   "llvm.amdgcn.sad.u16",
   6834   "llvm.amdgcn.sad.u8",
   6835   "llvm.amdgcn.sbfe",
   6836   "llvm.amdgcn.set.inactive",
   6837   "llvm.amdgcn.sffbh",
   6838   "llvm.amdgcn.sin",
   6839   "llvm.amdgcn.tbuffer.load",
   6840   "llvm.amdgcn.tbuffer.store",
   6841   "llvm.amdgcn.trig.preop",
   6842   "llvm.amdgcn.ubfe",
   6843   "llvm.amdgcn.unreachable",
   6844   "llvm.amdgcn.update.dpp",
   6845   "llvm.amdgcn.wave.barrier",
   6846   "llvm.amdgcn.workgroup.id.x",
   6847   "llvm.amdgcn.workgroup.id.y",
   6848   "llvm.amdgcn.workgroup.id.z",
   6849   "llvm.amdgcn.workitem.id.x",
   6850   "llvm.amdgcn.workitem.id.y",
   6851   "llvm.amdgcn.workitem.id.z",
   6852   "llvm.amdgcn.wqm",
   6853   "llvm.amdgcn.wwm",
   6854   "llvm.arm.cdp",
   6855   "llvm.arm.cdp2",
   6856   "llvm.arm.clrex",
   6857   "llvm.arm.crc32b",
   6858   "llvm.arm.crc32cb",
   6859   "llvm.arm.crc32ch",
   6860   "llvm.arm.crc32cw",
   6861   "llvm.arm.crc32h",
   6862   "llvm.arm.crc32w",
   6863   "llvm.arm.dbg",
   6864   "llvm.arm.dmb",
   6865   "llvm.arm.dsb",
   6866   "llvm.arm.get.fpscr",
   6867   "llvm.arm.hint",
   6868   "llvm.arm.isb",
   6869   "llvm.arm.ldaex",
   6870   "llvm.arm.ldaexd",
   6871   "llvm.arm.ldc",
   6872   "llvm.arm.ldc2",
   6873   "llvm.arm.ldc2l",
   6874   "llvm.arm.ldcl",
   6875   "llvm.arm.ldrex",
   6876   "llvm.arm.ldrexd",
   6877   "llvm.arm.mcr",
   6878   "llvm.arm.mcr2",
   6879   "llvm.arm.mcrr",
   6880   "llvm.arm.mcrr2",
   6881   "llvm.arm.mrc",
   6882   "llvm.arm.mrc2",
   6883   "llvm.arm.mrrc",
   6884   "llvm.arm.mrrc2",
   6885   "llvm.arm.neon.aesd",
   6886   "llvm.arm.neon.aese",
   6887   "llvm.arm.neon.aesimc",
   6888   "llvm.arm.neon.aesmc",
   6889   "llvm.arm.neon.sha1c",
   6890   "llvm.arm.neon.sha1h",
   6891   "llvm.arm.neon.sha1m",
   6892   "llvm.arm.neon.sha1p",
   6893   "llvm.arm.neon.sha1su0",
   6894   "llvm.arm.neon.sha1su1",
   6895   "llvm.arm.neon.sha256h",
   6896   "llvm.arm.neon.sha256h2",
   6897   "llvm.arm.neon.sha256su0",
   6898   "llvm.arm.neon.sha256su1",
   6899   "llvm.arm.neon.vabds",
   6900   "llvm.arm.neon.vabdu",
   6901   "llvm.arm.neon.vabs",
   6902   "llvm.arm.neon.vacge",
   6903   "llvm.arm.neon.vacgt",
   6904   "llvm.arm.neon.vbsl",
   6905   "llvm.arm.neon.vcls",
   6906   "llvm.arm.neon.vcvtas",
   6907   "llvm.arm.neon.vcvtau",
   6908   "llvm.arm.neon.vcvtfp2fxs",
   6909   "llvm.arm.neon.vcvtfp2fxu",
   6910   "llvm.arm.neon.vcvtfp2hf",
   6911   "llvm.arm.neon.vcvtfxs2fp",
   6912   "llvm.arm.neon.vcvtfxu2fp",
   6913   "llvm.arm.neon.vcvthf2fp",
   6914   "llvm.arm.neon.vcvtms",
   6915   "llvm.arm.neon.vcvtmu",
   6916   "llvm.arm.neon.vcvtns",
   6917   "llvm.arm.neon.vcvtnu",
   6918   "llvm.arm.neon.vcvtps",
   6919   "llvm.arm.neon.vcvtpu",
   6920   "llvm.arm.neon.vhadds",
   6921   "llvm.arm.neon.vhaddu",
   6922   "llvm.arm.neon.vhsubs",
   6923   "llvm.arm.neon.vhsubu",
   6924   "llvm.arm.neon.vld1",
   6925   "llvm.arm.neon.vld2",
   6926   "llvm.arm.neon.vld2lane",
   6927   "llvm.arm.neon.vld3",
   6928   "llvm.arm.neon.vld3lane",
   6929   "llvm.arm.neon.vld4",
   6930   "llvm.arm.neon.vld4lane",
   6931   "llvm.arm.neon.vmaxnm",
   6932   "llvm.arm.neon.vmaxs",
   6933   "llvm.arm.neon.vmaxu",
   6934   "llvm.arm.neon.vminnm",
   6935   "llvm.arm.neon.vmins",
   6936   "llvm.arm.neon.vminu",
   6937   "llvm.arm.neon.vmullp",
   6938   "llvm.arm.neon.vmulls",
   6939   "llvm.arm.neon.vmullu",
   6940   "llvm.arm.neon.vmulp",
   6941   "llvm.arm.neon.vpadals",
   6942   "llvm.arm.neon.vpadalu",
   6943   "llvm.arm.neon.vpadd",
   6944   "llvm.arm.neon.vpaddls",
   6945   "llvm.arm.neon.vpaddlu",
   6946   "llvm.arm.neon.vpmaxs",
   6947   "llvm.arm.neon.vpmaxu",
   6948   "llvm.arm.neon.vpmins",
   6949   "llvm.arm.neon.vpminu",
   6950   "llvm.arm.neon.vqabs",
   6951   "llvm.arm.neon.vqadds",
   6952   "llvm.arm.neon.vqaddu",
   6953   "llvm.arm.neon.vqdmulh",
   6954   "llvm.arm.neon.vqdmull",
   6955   "llvm.arm.neon.vqmovns",
   6956   "llvm.arm.neon.vqmovnsu",
   6957   "llvm.arm.neon.vqmovnu",
   6958   "llvm.arm.neon.vqneg",
   6959   "llvm.arm.neon.vqrdmulh",
   6960   "llvm.arm.neon.vqrshiftns",
   6961   "llvm.arm.neon.vqrshiftnsu",
   6962   "llvm.arm.neon.vqrshiftnu",
   6963   "llvm.arm.neon.vqrshifts",
   6964   "llvm.arm.neon.vqrshiftu",
   6965   "llvm.arm.neon.vqshiftns",
   6966   "llvm.arm.neon.vqshiftnsu",
   6967   "llvm.arm.neon.vqshiftnu",
   6968   "llvm.arm.neon.vqshifts",
   6969   "llvm.arm.neon.vqshiftsu",
   6970   "llvm.arm.neon.vqshiftu",
   6971   "llvm.arm.neon.vqsubs",
   6972   "llvm.arm.neon.vqsubu",
   6973   "llvm.arm.neon.vraddhn",
   6974   "llvm.arm.neon.vrecpe",
   6975   "llvm.arm.neon.vrecps",
   6976   "llvm.arm.neon.vrhadds",
   6977   "llvm.arm.neon.vrhaddu",
   6978   "llvm.arm.neon.vrinta",
   6979   "llvm.arm.neon.vrintm",
   6980   "llvm.arm.neon.vrintn",
   6981   "llvm.arm.neon.vrintp",
   6982   "llvm.arm.neon.vrintx",
   6983   "llvm.arm.neon.vrintz",
   6984   "llvm.arm.neon.vrshiftn",
   6985   "llvm.arm.neon.vrshifts",
   6986   "llvm.arm.neon.vrshiftu",
   6987   "llvm.arm.neon.vrsqrte",
   6988   "llvm.arm.neon.vrsqrts",
   6989   "llvm.arm.neon.vrsubhn",
   6990   "llvm.arm.neon.vshiftins",
   6991   "llvm.arm.neon.vshifts",
   6992   "llvm.arm.neon.vshiftu",
   6993   "llvm.arm.neon.vst1",
   6994   "llvm.arm.neon.vst2",
   6995   "llvm.arm.neon.vst2lane",
   6996   "llvm.arm.neon.vst3",
   6997   "llvm.arm.neon.vst3lane",
   6998   "llvm.arm.neon.vst4",
   6999   "llvm.arm.neon.vst4lane",
   7000   "llvm.arm.neon.vtbl1",
   7001   "llvm.arm.neon.vtbl2",
   7002   "llvm.arm.neon.vtbl3",
   7003   "llvm.arm.neon.vtbl4",
   7004   "llvm.arm.neon.vtbx1",
   7005   "llvm.arm.neon.vtbx2",
   7006   "llvm.arm.neon.vtbx3",
   7007   "llvm.arm.neon.vtbx4",
   7008   "llvm.arm.qadd",
   7009   "llvm.arm.qadd16",
   7010   "llvm.arm.qadd8",
   7011   "llvm.arm.qasx",
   7012   "llvm.arm.qsax",
   7013   "llvm.arm.qsub",
   7014   "llvm.arm.qsub16",
   7015   "llvm.arm.qsub8",
   7016   "llvm.arm.sadd16",
   7017   "llvm.arm.sadd8",
   7018   "llvm.arm.sasx",
   7019   "llvm.arm.sel",
   7020   "llvm.arm.set.fpscr",
   7021   "llvm.arm.shadd16",
   7022   "llvm.arm.shadd8",
   7023   "llvm.arm.shasx",
   7024   "llvm.arm.shsax",
   7025   "llvm.arm.shsub16",
   7026   "llvm.arm.shsub8",
   7027   "llvm.arm.smlabb",
   7028   "llvm.arm.smlabt",
   7029   "llvm.arm.smlad",
   7030   "llvm.arm.smladx",
   7031   "llvm.arm.smlald",
   7032   "llvm.arm.smlaldx",
   7033   "llvm.arm.smlatb",
   7034   "llvm.arm.smlatt",
   7035   "llvm.arm.smlawb",
   7036   "llvm.arm.smlawt",
   7037   "llvm.arm.smlsd",
   7038   "llvm.arm.smlsdx",
   7039   "llvm.arm.smlsld",
   7040   "llvm.arm.smlsldx",
   7041   "llvm.arm.smuad",
   7042   "llvm.arm.smuadx",
   7043   "llvm.arm.smulbb",
   7044   "llvm.arm.smulbt",
   7045   "llvm.arm.smultb",
   7046   "llvm.arm.smultt",
   7047   "llvm.arm.smulwb",
   7048   "llvm.arm.smulwt",
   7049   "llvm.arm.smusd",
   7050   "llvm.arm.smusdx",
   7051   "llvm.arm.space",
   7052   "llvm.arm.ssat",
   7053   "llvm.arm.ssat16",
   7054   "llvm.arm.ssax",
   7055   "llvm.arm.ssub16",
   7056   "llvm.arm.ssub8",
   7057   "llvm.arm.stc",
   7058   "llvm.arm.stc2",
   7059   "llvm.arm.stc2l",
   7060   "llvm.arm.stcl",
   7061   "llvm.arm.stlex",
   7062   "llvm.arm.stlexd",
   7063   "llvm.arm.strex",
   7064   "llvm.arm.strexd",
   7065   "llvm.arm.sxtab16",
   7066   "llvm.arm.sxtb16",
   7067   "llvm.arm.uadd16",
   7068   "llvm.arm.uadd8",
   7069   "llvm.arm.uasx",
   7070   "llvm.arm.uhadd16",
   7071   "llvm.arm.uhadd8",
   7072   "llvm.arm.uhasx",
   7073   "llvm.arm.uhsax",
   7074   "llvm.arm.uhsub16",
   7075   "llvm.arm.uhsub8",
   7076   "llvm.arm.undefined",
   7077   "llvm.arm.uqadd16",
   7078   "llvm.arm.uqadd8",
   7079   "llvm.arm.uqasx",
   7080   "llvm.arm.uqsax",
   7081   "llvm.arm.uqsub16",
   7082   "llvm.arm.uqsub8",
   7083   "llvm.arm.usad8",
   7084   "llvm.arm.usada8",
   7085   "llvm.arm.usat",
   7086   "llvm.arm.usat16",
   7087   "llvm.arm.usax",
   7088   "llvm.arm.usub16",
   7089   "llvm.arm.usub8",
   7090   "llvm.arm.uxtab16",
   7091   "llvm.arm.uxtb16",
   7092   "llvm.arm.vcvtr",
   7093   "llvm.arm.vcvtru",
   7094   "llvm.bpf.load.byte",
   7095   "llvm.bpf.load.half",
   7096   "llvm.bpf.load.word",
   7097   "llvm.bpf.pseudo",
   7098   "llvm.hexagon.A2.abs",
   7099   "llvm.hexagon.A2.absp",
   7100   "llvm.hexagon.A2.abssat",
   7101   "llvm.hexagon.A2.add",
   7102   "llvm.hexagon.A2.addh.h16.hh",
   7103   "llvm.hexagon.A2.addh.h16.hl",
   7104   "llvm.hexagon.A2.addh.h16.lh",
   7105   "llvm.hexagon.A2.addh.h16.ll",
   7106   "llvm.hexagon.A2.addh.h16.sat.hh",
   7107   "llvm.hexagon.A2.addh.h16.sat.hl",
   7108   "llvm.hexagon.A2.addh.h16.sat.lh",
   7109   "llvm.hexagon.A2.addh.h16.sat.ll",
   7110   "llvm.hexagon.A2.addh.l16.hl",
   7111   "llvm.hexagon.A2.addh.l16.ll",
   7112   "llvm.hexagon.A2.addh.l16.sat.hl",
   7113   "llvm.hexagon.A2.addh.l16.sat.ll",
   7114   "llvm.hexagon.A2.addi",
   7115   "llvm.hexagon.A2.addp",
   7116   "llvm.hexagon.A2.addpsat",
   7117   "llvm.hexagon.A2.addsat",
   7118   "llvm.hexagon.A2.addsp",
   7119   "llvm.hexagon.A2.and",
   7120   "llvm.hexagon.A2.andir",
   7121   "llvm.hexagon.A2.andp",
   7122   "llvm.hexagon.A2.aslh",
   7123   "llvm.hexagon.A2.asrh",
   7124   "llvm.hexagon.A2.combine.hh",
   7125   "llvm.hexagon.A2.combine.hl",
   7126   "llvm.hexagon.A2.combine.lh",
   7127   "llvm.hexagon.A2.combine.ll",
   7128   "llvm.hexagon.A2.combineii",
   7129   "llvm.hexagon.A2.combinew",
   7130   "llvm.hexagon.A2.max",
   7131   "llvm.hexagon.A2.maxp",
   7132   "llvm.hexagon.A2.maxu",
   7133   "llvm.hexagon.A2.maxup",
   7134   "llvm.hexagon.A2.min",
   7135   "llvm.hexagon.A2.minp",
   7136   "llvm.hexagon.A2.minu",
   7137   "llvm.hexagon.A2.minup",
   7138   "llvm.hexagon.A2.neg",
   7139   "llvm.hexagon.A2.negp",
   7140   "llvm.hexagon.A2.negsat",
   7141   "llvm.hexagon.A2.not",
   7142   "llvm.hexagon.A2.notp",
   7143   "llvm.hexagon.A2.or",
   7144   "llvm.hexagon.A2.orir",
   7145   "llvm.hexagon.A2.orp",
   7146   "llvm.hexagon.A2.roundsat",
   7147   "llvm.hexagon.A2.sat",
   7148   "llvm.hexagon.A2.satb",
   7149   "llvm.hexagon.A2.sath",
   7150   "llvm.hexagon.A2.satub",
   7151   "llvm.hexagon.A2.satuh",
   7152   "llvm.hexagon.A2.sub",
   7153   "llvm.hexagon.A2.subh.h16.hh",
   7154   "llvm.hexagon.A2.subh.h16.hl",
   7155   "llvm.hexagon.A2.subh.h16.lh",
   7156   "llvm.hexagon.A2.subh.h16.ll",
   7157   "llvm.hexagon.A2.subh.h16.sat.hh",
   7158   "llvm.hexagon.A2.subh.h16.sat.hl",
   7159   "llvm.hexagon.A2.subh.h16.sat.lh",
   7160   "llvm.hexagon.A2.subh.h16.sat.ll",
   7161   "llvm.hexagon.A2.subh.l16.hl",
   7162   "llvm.hexagon.A2.subh.l16.ll",
   7163   "llvm.hexagon.A2.subh.l16.sat.hl",
   7164   "llvm.hexagon.A2.subh.l16.sat.ll",
   7165   "llvm.hexagon.A2.subp",
   7166   "llvm.hexagon.A2.subri",
   7167   "llvm.hexagon.A2.subsat",
   7168   "llvm.hexagon.A2.svaddh",
   7169   "llvm.hexagon.A2.svaddhs",
   7170   "llvm.hexagon.A2.svadduhs",
   7171   "llvm.hexagon.A2.svavgh",
   7172   "llvm.hexagon.A2.svavghs",
   7173   "llvm.hexagon.A2.svnavgh",
   7174   "llvm.hexagon.A2.svsubh",
   7175   "llvm.hexagon.A2.svsubhs",
   7176   "llvm.hexagon.A2.svsubuhs",
   7177   "llvm.hexagon.A2.swiz",
   7178   "llvm.hexagon.A2.sxtb",
   7179   "llvm.hexagon.A2.sxth",
   7180   "llvm.hexagon.A2.sxtw",
   7181   "llvm.hexagon.A2.tfr",
   7182   "llvm.hexagon.A2.tfrih",
   7183   "llvm.hexagon.A2.tfril",
   7184   "llvm.hexagon.A2.tfrp",
   7185   "llvm.hexagon.A2.tfrpi",
   7186   "llvm.hexagon.A2.tfrsi",
   7187   "llvm.hexagon.A2.vabsh",
   7188   "llvm.hexagon.A2.vabshsat",
   7189   "llvm.hexagon.A2.vabsw",
   7190   "llvm.hexagon.A2.vabswsat",
   7191   "llvm.hexagon.A2.vaddb.map",
   7192   "llvm.hexagon.A2.vaddh",
   7193   "llvm.hexagon.A2.vaddhs",
   7194   "llvm.hexagon.A2.vaddub",
   7195   "llvm.hexagon.A2.vaddubs",
   7196   "llvm.hexagon.A2.vadduhs",
   7197   "llvm.hexagon.A2.vaddw",
   7198   "llvm.hexagon.A2.vaddws",
   7199   "llvm.hexagon.A2.vavgh",
   7200   "llvm.hexagon.A2.vavghcr",
   7201   "llvm.hexagon.A2.vavghr",
   7202   "llvm.hexagon.A2.vavgub",
   7203   "llvm.hexagon.A2.vavgubr",
   7204   "llvm.hexagon.A2.vavguh",
   7205   "llvm.hexagon.A2.vavguhr",
   7206   "llvm.hexagon.A2.vavguw",
   7207   "llvm.hexagon.A2.vavguwr",
   7208   "llvm.hexagon.A2.vavgw",
   7209   "llvm.hexagon.A2.vavgwcr",
   7210   "llvm.hexagon.A2.vavgwr",
   7211   "llvm.hexagon.A2.vcmpbeq",
   7212   "llvm.hexagon.A2.vcmpbgtu",
   7213   "llvm.hexagon.A2.vcmpheq",
   7214   "llvm.hexagon.A2.vcmphgt",
   7215   "llvm.hexagon.A2.vcmphgtu",
   7216   "llvm.hexagon.A2.vcmpweq",
   7217   "llvm.hexagon.A2.vcmpwgt",
   7218   "llvm.hexagon.A2.vcmpwgtu",
   7219   "llvm.hexagon.A2.vconj",
   7220   "llvm.hexagon.A2.vmaxb",
   7221   "llvm.hexagon.A2.vmaxh",
   7222   "llvm.hexagon.A2.vmaxub",
   7223   "llvm.hexagon.A2.vmaxuh",
   7224   "llvm.hexagon.A2.vmaxuw",
   7225   "llvm.hexagon.A2.vmaxw",
   7226   "llvm.hexagon.A2.vminb",
   7227   "llvm.hexagon.A2.vminh",
   7228   "llvm.hexagon.A2.vminub",
   7229   "llvm.hexagon.A2.vminuh",
   7230   "llvm.hexagon.A2.vminuw",
   7231   "llvm.hexagon.A2.vminw",
   7232   "llvm.hexagon.A2.vnavgh",
   7233   "llvm.hexagon.A2.vnavghcr",
   7234   "llvm.hexagon.A2.vnavghr",
   7235   "llvm.hexagon.A2.vnavgw",
   7236   "llvm.hexagon.A2.vnavgwcr",
   7237   "llvm.hexagon.A2.vnavgwr",
   7238   "llvm.hexagon.A2.vraddub",
   7239   "llvm.hexagon.A2.vraddub.acc",
   7240   "llvm.hexagon.A2.vrsadub",
   7241   "llvm.hexagon.A2.vrsadub.acc",
   7242   "llvm.hexagon.A2.vsubb.map",
   7243   "llvm.hexagon.A2.vsubh",
   7244   "llvm.hexagon.A2.vsubhs",
   7245   "llvm.hexagon.A2.vsubub",
   7246   "llvm.hexagon.A2.vsububs",
   7247   "llvm.hexagon.A2.vsubuhs",
   7248   "llvm.hexagon.A2.vsubw",
   7249   "llvm.hexagon.A2.vsubws",
   7250   "llvm.hexagon.A2.xor",
   7251   "llvm.hexagon.A2.xorp",
   7252   "llvm.hexagon.A2.zxtb",
   7253   "llvm.hexagon.A2.zxth",
   7254   "llvm.hexagon.A4.andn",
   7255   "llvm.hexagon.A4.andnp",
   7256   "llvm.hexagon.A4.bitsplit",
   7257   "llvm.hexagon.A4.bitspliti",
   7258   "llvm.hexagon.A4.boundscheck",
   7259   "llvm.hexagon.A4.cmpbeq",
   7260   "llvm.hexagon.A4.cmpbeqi",
   7261   "llvm.hexagon.A4.cmpbgt",
   7262   "llvm.hexagon.A4.cmpbgti",
   7263   "llvm.hexagon.A4.cmpbgtu",
   7264   "llvm.hexagon.A4.cmpbgtui",
   7265   "llvm.hexagon.A4.cmpheq",
   7266   "llvm.hexagon.A4.cmpheqi",
   7267   "llvm.hexagon.A4.cmphgt",
   7268   "llvm.hexagon.A4.cmphgti",
   7269   "llvm.hexagon.A4.cmphgtu",
   7270   "llvm.hexagon.A4.cmphgtui",
   7271   "llvm.hexagon.A4.combineir",
   7272   "llvm.hexagon.A4.combineri",
   7273   "llvm.hexagon.A4.cround.ri",
   7274   "llvm.hexagon.A4.cround.rr",
   7275   "llvm.hexagon.A4.modwrapu",
   7276   "llvm.hexagon.A4.orn",
   7277   "llvm.hexagon.A4.ornp",
   7278   "llvm.hexagon.A4.rcmpeq",
   7279   "llvm.hexagon.A4.rcmpeqi",
   7280   "llvm.hexagon.A4.rcmpneq",
   7281   "llvm.hexagon.A4.rcmpneqi",
   7282   "llvm.hexagon.A4.round.ri",
   7283   "llvm.hexagon.A4.round.ri.sat",
   7284   "llvm.hexagon.A4.round.rr",
   7285   "llvm.hexagon.A4.round.rr.sat",
   7286   "llvm.hexagon.A4.tlbmatch",
   7287   "llvm.hexagon.A4.vcmpbeq.any",
   7288   "llvm.hexagon.A4.vcmpbeqi",
   7289   "llvm.hexagon.A4.vcmpbgt",
   7290   "llvm.hexagon.A4.vcmpbgti",
   7291   "llvm.hexagon.A4.vcmpbgtui",
   7292   "llvm.hexagon.A4.vcmpheqi",
   7293   "llvm.hexagon.A4.vcmphgti",
   7294   "llvm.hexagon.A4.vcmphgtui",
   7295   "llvm.hexagon.A4.vcmpweqi",
   7296   "llvm.hexagon.A4.vcmpwgti",
   7297   "llvm.hexagon.A4.vcmpwgtui",
   7298   "llvm.hexagon.A4.vrmaxh",
   7299   "llvm.hexagon.A4.vrmaxuh",
   7300   "llvm.hexagon.A4.vrmaxuw",
   7301   "llvm.hexagon.A4.vrmaxw",
   7302   "llvm.hexagon.A4.vrminh",
   7303   "llvm.hexagon.A4.vrminuh",
   7304   "llvm.hexagon.A4.vrminuw",
   7305   "llvm.hexagon.A4.vrminw",
   7306   "llvm.hexagon.A5.vaddhubs",
   7307   "llvm.hexagon.C2.all8",
   7308   "llvm.hexagon.C2.and",
   7309   "llvm.hexagon.C2.andn",
   7310   "llvm.hexagon.C2.any8",
   7311   "llvm.hexagon.C2.bitsclr",
   7312   "llvm.hexagon.C2.bitsclri",
   7313   "llvm.hexagon.C2.bitsset",
   7314   "llvm.hexagon.C2.cmpeq",
   7315   "llvm.hexagon.C2.cmpeqi",
   7316   "llvm.hexagon.C2.cmpeqp",
   7317   "llvm.hexagon.C2.cmpgei",
   7318   "llvm.hexagon.C2.cmpgeui",
   7319   "llvm.hexagon.C2.cmpgt",
   7320   "llvm.hexagon.C2.cmpgti",
   7321   "llvm.hexagon.C2.cmpgtp",
   7322   "llvm.hexagon.C2.cmpgtu",
   7323   "llvm.hexagon.C2.cmpgtui",
   7324   "llvm.hexagon.C2.cmpgtup",
   7325   "llvm.hexagon.C2.cmplt",
   7326   "llvm.hexagon.C2.cmpltu",
   7327   "llvm.hexagon.C2.mask",
   7328   "llvm.hexagon.C2.mux",
   7329   "llvm.hexagon.C2.muxii",
   7330   "llvm.hexagon.C2.muxir",
   7331   "llvm.hexagon.C2.muxri",
   7332   "llvm.hexagon.C2.not",
   7333   "llvm.hexagon.C2.or",
   7334   "llvm.hexagon.C2.orn",
   7335   "llvm.hexagon.C2.pxfer.map",
   7336   "llvm.hexagon.C2.tfrpr",
   7337   "llvm.hexagon.C2.tfrrp",
   7338   "llvm.hexagon.C2.vitpack",
   7339   "llvm.hexagon.C2.vmux",
   7340   "llvm.hexagon.C2.xor",
   7341   "llvm.hexagon.C4.and.and",
   7342   "llvm.hexagon.C4.and.andn",
   7343   "llvm.hexagon.C4.and.or",
   7344   "llvm.hexagon.C4.and.orn",
   7345   "llvm.hexagon.C4.cmplte",
   7346   "llvm.hexagon.C4.cmpltei",
   7347   "llvm.hexagon.C4.cmplteu",
   7348   "llvm.hexagon.C4.cmplteui",
   7349   "llvm.hexagon.C4.cmpneq",
   7350   "llvm.hexagon.C4.cmpneqi",
   7351   "llvm.hexagon.C4.fastcorner9",
   7352   "llvm.hexagon.C4.fastcorner9.not",
   7353   "llvm.hexagon.C4.nbitsclr",
   7354   "llvm.hexagon.C4.nbitsclri",
   7355   "llvm.hexagon.C4.nbitsset",
   7356   "llvm.hexagon.C4.or.and",
   7357   "llvm.hexagon.C4.or.andn",
   7358   "llvm.hexagon.C4.or.or",
   7359   "llvm.hexagon.C4.or.orn",
   7360   "llvm.hexagon.F2.conv.d2df",
   7361   "llvm.hexagon.F2.conv.d2sf",
   7362   "llvm.hexagon.F2.conv.df2d",
   7363   "llvm.hexagon.F2.conv.df2d.chop",
   7364   "llvm.hexagon.F2.conv.df2sf",
   7365   "llvm.hexagon.F2.conv.df2ud",
   7366   "llvm.hexagon.F2.conv.df2ud.chop",
   7367   "llvm.hexagon.F2.conv.df2uw",
   7368   "llvm.hexagon.F2.conv.df2uw.chop",
   7369   "llvm.hexagon.F2.conv.df2w",
   7370   "llvm.hexagon.F2.conv.df2w.chop",
   7371   "llvm.hexagon.F2.conv.sf2d",
   7372   "llvm.hexagon.F2.conv.sf2d.chop",
   7373   "llvm.hexagon.F2.conv.sf2df",
   7374   "llvm.hexagon.F2.conv.sf2ud",
   7375   "llvm.hexagon.F2.conv.sf2ud.chop",
   7376   "llvm.hexagon.F2.conv.sf2uw",
   7377   "llvm.hexagon.F2.conv.sf2uw.chop",
   7378   "llvm.hexagon.F2.conv.sf2w",
   7379   "llvm.hexagon.F2.conv.sf2w.chop",
   7380   "llvm.hexagon.F2.conv.ud2df",
   7381   "llvm.hexagon.F2.conv.ud2sf",
   7382   "llvm.hexagon.F2.conv.uw2df",
   7383   "llvm.hexagon.F2.conv.uw2sf",
   7384   "llvm.hexagon.F2.conv.w2df",
   7385   "llvm.hexagon.F2.conv.w2sf",
   7386   "llvm.hexagon.F2.dfclass",
   7387   "llvm.hexagon.F2.dfcmpeq",
   7388   "llvm.hexagon.F2.dfcmpge",
   7389   "llvm.hexagon.F2.dfcmpgt",
   7390   "llvm.hexagon.F2.dfcmpuo",
   7391   "llvm.hexagon.F2.dfimm.n",
   7392   "llvm.hexagon.F2.dfimm.p",
   7393   "llvm.hexagon.F2.sfadd",
   7394   "llvm.hexagon.F2.sfclass",
   7395   "llvm.hexagon.F2.sfcmpeq",
   7396   "llvm.hexagon.F2.sfcmpge",
   7397   "llvm.hexagon.F2.sfcmpgt",
   7398   "llvm.hexagon.F2.sfcmpuo",
   7399   "llvm.hexagon.F2.sffixupd",
   7400   "llvm.hexagon.F2.sffixupn",
   7401   "llvm.hexagon.F2.sffixupr",
   7402   "llvm.hexagon.F2.sffma",
   7403   "llvm.hexagon.F2.sffma.lib",
   7404   "llvm.hexagon.F2.sffma.sc",
   7405   "llvm.hexagon.F2.sffms",
   7406   "llvm.hexagon.F2.sffms.lib",
   7407   "llvm.hexagon.F2.sfimm.n",
   7408   "llvm.hexagon.F2.sfimm.p",
   7409   "llvm.hexagon.F2.sfmax",
   7410   "llvm.hexagon.F2.sfmin",
   7411   "llvm.hexagon.F2.sfmpy",
   7412   "llvm.hexagon.F2.sfsub",
   7413   "llvm.hexagon.L2.loadw.locked",
   7414   "llvm.hexagon.L4.loadd.locked",
   7415   "llvm.hexagon.M2.acci",
   7416   "llvm.hexagon.M2.accii",
   7417   "llvm.hexagon.M2.cmaci.s0",
   7418   "llvm.hexagon.M2.cmacr.s0",
   7419   "llvm.hexagon.M2.cmacs.s0",
   7420   "llvm.hexagon.M2.cmacs.s1",
   7421   "llvm.hexagon.M2.cmacsc.s0",
   7422   "llvm.hexagon.M2.cmacsc.s1",
   7423   "llvm.hexagon.M2.cmpyi.s0",
   7424   "llvm.hexagon.M2.cmpyr.s0",
   7425   "llvm.hexagon.M2.cmpyrs.s0",
   7426   "llvm.hexagon.M2.cmpyrs.s1",
   7427   "llvm.hexagon.M2.cmpyrsc.s0",
   7428   "llvm.hexagon.M2.cmpyrsc.s1",
   7429   "llvm.hexagon.M2.cmpys.s0",
   7430   "llvm.hexagon.M2.cmpys.s1",
   7431   "llvm.hexagon.M2.cmpysc.s0",
   7432   "llvm.hexagon.M2.cmpysc.s1",
   7433   "llvm.hexagon.M2.cnacs.s0",
   7434   "llvm.hexagon.M2.cnacs.s1",
   7435   "llvm.hexagon.M2.cnacsc.s0",
   7436   "llvm.hexagon.M2.cnacsc.s1",
   7437   "llvm.hexagon.M2.dpmpyss.acc.s0",
   7438   "llvm.hexagon.M2.dpmpyss.nac.s0",
   7439   "llvm.hexagon.M2.dpmpyss.rnd.s0",
   7440   "llvm.hexagon.M2.dpmpyss.s0",
   7441   "llvm.hexagon.M2.dpmpyuu.acc.s0",
   7442   "llvm.hexagon.M2.dpmpyuu.nac.s0",
   7443   "llvm.hexagon.M2.dpmpyuu.s0",
   7444   "llvm.hexagon.M2.hmmpyh.rs1",
   7445   "llvm.hexagon.M2.hmmpyh.s1",
   7446   "llvm.hexagon.M2.hmmpyl.rs1",
   7447   "llvm.hexagon.M2.hmmpyl.s1",
   7448   "llvm.hexagon.M2.maci",
   7449   "llvm.hexagon.M2.macsin",
   7450   "llvm.hexagon.M2.macsip",
   7451   "llvm.hexagon.M2.mmachs.rs0",
   7452   "llvm.hexagon.M2.mmachs.rs1",
   7453   "llvm.hexagon.M2.mmachs.s0",
   7454   "llvm.hexagon.M2.mmachs.s1",
   7455   "llvm.hexagon.M2.mmacls.rs0",
   7456   "llvm.hexagon.M2.mmacls.rs1",
   7457   "llvm.hexagon.M2.mmacls.s0",
   7458   "llvm.hexagon.M2.mmacls.s1",
   7459   "llvm.hexagon.M2.mmacuhs.rs0",
   7460   "llvm.hexagon.M2.mmacuhs.rs1",
   7461   "llvm.hexagon.M2.mmacuhs.s0",
   7462   "llvm.hexagon.M2.mmacuhs.s1",
   7463   "llvm.hexagon.M2.mmaculs.rs0",
   7464   "llvm.hexagon.M2.mmaculs.rs1",
   7465   "llvm.hexagon.M2.mmaculs.s0",
   7466   "llvm.hexagon.M2.mmaculs.s1",
   7467   "llvm.hexagon.M2.mmpyh.rs0",
   7468   "llvm.hexagon.M2.mmpyh.rs1",
   7469   "llvm.hexagon.M2.mmpyh.s0",
   7470   "llvm.hexagon.M2.mmpyh.s1",
   7471   "llvm.hexagon.M2.mmpyl.rs0",
   7472   "llvm.hexagon.M2.mmpyl.rs1",
   7473   "llvm.hexagon.M2.mmpyl.s0",
   7474   "llvm.hexagon.M2.mmpyl.s1",
   7475   "llvm.hexagon.M2.mmpyuh.rs0",
   7476   "llvm.hexagon.M2.mmpyuh.rs1",
   7477   "llvm.hexagon.M2.mmpyuh.s0",
   7478   "llvm.hexagon.M2.mmpyuh.s1",
   7479   "llvm.hexagon.M2.mmpyul.rs0",
   7480   "llvm.hexagon.M2.mmpyul.rs1",
   7481   "llvm.hexagon.M2.mmpyul.s0",
   7482   "llvm.hexagon.M2.mmpyul.s1",
   7483   "llvm.hexagon.M2.mpy.acc.hh.s0",
   7484   "llvm.hexagon.M2.mpy.acc.hh.s1",
   7485   "llvm.hexagon.M2.mpy.acc.hl.s0",
   7486   "llvm.hexagon.M2.mpy.acc.hl.s1",
   7487   "llvm.hexagon.M2.mpy.acc.lh.s0",
   7488   "llvm.hexagon.M2.mpy.acc.lh.s1",
   7489   "llvm.hexagon.M2.mpy.acc.ll.s0",
   7490   "llvm.hexagon.M2.mpy.acc.ll.s1",
   7491   "llvm.hexagon.M2.mpy.acc.sat.hh.s0",
   7492   "llvm.hexagon.M2.mpy.acc.sat.hh.s1",
   7493   "llvm.hexagon.M2.mpy.acc.sat.hl.s0",
   7494   "llvm.hexagon.M2.mpy.acc.sat.hl.s1",
   7495   "llvm.hexagon.M2.mpy.acc.sat.lh.s0",
   7496   "llvm.hexagon.M2.mpy.acc.sat.lh.s1",
   7497   "llvm.hexagon.M2.mpy.acc.sat.ll.s0",
   7498   "llvm.hexagon.M2.mpy.acc.sat.ll.s1",
   7499   "llvm.hexagon.M2.mpy.hh.s0",
   7500   "llvm.hexagon.M2.mpy.hh.s1",
   7501   "llvm.hexagon.M2.mpy.hl.s0",
   7502   "llvm.hexagon.M2.mpy.hl.s1",
   7503   "llvm.hexagon.M2.mpy.lh.s0",
   7504   "llvm.hexagon.M2.mpy.lh.s1",
   7505   "llvm.hexagon.M2.mpy.ll.s0",
   7506   "llvm.hexagon.M2.mpy.ll.s1",
   7507   "llvm.hexagon.M2.mpy.nac.hh.s0",
   7508   "llvm.hexagon.M2.mpy.nac.hh.s1",
   7509   "llvm.hexagon.M2.mpy.nac.hl.s0",
   7510   "llvm.hexagon.M2.mpy.nac.hl.s1",
   7511   "llvm.hexagon.M2.mpy.nac.lh.s0",
   7512   "llvm.hexagon.M2.mpy.nac.lh.s1",
   7513   "llvm.hexagon.M2.mpy.nac.ll.s0",
   7514   "llvm.hexagon.M2.mpy.nac.ll.s1",
   7515   "llvm.hexagon.M2.mpy.nac.sat.hh.s0",
   7516   "llvm.hexagon.M2.mpy.nac.sat.hh.s1",
   7517   "llvm.hexagon.M2.mpy.nac.sat.hl.s0",
   7518   "llvm.hexagon.M2.mpy.nac.sat.hl.s1",
   7519   "llvm.hexagon.M2.mpy.nac.sat.lh.s0",
   7520   "llvm.hexagon.M2.mpy.nac.sat.lh.s1",
   7521   "llvm.hexagon.M2.mpy.nac.sat.ll.s0",
   7522   "llvm.hexagon.M2.mpy.nac.sat.ll.s1",
   7523   "llvm.hexagon.M2.mpy.rnd.hh.s0",
   7524   "llvm.hexagon.M2.mpy.rnd.hh.s1",
   7525   "llvm.hexagon.M2.mpy.rnd.hl.s0",
   7526   "llvm.hexagon.M2.mpy.rnd.hl.s1",
   7527   "llvm.hexagon.M2.mpy.rnd.lh.s0",
   7528   "llvm.hexagon.M2.mpy.rnd.lh.s1",
   7529   "llvm.hexagon.M2.mpy.rnd.ll.s0",
   7530   "llvm.hexagon.M2.mpy.rnd.ll.s1",
   7531   "llvm.hexagon.M2.mpy.sat.hh.s0",
   7532   "llvm.hexagon.M2.mpy.sat.hh.s1",
   7533   "llvm.hexagon.M2.mpy.sat.hl.s0",
   7534   "llvm.hexagon.M2.mpy.sat.hl.s1",
   7535   "llvm.hexagon.M2.mpy.sat.lh.s0",
   7536   "llvm.hexagon.M2.mpy.sat.lh.s1",
   7537   "llvm.hexagon.M2.mpy.sat.ll.s0",
   7538   "llvm.hexagon.M2.mpy.sat.ll.s1",
   7539   "llvm.hexagon.M2.mpy.sat.rnd.hh.s0",
   7540   "llvm.hexagon.M2.mpy.sat.rnd.hh.s1",
   7541   "llvm.hexagon.M2.mpy.sat.rnd.hl.s0",
   7542   "llvm.hexagon.M2.mpy.sat.rnd.hl.s1",
   7543   "llvm.hexagon.M2.mpy.sat.rnd.lh.s0",
   7544   "llvm.hexagon.M2.mpy.sat.rnd.lh.s1",
   7545   "llvm.hexagon.M2.mpy.sat.rnd.ll.s0",
   7546   "llvm.hexagon.M2.mpy.sat.rnd.ll.s1",
   7547   "llvm.hexagon.M2.mpy.up",
   7548   "llvm.hexagon.M2.mpy.up.s1",
   7549   "llvm.hexagon.M2.mpy.up.s1.sat",
   7550   "llvm.hexagon.M2.mpyd.acc.hh.s0",
   7551   "llvm.hexagon.M2.mpyd.acc.hh.s1",
   7552   "llvm.hexagon.M2.mpyd.acc.hl.s0",
   7553   "llvm.hexagon.M2.mpyd.acc.hl.s1",
   7554   "llvm.hexagon.M2.mpyd.acc.lh.s0",
   7555   "llvm.hexagon.M2.mpyd.acc.lh.s1",
   7556   "llvm.hexagon.M2.mpyd.acc.ll.s0",
   7557   "llvm.hexagon.M2.mpyd.acc.ll.s1",
   7558   "llvm.hexagon.M2.mpyd.hh.s0",
   7559   "llvm.hexagon.M2.mpyd.hh.s1",
   7560   "llvm.hexagon.M2.mpyd.hl.s0",
   7561   "llvm.hexagon.M2.mpyd.hl.s1",
   7562   "llvm.hexagon.M2.mpyd.lh.s0",
   7563   "llvm.hexagon.M2.mpyd.lh.s1",
   7564   "llvm.hexagon.M2.mpyd.ll.s0",
   7565   "llvm.hexagon.M2.mpyd.ll.s1",
   7566   "llvm.hexagon.M2.mpyd.nac.hh.s0",
   7567   "llvm.hexagon.M2.mpyd.nac.hh.s1",
   7568   "llvm.hexagon.M2.mpyd.nac.hl.s0",
   7569   "llvm.hexagon.M2.mpyd.nac.hl.s1",
   7570   "llvm.hexagon.M2.mpyd.nac.lh.s0",
   7571   "llvm.hexagon.M2.mpyd.nac.lh.s1",
   7572   "llvm.hexagon.M2.mpyd.nac.ll.s0",
   7573   "llvm.hexagon.M2.mpyd.nac.ll.s1",
   7574   "llvm.hexagon.M2.mpyd.rnd.hh.s0",
   7575   "llvm.hexagon.M2.mpyd.rnd.hh.s1",
   7576   "llvm.hexagon.M2.mpyd.rnd.hl.s0",
   7577   "llvm.hexagon.M2.mpyd.rnd.hl.s1",
   7578   "llvm.hexagon.M2.mpyd.rnd.lh.s0",
   7579   "llvm.hexagon.M2.mpyd.rnd.lh.s1",
   7580   "llvm.hexagon.M2.mpyd.rnd.ll.s0",
   7581   "llvm.hexagon.M2.mpyd.rnd.ll.s1",
   7582   "llvm.hexagon.M2.mpyi",
   7583   "llvm.hexagon.M2.mpysmi",
   7584   "llvm.hexagon.M2.mpysu.up",
   7585   "llvm.hexagon.M2.mpyu.acc.hh.s0",
   7586   "llvm.hexagon.M2.mpyu.acc.hh.s1",
   7587   "llvm.hexagon.M2.mpyu.acc.hl.s0",
   7588   "llvm.hexagon.M2.mpyu.acc.hl.s1",
   7589   "llvm.hexagon.M2.mpyu.acc.lh.s0",
   7590   "llvm.hexagon.M2.mpyu.acc.lh.s1",
   7591   "llvm.hexagon.M2.mpyu.acc.ll.s0",
   7592   "llvm.hexagon.M2.mpyu.acc.ll.s1",
   7593   "llvm.hexagon.M2.mpyu.hh.s0",
   7594   "llvm.hexagon.M2.mpyu.hh.s1",
   7595   "llvm.hexagon.M2.mpyu.hl.s0",
   7596   "llvm.hexagon.M2.mpyu.hl.s1",
   7597   "llvm.hexagon.M2.mpyu.lh.s0",
   7598   "llvm.hexagon.M2.mpyu.lh.s1",
   7599   "llvm.hexagon.M2.mpyu.ll.s0",
   7600   "llvm.hexagon.M2.mpyu.ll.s1",
   7601   "llvm.hexagon.M2.mpyu.nac.hh.s0",
   7602   "llvm.hexagon.M2.mpyu.nac.hh.s1",
   7603   "llvm.hexagon.M2.mpyu.nac.hl.s0",
   7604   "llvm.hexagon.M2.mpyu.nac.hl.s1",
   7605   "llvm.hexagon.M2.mpyu.nac.lh.s0",
   7606   "llvm.hexagon.M2.mpyu.nac.lh.s1",
   7607   "llvm.hexagon.M2.mpyu.nac.ll.s0",
   7608   "llvm.hexagon.M2.mpyu.nac.ll.s1",
   7609   "llvm.hexagon.M2.mpyu.up",
   7610   "llvm.hexagon.M2.mpyud.acc.hh.s0",
   7611   "llvm.hexagon.M2.mpyud.acc.hh.s1",
   7612   "llvm.hexagon.M2.mpyud.acc.hl.s0",
   7613   "llvm.hexagon.M2.mpyud.acc.hl.s1",
   7614   "llvm.hexagon.M2.mpyud.acc.lh.s0",
   7615   "llvm.hexagon.M2.mpyud.acc.lh.s1",
   7616   "llvm.hexagon.M2.mpyud.acc.ll.s0",
   7617   "llvm.hexagon.M2.mpyud.acc.ll.s1",
   7618   "llvm.hexagon.M2.mpyud.hh.s0",
   7619   "llvm.hexagon.M2.mpyud.hh.s1",
   7620   "llvm.hexagon.M2.mpyud.hl.s0",
   7621   "llvm.hexagon.M2.mpyud.hl.s1",
   7622   "llvm.hexagon.M2.mpyud.lh.s0",
   7623   "llvm.hexagon.M2.mpyud.lh.s1",
   7624   "llvm.hexagon.M2.mpyud.ll.s0",
   7625   "llvm.hexagon.M2.mpyud.ll.s1",
   7626   "llvm.hexagon.M2.mpyud.nac.hh.s0",
   7627   "llvm.hexagon.M2.mpyud.nac.hh.s1",
   7628   "llvm.hexagon.M2.mpyud.nac.hl.s0",
   7629   "llvm.hexagon.M2.mpyud.nac.hl.s1",
   7630   "llvm.hexagon.M2.mpyud.nac.lh.s0",
   7631   "llvm.hexagon.M2.mpyud.nac.lh.s1",
   7632   "llvm.hexagon.M2.mpyud.nac.ll.s0",
   7633   "llvm.hexagon.M2.mpyud.nac.ll.s1",
   7634   "llvm.hexagon.M2.mpyui",
   7635   "llvm.hexagon.M2.nacci",
   7636   "llvm.hexagon.M2.naccii",
   7637   "llvm.hexagon.M2.subacc",
   7638   "llvm.hexagon.M2.vabsdiffh",
   7639   "llvm.hexagon.M2.vabsdiffw",
   7640   "llvm.hexagon.M2.vcmac.s0.sat.i",
   7641   "llvm.hexagon.M2.vcmac.s0.sat.r",
   7642   "llvm.hexagon.M2.vcmpy.s0.sat.i",
   7643   "llvm.hexagon.M2.vcmpy.s0.sat.r",
   7644   "llvm.hexagon.M2.vcmpy.s1.sat.i",
   7645   "llvm.hexagon.M2.vcmpy.s1.sat.r",
   7646   "llvm.hexagon.M2.vdmacs.s0",
   7647   "llvm.hexagon.M2.vdmacs.s1",
   7648   "llvm.hexagon.M2.vdmpyrs.s0",
   7649   "llvm.hexagon.M2.vdmpyrs.s1",
   7650   "llvm.hexagon.M2.vdmpys.s0",
   7651   "llvm.hexagon.M2.vdmpys.s1",
   7652   "llvm.hexagon.M2.vmac2",
   7653   "llvm.hexagon.M2.vmac2es",
   7654   "llvm.hexagon.M2.vmac2es.s0",
   7655   "llvm.hexagon.M2.vmac2es.s1",
   7656   "llvm.hexagon.M2.vmac2s.s0",
   7657   "llvm.hexagon.M2.vmac2s.s1",
   7658   "llvm.hexagon.M2.vmac2su.s0",
   7659   "llvm.hexagon.M2.vmac2su.s1",
   7660   "llvm.hexagon.M2.vmpy2es.s0",
   7661   "llvm.hexagon.M2.vmpy2es.s1",
   7662   "llvm.hexagon.M2.vmpy2s.s0",
   7663   "llvm.hexagon.M2.vmpy2s.s0pack",
   7664   "llvm.hexagon.M2.vmpy2s.s1",
   7665   "llvm.hexagon.M2.vmpy2s.s1pack",
   7666   "llvm.hexagon.M2.vmpy2su.s0",
   7667   "llvm.hexagon.M2.vmpy2su.s1",
   7668   "llvm.hexagon.M2.vraddh",
   7669   "llvm.hexagon.M2.vradduh",
   7670   "llvm.hexagon.M2.vrcmaci.s0",
   7671   "llvm.hexagon.M2.vrcmaci.s0c",
   7672   "llvm.hexagon.M2.vrcmacr.s0",
   7673   "llvm.hexagon.M2.vrcmacr.s0c",
   7674   "llvm.hexagon.M2.vrcmpyi.s0",
   7675   "llvm.hexagon.M2.vrcmpyi.s0c",
   7676   "llvm.hexagon.M2.vrcmpyr.s0",
   7677   "llvm.hexagon.M2.vrcmpyr.s0c",
   7678   "llvm.hexagon.M2.vrcmpys.acc.s1",
   7679   "llvm.hexagon.M2.vrcmpys.s1",
   7680   "llvm.hexagon.M2.vrcmpys.s1rp",
   7681   "llvm.hexagon.M2.vrmac.s0",
   7682   "llvm.hexagon.M2.vrmpy.s0",
   7683   "llvm.hexagon.M2.xor.xacc",
   7684   "llvm.hexagon.M4.and.and",
   7685   "llvm.hexagon.M4.and.andn",
   7686   "llvm.hexagon.M4.and.or",
   7687   "llvm.hexagon.M4.and.xor",
   7688   "llvm.hexagon.M4.cmpyi.wh",
   7689   "llvm.hexagon.M4.cmpyi.whc",
   7690   "llvm.hexagon.M4.cmpyr.wh",
   7691   "llvm.hexagon.M4.cmpyr.whc",
   7692   "llvm.hexagon.M4.mac.up.s1.sat",
   7693   "llvm.hexagon.M4.mpyri.addi",
   7694   "llvm.hexagon.M4.mpyri.addr",
   7695   "llvm.hexagon.M4.mpyri.addr.u2",
   7696   "llvm.hexagon.M4.mpyrr.addi",
   7697   "llvm.hexagon.M4.mpyrr.addr",
   7698   "llvm.hexagon.M4.nac.up.s1.sat",
   7699   "llvm.hexagon.M4.or.and",
   7700   "llvm.hexagon.M4.or.andn",
   7701   "llvm.hexagon.M4.or.or",
   7702   "llvm.hexagon.M4.or.xor",
   7703   "llvm.hexagon.M4.pmpyw",
   7704   "llvm.hexagon.M4.pmpyw.acc",
   7705   "llvm.hexagon.M4.vpmpyh",
   7706   "llvm.hexagon.M4.vpmpyh.acc",
   7707   "llvm.hexagon.M4.vrmpyeh.acc.s0",
   7708   "llvm.hexagon.M4.vrmpyeh.acc.s1",
   7709   "llvm.hexagon.M4.vrmpyeh.s0",
   7710   "llvm.hexagon.M4.vrmpyeh.s1",
   7711   "llvm.hexagon.M4.vrmpyoh.acc.s0",
   7712   "llvm.hexagon.M4.vrmpyoh.acc.s1",
   7713   "llvm.hexagon.M4.vrmpyoh.s0",
   7714   "llvm.hexagon.M4.vrmpyoh.s1",
   7715   "llvm.hexagon.M4.xor.and",
   7716   "llvm.hexagon.M4.xor.andn",
   7717   "llvm.hexagon.M4.xor.or",
   7718   "llvm.hexagon.M4.xor.xacc",
   7719   "llvm.hexagon.M5.vdmacbsu",
   7720   "llvm.hexagon.M5.vdmpybsu",
   7721   "llvm.hexagon.M5.vmacbsu",
   7722   "llvm.hexagon.M5.vmacbuu",
   7723   "llvm.hexagon.M5.vmpybsu",
   7724   "llvm.hexagon.M5.vmpybuu",
   7725   "llvm.hexagon.M5.vrmacbsu",
   7726   "llvm.hexagon.M5.vrmacbuu",
   7727   "llvm.hexagon.M5.vrmpybsu",
   7728   "llvm.hexagon.M5.vrmpybuu",
   7729   "llvm.hexagon.M6.vabsdiffb",
   7730   "llvm.hexagon.M6.vabsdiffub",
   7731   "llvm.hexagon.S2.addasl.rrri",
   7732   "llvm.hexagon.S2.asl.i.p",
   7733   "llvm.hexagon.S2.asl.i.p.acc",
   7734   "llvm.hexagon.S2.asl.i.p.and",
   7735   "llvm.hexagon.S2.asl.i.p.nac",
   7736   "llvm.hexagon.S2.asl.i.p.or",
   7737   "llvm.hexagon.S2.asl.i.p.xacc",
   7738   "llvm.hexagon.S2.asl.i.r",
   7739   "llvm.hexagon.S2.asl.i.r.acc",
   7740   "llvm.hexagon.S2.asl.i.r.and",
   7741   "llvm.hexagon.S2.asl.i.r.nac",
   7742   "llvm.hexagon.S2.asl.i.r.or",
   7743   "llvm.hexagon.S2.asl.i.r.sat",
   7744   "llvm.hexagon.S2.asl.i.r.xacc",
   7745   "llvm.hexagon.S2.asl.i.vh",
   7746   "llvm.hexagon.S2.asl.i.vw",
   7747   "llvm.hexagon.S2.asl.r.p",
   7748   "llvm.hexagon.S2.asl.r.p.acc",
   7749   "llvm.hexagon.S2.asl.r.p.and",
   7750   "llvm.hexagon.S2.asl.r.p.nac",
   7751   "llvm.hexagon.S2.asl.r.p.or",
   7752   "llvm.hexagon.S2.asl.r.p.xor",
   7753   "llvm.hexagon.S2.asl.r.r",
   7754   "llvm.hexagon.S2.asl.r.r.acc",
   7755   "llvm.hexagon.S2.asl.r.r.and",
   7756   "llvm.hexagon.S2.asl.r.r.nac",
   7757   "llvm.hexagon.S2.asl.r.r.or",
   7758   "llvm.hexagon.S2.asl.r.r.sat",
   7759   "llvm.hexagon.S2.asl.r.vh",
   7760   "llvm.hexagon.S2.asl.r.vw",
   7761   "llvm.hexagon.S2.asr.i.p",
   7762   "llvm.hexagon.S2.asr.i.p.acc",
   7763   "llvm.hexagon.S2.asr.i.p.and",
   7764   "llvm.hexagon.S2.asr.i.p.nac",
   7765   "llvm.hexagon.S2.asr.i.p.or",
   7766   "llvm.hexagon.S2.asr.i.p.rnd",
   7767   "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax",
   7768   "llvm.hexagon.S2.asr.i.r",
   7769   "llvm.hexagon.S2.asr.i.r.acc",
   7770   "llvm.hexagon.S2.asr.i.r.and",
   7771   "llvm.hexagon.S2.asr.i.r.nac",
   7772   "llvm.hexagon.S2.asr.i.r.or",
   7773   "llvm.hexagon.S2.asr.i.r.rnd",
   7774   "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax",
   7775   "llvm.hexagon.S2.asr.i.svw.trun",
   7776   "llvm.hexagon.S2.asr.i.vh",
   7777   "llvm.hexagon.S2.asr.i.vw",
   7778   "llvm.hexagon.S2.asr.r.p",
   7779   "llvm.hexagon.S2.asr.r.p.acc",
   7780   "llvm.hexagon.S2.asr.r.p.and",
   7781   "llvm.hexagon.S2.asr.r.p.nac",
   7782   "llvm.hexagon.S2.asr.r.p.or",
   7783   "llvm.hexagon.S2.asr.r.p.xor",
   7784   "llvm.hexagon.S2.asr.r.r",
   7785   "llvm.hexagon.S2.asr.r.r.acc",
   7786   "llvm.hexagon.S2.asr.r.r.and",
   7787   "llvm.hexagon.S2.asr.r.r.nac",
   7788   "llvm.hexagon.S2.asr.r.r.or",
   7789   "llvm.hexagon.S2.asr.r.r.sat",
   7790   "llvm.hexagon.S2.asr.r.svw.trun",
   7791   "llvm.hexagon.S2.asr.r.vh",
   7792   "llvm.hexagon.S2.asr.r.vw",
   7793   "llvm.hexagon.S2.brev",
   7794   "llvm.hexagon.S2.brevp",
   7795   "llvm.hexagon.S2.cabacencbin",
   7796   "llvm.hexagon.S2.cl0",
   7797   "llvm.hexagon.S2.cl0p",
   7798   "llvm.hexagon.S2.cl1",
   7799   "llvm.hexagon.S2.cl1p",
   7800   "llvm.hexagon.S2.clb",
   7801   "llvm.hexagon.S2.clbnorm",
   7802   "llvm.hexagon.S2.clbp",
   7803   "llvm.hexagon.S2.clrbit.i",
   7804   "llvm.hexagon.S2.clrbit.r",
   7805   "llvm.hexagon.S2.ct0",
   7806   "llvm.hexagon.S2.ct0p",
   7807   "llvm.hexagon.S2.ct1",
   7808   "llvm.hexagon.S2.ct1p",
   7809   "llvm.hexagon.S2.deinterleave",
   7810   "llvm.hexagon.S2.extractu",
   7811   "llvm.hexagon.S2.extractu.rp",
   7812   "llvm.hexagon.S2.extractup",
   7813   "llvm.hexagon.S2.extractup.rp",
   7814   "llvm.hexagon.S2.insert",
   7815   "llvm.hexagon.S2.insert.rp",
   7816   "llvm.hexagon.S2.insertp",
   7817   "llvm.hexagon.S2.insertp.rp",
   7818   "llvm.hexagon.S2.interleave",
   7819   "llvm.hexagon.S2.lfsp",
   7820   "llvm.hexagon.S2.lsl.r.p",
   7821   "llvm.hexagon.S2.lsl.r.p.acc",
   7822   "llvm.hexagon.S2.lsl.r.p.and",
   7823   "llvm.hexagon.S2.lsl.r.p.nac",
   7824   "llvm.hexagon.S2.lsl.r.p.or",
   7825   "llvm.hexagon.S2.lsl.r.p.xor",
   7826   "llvm.hexagon.S2.lsl.r.r",
   7827   "llvm.hexagon.S2.lsl.r.r.acc",
   7828   "llvm.hexagon.S2.lsl.r.r.and",
   7829   "llvm.hexagon.S2.lsl.r.r.nac",
   7830   "llvm.hexagon.S2.lsl.r.r.or",
   7831   "llvm.hexagon.S2.lsl.r.vh",
   7832   "llvm.hexagon.S2.lsl.r.vw",
   7833   "llvm.hexagon.S2.lsr.i.p",
   7834   "llvm.hexagon.S2.lsr.i.p.acc",
   7835   "llvm.hexagon.S2.lsr.i.p.and",
   7836   "llvm.hexagon.S2.lsr.i.p.nac",
   7837   "llvm.hexagon.S2.lsr.i.p.or",
   7838   "llvm.hexagon.S2.lsr.i.p.xacc",
   7839   "llvm.hexagon.S2.lsr.i.r",
   7840   "llvm.hexagon.S2.lsr.i.r.acc",
   7841   "llvm.hexagon.S2.lsr.i.r.and",
   7842   "llvm.hexagon.S2.lsr.i.r.nac",
   7843   "llvm.hexagon.S2.lsr.i.r.or",
   7844   "llvm.hexagon.S2.lsr.i.r.xacc",
   7845   "llvm.hexagon.S2.lsr.i.vh",
   7846   "llvm.hexagon.S2.lsr.i.vw",
   7847   "llvm.hexagon.S2.lsr.r.p",
   7848   "llvm.hexagon.S2.lsr.r.p.acc",
   7849   "llvm.hexagon.S2.lsr.r.p.and",
   7850   "llvm.hexagon.S2.lsr.r.p.nac",
   7851   "llvm.hexagon.S2.lsr.r.p.or",
   7852   "llvm.hexagon.S2.lsr.r.p.xor",
   7853   "llvm.hexagon.S2.lsr.r.r",
   7854   "llvm.hexagon.S2.lsr.r.r.acc",
   7855   "llvm.hexagon.S2.lsr.r.r.and",
   7856   "llvm.hexagon.S2.lsr.r.r.nac",
   7857   "llvm.hexagon.S2.lsr.r.r.or",
   7858   "llvm.hexagon.S2.lsr.r.vh",
   7859   "llvm.hexagon.S2.lsr.r.vw",
   7860   "llvm.hexagon.S2.packhl",
   7861   "llvm.hexagon.S2.parityp",
   7862   "llvm.hexagon.S2.setbit.i",
   7863   "llvm.hexagon.S2.setbit.r",
   7864   "llvm.hexagon.S2.shuffeb",
   7865   "llvm.hexagon.S2.shuffeh",
   7866   "llvm.hexagon.S2.shuffob",
   7867   "llvm.hexagon.S2.shuffoh",
   7868   "llvm.hexagon.S2.storew.locked",
   7869   "llvm.hexagon.S2.svsathb",
   7870   "llvm.hexagon.S2.svsathub",
   7871   "llvm.hexagon.S2.tableidxb.goodsyntax",
   7872   "llvm.hexagon.S2.tableidxd.goodsyntax",
   7873   "llvm.hexagon.S2.tableidxh.goodsyntax",
   7874   "llvm.hexagon.S2.tableidxw.goodsyntax",
   7875   "llvm.hexagon.S2.togglebit.i",
   7876   "llvm.hexagon.S2.togglebit.r",
   7877   "llvm.hexagon.S2.tstbit.i",
   7878   "llvm.hexagon.S2.tstbit.r",
   7879   "llvm.hexagon.S2.valignib",
   7880   "llvm.hexagon.S2.valignrb",
   7881   "llvm.hexagon.S2.vcnegh",
   7882   "llvm.hexagon.S2.vcrotate",
   7883   "llvm.hexagon.S2.vrcnegh",
   7884   "llvm.hexagon.S2.vrndpackwh",
   7885   "llvm.hexagon.S2.vrndpackwhs",
   7886   "llvm.hexagon.S2.vsathb",
   7887   "llvm.hexagon.S2.vsathb.nopack",
   7888   "llvm.hexagon.S2.vsathub",
   7889   "llvm.hexagon.S2.vsathub.nopack",
   7890   "llvm.hexagon.S2.vsatwh",
   7891   "llvm.hexagon.S2.vsatwh.nopack",
   7892   "llvm.hexagon.S2.vsatwuh",
   7893   "llvm.hexagon.S2.vsatwuh.nopack",
   7894   "llvm.hexagon.S2.vsplatrb",
   7895   "llvm.hexagon.S2.vsplatrh",
   7896   "llvm.hexagon.S2.vspliceib",
   7897   "llvm.hexagon.S2.vsplicerb",
   7898   "llvm.hexagon.S2.vsxtbh",
   7899   "llvm.hexagon.S2.vsxthw",
   7900   "llvm.hexagon.S2.vtrunehb",
   7901   "llvm.hexagon.S2.vtrunewh",
   7902   "llvm.hexagon.S2.vtrunohb",
   7903   "llvm.hexagon.S2.vtrunowh",
   7904   "llvm.hexagon.S2.vzxtbh",
   7905   "llvm.hexagon.S2.vzxthw",
   7906   "llvm.hexagon.S4.addaddi",
   7907   "llvm.hexagon.S4.addi.asl.ri",
   7908   "llvm.hexagon.S4.addi.lsr.ri",
   7909   "llvm.hexagon.S4.andi.asl.ri",
   7910   "llvm.hexagon.S4.andi.lsr.ri",
   7911   "llvm.hexagon.S4.clbaddi",
   7912   "llvm.hexagon.S4.clbpaddi",
   7913   "llvm.hexagon.S4.clbpnorm",
   7914   "llvm.hexagon.S4.extract",
   7915   "llvm.hexagon.S4.extract.rp",
   7916   "llvm.hexagon.S4.extractp",
   7917   "llvm.hexagon.S4.extractp.rp",
   7918   "llvm.hexagon.S4.lsli",
   7919   "llvm.hexagon.S4.ntstbit.i",
   7920   "llvm.hexagon.S4.ntstbit.r",
   7921   "llvm.hexagon.S4.or.andi",
   7922   "llvm.hexagon.S4.or.andix",
   7923   "llvm.hexagon.S4.or.ori",
   7924   "llvm.hexagon.S4.ori.asl.ri",
   7925   "llvm.hexagon.S4.ori.lsr.ri",
   7926   "llvm.hexagon.S4.parity",
   7927   "llvm.hexagon.S4.stored.locked",
   7928   "llvm.hexagon.S4.subaddi",
   7929   "llvm.hexagon.S4.subi.asl.ri",
   7930   "llvm.hexagon.S4.subi.lsr.ri",
   7931   "llvm.hexagon.S4.vrcrotate",
   7932   "llvm.hexagon.S4.vrcrotate.acc",
   7933   "llvm.hexagon.S4.vxaddsubh",
   7934   "llvm.hexagon.S4.vxaddsubhr",
   7935   "llvm.hexagon.S4.vxaddsubw",
   7936   "llvm.hexagon.S4.vxsubaddh",
   7937   "llvm.hexagon.S4.vxsubaddhr",
   7938   "llvm.hexagon.S4.vxsubaddw",
   7939   "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax",
   7940   "llvm.hexagon.S5.asrhub.sat",
   7941   "llvm.hexagon.S5.popcountp",
   7942   "llvm.hexagon.S5.vasrhrnd.goodsyntax",
   7943   "llvm.hexagon.S6.rol.i.p",
   7944   "llvm.hexagon.S6.rol.i.p.acc",
   7945   "llvm.hexagon.S6.rol.i.p.and",
   7946   "llvm.hexagon.S6.rol.i.p.nac",
   7947   "llvm.hexagon.S6.rol.i.p.or",
   7948   "llvm.hexagon.S6.rol.i.p.xacc",
   7949   "llvm.hexagon.S6.rol.i.r",
   7950   "llvm.hexagon.S6.rol.i.r.acc",
   7951   "llvm.hexagon.S6.rol.i.r.and",
   7952   "llvm.hexagon.S6.rol.i.r.nac",
   7953   "llvm.hexagon.S6.rol.i.r.or",
   7954   "llvm.hexagon.S6.rol.i.r.xacc",
   7955   "llvm.hexagon.S6.vsplatrbp",
   7956   "llvm.hexagon.S6.vtrunehb.ppp",
   7957   "llvm.hexagon.S6.vtrunohb.ppp",
   7958   "llvm.hexagon.SI.to.SXTHI.asrh",
   7959   "llvm.hexagon.V6.extractw",
   7960   "llvm.hexagon.V6.extractw.128B",
   7961   "llvm.hexagon.V6.hi",
   7962   "llvm.hexagon.V6.hi.128B",
   7963   "llvm.hexagon.V6.lo",
   7964   "llvm.hexagon.V6.lo.128B",
   7965   "llvm.hexagon.V6.lvsplatb",
   7966   "llvm.hexagon.V6.lvsplatb.128B",
   7967   "llvm.hexagon.V6.lvsplath",
   7968   "llvm.hexagon.V6.lvsplath.128B",
   7969   "llvm.hexagon.V6.lvsplatw",
   7970   "llvm.hexagon.V6.lvsplatw.128B",
   7971   "llvm.hexagon.V6.pred.and",
   7972   "llvm.hexagon.V6.pred.and.128B",
   7973   "llvm.hexagon.V6.pred.and.n",
   7974   "llvm.hexagon.V6.pred.and.n.128B",
   7975   "llvm.hexagon.V6.pred.not",
   7976   "llvm.hexagon.V6.pred.not.128B",
   7977   "llvm.hexagon.V6.pred.or",
   7978   "llvm.hexagon.V6.pred.or.128B",
   7979   "llvm.hexagon.V6.pred.or.n",
   7980   "llvm.hexagon.V6.pred.or.n.128B",
   7981   "llvm.hexagon.V6.pred.scalar2",
   7982   "llvm.hexagon.V6.pred.scalar2.128B",
   7983   "llvm.hexagon.V6.pred.scalar2v2",
   7984   "llvm.hexagon.V6.pred.scalar2v2.128B",
   7985   "llvm.hexagon.V6.pred.xor",
   7986   "llvm.hexagon.V6.pred.xor.128B",
   7987   "llvm.hexagon.V6.shuffeqh",
   7988   "llvm.hexagon.V6.shuffeqh.128B",
   7989   "llvm.hexagon.V6.shuffeqw",
   7990   "llvm.hexagon.V6.shuffeqw.128B",
   7991   "llvm.hexagon.V6.vabsdiffh",
   7992   "llvm.hexagon.V6.vabsdiffh.128B",
   7993   "llvm.hexagon.V6.vabsdiffub",
   7994   "llvm.hexagon.V6.vabsdiffub.128B",
   7995   "llvm.hexagon.V6.vabsdiffuh",
   7996   "llvm.hexagon.V6.vabsdiffuh.128B",
   7997   "llvm.hexagon.V6.vabsdiffw",
   7998   "llvm.hexagon.V6.vabsdiffw.128B",
   7999   "llvm.hexagon.V6.vabsh",
   8000   "llvm.hexagon.V6.vabsh.128B",
   8001   "llvm.hexagon.V6.vabsh.sat",
   8002   "llvm.hexagon.V6.vabsh.sat.128B",
   8003   "llvm.hexagon.V6.vabsw",
   8004   "llvm.hexagon.V6.vabsw.128B",
   8005   "llvm.hexagon.V6.vabsw.sat",
   8006   "llvm.hexagon.V6.vabsw.sat.128B",
   8007   "llvm.hexagon.V6.vaddb",
   8008   "llvm.hexagon.V6.vaddb.128B",
   8009   "llvm.hexagon.V6.vaddb.dv",
   8010   "llvm.hexagon.V6.vaddb.dv.128B",
   8011   "llvm.hexagon.V6.vaddbnq",
   8012   "llvm.hexagon.V6.vaddbnq.128B",
   8013   "llvm.hexagon.V6.vaddbq",
   8014   "llvm.hexagon.V6.vaddbq.128B",
   8015   "llvm.hexagon.V6.vaddbsat",
   8016   "llvm.hexagon.V6.vaddbsat.128B",
   8017   "llvm.hexagon.V6.vaddbsat.dv",
   8018   "llvm.hexagon.V6.vaddbsat.dv.128B",
   8019   "llvm.hexagon.V6.vaddclbh",
   8020   "llvm.hexagon.V6.vaddclbh.128B",
   8021   "llvm.hexagon.V6.vaddclbw",
   8022   "llvm.hexagon.V6.vaddclbw.128B",
   8023   "llvm.hexagon.V6.vaddh",
   8024   "llvm.hexagon.V6.vaddh.128B",
   8025   "llvm.hexagon.V6.vaddh.dv",
   8026   "llvm.hexagon.V6.vaddh.dv.128B",
   8027   "llvm.hexagon.V6.vaddhnq",
   8028   "llvm.hexagon.V6.vaddhnq.128B",
   8029   "llvm.hexagon.V6.vaddhq",
   8030   "llvm.hexagon.V6.vaddhq.128B",
   8031   "llvm.hexagon.V6.vaddhsat",
   8032   "llvm.hexagon.V6.vaddhsat.128B",
   8033   "llvm.hexagon.V6.vaddhsat.dv",
   8034   "llvm.hexagon.V6.vaddhsat.dv.128B",
   8035   "llvm.hexagon.V6.vaddhw",
   8036   "llvm.hexagon.V6.vaddhw.128B",
   8037   "llvm.hexagon.V6.vaddhw.acc",
   8038   "llvm.hexagon.V6.vaddhw.acc.128B",
   8039   "llvm.hexagon.V6.vaddubh",
   8040   "llvm.hexagon.V6.vaddubh.128B",
   8041   "llvm.hexagon.V6.vaddubh.acc",
   8042   "llvm.hexagon.V6.vaddubh.acc.128B",
   8043   "llvm.hexagon.V6.vaddubsat",
   8044   "llvm.hexagon.V6.vaddubsat.128B",
   8045   "llvm.hexagon.V6.vaddubsat.dv",
   8046   "llvm.hexagon.V6.vaddubsat.dv.128B",
   8047   "llvm.hexagon.V6.vaddububb.sat",
   8048   "llvm.hexagon.V6.vaddububb.sat.128B",
   8049   "llvm.hexagon.V6.vadduhsat",
   8050   "llvm.hexagon.V6.vadduhsat.128B",
   8051   "llvm.hexagon.V6.vadduhsat.dv",
   8052   "llvm.hexagon.V6.vadduhsat.dv.128B",
   8053   "llvm.hexagon.V6.vadduhw",
   8054   "llvm.hexagon.V6.vadduhw.128B",
   8055   "llvm.hexagon.V6.vadduhw.acc",
   8056   "llvm.hexagon.V6.vadduhw.acc.128B",
   8057   "llvm.hexagon.V6.vadduwsat",
   8058   "llvm.hexagon.V6.vadduwsat.128B",
   8059   "llvm.hexagon.V6.vadduwsat.dv",
   8060   "llvm.hexagon.V6.vadduwsat.dv.128B",
   8061   "llvm.hexagon.V6.vaddw",
   8062   "llvm.hexagon.V6.vaddw.128B",
   8063   "llvm.hexagon.V6.vaddw.dv",
   8064   "llvm.hexagon.V6.vaddw.dv.128B",
   8065   "llvm.hexagon.V6.vaddwnq",
   8066   "llvm.hexagon.V6.vaddwnq.128B",
   8067   "llvm.hexagon.V6.vaddwq",
   8068   "llvm.hexagon.V6.vaddwq.128B",
   8069   "llvm.hexagon.V6.vaddwsat",
   8070   "llvm.hexagon.V6.vaddwsat.128B",
   8071   "llvm.hexagon.V6.vaddwsat.dv",
   8072   "llvm.hexagon.V6.vaddwsat.dv.128B",
   8073   "llvm.hexagon.V6.valignb",
   8074   "llvm.hexagon.V6.valignb.128B",
   8075   "llvm.hexagon.V6.valignbi",
   8076   "llvm.hexagon.V6.valignbi.128B",
   8077   "llvm.hexagon.V6.vand",
   8078   "llvm.hexagon.V6.vand.128B",
   8079   "llvm.hexagon.V6.vandnqrt",
   8080   "llvm.hexagon.V6.vandnqrt.128B",
   8081   "llvm.hexagon.V6.vandnqrt.acc",
   8082   "llvm.hexagon.V6.vandnqrt.acc.128B",
   8083   "llvm.hexagon.V6.vandqrt",
   8084   "llvm.hexagon.V6.vandqrt.128B",
   8085   "llvm.hexagon.V6.vandqrt.acc",
   8086   "llvm.hexagon.V6.vandqrt.acc.128B",
   8087   "llvm.hexagon.V6.vandvnqv",
   8088   "llvm.hexagon.V6.vandvnqv.128B",
   8089   "llvm.hexagon.V6.vandvqv",
   8090   "llvm.hexagon.V6.vandvqv.128B",
   8091   "llvm.hexagon.V6.vandvrt",
   8092   "llvm.hexagon.V6.vandvrt.128B",
   8093   "llvm.hexagon.V6.vandvrt.acc",
   8094   "llvm.hexagon.V6.vandvrt.acc.128B",
   8095   "llvm.hexagon.V6.vaslh",
   8096   "llvm.hexagon.V6.vaslh.128B",
   8097   "llvm.hexagon.V6.vaslhv",
   8098   "llvm.hexagon.V6.vaslhv.128B",
   8099   "llvm.hexagon.V6.vaslw",
   8100   "llvm.hexagon.V6.vaslw.128B",
   8101   "llvm.hexagon.V6.vaslw.acc",
   8102   "llvm.hexagon.V6.vaslw.acc.128B",
   8103   "llvm.hexagon.V6.vaslwv",
   8104   "llvm.hexagon.V6.vaslwv.128B",
   8105   "llvm.hexagon.V6.vasrh",
   8106   "llvm.hexagon.V6.vasrh.128B",
   8107   "llvm.hexagon.V6.vasrhbrndsat",
   8108   "llvm.hexagon.V6.vasrhbrndsat.128B",
   8109   "llvm.hexagon.V6.vasrhbsat",
   8110   "llvm.hexagon.V6.vasrhbsat.128B",
   8111   "llvm.hexagon.V6.vasrhubrndsat",
   8112   "llvm.hexagon.V6.vasrhubrndsat.128B",
   8113   "llvm.hexagon.V6.vasrhubsat",
   8114   "llvm.hexagon.V6.vasrhubsat.128B",
   8115   "llvm.hexagon.V6.vasrhv",
   8116   "llvm.hexagon.V6.vasrhv.128B",
   8117   "llvm.hexagon.V6.vasruwuhrndsat",
   8118   "llvm.hexagon.V6.vasruwuhrndsat.128B",
   8119   "llvm.hexagon.V6.vasrw",
   8120   "llvm.hexagon.V6.vasrw.128B",
   8121   "llvm.hexagon.V6.vasrw.acc",
   8122   "llvm.hexagon.V6.vasrw.acc.128B",
   8123   "llvm.hexagon.V6.vasrwh",
   8124   "llvm.hexagon.V6.vasrwh.128B",
   8125   "llvm.hexagon.V6.vasrwhrndsat",
   8126   "llvm.hexagon.V6.vasrwhrndsat.128B",
   8127   "llvm.hexagon.V6.vasrwhsat",
   8128   "llvm.hexagon.V6.vasrwhsat.128B",
   8129   "llvm.hexagon.V6.vasrwuhrndsat",
   8130   "llvm.hexagon.V6.vasrwuhrndsat.128B",
   8131   "llvm.hexagon.V6.vasrwuhsat",
   8132   "llvm.hexagon.V6.vasrwuhsat.128B",
   8133   "llvm.hexagon.V6.vasrwv",
   8134   "llvm.hexagon.V6.vasrwv.128B",
   8135   "llvm.hexagon.V6.vassign",
   8136   "llvm.hexagon.V6.vassign.128B",
   8137   "llvm.hexagon.V6.vassignp",
   8138   "llvm.hexagon.V6.vassignp.128B",
   8139   "llvm.hexagon.V6.vavgh",
   8140   "llvm.hexagon.V6.vavgh.128B",
   8141   "llvm.hexagon.V6.vavghrnd",
   8142   "llvm.hexagon.V6.vavghrnd.128B",
   8143   "llvm.hexagon.V6.vavgub",
   8144   "llvm.hexagon.V6.vavgub.128B",
   8145   "llvm.hexagon.V6.vavgubrnd",
   8146   "llvm.hexagon.V6.vavgubrnd.128B",
   8147   "llvm.hexagon.V6.vavguh",
   8148   "llvm.hexagon.V6.vavguh.128B",
   8149   "llvm.hexagon.V6.vavguhrnd",
   8150   "llvm.hexagon.V6.vavguhrnd.128B",
   8151   "llvm.hexagon.V6.vavgw",
   8152   "llvm.hexagon.V6.vavgw.128B",
   8153   "llvm.hexagon.V6.vavgwrnd",
   8154   "llvm.hexagon.V6.vavgwrnd.128B",
   8155   "llvm.hexagon.V6.vcl0h",
   8156   "llvm.hexagon.V6.vcl0h.128B",
   8157   "llvm.hexagon.V6.vcl0w",
   8158   "llvm.hexagon.V6.vcl0w.128B",
   8159   "llvm.hexagon.V6.vcombine",
   8160   "llvm.hexagon.V6.vcombine.128B",
   8161   "llvm.hexagon.V6.vd0",
   8162   "llvm.hexagon.V6.vd0.128B",
   8163   "llvm.hexagon.V6.vdealb",
   8164   "llvm.hexagon.V6.vdealb.128B",
   8165   "llvm.hexagon.V6.vdealb4w",
   8166   "llvm.hexagon.V6.vdealb4w.128B",
   8167   "llvm.hexagon.V6.vdealh",
   8168   "llvm.hexagon.V6.vdealh.128B",
   8169   "llvm.hexagon.V6.vdealvdd",
   8170   "llvm.hexagon.V6.vdealvdd.128B",
   8171   "llvm.hexagon.V6.vdelta",
   8172   "llvm.hexagon.V6.vdelta.128B",
   8173   "llvm.hexagon.V6.vdmpybus",
   8174   "llvm.hexagon.V6.vdmpybus.128B",
   8175   "llvm.hexagon.V6.vdmpybus.acc",
   8176   "llvm.hexagon.V6.vdmpybus.acc.128B",
   8177   "llvm.hexagon.V6.vdmpybus.dv",
   8178   "llvm.hexagon.V6.vdmpybus.dv.128B",
   8179   "llvm.hexagon.V6.vdmpybus.dv.acc",
   8180   "llvm.hexagon.V6.vdmpybus.dv.acc.128B",
   8181   "llvm.hexagon.V6.vdmpyhb",
   8182   "llvm.hexagon.V6.vdmpyhb.128B",
   8183   "llvm.hexagon.V6.vdmpyhb.acc",
   8184   "llvm.hexagon.V6.vdmpyhb.acc.128B",
   8185   "llvm.hexagon.V6.vdmpyhb.dv",
   8186   "llvm.hexagon.V6.vdmpyhb.dv.128B",
   8187   "llvm.hexagon.V6.vdmpyhb.dv.acc",
   8188   "llvm.hexagon.V6.vdmpyhb.dv.acc.128B",
   8189   "llvm.hexagon.V6.vdmpyhisat",
   8190   "llvm.hexagon.V6.vdmpyhisat.128B",
   8191   "llvm.hexagon.V6.vdmpyhisat.acc",
   8192   "llvm.hexagon.V6.vdmpyhisat.acc.128B",
   8193   "llvm.hexagon.V6.vdmpyhsat",
   8194   "llvm.hexagon.V6.vdmpyhsat.128B",
   8195   "llvm.hexagon.V6.vdmpyhsat.acc",
   8196   "llvm.hexagon.V6.vdmpyhsat.acc.128B",
   8197   "llvm.hexagon.V6.vdmpyhsuisat",
   8198   "llvm.hexagon.V6.vdmpyhsuisat.128B",
   8199   "llvm.hexagon.V6.vdmpyhsuisat.acc",
   8200   "llvm.hexagon.V6.vdmpyhsuisat.acc.128B",
   8201   "llvm.hexagon.V6.vdmpyhsusat",
   8202   "llvm.hexagon.V6.vdmpyhsusat.128B",
   8203   "llvm.hexagon.V6.vdmpyhsusat.acc",
   8204   "llvm.hexagon.V6.vdmpyhsusat.acc.128B",
   8205   "llvm.hexagon.V6.vdmpyhvsat",
   8206   "llvm.hexagon.V6.vdmpyhvsat.128B",
   8207   "llvm.hexagon.V6.vdmpyhvsat.acc",
   8208   "llvm.hexagon.V6.vdmpyhvsat.acc.128B",
   8209   "llvm.hexagon.V6.vdsaduh",
   8210   "llvm.hexagon.V6.vdsaduh.128B",
   8211   "llvm.hexagon.V6.vdsaduh.acc",
   8212   "llvm.hexagon.V6.vdsaduh.acc.128B",
   8213   "llvm.hexagon.V6.veqb",
   8214   "llvm.hexagon.V6.veqb.128B",
   8215   "llvm.hexagon.V6.veqb.and",
   8216   "llvm.hexagon.V6.veqb.and.128B",
   8217   "llvm.hexagon.V6.veqb.or",
   8218   "llvm.hexagon.V6.veqb.or.128B",
   8219   "llvm.hexagon.V6.veqb.xor",
   8220   "llvm.hexagon.V6.veqb.xor.128B",
   8221   "llvm.hexagon.V6.veqh",
   8222   "llvm.hexagon.V6.veqh.128B",
   8223   "llvm.hexagon.V6.veqh.and",
   8224   "llvm.hexagon.V6.veqh.and.128B",
   8225   "llvm.hexagon.V6.veqh.or",
   8226   "llvm.hexagon.V6.veqh.or.128B",
   8227   "llvm.hexagon.V6.veqh.xor",
   8228   "llvm.hexagon.V6.veqh.xor.128B",
   8229   "llvm.hexagon.V6.veqw",
   8230   "llvm.hexagon.V6.veqw.128B",
   8231   "llvm.hexagon.V6.veqw.and",
   8232   "llvm.hexagon.V6.veqw.and.128B",
   8233   "llvm.hexagon.V6.veqw.or",
   8234   "llvm.hexagon.V6.veqw.or.128B",
   8235   "llvm.hexagon.V6.veqw.xor",
   8236   "llvm.hexagon.V6.veqw.xor.128B",
   8237   "llvm.hexagon.V6.vgtb",
   8238   "llvm.hexagon.V6.vgtb.128B",
   8239   "llvm.hexagon.V6.vgtb.and",
   8240   "llvm.hexagon.V6.vgtb.and.128B",
   8241   "llvm.hexagon.V6.vgtb.or",
   8242   "llvm.hexagon.V6.vgtb.or.128B",
   8243   "llvm.hexagon.V6.vgtb.xor",
   8244   "llvm.hexagon.V6.vgtb.xor.128B",
   8245   "llvm.hexagon.V6.vgth",
   8246   "llvm.hexagon.V6.vgth.128B",
   8247   "llvm.hexagon.V6.vgth.and",
   8248   "llvm.hexagon.V6.vgth.and.128B",
   8249   "llvm.hexagon.V6.vgth.or",
   8250   "llvm.hexagon.V6.vgth.or.128B",
   8251   "llvm.hexagon.V6.vgth.xor",
   8252   "llvm.hexagon.V6.vgth.xor.128B",
   8253   "llvm.hexagon.V6.vgtub",
   8254   "llvm.hexagon.V6.vgtub.128B",
   8255   "llvm.hexagon.V6.vgtub.and",
   8256   "llvm.hexagon.V6.vgtub.and.128B",
   8257   "llvm.hexagon.V6.vgtub.or",
   8258   "llvm.hexagon.V6.vgtub.or.128B",
   8259   "llvm.hexagon.V6.vgtub.xor",
   8260   "llvm.hexagon.V6.vgtub.xor.128B",
   8261   "llvm.hexagon.V6.vgtuh",
   8262   "llvm.hexagon.V6.vgtuh.128B",
   8263   "llvm.hexagon.V6.vgtuh.and",
   8264   "llvm.hexagon.V6.vgtuh.and.128B",
   8265   "llvm.hexagon.V6.vgtuh.or",
   8266   "llvm.hexagon.V6.vgtuh.or.128B",
   8267   "llvm.hexagon.V6.vgtuh.xor",
   8268   "llvm.hexagon.V6.vgtuh.xor.128B",
   8269   "llvm.hexagon.V6.vgtuw",
   8270   "llvm.hexagon.V6.vgtuw.128B",
   8271   "llvm.hexagon.V6.vgtuw.and",
   8272   "llvm.hexagon.V6.vgtuw.and.128B",
   8273   "llvm.hexagon.V6.vgtuw.or",
   8274   "llvm.hexagon.V6.vgtuw.or.128B",
   8275   "llvm.hexagon.V6.vgtuw.xor",
   8276   "llvm.hexagon.V6.vgtuw.xor.128B",
   8277   "llvm.hexagon.V6.vgtw",
   8278   "llvm.hexagon.V6.vgtw.128B",
   8279   "llvm.hexagon.V6.vgtw.and",
   8280   "llvm.hexagon.V6.vgtw.and.128B",
   8281   "llvm.hexagon.V6.vgtw.or",
   8282   "llvm.hexagon.V6.vgtw.or.128B",
   8283   "llvm.hexagon.V6.vgtw.xor",
   8284   "llvm.hexagon.V6.vgtw.xor.128B",
   8285   "llvm.hexagon.V6.vinsertwr",
   8286   "llvm.hexagon.V6.vinsertwr.128B",
   8287   "llvm.hexagon.V6.vlalignb",
   8288   "llvm.hexagon.V6.vlalignb.128B",
   8289   "llvm.hexagon.V6.vlalignbi",
   8290   "llvm.hexagon.V6.vlalignbi.128B",
   8291   "llvm.hexagon.V6.vlsrb",
   8292   "llvm.hexagon.V6.vlsrb.128B",
   8293   "llvm.hexagon.V6.vlsrh",
   8294   "llvm.hexagon.V6.vlsrh.128B",
   8295   "llvm.hexagon.V6.vlsrhv",
   8296   "llvm.hexagon.V6.vlsrhv.128B",
   8297   "llvm.hexagon.V6.vlsrw",
   8298   "llvm.hexagon.V6.vlsrw.128B",
   8299   "llvm.hexagon.V6.vlsrwv",
   8300   "llvm.hexagon.V6.vlsrwv.128B",
   8301   "llvm.hexagon.V6.vlutb",
   8302   "llvm.hexagon.V6.vlutb.128B",
   8303   "llvm.hexagon.V6.vlutb.acc",
   8304   "llvm.hexagon.V6.vlutb.acc.128B",
   8305   "llvm.hexagon.V6.vlutb.dv",
   8306   "llvm.hexagon.V6.vlutb.dv.128B",
   8307   "llvm.hexagon.V6.vlutb.dv.acc",
   8308   "llvm.hexagon.V6.vlutb.dv.acc.128B",
   8309   "llvm.hexagon.V6.vlutvvb",
   8310   "llvm.hexagon.V6.vlutvvb.128B",
   8311   "llvm.hexagon.V6.vlutvvb.nm",
   8312   "llvm.hexagon.V6.vlutvvb.nm.128B",
   8313   "llvm.hexagon.V6.vlutvvb.oracc",
   8314   "llvm.hexagon.V6.vlutvvb.oracc.128B",
   8315   "llvm.hexagon.V6.vlutvvb.oracci",
   8316   "llvm.hexagon.V6.vlutvvb.oracci.128B",
   8317   "llvm.hexagon.V6.vlutvvbi",
   8318   "llvm.hexagon.V6.vlutvvbi.128B",
   8319   "llvm.hexagon.V6.vlutvwh",
   8320   "llvm.hexagon.V6.vlutvwh.128B",
   8321   "llvm.hexagon.V6.vlutvwh.nm",
   8322   "llvm.hexagon.V6.vlutvwh.nm.128B",
   8323   "llvm.hexagon.V6.vlutvwh.oracc",
   8324   "llvm.hexagon.V6.vlutvwh.oracc.128B",
   8325   "llvm.hexagon.V6.vlutvwh.oracci",
   8326   "llvm.hexagon.V6.vlutvwh.oracci.128B",
   8327   "llvm.hexagon.V6.vlutvwhi",
   8328   "llvm.hexagon.V6.vlutvwhi.128B",
   8329   "llvm.hexagon.V6.vmaskedstorenq",
   8330   "llvm.hexagon.V6.vmaskedstorenq.128B",
   8331   "llvm.hexagon.V6.vmaskedstorentnq",
   8332   "llvm.hexagon.V6.vmaskedstorentnq.128B",
   8333   "llvm.hexagon.V6.vmaskedstorentq",
   8334   "llvm.hexagon.V6.vmaskedstorentq.128B",
   8335   "llvm.hexagon.V6.vmaskedstoreq",
   8336   "llvm.hexagon.V6.vmaskedstoreq.128B",
   8337   "llvm.hexagon.V6.vmaxb",
   8338   "llvm.hexagon.V6.vmaxb.128B",
   8339   "llvm.hexagon.V6.vmaxh",
   8340   "llvm.hexagon.V6.vmaxh.128B",
   8341   "llvm.hexagon.V6.vmaxub",
   8342   "llvm.hexagon.V6.vmaxub.128B",
   8343   "llvm.hexagon.V6.vmaxuh",
   8344   "llvm.hexagon.V6.vmaxuh.128B",
   8345   "llvm.hexagon.V6.vmaxw",
   8346   "llvm.hexagon.V6.vmaxw.128B",
   8347   "llvm.hexagon.V6.vminb",
   8348   "llvm.hexagon.V6.vminb.128B",
   8349   "llvm.hexagon.V6.vminh",
   8350   "llvm.hexagon.V6.vminh.128B",
   8351   "llvm.hexagon.V6.vminub",
   8352   "llvm.hexagon.V6.vminub.128B",
   8353   "llvm.hexagon.V6.vminuh",
   8354   "llvm.hexagon.V6.vminuh.128B",
   8355   "llvm.hexagon.V6.vminw",
   8356   "llvm.hexagon.V6.vminw.128B",
   8357   "llvm.hexagon.V6.vmpabus",
   8358   "llvm.hexagon.V6.vmpabus.128B",
   8359   "llvm.hexagon.V6.vmpabus.acc",
   8360   "llvm.hexagon.V6.vmpabus.acc.128B",
   8361   "llvm.hexagon.V6.vmpabusv",
   8362   "llvm.hexagon.V6.vmpabusv.128B",
   8363   "llvm.hexagon.V6.vmpabuuv",
   8364   "llvm.hexagon.V6.vmpabuuv.128B",
   8365   "llvm.hexagon.V6.vmpahb",
   8366   "llvm.hexagon.V6.vmpahb.128B",
   8367   "llvm.hexagon.V6.vmpahb.acc",
   8368   "llvm.hexagon.V6.vmpahb.acc.128B",
   8369   "llvm.hexagon.V6.vmpauhb",
   8370   "llvm.hexagon.V6.vmpauhb.128B",
   8371   "llvm.hexagon.V6.vmpauhb.acc",
   8372   "llvm.hexagon.V6.vmpauhb.acc.128B",
   8373   "llvm.hexagon.V6.vmpybus",
   8374   "llvm.hexagon.V6.vmpybus.128B",
   8375   "llvm.hexagon.V6.vmpybus.acc",
   8376   "llvm.hexagon.V6.vmpybus.acc.128B",
   8377   "llvm.hexagon.V6.vmpybusv",
   8378   "llvm.hexagon.V6.vmpybusv.128B",
   8379   "llvm.hexagon.V6.vmpybusv.acc",
   8380   "llvm.hexagon.V6.vmpybusv.acc.128B",
   8381   "llvm.hexagon.V6.vmpybv",
   8382   "llvm.hexagon.V6.vmpybv.128B",
   8383   "llvm.hexagon.V6.vmpybv.acc",
   8384   "llvm.hexagon.V6.vmpybv.acc.128B",
   8385   "llvm.hexagon.V6.vmpyewuh",
   8386   "llvm.hexagon.V6.vmpyewuh.128B",
   8387   "llvm.hexagon.V6.vmpyewuh.64",
   8388   "llvm.hexagon.V6.vmpyewuh.64.128B",
   8389   "llvm.hexagon.V6.vmpyh",
   8390   "llvm.hexagon.V6.vmpyh.128B",
   8391   "llvm.hexagon.V6.vmpyhsat.acc",
   8392   "llvm.hexagon.V6.vmpyhsat.acc.128B",
   8393   "llvm.hexagon.V6.vmpyhsrs",
   8394   "llvm.hexagon.V6.vmpyhsrs.128B",
   8395   "llvm.hexagon.V6.vmpyhss",
   8396   "llvm.hexagon.V6.vmpyhss.128B",
   8397   "llvm.hexagon.V6.vmpyhus",
   8398   "llvm.hexagon.V6.vmpyhus.128B",
   8399   "llvm.hexagon.V6.vmpyhus.acc",
   8400   "llvm.hexagon.V6.vmpyhus.acc.128B",
   8401   "llvm.hexagon.V6.vmpyhv",
   8402   "llvm.hexagon.V6.vmpyhv.128B",
   8403   "llvm.hexagon.V6.vmpyhv.acc",
   8404   "llvm.hexagon.V6.vmpyhv.acc.128B",
   8405   "llvm.hexagon.V6.vmpyhvsrs",
   8406   "llvm.hexagon.V6.vmpyhvsrs.128B",
   8407   "llvm.hexagon.V6.vmpyieoh",
   8408   "llvm.hexagon.V6.vmpyieoh.128B",
   8409   "llvm.hexagon.V6.vmpyiewh.acc",
   8410   "llvm.hexagon.V6.vmpyiewh.acc.128B",
   8411   "llvm.hexagon.V6.vmpyiewuh",
   8412   "llvm.hexagon.V6.vmpyiewuh.128B",
   8413   "llvm.hexagon.V6.vmpyiewuh.acc",
   8414   "llvm.hexagon.V6.vmpyiewuh.acc.128B",
   8415   "llvm.hexagon.V6.vmpyih",
   8416   "llvm.hexagon.V6.vmpyih.128B",
   8417   "llvm.hexagon.V6.vmpyih.acc",
   8418   "llvm.hexagon.V6.vmpyih.acc.128B",
   8419   "llvm.hexagon.V6.vmpyihb",
   8420   "llvm.hexagon.V6.vmpyihb.128B",
   8421   "llvm.hexagon.V6.vmpyihb.acc",
   8422   "llvm.hexagon.V6.vmpyihb.acc.128B",
   8423   "llvm.hexagon.V6.vmpyiowh",
   8424   "llvm.hexagon.V6.vmpyiowh.128B",
   8425   "llvm.hexagon.V6.vmpyiwb",
   8426   "llvm.hexagon.V6.vmpyiwb.128B",
   8427   "llvm.hexagon.V6.vmpyiwb.acc",
   8428   "llvm.hexagon.V6.vmpyiwb.acc.128B",
   8429   "llvm.hexagon.V6.vmpyiwh",
   8430   "llvm.hexagon.V6.vmpyiwh.128B",
   8431   "llvm.hexagon.V6.vmpyiwh.acc",
   8432   "llvm.hexagon.V6.vmpyiwh.acc.128B",
   8433   "llvm.hexagon.V6.vmpyiwub",
   8434   "llvm.hexagon.V6.vmpyiwub.128B",
   8435   "llvm.hexagon.V6.vmpyiwub.acc",
   8436   "llvm.hexagon.V6.vmpyiwub.acc.128B",
   8437   "llvm.hexagon.V6.vmpyowh",
   8438   "llvm.hexagon.V6.vmpyowh.128B",
   8439   "llvm.hexagon.V6.vmpyowh.64.acc",
   8440   "llvm.hexagon.V6.vmpyowh.64.acc.128B",
   8441   "llvm.hexagon.V6.vmpyowh.rnd",
   8442   "llvm.hexagon.V6.vmpyowh.rnd.128B",
   8443   "llvm.hexagon.V6.vmpyowh.rnd.sacc",
   8444   "llvm.hexagon.V6.vmpyowh.rnd.sacc.128B",
   8445   "llvm.hexagon.V6.vmpyowh.sacc",
   8446   "llvm.hexagon.V6.vmpyowh.sacc.128B",
   8447   "llvm.hexagon.V6.vmpyub",
   8448   "llvm.hexagon.V6.vmpyub.128B",
   8449   "llvm.hexagon.V6.vmpyub.acc",
   8450   "llvm.hexagon.V6.vmpyub.acc.128B",
   8451   "llvm.hexagon.V6.vmpyubv",
   8452   "llvm.hexagon.V6.vmpyubv.128B",
   8453   "llvm.hexagon.V6.vmpyubv.acc",
   8454   "llvm.hexagon.V6.vmpyubv.acc.128B",
   8455   "llvm.hexagon.V6.vmpyuh",
   8456   "llvm.hexagon.V6.vmpyuh.128B",
   8457   "llvm.hexagon.V6.vmpyuh.acc",
   8458   "llvm.hexagon.V6.vmpyuh.acc.128B",
   8459   "llvm.hexagon.V6.vmpyuhv",
   8460   "llvm.hexagon.V6.vmpyuhv.128B",
   8461   "llvm.hexagon.V6.vmpyuhv.acc",
   8462   "llvm.hexagon.V6.vmpyuhv.acc.128B",
   8463   "llvm.hexagon.V6.vmux",
   8464   "llvm.hexagon.V6.vmux.128B",
   8465   "llvm.hexagon.V6.vnavgh",
   8466   "llvm.hexagon.V6.vnavgh.128B",
   8467   "llvm.hexagon.V6.vnavgub",
   8468   "llvm.hexagon.V6.vnavgub.128B",
   8469   "llvm.hexagon.V6.vnavgw",
   8470   "llvm.hexagon.V6.vnavgw.128B",
   8471   "llvm.hexagon.V6.vnormamth",
   8472   "llvm.hexagon.V6.vnormamth.128B",
   8473   "llvm.hexagon.V6.vnormamtw",
   8474   "llvm.hexagon.V6.vnormamtw.128B",
   8475   "llvm.hexagon.V6.vnot",
   8476   "llvm.hexagon.V6.vnot.128B",
   8477   "llvm.hexagon.V6.vor",
   8478   "llvm.hexagon.V6.vor.128B",
   8479   "llvm.hexagon.V6.vpackeb",
   8480   "llvm.hexagon.V6.vpackeb.128B",
   8481   "llvm.hexagon.V6.vpackeh",
   8482   "llvm.hexagon.V6.vpackeh.128B",
   8483   "llvm.hexagon.V6.vpackhb.sat",
   8484   "llvm.hexagon.V6.vpackhb.sat.128B",
   8485   "llvm.hexagon.V6.vpackhub.sat",
   8486   "llvm.hexagon.V6.vpackhub.sat.128B",
   8487   "llvm.hexagon.V6.vpackob",
   8488   "llvm.hexagon.V6.vpackob.128B",
   8489   "llvm.hexagon.V6.vpackoh",
   8490   "llvm.hexagon.V6.vpackoh.128B",
   8491   "llvm.hexagon.V6.vpackwh.sat",
   8492   "llvm.hexagon.V6.vpackwh.sat.128B",
   8493   "llvm.hexagon.V6.vpackwuh.sat",
   8494   "llvm.hexagon.V6.vpackwuh.sat.128B",
   8495   "llvm.hexagon.V6.vpopcounth",
   8496   "llvm.hexagon.V6.vpopcounth.128B",
   8497   "llvm.hexagon.V6.vrdelta",
   8498   "llvm.hexagon.V6.vrdelta.128B",
   8499   "llvm.hexagon.V6.vrmpybus",
   8500   "llvm.hexagon.V6.vrmpybus.128B",
   8501   "llvm.hexagon.V6.vrmpybus.acc",
   8502   "llvm.hexagon.V6.vrmpybus.acc.128B",
   8503   "llvm.hexagon.V6.vrmpybusi",
   8504   "llvm.hexagon.V6.vrmpybusi.128B",
   8505   "llvm.hexagon.V6.vrmpybusi.acc",
   8506   "llvm.hexagon.V6.vrmpybusi.acc.128B",
   8507   "llvm.hexagon.V6.vrmpybusv",
   8508   "llvm.hexagon.V6.vrmpybusv.128B",
   8509   "llvm.hexagon.V6.vrmpybusv.acc",
   8510   "llvm.hexagon.V6.vrmpybusv.acc.128B",
   8511   "llvm.hexagon.V6.vrmpybv",
   8512   "llvm.hexagon.V6.vrmpybv.128B",
   8513   "llvm.hexagon.V6.vrmpybv.acc",
   8514   "llvm.hexagon.V6.vrmpybv.acc.128B",
   8515   "llvm.hexagon.V6.vrmpyub",
   8516   "llvm.hexagon.V6.vrmpyub.128B",
   8517   "llvm.hexagon.V6.vrmpyub.acc",
   8518   "llvm.hexagon.V6.vrmpyub.acc.128B",
   8519   "llvm.hexagon.V6.vrmpyubi",
   8520   "llvm.hexagon.V6.vrmpyubi.128B",
   8521   "llvm.hexagon.V6.vrmpyubi.acc",
   8522   "llvm.hexagon.V6.vrmpyubi.acc.128B",
   8523   "llvm.hexagon.V6.vrmpyubv",
   8524   "llvm.hexagon.V6.vrmpyubv.128B",
   8525   "llvm.hexagon.V6.vrmpyubv.acc",
   8526   "llvm.hexagon.V6.vrmpyubv.acc.128B",
   8527   "llvm.hexagon.V6.vror",
   8528   "llvm.hexagon.V6.vror.128B",
   8529   "llvm.hexagon.V6.vroundhb",
   8530   "llvm.hexagon.V6.vroundhb.128B",
   8531   "llvm.hexagon.V6.vroundhub",
   8532   "llvm.hexagon.V6.vroundhub.128B",
   8533   "llvm.hexagon.V6.vrounduhub",
   8534   "llvm.hexagon.V6.vrounduhub.128B",
   8535   "llvm.hexagon.V6.vrounduwuh",
   8536   "llvm.hexagon.V6.vrounduwuh.128B",
   8537   "llvm.hexagon.V6.vroundwh",
   8538   "llvm.hexagon.V6.vroundwh.128B",
   8539   "llvm.hexagon.V6.vroundwuh",
   8540   "llvm.hexagon.V6.vroundwuh.128B",
   8541   "llvm.hexagon.V6.vrsadubi",
   8542   "llvm.hexagon.V6.vrsadubi.128B",
   8543   "llvm.hexagon.V6.vrsadubi.acc",
   8544   "llvm.hexagon.V6.vrsadubi.acc.128B",
   8545   "llvm.hexagon.V6.vsathub",
   8546   "llvm.hexagon.V6.vsathub.128B",
   8547   "llvm.hexagon.V6.vsatuwuh",
   8548   "llvm.hexagon.V6.vsatuwuh.128B",
   8549   "llvm.hexagon.V6.vsatwh",
   8550   "llvm.hexagon.V6.vsatwh.128B",
   8551   "llvm.hexagon.V6.vsb",
   8552   "llvm.hexagon.V6.vsb.128B",
   8553   "llvm.hexagon.V6.vsh",
   8554   "llvm.hexagon.V6.vsh.128B",
   8555   "llvm.hexagon.V6.vshufeh",
   8556   "llvm.hexagon.V6.vshufeh.128B",
   8557   "llvm.hexagon.V6.vshuffb",
   8558   "llvm.hexagon.V6.vshuffb.128B",
   8559   "llvm.hexagon.V6.vshuffeb",
   8560   "llvm.hexagon.V6.vshuffeb.128B",
   8561   "llvm.hexagon.V6.vshuffh",
   8562   "llvm.hexagon.V6.vshuffh.128B",
   8563   "llvm.hexagon.V6.vshuffob",
   8564   "llvm.hexagon.V6.vshuffob.128B",
   8565   "llvm.hexagon.V6.vshuffvdd",
   8566   "llvm.hexagon.V6.vshuffvdd.128B",
   8567   "llvm.hexagon.V6.vshufoeb",
   8568   "llvm.hexagon.V6.vshufoeb.128B",
   8569   "llvm.hexagon.V6.vshufoeh",
   8570   "llvm.hexagon.V6.vshufoeh.128B",
   8571   "llvm.hexagon.V6.vshufoh",
   8572   "llvm.hexagon.V6.vshufoh.128B",
   8573   "llvm.hexagon.V6.vsubb",
   8574   "llvm.hexagon.V6.vsubb.128B",
   8575   "llvm.hexagon.V6.vsubb.dv",
   8576   "llvm.hexagon.V6.vsubb.dv.128B",
   8577   "llvm.hexagon.V6.vsubbnq",
   8578   "llvm.hexagon.V6.vsubbnq.128B",
   8579   "llvm.hexagon.V6.vsubbq",
   8580   "llvm.hexagon.V6.vsubbq.128B",
   8581   "llvm.hexagon.V6.vsubbsat",
   8582   "llvm.hexagon.V6.vsubbsat.128B",
   8583   "llvm.hexagon.V6.vsubbsat.dv",
   8584   "llvm.hexagon.V6.vsubbsat.dv.128B",
   8585   "llvm.hexagon.V6.vsubh",
   8586   "llvm.hexagon.V6.vsubh.128B",
   8587   "llvm.hexagon.V6.vsubh.dv",
   8588   "llvm.hexagon.V6.vsubh.dv.128B",
   8589   "llvm.hexagon.V6.vsubhnq",
   8590   "llvm.hexagon.V6.vsubhnq.128B",
   8591   "llvm.hexagon.V6.vsubhq",
   8592   "llvm.hexagon.V6.vsubhq.128B",
   8593   "llvm.hexagon.V6.vsubhsat",
   8594   "llvm.hexagon.V6.vsubhsat.128B",
   8595   "llvm.hexagon.V6.vsubhsat.dv",
   8596   "llvm.hexagon.V6.vsubhsat.dv.128B",
   8597   "llvm.hexagon.V6.vsubhw",
   8598   "llvm.hexagon.V6.vsubhw.128B",
   8599   "llvm.hexagon.V6.vsububh",
   8600   "llvm.hexagon.V6.vsububh.128B",
   8601   "llvm.hexagon.V6.vsububsat",
   8602   "llvm.hexagon.V6.vsububsat.128B",
   8603   "llvm.hexagon.V6.vsububsat.dv",
   8604   "llvm.hexagon.V6.vsububsat.dv.128B",
   8605   "llvm.hexagon.V6.vsubububb.sat",
   8606   "llvm.hexagon.V6.vsubububb.sat.128B",
   8607   "llvm.hexagon.V6.vsubuhsat",
   8608   "llvm.hexagon.V6.vsubuhsat.128B",
   8609   "llvm.hexagon.V6.vsubuhsat.dv",
   8610   "llvm.hexagon.V6.vsubuhsat.dv.128B",
   8611   "llvm.hexagon.V6.vsubuhw",
   8612   "llvm.hexagon.V6.vsubuhw.128B",
   8613   "llvm.hexagon.V6.vsubuwsat",
   8614   "llvm.hexagon.V6.vsubuwsat.128B",
   8615   "llvm.hexagon.V6.vsubuwsat.dv",
   8616   "llvm.hexagon.V6.vsubuwsat.dv.128B",
   8617   "llvm.hexagon.V6.vsubw",
   8618   "llvm.hexagon.V6.vsubw.128B",
   8619   "llvm.hexagon.V6.vsubw.dv",
   8620   "llvm.hexagon.V6.vsubw.dv.128B",
   8621   "llvm.hexagon.V6.vsubwnq",
   8622   "llvm.hexagon.V6.vsubwnq.128B",
   8623   "llvm.hexagon.V6.vsubwq",
   8624   "llvm.hexagon.V6.vsubwq.128B",
   8625   "llvm.hexagon.V6.vsubwsat",
   8626   "llvm.hexagon.V6.vsubwsat.128B",
   8627   "llvm.hexagon.V6.vsubwsat.dv",
   8628   "llvm.hexagon.V6.vsubwsat.dv.128B",
   8629   "llvm.hexagon.V6.vswap",
   8630   "llvm.hexagon.V6.vswap.128B",
   8631   "llvm.hexagon.V6.vtmpyb",
   8632   "llvm.hexagon.V6.vtmpyb.128B",
   8633   "llvm.hexagon.V6.vtmpyb.acc",
   8634   "llvm.hexagon.V6.vtmpyb.acc.128B",
   8635   "llvm.hexagon.V6.vtmpybus",
   8636   "llvm.hexagon.V6.vtmpybus.128B",
   8637   "llvm.hexagon.V6.vtmpybus.acc",
   8638   "llvm.hexagon.V6.vtmpybus.acc.128B",
   8639   "llvm.hexagon.V6.vtmpyhb",
   8640   "llvm.hexagon.V6.vtmpyhb.128B",
   8641   "llvm.hexagon.V6.vtmpyhb.acc",
   8642   "llvm.hexagon.V6.vtmpyhb.acc.128B",
   8643   "llvm.hexagon.V6.vunpackb",
   8644   "llvm.hexagon.V6.vunpackb.128B",
   8645   "llvm.hexagon.V6.vunpackh",
   8646   "llvm.hexagon.V6.vunpackh.128B",
   8647   "llvm.hexagon.V6.vunpackob",
   8648   "llvm.hexagon.V6.vunpackob.128B",
   8649   "llvm.hexagon.V6.vunpackoh",
   8650   "llvm.hexagon.V6.vunpackoh.128B",
   8651   "llvm.hexagon.V6.vunpackub",
   8652   "llvm.hexagon.V6.vunpackub.128B",
   8653   "llvm.hexagon.V6.vunpackuh",
   8654   "llvm.hexagon.V6.vunpackuh.128B",
   8655   "llvm.hexagon.V6.vxor",
   8656   "llvm.hexagon.V6.vxor.128B",
   8657   "llvm.hexagon.V6.vzb",
   8658   "llvm.hexagon.V6.vzb.128B",
   8659   "llvm.hexagon.V6.vzh",
   8660   "llvm.hexagon.V6.vzh.128B",
   8661   "llvm.hexagon.Y2.dccleana",
   8662   "llvm.hexagon.Y2.dccleaninva",
   8663   "llvm.hexagon.Y2.dcinva",
   8664   "llvm.hexagon.Y2.dczeroa",
   8665   "llvm.hexagon.Y4.l2fetch",
   8666   "llvm.hexagon.Y5.l2fetch",
   8667   "llvm.hexagon.brev.ldb",
   8668   "llvm.hexagon.brev.ldd",
   8669   "llvm.hexagon.brev.ldh",
   8670   "llvm.hexagon.brev.ldub",
   8671   "llvm.hexagon.brev.lduh",
   8672   "llvm.hexagon.brev.ldw",
   8673   "llvm.hexagon.brev.stb",
   8674   "llvm.hexagon.brev.std",
   8675   "llvm.hexagon.brev.sth",
   8676   "llvm.hexagon.brev.sthhi",
   8677   "llvm.hexagon.brev.stw",
   8678   "llvm.hexagon.circ.ldb",
   8679   "llvm.hexagon.circ.ldd",
   8680   "llvm.hexagon.circ.ldh",
   8681   "llvm.hexagon.circ.ldub",
   8682   "llvm.hexagon.circ.lduh",
   8683   "llvm.hexagon.circ.ldw",
   8684   "llvm.hexagon.circ.stb",
   8685   "llvm.hexagon.circ.std",
   8686   "llvm.hexagon.circ.sth",
   8687   "llvm.hexagon.circ.sthhi",
   8688   "llvm.hexagon.circ.stw",
   8689   "llvm.hexagon.mm256i.vaddw",
   8690   "llvm.hexagon.prefetch",
   8691   "llvm.mips.absq.s.ph",
   8692   "llvm.mips.absq.s.qb",
   8693   "llvm.mips.absq.s.w",
   8694   "llvm.mips.add.a.b",
   8695   "llvm.mips.add.a.d",
   8696   "llvm.mips.add.a.h",
   8697   "llvm.mips.add.a.w",
   8698   "llvm.mips.addq.ph",
   8699   "llvm.mips.addq.s.ph",
   8700   "llvm.mips.addq.s.w",
   8701   "llvm.mips.addqh.ph",
   8702   "llvm.mips.addqh.r.ph",
   8703   "llvm.mips.addqh.r.w",
   8704   "llvm.mips.addqh.w",
   8705   "llvm.mips.adds.a.b",
   8706   "llvm.mips.adds.a.d",
   8707   "llvm.mips.adds.a.h",
   8708   "llvm.mips.adds.a.w",
   8709   "llvm.mips.adds.s.b",
   8710   "llvm.mips.adds.s.d",
   8711   "llvm.mips.adds.s.h",
   8712   "llvm.mips.adds.s.w",
   8713   "llvm.mips.adds.u.b",
   8714   "llvm.mips.adds.u.d",
   8715   "llvm.mips.adds.u.h",
   8716   "llvm.mips.adds.u.w",
   8717   "llvm.mips.addsc",
   8718   "llvm.mips.addu.ph",
   8719   "llvm.mips.addu.qb",
   8720   "llvm.mips.addu.s.ph",
   8721   "llvm.mips.addu.s.qb",
   8722   "llvm.mips.adduh.qb",
   8723   "llvm.mips.adduh.r.qb",
   8724   "llvm.mips.addv.b",
   8725   "llvm.mips.addv.d",
   8726   "llvm.mips.addv.h",
   8727   "llvm.mips.addv.w",
   8728   "llvm.mips.addvi.b",
   8729   "llvm.mips.addvi.d",
   8730   "llvm.mips.addvi.h",
   8731   "llvm.mips.addvi.w",
   8732   "llvm.mips.addwc",
   8733   "llvm.mips.and.v",
   8734   "llvm.mips.andi.b",
   8735   "llvm.mips.append",
   8736   "llvm.mips.asub.s.b",
   8737   "llvm.mips.asub.s.d",
   8738   "llvm.mips.asub.s.h",
   8739   "llvm.mips.asub.s.w",
   8740   "llvm.mips.asub.u.b",
   8741   "llvm.mips.asub.u.d",
   8742   "llvm.mips.asub.u.h",
   8743   "llvm.mips.asub.u.w",
   8744   "llvm.mips.ave.s.b",
   8745   "llvm.mips.ave.s.d",
   8746   "llvm.mips.ave.s.h",
   8747   "llvm.mips.ave.s.w",
   8748   "llvm.mips.ave.u.b",
   8749   "llvm.mips.ave.u.d",
   8750   "llvm.mips.ave.u.h",
   8751   "llvm.mips.ave.u.w",
   8752   "llvm.mips.aver.s.b",
   8753   "llvm.mips.aver.s.d",
   8754   "llvm.mips.aver.s.h",
   8755   "llvm.mips.aver.s.w",
   8756   "llvm.mips.aver.u.b",
   8757   "llvm.mips.aver.u.d",
   8758   "llvm.mips.aver.u.h",
   8759   "llvm.mips.aver.u.w",
   8760   "llvm.mips.balign",
   8761   "llvm.mips.bclr.b",
   8762   "llvm.mips.bclr.d",
   8763   "llvm.mips.bclr.h",
   8764   "llvm.mips.bclr.w",
   8765   "llvm.mips.bclri.b",
   8766   "llvm.mips.bclri.d",
   8767   "llvm.mips.bclri.h",
   8768   "llvm.mips.bclri.w",
   8769   "llvm.mips.binsl.b",
   8770   "llvm.mips.binsl.d",
   8771   "llvm.mips.binsl.h",
   8772   "llvm.mips.binsl.w",
   8773   "llvm.mips.binsli.b",
   8774   "llvm.mips.binsli.d",
   8775   "llvm.mips.binsli.h",
   8776   "llvm.mips.binsli.w",
   8777   "llvm.mips.binsr.b",
   8778   "llvm.mips.binsr.d",
   8779   "llvm.mips.binsr.h",
   8780   "llvm.mips.binsr.w",
   8781   "llvm.mips.binsri.b",
   8782   "llvm.mips.binsri.d",
   8783   "llvm.mips.binsri.h",
   8784   "llvm.mips.binsri.w",
   8785   "llvm.mips.bitrev",
   8786   "llvm.mips.bmnz.v",
   8787   "llvm.mips.bmnzi.b",
   8788   "llvm.mips.bmz.v",
   8789   "llvm.mips.bmzi.b",
   8790   "llvm.mips.bneg.b",
   8791   "llvm.mips.bneg.d",
   8792   "llvm.mips.bneg.h",
   8793   "llvm.mips.bneg.w",
   8794   "llvm.mips.bnegi.b",
   8795   "llvm.mips.bnegi.d",
   8796   "llvm.mips.bnegi.h",
   8797   "llvm.mips.bnegi.w",
   8798   "llvm.mips.bnz.b",
   8799   "llvm.mips.bnz.d",
   8800   "llvm.mips.bnz.h",
   8801   "llvm.mips.bnz.v",
   8802   "llvm.mips.bnz.w",
   8803   "llvm.mips.bposge32",
   8804   "llvm.mips.bsel.v",
   8805   "llvm.mips.bseli.b",
   8806   "llvm.mips.bset.b",
   8807   "llvm.mips.bset.d",
   8808   "llvm.mips.bset.h",
   8809   "llvm.mips.bset.w",
   8810   "llvm.mips.bseti.b",
   8811   "llvm.mips.bseti.d",
   8812   "llvm.mips.bseti.h",
   8813   "llvm.mips.bseti.w",
   8814   "llvm.mips.bz.b",
   8815   "llvm.mips.bz.d",
   8816   "llvm.mips.bz.h",
   8817   "llvm.mips.bz.v",
   8818   "llvm.mips.bz.w",
   8819   "llvm.mips.ceq.b",
   8820   "llvm.mips.ceq.d",
   8821   "llvm.mips.ceq.h",
   8822   "llvm.mips.ceq.w",
   8823   "llvm.mips.ceqi.b",
   8824   "llvm.mips.ceqi.d",
   8825   "llvm.mips.ceqi.h",
   8826   "llvm.mips.ceqi.w",
   8827   "llvm.mips.cfcmsa",
   8828   "llvm.mips.cle.s.b",
   8829   "llvm.mips.cle.s.d",
   8830   "llvm.mips.cle.s.h",
   8831   "llvm.mips.cle.s.w",
   8832   "llvm.mips.cle.u.b",
   8833   "llvm.mips.cle.u.d",
   8834   "llvm.mips.cle.u.h",
   8835   "llvm.mips.cle.u.w",
   8836   "llvm.mips.clei.s.b",
   8837   "llvm.mips.clei.s.d",
   8838   "llvm.mips.clei.s.h",
   8839   "llvm.mips.clei.s.w",
   8840   "llvm.mips.clei.u.b",
   8841   "llvm.mips.clei.u.d",
   8842   "llvm.mips.clei.u.h",
   8843   "llvm.mips.clei.u.w",
   8844   "llvm.mips.clt.s.b",
   8845   "llvm.mips.clt.s.d",
   8846   "llvm.mips.clt.s.h",
   8847   "llvm.mips.clt.s.w",
   8848   "llvm.mips.clt.u.b",
   8849   "llvm.mips.clt.u.d",
   8850   "llvm.mips.clt.u.h",
   8851   "llvm.mips.clt.u.w",
   8852   "llvm.mips.clti.s.b",
   8853   "llvm.mips.clti.s.d",
   8854   "llvm.mips.clti.s.h",
   8855   "llvm.mips.clti.s.w",
   8856   "llvm.mips.clti.u.b",
   8857   "llvm.mips.clti.u.d",
   8858   "llvm.mips.clti.u.h",
   8859   "llvm.mips.clti.u.w",
   8860   "llvm.mips.cmp.eq.ph",
   8861   "llvm.mips.cmp.le.ph",
   8862   "llvm.mips.cmp.lt.ph",
   8863   "llvm.mips.cmpgdu.eq.qb",
   8864   "llvm.mips.cmpgdu.le.qb",
   8865   "llvm.mips.cmpgdu.lt.qb",
   8866   "llvm.mips.cmpgu.eq.qb",
   8867   "llvm.mips.cmpgu.le.qb",
   8868   "llvm.mips.cmpgu.lt.qb",
   8869   "llvm.mips.cmpu.eq.qb",
   8870   "llvm.mips.cmpu.le.qb",
   8871   "llvm.mips.cmpu.lt.qb",
   8872   "llvm.mips.copy.s.b",
   8873   "llvm.mips.copy.s.d",
   8874   "llvm.mips.copy.s.h",
   8875   "llvm.mips.copy.s.w",
   8876   "llvm.mips.copy.u.b",
   8877   "llvm.mips.copy.u.d",
   8878   "llvm.mips.copy.u.h",
   8879   "llvm.mips.copy.u.w",
   8880   "llvm.mips.ctcmsa",
   8881   "llvm.mips.div.s.b",
   8882   "llvm.mips.div.s.d",
   8883   "llvm.mips.div.s.h",
   8884   "llvm.mips.div.s.w",
   8885   "llvm.mips.div.u.b",
   8886   "llvm.mips.div.u.d",
   8887   "llvm.mips.div.u.h",
   8888   "llvm.mips.div.u.w",
   8889   "llvm.mips.dlsa",
   8890   "llvm.mips.dotp.s.d",
   8891   "llvm.mips.dotp.s.h",
   8892   "llvm.mips.dotp.s.w",
   8893   "llvm.mips.dotp.u.d",
   8894   "llvm.mips.dotp.u.h",
   8895   "llvm.mips.dotp.u.w",
   8896   "llvm.mips.dpa.w.ph",
   8897   "llvm.mips.dpadd.s.d",
   8898   "llvm.mips.dpadd.s.h",
   8899   "llvm.mips.dpadd.s.w",
   8900   "llvm.mips.dpadd.u.d",
   8901   "llvm.mips.dpadd.u.h",
   8902   "llvm.mips.dpadd.u.w",
   8903   "llvm.mips.dpaq.s.w.ph",
   8904   "llvm.mips.dpaq.sa.l.w",
   8905   "llvm.mips.dpaqx.s.w.ph",
   8906   "llvm.mips.dpaqx.sa.w.ph",
   8907   "llvm.mips.dpau.h.qbl",
   8908   "llvm.mips.dpau.h.qbr",
   8909   "llvm.mips.dpax.w.ph",
   8910   "llvm.mips.dps.w.ph",
   8911   "llvm.mips.dpsq.s.w.ph",
   8912   "llvm.mips.dpsq.sa.l.w",
   8913   "llvm.mips.dpsqx.s.w.ph",
   8914   "llvm.mips.dpsqx.sa.w.ph",
   8915   "llvm.mips.dpsu.h.qbl",
   8916   "llvm.mips.dpsu.h.qbr",
   8917   "llvm.mips.dpsub.s.d",
   8918   "llvm.mips.dpsub.s.h",
   8919   "llvm.mips.dpsub.s.w",
   8920   "llvm.mips.dpsub.u.d",
   8921   "llvm.mips.dpsub.u.h",
   8922   "llvm.mips.dpsub.u.w",
   8923   "llvm.mips.dpsx.w.ph",
   8924   "llvm.mips.extp",
   8925   "llvm.mips.extpdp",
   8926   "llvm.mips.extr.r.w",
   8927   "llvm.mips.extr.rs.w",
   8928   "llvm.mips.extr.s.h",
   8929   "llvm.mips.extr.w",
   8930   "llvm.mips.fadd.d",
   8931   "llvm.mips.fadd.w",
   8932   "llvm.mips.fcaf.d",
   8933   "llvm.mips.fcaf.w",
   8934   "llvm.mips.fceq.d",
   8935   "llvm.mips.fceq.w",
   8936   "llvm.mips.fclass.d",
   8937   "llvm.mips.fclass.w",
   8938   "llvm.mips.fcle.d",
   8939   "llvm.mips.fcle.w",
   8940   "llvm.mips.fclt.d",
   8941   "llvm.mips.fclt.w",
   8942   "llvm.mips.fcne.d",
   8943   "llvm.mips.fcne.w",
   8944   "llvm.mips.fcor.d",
   8945   "llvm.mips.fcor.w",
   8946   "llvm.mips.fcueq.d",
   8947   "llvm.mips.fcueq.w",
   8948   "llvm.mips.fcule.d",
   8949   "llvm.mips.fcule.w",
   8950   "llvm.mips.fcult.d",
   8951   "llvm.mips.fcult.w",
   8952   "llvm.mips.fcun.d",
   8953   "llvm.mips.fcun.w",
   8954   "llvm.mips.fcune.d",
   8955   "llvm.mips.fcune.w",
   8956   "llvm.mips.fdiv.d",
   8957   "llvm.mips.fdiv.w",
   8958   "llvm.mips.fexdo.h",
   8959   "llvm.mips.fexdo.w",
   8960   "llvm.mips.fexp2.d",
   8961   "llvm.mips.fexp2.w",
   8962   "llvm.mips.fexupl.d",
   8963   "llvm.mips.fexupl.w",
   8964   "llvm.mips.fexupr.d",
   8965   "llvm.mips.fexupr.w",
   8966   "llvm.mips.ffint.s.d",
   8967   "llvm.mips.ffint.s.w",
   8968   "llvm.mips.ffint.u.d",
   8969   "llvm.mips.ffint.u.w",
   8970   "llvm.mips.ffql.d",
   8971   "llvm.mips.ffql.w",
   8972   "llvm.mips.ffqr.d",
   8973   "llvm.mips.ffqr.w",
   8974   "llvm.mips.fill.b",
   8975   "llvm.mips.fill.d",
   8976   "llvm.mips.fill.h",
   8977   "llvm.mips.fill.w",
   8978   "llvm.mips.flog2.d",
   8979   "llvm.mips.flog2.w",
   8980   "llvm.mips.fmadd.d",
   8981   "llvm.mips.fmadd.w",
   8982   "llvm.mips.fmax.a.d",
   8983   "llvm.mips.fmax.a.w",
   8984   "llvm.mips.fmax.d",
   8985   "llvm.mips.fmax.w",
   8986   "llvm.mips.fmin.a.d",
   8987   "llvm.mips.fmin.a.w",
   8988   "llvm.mips.fmin.d",
   8989   "llvm.mips.fmin.w",
   8990   "llvm.mips.fmsub.d",
   8991   "llvm.mips.fmsub.w",
   8992   "llvm.mips.fmul.d",
   8993   "llvm.mips.fmul.w",
   8994   "llvm.mips.frcp.d",
   8995   "llvm.mips.frcp.w",
   8996   "llvm.mips.frint.d",
   8997   "llvm.mips.frint.w",
   8998   "llvm.mips.frsqrt.d",
   8999   "llvm.mips.frsqrt.w",
   9000   "llvm.mips.fsaf.d",
   9001   "llvm.mips.fsaf.w",
   9002   "llvm.mips.fseq.d",
   9003   "llvm.mips.fseq.w",
   9004   "llvm.mips.fsle.d",
   9005   "llvm.mips.fsle.w",
   9006   "llvm.mips.fslt.d",
   9007   "llvm.mips.fslt.w",
   9008   "llvm.mips.fsne.d",
   9009   "llvm.mips.fsne.w",
   9010   "llvm.mips.fsor.d",
   9011   "llvm.mips.fsor.w",
   9012   "llvm.mips.fsqrt.d",
   9013   "llvm.mips.fsqrt.w",
   9014   "llvm.mips.fsub.d",
   9015   "llvm.mips.fsub.w",
   9016   "llvm.mips.fsueq.d",
   9017   "llvm.mips.fsueq.w",
   9018   "llvm.mips.fsule.d",
   9019   "llvm.mips.fsule.w",
   9020   "llvm.mips.fsult.d",
   9021   "llvm.mips.fsult.w",
   9022   "llvm.mips.fsun.d",
   9023   "llvm.mips.fsun.w",
   9024   "llvm.mips.fsune.d",
   9025   "llvm.mips.fsune.w",
   9026   "llvm.mips.ftint.s.d",
   9027   "llvm.mips.ftint.s.w",
   9028   "llvm.mips.ftint.u.d",
   9029   "llvm.mips.ftint.u.w",
   9030   "llvm.mips.ftq.h",
   9031   "llvm.mips.ftq.w",
   9032   "llvm.mips.ftrunc.s.d",
   9033   "llvm.mips.ftrunc.s.w",
   9034   "llvm.mips.ftrunc.u.d",
   9035   "llvm.mips.ftrunc.u.w",
   9036   "llvm.mips.hadd.s.d",
   9037   "llvm.mips.hadd.s.h",
   9038   "llvm.mips.hadd.s.w",
   9039   "llvm.mips.hadd.u.d",
   9040   "llvm.mips.hadd.u.h",
   9041   "llvm.mips.hadd.u.w",
   9042   "llvm.mips.hsub.s.d",
   9043   "llvm.mips.hsub.s.h",
   9044   "llvm.mips.hsub.s.w",
   9045   "llvm.mips.hsub.u.d",
   9046   "llvm.mips.hsub.u.h",
   9047   "llvm.mips.hsub.u.w",
   9048   "llvm.mips.ilvev.b",
   9049   "llvm.mips.ilvev.d",
   9050   "llvm.mips.ilvev.h",
   9051   "llvm.mips.ilvev.w",
   9052   "llvm.mips.ilvl.b",
   9053   "llvm.mips.ilvl.d",
   9054   "llvm.mips.ilvl.h",
   9055   "llvm.mips.ilvl.w",
   9056   "llvm.mips.ilvod.b",
   9057   "llvm.mips.ilvod.d",
   9058   "llvm.mips.ilvod.h",
   9059   "llvm.mips.ilvod.w",
   9060   "llvm.mips.ilvr.b",
   9061   "llvm.mips.ilvr.d",
   9062   "llvm.mips.ilvr.h",
   9063   "llvm.mips.ilvr.w",
   9064   "llvm.mips.insert.b",
   9065   "llvm.mips.insert.d",
   9066   "llvm.mips.insert.h",
   9067   "llvm.mips.insert.w",
   9068   "llvm.mips.insv",
   9069   "llvm.mips.insve.b",
   9070   "llvm.mips.insve.d",
   9071   "llvm.mips.insve.h",
   9072   "llvm.mips.insve.w",
   9073   "llvm.mips.lbux",
   9074   "llvm.mips.ld.b",
   9075   "llvm.mips.ld.d",
   9076   "llvm.mips.ld.h",
   9077   "llvm.mips.ld.w",
   9078   "llvm.mips.ldi.b",
   9079   "llvm.mips.ldi.d",
   9080   "llvm.mips.ldi.h",
   9081   "llvm.mips.ldi.w",
   9082   "llvm.mips.lhx",
   9083   "llvm.mips.lsa",
   9084   "llvm.mips.lwx",
   9085   "llvm.mips.madd",
   9086   "llvm.mips.madd.q.h",
   9087   "llvm.mips.madd.q.w",
   9088   "llvm.mips.maddr.q.h",
   9089   "llvm.mips.maddr.q.w",
   9090   "llvm.mips.maddu",
   9091   "llvm.mips.maddv.b",
   9092   "llvm.mips.maddv.d",
   9093   "llvm.mips.maddv.h",
   9094   "llvm.mips.maddv.w",
   9095   "llvm.mips.maq.s.w.phl",
   9096   "llvm.mips.maq.s.w.phr",
   9097   "llvm.mips.maq.sa.w.phl",
   9098   "llvm.mips.maq.sa.w.phr",
   9099   "llvm.mips.max.a.b",
   9100   "llvm.mips.max.a.d",
   9101   "llvm.mips.max.a.h",
   9102   "llvm.mips.max.a.w",
   9103   "llvm.mips.max.s.b",
   9104   "llvm.mips.max.s.d",
   9105   "llvm.mips.max.s.h",
   9106   "llvm.mips.max.s.w",
   9107   "llvm.mips.max.u.b",
   9108   "llvm.mips.max.u.d",
   9109   "llvm.mips.max.u.h",
   9110   "llvm.mips.max.u.w",
   9111   "llvm.mips.maxi.s.b",
   9112   "llvm.mips.maxi.s.d",
   9113   "llvm.mips.maxi.s.h",
   9114   "llvm.mips.maxi.s.w",
   9115   "llvm.mips.maxi.u.b",
   9116   "llvm.mips.maxi.u.d",
   9117   "llvm.mips.maxi.u.h",
   9118   "llvm.mips.maxi.u.w",
   9119   "llvm.mips.min.a.b",
   9120   "llvm.mips.min.a.d",
   9121   "llvm.mips.min.a.h",
   9122   "llvm.mips.min.a.w",
   9123   "llvm.mips.min.s.b",
   9124   "llvm.mips.min.s.d",
   9125   "llvm.mips.min.s.h",
   9126   "llvm.mips.min.s.w",
   9127   "llvm.mips.min.u.b",
   9128   "llvm.mips.min.u.d",
   9129   "llvm.mips.min.u.h",
   9130   "llvm.mips.min.u.w",
   9131   "llvm.mips.mini.s.b",
   9132   "llvm.mips.mini.s.d",
   9133   "llvm.mips.mini.s.h",
   9134   "llvm.mips.mini.s.w",
   9135   "llvm.mips.mini.u.b",
   9136   "llvm.mips.mini.u.d",
   9137   "llvm.mips.mini.u.h",
   9138   "llvm.mips.mini.u.w",
   9139   "llvm.mips.mod.s.b",
   9140   "llvm.mips.mod.s.d",
   9141   "llvm.mips.mod.s.h",
   9142   "llvm.mips.mod.s.w",
   9143   "llvm.mips.mod.u.b",
   9144   "llvm.mips.mod.u.d",
   9145   "llvm.mips.mod.u.h",
   9146   "llvm.mips.mod.u.w",
   9147   "llvm.mips.modsub",
   9148   "llvm.mips.move.v",
   9149   "llvm.mips.msub",
   9150   "llvm.mips.msub.q.h",
   9151   "llvm.mips.msub.q.w",
   9152   "llvm.mips.msubr.q.h",
   9153   "llvm.mips.msubr.q.w",
   9154   "llvm.mips.msubu",
   9155   "llvm.mips.msubv.b",
   9156   "llvm.mips.msubv.d",
   9157   "llvm.mips.msubv.h",
   9158   "llvm.mips.msubv.w",
   9159   "llvm.mips.mthlip",
   9160   "llvm.mips.mul.ph",
   9161   "llvm.mips.mul.q.h",
   9162   "llvm.mips.mul.q.w",
   9163   "llvm.mips.mul.s.ph",
   9164   "llvm.mips.muleq.s.w.phl",
   9165   "llvm.mips.muleq.s.w.phr",
   9166   "llvm.mips.muleu.s.ph.qbl",
   9167   "llvm.mips.muleu.s.ph.qbr",
   9168   "llvm.mips.mulq.rs.ph",
   9169   "llvm.mips.mulq.rs.w",
   9170   "llvm.mips.mulq.s.ph",
   9171   "llvm.mips.mulq.s.w",
   9172   "llvm.mips.mulr.q.h",
   9173   "llvm.mips.mulr.q.w",
   9174   "llvm.mips.mulsa.w.ph",
   9175   "llvm.mips.mulsaq.s.w.ph",
   9176   "llvm.mips.mult",
   9177   "llvm.mips.multu",
   9178   "llvm.mips.mulv.b",
   9179   "llvm.mips.mulv.d",
   9180   "llvm.mips.mulv.h",
   9181   "llvm.mips.mulv.w",
   9182   "llvm.mips.nloc.b",
   9183   "llvm.mips.nloc.d",
   9184   "llvm.mips.nloc.h",
   9185   "llvm.mips.nloc.w",
   9186   "llvm.mips.nlzc.b",
   9187   "llvm.mips.nlzc.d",
   9188   "llvm.mips.nlzc.h",
   9189   "llvm.mips.nlzc.w",
   9190   "llvm.mips.nor.v",
   9191   "llvm.mips.nori.b",
   9192   "llvm.mips.or.v",
   9193   "llvm.mips.ori.b",
   9194   "llvm.mips.packrl.ph",
   9195   "llvm.mips.pckev.b",
   9196   "llvm.mips.pckev.d",
   9197   "llvm.mips.pckev.h",
   9198   "llvm.mips.pckev.w",
   9199   "llvm.mips.pckod.b",
   9200   "llvm.mips.pckod.d",
   9201   "llvm.mips.pckod.h",
   9202   "llvm.mips.pckod.w",
   9203   "llvm.mips.pcnt.b",
   9204   "llvm.mips.pcnt.d",
   9205   "llvm.mips.pcnt.h",
   9206   "llvm.mips.pcnt.w",
   9207   "llvm.mips.pick.ph",
   9208   "llvm.mips.pick.qb",
   9209   "llvm.mips.preceq.w.phl",
   9210   "llvm.mips.preceq.w.phr",
   9211   "llvm.mips.precequ.ph.qbl",
   9212   "llvm.mips.precequ.ph.qbla",
   9213   "llvm.mips.precequ.ph.qbr",
   9214   "llvm.mips.precequ.ph.qbra",
   9215   "llvm.mips.preceu.ph.qbl",
   9216   "llvm.mips.preceu.ph.qbla",
   9217   "llvm.mips.preceu.ph.qbr",
   9218   "llvm.mips.preceu.ph.qbra",
   9219   "llvm.mips.precr.qb.ph",
   9220   "llvm.mips.precr.sra.ph.w",
   9221   "llvm.mips.precr.sra.r.ph.w",
   9222   "llvm.mips.precrq.ph.w",
   9223   "llvm.mips.precrq.qb.ph",
   9224   "llvm.mips.precrq.rs.ph.w",
   9225   "llvm.mips.precrqu.s.qb.ph",
   9226   "llvm.mips.prepend",
   9227   "llvm.mips.raddu.w.qb",
   9228   "llvm.mips.rddsp",
   9229   "llvm.mips.repl.ph",
   9230   "llvm.mips.repl.qb",
   9231   "llvm.mips.sat.s.b",
   9232   "llvm.mips.sat.s.d",
   9233   "llvm.mips.sat.s.h",
   9234   "llvm.mips.sat.s.w",
   9235   "llvm.mips.sat.u.b",
   9236   "llvm.mips.sat.u.d",
   9237   "llvm.mips.sat.u.h",
   9238   "llvm.mips.sat.u.w",
   9239   "llvm.mips.shf.b",
   9240   "llvm.mips.shf.h",
   9241   "llvm.mips.shf.w",
   9242   "llvm.mips.shilo",
   9243   "llvm.mips.shll.ph",
   9244   "llvm.mips.shll.qb",
   9245   "llvm.mips.shll.s.ph",
   9246   "llvm.mips.shll.s.w",
   9247   "llvm.mips.shra.ph",
   9248   "llvm.mips.shra.qb",
   9249   "llvm.mips.shra.r.ph",
   9250   "llvm.mips.shra.r.qb",
   9251   "llvm.mips.shra.r.w",
   9252   "llvm.mips.shrl.ph",
   9253   "llvm.mips.shrl.qb",
   9254   "llvm.mips.sld.b",
   9255   "llvm.mips.sld.d",
   9256   "llvm.mips.sld.h",
   9257   "llvm.mips.sld.w",
   9258   "llvm.mips.sldi.b",
   9259   "llvm.mips.sldi.d",
   9260   "llvm.mips.sldi.h",
   9261   "llvm.mips.sldi.w",
   9262   "llvm.mips.sll.b",
   9263   "llvm.mips.sll.d",
   9264   "llvm.mips.sll.h",
   9265   "llvm.mips.sll.w",
   9266   "llvm.mips.slli.b",
   9267   "llvm.mips.slli.d",
   9268   "llvm.mips.slli.h",
   9269   "llvm.mips.slli.w",
   9270   "llvm.mips.splat.b",
   9271   "llvm.mips.splat.d",
   9272   "llvm.mips.splat.h",
   9273   "llvm.mips.splat.w",
   9274   "llvm.mips.splati.b",
   9275   "llvm.mips.splati.d",
   9276   "llvm.mips.splati.h",
   9277   "llvm.mips.splati.w",
   9278   "llvm.mips.sra.b",
   9279   "llvm.mips.sra.d",
   9280   "llvm.mips.sra.h",
   9281   "llvm.mips.sra.w",
   9282   "llvm.mips.srai.b",
   9283   "llvm.mips.srai.d",
   9284   "llvm.mips.srai.h",
   9285   "llvm.mips.srai.w",
   9286   "llvm.mips.srar.b",
   9287   "llvm.mips.srar.d",
   9288   "llvm.mips.srar.h",
   9289   "llvm.mips.srar.w",
   9290   "llvm.mips.srari.b",
   9291   "llvm.mips.srari.d",
   9292   "llvm.mips.srari.h",
   9293   "llvm.mips.srari.w",
   9294   "llvm.mips.srl.b",
   9295   "llvm.mips.srl.d",
   9296   "llvm.mips.srl.h",
   9297   "llvm.mips.srl.w",
   9298   "llvm.mips.srli.b",
   9299   "llvm.mips.srli.d",
   9300   "llvm.mips.srli.h",
   9301   "llvm.mips.srli.w",
   9302   "llvm.mips.srlr.b",
   9303   "llvm.mips.srlr.d",
   9304   "llvm.mips.srlr.h",
   9305   "llvm.mips.srlr.w",
   9306   "llvm.mips.srlri.b",
   9307   "llvm.mips.srlri.d",
   9308   "llvm.mips.srlri.h",
   9309   "llvm.mips.srlri.w",
   9310   "llvm.mips.st.b",
   9311   "llvm.mips.st.d",
   9312   "llvm.mips.st.h",
   9313   "llvm.mips.st.w",
   9314   "llvm.mips.subq.ph",
   9315   "llvm.mips.subq.s.ph",
   9316   "llvm.mips.subq.s.w",
   9317   "llvm.mips.subqh.ph",
   9318   "llvm.mips.subqh.r.ph",
   9319   "llvm.mips.subqh.r.w",
   9320   "llvm.mips.subqh.w",
   9321   "llvm.mips.subs.s.b",
   9322   "llvm.mips.subs.s.d",
   9323   "llvm.mips.subs.s.h",
   9324   "llvm.mips.subs.s.w",
   9325   "llvm.mips.subs.u.b",
   9326   "llvm.mips.subs.u.d",
   9327   "llvm.mips.subs.u.h",
   9328   "llvm.mips.subs.u.w",
   9329   "llvm.mips.subsus.u.b",
   9330   "llvm.mips.subsus.u.d",
   9331   "llvm.mips.subsus.u.h",
   9332   "llvm.mips.subsus.u.w",
   9333   "llvm.mips.subsuu.s.b",
   9334   "llvm.mips.subsuu.s.d",
   9335   "llvm.mips.subsuu.s.h",
   9336   "llvm.mips.subsuu.s.w",
   9337   "llvm.mips.subu.ph",
   9338   "llvm.mips.subu.qb",
   9339   "llvm.mips.subu.s.ph",
   9340   "llvm.mips.subu.s.qb",
   9341   "llvm.mips.subuh.qb",
   9342   "llvm.mips.subuh.r.qb",
   9343   "llvm.mips.subv.b",
   9344   "llvm.mips.subv.d",
   9345   "llvm.mips.subv.h",
   9346   "llvm.mips.subv.w",
   9347   "llvm.mips.subvi.b",
   9348   "llvm.mips.subvi.d",
   9349   "llvm.mips.subvi.h",
   9350   "llvm.mips.subvi.w",
   9351   "llvm.mips.vshf.b",
   9352   "llvm.mips.vshf.d",
   9353   "llvm.mips.vshf.h",
   9354   "llvm.mips.vshf.w",
   9355   "llvm.mips.wrdsp",
   9356   "llvm.mips.xor.v",
   9357   "llvm.mips.xori.b",
   9358   "llvm.nvvm.add.rm.d",
   9359   "llvm.nvvm.add.rm.f",
   9360   "llvm.nvvm.add.rm.ftz.f",
   9361   "llvm.nvvm.add.rn.d",
   9362   "llvm.nvvm.add.rn.f",
   9363   "llvm.nvvm.add.rn.ftz.f",
   9364   "llvm.nvvm.add.rp.d",
   9365   "llvm.nvvm.add.rp.f",
   9366   "llvm.nvvm.add.rp.ftz.f",
   9367   "llvm.nvvm.add.rz.d",
   9368   "llvm.nvvm.add.rz.f",
   9369   "llvm.nvvm.add.rz.ftz.f",
   9370   "llvm.nvvm.atomic.add.gen.f.cta",
   9371   "llvm.nvvm.atomic.add.gen.f.sys",
   9372   "llvm.nvvm.atomic.add.gen.i.cta",
   9373   "llvm.nvvm.atomic.add.gen.i.sys",
   9374   "llvm.nvvm.atomic.and.gen.i.cta",
   9375   "llvm.nvvm.atomic.and.gen.i.sys",
   9376   "llvm.nvvm.atomic.cas.gen.i.cta",
   9377   "llvm.nvvm.atomic.cas.gen.i.sys",
   9378   "llvm.nvvm.atomic.dec.gen.i.cta",
   9379   "llvm.nvvm.atomic.dec.gen.i.sys",
   9380   "llvm.nvvm.atomic.exch.gen.i.cta",
   9381   "llvm.nvvm.atomic.exch.gen.i.sys",
   9382   "llvm.nvvm.atomic.inc.gen.i.cta",
   9383   "llvm.nvvm.atomic.inc.gen.i.sys",
   9384   "llvm.nvvm.atomic.load.add.f32",
   9385   "llvm.nvvm.atomic.load.dec.32",
   9386   "llvm.nvvm.atomic.load.inc.32",
   9387   "llvm.nvvm.atomic.max.gen.i.cta",
   9388   "llvm.nvvm.atomic.max.gen.i.sys",
   9389   "llvm.nvvm.atomic.min.gen.i.cta",
   9390   "llvm.nvvm.atomic.min.gen.i.sys",
   9391   "llvm.nvvm.atomic.or.gen.i.cta",
   9392   "llvm.nvvm.atomic.or.gen.i.sys",
   9393   "llvm.nvvm.atomic.xor.gen.i.cta",
   9394   "llvm.nvvm.atomic.xor.gen.i.sys",
   9395   "llvm.nvvm.bar.sync",
   9396   "llvm.nvvm.bar.warp.sync",
   9397   "llvm.nvvm.barrier",
   9398   "llvm.nvvm.barrier.n",
   9399   "llvm.nvvm.barrier.sync",
   9400   "llvm.nvvm.barrier.sync.cnt",
   9401   "llvm.nvvm.barrier0",
   9402   "llvm.nvvm.barrier0.and",
   9403   "llvm.nvvm.barrier0.or",
   9404   "llvm.nvvm.barrier0.popc",
   9405   "llvm.nvvm.bitcast.d2ll",
   9406   "llvm.nvvm.bitcast.f2i",
   9407   "llvm.nvvm.bitcast.i2f",
   9408   "llvm.nvvm.bitcast.ll2d",
   9409   "llvm.nvvm.ceil.d",
   9410   "llvm.nvvm.ceil.f",
   9411   "llvm.nvvm.ceil.ftz.f",
   9412   "llvm.nvvm.compiler.error",
   9413   "llvm.nvvm.compiler.warn",
   9414   "llvm.nvvm.cos.approx.f",
   9415   "llvm.nvvm.cos.approx.ftz.f",
   9416   "llvm.nvvm.d2f.rm",
   9417   "llvm.nvvm.d2f.rm.ftz",
   9418   "llvm.nvvm.d2f.rn",
   9419   "llvm.nvvm.d2f.rn.ftz",
   9420   "llvm.nvvm.d2f.rp",
   9421   "llvm.nvvm.d2f.rp.ftz",
   9422   "llvm.nvvm.d2f.rz",
   9423   "llvm.nvvm.d2f.rz.ftz",
   9424   "llvm.nvvm.d2i.hi",
   9425   "llvm.nvvm.d2i.lo",
   9426   "llvm.nvvm.d2i.rm",
   9427   "llvm.nvvm.d2i.rn",
   9428   "llvm.nvvm.d2i.rp",
   9429   "llvm.nvvm.d2i.rz",
   9430   "llvm.nvvm.d2ll.rm",
   9431   "llvm.nvvm.d2ll.rn",
   9432   "llvm.nvvm.d2ll.rp",
   9433   "llvm.nvvm.d2ll.rz",
   9434   "llvm.nvvm.d2ui.rm",
   9435   "llvm.nvvm.d2ui.rn",
   9436   "llvm.nvvm.d2ui.rp",
   9437   "llvm.nvvm.d2ui.rz",
   9438   "llvm.nvvm.d2ull.rm",
   9439   "llvm.nvvm.d2ull.rn",
   9440   "llvm.nvvm.d2ull.rp",
   9441   "llvm.nvvm.d2ull.rz",
   9442   "llvm.nvvm.div.approx.f",
   9443   "llvm.nvvm.div.approx.ftz.f",
   9444   "llvm.nvvm.div.rm.d",
   9445   "llvm.nvvm.div.rm.f",
   9446   "llvm.nvvm.div.rm.ftz.f",
   9447   "llvm.nvvm.div.rn.d",
   9448   "llvm.nvvm.div.rn.f",
   9449   "llvm.nvvm.div.rn.ftz.f",
   9450   "llvm.nvvm.div.rp.d",
   9451   "llvm.nvvm.div.rp.f",
   9452   "llvm.nvvm.div.rp.ftz.f",
   9453   "llvm.nvvm.div.rz.d",
   9454   "llvm.nvvm.div.rz.f",
   9455   "llvm.nvvm.div.rz.ftz.f",
   9456   "llvm.nvvm.ex2.approx.d",
   9457   "llvm.nvvm.ex2.approx.f",
   9458   "llvm.nvvm.ex2.approx.ftz.f",
   9459   "llvm.nvvm.f2h.rn",
   9460   "llvm.nvvm.f2h.rn.ftz",
   9461   "llvm.nvvm.f2i.rm",
   9462   "llvm.nvvm.f2i.rm.ftz",
   9463   "llvm.nvvm.f2i.rn",
   9464   "llvm.nvvm.f2i.rn.ftz",
   9465   "llvm.nvvm.f2i.rp",
   9466   "llvm.nvvm.f2i.rp.ftz",
   9467   "llvm.nvvm.f2i.rz",
   9468   "llvm.nvvm.f2i.rz.ftz",
   9469   "llvm.nvvm.f2ll.rm",
   9470   "llvm.nvvm.f2ll.rm.ftz",
   9471   "llvm.nvvm.f2ll.rn",
   9472   "llvm.nvvm.f2ll.rn.ftz",
   9473   "llvm.nvvm.f2ll.rp",
   9474   "llvm.nvvm.f2ll.rp.ftz",
   9475   "llvm.nvvm.f2ll.rz",
   9476   "llvm.nvvm.f2ll.rz.ftz",
   9477   "llvm.nvvm.f2ui.rm",
   9478   "llvm.nvvm.f2ui.rm.ftz",
   9479   "llvm.nvvm.f2ui.rn",
   9480   "llvm.nvvm.f2ui.rn.ftz",
   9481   "llvm.nvvm.f2ui.rp",
   9482   "llvm.nvvm.f2ui.rp.ftz",
   9483   "llvm.nvvm.f2ui.rz",
   9484   "llvm.nvvm.f2ui.rz.ftz",
   9485   "llvm.nvvm.f2ull.rm",
   9486   "llvm.nvvm.f2ull.rm.ftz",
   9487   "llvm.nvvm.f2ull.rn",
   9488   "llvm.nvvm.f2ull.rn.ftz",
   9489   "llvm.nvvm.f2ull.rp",
   9490   "llvm.nvvm.f2ull.rp.ftz",
   9491   "llvm.nvvm.f2ull.rz",
   9492   "llvm.nvvm.f2ull.rz.ftz",
   9493   "llvm.nvvm.fabs.d",
   9494   "llvm.nvvm.fabs.f",
   9495   "llvm.nvvm.fabs.ftz.f",
   9496   "llvm.nvvm.floor.d",
   9497   "llvm.nvvm.floor.f",
   9498   "llvm.nvvm.floor.ftz.f",
   9499   "llvm.nvvm.fma.rm.d",
   9500   "llvm.nvvm.fma.rm.f",
   9501   "llvm.nvvm.fma.rm.ftz.f",
   9502   "llvm.nvvm.fma.rn.d",
   9503   "llvm.nvvm.fma.rn.f",
   9504   "llvm.nvvm.fma.rn.ftz.f",
   9505   "llvm.nvvm.fma.rp.d",
   9506   "llvm.nvvm.fma.rp.f",
   9507   "llvm.nvvm.fma.rp.ftz.f",
   9508   "llvm.nvvm.fma.rz.d",
   9509   "llvm.nvvm.fma.rz.f",
   9510   "llvm.nvvm.fma.rz.ftz.f",
   9511   "llvm.nvvm.fmax.d",
   9512   "llvm.nvvm.fmax.f",
   9513   "llvm.nvvm.fmax.ftz.f",
   9514   "llvm.nvvm.fmin.d",
   9515   "llvm.nvvm.fmin.f",
   9516   "llvm.nvvm.fmin.ftz.f",
   9517   "llvm.nvvm.i2d.rm",
   9518   "llvm.nvvm.i2d.rn",
   9519   "llvm.nvvm.i2d.rp",
   9520   "llvm.nvvm.i2d.rz",
   9521   "llvm.nvvm.i2f.rm",
   9522   "llvm.nvvm.i2f.rn",
   9523   "llvm.nvvm.i2f.rp",
   9524   "llvm.nvvm.i2f.rz",
   9525   "llvm.nvvm.isspacep.const",
   9526   "llvm.nvvm.isspacep.global",
   9527   "llvm.nvvm.isspacep.local",
   9528   "llvm.nvvm.isspacep.shared",
   9529   "llvm.nvvm.istypep.sampler",
   9530   "llvm.nvvm.istypep.surface",
   9531   "llvm.nvvm.istypep.texture",
   9532   "llvm.nvvm.ldg.global.f",
   9533   "llvm.nvvm.ldg.global.i",
   9534   "llvm.nvvm.ldg.global.p",
   9535   "llvm.nvvm.ldu.global.f",
   9536   "llvm.nvvm.ldu.global.i",
   9537   "llvm.nvvm.ldu.global.p",
   9538   "llvm.nvvm.lg2.approx.d",
   9539   "llvm.nvvm.lg2.approx.f",
   9540   "llvm.nvvm.lg2.approx.ftz.f",
   9541   "llvm.nvvm.ll2d.rm",
   9542   "llvm.nvvm.ll2d.rn",
   9543   "llvm.nvvm.ll2d.rp",
   9544   "llvm.nvvm.ll2d.rz",
   9545   "llvm.nvvm.ll2f.rm",
   9546   "llvm.nvvm.ll2f.rn",
   9547   "llvm.nvvm.ll2f.rp",
   9548   "llvm.nvvm.ll2f.rz",
   9549   "llvm.nvvm.lohi.i2d",
   9550   "llvm.nvvm.match.all.sync.i32p",
   9551   "llvm.nvvm.match.all.sync.i64p",
   9552   "llvm.nvvm.match.any.sync.i32",
   9553   "llvm.nvvm.match.any.sync.i64",
   9554   "llvm.nvvm.membar.cta",
   9555   "llvm.nvvm.membar.gl",
   9556   "llvm.nvvm.membar.sys",
   9557   "llvm.nvvm.move.double",
   9558   "llvm.nvvm.move.float",
   9559   "llvm.nvvm.move.i16",
   9560   "llvm.nvvm.move.i32",
   9561   "llvm.nvvm.move.i64",
   9562   "llvm.nvvm.move.ptr",
   9563   "llvm.nvvm.mul.rm.d",
   9564   "llvm.nvvm.mul.rm.f",
   9565   "llvm.nvvm.mul.rm.ftz.f",
   9566   "llvm.nvvm.mul.rn.d",
   9567   "llvm.nvvm.mul.rn.f",
   9568   "llvm.nvvm.mul.rn.ftz.f",
   9569   "llvm.nvvm.mul.rp.d",
   9570   "llvm.nvvm.mul.rp.f",
   9571   "llvm.nvvm.mul.rp.ftz.f",
   9572   "llvm.nvvm.mul.rz.d",
   9573   "llvm.nvvm.mul.rz.f",
   9574   "llvm.nvvm.mul.rz.ftz.f",
   9575   "llvm.nvvm.mul24.i",
   9576   "llvm.nvvm.mul24.ui",
   9577   "llvm.nvvm.mulhi.i",
   9578   "llvm.nvvm.mulhi.ll",
   9579   "llvm.nvvm.mulhi.ui",
   9580   "llvm.nvvm.mulhi.ull",
   9581   "llvm.nvvm.prmt",
   9582   "llvm.nvvm.ptr.constant.to.gen",
   9583   "llvm.nvvm.ptr.gen.to.constant",
   9584   "llvm.nvvm.ptr.gen.to.global",
   9585   "llvm.nvvm.ptr.gen.to.local",
   9586   "llvm.nvvm.ptr.gen.to.param",
   9587   "llvm.nvvm.ptr.gen.to.shared",
   9588   "llvm.nvvm.ptr.global.to.gen",
   9589   "llvm.nvvm.ptr.local.to.gen",
   9590   "llvm.nvvm.ptr.shared.to.gen",
   9591   "llvm.nvvm.rcp.approx.ftz.d",
   9592   "llvm.nvvm.rcp.rm.d",
   9593   "llvm.nvvm.rcp.rm.f",
   9594   "llvm.nvvm.rcp.rm.ftz.f",
   9595   "llvm.nvvm.rcp.rn.d",
   9596   "llvm.nvvm.rcp.rn.f",
   9597   "llvm.nvvm.rcp.rn.ftz.f",
   9598   "llvm.nvvm.rcp.rp.d",
   9599   "llvm.nvvm.rcp.rp.f",
   9600   "llvm.nvvm.rcp.rp.ftz.f",
   9601   "llvm.nvvm.rcp.rz.d",
   9602   "llvm.nvvm.rcp.rz.f",
   9603   "llvm.nvvm.rcp.rz.ftz.f",
   9604   "llvm.nvvm.read.ptx.sreg.clock",
   9605   "llvm.nvvm.read.ptx.sreg.clock64",
   9606   "llvm.nvvm.read.ptx.sreg.ctaid.w",
   9607   "llvm.nvvm.read.ptx.sreg.ctaid.x",
   9608   "llvm.nvvm.read.ptx.sreg.ctaid.y",
   9609   "llvm.nvvm.read.ptx.sreg.ctaid.z",
   9610   "llvm.nvvm.read.ptx.sreg.envreg0",
   9611   "llvm.nvvm.read.ptx.sreg.envreg1",
   9612   "llvm.nvvm.read.ptx.sreg.envreg10",
   9613   "llvm.nvvm.read.ptx.sreg.envreg11",
   9614   "llvm.nvvm.read.ptx.sreg.envreg12",
   9615   "llvm.nvvm.read.ptx.sreg.envreg13",
   9616   "llvm.nvvm.read.ptx.sreg.envreg14",
   9617   "llvm.nvvm.read.ptx.sreg.envreg15",
   9618   "llvm.nvvm.read.ptx.sreg.envreg16",
   9619   "llvm.nvvm.read.ptx.sreg.envreg17",
   9620   "llvm.nvvm.read.ptx.sreg.envreg18",
   9621   "llvm.nvvm.read.ptx.sreg.envreg19",
   9622   "llvm.nvvm.read.ptx.sreg.envreg2",
   9623   "llvm.nvvm.read.ptx.sreg.envreg20",
   9624   "llvm.nvvm.read.ptx.sreg.envreg21",
   9625   "llvm.nvvm.read.ptx.sreg.envreg22",
   9626   "llvm.nvvm.read.ptx.sreg.envreg23",
   9627   "llvm.nvvm.read.ptx.sreg.envreg24",
   9628   "llvm.nvvm.read.ptx.sreg.envreg25",
   9629   "llvm.nvvm.read.ptx.sreg.envreg26",
   9630   "llvm.nvvm.read.ptx.sreg.envreg27",
   9631   "llvm.nvvm.read.ptx.sreg.envreg28",
   9632   "llvm.nvvm.read.ptx.sreg.envreg29",
   9633   "llvm.nvvm.read.ptx.sreg.envreg3",
   9634   "llvm.nvvm.read.ptx.sreg.envreg30",
   9635   "llvm.nvvm.read.ptx.sreg.envreg31",
   9636   "llvm.nvvm.read.ptx.sreg.envreg4",
   9637   "llvm.nvvm.read.ptx.sreg.envreg5",
   9638   "llvm.nvvm.read.ptx.sreg.envreg6",
   9639   "llvm.nvvm.read.ptx.sreg.envreg7",
   9640   "llvm.nvvm.read.ptx.sreg.envreg8",
   9641   "llvm.nvvm.read.ptx.sreg.envreg9",
   9642   "llvm.nvvm.read.ptx.sreg.gridid",
   9643   "llvm.nvvm.read.ptx.sreg.laneid",
   9644   "llvm.nvvm.read.ptx.sreg.lanemask.eq",
   9645   "llvm.nvvm.read.ptx.sreg.lanemask.ge",
   9646   "llvm.nvvm.read.ptx.sreg.lanemask.gt",
   9647   "llvm.nvvm.read.ptx.sreg.lanemask.le",
   9648   "llvm.nvvm.read.ptx.sreg.lanemask.lt",
   9649   "llvm.nvvm.read.ptx.sreg.nctaid.w",
   9650   "llvm.nvvm.read.ptx.sreg.nctaid.x",
   9651   "llvm.nvvm.read.ptx.sreg.nctaid.y",
   9652   "llvm.nvvm.read.ptx.sreg.nctaid.z",
   9653   "llvm.nvvm.read.ptx.sreg.nsmid",
   9654   "llvm.nvvm.read.ptx.sreg.ntid.w",
   9655   "llvm.nvvm.read.ptx.sreg.ntid.x",
   9656   "llvm.nvvm.read.ptx.sreg.ntid.y",
   9657   "llvm.nvvm.read.ptx.sreg.ntid.z",
   9658   "llvm.nvvm.read.ptx.sreg.nwarpid",
   9659   "llvm.nvvm.read.ptx.sreg.pm0",
   9660   "llvm.nvvm.read.ptx.sreg.pm1",
   9661   "llvm.nvvm.read.ptx.sreg.pm2",
   9662   "llvm.nvvm.read.ptx.sreg.pm3",
   9663   "llvm.nvvm.read.ptx.sreg.smid",
   9664   "llvm.nvvm.read.ptx.sreg.tid.w",
   9665   "llvm.nvvm.read.ptx.sreg.tid.x",
   9666   "llvm.nvvm.read.ptx.sreg.tid.y",
   9667   "llvm.nvvm.read.ptx.sreg.tid.z",
   9668   "llvm.nvvm.read.ptx.sreg.warpid",
   9669   "llvm.nvvm.read.ptx.sreg.warpsize",
   9670   "llvm.nvvm.reflect",
   9671   "llvm.nvvm.rotate.b32",
   9672   "llvm.nvvm.rotate.b64",
   9673   "llvm.nvvm.rotate.right.b64",
   9674   "llvm.nvvm.round.d",
   9675   "llvm.nvvm.round.f",
   9676   "llvm.nvvm.round.ftz.f",
   9677   "llvm.nvvm.rsqrt.approx.d",
   9678   "llvm.nvvm.rsqrt.approx.f",
   9679   "llvm.nvvm.rsqrt.approx.ftz.f",
   9680   "llvm.nvvm.sad.i",
   9681   "llvm.nvvm.sad.ui",
   9682   "llvm.nvvm.saturate.d",
   9683   "llvm.nvvm.saturate.f",
   9684   "llvm.nvvm.saturate.ftz.f",
   9685   "llvm.nvvm.shfl.bfly.f32",
   9686   "llvm.nvvm.shfl.bfly.i32",
   9687   "llvm.nvvm.shfl.down.f32",
   9688   "llvm.nvvm.shfl.down.i32",
   9689   "llvm.nvvm.shfl.idx.f32",
   9690   "llvm.nvvm.shfl.idx.i32",
   9691   "llvm.nvvm.shfl.sync.bfly.f32",
   9692   "llvm.nvvm.shfl.sync.bfly.i32",
   9693   "llvm.nvvm.shfl.sync.down.f32",
   9694   "llvm.nvvm.shfl.sync.down.i32",
   9695   "llvm.nvvm.shfl.sync.idx.f32",
   9696   "llvm.nvvm.shfl.sync.idx.i32",
   9697   "llvm.nvvm.shfl.sync.up.f32",
   9698   "llvm.nvvm.shfl.sync.up.i32",
   9699   "llvm.nvvm.shfl.up.f32",
   9700   "llvm.nvvm.shfl.up.i32",
   9701   "llvm.nvvm.sin.approx.f",
   9702   "llvm.nvvm.sin.approx.ftz.f",
   9703   "llvm.nvvm.sqrt.approx.f",
   9704   "llvm.nvvm.sqrt.approx.ftz.f",
   9705   "llvm.nvvm.sqrt.f",
   9706   "llvm.nvvm.sqrt.rm.d",
   9707   "llvm.nvvm.sqrt.rm.f",
   9708   "llvm.nvvm.sqrt.rm.ftz.f",
   9709   "llvm.nvvm.sqrt.rn.d",
   9710   "llvm.nvvm.sqrt.rn.f",
   9711   "llvm.nvvm.sqrt.rn.ftz.f",
   9712   "llvm.nvvm.sqrt.rp.d",
   9713   "llvm.nvvm.sqrt.rp.f",
   9714   "llvm.nvvm.sqrt.rp.ftz.f",
   9715   "llvm.nvvm.sqrt.rz.d",
   9716   "llvm.nvvm.sqrt.rz.f",
   9717   "llvm.nvvm.sqrt.rz.ftz.f",
   9718   "llvm.nvvm.suld.1d.array.i16.clamp",
   9719   "llvm.nvvm.suld.1d.array.i16.trap",
   9720   "llvm.nvvm.suld.1d.array.i16.zero",
   9721   "llvm.nvvm.suld.1d.array.i32.clamp",
   9722   "llvm.nvvm.suld.1d.array.i32.trap",
   9723   "llvm.nvvm.suld.1d.array.i32.zero",
   9724   "llvm.nvvm.suld.1d.array.i64.clamp",
   9725   "llvm.nvvm.suld.1d.array.i64.trap",
   9726   "llvm.nvvm.suld.1d.array.i64.zero",
   9727   "llvm.nvvm.suld.1d.array.i8.clamp",
   9728   "llvm.nvvm.suld.1d.array.i8.trap",
   9729   "llvm.nvvm.suld.1d.array.i8.zero",
   9730   "llvm.nvvm.suld.1d.array.v2i16.clamp",
   9731   "llvm.nvvm.suld.1d.array.v2i16.trap",
   9732   "llvm.nvvm.suld.1d.array.v2i16.zero",
   9733   "llvm.nvvm.suld.1d.array.v2i32.clamp",
   9734   "llvm.nvvm.suld.1d.array.v2i32.trap",
   9735   "llvm.nvvm.suld.1d.array.v2i32.zero",
   9736   "llvm.nvvm.suld.1d.array.v2i64.clamp",
   9737   "llvm.nvvm.suld.1d.array.v2i64.trap",
   9738   "llvm.nvvm.suld.1d.array.v2i64.zero",
   9739   "llvm.nvvm.suld.1d.array.v2i8.clamp",
   9740   "llvm.nvvm.suld.1d.array.v2i8.trap",
   9741   "llvm.nvvm.suld.1d.array.v2i8.zero",
   9742   "llvm.nvvm.suld.1d.array.v4i16.clamp",
   9743   "llvm.nvvm.suld.1d.array.v4i16.trap",
   9744   "llvm.nvvm.suld.1d.array.v4i16.zero",
   9745   "llvm.nvvm.suld.1d.array.v4i32.clamp",
   9746   "llvm.nvvm.suld.1d.array.v4i32.trap",
   9747   "llvm.nvvm.suld.1d.array.v4i32.zero",
   9748   "llvm.nvvm.suld.1d.array.v4i8.clamp",
   9749   "llvm.nvvm.suld.1d.array.v4i8.trap",
   9750   "llvm.nvvm.suld.1d.array.v4i8.zero",
   9751   "llvm.nvvm.suld.1d.i16.clamp",
   9752   "llvm.nvvm.suld.1d.i16.trap",
   9753   "llvm.nvvm.suld.1d.i16.zero",
   9754   "llvm.nvvm.suld.1d.i32.clamp",
   9755   "llvm.nvvm.suld.1d.i32.trap",
   9756   "llvm.nvvm.suld.1d.i32.zero",
   9757   "llvm.nvvm.suld.1d.i64.clamp",
   9758   "llvm.nvvm.suld.1d.i64.trap",
   9759   "llvm.nvvm.suld.1d.i64.zero",
   9760   "llvm.nvvm.suld.1d.i8.clamp",
   9761   "llvm.nvvm.suld.1d.i8.trap",
   9762   "llvm.nvvm.suld.1d.i8.zero",
   9763   "llvm.nvvm.suld.1d.v2i16.clamp",
   9764   "llvm.nvvm.suld.1d.v2i16.trap",
   9765   "llvm.nvvm.suld.1d.v2i16.zero",
   9766   "llvm.nvvm.suld.1d.v2i32.clamp",
   9767   "llvm.nvvm.suld.1d.v2i32.trap",
   9768   "llvm.nvvm.suld.1d.v2i32.zero",
   9769   "llvm.nvvm.suld.1d.v2i64.clamp",
   9770   "llvm.nvvm.suld.1d.v2i64.trap",
   9771   "llvm.nvvm.suld.1d.v2i64.zero",
   9772   "llvm.nvvm.suld.1d.v2i8.clamp",
   9773   "llvm.nvvm.suld.1d.v2i8.trap",
   9774   "llvm.nvvm.suld.1d.v2i8.zero",
   9775   "llvm.nvvm.suld.1d.v4i16.clamp",
   9776   "llvm.nvvm.suld.1d.v4i16.trap",
   9777   "llvm.nvvm.suld.1d.v4i16.zero",
   9778   "llvm.nvvm.suld.1d.v4i32.clamp",
   9779   "llvm.nvvm.suld.1d.v4i32.trap",
   9780   "llvm.nvvm.suld.1d.v4i32.zero",
   9781   "llvm.nvvm.suld.1d.v4i8.clamp",
   9782   "llvm.nvvm.suld.1d.v4i8.trap",
   9783   "llvm.nvvm.suld.1d.v4i8.zero",
   9784   "llvm.nvvm.suld.2d.array.i16.clamp",
   9785   "llvm.nvvm.suld.2d.array.i16.trap",
   9786   "llvm.nvvm.suld.2d.array.i16.zero",
   9787   "llvm.nvvm.suld.2d.array.i32.clamp",
   9788   "llvm.nvvm.suld.2d.array.i32.trap",
   9789   "llvm.nvvm.suld.2d.array.i32.zero",
   9790   "llvm.nvvm.suld.2d.array.i64.clamp",
   9791   "llvm.nvvm.suld.2d.array.i64.trap",
   9792   "llvm.nvvm.suld.2d.array.i64.zero",
   9793   "llvm.nvvm.suld.2d.array.i8.clamp",
   9794   "llvm.nvvm.suld.2d.array.i8.trap",
   9795   "llvm.nvvm.suld.2d.array.i8.zero",
   9796   "llvm.nvvm.suld.2d.array.v2i16.clamp",
   9797   "llvm.nvvm.suld.2d.array.v2i16.trap",
   9798   "llvm.nvvm.suld.2d.array.v2i16.zero",
   9799   "llvm.nvvm.suld.2d.array.v2i32.clamp",
   9800   "llvm.nvvm.suld.2d.array.v2i32.trap",
   9801   "llvm.nvvm.suld.2d.array.v2i32.zero",
   9802   "llvm.nvvm.suld.2d.array.v2i64.clamp",
   9803   "llvm.nvvm.suld.2d.array.v2i64.trap",
   9804   "llvm.nvvm.suld.2d.array.v2i64.zero",
   9805   "llvm.nvvm.suld.2d.array.v2i8.clamp",
   9806   "llvm.nvvm.suld.2d.array.v2i8.trap",
   9807   "llvm.nvvm.suld.2d.array.v2i8.zero",
   9808   "llvm.nvvm.suld.2d.array.v4i16.clamp",
   9809   "llvm.nvvm.suld.2d.array.v4i16.trap",
   9810   "llvm.nvvm.suld.2d.array.v4i16.zero",
   9811   "llvm.nvvm.suld.2d.array.v4i32.clamp",
   9812   "llvm.nvvm.suld.2d.array.v4i32.trap",
   9813   "llvm.nvvm.suld.2d.array.v4i32.zero",
   9814   "llvm.nvvm.suld.2d.array.v4i8.clamp",
   9815   "llvm.nvvm.suld.2d.array.v4i8.trap",
   9816   "llvm.nvvm.suld.2d.array.v4i8.zero",
   9817   "llvm.nvvm.suld.2d.i16.clamp",
   9818   "llvm.nvvm.suld.2d.i16.trap",
   9819   "llvm.nvvm.suld.2d.i16.zero",
   9820   "llvm.nvvm.suld.2d.i32.clamp",
   9821   "llvm.nvvm.suld.2d.i32.trap",
   9822   "llvm.nvvm.suld.2d.i32.zero",
   9823   "llvm.nvvm.suld.2d.i64.clamp",
   9824   "llvm.nvvm.suld.2d.i64.trap",
   9825   "llvm.nvvm.suld.2d.i64.zero",
   9826   "llvm.nvvm.suld.2d.i8.clamp",
   9827   "llvm.nvvm.suld.2d.i8.trap",
   9828   "llvm.nvvm.suld.2d.i8.zero",
   9829   "llvm.nvvm.suld.2d.v2i16.clamp",
   9830   "llvm.nvvm.suld.2d.v2i16.trap",
   9831   "llvm.nvvm.suld.2d.v2i16.zero",
   9832   "llvm.nvvm.suld.2d.v2i32.clamp",
   9833   "llvm.nvvm.suld.2d.v2i32.trap",
   9834   "llvm.nvvm.suld.2d.v2i32.zero",
   9835   "llvm.nvvm.suld.2d.v2i64.clamp",
   9836   "llvm.nvvm.suld.2d.v2i64.trap",
   9837   "llvm.nvvm.suld.2d.v2i64.zero",
   9838   "llvm.nvvm.suld.2d.v2i8.clamp",
   9839   "llvm.nvvm.suld.2d.v2i8.trap",
   9840   "llvm.nvvm.suld.2d.v2i8.zero",
   9841   "llvm.nvvm.suld.2d.v4i16.clamp",
   9842   "llvm.nvvm.suld.2d.v4i16.trap",
   9843   "llvm.nvvm.suld.2d.v4i16.zero",
   9844   "llvm.nvvm.suld.2d.v4i32.clamp",
   9845   "llvm.nvvm.suld.2d.v4i32.trap",
   9846   "llvm.nvvm.suld.2d.v4i32.zero",
   9847   "llvm.nvvm.suld.2d.v4i8.clamp",
   9848   "llvm.nvvm.suld.2d.v4i8.trap",
   9849   "llvm.nvvm.suld.2d.v4i8.zero",
   9850   "llvm.nvvm.suld.3d.i16.clamp",
   9851   "llvm.nvvm.suld.3d.i16.trap",
   9852   "llvm.nvvm.suld.3d.i16.zero",
   9853   "llvm.nvvm.suld.3d.i32.clamp",
   9854   "llvm.nvvm.suld.3d.i32.trap",
   9855   "llvm.nvvm.suld.3d.i32.zero",
   9856   "llvm.nvvm.suld.3d.i64.clamp",
   9857   "llvm.nvvm.suld.3d.i64.trap",
   9858   "llvm.nvvm.suld.3d.i64.zero",
   9859   "llvm.nvvm.suld.3d.i8.clamp",
   9860   "llvm.nvvm.suld.3d.i8.trap",
   9861   "llvm.nvvm.suld.3d.i8.zero",
   9862   "llvm.nvvm.suld.3d.v2i16.clamp",
   9863   "llvm.nvvm.suld.3d.v2i16.trap",
   9864   "llvm.nvvm.suld.3d.v2i16.zero",
   9865   "llvm.nvvm.suld.3d.v2i32.clamp",
   9866   "llvm.nvvm.suld.3d.v2i32.trap",
   9867   "llvm.nvvm.suld.3d.v2i32.zero",
   9868   "llvm.nvvm.suld.3d.v2i64.clamp",
   9869   "llvm.nvvm.suld.3d.v2i64.trap",
   9870   "llvm.nvvm.suld.3d.v2i64.zero",
   9871   "llvm.nvvm.suld.3d.v2i8.clamp",
   9872   "llvm.nvvm.suld.3d.v2i8.trap",
   9873   "llvm.nvvm.suld.3d.v2i8.zero",
   9874   "llvm.nvvm.suld.3d.v4i16.clamp",
   9875   "llvm.nvvm.suld.3d.v4i16.trap",
   9876   "llvm.nvvm.suld.3d.v4i16.zero",
   9877   "llvm.nvvm.suld.3d.v4i32.clamp",
   9878   "llvm.nvvm.suld.3d.v4i32.trap",
   9879   "llvm.nvvm.suld.3d.v4i32.zero",
   9880   "llvm.nvvm.suld.3d.v4i8.clamp",
   9881   "llvm.nvvm.suld.3d.v4i8.trap",
   9882   "llvm.nvvm.suld.3d.v4i8.zero",
   9883   "llvm.nvvm.suq.array.size",
   9884   "llvm.nvvm.suq.channel.data.type",
   9885   "llvm.nvvm.suq.channel.order",
   9886   "llvm.nvvm.suq.depth",
   9887   "llvm.nvvm.suq.height",
   9888   "llvm.nvvm.suq.width",
   9889   "llvm.nvvm.sust.b.1d.array.i16.clamp",
   9890   "llvm.nvvm.sust.b.1d.array.i16.trap",
   9891   "llvm.nvvm.sust.b.1d.array.i16.zero",
   9892   "llvm.nvvm.sust.b.1d.array.i32.clamp",
   9893   "llvm.nvvm.sust.b.1d.array.i32.trap",
   9894   "llvm.nvvm.sust.b.1d.array.i32.zero",
   9895   "llvm.nvvm.sust.b.1d.array.i64.clamp",
   9896   "llvm.nvvm.sust.b.1d.array.i64.trap",
   9897   "llvm.nvvm.sust.b.1d.array.i64.zero",
   9898   "llvm.nvvm.sust.b.1d.array.i8.clamp",
   9899   "llvm.nvvm.sust.b.1d.array.i8.trap",
   9900   "llvm.nvvm.sust.b.1d.array.i8.zero",
   9901   "llvm.nvvm.sust.b.1d.array.v2i16.clamp",
   9902   "llvm.nvvm.sust.b.1d.array.v2i16.trap",
   9903   "llvm.nvvm.sust.b.1d.array.v2i16.zero",
   9904   "llvm.nvvm.sust.b.1d.array.v2i32.clamp",
   9905   "llvm.nvvm.sust.b.1d.array.v2i32.trap",
   9906   "llvm.nvvm.sust.b.1d.array.v2i32.zero",
   9907   "llvm.nvvm.sust.b.1d.array.v2i64.clamp",
   9908   "llvm.nvvm.sust.b.1d.array.v2i64.trap",
   9909   "llvm.nvvm.sust.b.1d.array.v2i64.zero",
   9910   "llvm.nvvm.sust.b.1d.array.v2i8.clamp",
   9911   "llvm.nvvm.sust.b.1d.array.v2i8.trap",
   9912   "llvm.nvvm.sust.b.1d.array.v2i8.zero",
   9913   "llvm.nvvm.sust.b.1d.array.v4i16.clamp",
   9914   "llvm.nvvm.sust.b.1d.array.v4i16.trap",
   9915   "llvm.nvvm.sust.b.1d.array.v4i16.zero",
   9916   "llvm.nvvm.sust.b.1d.array.v4i32.clamp",
   9917   "llvm.nvvm.sust.b.1d.array.v4i32.trap",
   9918   "llvm.nvvm.sust.b.1d.array.v4i32.zero",
   9919   "llvm.nvvm.sust.b.1d.array.v4i8.clamp",
   9920   "llvm.nvvm.sust.b.1d.array.v4i8.trap",
   9921   "llvm.nvvm.sust.b.1d.array.v4i8.zero",
   9922   "llvm.nvvm.sust.b.1d.i16.clamp",
   9923   "llvm.nvvm.sust.b.1d.i16.trap",
   9924   "llvm.nvvm.sust.b.1d.i16.zero",
   9925   "llvm.nvvm.sust.b.1d.i32.clamp",
   9926   "llvm.nvvm.sust.b.1d.i32.trap",
   9927   "llvm.nvvm.sust.b.1d.i32.zero",
   9928   "llvm.nvvm.sust.b.1d.i64.clamp",
   9929   "llvm.nvvm.sust.b.1d.i64.trap",
   9930   "llvm.nvvm.sust.b.1d.i64.zero",
   9931   "llvm.nvvm.sust.b.1d.i8.clamp",
   9932   "llvm.nvvm.sust.b.1d.i8.trap",
   9933   "llvm.nvvm.sust.b.1d.i8.zero",
   9934   "llvm.nvvm.sust.b.1d.v2i16.clamp",
   9935   "llvm.nvvm.sust.b.1d.v2i16.trap",
   9936   "llvm.nvvm.sust.b.1d.v2i16.zero",
   9937   "llvm.nvvm.sust.b.1d.v2i32.clamp",
   9938   "llvm.nvvm.sust.b.1d.v2i32.trap",
   9939   "llvm.nvvm.sust.b.1d.v2i32.zero",
   9940   "llvm.nvvm.sust.b.1d.v2i64.clamp",
   9941   "llvm.nvvm.sust.b.1d.v2i64.trap",
   9942   "llvm.nvvm.sust.b.1d.v2i64.zero",
   9943   "llvm.nvvm.sust.b.1d.v2i8.clamp",
   9944   "llvm.nvvm.sust.b.1d.v2i8.trap",
   9945   "llvm.nvvm.sust.b.1d.v2i8.zero",
   9946   "llvm.nvvm.sust.b.1d.v4i16.clamp",
   9947   "llvm.nvvm.sust.b.1d.v4i16.trap",
   9948   "llvm.nvvm.sust.b.1d.v4i16.zero",
   9949   "llvm.nvvm.sust.b.1d.v4i32.clamp",
   9950   "llvm.nvvm.sust.b.1d.v4i32.trap",
   9951   "llvm.nvvm.sust.b.1d.v4i32.zero",
   9952   "llvm.nvvm.sust.b.1d.v4i8.clamp",
   9953   "llvm.nvvm.sust.b.1d.v4i8.trap",
   9954   "llvm.nvvm.sust.b.1d.v4i8.zero",
   9955   "llvm.nvvm.sust.b.2d.array.i16.clamp",
   9956   "llvm.nvvm.sust.b.2d.array.i16.trap",
   9957   "llvm.nvvm.sust.b.2d.array.i16.zero",
   9958   "llvm.nvvm.sust.b.2d.array.i32.clamp",
   9959   "llvm.nvvm.sust.b.2d.array.i32.trap",
   9960   "llvm.nvvm.sust.b.2d.array.i32.zero",
   9961   "llvm.nvvm.sust.b.2d.array.i64.clamp",
   9962   "llvm.nvvm.sust.b.2d.array.i64.trap",
   9963   "llvm.nvvm.sust.b.2d.array.i64.zero",
   9964   "llvm.nvvm.sust.b.2d.array.i8.clamp",
   9965   "llvm.nvvm.sust.b.2d.array.i8.trap",
   9966   "llvm.nvvm.sust.b.2d.array.i8.zero",
   9967   "llvm.nvvm.sust.b.2d.array.v2i16.clamp",
   9968   "llvm.nvvm.sust.b.2d.array.v2i16.trap",
   9969   "llvm.nvvm.sust.b.2d.array.v2i16.zero",
   9970   "llvm.nvvm.sust.b.2d.array.v2i32.clamp",
   9971   "llvm.nvvm.sust.b.2d.array.v2i32.trap",
   9972   "llvm.nvvm.sust.b.2d.array.v2i32.zero",
   9973   "llvm.nvvm.sust.b.2d.array.v2i64.clamp",
   9974   "llvm.nvvm.sust.b.2d.array.v2i64.trap",
   9975   "llvm.nvvm.sust.b.2d.array.v2i64.zero",
   9976   "llvm.nvvm.sust.b.2d.array.v2i8.clamp",
   9977   "llvm.nvvm.sust.b.2d.array.v2i8.trap",
   9978   "llvm.nvvm.sust.b.2d.array.v2i8.zero",
   9979   "llvm.nvvm.sust.b.2d.array.v4i16.clamp",
   9980   "llvm.nvvm.sust.b.2d.array.v4i16.trap",
   9981   "llvm.nvvm.sust.b.2d.array.v4i16.zero",
   9982   "llvm.nvvm.sust.b.2d.array.v4i32.clamp",
   9983   "llvm.nvvm.sust.b.2d.array.v4i32.trap",
   9984   "llvm.nvvm.sust.b.2d.array.v4i32.zero",
   9985   "llvm.nvvm.sust.b.2d.array.v4i8.clamp",
   9986   "llvm.nvvm.sust.b.2d.array.v4i8.trap",
   9987   "llvm.nvvm.sust.b.2d.array.v4i8.zero",
   9988   "llvm.nvvm.sust.b.2d.i16.clamp",
   9989   "llvm.nvvm.sust.b.2d.i16.trap",
   9990   "llvm.nvvm.sust.b.2d.i16.zero",
   9991   "llvm.nvvm.sust.b.2d.i32.clamp",
   9992   "llvm.nvvm.sust.b.2d.i32.trap",
   9993   "llvm.nvvm.sust.b.2d.i32.zero",
   9994   "llvm.nvvm.sust.b.2d.i64.clamp",
   9995   "llvm.nvvm.sust.b.2d.i64.trap",
   9996   "llvm.nvvm.sust.b.2d.i64.zero",
   9997   "llvm.nvvm.sust.b.2d.i8.clamp",
   9998   "llvm.nvvm.sust.b.2d.i8.trap",
   9999   "llvm.nvvm.sust.b.2d.i8.zero",
   10000   "llvm.nvvm.sust.b.2d.v2i16.clamp",
   10001   "llvm.nvvm.sust.b.2d.v2i16.trap",
   10002   "llvm.nvvm.sust.b.2d.v2i16.zero",
   10003   "llvm.nvvm.sust.b.2d.v2i32.clamp",
   10004   "llvm.nvvm.sust.b.2d.v2i32.trap",
   10005   "llvm.nvvm.sust.b.2d.v2i32.zero",
   10006   "llvm.nvvm.sust.b.2d.v2i64.clamp",
   10007   "llvm.nvvm.sust.b.2d.v2i64.trap",
   10008   "llvm.nvvm.sust.b.2d.v2i64.zero",
   10009   "llvm.nvvm.sust.b.2d.v2i8.clamp",
   10010   "llvm.nvvm.sust.b.2d.v2i8.trap",
   10011   "llvm.nvvm.sust.b.2d.v2i8.zero",
   10012   "llvm.nvvm.sust.b.2d.v4i16.clamp",
   10013   "llvm.nvvm.sust.b.2d.v4i16.trap",
   10014   "llvm.nvvm.sust.b.2d.v4i16.zero",
   10015   "llvm.nvvm.sust.b.2d.v4i32.clamp",
   10016   "llvm.nvvm.sust.b.2d.v4i32.trap",
   10017   "llvm.nvvm.sust.b.2d.v4i32.zero",
   10018   "llvm.nvvm.sust.b.2d.v4i8.clamp",
   10019   "llvm.nvvm.sust.b.2d.v4i8.trap",
   10020   "llvm.nvvm.sust.b.2d.v4i8.zero",
   10021   "llvm.nvvm.sust.b.3d.i16.clamp",
   10022   "llvm.nvvm.sust.b.3d.i16.trap",
   10023   "llvm.nvvm.sust.b.3d.i16.zero",
   10024   "llvm.nvvm.sust.b.3d.i32.clamp",
   10025   "llvm.nvvm.sust.b.3d.i32.trap",
   10026   "llvm.nvvm.sust.b.3d.i32.zero",
   10027   "llvm.nvvm.sust.b.3d.i64.clamp",
   10028   "llvm.nvvm.sust.b.3d.i64.trap",
   10029   "llvm.nvvm.sust.b.3d.i64.zero",
   10030   "llvm.nvvm.sust.b.3d.i8.clamp",
   10031   "llvm.nvvm.sust.b.3d.i8.trap",
   10032   "llvm.nvvm.sust.b.3d.i8.zero",
   10033   "llvm.nvvm.sust.b.3d.v2i16.clamp",
   10034   "llvm.nvvm.sust.b.3d.v2i16.trap",
   10035   "llvm.nvvm.sust.b.3d.v2i16.zero",
   10036   "llvm.nvvm.sust.b.3d.v2i32.clamp",
   10037   "llvm.nvvm.sust.b.3d.v2i32.trap",
   10038   "llvm.nvvm.sust.b.3d.v2i32.zero",
   10039   "llvm.nvvm.sust.b.3d.v2i64.clamp",
   10040   "llvm.nvvm.sust.b.3d.v2i64.trap",
   10041   "llvm.nvvm.sust.b.3d.v2i64.zero",
   10042   "llvm.nvvm.sust.b.3d.v2i8.clamp",
   10043   "llvm.nvvm.sust.b.3d.v2i8.trap",
   10044   "llvm.nvvm.sust.b.3d.v2i8.zero",
   10045   "llvm.nvvm.sust.b.3d.v4i16.clamp",
   10046   "llvm.nvvm.sust.b.3d.v4i16.trap",
   10047   "llvm.nvvm.sust.b.3d.v4i16.zero",
   10048   "llvm.nvvm.sust.b.3d.v4i32.clamp",
   10049   "llvm.nvvm.sust.b.3d.v4i32.trap",
   10050   "llvm.nvvm.sust.b.3d.v4i32.zero",
   10051   "llvm.nvvm.sust.b.3d.v4i8.clamp",
   10052   "llvm.nvvm.sust.b.3d.v4i8.trap",
   10053   "llvm.nvvm.sust.b.3d.v4i8.zero",
   10054   "llvm.nvvm.sust.p.1d.array.i16.trap",
   10055   "llvm.nvvm.sust.p.1d.array.i32.trap",
   10056   "llvm.nvvm.sust.p.1d.array.i8.trap",
   10057   "llvm.nvvm.sust.p.1d.array.v2i16.trap",
   10058   "llvm.nvvm.sust.p.1d.array.v2i32.trap",
   10059   "llvm.nvvm.sust.p.1d.array.v2i8.trap",
   10060   "llvm.nvvm.sust.p.1d.array.v4i16.trap",
   10061   "llvm.nvvm.sust.p.1d.array.v4i32.trap",
   10062   "llvm.nvvm.sust.p.1d.array.v4i8.trap",
   10063   "llvm.nvvm.sust.p.1d.i16.trap",
   10064   "llvm.nvvm.sust.p.1d.i32.trap",
   10065   "llvm.nvvm.sust.p.1d.i8.trap",
   10066   "llvm.nvvm.sust.p.1d.v2i16.trap",
   10067   "llvm.nvvm.sust.p.1d.v2i32.trap",
   10068   "llvm.nvvm.sust.p.1d.v2i8.trap",
   10069   "llvm.nvvm.sust.p.1d.v4i16.trap",
   10070   "llvm.nvvm.sust.p.1d.v4i32.trap",
   10071   "llvm.nvvm.sust.p.1d.v4i8.trap",
   10072   "llvm.nvvm.sust.p.2d.array.i16.trap",
   10073   "llvm.nvvm.sust.p.2d.array.i32.trap",
   10074   "llvm.nvvm.sust.p.2d.array.i8.trap",
   10075   "llvm.nvvm.sust.p.2d.array.v2i16.trap",
   10076   "llvm.nvvm.sust.p.2d.array.v2i32.trap",
   10077   "llvm.nvvm.sust.p.2d.array.v2i8.trap",
   10078   "llvm.nvvm.sust.p.2d.array.v4i16.trap",
   10079   "llvm.nvvm.sust.p.2d.array.v4i32.trap",
   10080   "llvm.nvvm.sust.p.2d.array.v4i8.trap",
   10081   "llvm.nvvm.sust.p.2d.i16.trap",
   10082   "llvm.nvvm.sust.p.2d.i32.trap",
   10083   "llvm.nvvm.sust.p.2d.i8.trap",
   10084   "llvm.nvvm.sust.p.2d.v2i16.trap",
   10085   "llvm.nvvm.sust.p.2d.v2i32.trap",
   10086   "llvm.nvvm.sust.p.2d.v2i8.trap",
   10087   "llvm.nvvm.sust.p.2d.v4i16.trap",
   10088   "llvm.nvvm.sust.p.2d.v4i32.trap",
   10089   "llvm.nvvm.sust.p.2d.v4i8.trap",
   10090   "llvm.nvvm.sust.p.3d.i16.trap",
   10091   "llvm.nvvm.sust.p.3d.i32.trap",
   10092   "llvm.nvvm.sust.p.3d.i8.trap",
   10093   "llvm.nvvm.sust.p.3d.v2i16.trap",
   10094   "llvm.nvvm.sust.p.3d.v2i32.trap",
   10095   "llvm.nvvm.sust.p.3d.v2i8.trap",
   10096   "llvm.nvvm.sust.p.3d.v4i16.trap",
   10097   "llvm.nvvm.sust.p.3d.v4i32.trap",
   10098   "llvm.nvvm.sust.p.3d.v4i8.trap",
   10099   "llvm.nvvm.swap.lo.hi.b64",
   10100   "llvm.nvvm.tex.1d.array.grad.v4f32.f32",
   10101   "llvm.nvvm.tex.1d.array.grad.v4s32.f32",
   10102   "llvm.nvvm.tex.1d.array.grad.v4u32.f32",
   10103   "llvm.nvvm.tex.1d.array.level.v4f32.f32",
   10104   "llvm.nvvm.tex.1d.array.level.v4s32.f32",
   10105   "llvm.nvvm.tex.1d.array.level.v4u32.f32",
   10106   "llvm.nvvm.tex.1d.array.v4f32.f32",
   10107   "llvm.nvvm.tex.1d.array.v4f32.s32",
   10108   "llvm.nvvm.tex.1d.array.v4s32.f32",
   10109   "llvm.nvvm.tex.1d.array.v4s32.s32",
   10110   "llvm.nvvm.tex.1d.array.v4u32.f32",
   10111   "llvm.nvvm.tex.1d.array.v4u32.s32",
   10112   "llvm.nvvm.tex.1d.grad.v4f32.f32",
   10113   "llvm.nvvm.tex.1d.grad.v4s32.f32",
   10114   "llvm.nvvm.tex.1d.grad.v4u32.f32",
   10115   "llvm.nvvm.tex.1d.level.v4f32.f32",
   10116   "llvm.nvvm.tex.1d.level.v4s32.f32",
   10117   "llvm.nvvm.tex.1d.level.v4u32.f32",
   10118   "llvm.nvvm.tex.1d.v4f32.f32",
   10119   "llvm.nvvm.tex.1d.v4f32.s32",
   10120   "llvm.nvvm.tex.1d.v4s32.f32",
   10121   "llvm.nvvm.tex.1d.v4s32.s32",
   10122   "llvm.nvvm.tex.1d.v4u32.f32",
   10123   "llvm.nvvm.tex.1d.v4u32.s32",
   10124   "llvm.nvvm.tex.2d.array.grad.v4f32.f32",
   10125   "llvm.nvvm.tex.2d.array.grad.v4s32.f32",
   10126   "llvm.nvvm.tex.2d.array.grad.v4u32.f32",
   10127   "llvm.nvvm.tex.2d.array.level.v4f32.f32",
   10128   "llvm.nvvm.tex.2d.array.level.v4s32.f32",
   10129   "llvm.nvvm.tex.2d.array.level.v4u32.f32",
   10130   "llvm.nvvm.tex.2d.array.v4f32.f32",
   10131   "llvm.nvvm.tex.2d.array.v4f32.s32",
   10132   "llvm.nvvm.tex.2d.array.v4s32.f32",
   10133   "llvm.nvvm.tex.2d.array.v4s32.s32",
   10134   "llvm.nvvm.tex.2d.array.v4u32.f32",
   10135   "llvm.nvvm.tex.2d.array.v4u32.s32",
   10136   "llvm.nvvm.tex.2d.grad.v4f32.f32",
   10137   "llvm.nvvm.tex.2d.grad.v4s32.f32",
   10138   "llvm.nvvm.tex.2d.grad.v4u32.f32",
   10139   "llvm.nvvm.tex.2d.level.v4f32.f32",
   10140   "llvm.nvvm.tex.2d.level.v4s32.f32",
   10141   "llvm.nvvm.tex.2d.level.v4u32.f32",
   10142   "llvm.nvvm.tex.2d.v4f32.f32",
   10143   "llvm.nvvm.tex.2d.v4f32.s32",
   10144   "llvm.nvvm.tex.2d.v4s32.f32",
   10145   "llvm.nvvm.tex.2d.v4s32.s32",
   10146   "llvm.nvvm.tex.2d.v4u32.f32",
   10147   "llvm.nvvm.tex.2d.v4u32.s32",
   10148   "llvm.nvvm.tex.3d.grad.v4f32.f32",
   10149   "llvm.nvvm.tex.3d.grad.v4s32.f32",
   10150   "llvm.nvvm.tex.3d.grad.v4u32.f32",
   10151   "llvm.nvvm.tex.3d.level.v4f32.f32",
   10152   "llvm.nvvm.tex.3d.level.v4s32.f32",
   10153   "llvm.nvvm.tex.3d.level.v4u32.f32",
   10154   "llvm.nvvm.tex.3d.v4f32.f32",
   10155   "llvm.nvvm.tex.3d.v4f32.s32",
   10156   "llvm.nvvm.tex.3d.v4s32.f32",
   10157   "llvm.nvvm.tex.3d.v4s32.s32",
   10158   "llvm.nvvm.tex.3d.v4u32.f32",
   10159   "llvm.nvvm.tex.3d.v4u32.s32",
   10160   "llvm.nvvm.tex.cube.array.level.v4f32.f32",
   10161   "llvm.nvvm.tex.cube.array.level.v4s32.f32",
   10162   "llvm.nvvm.tex.cube.array.level.v4u32.f32",
   10163   "llvm.nvvm.tex.cube.array.v4f32.f32",
   10164   "llvm.nvvm.tex.cube.array.v4s32.f32",
   10165   "llvm.nvvm.tex.cube.array.v4u32.f32",
   10166   "llvm.nvvm.tex.cube.level.v4f32.f32",
   10167   "llvm.nvvm.tex.cube.level.v4s32.f32",
   10168   "llvm.nvvm.tex.cube.level.v4u32.f32",
   10169   "llvm.nvvm.tex.cube.v4f32.f32",
   10170   "llvm.nvvm.tex.cube.v4s32.f32",
   10171   "llvm.nvvm.tex.cube.v4u32.f32",
   10172   "llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32",
   10173   "llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32",
   10174   "llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32",
   10175   "llvm.nvvm.tex.unified.1d.array.level.v4f32.f32",
   10176   "llvm.nvvm.tex.unified.1d.array.level.v4s32.f32",
   10177   "llvm.nvvm.tex.unified.1d.array.level.v4u32.f32",
   10178   "llvm.nvvm.tex.unified.1d.array.v4f32.f32",
   10179   "llvm.nvvm.tex.unified.1d.array.v4f32.s32",
   10180   "llvm.nvvm.tex.unified.1d.array.v4s32.f32",
   10181   "llvm.nvvm.tex.unified.1d.array.v4s32.s32",
   10182   "llvm.nvvm.tex.unified.1d.array.v4u32.f32",
   10183   "llvm.nvvm.tex.unified.1d.array.v4u32.s32",
   10184   "llvm.nvvm.tex.unified.1d.grad.v4f32.f32",
   10185   "llvm.nvvm.tex.unified.1d.grad.v4s32.f32",
   10186   "llvm.nvvm.tex.unified.1d.grad.v4u32.f32",
   10187   "llvm.nvvm.tex.unified.1d.level.v4f32.f32",
   10188   "llvm.nvvm.tex.unified.1d.level.v4s32.f32",
   10189   "llvm.nvvm.tex.unified.1d.level.v4u32.f32",
   10190   "llvm.nvvm.tex.unified.1d.v4f32.f32",
   10191   "llvm.nvvm.tex.unified.1d.v4f32.s32",
   10192   "llvm.nvvm.tex.unified.1d.v4s32.f32",
   10193   "llvm.nvvm.tex.unified.1d.v4s32.s32",
   10194   "llvm.nvvm.tex.unified.1d.v4u32.f32",
   10195   "llvm.nvvm.tex.unified.1d.v4u32.s32",
   10196   "llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32",
   10197   "llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32",
   10198   "llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32",
   10199   "llvm.nvvm.tex.unified.2d.array.level.v4f32.f32",
   10200   "llvm.nvvm.tex.unified.2d.array.level.v4s32.f32",
   10201   "llvm.nvvm.tex.unified.2d.array.level.v4u32.f32",
   10202   "llvm.nvvm.tex.unified.2d.array.v4f32.f32",
   10203   "llvm.nvvm.tex.unified.2d.array.v4f32.s32",
   10204   "llvm.nvvm.tex.unified.2d.array.v4s32.f32",
   10205   "llvm.nvvm.tex.unified.2d.array.v4s32.s32",
   10206   "llvm.nvvm.tex.unified.2d.array.v4u32.f32",
   10207   "llvm.nvvm.tex.unified.2d.array.v4u32.s32",
   10208   "llvm.nvvm.tex.unified.2d.grad.v4f32.f32",
   10209   "llvm.nvvm.tex.unified.2d.grad.v4s32.f32",
   10210   "llvm.nvvm.tex.unified.2d.grad.v4u32.f32",
   10211   "llvm.nvvm.tex.unified.2d.level.v4f32.f32",
   10212   "llvm.nvvm.tex.unified.2d.level.v4s32.f32",
   10213   "llvm.nvvm.tex.unified.2d.level.v4u32.f32",
   10214   "llvm.nvvm.tex.unified.2d.v4f32.f32",
   10215   "llvm.nvvm.tex.unified.2d.v4f32.s32",
   10216   "llvm.nvvm.tex.unified.2d.v4s32.f32",
   10217   "llvm.nvvm.tex.unified.2d.v4s32.s32",
   10218   "llvm.nvvm.tex.unified.2d.v4u32.f32",
   10219   "llvm.nvvm.tex.unified.2d.v4u32.s32",
   10220   "llvm.nvvm.tex.unified.3d.grad.v4f32.f32",
   10221   "llvm.nvvm.tex.unified.3d.grad.v4s32.f32",
   10222   "llvm.nvvm.tex.unified.3d.grad.v4u32.f32",
   10223   "llvm.nvvm.tex.unified.3d.level.v4f32.f32",
   10224   "llvm.nvvm.tex.unified.3d.level.v4s32.f32",
   10225   "llvm.nvvm.tex.unified.3d.level.v4u32.f32",
   10226   "llvm.nvvm.tex.unified.3d.v4f32.f32",
   10227   "llvm.nvvm.tex.unified.3d.v4f32.s32",
   10228   "llvm.nvvm.tex.unified.3d.v4s32.f32",
   10229   "llvm.nvvm.tex.unified.3d.v4s32.s32",
   10230   "llvm.nvvm.tex.unified.3d.v4u32.f32",
   10231   "llvm.nvvm.tex.unified.3d.v4u32.s32",
   10232   "llvm.nvvm.tex.unified.cube.array.level.v4f32.f32",
   10233   "llvm.nvvm.tex.unified.cube.array.level.v4s32.f32",
   10234   "llvm.nvvm.tex.unified.cube.array.level.v4u32.f32",
   10235   "llvm.nvvm.tex.unified.cube.array.v4f32.f32",
   10236   "llvm.nvvm.tex.unified.cube.array.v4s32.f32",
   10237   "llvm.nvvm.tex.unified.cube.array.v4u32.f32",
   10238   "llvm.nvvm.tex.unified.cube.level.v4f32.f32",
   10239   "llvm.nvvm.tex.unified.cube.level.v4s32.f32",
   10240   "llvm.nvvm.tex.unified.cube.level.v4u32.f32",
   10241   "llvm.nvvm.tex.unified.cube.v4f32.f32",
   10242   "llvm.nvvm.tex.unified.cube.v4s32.f32",
   10243   "llvm.nvvm.tex.unified.cube.v4u32.f32",
   10244   "llvm.nvvm.texsurf.handle",
   10245   "llvm.nvvm.texsurf.handle.internal",
   10246   "llvm.nvvm.tld4.a.2d.v4f32.f32",
   10247   "llvm.nvvm.tld4.a.2d.v4s32.f32",
   10248   "llvm.nvvm.tld4.a.2d.v4u32.f32",
   10249   "llvm.nvvm.tld4.b.2d.v4f32.f32",
   10250   "llvm.nvvm.tld4.b.2d.v4s32.f32",
   10251   "llvm.nvvm.tld4.b.2d.v4u32.f32",
   10252   "llvm.nvvm.tld4.g.2d.v4f32.f32",
   10253   "llvm.nvvm.tld4.g.2d.v4s32.f32",
   10254   "llvm.nvvm.tld4.g.2d.v4u32.f32",
   10255   "llvm.nvvm.tld4.r.2d.v4f32.f32",
   10256   "llvm.nvvm.tld4.r.2d.v4s32.f32",
   10257   "llvm.nvvm.tld4.r.2d.v4u32.f32",
   10258   "llvm.nvvm.tld4.unified.a.2d.v4f32.f32",
   10259   "llvm.nvvm.tld4.unified.a.2d.v4s32.f32",
   10260   "llvm.nvvm.tld4.unified.a.2d.v4u32.f32",
   10261   "llvm.nvvm.tld4.unified.b.2d.v4f32.f32",
   10262   "llvm.nvvm.tld4.unified.b.2d.v4s32.f32",
   10263   "llvm.nvvm.tld4.unified.b.2d.v4u32.f32",
   10264   "llvm.nvvm.tld4.unified.g.2d.v4f32.f32",
   10265   "llvm.nvvm.tld4.unified.g.2d.v4s32.f32",
   10266   "llvm.nvvm.tld4.unified.g.2d.v4u32.f32",
   10267   "llvm.nvvm.tld4.unified.r.2d.v4f32.f32",
   10268   "llvm.nvvm.tld4.unified.r.2d.v4s32.f32",
   10269   "llvm.nvvm.tld4.unified.r.2d.v4u32.f32",
   10270   "llvm.nvvm.trunc.d",
   10271   "llvm.nvvm.trunc.f",
   10272   "llvm.nvvm.trunc.ftz.f",
   10273   "llvm.nvvm.txq.array.size",
   10274   "llvm.nvvm.txq.channel.data.type",
   10275   "llvm.nvvm.txq.channel.order",
   10276   "llvm.nvvm.txq.depth",
   10277   "llvm.nvvm.txq.height",
   10278   "llvm.nvvm.txq.num.mipmap.levels",
   10279   "llvm.nvvm.txq.num.samples",
   10280   "llvm.nvvm.txq.width",
   10281   "llvm.nvvm.ui2d.rm",
   10282   "llvm.nvvm.ui2d.rn",
   10283   "llvm.nvvm.ui2d.rp",
   10284   "llvm.nvvm.ui2d.rz",
   10285   "llvm.nvvm.ui2f.rm",
   10286   "llvm.nvvm.ui2f.rn",
   10287   "llvm.nvvm.ui2f.rp",
   10288   "llvm.nvvm.ui2f.rz",
   10289   "llvm.nvvm.ull2d.rm",
   10290   "llvm.nvvm.ull2d.rn",
   10291   "llvm.nvvm.ull2d.rp",
   10292   "llvm.nvvm.ull2d.rz",
   10293   "llvm.nvvm.ull2f.rm",
   10294   "llvm.nvvm.ull2f.rn",
   10295   "llvm.nvvm.ull2f.rp",
   10296   "llvm.nvvm.ull2f.rz",
   10297   "llvm.nvvm.vote.all",
   10298   "llvm.nvvm.vote.all.sync",
   10299   "llvm.nvvm.vote.any",
   10300   "llvm.nvvm.vote.any.sync",
   10301   "llvm.nvvm.vote.ballot",
   10302   "llvm.nvvm.vote.ballot.sync",
   10303   "llvm.nvvm.vote.uni",
   10304   "llvm.nvvm.vote.uni.sync",
   10305   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.f16",
   10306   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.f16",
   10307   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.stride.f16",
   10308   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.f16",
   10309   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.stride.f16",
   10310   "llvm.nvvm.wmma.load.a.sync.col.m16n16k16.stride.f16",
   10311   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.f16",
   10312   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.f16",
   10313   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.stride.f16",
   10314   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.f16",
   10315   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.stride.f16",
   10316   "llvm.nvvm.wmma.load.a.sync.row.m16n16k16.stride.f16",
   10317   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.f16",
   10318   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.f16",
   10319   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.stride.f16",
   10320   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.f16",
   10321   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.stride.f16",
   10322   "llvm.nvvm.wmma.load.b.sync.col.m16n16k16.stride.f16",
   10323   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.f16",
   10324   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.f16",
   10325   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.stride.f16",
   10326   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.f16",
   10327   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.stride.f16",
   10328   "llvm.nvvm.wmma.load.b.sync.row.m16n16k16.stride.f16",
   10329   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f16",
   10330   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f32",
   10331   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f16",
   10332   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f32",
   10333   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f16",
   10334   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f32",
   10335   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f16",
   10336   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f32",
   10337   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f16",
   10338   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f32",
   10339   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f16",
   10340   "llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f32",
   10341   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f16",
   10342   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f32",
   10343   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f16",
   10344   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f32",
   10345   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f16",
   10346   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f32",
   10347   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f16",
   10348   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f32",
   10349   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f16",
   10350   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f32",
   10351   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f16",
   10352   "llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f32",
   10353   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16",
   10354   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16.satfinite",
   10355   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32",
   10356   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32.satfinite",
   10357   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16",
   10358   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16.satfinite",
   10359   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32",
   10360   "llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32.satfinite",
   10361   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16",
   10362   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16.satfinite",
   10363   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32",
   10364   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32.satfinite",
   10365   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16",
   10366   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16.satfinite",
   10367   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32",
   10368   "llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32.satfinite",
   10369   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16",
   10370   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16.satfinite",
   10371   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32",
   10372   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32.satfinite",
   10373   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16",
   10374   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16.satfinite",
   10375   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32",
   10376   "llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32.satfinite",
   10377   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16",
   10378   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16.satfinite",
   10379   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32",
   10380   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32.satfinite",
   10381   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16",
   10382   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16.satfinite",
   10383   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32",
   10384   "llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32.satfinite",
   10385   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f16",
   10386   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f32",
   10387   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f16",
   10388   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f32",
   10389   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f16",
   10390   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f32",
   10391   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f16",
   10392   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f32",
   10393   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f16",
   10394   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f32",
   10395   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f16",
   10396   "llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f32",
   10397   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f16",
   10398   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f32",
   10399   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f16",
   10400   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f32",
   10401   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f16",
   10402   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f32",
   10403   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f16",
   10404   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f32",
   10405   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f16",
   10406   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f32",
   10407   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f16",
   10408   "llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f32",
   10409   "llvm.ppc.altivec.crypto.vcipher",
   10410   "llvm.ppc.altivec.crypto.vcipherlast",
   10411   "llvm.ppc.altivec.crypto.vncipher",
   10412   "llvm.ppc.altivec.crypto.vncipherlast",
   10413   "llvm.ppc.altivec.crypto.vpermxor",
   10414   "llvm.ppc.altivec.crypto.vpmsumb",
   10415   "llvm.ppc.altivec.crypto.vpmsumd",
   10416   "llvm.ppc.altivec.crypto.vpmsumh",
   10417   "llvm.ppc.altivec.crypto.vpmsumw",
   10418   "llvm.ppc.altivec.crypto.vsbox",
   10419   "llvm.ppc.altivec.crypto.vshasigmad",
   10420   "llvm.ppc.altivec.crypto.vshasigmaw",
   10421   "llvm.ppc.altivec.dss",
   10422   "llvm.ppc.altivec.dssall",
   10423   "llvm.ppc.altivec.dst",
   10424   "llvm.ppc.altivec.dstst",
   10425   "llvm.ppc.altivec.dststt",
   10426   "llvm.ppc.altivec.dstt",
   10427   "llvm.ppc.altivec.lvebx",
   10428   "llvm.ppc.altivec.lvehx",
   10429   "llvm.ppc.altivec.lvewx",
   10430   "llvm.ppc.altivec.lvsl",
   10431   "llvm.ppc.altivec.lvsr",
   10432   "llvm.ppc.altivec.lvx",
   10433   "llvm.ppc.altivec.lvxl",
   10434   "llvm.ppc.altivec.mfvscr",
   10435   "llvm.ppc.altivec.mtvscr",
   10436   "llvm.ppc.altivec.stvebx",
   10437   "llvm.ppc.altivec.stvehx",
   10438   "llvm.ppc.altivec.stvewx",
   10439   "llvm.ppc.altivec.stvx",
   10440   "llvm.ppc.altivec.stvxl",
   10441   "llvm.ppc.altivec.vabsdub",
   10442   "llvm.ppc.altivec.vabsduh",
   10443   "llvm.ppc.altivec.vabsduw",
   10444   "llvm.ppc.altivec.vaddcuq",
   10445   "llvm.ppc.altivec.vaddcuw",
   10446   "llvm.ppc.altivec.vaddecuq",
   10447   "llvm.ppc.altivec.vaddeuqm",
   10448   "llvm.ppc.altivec.vaddsbs",
   10449   "llvm.ppc.altivec.vaddshs",
   10450   "llvm.ppc.altivec.vaddsws",
   10451   "llvm.ppc.altivec.vaddubs",
   10452   "llvm.ppc.altivec.vadduhs",
   10453   "llvm.ppc.altivec.vadduws",
   10454   "llvm.ppc.altivec.vavgsb",
   10455   "llvm.ppc.altivec.vavgsh",
   10456   "llvm.ppc.altivec.vavgsw",
   10457   "llvm.ppc.altivec.vavgub",
   10458   "llvm.ppc.altivec.vavguh",
   10459   "llvm.ppc.altivec.vavguw",
   10460   "llvm.ppc.altivec.vbpermq",
   10461   "llvm.ppc.altivec.vcfsx",
   10462   "llvm.ppc.altivec.vcfux",
   10463   "llvm.ppc.altivec.vclzlsbb",
   10464   "llvm.ppc.altivec.vcmpbfp",
   10465   "llvm.ppc.altivec.vcmpbfp.p",
   10466   "llvm.ppc.altivec.vcmpeqfp",
   10467   "llvm.ppc.altivec.vcmpeqfp.p",
   10468   "llvm.ppc.altivec.vcmpequb",
   10469   "llvm.ppc.altivec.vcmpequb.p",
   10470   "llvm.ppc.altivec.vcmpequd",
   10471   "llvm.ppc.altivec.vcmpequd.p",
   10472   "llvm.ppc.altivec.vcmpequh",
   10473   "llvm.ppc.altivec.vcmpequh.p",
   10474   "llvm.ppc.altivec.vcmpequw",
   10475   "llvm.ppc.altivec.vcmpequw.p",
   10476   "llvm.ppc.altivec.vcmpgefp",
   10477   "llvm.ppc.altivec.vcmpgefp.p",
   10478   "llvm.ppc.altivec.vcmpgtfp",
   10479   "llvm.ppc.altivec.vcmpgtfp.p",
   10480   "llvm.ppc.altivec.vcmpgtsb",
   10481   "llvm.ppc.altivec.vcmpgtsb.p",
   10482   "llvm.ppc.altivec.vcmpgtsd",
   10483   "llvm.ppc.altivec.vcmpgtsd.p",
   10484   "llvm.ppc.altivec.vcmpgtsh",
   10485   "llvm.ppc.altivec.vcmpgtsh.p",
   10486   "llvm.ppc.altivec.vcmpgtsw",
   10487   "llvm.ppc.altivec.vcmpgtsw.p",
   10488   "llvm.ppc.altivec.vcmpgtub",
   10489   "llvm.ppc.altivec.vcmpgtub.p",
   10490   "llvm.ppc.altivec.vcmpgtud",
   10491   "llvm.ppc.altivec.vcmpgtud.p",
   10492   "llvm.ppc.altivec.vcmpgtuh",
   10493   "llvm.ppc.altivec.vcmpgtuh.p",
   10494   "llvm.ppc.altivec.vcmpgtuw",
   10495   "llvm.ppc.altivec.vcmpgtuw.p",
   10496   "llvm.ppc.altivec.vcmpneb",
   10497   "llvm.ppc.altivec.vcmpneb.p",
   10498   "llvm.ppc.altivec.vcmpneh",
   10499   "llvm.ppc.altivec.vcmpneh.p",
   10500   "llvm.ppc.altivec.vcmpnew",
   10501   "llvm.ppc.altivec.vcmpnew.p",
   10502   "llvm.ppc.altivec.vcmpnezb",
   10503   "llvm.ppc.altivec.vcmpnezb.p",
   10504   "llvm.ppc.altivec.vcmpnezh",
   10505   "llvm.ppc.altivec.vcmpnezh.p",
   10506   "llvm.ppc.altivec.vcmpnezw",
   10507   "llvm.ppc.altivec.vcmpnezw.p",
   10508   "llvm.ppc.altivec.vctsxs",
   10509   "llvm.ppc.altivec.vctuxs",
   10510   "llvm.ppc.altivec.vctzlsbb",
   10511   "llvm.ppc.altivec.vexptefp",
   10512   "llvm.ppc.altivec.vgbbd",
   10513   "llvm.ppc.altivec.vlogefp",
   10514   "llvm.ppc.altivec.vmaddfp",
   10515   "llvm.ppc.altivec.vmaxfp",
   10516   "llvm.ppc.altivec.vmaxsb",
   10517   "llvm.ppc.altivec.vmaxsd",
   10518   "llvm.ppc.altivec.vmaxsh",
   10519   "llvm.ppc.altivec.vmaxsw",
   10520   "llvm.ppc.altivec.vmaxub",
   10521   "llvm.ppc.altivec.vmaxud",
   10522   "llvm.ppc.altivec.vmaxuh",
   10523   "llvm.ppc.altivec.vmaxuw",
   10524   "llvm.ppc.altivec.vmhaddshs",
   10525   "llvm.ppc.altivec.vmhraddshs",
   10526   "llvm.ppc.altivec.vminfp",
   10527   "llvm.ppc.altivec.vminsb",
   10528   "llvm.ppc.altivec.vminsd",
   10529   "llvm.ppc.altivec.vminsh",
   10530   "llvm.ppc.altivec.vminsw",
   10531   "llvm.ppc.altivec.vminub",
   10532   "llvm.ppc.altivec.vminud",
   10533   "llvm.ppc.altivec.vminuh",
   10534   "llvm.ppc.altivec.vminuw",
   10535   "llvm.ppc.altivec.vmladduhm",
   10536   "llvm.ppc.altivec.vmsummbm",
   10537   "llvm.ppc.altivec.vmsumshm",
   10538   "llvm.ppc.altivec.vmsumshs",
   10539   "llvm.ppc.altivec.vmsumubm",
   10540   "llvm.ppc.altivec.vmsumuhm",
   10541   "llvm.ppc.altivec.vmsumuhs",
   10542   "llvm.ppc.altivec.vmulesb",
   10543   "llvm.ppc.altivec.vmulesh",
   10544   "llvm.ppc.altivec.vmulesw",
   10545   "llvm.ppc.altivec.vmuleub",
   10546   "llvm.ppc.altivec.vmuleuh",
   10547   "llvm.ppc.altivec.vmuleuw",
   10548   "llvm.ppc.altivec.vmulosb",
   10549   "llvm.ppc.altivec.vmulosh",
   10550   "llvm.ppc.altivec.vmulosw",
   10551   "llvm.ppc.altivec.vmuloub",
   10552   "llvm.ppc.altivec.vmulouh",
   10553   "llvm.ppc.altivec.vmulouw",
   10554   "llvm.ppc.altivec.vnmsubfp",
   10555   "llvm.ppc.altivec.vperm",
   10556   "llvm.ppc.altivec.vpkpx",
   10557   "llvm.ppc.altivec.vpksdss",
   10558   "llvm.ppc.altivec.vpksdus",
   10559   "llvm.ppc.altivec.vpkshss",
   10560   "llvm.ppc.altivec.vpkshus",
   10561   "llvm.ppc.altivec.vpkswss",
   10562   "llvm.ppc.altivec.vpkswus",
   10563   "llvm.ppc.altivec.vpkudus",
   10564   "llvm.ppc.altivec.vpkuhus",
   10565   "llvm.ppc.altivec.vpkuwus",
   10566   "llvm.ppc.altivec.vprtybd",
   10567   "llvm.ppc.altivec.vprtybq",
   10568   "llvm.ppc.altivec.vprtybw",
   10569   "llvm.ppc.altivec.vrefp",
   10570   "llvm.ppc.altivec.vrfim",
   10571   "llvm.ppc.altivec.vrfin",
   10572   "llvm.ppc.altivec.vrfip",
   10573   "llvm.ppc.altivec.vrfiz",
   10574   "llvm.ppc.altivec.vrlb",
   10575   "llvm.ppc.altivec.vrld",
   10576   "llvm.ppc.altivec.vrldmi",
   10577   "llvm.ppc.altivec.vrldnm",
   10578   "llvm.ppc.altivec.vrlh",
   10579   "llvm.ppc.altivec.vrlw",
   10580   "llvm.ppc.altivec.vrlwmi",
   10581   "llvm.ppc.altivec.vrlwnm",
   10582   "llvm.ppc.altivec.vrsqrtefp",
   10583   "llvm.ppc.altivec.vsel",
   10584   "llvm.ppc.altivec.vsl",
   10585   "llvm.ppc.altivec.vslb",
   10586   "llvm.ppc.altivec.vslh",
   10587   "llvm.ppc.altivec.vslo",
   10588   "llvm.ppc.altivec.vslv",
   10589   "llvm.ppc.altivec.vslw",
   10590   "llvm.ppc.altivec.vsr",
   10591   "llvm.ppc.altivec.vsrab",
   10592   "llvm.ppc.altivec.vsrah",
   10593   "llvm.ppc.altivec.vsraw",
   10594   "llvm.ppc.altivec.vsrb",
   10595   "llvm.ppc.altivec.vsrh",
   10596   "llvm.ppc.altivec.vsro",
   10597   "llvm.ppc.altivec.vsrv",
   10598   "llvm.ppc.altivec.vsrw",
   10599   "llvm.ppc.altivec.vsubcuq",
   10600   "llvm.ppc.altivec.vsubcuw",
   10601   "llvm.ppc.altivec.vsubecuq",
   10602   "llvm.ppc.altivec.vsubeuqm",
   10603   "llvm.ppc.altivec.vsubsbs",
   10604   "llvm.ppc.altivec.vsubshs",
   10605   "llvm.ppc.altivec.vsubsws",
   10606   "llvm.ppc.altivec.vsububs",
   10607   "llvm.ppc.altivec.vsubuhs",
   10608   "llvm.ppc.altivec.vsubuws",
   10609   "llvm.ppc.altivec.vsum2sws",
   10610   "llvm.ppc.altivec.vsum4sbs",
   10611   "llvm.ppc.altivec.vsum4shs",
   10612   "llvm.ppc.altivec.vsum4ubs",
   10613   "llvm.ppc.altivec.vsumsws",
   10614   "llvm.ppc.altivec.vupkhpx",
   10615   "llvm.ppc.altivec.vupkhsb",
   10616   "llvm.ppc.altivec.vupkhsh",
   10617   "llvm.ppc.altivec.vupkhsw",
   10618   "llvm.ppc.altivec.vupklpx",
   10619   "llvm.ppc.altivec.vupklsb",
   10620   "llvm.ppc.altivec.vupklsh",
   10621   "llvm.ppc.altivec.vupklsw",
   10622   "llvm.ppc.bpermd",
   10623   "llvm.ppc.cfence",
   10624   "llvm.ppc.dcba",
   10625   "llvm.ppc.dcbf",
   10626   "llvm.ppc.dcbi",
   10627   "llvm.ppc.dcbst",
   10628   "llvm.ppc.dcbt",
   10629   "llvm.ppc.dcbtst",
   10630   "llvm.ppc.dcbz",
   10631   "llvm.ppc.dcbzl",
   10632   "llvm.ppc.divde",
   10633   "llvm.ppc.divdeu",
   10634   "llvm.ppc.divwe",
   10635   "llvm.ppc.divweu",
   10636   "llvm.ppc.get.texasr",
   10637   "llvm.ppc.get.texasru",
   10638   "llvm.ppc.get.tfhar",
   10639   "llvm.ppc.get.tfiar",
   10640   "llvm.ppc.is.decremented.ctr.nonzero",
   10641   "llvm.ppc.lwsync",
   10642   "llvm.ppc.mtctr",
   10643   "llvm.ppc.qpx.qvfabs",
   10644   "llvm.ppc.qpx.qvfadd",
   10645   "llvm.ppc.qpx.qvfadds",
   10646   "llvm.ppc.qpx.qvfcfid",
   10647   "llvm.ppc.qpx.qvfcfids",
   10648   "llvm.ppc.qpx.qvfcfidu",
   10649   "llvm.ppc.qpx.qvfcfidus",
   10650   "llvm.ppc.qpx.qvfcmpeq",
   10651   "llvm.ppc.qpx.qvfcmpgt",
   10652   "llvm.ppc.qpx.qvfcmplt",
   10653   "llvm.ppc.qpx.qvfcpsgn",
   10654   "llvm.ppc.qpx.qvfctid",
   10655   "llvm.ppc.qpx.qvfctidu",
   10656   "llvm.ppc.qpx.qvfctiduz",
   10657   "llvm.ppc.qpx.qvfctidz",
   10658   "llvm.ppc.qpx.qvfctiw",
   10659   "llvm.ppc.qpx.qvfctiwu",
   10660   "llvm.ppc.qpx.qvfctiwuz",
   10661   "llvm.ppc.qpx.qvfctiwz",
   10662   "llvm.ppc.qpx.qvflogical",
   10663   "llvm.ppc.qpx.qvfmadd",
   10664   "llvm.ppc.qpx.qvfmadds",
   10665   "llvm.ppc.qpx.qvfmsub",
   10666   "llvm.ppc.qpx.qvfmsubs",
   10667   "llvm.ppc.qpx.qvfmul",
   10668   "llvm.ppc.qpx.qvfmuls",
   10669   "llvm.ppc.qpx.qvfnabs",
   10670   "llvm.ppc.qpx.qvfneg",
   10671   "llvm.ppc.qpx.qvfnmadd",
   10672   "llvm.ppc.qpx.qvfnmadds",
   10673   "llvm.ppc.qpx.qvfnmsub",
   10674   "llvm.ppc.qpx.qvfnmsubs",
   10675   "llvm.ppc.qpx.qvfperm",
   10676   "llvm.ppc.qpx.qvfre",
   10677   "llvm.ppc.qpx.qvfres",
   10678   "llvm.ppc.qpx.qvfrim",
   10679   "llvm.ppc.qpx.qvfrin",
   10680   "llvm.ppc.qpx.qvfrip",
   10681   "llvm.ppc.qpx.qvfriz",
   10682   "llvm.ppc.qpx.qvfrsp",
   10683   "llvm.ppc.qpx.qvfrsqrte",
   10684   "llvm.ppc.qpx.qvfrsqrtes",
   10685   "llvm.ppc.qpx.qvfsel",
   10686   "llvm.ppc.qpx.qvfsub",
   10687   "llvm.ppc.qpx.qvfsubs",
   10688   "llvm.ppc.qpx.qvftstnan",
   10689   "llvm.ppc.qpx.qvfxmadd",
   10690   "llvm.ppc.qpx.qvfxmadds",
   10691   "llvm.ppc.qpx.qvfxmul",
   10692   "llvm.ppc.qpx.qvfxmuls",
   10693   "llvm.ppc.qpx.qvfxxcpnmadd",
   10694   "llvm.ppc.qpx.qvfxxcpnmadds",
   10695   "llvm.ppc.qpx.qvfxxmadd",
   10696   "llvm.ppc.qpx.qvfxxmadds",
   10697   "llvm.ppc.qpx.qvfxxnpmadd",
   10698   "llvm.ppc.qpx.qvfxxnpmadds",
   10699   "llvm.ppc.qpx.qvgpci",
   10700   "llvm.ppc.qpx.qvlfcd",
   10701   "llvm.ppc.qpx.qvlfcda",
   10702   "llvm.ppc.qpx.qvlfcs",
   10703   "llvm.ppc.qpx.qvlfcsa",
   10704   "llvm.ppc.qpx.qvlfd",
   10705   "llvm.ppc.qpx.qvlfda",
   10706   "llvm.ppc.qpx.qvlfiwa",
   10707   "llvm.ppc.qpx.qvlfiwaa",
   10708   "llvm.ppc.qpx.qvlfiwz",
   10709   "llvm.ppc.qpx.qvlfiwza",
   10710   "llvm.ppc.qpx.qvlfs",
   10711   "llvm.ppc.qpx.qvlfsa",
   10712   "llvm.ppc.qpx.qvlpcld",
   10713   "llvm.ppc.qpx.qvlpcls",
   10714   "llvm.ppc.qpx.qvlpcrd",
   10715   "llvm.ppc.qpx.qvlpcrs",
   10716   "llvm.ppc.qpx.qvstfcd",
   10717   "llvm.ppc.qpx.qvstfcda",
   10718   "llvm.ppc.qpx.qvstfcs",
   10719   "llvm.ppc.qpx.qvstfcsa",
   10720   "llvm.ppc.qpx.qvstfd",
   10721   "llvm.ppc.qpx.qvstfda",
   10722   "llvm.ppc.qpx.qvstfiw",
   10723   "llvm.ppc.qpx.qvstfiwa",
   10724   "llvm.ppc.qpx.qvstfs",
   10725   "llvm.ppc.qpx.qvstfsa",
   10726   "llvm.ppc.set.texasr",
   10727   "llvm.ppc.set.texasru",
   10728   "llvm.ppc.set.tfhar",
   10729   "llvm.ppc.set.tfiar",
   10730   "llvm.ppc.sync",
   10731   "llvm.ppc.tabort",
   10732   "llvm.ppc.tabortdc",
   10733   "llvm.ppc.tabortdci",
   10734   "llvm.ppc.tabortwc",
   10735   "llvm.ppc.tabortwci",
   10736   "llvm.ppc.tbegin",
   10737   "llvm.ppc.tcheck",
   10738   "llvm.ppc.tend",
   10739   "llvm.ppc.tendall",
   10740   "llvm.ppc.trechkpt",
   10741   "llvm.ppc.treclaim",
   10742   "llvm.ppc.tresume",
   10743   "llvm.ppc.tsr",
   10744   "llvm.ppc.tsuspend",
   10745   "llvm.ppc.ttest",
   10746   "llvm.ppc.vsx.lxvd2x",
   10747   "llvm.ppc.vsx.lxvd2x.be",
   10748   "llvm.ppc.vsx.lxvl",
   10749   "llvm.ppc.vsx.lxvll",
   10750   "llvm.ppc.vsx.lxvw4x",
   10751   "llvm.ppc.vsx.lxvw4x.be",
   10752   "llvm.ppc.vsx.stxvd2x",
   10753   "llvm.ppc.vsx.stxvd2x.be",
   10754   "llvm.ppc.vsx.stxvl",
   10755   "llvm.ppc.vsx.stxvll",
   10756   "llvm.ppc.vsx.stxvw4x",
   10757   "llvm.ppc.vsx.stxvw4x.be",
   10758   "llvm.ppc.vsx.xsmaxdp",
   10759   "llvm.ppc.vsx.xsmindp",
   10760   "llvm.ppc.vsx.xvcmpeqdp",
   10761   "llvm.ppc.vsx.xvcmpeqdp.p",
   10762   "llvm.ppc.vsx.xvcmpeqsp",
   10763   "llvm.ppc.vsx.xvcmpeqsp.p",
   10764   "llvm.ppc.vsx.xvcmpgedp",
   10765   "llvm.ppc.vsx.xvcmpgedp.p",
   10766   "llvm.ppc.vsx.xvcmpgesp",
   10767   "llvm.ppc.vsx.xvcmpgesp.p",
   10768   "llvm.ppc.vsx.xvcmpgtdp",
   10769   "llvm.ppc.vsx.xvcmpgtdp.p",
   10770   "llvm.ppc.vsx.xvcmpgtsp",
   10771   "llvm.ppc.vsx.xvcmpgtsp.p",
   10772   "llvm.ppc.vsx.xvcvdpsp",
   10773   "llvm.ppc.vsx.xvcvdpsxws",
   10774   "llvm.ppc.vsx.xvcvdpuxws",
   10775   "llvm.ppc.vsx.xvcvhpsp",
   10776   "llvm.ppc.vsx.xvcvspdp",
   10777   "llvm.ppc.vsx.xvcvsphp",
   10778   "llvm.ppc.vsx.xvcvsxdsp",
   10779   "llvm.ppc.vsx.xvcvsxwdp",
   10780   "llvm.ppc.vsx.xvcvuxdsp",
   10781   "llvm.ppc.vsx.xvcvuxwdp",
   10782   "llvm.ppc.vsx.xvdivdp",
   10783   "llvm.ppc.vsx.xvdivsp",
   10784   "llvm.ppc.vsx.xviexpdp",
   10785   "llvm.ppc.vsx.xviexpsp",
   10786   "llvm.ppc.vsx.xvmaxdp",
   10787   "llvm.ppc.vsx.xvmaxsp",
   10788   "llvm.ppc.vsx.xvmindp",
   10789   "llvm.ppc.vsx.xvminsp",
   10790   "llvm.ppc.vsx.xvrdpip",
   10791   "llvm.ppc.vsx.xvredp",
   10792   "llvm.ppc.vsx.xvresp",
   10793   "llvm.ppc.vsx.xvrspip",
   10794   "llvm.ppc.vsx.xvrsqrtedp",
   10795   "llvm.ppc.vsx.xvrsqrtesp",
   10796   "llvm.ppc.vsx.xvtstdcdp",
   10797   "llvm.ppc.vsx.xvtstdcsp",
   10798   "llvm.ppc.vsx.xvxexpdp",
   10799   "llvm.ppc.vsx.xvxexpsp",
   10800   "llvm.ppc.vsx.xvxsigdp",
   10801   "llvm.ppc.vsx.xvxsigsp",
   10802   "llvm.ppc.vsx.xxextractuw",
   10803   "llvm.ppc.vsx.xxinsertw",
   10804   "llvm.ppc.vsx.xxleqv",
   10805   "llvm.r600.cube",
   10806   "llvm.r600.group.barrier",
   10807   "llvm.r600.implicitarg.ptr",
   10808   "llvm.r600.rat.store.typed",
   10809   "llvm.r600.read.global.size.x",
   10810   "llvm.r600.read.global.size.y",
   10811   "llvm.r600.read.global.size.z",
   10812   "llvm.r600.read.local.size.x",
   10813   "llvm.r600.read.local.size.y",
   10814   "llvm.r600.read.local.size.z",
   10815   "llvm.r600.read.ngroups.x",
   10816   "llvm.r600.read.ngroups.y",
   10817   "llvm.r600.read.ngroups.z",
   10818   "llvm.r600.read.tgid.x",
   10819   "llvm.r600.read.tgid.y",
   10820   "llvm.r600.read.tgid.z",
   10821   "llvm.r600.read.tidig.x",
   10822   "llvm.r600.read.tidig.y",
   10823   "llvm.r600.read.tidig.z",
   10824   "llvm.r600.recipsqrt.clamped",
   10825   "llvm.r600.recipsqrt.ieee",
   10826   "llvm.s390.efpc",
   10827   "llvm.s390.etnd",
   10828   "llvm.s390.lcbb",
   10829   "llvm.s390.ntstg",
   10830   "llvm.s390.ppa.txassist",
   10831   "llvm.s390.sfpc",
   10832   "llvm.s390.tabort",
   10833   "llvm.s390.tbegin",
   10834   "llvm.s390.tbegin.nofloat",
   10835   "llvm.s390.tbeginc",
   10836   "llvm.s390.tdc",
   10837   "llvm.s390.tend",
   10838   "llvm.s390.vaccb",
   10839   "llvm.s390.vacccq",
   10840   "llvm.s390.vaccf",
   10841   "llvm.s390.vaccg",
   10842   "llvm.s390.vacch",
   10843   "llvm.s390.vaccq",
   10844   "llvm.s390.vacq",
   10845   "llvm.s390.vaq",
   10846   "llvm.s390.vavgb",
   10847   "llvm.s390.vavgf",
   10848   "llvm.s390.vavgg",
   10849   "llvm.s390.vavgh",
   10850   "llvm.s390.vavglb",
   10851   "llvm.s390.vavglf",
   10852   "llvm.s390.vavglg",
   10853   "llvm.s390.vavglh",
   10854   "llvm.s390.vbperm",
   10855   "llvm.s390.vceqbs",
   10856   "llvm.s390.vceqfs",
   10857   "llvm.s390.vceqgs",
   10858   "llvm.s390.vceqhs",
   10859   "llvm.s390.vchbs",
   10860   "llvm.s390.vchfs",
   10861   "llvm.s390.vchgs",
   10862   "llvm.s390.vchhs",
   10863   "llvm.s390.vchlbs",
   10864   "llvm.s390.vchlfs",
   10865   "llvm.s390.vchlgs",
   10866   "llvm.s390.vchlhs",
   10867   "llvm.s390.vcksm",
   10868   "llvm.s390.verimb",
   10869   "llvm.s390.verimf",
   10870   "llvm.s390.verimg",
   10871   "llvm.s390.verimh",
   10872   "llvm.s390.verllb",
   10873   "llvm.s390.verllf",
   10874   "llvm.s390.verllg",
   10875   "llvm.s390.verllh",
   10876   "llvm.s390.verllvb",
   10877   "llvm.s390.verllvf",
   10878   "llvm.s390.verllvg",
   10879   "llvm.s390.verllvh",
   10880   "llvm.s390.vfaeb",
   10881   "llvm.s390.vfaebs",
   10882   "llvm.s390.vfaef",
   10883   "llvm.s390.vfaefs",
   10884   "llvm.s390.vfaeh",
   10885   "llvm.s390.vfaehs",
   10886   "llvm.s390.vfaezb",
   10887   "llvm.s390.vfaezbs",
   10888   "llvm.s390.vfaezf",
   10889   "llvm.s390.vfaezfs",
   10890   "llvm.s390.vfaezh",
   10891   "llvm.s390.vfaezhs",
   10892   "llvm.s390.vfcedbs",
   10893   "llvm.s390.vfcesbs",
   10894   "llvm.s390.vfchdbs",
   10895   "llvm.s390.vfchedbs",
   10896   "llvm.s390.vfchesbs",
   10897   "llvm.s390.vfchsbs",
   10898   "llvm.s390.vfeeb",
   10899   "llvm.s390.vfeebs",
   10900   "llvm.s390.vfeef",
   10901   "llvm.s390.vfeefs",
   10902   "llvm.s390.vfeeh",
   10903   "llvm.s390.vfeehs",
   10904   "llvm.s390.vfeezb",
   10905   "llvm.s390.vfeezbs",
   10906   "llvm.s390.vfeezf",
   10907   "llvm.s390.vfeezfs",
   10908   "llvm.s390.vfeezh",
   10909   "llvm.s390.vfeezhs",
   10910   "llvm.s390.vfeneb",
   10911   "llvm.s390.vfenebs",
   10912   "llvm.s390.vfenef",
   10913   "llvm.s390.vfenefs",
   10914   "llvm.s390.vfeneh",
   10915   "llvm.s390.vfenehs",
   10916   "llvm.s390.vfenezb",
   10917   "llvm.s390.vfenezbs",
   10918   "llvm.s390.vfenezf",
   10919   "llvm.s390.vfenezfs",
   10920   "llvm.s390.vfenezh",
   10921   "llvm.s390.vfenezhs",
   10922   "llvm.s390.vfidb",
   10923   "llvm.s390.vfisb",
   10924   "llvm.s390.vfmaxdb",
   10925   "llvm.s390.vfmaxsb",
   10926   "llvm.s390.vfmindb",
   10927   "llvm.s390.vfminsb",
   10928   "llvm.s390.vftcidb",
   10929   "llvm.s390.vftcisb",
   10930   "llvm.s390.vgfmab",
   10931   "llvm.s390.vgfmaf",
   10932   "llvm.s390.vgfmag",
   10933   "llvm.s390.vgfmah",
   10934   "llvm.s390.vgfmb",
   10935   "llvm.s390.vgfmf",
   10936   "llvm.s390.vgfmg",
   10937   "llvm.s390.vgfmh",
   10938   "llvm.s390.vistrb",
   10939   "llvm.s390.vistrbs",
   10940   "llvm.s390.vistrf",
   10941   "llvm.s390.vistrfs",
   10942   "llvm.s390.vistrh",
   10943   "llvm.s390.vistrhs",
   10944   "llvm.s390.vlbb",
   10945   "llvm.s390.vll",
   10946   "llvm.s390.vlrl",
   10947   "llvm.s390.vmaeb",
   10948   "llvm.s390.vmaef",
   10949   "llvm.s390.vmaeh",
   10950   "llvm.s390.vmahb",
   10951   "llvm.s390.vmahf",
   10952   "llvm.s390.vmahh",
   10953   "llvm.s390.vmaleb",
   10954   "llvm.s390.vmalef",
   10955   "llvm.s390.vmaleh",
   10956   "llvm.s390.vmalhb",
   10957   "llvm.s390.vmalhf",
   10958   "llvm.s390.vmalhh",
   10959   "llvm.s390.vmalob",
   10960   "llvm.s390.vmalof",
   10961   "llvm.s390.vmaloh",
   10962   "llvm.s390.vmaob",
   10963   "llvm.s390.vmaof",
   10964   "llvm.s390.vmaoh",
   10965   "llvm.s390.vmeb",
   10966   "llvm.s390.vmef",
   10967   "llvm.s390.vmeh",
   10968   "llvm.s390.vmhb",
   10969   "llvm.s390.vmhf",
   10970   "llvm.s390.vmhh",
   10971   "llvm.s390.vmleb",
   10972   "llvm.s390.vmlef",
   10973   "llvm.s390.vmleh",
   10974   "llvm.s390.vmlhb",
   10975   "llvm.s390.vmlhf",
   10976   "llvm.s390.vmlhh",
   10977   "llvm.s390.vmlob",
   10978   "llvm.s390.vmlof",
   10979   "llvm.s390.vmloh",
   10980   "llvm.s390.vmob",
   10981   "llvm.s390.vmof",
   10982   "llvm.s390.vmoh",
   10983   "llvm.s390.vmslg",
   10984   "llvm.s390.vpdi",
   10985   "llvm.s390.vperm",
   10986   "llvm.s390.vpklsf",
   10987   "llvm.s390.vpklsfs",
   10988   "llvm.s390.vpklsg",
   10989   "llvm.s390.vpklsgs",
   10990   "llvm.s390.vpklsh",
   10991   "llvm.s390.vpklshs",
   10992   "llvm.s390.vpksf",
   10993   "llvm.s390.vpksfs",
   10994   "llvm.s390.vpksg",
   10995   "llvm.s390.vpksgs",
   10996   "llvm.s390.vpksh",
   10997   "llvm.s390.vpkshs",
   10998   "llvm.s390.vsbcbiq",
   10999   "llvm.s390.vsbiq",
   11000   "llvm.s390.vscbib",
   11001   "llvm.s390.vscbif",
   11002   "llvm.s390.vscbig",
   11003   "llvm.s390.vscbih",
   11004   "llvm.s390.vscbiq",
   11005   "llvm.s390.vsl",
   11006   "llvm.s390.vslb",
   11007   "llvm.s390.vsldb",
   11008   "llvm.s390.vsq",
   11009   "llvm.s390.vsra",
   11010   "llvm.s390.vsrab",
   11011   "llvm.s390.vsrl",
   11012   "llvm.s390.vsrlb",
   11013   "llvm.s390.vstl",
   11014   "llvm.s390.vstrcb",
   11015   "llvm.s390.vstrcbs",
   11016   "llvm.s390.vstrcf",
   11017   "llvm.s390.vstrcfs",
   11018   "llvm.s390.vstrch",
   11019   "llvm.s390.vstrchs",
   11020   "llvm.s390.vstrczb",
   11021   "llvm.s390.vstrczbs",
   11022   "llvm.s390.vstrczf",
   11023   "llvm.s390.vstrczfs",
   11024   "llvm.s390.vstrczh",
   11025   "llvm.s390.vstrczhs",
   11026   "llvm.s390.vstrl",
   11027   "llvm.s390.vsumb",
   11028   "llvm.s390.vsumgf",
   11029   "llvm.s390.vsumgh",
   11030   "llvm.s390.vsumh",
   11031   "llvm.s390.vsumqf",
   11032   "llvm.s390.vsumqg",
   11033   "llvm.s390.vtm",
   11034   "llvm.s390.vuphb",
   11035   "llvm.s390.vuphf",
   11036   "llvm.s390.vuphh",
   11037   "llvm.s390.vuplb",
   11038   "llvm.s390.vuplf",
   11039   "llvm.s390.vuplhb",
   11040   "llvm.s390.vuplhf",
   11041   "llvm.s390.vuplhh",
   11042   "llvm.s390.vuplhw",
   11043   "llvm.s390.vupllb",
   11044   "llvm.s390.vupllf",
   11045   "llvm.s390.vupllh",
   11046   "llvm.wasm.current.memory",
   11047   "llvm.wasm.grow.memory",
   11048   "llvm.wasm.rethrow",
   11049   "llvm.wasm.throw",
   11050   "llvm.x86.3dnow.pavgusb",
   11051   "llvm.x86.3dnow.pf2id",
   11052   "llvm.x86.3dnow.pfacc",
   11053   "llvm.x86.3dnow.pfadd",
   11054   "llvm.x86.3dnow.pfcmpeq",
   11055   "llvm.x86.3dnow.pfcmpge",
   11056   "llvm.x86.3dnow.pfcmpgt",
   11057   "llvm.x86.3dnow.pfmax",
   11058   "llvm.x86.3dnow.pfmin",
   11059   "llvm.x86.3dnow.pfmul",
   11060   "llvm.x86.3dnow.pfrcp",
   11061   "llvm.x86.3dnow.pfrcpit1",
   11062   "llvm.x86.3dnow.pfrcpit2",
   11063   "llvm.x86.3dnow.pfrsqit1",
   11064   "llvm.x86.3dnow.pfrsqrt",
   11065   "llvm.x86.3dnow.pfsub",
   11066   "llvm.x86.3dnow.pfsubr",
   11067   "llvm.x86.3dnow.pi2fd",
   11068   "llvm.x86.3dnow.pmulhrw",
   11069   "llvm.x86.3dnowa.pf2iw",
   11070   "llvm.x86.3dnowa.pfnacc",
   11071   "llvm.x86.3dnowa.pfpnacc",
   11072   "llvm.x86.3dnowa.pi2fw",
   11073   "llvm.x86.3dnowa.pswapd",
   11074   "llvm.x86.addcarry.u32",
   11075   "llvm.x86.addcarry.u64",
   11076   "llvm.x86.addcarryx.u32",
   11077   "llvm.x86.addcarryx.u64",
   11078   "llvm.x86.aesni.aesdec",
   11079   "llvm.x86.aesni.aesdeclast",
   11080   "llvm.x86.aesni.aesenc",
   11081   "llvm.x86.aesni.aesenclast",
   11082   "llvm.x86.aesni.aesimc",
   11083   "llvm.x86.aesni.aeskeygenassist",
   11084   "llvm.x86.avx.addsub.pd.256",
   11085   "llvm.x86.avx.addsub.ps.256",
   11086   "llvm.x86.avx.blendv.pd.256",
   11087   "llvm.x86.avx.blendv.ps.256",
   11088   "llvm.x86.avx.cmp.pd.256",
   11089   "llvm.x86.avx.cmp.ps.256",
   11090   "llvm.x86.avx.cvt.pd2.ps.256",
   11091   "llvm.x86.avx.cvt.pd2dq.256",
   11092   "llvm.x86.avx.cvt.ps2dq.256",
   11093   "llvm.x86.avx.cvtdq2.ps.256",
   11094   "llvm.x86.avx.cvtt.pd2dq.256",
   11095   "llvm.x86.avx.cvtt.ps2dq.256",
   11096   "llvm.x86.avx.dp.ps.256",
   11097   "llvm.x86.avx.hadd.pd.256",
   11098   "llvm.x86.avx.hadd.ps.256",
   11099   "llvm.x86.avx.hsub.pd.256",
   11100   "llvm.x86.avx.hsub.ps.256",
   11101   "llvm.x86.avx.ldu.dq.256",
   11102   "llvm.x86.avx.maskload.pd",
   11103   "llvm.x86.avx.maskload.pd.256",
   11104   "llvm.x86.avx.maskload.ps",
   11105   "llvm.x86.avx.maskload.ps.256",
   11106   "llvm.x86.avx.maskstore.pd",
   11107   "llvm.x86.avx.maskstore.pd.256",
   11108   "llvm.x86.avx.maskstore.ps",
   11109   "llvm.x86.avx.maskstore.ps.256",
   11110   "llvm.x86.avx.max.pd.256",
   11111   "llvm.x86.avx.max.ps.256",
   11112   "llvm.x86.avx.min.pd.256",
   11113   "llvm.x86.avx.min.ps.256",
   11114   "llvm.x86.avx.movmsk.pd.256",
   11115   "llvm.x86.avx.movmsk.ps.256",
   11116   "llvm.x86.avx.ptestc.256",
   11117   "llvm.x86.avx.ptestnzc.256",
   11118   "llvm.x86.avx.ptestz.256",
   11119   "llvm.x86.avx.rcp.ps.256",
   11120   "llvm.x86.avx.round.pd.256",
   11121   "llvm.x86.avx.round.ps.256",
   11122   "llvm.x86.avx.rsqrt.ps.256",
   11123   "llvm.x86.avx.sqrt.pd.256",
   11124   "llvm.x86.avx.sqrt.ps.256",
   11125   "llvm.x86.avx.vpermilvar.pd",
   11126   "llvm.x86.avx.vpermilvar.pd.256",
   11127   "llvm.x86.avx.vpermilvar.ps",
   11128   "llvm.x86.avx.vpermilvar.ps.256",
   11129   "llvm.x86.avx.vtestc.pd",
   11130   "llvm.x86.avx.vtestc.pd.256",
   11131   "llvm.x86.avx.vtestc.ps",
   11132   "llvm.x86.avx.vtestc.ps.256",
   11133   "llvm.x86.avx.vtestnzc.pd",
   11134   "llvm.x86.avx.vtestnzc.pd.256",
   11135   "llvm.x86.avx.vtestnzc.ps",
   11136   "llvm.x86.avx.vtestnzc.ps.256",
   11137   "llvm.x86.avx.vtestz.pd",
   11138   "llvm.x86.avx.vtestz.pd.256",
   11139   "llvm.x86.avx.vtestz.ps",
   11140   "llvm.x86.avx.vtestz.ps.256",
   11141   "llvm.x86.avx.vzeroall",
   11142   "llvm.x86.avx.vzeroupper",
   11143   "llvm.x86.avx2.gather.d.d",
   11144   "llvm.x86.avx2.gather.d.d.256",
   11145   "llvm.x86.avx2.gather.d.pd",
   11146   "llvm.x86.avx2.gather.d.pd.256",
   11147   "llvm.x86.avx2.gather.d.ps",
   11148   "llvm.x86.avx2.gather.d.ps.256",
   11149   "llvm.x86.avx2.gather.d.q",
   11150   "llvm.x86.avx2.gather.d.q.256",
   11151   "llvm.x86.avx2.gather.q.d",
   11152   "llvm.x86.avx2.gather.q.d.256",
   11153   "llvm.x86.avx2.gather.q.pd",
   11154   "llvm.x86.avx2.gather.q.pd.256",
   11155   "llvm.x86.avx2.gather.q.ps",
   11156   "llvm.x86.avx2.gather.q.ps.256",
   11157   "llvm.x86.avx2.gather.q.q",
   11158   "llvm.x86.avx2.gather.q.q.256",
   11159   "llvm.x86.avx2.maskload.d",
   11160   "llvm.x86.avx2.maskload.d.256",
   11161   "llvm.x86.avx2.maskload.q",
   11162   "llvm.x86.avx2.maskload.q.256",
   11163   "llvm.x86.avx2.maskstore.d",
   11164   "llvm.x86.avx2.maskstore.d.256",
   11165   "llvm.x86.avx2.maskstore.q",
   11166   "llvm.x86.avx2.maskstore.q.256",
   11167   "llvm.x86.avx2.mpsadbw",
   11168   "llvm.x86.avx2.packssdw",
   11169   "llvm.x86.avx2.packsswb",
   11170   "llvm.x86.avx2.packusdw",
   11171   "llvm.x86.avx2.packuswb",
   11172   "llvm.x86.avx2.padds.b",
   11173   "llvm.x86.avx2.padds.w",
   11174   "llvm.x86.avx2.paddus.b",
   11175   "llvm.x86.avx2.paddus.w",
   11176   "llvm.x86.avx2.pblendvb",
   11177   "llvm.x86.avx2.permd",
   11178   "llvm.x86.avx2.permps",
   11179   "llvm.x86.avx2.phadd.d",
   11180   "llvm.x86.avx2.phadd.sw",
   11181   "llvm.x86.avx2.phadd.w",
   11182   "llvm.x86.avx2.phsub.d",
   11183   "llvm.x86.avx2.phsub.sw",
   11184   "llvm.x86.avx2.phsub.w",
   11185   "llvm.x86.avx2.pmadd.ub.sw",
   11186   "llvm.x86.avx2.pmadd.wd",
   11187   "llvm.x86.avx2.pmovmskb",
   11188   "llvm.x86.avx2.pmul.dq",
   11189   "llvm.x86.avx2.pmul.hr.sw",
   11190   "llvm.x86.avx2.pmulh.w",
   11191   "llvm.x86.avx2.pmulhu.w",
   11192   "llvm.x86.avx2.pmulu.dq",
   11193   "llvm.x86.avx2.psad.bw",
   11194   "llvm.x86.avx2.pshuf.b",
   11195   "llvm.x86.avx2.psign.b",
   11196   "llvm.x86.avx2.psign.d",
   11197   "llvm.x86.avx2.psign.w",
   11198   "llvm.x86.avx2.psll.d",
   11199   "llvm.x86.avx2.psll.q",
   11200   "llvm.x86.avx2.psll.w",
   11201   "llvm.x86.avx2.pslli.d",
   11202   "llvm.x86.avx2.pslli.q",
   11203   "llvm.x86.avx2.pslli.w",
   11204   "llvm.x86.avx2.psllv.d",
   11205   "llvm.x86.avx2.psllv.d.256",
   11206   "llvm.x86.avx2.psllv.q",
   11207   "llvm.x86.avx2.psllv.q.256",
   11208   "llvm.x86.avx2.psra.d",
   11209   "llvm.x86.avx2.psra.w",
   11210   "llvm.x86.avx2.psrai.d",
   11211   "llvm.x86.avx2.psrai.w",
   11212   "llvm.x86.avx2.psrav.d",
   11213   "llvm.x86.avx2.psrav.d.256",
   11214   "llvm.x86.avx2.psrl.d",
   11215   "llvm.x86.avx2.psrl.q",
   11216   "llvm.x86.avx2.psrl.w",
   11217   "llvm.x86.avx2.psrli.d",
   11218   "llvm.x86.avx2.psrli.q",
   11219   "llvm.x86.avx2.psrli.w",
   11220   "llvm.x86.avx2.psrlv.d",
   11221   "llvm.x86.avx2.psrlv.d.256",
   11222   "llvm.x86.avx2.psrlv.q",
   11223   "llvm.x86.avx2.psrlv.q.256",
   11224   "llvm.x86.avx2.psubs.b",
   11225   "llvm.x86.avx2.psubs.w",
   11226   "llvm.x86.avx2.psubus.b",
   11227   "llvm.x86.avx2.psubus.w",
   11228   "llvm.x86.avx512.broadcastmb.128",
   11229   "llvm.x86.avx512.broadcastmb.256",
   11230   "llvm.x86.avx512.broadcastmb.512",
   11231   "llvm.x86.avx512.broadcastmw.128",
   11232   "llvm.x86.avx512.broadcastmw.256",
   11233   "llvm.x86.avx512.broadcastmw.512",
   11234   "llvm.x86.avx512.cvtb2mask.128",
   11235   "llvm.x86.avx512.cvtb2mask.256",
   11236   "llvm.x86.avx512.cvtb2mask.512",
   11237   "llvm.x86.avx512.cvtd2mask.128",
   11238   "llvm.x86.avx512.cvtd2mask.256",
   11239   "llvm.x86.avx512.cvtd2mask.512",
   11240   "llvm.x86.avx512.cvtq2mask.128",
   11241   "llvm.x86.avx512.cvtq2mask.256",
   11242   "llvm.x86.avx512.cvtq2mask.512",
   11243   "llvm.x86.avx512.cvtsi2sd64",
   11244   "llvm.x86.avx512.cvtsi2ss32",
   11245   "llvm.x86.avx512.cvtsi2ss64",
   11246   "llvm.x86.avx512.cvttsd2si",
   11247   "llvm.x86.avx512.cvttsd2si64",
   11248   "llvm.x86.avx512.cvttsd2usi",
   11249   "llvm.x86.avx512.cvttsd2usi64",
   11250   "llvm.x86.avx512.cvttss2si",
   11251   "llvm.x86.avx512.cvttss2si64",
   11252   "llvm.x86.avx512.cvttss2usi",
   11253   "llvm.x86.avx512.cvttss2usi64",
   11254   "llvm.x86.avx512.cvtusi2sd",
   11255   "llvm.x86.avx512.cvtusi2ss",
   11256   "llvm.x86.avx512.cvtusi642sd",
   11257   "llvm.x86.avx512.cvtusi642ss",
   11258   "llvm.x86.avx512.cvtw2mask.128",
   11259   "llvm.x86.avx512.cvtw2mask.256",
   11260   "llvm.x86.avx512.cvtw2mask.512",
   11261   "llvm.x86.avx512.exp2.pd",
   11262   "llvm.x86.avx512.exp2.ps",
   11263   "llvm.x86.avx512.gather.dpd.512",
   11264   "llvm.x86.avx512.gather.dpi.512",
   11265   "llvm.x86.avx512.gather.dpq.512",
   11266   "llvm.x86.avx512.gather.dps.512",
   11267   "llvm.x86.avx512.gather.qpd.512",
   11268   "llvm.x86.avx512.gather.qpi.512",
   11269   "llvm.x86.avx512.gather.qpq.512",
   11270   "llvm.x86.avx512.gather.qps.512",
   11271   "llvm.x86.avx512.gather3div2.df",
   11272   "llvm.x86.avx512.gather3div2.di",
   11273   "llvm.x86.avx512.gather3div4.df",
   11274   "llvm.x86.avx512.gather3div4.di",
   11275   "llvm.x86.avx512.gather3div4.sf",
   11276   "llvm.x86.avx512.gather3div4.si",
   11277   "llvm.x86.avx512.gather3div8.sf",
   11278   "llvm.x86.avx512.gather3div8.si",
   11279   "llvm.x86.avx512.gather3siv2.df",
   11280   "llvm.x86.avx512.gather3siv2.di",
   11281   "llvm.x86.avx512.gather3siv4.df",
   11282   "llvm.x86.avx512.gather3siv4.di",
   11283   "llvm.x86.avx512.gather3siv4.sf",
   11284   "llvm.x86.avx512.gather3siv4.si",
   11285   "llvm.x86.avx512.gather3siv8.sf",
   11286   "llvm.x86.avx512.gather3siv8.si",
   11287   "llvm.x86.avx512.gatherpf.dpd.512",
   11288   "llvm.x86.avx512.gatherpf.dps.512",
   11289   "llvm.x86.avx512.gatherpf.qpd.512",
   11290   "llvm.x86.avx512.gatherpf.qps.512",
   11291   "llvm.x86.avx512.kand.w",
   11292   "llvm.x86.avx512.kandn.w",
   11293   "llvm.x86.avx512.knot.w",
   11294   "llvm.x86.avx512.kor.w",
   11295   "llvm.x86.avx512.kortestc.w",
   11296   "llvm.x86.avx512.kortestz.w",
   11297   "llvm.x86.avx512.kunpck.bw",
   11298   "llvm.x86.avx512.kunpck.dq",
   11299   "llvm.x86.avx512.kunpck.wd",
   11300   "llvm.x86.avx512.kxnor.w",
   11301   "llvm.x86.avx512.kxor.w",
   11302   "llvm.x86.avx512.mask.add.pd.512",
   11303   "llvm.x86.avx512.mask.add.ps.512",
   11304   "llvm.x86.avx512.mask.add.sd.round",
   11305   "llvm.x86.avx512.mask.add.ss.round",
   11306   "llvm.x86.avx512.mask.cmp.pd.128",
   11307   "llvm.x86.avx512.mask.cmp.pd.256",
   11308   "llvm.x86.avx512.mask.cmp.pd.512",
   11309   "llvm.x86.avx512.mask.cmp.ps.128",
   11310   "llvm.x86.avx512.mask.cmp.ps.256",
   11311   "llvm.x86.avx512.mask.cmp.ps.512",
   11312   "llvm.x86.avx512.mask.cmp.sd",
   11313   "llvm.x86.avx512.mask.cmp.ss",
   11314   "llvm.x86.avx512.mask.compress.d.128",
   11315   "llvm.x86.avx512.mask.compress.d.256",
   11316   "llvm.x86.avx512.mask.compress.d.512",
   11317   "llvm.x86.avx512.mask.compress.pd.128",
   11318   "llvm.x86.avx512.mask.compress.pd.256",
   11319   "llvm.x86.avx512.mask.compress.pd.512",
   11320   "llvm.x86.avx512.mask.compress.ps.128",
   11321   "llvm.x86.avx512.mask.compress.ps.256",
   11322   "llvm.x86.avx512.mask.compress.ps.512",
   11323   "llvm.x86.avx512.mask.compress.q.128",
   11324   "llvm.x86.avx512.mask.compress.q.256",
   11325   "llvm.x86.avx512.mask.compress.q.512",
   11326   "llvm.x86.avx512.mask.compress.store.d.128",
   11327   "llvm.x86.avx512.mask.compress.store.d.256",
   11328   "llvm.x86.avx512.mask.compress.store.d.512",
   11329   "llvm.x86.avx512.mask.compress.store.pd.128",
   11330   "llvm.x86.avx512.mask.compress.store.pd.256",
   11331   "llvm.x86.avx512.mask.compress.store.pd.512",
   11332   "llvm.x86.avx512.mask.compress.store.ps.128",
   11333   "llvm.x86.avx512.mask.compress.store.ps.256",
   11334   "llvm.x86.avx512.mask.compress.store.ps.512",
   11335   "llvm.x86.avx512.mask.compress.store.q.128",
   11336   "llvm.x86.avx512.mask.compress.store.q.256",
   11337   "llvm.x86.avx512.mask.compress.store.q.512",
   11338   "llvm.x86.avx512.mask.conflict.d.128",
   11339   "llvm.x86.avx512.mask.conflict.d.256",
   11340   "llvm.x86.avx512.mask.conflict.d.512",
   11341   "llvm.x86.avx512.mask.conflict.q.128",
   11342   "llvm.x86.avx512.mask.conflict.q.256",
   11343   "llvm.x86.avx512.mask.conflict.q.512",
   11344   "llvm.x86.avx512.mask.cvtdq2ps.128",
   11345   "llvm.x86.avx512.mask.cvtdq2ps.256",
   11346   "llvm.x86.avx512.mask.cvtdq2ps.512",
   11347   "llvm.x86.avx512.mask.cvtpd2dq.128",
   11348   "llvm.x86.avx512.mask.cvtpd2dq.256",
   11349   "llvm.x86.avx512.mask.cvtpd2dq.512",
   11350   "llvm.x86.avx512.mask.cvtpd2ps",
   11351   "llvm.x86.avx512.mask.cvtpd2ps.256",
   11352   "llvm.x86.avx512.mask.cvtpd2ps.512",
   11353   "llvm.x86.avx512.mask.cvtpd2qq.128",
   11354   "llvm.x86.avx512.mask.cvtpd2qq.256",
   11355   "llvm.x86.avx512.mask.cvtpd2qq.512",
   11356   "llvm.x86.avx512.mask.cvtpd2udq.128",
   11357   "llvm.x86.avx512.mask.cvtpd2udq.256",
   11358   "llvm.x86.avx512.mask.cvtpd2udq.512",
   11359   "llvm.x86.avx512.mask.cvtpd2uqq.128",
   11360   "llvm.x86.avx512.mask.cvtpd2uqq.256",
   11361   "llvm.x86.avx512.mask.cvtpd2uqq.512",
   11362   "llvm.x86.avx512.mask.cvtps2dq.128",
   11363   "llvm.x86.avx512.mask.cvtps2dq.256",
   11364   "llvm.x86.avx512.mask.cvtps2dq.512",
   11365   "llvm.x86.avx512.mask.cvtps2pd.128",
   11366   "llvm.x86.avx512.mask.cvtps2pd.256",
   11367   "llvm.x86.avx512.mask.cvtps2pd.512",
   11368   "llvm.x86.avx512.mask.cvtps2qq.128",
   11369   "llvm.x86.avx512.mask.cvtps2qq.256",
   11370   "llvm.x86.avx512.mask.cvtps2qq.512",
   11371   "llvm.x86.avx512.mask.cvtps2udq.128",
   11372   "llvm.x86.avx512.mask.cvtps2udq.256",
   11373   "llvm.x86.avx512.mask.cvtps2udq.512",
   11374   "llvm.x86.avx512.mask.cvtps2uqq.128",
   11375   "llvm.x86.avx512.mask.cvtps2uqq.256",
   11376   "llvm.x86.avx512.mask.cvtps2uqq.512",
   11377   "llvm.x86.avx512.mask.cvtqq2pd.128",
   11378   "llvm.x86.avx512.mask.cvtqq2pd.256",
   11379   "llvm.x86.avx512.mask.cvtqq2pd.512",
   11380   "llvm.x86.avx512.mask.cvtqq2ps.128",
   11381   "llvm.x86.avx512.mask.cvtqq2ps.256",
   11382   "llvm.x86.avx512.mask.cvtqq2ps.512",
   11383   "llvm.x86.avx512.mask.cvtsd2ss.round",
   11384   "llvm.x86.avx512.mask.cvtss2sd.round",
   11385   "llvm.x86.avx512.mask.cvttpd2dq.128",
   11386   "llvm.x86.avx512.mask.cvttpd2dq.256",
   11387   "llvm.x86.avx512.mask.cvttpd2dq.512",
   11388   "llvm.x86.avx512.mask.cvttpd2qq.128",
   11389   "llvm.x86.avx512.mask.cvttpd2qq.256",
   11390   "llvm.x86.avx512.mask.cvttpd2qq.512",
   11391   "llvm.x86.avx512.mask.cvttpd2udq.128",
   11392   "llvm.x86.avx512.mask.cvttpd2udq.256",
   11393   "llvm.x86.avx512.mask.cvttpd2udq.512",
   11394   "llvm.x86.avx512.mask.cvttpd2uqq.128",
   11395   "llvm.x86.avx512.mask.cvttpd2uqq.256",
   11396   "llvm.x86.avx512.mask.cvttpd2uqq.512",
   11397   "llvm.x86.avx512.mask.cvttps2dq.128",
   11398   "llvm.x86.avx512.mask.cvttps2dq.256",
   11399   "llvm.x86.avx512.mask.cvttps2dq.512",
   11400   "llvm.x86.avx512.mask.cvttps2qq.128",
   11401   "llvm.x86.avx512.mask.cvttps2qq.256",
   11402   "llvm.x86.avx512.mask.cvttps2qq.512",
   11403   "llvm.x86.avx512.mask.cvttps2udq.128",
   11404   "llvm.x86.avx512.mask.cvttps2udq.256",
   11405   "llvm.x86.avx512.mask.cvttps2udq.512",
   11406   "llvm.x86.avx512.mask.cvttps2uqq.128",
   11407   "llvm.x86.avx512.mask.cvttps2uqq.256",
   11408   "llvm.x86.avx512.mask.cvttps2uqq.512",
   11409   "llvm.x86.avx512.mask.cvtudq2ps.128",
   11410   "llvm.x86.avx512.mask.cvtudq2ps.256",
   11411   "llvm.x86.avx512.mask.cvtudq2ps.512",
   11412   "llvm.x86.avx512.mask.cvtuqq2pd.128",
   11413   "llvm.x86.avx512.mask.cvtuqq2pd.256",
   11414   "llvm.x86.avx512.mask.cvtuqq2pd.512",
   11415   "llvm.x86.avx512.mask.cvtuqq2ps.128",
   11416   "llvm.x86.avx512.mask.cvtuqq2ps.256",
   11417   "llvm.x86.avx512.mask.cvtuqq2ps.512",
   11418   "llvm.x86.avx512.mask.dbpsadbw.128",
   11419   "llvm.x86.avx512.mask.dbpsadbw.256",
   11420   "llvm.x86.avx512.mask.dbpsadbw.512",
   11421   "llvm.x86.avx512.mask.div.pd.512",
   11422   "llvm.x86.avx512.mask.div.ps.512",
   11423   "llvm.x86.avx512.mask.div.sd.round",
   11424   "llvm.x86.avx512.mask.div.ss.round",
   11425   "llvm.x86.avx512.mask.expand.d.128",
   11426   "llvm.x86.avx512.mask.expand.d.256",
   11427   "llvm.x86.avx512.mask.expand.d.512",
   11428   "llvm.x86.avx512.mask.expand.load.d.128",
   11429   "llvm.x86.avx512.mask.expand.load.d.256",
   11430   "llvm.x86.avx512.mask.expand.load.d.512",
   11431   "llvm.x86.avx512.mask.expand.load.pd.128",
   11432   "llvm.x86.avx512.mask.expand.load.pd.256",
   11433   "llvm.x86.avx512.mask.expand.load.pd.512",
   11434   "llvm.x86.avx512.mask.expand.load.ps.128",
   11435   "llvm.x86.avx512.mask.expand.load.ps.256",
   11436   "llvm.x86.avx512.mask.expand.load.ps.512",
   11437   "llvm.x86.avx512.mask.expand.load.q.128",
   11438   "llvm.x86.avx512.mask.expand.load.q.256",
   11439   "llvm.x86.avx512.mask.expand.load.q.512",
   11440   "llvm.x86.avx512.mask.expand.pd.128",
   11441   "llvm.x86.avx512.mask.expand.pd.256",
   11442   "llvm.x86.avx512.mask.expand.pd.512",
   11443   "llvm.x86.avx512.mask.expand.ps.128",
   11444   "llvm.x86.avx512.mask.expand.ps.256",
   11445   "llvm.x86.avx512.mask.expand.ps.512",
   11446   "llvm.x86.avx512.mask.expand.q.128",
   11447   "llvm.x86.avx512.mask.expand.q.256",
   11448   "llvm.x86.avx512.mask.expand.q.512",
   11449   "llvm.x86.avx512.mask.fixupimm.pd.128",
   11450   "llvm.x86.avx512.mask.fixupimm.pd.256",
   11451   "llvm.x86.avx512.mask.fixupimm.pd.512",
   11452   "llvm.x86.avx512.mask.fixupimm.ps.128",
   11453   "llvm.x86.avx512.mask.fixupimm.ps.256",
   11454   "llvm.x86.avx512.mask.fixupimm.ps.512",
   11455   "llvm.x86.avx512.mask.fixupimm.sd",
   11456   "llvm.x86.avx512.mask.fixupimm.ss",
   11457   "llvm.x86.avx512.mask.fpclass.pd.128",
   11458   "llvm.x86.avx512.mask.fpclass.pd.256",
   11459   "llvm.x86.avx512.mask.fpclass.pd.512",
   11460   "llvm.x86.avx512.mask.fpclass.ps.128",
   11461   "llvm.x86.avx512.mask.fpclass.ps.256",
   11462   "llvm.x86.avx512.mask.fpclass.ps.512",
   11463   "llvm.x86.avx512.mask.fpclass.sd",
   11464   "llvm.x86.avx512.mask.fpclass.ss",
   11465   "llvm.x86.avx512.mask.getexp.pd.128",
   11466   "llvm.x86.avx512.mask.getexp.pd.256",
   11467   "llvm.x86.avx512.mask.getexp.pd.512",
   11468   "llvm.x86.avx512.mask.getexp.ps.128",
   11469   "llvm.x86.avx512.mask.getexp.ps.256",
   11470   "llvm.x86.avx512.mask.getexp.ps.512",
   11471   "llvm.x86.avx512.mask.getexp.sd",
   11472   "llvm.x86.avx512.mask.getexp.ss",
   11473   "llvm.x86.avx512.mask.getmant.pd.128",
   11474   "llvm.x86.avx512.mask.getmant.pd.256",
   11475   "llvm.x86.avx512.mask.getmant.pd.512",
   11476   "llvm.x86.avx512.mask.getmant.ps.128",
   11477   "llvm.x86.avx512.mask.getmant.ps.256",
   11478   "llvm.x86.avx512.mask.getmant.ps.512",
   11479   "llvm.x86.avx512.mask.getmant.sd",
   11480   "llvm.x86.avx512.mask.getmant.ss",
   11481   "llvm.x86.avx512.mask.max.pd.512",
   11482   "llvm.x86.avx512.mask.max.ps.512",
   11483   "llvm.x86.avx512.mask.max.sd.round",
   11484   "llvm.x86.avx512.mask.max.ss.round",
   11485   "llvm.x86.avx512.mask.min.pd.512",
   11486   "llvm.x86.avx512.mask.min.ps.512",
   11487   "llvm.x86.avx512.mask.min.sd.round",
   11488   "llvm.x86.avx512.mask.min.ss.round",
   11489   "llvm.x86.avx512.mask.mul.pd.512",
   11490   "llvm.x86.avx512.mask.mul.ps.512",
   11491   "llvm.x86.avx512.mask.mul.sd.round",
   11492   "llvm.x86.avx512.mask.mul.ss.round",
   11493   "llvm.x86.avx512.mask.padds.b.128",
   11494   "llvm.x86.avx512.mask.padds.b.256",
   11495   "llvm.x86.avx512.mask.padds.b.512",
   11496   "llvm.x86.avx512.mask.padds.w.128",
   11497   "llvm.x86.avx512.mask.padds.w.256",
   11498   "llvm.x86.avx512.mask.padds.w.512",
   11499   "llvm.x86.avx512.mask.paddus.b.128",
   11500   "llvm.x86.avx512.mask.paddus.b.256",
   11501   "llvm.x86.avx512.mask.paddus.b.512",
   11502   "llvm.x86.avx512.mask.paddus.w.128",
   11503   "llvm.x86.avx512.mask.paddus.w.256",
   11504   "llvm.x86.avx512.mask.paddus.w.512",
   11505   "llvm.x86.avx512.mask.permvar.df.256",
   11506   "llvm.x86.avx512.mask.permvar.df.512",
   11507   "llvm.x86.avx512.mask.permvar.di.256",
   11508   "llvm.x86.avx512.mask.permvar.di.512",
   11509   "llvm.x86.avx512.mask.permvar.hi.128",
   11510   "llvm.x86.avx512.mask.permvar.hi.256",
   11511   "llvm.x86.avx512.mask.permvar.hi.512",
   11512   "llvm.x86.avx512.mask.permvar.qi.128",
   11513   "llvm.x86.avx512.mask.permvar.qi.256",
   11514   "llvm.x86.avx512.mask.permvar.qi.512",
   11515   "llvm.x86.avx512.mask.permvar.sf.256",
   11516   "llvm.x86.avx512.mask.permvar.sf.512",
   11517   "llvm.x86.avx512.mask.permvar.si.256",
   11518   "llvm.x86.avx512.mask.permvar.si.512",
   11519   "llvm.x86.avx512.mask.pmaddubs.w.128",
   11520   "llvm.x86.avx512.mask.pmaddubs.w.256",
   11521   "llvm.x86.avx512.mask.pmaddubs.w.512",
   11522   "llvm.x86.avx512.mask.pmaddw.d.128",
   11523   "llvm.x86.avx512.mask.pmaddw.d.256",
   11524   "llvm.x86.avx512.mask.pmaddw.d.512",
   11525   "llvm.x86.avx512.mask.pmov.db.128",
   11526   "llvm.x86.avx512.mask.pmov.db.256",
   11527   "llvm.x86.avx512.mask.pmov.db.512",
   11528   "llvm.x86.avx512.mask.pmov.db.mem.128",
   11529   "llvm.x86.avx512.mask.pmov.db.mem.256",
   11530   "llvm.x86.avx512.mask.pmov.db.mem.512",
   11531   "llvm.x86.avx512.mask.pmov.dw.128",
   11532   "llvm.x86.avx512.mask.pmov.dw.256",
   11533   "llvm.x86.avx512.mask.pmov.dw.512",
   11534   "llvm.x86.avx512.mask.pmov.dw.mem.128",
   11535   "llvm.x86.avx512.mask.pmov.dw.mem.256",
   11536   "llvm.x86.avx512.mask.pmov.dw.mem.512",
   11537   "llvm.x86.avx512.mask.pmov.qb.128",
   11538   "llvm.x86.avx512.mask.pmov.qb.256",
   11539   "llvm.x86.avx512.mask.pmov.qb.512",
   11540   "llvm.x86.avx512.mask.pmov.qb.mem.128",
   11541   "llvm.x86.avx512.mask.pmov.qb.mem.256",
   11542   "llvm.x86.avx512.mask.pmov.qb.mem.512",
   11543   "llvm.x86.avx512.mask.pmov.qd.128",
   11544   "llvm.x86.avx512.mask.pmov.qd.256",
   11545   "llvm.x86.avx512.mask.pmov.qd.512",
   11546   "llvm.x86.avx512.mask.pmov.qd.mem.128",
   11547   "llvm.x86.avx512.mask.pmov.qd.mem.256",
   11548   "llvm.x86.avx512.mask.pmov.qd.mem.512",
   11549   "llvm.x86.avx512.mask.pmov.qw.128",
   11550   "llvm.x86.avx512.mask.pmov.qw.256",
   11551   "llvm.x86.avx512.mask.pmov.qw.512",
   11552   "llvm.x86.avx512.mask.pmov.qw.mem.128",
   11553   "llvm.x86.avx512.mask.pmov.qw.mem.256",
   11554   "llvm.x86.avx512.mask.pmov.qw.mem.512",
   11555   "llvm.x86.avx512.mask.pmov.wb.128",
   11556   "llvm.x86.avx512.mask.pmov.wb.256",
   11557   "llvm.x86.avx512.mask.pmov.wb.512",
   11558   "llvm.x86.avx512.mask.pmov.wb.mem.128",
   11559   "llvm.x86.avx512.mask.pmov.wb.mem.256",
   11560   "llvm.x86.avx512.mask.pmov.wb.mem.512",
   11561   "llvm.x86.avx512.mask.pmovs.db.128",
   11562   "llvm.x86.avx512.mask.pmovs.db.256",
   11563   "llvm.x86.avx512.mask.pmovs.db.512",
   11564   "llvm.x86.avx512.mask.pmovs.db.mem.128",
   11565   "llvm.x86.avx512.mask.pmovs.db.mem.256",
   11566   "llvm.x86.avx512.mask.pmovs.db.mem.512",
   11567   "llvm.x86.avx512.mask.pmovs.dw.128",
   11568   "llvm.x86.avx512.mask.pmovs.dw.256",
   11569   "llvm.x86.avx512.mask.pmovs.dw.512",
   11570   "llvm.x86.avx512.mask.pmovs.dw.mem.128",
   11571   "llvm.x86.avx512.mask.pmovs.dw.mem.256",
   11572   "llvm.x86.avx512.mask.pmovs.dw.mem.512",
   11573   "llvm.x86.avx512.mask.pmovs.qb.128",
   11574   "llvm.x86.avx512.mask.pmovs.qb.256",
   11575   "llvm.x86.avx512.mask.pmovs.qb.512",
   11576   "llvm.x86.avx512.mask.pmovs.qb.mem.128",
   11577   "llvm.x86.avx512.mask.pmovs.qb.mem.256",
   11578   "llvm.x86.avx512.mask.pmovs.qb.mem.512",
   11579   "llvm.x86.avx512.mask.pmovs.qd.128",
   11580   "llvm.x86.avx512.mask.pmovs.qd.256",
   11581   "llvm.x86.avx512.mask.pmovs.qd.512",
   11582   "llvm.x86.avx512.mask.pmovs.qd.mem.128",
   11583   "llvm.x86.avx512.mask.pmovs.qd.mem.256",
   11584   "llvm.x86.avx512.mask.pmovs.qd.mem.512",
   11585   "llvm.x86.avx512.mask.pmovs.qw.128",
   11586   "llvm.x86.avx512.mask.pmovs.qw.256",
   11587   "llvm.x86.avx512.mask.pmovs.qw.512",
   11588   "llvm.x86.avx512.mask.pmovs.qw.mem.128",
   11589   "llvm.x86.avx512.mask.pmovs.qw.mem.256",
   11590   "llvm.x86.avx512.mask.pmovs.qw.mem.512",
   11591   "llvm.x86.avx512.mask.pmovs.wb.128",
   11592   "llvm.x86.avx512.mask.pmovs.wb.256",
   11593   "llvm.x86.avx512.mask.pmovs.wb.512",
   11594   "llvm.x86.avx512.mask.pmovs.wb.mem.128",
   11595   "llvm.x86.avx512.mask.pmovs.wb.mem.256",
   11596   "llvm.x86.avx512.mask.pmovs.wb.mem.512",
   11597   "llvm.x86.avx512.mask.pmovus.db.128",
   11598   "llvm.x86.avx512.mask.pmovus.db.256",
   11599   "llvm.x86.avx512.mask.pmovus.db.512",
   11600   "llvm.x86.avx512.mask.pmovus.db.mem.128",
   11601   "llvm.x86.avx512.mask.pmovus.db.mem.256",
   11602   "llvm.x86.avx512.mask.pmovus.db.mem.512",
   11603   "llvm.x86.avx512.mask.pmovus.dw.128",
   11604   "llvm.x86.avx512.mask.pmovus.dw.256",
   11605   "llvm.x86.avx512.mask.pmovus.dw.512",
   11606   "llvm.x86.avx512.mask.pmovus.dw.mem.128",
   11607   "llvm.x86.avx512.mask.pmovus.dw.mem.256",
   11608   "llvm.x86.avx512.mask.pmovus.dw.mem.512",
   11609   "llvm.x86.avx512.mask.pmovus.qb.128",
   11610   "llvm.x86.avx512.mask.pmovus.qb.256",
   11611   "llvm.x86.avx512.mask.pmovus.qb.512",
   11612   "llvm.x86.avx512.mask.pmovus.qb.mem.128",
   11613   "llvm.x86.avx512.mask.pmovus.qb.mem.256",
   11614   "llvm.x86.avx512.mask.pmovus.qb.mem.512",
   11615   "llvm.x86.avx512.mask.pmovus.qd.128",
   11616   "llvm.x86.avx512.mask.pmovus.qd.256",
   11617   "llvm.x86.avx512.mask.pmovus.qd.512",
   11618   "llvm.x86.avx512.mask.pmovus.qd.mem.128",
   11619   "llvm.x86.avx512.mask.pmovus.qd.mem.256",
   11620   "llvm.x86.avx512.mask.pmovus.qd.mem.512",
   11621   "llvm.x86.avx512.mask.pmovus.qw.128",
   11622   "llvm.x86.avx512.mask.pmovus.qw.256",
   11623   "llvm.x86.avx512.mask.pmovus.qw.512",
   11624   "llvm.x86.avx512.mask.pmovus.qw.mem.128",
   11625   "llvm.x86.avx512.mask.pmovus.qw.mem.256",
   11626   "llvm.x86.avx512.mask.pmovus.qw.mem.512",
   11627   "llvm.x86.avx512.mask.pmovus.wb.128",
   11628   "llvm.x86.avx512.mask.pmovus.wb.256",
   11629   "llvm.x86.avx512.mask.pmovus.wb.512",
   11630   "llvm.x86.avx512.mask.pmovus.wb.mem.128",
   11631   "llvm.x86.avx512.mask.pmovus.wb.mem.256",
   11632   "llvm.x86.avx512.mask.pmovus.wb.mem.512",
   11633   "llvm.x86.avx512.mask.pmul.hr.sw.128",
   11634   "llvm.x86.avx512.mask.pmul.hr.sw.256",
   11635   "llvm.x86.avx512.mask.pmul.hr.sw.512",
   11636   "llvm.x86.avx512.mask.pmulh.w.128",
   11637   "llvm.x86.avx512.mask.pmulh.w.256",
   11638   "llvm.x86.avx512.mask.pmulh.w.512",
   11639   "llvm.x86.avx512.mask.pmulhu.w.128",
   11640   "llvm.x86.avx512.mask.pmulhu.w.256",
   11641   "llvm.x86.avx512.mask.pmulhu.w.512",
   11642   "llvm.x86.avx512.mask.pmultishift.qb.128",
   11643   "llvm.x86.avx512.mask.pmultishift.qb.256",
   11644   "llvm.x86.avx512.mask.pmultishift.qb.512",
   11645   "llvm.x86.avx512.mask.prol.d.128",
   11646   "llvm.x86.avx512.mask.prol.d.256",
   11647   "llvm.x86.avx512.mask.prol.d.512",
   11648   "llvm.x86.avx512.mask.prol.q.128",
   11649   "llvm.x86.avx512.mask.prol.q.256",
   11650   "llvm.x86.avx512.mask.prol.q.512",
   11651   "llvm.x86.avx512.mask.prolv.d.128",
   11652   "llvm.x86.avx512.mask.prolv.d.256",
   11653   "llvm.x86.avx512.mask.prolv.d.512",
   11654   "llvm.x86.avx512.mask.prolv.q.128",
   11655   "llvm.x86.avx512.mask.prolv.q.256",
   11656   "llvm.x86.avx512.mask.prolv.q.512",
   11657   "llvm.x86.avx512.mask.pror.d.128",
   11658   "llvm.x86.avx512.mask.pror.d.256",
   11659   "llvm.x86.avx512.mask.pror.d.512",
   11660   "llvm.x86.avx512.mask.pror.q.128",
   11661   "llvm.x86.avx512.mask.pror.q.256",
   11662   "llvm.x86.avx512.mask.pror.q.512",
   11663   "llvm.x86.avx512.mask.prorv.d.128",
   11664   "llvm.x86.avx512.mask.prorv.d.256",
   11665   "llvm.x86.avx512.mask.prorv.d.512",
   11666   "llvm.x86.avx512.mask.prorv.q.128",
   11667   "llvm.x86.avx512.mask.prorv.q.256",
   11668   "llvm.x86.avx512.mask.prorv.q.512",
   11669   "llvm.x86.avx512.mask.psubs.b.128",
   11670   "llvm.x86.avx512.mask.psubs.b.256",
   11671   "llvm.x86.avx512.mask.psubs.b.512",
   11672   "llvm.x86.avx512.mask.psubs.w.128",
   11673   "llvm.x86.avx512.mask.psubs.w.256",
   11674   "llvm.x86.avx512.mask.psubs.w.512",
   11675   "llvm.x86.avx512.mask.psubus.b.128",
   11676   "llvm.x86.avx512.mask.psubus.b.256",
   11677   "llvm.x86.avx512.mask.psubus.b.512",
   11678   "llvm.x86.avx512.mask.psubus.w.128",
   11679   "llvm.x86.avx512.mask.psubus.w.256",
   11680   "llvm.x86.avx512.mask.psubus.w.512",
   11681   "llvm.x86.avx512.mask.pternlog.d.128",
   11682   "llvm.x86.avx512.mask.pternlog.d.256",
   11683   "llvm.x86.avx512.mask.pternlog.d.512",
   11684   "llvm.x86.avx512.mask.pternlog.q.128",
   11685   "llvm.x86.avx512.mask.pternlog.q.256",
   11686   "llvm.x86.avx512.mask.pternlog.q.512",
   11687   "llvm.x86.avx512.mask.range.pd.128",
   11688   "llvm.x86.avx512.mask.range.pd.256",
   11689   "llvm.x86.avx512.mask.range.pd.512",
   11690   "llvm.x86.avx512.mask.range.ps.128",
   11691   "llvm.x86.avx512.mask.range.ps.256",
   11692   "llvm.x86.avx512.mask.range.ps.512",
   11693   "llvm.x86.avx512.mask.range.sd",
   11694   "llvm.x86.avx512.mask.range.ss",
   11695   "llvm.x86.avx512.mask.reduce.pd.128",
   11696   "llvm.x86.avx512.mask.reduce.pd.256",
   11697   "llvm.x86.avx512.mask.reduce.pd.512",
   11698   "llvm.x86.avx512.mask.reduce.ps.128",
   11699   "llvm.x86.avx512.mask.reduce.ps.256",
   11700   "llvm.x86.avx512.mask.reduce.ps.512",
   11701   "llvm.x86.avx512.mask.reduce.sd",
   11702   "llvm.x86.avx512.mask.reduce.ss",
   11703   "llvm.x86.avx512.mask.rndscale.pd.128",
   11704   "llvm.x86.avx512.mask.rndscale.pd.256",
   11705   "llvm.x86.avx512.mask.rndscale.pd.512",
   11706   "llvm.x86.avx512.mask.rndscale.ps.128",
   11707   "llvm.x86.avx512.mask.rndscale.ps.256",
   11708   "llvm.x86.avx512.mask.rndscale.ps.512",
   11709   "llvm.x86.avx512.mask.rndscale.sd",
   11710   "llvm.x86.avx512.mask.rndscale.ss",
   11711   "llvm.x86.avx512.mask.scalef.pd.128",
   11712   "llvm.x86.avx512.mask.scalef.pd.256",
   11713   "llvm.x86.avx512.mask.scalef.pd.512",
   11714   "llvm.x86.avx512.mask.scalef.ps.128",
   11715   "llvm.x86.avx512.mask.scalef.ps.256",
   11716   "llvm.x86.avx512.mask.scalef.ps.512",
   11717   "llvm.x86.avx512.mask.scalef.sd",
   11718   "llvm.x86.avx512.mask.scalef.ss",
   11719   "llvm.x86.avx512.mask.shuf.f32x4",
   11720   "llvm.x86.avx512.mask.shuf.f32x4.256",
   11721   "llvm.x86.avx512.mask.shuf.f64x2",
   11722   "llvm.x86.avx512.mask.shuf.f64x2.256",
   11723   "llvm.x86.avx512.mask.shuf.i32x4",
   11724   "llvm.x86.avx512.mask.shuf.i32x4.256",
   11725   "llvm.x86.avx512.mask.shuf.i64x2",
   11726   "llvm.x86.avx512.mask.shuf.i64x2.256",
   11727   "llvm.x86.avx512.mask.sqrt.pd.128",
   11728   "llvm.x86.avx512.mask.sqrt.pd.256",
   11729   "llvm.x86.avx512.mask.sqrt.pd.512",
   11730   "llvm.x86.avx512.mask.sqrt.ps.128",
   11731   "llvm.x86.avx512.mask.sqrt.ps.256",
   11732   "llvm.x86.avx512.mask.sqrt.ps.512",
   11733   "llvm.x86.avx512.mask.sqrt.sd",
   11734   "llvm.x86.avx512.mask.sqrt.ss",
   11735   "llvm.x86.avx512.mask.store.ss",
   11736   "llvm.x86.avx512.mask.sub.pd.512",
   11737   "llvm.x86.avx512.mask.sub.ps.512",
   11738   "llvm.x86.avx512.mask.sub.sd.round",
   11739   "llvm.x86.avx512.mask.sub.ss.round",
   11740   "llvm.x86.avx512.mask.vcvtph2ps.128",
   11741   "llvm.x86.avx512.mask.vcvtph2ps.256",
   11742   "llvm.x86.avx512.mask.vcvtph2ps.512",
   11743   "llvm.x86.avx512.mask.vcvtps2ph.128",
   11744   "llvm.x86.avx512.mask.vcvtps2ph.256",
   11745   "llvm.x86.avx512.mask.vcvtps2ph.512",
   11746   "llvm.x86.avx512.mask.vfmadd.pd.128",
   11747   "llvm.x86.avx512.mask.vfmadd.pd.256",
   11748   "llvm.x86.avx512.mask.vfmadd.pd.512",
   11749   "llvm.x86.avx512.mask.vfmadd.ps.128",
   11750   "llvm.x86.avx512.mask.vfmadd.ps.256",
   11751   "llvm.x86.avx512.mask.vfmadd.ps.512",
   11752   "llvm.x86.avx512.mask.vfmadd.sd",
   11753   "llvm.x86.avx512.mask.vfmadd.ss",
   11754   "llvm.x86.avx512.mask.vfmaddsub.pd.128",
   11755   "llvm.x86.avx512.mask.vfmaddsub.pd.256",
   11756   "llvm.x86.avx512.mask.vfmaddsub.pd.512",
   11757   "llvm.x86.avx512.mask.vfmaddsub.ps.128",
   11758   "llvm.x86.avx512.mask.vfmaddsub.ps.256",
   11759   "llvm.x86.avx512.mask.vfmaddsub.ps.512",
   11760   "llvm.x86.avx512.mask.vfnmadd.pd.128",
   11761   "llvm.x86.avx512.mask.vfnmadd.pd.256",
   11762   "llvm.x86.avx512.mask.vfnmadd.pd.512",
   11763   "llvm.x86.avx512.mask.vfnmadd.ps.128",
   11764   "llvm.x86.avx512.mask.vfnmadd.ps.256",
   11765   "llvm.x86.avx512.mask.vfnmadd.ps.512",
   11766   "llvm.x86.avx512.mask.vfnmsub.pd.128",
   11767   "llvm.x86.avx512.mask.vfnmsub.pd.256",
   11768   "llvm.x86.avx512.mask.vfnmsub.pd.512",
   11769   "llvm.x86.avx512.mask.vfnmsub.ps.128",
   11770   "llvm.x86.avx512.mask.vfnmsub.ps.256",
   11771   "llvm.x86.avx512.mask.vfnmsub.ps.512",
   11772   "llvm.x86.avx512.mask.vpermi2var.d.128",
   11773   "llvm.x86.avx512.mask.vpermi2var.d.256",
   11774   "llvm.x86.avx512.mask.vpermi2var.d.512",
   11775   "llvm.x86.avx512.mask.vpermi2var.hi.128",
   11776   "llvm.x86.avx512.mask.vpermi2var.hi.256",
   11777   "llvm.x86.avx512.mask.vpermi2var.hi.512",
   11778   "llvm.x86.avx512.mask.vpermi2var.pd.128",
   11779   "llvm.x86.avx512.mask.vpermi2var.pd.256",
   11780   "llvm.x86.avx512.mask.vpermi2var.pd.512",
   11781   "llvm.x86.avx512.mask.vpermi2var.ps.128",
   11782   "llvm.x86.avx512.mask.vpermi2var.ps.256",
   11783   "llvm.x86.avx512.mask.vpermi2var.ps.512",
   11784   "llvm.x86.avx512.mask.vpermi2var.q.128",
   11785   "llvm.x86.avx512.mask.vpermi2var.q.256",
   11786   "llvm.x86.avx512.mask.vpermi2var.q.512",
   11787   "llvm.x86.avx512.mask.vpermi2var.qi.128",
   11788   "llvm.x86.avx512.mask.vpermi2var.qi.256",
   11789   "llvm.x86.avx512.mask.vpermi2var.qi.512",
   11790   "llvm.x86.avx512.mask.vpermt2var.d.128",
   11791   "llvm.x86.avx512.mask.vpermt2var.d.256",
   11792   "llvm.x86.avx512.mask.vpermt2var.d.512",
   11793   "llvm.x86.avx512.mask.vpermt2var.hi.128",
   11794   "llvm.x86.avx512.mask.vpermt2var.hi.256",
   11795   "llvm.x86.avx512.mask.vpermt2var.hi.512",
   11796   "llvm.x86.avx512.mask.vpermt2var.pd.128",
   11797   "llvm.x86.avx512.mask.vpermt2var.pd.256",
   11798   "llvm.x86.avx512.mask.vpermt2var.pd.512",
   11799   "llvm.x86.avx512.mask.vpermt2var.ps.128",
   11800   "llvm.x86.avx512.mask.vpermt2var.ps.256",
   11801   "llvm.x86.avx512.mask.vpermt2var.ps.512",
   11802   "llvm.x86.avx512.mask.vpermt2var.q.128",
   11803   "llvm.x86.avx512.mask.vpermt2var.q.256",
   11804   "llvm.x86.avx512.mask.vpermt2var.q.512",
   11805   "llvm.x86.avx512.mask.vpermt2var.qi.128",
   11806   "llvm.x86.avx512.mask.vpermt2var.qi.256",
   11807   "llvm.x86.avx512.mask.vpermt2var.qi.512",
   11808   "llvm.x86.avx512.mask.vpmadd52h.uq.128",
   11809   "llvm.x86.avx512.mask.vpmadd52h.uq.256",
   11810   "llvm.x86.avx512.mask.vpmadd52h.uq.512",
   11811   "llvm.x86.avx512.mask.vpmadd52l.uq.128",
   11812   "llvm.x86.avx512.mask.vpmadd52l.uq.256",
   11813   "llvm.x86.avx512.mask.vpmadd52l.uq.512",
   11814   "llvm.x86.avx512.mask3.vfmadd.pd.128",
   11815   "llvm.x86.avx512.mask3.vfmadd.pd.256",
   11816   "llvm.x86.avx512.mask3.vfmadd.pd.512",
   11817   "llvm.x86.avx512.mask3.vfmadd.ps.128",
   11818   "llvm.x86.avx512.mask3.vfmadd.ps.256",
   11819   "llvm.x86.avx512.mask3.vfmadd.ps.512",
   11820   "llvm.x86.avx512.mask3.vfmadd.sd",
   11821   "llvm.x86.avx512.mask3.vfmadd.ss",
   11822   "llvm.x86.avx512.mask3.vfmaddsub.pd.128",
   11823   "llvm.x86.avx512.mask3.vfmaddsub.pd.256",
   11824   "llvm.x86.avx512.mask3.vfmaddsub.pd.512",
   11825   "llvm.x86.avx512.mask3.vfmaddsub.ps.128",
   11826   "llvm.x86.avx512.mask3.vfmaddsub.ps.256",
   11827   "llvm.x86.avx512.mask3.vfmaddsub.ps.512",
   11828   "llvm.x86.avx512.mask3.vfmsub.pd.128",
   11829   "llvm.x86.avx512.mask3.vfmsub.pd.256",
   11830   "llvm.x86.avx512.mask3.vfmsub.pd.512",
   11831   "llvm.x86.avx512.mask3.vfmsub.ps.128",
   11832   "llvm.x86.avx512.mask3.vfmsub.ps.256",
   11833   "llvm.x86.avx512.mask3.vfmsub.ps.512",
   11834   "llvm.x86.avx512.mask3.vfmsub.sd",
   11835   "llvm.x86.avx512.mask3.vfmsub.ss",
   11836   "llvm.x86.avx512.mask3.vfmsubadd.pd.128",
   11837   "llvm.x86.avx512.mask3.vfmsubadd.pd.256",
   11838   "llvm.x86.avx512.mask3.vfmsubadd.pd.512",
   11839   "llvm.x86.avx512.mask3.vfmsubadd.ps.128",
   11840   "llvm.x86.avx512.mask3.vfmsubadd.ps.256",
   11841   "llvm.x86.avx512.mask3.vfmsubadd.ps.512",
   11842   "llvm.x86.avx512.mask3.vfnmsub.pd.128",
   11843   "llvm.x86.avx512.mask3.vfnmsub.pd.256",
   11844   "llvm.x86.avx512.mask3.vfnmsub.pd.512",
   11845   "llvm.x86.avx512.mask3.vfnmsub.ps.128",
   11846   "llvm.x86.avx512.mask3.vfnmsub.ps.256",
   11847   "llvm.x86.avx512.mask3.vfnmsub.ps.512",
   11848   "llvm.x86.avx512.mask3.vfnmsub.sd",
   11849   "llvm.x86.avx512.mask3.vfnmsub.ss",
   11850   "llvm.x86.avx512.maskz.fixupimm.pd.128",
   11851   "llvm.x86.avx512.maskz.fixupimm.pd.256",
   11852   "llvm.x86.avx512.maskz.fixupimm.pd.512",
   11853   "llvm.x86.avx512.maskz.fixupimm.ps.128",
   11854   "llvm.x86.avx512.maskz.fixupimm.ps.256",
   11855   "llvm.x86.avx512.maskz.fixupimm.ps.512",
   11856   "llvm.x86.avx512.maskz.fixupimm.sd",
   11857   "llvm.x86.avx512.maskz.fixupimm.ss",
   11858   "llvm.x86.avx512.maskz.pternlog.d.128",
   11859   "llvm.x86.avx512.maskz.pternlog.d.256",
   11860   "llvm.x86.avx512.maskz.pternlog.d.512",
   11861   "llvm.x86.avx512.maskz.pternlog.q.128",
   11862   "llvm.x86.avx512.maskz.pternlog.q.256",
   11863   "llvm.x86.avx512.maskz.pternlog.q.512",
   11864   "llvm.x86.avx512.maskz.vfmadd.pd.128",
   11865   "llvm.x86.avx512.maskz.vfmadd.pd.256",
   11866   "llvm.x86.avx512.maskz.vfmadd.pd.512",
   11867   "llvm.x86.avx512.maskz.vfmadd.ps.128",
   11868   "llvm.x86.avx512.maskz.vfmadd.ps.256",
   11869   "llvm.x86.avx512.maskz.vfmadd.ps.512",
   11870   "llvm.x86.avx512.maskz.vfmadd.sd",
   11871   "llvm.x86.avx512.maskz.vfmadd.ss",
   11872   "llvm.x86.avx512.maskz.vfmaddsub.pd.128",
   11873   "llvm.x86.avx512.maskz.vfmaddsub.pd.256",
   11874   "llvm.x86.avx512.maskz.vfmaddsub.pd.512",
   11875   "llvm.x86.avx512.maskz.vfmaddsub.ps.128",
   11876   "llvm.x86.avx512.maskz.vfmaddsub.ps.256",
   11877   "llvm.x86.avx512.maskz.vfmaddsub.ps.512",
   11878   "llvm.x86.avx512.maskz.vpermt2var.d.128",
   11879   "llvm.x86.avx512.maskz.vpermt2var.d.256",
   11880   "llvm.x86.avx512.maskz.vpermt2var.d.512",
   11881   "llvm.x86.avx512.maskz.vpermt2var.hi.128",
   11882   "llvm.x86.avx512.maskz.vpermt2var.hi.256",
   11883   "llvm.x86.avx512.maskz.vpermt2var.hi.512",
   11884   "llvm.x86.avx512.maskz.vpermt2var.pd.128",
   11885   "llvm.x86.avx512.maskz.vpermt2var.pd.256",
   11886   "llvm.x86.avx512.maskz.vpermt2var.pd.512",
   11887   "llvm.x86.avx512.maskz.vpermt2var.ps.128",
   11888   "llvm.x86.avx512.maskz.vpermt2var.ps.256",
   11889   "llvm.x86.avx512.maskz.vpermt2var.ps.512",
   11890   "llvm.x86.avx512.maskz.vpermt2var.q.128",
   11891   "llvm.x86.avx512.maskz.vpermt2var.q.256",
   11892   "llvm.x86.avx512.maskz.vpermt2var.q.512",
   11893   "llvm.x86.avx512.maskz.vpermt2var.qi.128",
   11894   "llvm.x86.avx512.maskz.vpermt2var.qi.256",
   11895   "llvm.x86.avx512.maskz.vpermt2var.qi.512",
   11896   "llvm.x86.avx512.maskz.vpmadd52h.uq.128",
   11897   "llvm.x86.avx512.maskz.vpmadd52h.uq.256",
   11898   "llvm.x86.avx512.maskz.vpmadd52h.uq.512",
   11899   "llvm.x86.avx512.maskz.vpmadd52l.uq.128",
   11900   "llvm.x86.avx512.maskz.vpmadd52l.uq.256",
   11901   "llvm.x86.avx512.maskz.vpmadd52l.uq.512",
   11902   "llvm.x86.avx512.packssdw.512",
   11903   "llvm.x86.avx512.packsswb.512",
   11904   "llvm.x86.avx512.packusdw.512",
   11905   "llvm.x86.avx512.packuswb.512",
   11906   "llvm.x86.avx512.pmul.dq.512",
   11907   "llvm.x86.avx512.pmulu.dq.512",
   11908   "llvm.x86.avx512.psad.bw.512",
   11909   "llvm.x86.avx512.pshuf.b.512",
   11910   "llvm.x86.avx512.psll.d.512",
   11911   "llvm.x86.avx512.psll.q.512",
   11912   "llvm.x86.avx512.psll.w.512",
   11913   "llvm.x86.avx512.pslli.d.512",
   11914   "llvm.x86.avx512.pslli.q.512",
   11915   "llvm.x86.avx512.pslli.w.512",
   11916   "llvm.x86.avx512.psllv.d.512",
   11917   "llvm.x86.avx512.psllv.q.512",
   11918   "llvm.x86.avx512.psllv.w.128",
   11919   "llvm.x86.avx512.psllv.w.256",
   11920   "llvm.x86.avx512.psllv.w.512",
   11921   "llvm.x86.avx512.psra.d.512",
   11922   "llvm.x86.avx512.psra.q.128",
   11923   "llvm.x86.avx512.psra.q.256",
   11924   "llvm.x86.avx512.psra.q.512",
   11925   "llvm.x86.avx512.psra.w.512",
   11926   "llvm.x86.avx512.psrai.d.512",
   11927   "llvm.x86.avx512.psrai.q.128",
   11928   "llvm.x86.avx512.psrai.q.256",
   11929   "llvm.x86.avx512.psrai.q.512",
   11930   "llvm.x86.avx512.psrai.w.512",
   11931   "llvm.x86.avx512.psrav.d.512",
   11932   "llvm.x86.avx512.psrav.q.128",
   11933   "llvm.x86.avx512.psrav.q.256",
   11934   "llvm.x86.avx512.psrav.q.512",
   11935   "llvm.x86.avx512.psrav.w.128",
   11936   "llvm.x86.avx512.psrav.w.256",
   11937   "llvm.x86.avx512.psrav.w.512",
   11938   "llvm.x86.avx512.psrl.d.512",
   11939   "llvm.x86.avx512.psrl.q.512",
   11940   "llvm.x86.avx512.psrl.w.512",
   11941   "llvm.x86.avx512.psrli.d.512",
   11942   "llvm.x86.avx512.psrli.q.512",
   11943   "llvm.x86.avx512.psrli.w.512",
   11944   "llvm.x86.avx512.psrlv.d.512",
   11945   "llvm.x86.avx512.psrlv.q.512",
   11946   "llvm.x86.avx512.psrlv.w.128",
   11947   "llvm.x86.avx512.psrlv.w.256",
   11948   "llvm.x86.avx512.psrlv.w.512",
   11949   "llvm.x86.avx512.ptestm.b.128",
   11950   "llvm.x86.avx512.ptestm.b.256",
   11951   "llvm.x86.avx512.ptestm.b.512",
   11952   "llvm.x86.avx512.ptestm.d.128",
   11953   "llvm.x86.avx512.ptestm.d.256",
   11954   "llvm.x86.avx512.ptestm.d.512",
   11955   "llvm.x86.avx512.ptestm.q.128",
   11956   "llvm.x86.avx512.ptestm.q.256",
   11957   "llvm.x86.avx512.ptestm.q.512",
   11958   "llvm.x86.avx512.ptestm.w.128",
   11959   "llvm.x86.avx512.ptestm.w.256",
   11960   "llvm.x86.avx512.ptestm.w.512",
   11961   "llvm.x86.avx512.ptestnm.b.128",
   11962   "llvm.x86.avx512.ptestnm.b.256",
   11963   "llvm.x86.avx512.ptestnm.b.512",
   11964   "llvm.x86.avx512.ptestnm.d.128",
   11965   "llvm.x86.avx512.ptestnm.d.256",
   11966   "llvm.x86.avx512.ptestnm.d.512",
   11967   "llvm.x86.avx512.ptestnm.q.128",
   11968   "llvm.x86.avx512.ptestnm.q.256",
   11969   "llvm.x86.avx512.ptestnm.q.512",
   11970   "llvm.x86.avx512.ptestnm.w.128",
   11971   "llvm.x86.avx512.ptestnm.w.256",
   11972   "llvm.x86.avx512.ptestnm.w.512",
   11973   "llvm.x86.avx512.rcp14.pd.128",
   11974   "llvm.x86.avx512.rcp14.pd.256",
   11975   "llvm.x86.avx512.rcp14.pd.512",
   11976   "llvm.x86.avx512.rcp14.ps.128",
   11977   "llvm.x86.avx512.rcp14.ps.256",
   11978   "llvm.x86.avx512.rcp14.ps.512",
   11979   "llvm.x86.avx512.rcp14.sd",
   11980   "llvm.x86.avx512.rcp14.ss",
   11981   "llvm.x86.avx512.rcp28.pd",
   11982   "llvm.x86.avx512.rcp28.ps",
   11983   "llvm.x86.avx512.rcp28.sd",
   11984   "llvm.x86.avx512.rcp28.ss",
   11985   "llvm.x86.avx512.rsqrt14.pd.128",
   11986   "llvm.x86.avx512.rsqrt14.pd.256",
   11987   "llvm.x86.avx512.rsqrt14.pd.512",
   11988   "llvm.x86.avx512.rsqrt14.ps.128",
   11989   "llvm.x86.avx512.rsqrt14.ps.256",
   11990   "llvm.x86.avx512.rsqrt14.ps.512",
   11991   "llvm.x86.avx512.rsqrt14.sd",
   11992   "llvm.x86.avx512.rsqrt14.ss",
   11993   "llvm.x86.avx512.rsqrt28.pd",
   11994   "llvm.x86.avx512.rsqrt28.ps",
   11995   "llvm.x86.avx512.rsqrt28.sd",
   11996   "llvm.x86.avx512.rsqrt28.ss",
   11997   "llvm.x86.avx512.scatter.dpd.512",
   11998   "llvm.x86.avx512.scatter.dpi.512",
   11999   "llvm.x86.avx512.scatter.dpq.512",
   12000   "llvm.x86.avx512.scatter.dps.512",
   12001   "llvm.x86.avx512.scatter.qpd.512",
   12002   "llvm.x86.avx512.scatter.qpi.512",
   12003   "llvm.x86.avx512.scatter.qpq.512",
   12004   "llvm.x86.avx512.scatter.qps.512",
   12005   "llvm.x86.avx512.scatterdiv2.df",
   12006   "llvm.x86.avx512.scatterdiv2.di",
   12007   "llvm.x86.avx512.scatterdiv4.df",
   12008   "llvm.x86.avx512.scatterdiv4.di",
   12009   "llvm.x86.avx512.scatterdiv4.sf",
   12010   "llvm.x86.avx512.scatterdiv4.si",
   12011   "llvm.x86.avx512.scatterdiv8.sf",
   12012   "llvm.x86.avx512.scatterdiv8.si",
   12013   "llvm.x86.avx512.scatterpf.dpd.512",
   12014   "llvm.x86.avx512.scatterpf.dps.512",
   12015   "llvm.x86.avx512.scatterpf.qpd.512",
   12016   "llvm.x86.avx512.scatterpf.qps.512",
   12017   "llvm.x86.avx512.scattersiv2.df",
   12018   "llvm.x86.avx512.scattersiv2.di",
   12019   "llvm.x86.avx512.scattersiv4.df",
   12020   "llvm.x86.avx512.scattersiv4.di",
   12021   "llvm.x86.avx512.scattersiv4.sf",
   12022   "llvm.x86.avx512.scattersiv4.si",
   12023   "llvm.x86.avx512.scattersiv8.sf",
   12024   "llvm.x86.avx512.scattersiv8.si",
   12025   "llvm.x86.avx512.vbroadcast.sd.512",
   12026   "llvm.x86.avx512.vbroadcast.ss.512",
   12027   "llvm.x86.avx512.vcomi.sd",
   12028   "llvm.x86.avx512.vcomi.ss",
   12029   "llvm.x86.avx512.vcvtsd2si32",
   12030   "llvm.x86.avx512.vcvtsd2si64",
   12031   "llvm.x86.avx512.vcvtsd2usi32",
   12032   "llvm.x86.avx512.vcvtsd2usi64",
   12033   "llvm.x86.avx512.vcvtss2si32",
   12034   "llvm.x86.avx512.vcvtss2si64",
   12035   "llvm.x86.avx512.vcvtss2usi32",
   12036   "llvm.x86.avx512.vcvtss2usi64",
   12037   "llvm.x86.avx512.vpermilvar.pd.512",
   12038   "llvm.x86.avx512.vpermilvar.ps.512",
   12039   "llvm.x86.bmi.bextr.32",
   12040   "llvm.x86.bmi.bextr.64",
   12041   "llvm.x86.bmi.bzhi.32",
   12042   "llvm.x86.bmi.bzhi.64",
   12043   "llvm.x86.bmi.pdep.32",
   12044   "llvm.x86.bmi.pdep.64",
   12045   "llvm.x86.bmi.pext.32",
   12046   "llvm.x86.bmi.pext.64",
   12047   "llvm.x86.clflushopt",
   12048   "llvm.x86.clwb",
   12049   "llvm.x86.clzero",
   12050   "llvm.x86.flags.read.u32",
   12051   "llvm.x86.flags.read.u64",
   12052   "llvm.x86.flags.write.u32",
   12053   "llvm.x86.flags.write.u64",
   12054   "llvm.x86.fma.vfmadd.pd",
   12055   "llvm.x86.fma.vfmadd.pd.256",
   12056   "llvm.x86.fma.vfmadd.ps",
   12057   "llvm.x86.fma.vfmadd.ps.256",
   12058   "llvm.x86.fma.vfmadd.sd",
   12059   "llvm.x86.fma.vfmadd.ss",
   12060   "llvm.x86.fma.vfmaddsub.pd",
   12061   "llvm.x86.fma.vfmaddsub.pd.256",
   12062   "llvm.x86.fma.vfmaddsub.ps",
   12063   "llvm.x86.fma.vfmaddsub.ps.256",
   12064   "llvm.x86.fma.vfmsub.pd",
   12065   "llvm.x86.fma.vfmsub.pd.256",
   12066   "llvm.x86.fma.vfmsub.ps",
   12067   "llvm.x86.fma.vfmsub.ps.256",
   12068   "llvm.x86.fma.vfmsub.sd",
   12069   "llvm.x86.fma.vfmsub.ss",
   12070   "llvm.x86.fma.vfmsubadd.pd",
   12071   "llvm.x86.fma.vfmsubadd.pd.256",
   12072   "llvm.x86.fma.vfmsubadd.ps",
   12073   "llvm.x86.fma.vfmsubadd.ps.256",
   12074   "llvm.x86.fma.vfnmadd.pd",
   12075   "llvm.x86.fma.vfnmadd.pd.256",
   12076   "llvm.x86.fma.vfnmadd.ps",
   12077   "llvm.x86.fma.vfnmadd.ps.256",
   12078   "llvm.x86.fma.vfnmadd.sd",
   12079   "llvm.x86.fma.vfnmadd.ss",
   12080   "llvm.x86.fma.vfnmsub.pd",
   12081   "llvm.x86.fma.vfnmsub.pd.256",
   12082   "llvm.x86.fma.vfnmsub.ps",
   12083   "llvm.x86.fma.vfnmsub.ps.256",
   12084   "llvm.x86.fma.vfnmsub.sd",
   12085   "llvm.x86.fma.vfnmsub.ss",
   12086   "llvm.x86.fxrstor",
   12087   "llvm.x86.fxrstor64",
   12088   "llvm.x86.fxsave",
   12089   "llvm.x86.fxsave64",
   12090   "llvm.x86.int",
   12091   "llvm.x86.llwpcb",
   12092   "llvm.x86.lwpins32",
   12093   "llvm.x86.lwpins64",
   12094   "llvm.x86.lwpval32",
   12095   "llvm.x86.lwpval64",
   12096   "llvm.x86.mmx.emms",
   12097   "llvm.x86.mmx.femms",
   12098   "llvm.x86.mmx.maskmovq",
   12099   "llvm.x86.mmx.movnt.dq",
   12100   "llvm.x86.mmx.packssdw",
   12101   "llvm.x86.mmx.packsswb",
   12102   "llvm.x86.mmx.packuswb",
   12103   "llvm.x86.mmx.padd.b",
   12104   "llvm.x86.mmx.padd.d",
   12105   "llvm.x86.mmx.padd.q",
   12106   "llvm.x86.mmx.padd.w",
   12107   "llvm.x86.mmx.padds.b",
   12108   "llvm.x86.mmx.padds.w",
   12109   "llvm.x86.mmx.paddus.b",
   12110   "llvm.x86.mmx.paddus.w",
   12111   "llvm.x86.mmx.palignr.b",
   12112   "llvm.x86.mmx.pand",
   12113   "llvm.x86.mmx.pandn",
   12114   "llvm.x86.mmx.pavg.b",
   12115   "llvm.x86.mmx.pavg.w",
   12116   "llvm.x86.mmx.pcmpeq.b",
   12117   "llvm.x86.mmx.pcmpeq.d",
   12118   "llvm.x86.mmx.pcmpeq.w",
   12119   "llvm.x86.mmx.pcmpgt.b",
   12120   "llvm.x86.mmx.pcmpgt.d",
   12121   "llvm.x86.mmx.pcmpgt.w",
   12122   "llvm.x86.mmx.pextr.w",
   12123   "llvm.x86.mmx.pinsr.w",
   12124   "llvm.x86.mmx.pmadd.wd",
   12125   "llvm.x86.mmx.pmaxs.w",
   12126   "llvm.x86.mmx.pmaxu.b",
   12127   "llvm.x86.mmx.pmins.w",
   12128   "llvm.x86.mmx.pminu.b",
   12129   "llvm.x86.mmx.pmovmskb",
   12130   "llvm.x86.mmx.pmulh.w",
   12131   "llvm.x86.mmx.pmulhu.w",
   12132   "llvm.x86.mmx.pmull.w",
   12133   "llvm.x86.mmx.pmulu.dq",
   12134   "llvm.x86.mmx.por",
   12135   "llvm.x86.mmx.psad.bw",
   12136   "llvm.x86.mmx.psll.d",
   12137   "llvm.x86.mmx.psll.q",
   12138   "llvm.x86.mmx.psll.w",
   12139   "llvm.x86.mmx.pslli.d",
   12140   "llvm.x86.mmx.pslli.q",
   12141   "llvm.x86.mmx.pslli.w",
   12142   "llvm.x86.mmx.psra.d",
   12143   "llvm.x86.mmx.psra.w",
   12144   "llvm.x86.mmx.psrai.d",
   12145   "llvm.x86.mmx.psrai.w",
   12146   "llvm.x86.mmx.psrl.d",
   12147   "llvm.x86.mmx.psrl.q",
   12148   "llvm.x86.mmx.psrl.w",
   12149   "llvm.x86.mmx.psrli.d",
   12150   "llvm.x86.mmx.psrli.q",
   12151   "llvm.x86.mmx.psrli.w",
   12152   "llvm.x86.mmx.psub.b",
   12153   "llvm.x86.mmx.psub.d",
   12154   "llvm.x86.mmx.psub.q",
   12155   "llvm.x86.mmx.psub.w",
   12156   "llvm.x86.mmx.psubs.b",
   12157   "llvm.x86.mmx.psubs.w",
   12158   "llvm.x86.mmx.psubus.b",
   12159   "llvm.x86.mmx.psubus.w",
   12160   "llvm.x86.mmx.punpckhbw",
   12161   "llvm.x86.mmx.punpckhdq",
   12162   "llvm.x86.mmx.punpckhwd",
   12163   "llvm.x86.mmx.punpcklbw",
   12164   "llvm.x86.mmx.punpckldq",
   12165   "llvm.x86.mmx.punpcklwd",
   12166   "llvm.x86.mmx.pxor",
   12167   "llvm.x86.monitorx",
   12168   "llvm.x86.mwaitx",
   12169   "llvm.x86.pclmulqdq",
   12170   "llvm.x86.rdfsbase.32",
   12171   "llvm.x86.rdfsbase.64",
   12172   "llvm.x86.rdgsbase.32",
   12173   "llvm.x86.rdgsbase.64",
   12174   "llvm.x86.rdpkru",
   12175   "llvm.x86.rdpmc",
   12176   "llvm.x86.rdrand.16",
   12177   "llvm.x86.rdrand.32",
   12178   "llvm.x86.rdrand.64",
   12179   "llvm.x86.rdseed.16",
   12180   "llvm.x86.rdseed.32",
   12181   "llvm.x86.rdseed.64",
   12182   "llvm.x86.rdtsc",
   12183   "llvm.x86.rdtscp",
   12184   "llvm.x86.seh.ehguard",
   12185   "llvm.x86.seh.ehregnode",
   12186   "llvm.x86.seh.lsda",
   12187   "llvm.x86.seh.recoverfp",
   12188   "llvm.x86.sha1msg1",
   12189   "llvm.x86.sha1msg2",
   12190   "llvm.x86.sha1nexte",
   12191   "llvm.x86.sha1rnds4",
   12192   "llvm.x86.sha256msg1",
   12193   "llvm.x86.sha256msg2",
   12194   "llvm.x86.sha256rnds2",
   12195   "llvm.x86.slwpcb",
   12196   "llvm.x86.sse.cmp.ps",
   12197   "llvm.x86.sse.cmp.ss",
   12198   "llvm.x86.sse.comieq.ss",
   12199   "llvm.x86.sse.comige.ss",
   12200   "llvm.x86.sse.comigt.ss",
   12201   "llvm.x86.sse.comile.ss",
   12202   "llvm.x86.sse.comilt.ss",
   12203   "llvm.x86.sse.comineq.ss",
   12204   "llvm.x86.sse.cvtpd2pi",
   12205   "llvm.x86.sse.cvtpi2pd",
   12206   "llvm.x86.sse.cvtpi2ps",
   12207   "llvm.x86.sse.cvtps2pi",
   12208   "llvm.x86.sse.cvtsi2ss",
   12209   "llvm.x86.sse.cvtsi642ss",
   12210   "llvm.x86.sse.cvtss2si",
   12211   "llvm.x86.sse.cvtss2si64",
   12212   "llvm.x86.sse.cvttpd2pi",
   12213   "llvm.x86.sse.cvttps2pi",
   12214   "llvm.x86.sse.cvttss2si",
   12215   "llvm.x86.sse.cvttss2si64",
   12216   "llvm.x86.sse.ldmxcsr",
   12217   "llvm.x86.sse.max.ps",
   12218   "llvm.x86.sse.max.ss",
   12219   "llvm.x86.sse.min.ps",
   12220   "llvm.x86.sse.min.ss",
   12221   "llvm.x86.sse.movmsk.ps",
   12222   "llvm.x86.sse.pshuf.w",
   12223   "llvm.x86.sse.rcp.ps",
   12224   "llvm.x86.sse.rcp.ss",
   12225   "llvm.x86.sse.rsqrt.ps",
   12226   "llvm.x86.sse.rsqrt.ss",
   12227   "llvm.x86.sse.sfence",
   12228   "llvm.x86.sse.sqrt.ps",
   12229   "llvm.x86.sse.sqrt.ss",
   12230   "llvm.x86.sse.stmxcsr",
   12231   "llvm.x86.sse.ucomieq.ss",
   12232   "llvm.x86.sse.ucomige.ss",
   12233   "llvm.x86.sse.ucomigt.ss",
   12234   "llvm.x86.sse.ucomile.ss",
   12235   "llvm.x86.sse.ucomilt.ss",
   12236   "llvm.x86.sse.ucomineq.ss",
   12237   "llvm.x86.sse2.clflush",
   12238   "llvm.x86.sse2.cmp.pd",
   12239   "llvm.x86.sse2.cmp.sd",
   12240   "llvm.x86.sse2.comieq.sd",
   12241   "llvm.x86.sse2.comige.sd",
   12242   "llvm.x86.sse2.comigt.sd",
   12243   "llvm.x86.sse2.comile.sd",
   12244   "llvm.x86.sse2.comilt.sd",
   12245   "llvm.x86.sse2.comineq.sd",
   12246   "llvm.x86.sse2.cvtdq2ps",
   12247   "llvm.x86.sse2.cvtpd2dq",
   12248   "llvm.x86.sse2.cvtpd2ps",
   12249   "llvm.x86.sse2.cvtps2dq",
   12250   "llvm.x86.sse2.cvtsd2si",
   12251   "llvm.x86.sse2.cvtsd2si64",
   12252   "llvm.x86.sse2.cvtsd2ss",
   12253   "llvm.x86.sse2.cvtsi2sd",
   12254   "llvm.x86.sse2.cvtsi642sd",
   12255   "llvm.x86.sse2.cvtss2sd",
   12256   "llvm.x86.sse2.cvttpd2dq",
   12257   "llvm.x86.sse2.cvttps2dq",
   12258   "llvm.x86.sse2.cvttsd2si",
   12259   "llvm.x86.sse2.cvttsd2si64",
   12260   "llvm.x86.sse2.lfence",
   12261   "llvm.x86.sse2.maskmov.dqu",
   12262   "llvm.x86.sse2.max.pd",
   12263   "llvm.x86.sse2.max.sd",
   12264   "llvm.x86.sse2.mfence",
   12265   "llvm.x86.sse2.min.pd",
   12266   "llvm.x86.sse2.min.sd",
   12267   "llvm.x86.sse2.movmsk.pd",
   12268   "llvm.x86.sse2.packssdw.128",
   12269   "llvm.x86.sse2.packsswb.128",
   12270   "llvm.x86.sse2.packuswb.128",
   12271   "llvm.x86.sse2.padds.b",
   12272   "llvm.x86.sse2.padds.w",
   12273   "llvm.x86.sse2.paddus.b",
   12274   "llvm.x86.sse2.paddus.w",
   12275   "llvm.x86.sse2.pause",
   12276   "llvm.x86.sse2.pmadd.wd",
   12277   "llvm.x86.sse2.pmovmskb.128",
   12278   "llvm.x86.sse2.pmulh.w",
   12279   "llvm.x86.sse2.pmulhu.w",
   12280   "llvm.x86.sse2.pmulu.dq",
   12281   "llvm.x86.sse2.psad.bw",
   12282   "llvm.x86.sse2.psll.d",
   12283   "llvm.x86.sse2.psll.q",
   12284   "llvm.x86.sse2.psll.w",
   12285   "llvm.x86.sse2.pslli.d",
   12286   "llvm.x86.sse2.pslli.q",
   12287   "llvm.x86.sse2.pslli.w",
   12288   "llvm.x86.sse2.psra.d",
   12289   "llvm.x86.sse2.psra.w",
   12290   "llvm.x86.sse2.psrai.d",
   12291   "llvm.x86.sse2.psrai.w",
   12292   "llvm.x86.sse2.psrl.d",
   12293   "llvm.x86.sse2.psrl.q",
   12294   "llvm.x86.sse2.psrl.w",
   12295   "llvm.x86.sse2.psrli.d",
   12296   "llvm.x86.sse2.psrli.q",
   12297   "llvm.x86.sse2.psrli.w",
   12298   "llvm.x86.sse2.psubs.b",
   12299   "llvm.x86.sse2.psubs.w",
   12300   "llvm.x86.sse2.psubus.b",
   12301   "llvm.x86.sse2.psubus.w",
   12302   "llvm.x86.sse2.sqrt.pd",
   12303   "llvm.x86.sse2.sqrt.sd",
   12304   "llvm.x86.sse2.ucomieq.sd",
   12305   "llvm.x86.sse2.ucomige.sd",
   12306   "llvm.x86.sse2.ucomigt.sd",
   12307   "llvm.x86.sse2.ucomile.sd",
   12308   "llvm.x86.sse2.ucomilt.sd",
   12309   "llvm.x86.sse2.ucomineq.sd",
   12310   "llvm.x86.sse3.addsub.pd",
   12311   "llvm.x86.sse3.addsub.ps",
   12312   "llvm.x86.sse3.hadd.pd",
   12313   "llvm.x86.sse3.hadd.ps",
   12314   "llvm.x86.sse3.hsub.pd",
   12315   "llvm.x86.sse3.hsub.ps",
   12316   "llvm.x86.sse3.ldu.dq",
   12317   "llvm.x86.sse3.monitor",
   12318   "llvm.x86.sse3.mwait",
   12319   "llvm.x86.sse41.blendvpd",
   12320   "llvm.x86.sse41.blendvps",
   12321   "llvm.x86.sse41.dppd",
   12322   "llvm.x86.sse41.dpps",
   12323   "llvm.x86.sse41.insertps",
   12324   "llvm.x86.sse41.mpsadbw",
   12325   "llvm.x86.sse41.packusdw",
   12326   "llvm.x86.sse41.pblendvb",
   12327   "llvm.x86.sse41.phminposuw",
   12328   "llvm.x86.sse41.pmuldq",
   12329   "llvm.x86.sse41.ptestc",
   12330   "llvm.x86.sse41.ptestnzc",
   12331   "llvm.x86.sse41.ptestz",
   12332   "llvm.x86.sse41.round.pd",
   12333   "llvm.x86.sse41.round.ps",
   12334   "llvm.x86.sse41.round.sd",
   12335   "llvm.x86.sse41.round.ss",
   12336   "llvm.x86.sse42.crc32.32.16",
   12337   "llvm.x86.sse42.crc32.32.32",
   12338   "llvm.x86.sse42.crc32.32.8",
   12339   "llvm.x86.sse42.crc32.64.64",
   12340   "llvm.x86.sse42.pcmpestri128",
   12341   "llvm.x86.sse42.pcmpestria128",
   12342   "llvm.x86.sse42.pcmpestric128",
   12343   "llvm.x86.sse42.pcmpestrio128",
   12344   "llvm.x86.sse42.pcmpestris128",
   12345   "llvm.x86.sse42.pcmpestriz128",
   12346   "llvm.x86.sse42.pcmpestrm128",
   12347   "llvm.x86.sse42.pcmpistri128",
   12348   "llvm.x86.sse42.pcmpistria128",
   12349   "llvm.x86.sse42.pcmpistric128",
   12350   "llvm.x86.sse42.pcmpistrio128",
   12351   "llvm.x86.sse42.pcmpistris128",
   12352   "llvm.x86.sse42.pcmpistriz128",
   12353   "llvm.x86.sse42.pcmpistrm128",
   12354   "llvm.x86.sse4a.extrq",
   12355   "llvm.x86.sse4a.extrqi",
   12356   "llvm.x86.sse4a.insertq",
   12357   "llvm.x86.sse4a.insertqi",
   12358   "llvm.x86.ssse3.pabs.b",
   12359   "llvm.x86.ssse3.pabs.d",
   12360   "llvm.x86.ssse3.pabs.w",
   12361   "llvm.x86.ssse3.phadd.d",
   12362   "llvm.x86.ssse3.phadd.d.128",
   12363   "llvm.x86.ssse3.phadd.sw",
   12364   "llvm.x86.ssse3.phadd.sw.128",
   12365   "llvm.x86.ssse3.phadd.w",
   12366   "llvm.x86.ssse3.phadd.w.128",
   12367   "llvm.x86.ssse3.phsub.d",
   12368   "llvm.x86.ssse3.phsub.d.128",
   12369   "llvm.x86.ssse3.phsub.sw",
   12370   "llvm.x86.ssse3.phsub.sw.128",
   12371   "llvm.x86.ssse3.phsub.w",
   12372   "llvm.x86.ssse3.phsub.w.128",
   12373   "llvm.x86.ssse3.pmadd.ub.sw",
   12374   "llvm.x86.ssse3.pmadd.ub.sw.128",
   12375   "llvm.x86.ssse3.pmul.hr.sw",
   12376   "llvm.x86.ssse3.pmul.hr.sw.128",
   12377   "llvm.x86.ssse3.pshuf.b",
   12378   "llvm.x86.ssse3.pshuf.b.128",
   12379   "llvm.x86.ssse3.psign.b",
   12380   "llvm.x86.ssse3.psign.b.128",
   12381   "llvm.x86.ssse3.psign.d",
   12382   "llvm.x86.ssse3.psign.d.128",
   12383   "llvm.x86.ssse3.psign.w",
   12384   "llvm.x86.ssse3.psign.w.128",
   12385   "llvm.x86.subborrow.u32",
   12386   "llvm.x86.subborrow.u64",
   12387   "llvm.x86.tbm.bextri.u32",
   12388   "llvm.x86.tbm.bextri.u64",
   12389   "llvm.x86.vcvtph2ps.128",
   12390   "llvm.x86.vcvtph2ps.256",
   12391   "llvm.x86.vcvtps2ph.128",
   12392   "llvm.x86.vcvtps2ph.256",
   12393   "llvm.x86.wrfsbase.32",
   12394   "llvm.x86.wrfsbase.64",
   12395   "llvm.x86.wrgsbase.32",
   12396   "llvm.x86.wrgsbase.64",
   12397   "llvm.x86.wrpkru",
   12398   "llvm.x86.xabort",
   12399   "llvm.x86.xbegin",
   12400   "llvm.x86.xend",
   12401   "llvm.x86.xgetbv",
   12402   "llvm.x86.xop.vfrcz.pd",
   12403   "llvm.x86.xop.vfrcz.pd.256",
   12404   "llvm.x86.xop.vfrcz.ps",
   12405   "llvm.x86.xop.vfrcz.ps.256",
   12406   "llvm.x86.xop.vfrcz.sd",
   12407   "llvm.x86.xop.vfrcz.ss",
   12408   "llvm.x86.xop.vpcomb",
   12409   "llvm.x86.xop.vpcomd",
   12410   "llvm.x86.xop.vpcomq",
   12411   "llvm.x86.xop.vpcomub",
   12412   "llvm.x86.xop.vpcomud",
   12413   "llvm.x86.xop.vpcomuq",
   12414   "llvm.x86.xop.vpcomuw",
   12415   "llvm.x86.xop.vpcomw",
   12416   "llvm.x86.xop.vpermil2pd",
   12417   "llvm.x86.xop.vpermil2pd.256",
   12418   "llvm.x86.xop.vpermil2ps",
   12419   "llvm.x86.xop.vpermil2ps.256",
   12420   "llvm.x86.xop.vphaddbd",
   12421   "llvm.x86.xop.vphaddbq",
   12422   "llvm.x86.xop.vphaddbw",
   12423   "llvm.x86.xop.vphadddq",
   12424   "llvm.x86.xop.vphaddubd",
   12425   "llvm.x86.xop.vphaddubq",
   12426   "llvm.x86.xop.vphaddubw",
   12427   "llvm.x86.xop.vphaddudq",
   12428   "llvm.x86.xop.vphadduwd",
   12429   "llvm.x86.xop.vphadduwq",
   12430   "llvm.x86.xop.vphaddwd",
   12431   "llvm.x86.xop.vphaddwq",
   12432   "llvm.x86.xop.vphsubbw",
   12433   "llvm.x86.xop.vphsubdq",
   12434   "llvm.x86.xop.vphsubwd",
   12435   "llvm.x86.xop.vpmacsdd",
   12436   "llvm.x86.xop.vpmacsdqh",
   12437   "llvm.x86.xop.vpmacsdql",
   12438   "llvm.x86.xop.vpmacssdd",
   12439   "llvm.x86.xop.vpmacssdqh",
   12440   "llvm.x86.xop.vpmacssdql",
   12441   "llvm.x86.xop.vpmacsswd",
   12442   "llvm.x86.xop.vpmacssww",
   12443   "llvm.x86.xop.vpmacswd",
   12444   "llvm.x86.xop.vpmacsww",
   12445   "llvm.x86.xop.vpmadcsswd",
   12446   "llvm.x86.xop.vpmadcswd",
   12447   "llvm.x86.xop.vpperm",
   12448   "llvm.x86.xop.vprotb",
   12449   "llvm.x86.xop.vprotbi",
   12450   "llvm.x86.xop.vprotd",
   12451   "llvm.x86.xop.vprotdi",
   12452   "llvm.x86.xop.vprotq",
   12453   "llvm.x86.xop.vprotqi",
   12454   "llvm.x86.xop.vprotw",
   12455   "llvm.x86.xop.vprotwi",
   12456   "llvm.x86.xop.vpshab",
   12457   "llvm.x86.xop.vpshad",
   12458   "llvm.x86.xop.vpshaq",
   12459   "llvm.x86.xop.vpshaw",
   12460   "llvm.x86.xop.vpshlb",
   12461   "llvm.x86.xop.vpshld",
   12462   "llvm.x86.xop.vpshlq",
   12463   "llvm.x86.xop.vpshlw",
   12464   "llvm.x86.xrstor",
   12465   "llvm.x86.xrstor64",
   12466   "llvm.x86.xrstors",
   12467   "llvm.x86.xrstors64",
   12468   "llvm.x86.xsave",
   12469   "llvm.x86.xsave64",
   12470   "llvm.x86.xsavec",
   12471   "llvm.x86.xsavec64",
   12472   "llvm.x86.xsaveopt",
   12473   "llvm.x86.xsaveopt64",
   12474   "llvm.x86.xsaves",
   12475   "llvm.x86.xsaves64",
   12476   "llvm.x86.xsetbv",
   12477   "llvm.x86.xtest",
   12478   "llvm.xcore.bitrev",
   12479   "llvm.xcore.checkevent",
   12480   "llvm.xcore.chkct",
   12481   "llvm.xcore.clre",
   12482   "llvm.xcore.clrpt",
   12483   "llvm.xcore.clrsr",
   12484   "llvm.xcore.crc32",
   12485   "llvm.xcore.crc8",
   12486   "llvm.xcore.edu",
   12487   "llvm.xcore.eeu",
   12488   "llvm.xcore.endin",
   12489   "llvm.xcore.freer",
   12490   "llvm.xcore.geted",
   12491   "llvm.xcore.getet",
   12492   "llvm.xcore.getid",
   12493   "llvm.xcore.getps",
   12494   "llvm.xcore.getr",
   12495   "llvm.xcore.getst",
   12496   "llvm.xcore.getts",
   12497   "llvm.xcore.in",
   12498   "llvm.xcore.inct",
   12499   "llvm.xcore.initcp",
   12500   "llvm.xcore.initdp",
   12501   "llvm.xcore.initlr",
   12502   "llvm.xcore.initpc",
   12503   "llvm.xcore.initsp",
   12504   "llvm.xcore.inshr",
   12505   "llvm.xcore.int",
   12506   "llvm.xcore.mjoin",
   12507   "llvm.xcore.msync",
   12508   "llvm.xcore.out",
   12509   "llvm.xcore.outct",
   12510   "llvm.xcore.outshr",
   12511   "llvm.xcore.outt",
   12512   "llvm.xcore.peek",
   12513   "llvm.xcore.setc",
   12514   "llvm.xcore.setclk",
   12515   "llvm.xcore.setd",
   12516   "llvm.xcore.setev",
   12517   "llvm.xcore.setps",
   12518   "llvm.xcore.setpsc",
   12519   "llvm.xcore.setpt",
   12520   "llvm.xcore.setrdy",
   12521   "llvm.xcore.setsr",
   12522   "llvm.xcore.settw",
   12523   "llvm.xcore.setv",
   12524   "llvm.xcore.sext",
   12525   "llvm.xcore.ssync",
   12526   "llvm.xcore.syncr",
   12527   "llvm.xcore.testct",
   12528   "llvm.xcore.testwct",
   12529   "llvm.xcore.waitevent",
   12530   "llvm.xcore.zext",
   12531 #endif
   12532 
   12533 // Intrinsic ID to overload bitset
   12534 #ifdef GET_INTRINSIC_OVERLOAD_TABLE
   12535 static const uint8_t OTable[] = {
   12536   0 | (1<<3) | (1<<5) | (1<<6) | (1<<7),
   12537   0 | (1<<0) | (1<<3) | (1<<4) | (1<<5),
   12538   0,
   12539   0 | (1<<2) | (1<<5) | (1<<6) | (1<<7),
   12540   0 | (1<<0),
   12541   0 | (1<<0),
   12542   0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12543   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12544   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12545   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
   12546   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12547   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
   12548   0 | (1<<0) | (1<<1) | (1<<6),
   12549   0 | (1<<3) | (1<<5) | (1<<6) | (1<<7),
   12550   0 | (1<<0) | (1<<4) | (1<<5) | (1<<6),
   12551   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12552   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12553   0 | (1<<1) | (1<<2) | (1<<4) | (1<<5),
   12554   0 | (1<<0) | (1<<1) | (1<<2) | (1<<6) | (1<<7),
   12555   0 | (1<<0) | (1<<1) | (1<<2),
   12556   0 | (1<<1) | (1<<4) | (1<<5) | (1<<6),
   12557   0 | (1<<3),
   12558   0,
   12559   0,
   12560   0,
   12561   0 | (1<<1) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12562   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12563   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12564   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12565   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12566   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12567   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12568   0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12569   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12570   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12571   0 | (1<<0) | (1<<1) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12572   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12573   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12574   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12575   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12576   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12577   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12578   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12579   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | (1<<6),
   12580   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<6),
   12581   0 | (1<<0) | (1<<1) | (1<<4) | (1<<5),
   12582   0,
   12583   0 | (1<<2) | (1<<3) | (1<<4) | (1<<5),
   12584   0 | (1<<1) | (1<<2),
   12585   0 | (1<<3) | (1<<4) | (1<<5),
   12586   0 | (1<<4) | (1<<5) | (1<<6),
   12587   0 | (1<<0) | (1<<2) | (1<<3) | (1<<4) | (1<<6),
   12588   0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12589   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12590   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12591   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12592   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12593   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12594   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12595   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12596   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12597   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12598   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3),
   12599   0 | (1<<4) | (1<<6),
   12600   0 | (1<<2),
   12601   0 | (1<<1) | (1<<5) | (1<<6),
   12602   0,
   12603   0,
   12604   0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12605   0 | (1<<0) | (1<<1) | (1<<3),
   12606   0 | (1<<3) | (1<<4),
   12607   0,
   12608   0 | (1<<4),
   12609   0 | (1<<2),
   12610   0,
   12611   0,
   12612   0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12613   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
   12614   0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12615   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12616   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12617   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12618   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12619   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12620   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12621   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12622   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12623   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12624   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
   12625   0,
   12626   0,
   12627   0,
   12628   0,
   12629   0,
   12630   0,
   12631   0,
   12632   0 | (1<<4) | (1<<6),
   12633   0,
   12634   0,
   12635   0,
   12636   0 | (1<<3) | (1<<4),
   12637   0,
   12638   0,
   12639   0,
   12640   0,
   12641   0,
   12642   0,
   12643   0,
   12644   0,
   12645   0,
   12646   0,
   12647   0,
   12648   0,
   12649   0,
   12650   0,
   12651   0,
   12652   0,
   12653   0,
   12654   0,
   12655   0,
   12656   0,
   12657   0,
   12658   0,
   12659   0,
   12660   0,
   12661   0,
   12662   0,
   12663   0,
   12664   0,
   12665   0,
   12666   0,
   12667   0,
   12668   0,
   12669   0,
   12670   0,
   12671   0,
   12672   0,
   12673   0,
   12674   0,
   12675   0,
   12676   0,
   12677   0,
   12678   0,
   12679   0,
   12680   0,
   12681   0,
   12682   0,
   12683   0,
   12684   0,
   12685   0,
   12686   0,
   12687   0,
   12688   0,
   12689   0,
   12690   0,
   12691   0,
   12692   0,
   12693   0,
   12694   0,
   12695   0,
   12696   0,
   12697   0,
   12698   0,
   12699   0,
   12700   0,
   12701   0,
   12702   0,
   12703   0,
   12704   0,
   12705   0,
   12706   0,
   12707   0,
   12708   0,
   12709   0,
   12710   0,
   12711   0,
   12712   0,
   12713   0,
   12714   0,
   12715   0,
   12716   0,
   12717   0,
   12718   0,
   12719   0,
   12720   0,
   12721   0,
   12722   0,
   12723   0,
   12724   0,
   12725   0,
   12726   0,
   12727   0,
   12728   0,
   12729   0,
   12730   0,
   12731   0,
   12732   0,
   12733   0,
   12734   0,
   12735   0,
   12736   0,
   12737   0,
   12738   0,
   12739   0,
   12740   0,
   12741   0,
   12742   0,
   12743   0,
   12744   0,
   12745   0,
   12746   0,
   12747   0,
   12748   0,
   12749   0,
   12750   0,
   12751   0,
   12752   0,
   12753   0,
   12754   0,
   12755   0,
   12756   0,
   12757   0,
   12758   0,
   12759   0,
   12760   0,
   12761   0,
   12762   0,
   12763   0,
   12764   0,
   12765   0,
   12766   0,
   12767   0,
   12768   0,
   12769   0,
   12770   0,
   12771   0,
   12772   0,
   12773   0,
   12774   0,
   12775   0,
   12776   0,
   12777   0,
   12778   0,
   12779   0,
   12780   0,
   12781   0,
   12782   0,
   12783   0,
   12784   0,
   12785   0,
   12786   0,
   12787   0,
   12788   0,
   12789   0,
   12790   0,
   12791   0,
   12792   0,
   12793   0,
   12794   0,
   12795   0,
   12796   0,
   12797   0,
   12798   0,
   12799   0,
   12800   0,
   12801   0,
   12802   0,
   12803   0,
   12804   0,
   12805   0,
   12806   0,
   12807   0,
   12808   0,
   12809   0,
   12810   0,
   12811   0,
   12812   0,
   12813   0,
   12814   0,
   12815   0,
   12816   0,
   12817   0,
   12818   0,
   12819   0,
   12820   0,
   12821   0,
   12822   0,
   12823   0,
   12824   0,
   12825   0,
   12826   0,
   12827   0,
   12828   0,
   12829   0,
   12830   0,
   12831   0,
   12832   0,
   12833   0,
   12834   0,
   12835   0,
   12836   0,
   12837   0,
   12838   0,
   12839   0,
   12840   0,
   12841   0,
   12842   0,
   12843   0,
   12844   0,
   12845   0,
   12846   0,
   12847   0,
   12848   0,
   12849   0,
   12850   0,
   12851   0,
   12852   0,
   12853   0,
   12854   0,
   12855   0,
   12856   0,
   12857   0,
   12858   0,
   12859   0,
   12860   0,
   12861   0,
   12862   0,
   12863   0,
   12864   0,
   12865   0,
   12866   0,
   12867   0,
   12868   0,
   12869   0,
   12870   0,
   12871   0,
   12872   0,
   12873   0,
   12874   0,
   12875   0,
   12876   0,
   12877   0,
   12878   0,
   12879   0,
   12880   0,
   12881   0,
   12882   0,
   12883   0,
   12884   0,
   12885   0,
   12886   0,
   12887   0,
   12888   0,
   12889   0,
   12890   0,
   12891   0,
   12892   0,
   12893   0,
   12894   0,
   12895   0,
   12896   0,
   12897   0,
   12898   0,
   12899   0,
   12900   0,
   12901   0,
   12902   0,
   12903   0,
   12904   0,
   12905   0,
   12906   0,
   12907   0,
   12908   0,
   12909   0,
   12910   0,
   12911   0,
   12912   0,
   12913   0,
   12914   0,
   12915   0,
   12916   0,
   12917   0,
   12918   0,
   12919   0,
   12920   0,
   12921   0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12922   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12923   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12924   0 | (1<<0) | (1<<1),
   12925   0,
   12926   0 | (1<<3) | (1<<4),
   12927   0,
   12928   0,
   12929   0,
   12930   0,
   12931   0,
   12932   0,
   12933   0,
   12934   0,
   12935   0,
   12936   0,
   12937   0,
   12938   0,
   12939   0,
   12940   0,
   12941   0 | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   12942   0 | (1<<0),
   12943   0,
   12944   0,
   12945   0 | (1<<1),
   12946   0,
   12947   0 | (1<<5) | (1<<6) | (1<<7),
   12948   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5),
   12949   0,
   12950   0,
   12951   0,
   12952   0,
   12953   0,
   12954   0,
   12955   0,
   12956   0,
   12957   0,
   12958   0 | (1<<5),
   12959   0,
   12960   0,
   12961   0,
   12962   0,
   12963   0,
   12964   0,
   12965   0,
   12966   0,
   12967   0,
   12968   0,
   12969   0,
   12970   0,
   12971   0,
   12972   0,
   12973   0,
   12974   0,
   12975   0,
   12976   0,
   12977   0,
   12978   0,
   12979   0,
   12980   0,
   12981   0,
   12982   0,
   12983   0,
   12984   0,
   12985   0,
   12986   0,
   12987   0,
   12988   0,
   12989   0,
   12990   0,
   12991   0,
   12992   0,
   12993   0,
   12994   0,
   12995   0,
   12996   0,
   12997   0,
   12998   0,
   12999   0,
   13000   0,
   13001   0,
   13002   0,
   13003   0,
   13004   0,
   13005   0,
   13006   0,
   13007   0,
   13008   0,
   13009   0,
   13010   0,
   13011   0,
   13012   0,
   13013   0,
   13014   0,
   13015   0,
   13016   0,
   13017   0,
   13018   0,
   13019   0,
   13020   0,
   13021   0,
   13022   0,
   13023   0,
   13024   0,
   13025   0,
   13026   0,
   13027   0,
   13028   0,
   13029   0,
   13030   0 | (1<<3) | (1<<4),
   13031   0,
   13032   0,
   13033   0,
   13034   0,
   13035   0,
   13036   0,
   13037   0,
   13038   0,
   13039   0,
   13040   0,
   13041   0,
   13042   0,
   13043   0,
   13044   0,
   13045   0,
   13046   0,
   13047   0,
   13048   0,
   13049   0,
   13050   0,
   13051   0,
   13052   0,
   13053   0,
   13054   0,
   13055   0,
   13056   0,
   13057   0,
   13058   0,
   13059   0,
   13060   0,
   13061   0,
   13062   0,
   13063   0,
   13064   0,
   13065   0,
   13066   0,
   13067   0,
   13068   0,
   13069   0,
   13070   0,
   13071   0,
   13072   0,
   13073   0,
   13074   0,
   13075   0,
   13076   0,
   13077   0 | (1<<6),
   13078   0,
   13079   0,
   13080   0 | (1<<1),
   13081   0,
   13082   0,
   13083   0,
   13084   0,
   13085   0,
   13086   0,
   13087   0,
   13088   0,
   13089   0,
   13090   0,
   13091   0,
   13092   0,
   13093   0,
   13094   0,
   13095   0,
   13096   0,
   13097   0,
   13098   0,
   13099   0,
   13100   0,
   13101   0,
   13102   0 | (1<<7),
   13103   0 | (1<<0),
   13104   0 | (1<<3),
   13105   0,
   13106   0,
   13107   0,
   13108   0,
   13109   0,
   13110   0,
   13111   0,
   13112   0,
   13113   0,
   13114   0,
   13115   0,
   13116   0,
   13117   0,
   13118   0,
   13119   0,
   13120   0,
   13121   0,
   13122   0,
   13123   0,
   13124   0,
   13125   0,
   13126   0,
   13127   0,
   13128   0,
   13129   0,
   13130   0 | (1<<5) | (1<<6),
   13131   0,
   13132   0,
   13133   0,
   13134   0,
   13135   0,
   13136   0,
   13137   0,
   13138   0,
   13139   0,
   13140   0,
   13141   0,
   13142   0,
   13143   0,
   13144   0,
   13145   0,
   13146   0,
   13147   0,
   13148   0,
   13149   0,
   13150   0,
   13151   0,
   13152   0,
   13153   0,
   13154   0,
   13155   0,
   13156   0,
   13157   0,
   13158   0,
   13159   0,
   13160   0,
   13161   0,
   13162   0,
   13163   0,
   13164   0,
   13165   0,
   13166   0,
   13167   0,
   13168   0,
   13169   0,
   13170   0,
   13171   0,
   13172   0,
   13173   0,
   13174   0,
   13175   0,
   13176   0,
   13177   0,
   13178   0,
   13179   0,
   13180   0,
   13181   0,
   13182   0,
   13183   0,
   13184   0,
   13185   0,
   13186   0,
   13187   0,
   13188   0,
   13189   0,
   13190   0,
   13191   0,
   13192   0,
   13193   0,
   13194   0,
   13195   0,
   13196   0,
   13197   0,
   13198   0,
   13199   0,
   13200   0,
   13201   0,
   13202   0,
   13203   0,
   13204   0,
   13205   0,
   13206   0,
   13207   0,
   13208   0,
   13209   0,
   13210   0,
   13211   0,
   13212   0,
   13213   0,
   13214   0,
   13215   0,
   13216   0,
   13217   0,
   13218   0,
   13219   0,
   13220   0,
   13221   0,
   13222   0,
   13223   0,
   13224   0,
   13225   0,
   13226   0,
   13227   0,
   13228   0,
   13229   0,
   13230   0,
   13231   0,
   13232   0,
   13233   0,
   13234   0,
   13235   0,
   13236   0,
   13237   0,
   13238   0,
   13239   0,
   13240   0,
   13241   0,
   13242   0,
   13243   0,
   13244   0,
   13245   0,
   13246   0,
   13247   0,
   13248   0,
   13249   0,
   13250   0,
   13251   0,
   13252   0,
   13253   0,
   13254   0,
   13255   0,
   13256   0,
   13257   0,
   13258   0,
   13259   0,
   13260   0,
   13261   0,
   13262   0,
   13263   0,
   13264   0,
   13265   0,
   13266   0,
   13267   0,
   13268   0,
   13269   0,
   13270   0,
   13271   0,
   13272   0,
   13273   0,
   13274   0,
   13275   0,
   13276   0,
   13277   0,
   13278   0,
   13279   0,
   13280   0,
   13281   0,
   13282   0,
   13283   0,
   13284   0,
   13285   0,
   13286   0,
   13287   0,
   13288   0,
   13289   0,
   13290   0,
   13291   0,
   13292   0,
   13293   0,
   13294   0,
   13295   0,
   13296   0,
   13297   0,
   13298   0,
   13299   0,
   13300   0,
   13301   0,
   13302   0,
   13303   0,
   13304   0,
   13305   0,
   13306   0,
   13307   0,
   13308   0,
   13309   0 | (1<<7),
   13310   0 | (1<<1) | (1<<5) | (1<<6) | (1<<7),
   13311   0 | (1<<0) | (1<<5) | (1<<6) | (1<<7),
   13312   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   13313   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
   13314   0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | (1<<6) | (1<<7),
   13315   0 | (1<<1) | (1<<2) | (1<<5) | (1<<6) | (1<<7),
   13316   0
   13317 };
   13318 
   13319 return (OTable[id/8] & (1 << (id%8))) != 0;
   13320 #endif
   13321 
   13322 // Global intrinsic function declaration type table.
   13323 #ifdef GET_INTRINSIC_GENERATOR_GLOBAL
   13324 static const unsigned IIT_Table[] = {
   13325   0x2E, 0x2E2E, (1U<<31) | 1714, 0x10, 0x1F1F, 0x1F1F, 0x2F2F,
   13326   0x2F2F, 0x2E2E0, (1U<<31) | 3913, 0x32F, 0x2F3, 0x2F2F2F, (1U<<31) | 3906, (1U<<31) | 990,
   13327   0x2E0, 0x2E1, 0x12E1, 0x2E, (1U<<31) | 990, (1U<<31) | 919, 0x2E2E1, 0x142E2E,
   13328   0x2E0, (1U<<31) | 992, 0x1F, 0x22E2E, (1U<<31) | 187, 0x2F2F, 0x11F1F, 0x1F1F,
   13329   0x11F1F, (1U<<31) | 3960, (1U<<31) | 3960, (1U<<31) | 3960, 0x0, 0x0, 0x42E, (1U<<31) | 3910,
   13330   (1U<<31) | 3909, 0x2E40, 0x2E50, 0x40, 0x2E0, 0x2E0, 0x2E, 0x2E4,
   13331   0x0, 0x2E4, 0x0, 0x2F2F, 0x2F2F, 0x1F1F1F, (1U<<31) | 3945, (1U<<31) | 3945,
   13332   (1U<<31) | 3945, (1U<<31) | 3943, (1U<<31) | 3943, (1U<<31) | 3941, (1U<<31) | 3943, (1U<<31) | 3943, (1U<<31) | 3943, (1U<<31) | 3945,
   13333   (1U<<31) | 3945, (1U<<31) | 3945, (1U<<31) | 3945, (1U<<31) | 3943, (1U<<31) | 3952, (1U<<31) | 3945, (1U<<31) | 3945, (1U<<31) | 3945,
   13334   (1U<<31) | 3965, (1U<<31) | 2378, (1U<<31) | 3902, (1U<<31) | 3989, (1U<<31) | 3969, (1U<<31) | 3981, (1U<<31) | 3973, (1U<<31) | 3998,
   13335   0xBF1F, 0xBF1F, (1U<<31) | 3934, 0xBF2F, 0xBF2F, (1U<<31) | 3934, 0xBF1F, 0xBF1F,
   13336   0xBF1F, 0xBF1F, 0xBF1F, 0xBF1F, 0xBF1F, 0x2F2F, 0x2F2F, 0x4,
   13337   0x2F2F2F2F, 0x2F2F2F2F, 0x42E, 0x2EE2E2E, 0x2E2EE0, 0x2EE2E2E0, 0x1F, 0x2E2E2E0,
   13338   0x4452E0, 0x54452E0, 0x44552E0, (1U<<31) | 2875, 0x2E2E, (1U<<31) | 2876, 0x4F50, 0x4F50,
   13339   0x1F2E2E, 0x2E, (1U<<31) | 3966, 0x42E2E2E, 0x2F2F, 0x2F2F, 0x2F2F, 0x42E0,
   13340   (1U<<31) | 107, (1U<<31) | 1175, (1U<<31) | 1185, (1U<<31) | 1197, (1U<<31) | 116, (1U<<31) | 127, 0x2F2F2F, (1U<<31) | 158,
   13341   (1U<<31) | 2903, (1U<<31) | 158, (1U<<31) | 2903, 0x149F24F0, 0x49F24F0, 0x2F2F2F, 0x2F2F, 0x11CF1F,
   13342   0x40, 0x2F2F2F, 0x42F2F, 0x4442E0, (1U<<31) | 1724, (1U<<31) | 3916, 0x5, 0x42E,
   13343   0x2F2F, 0x2F2F, (1U<<31) | 173, 0x2E4, 0x42E0, 0x42E4, 0x2F2F, (1U<<31) | 173,
   13344   0x2F2F, 0xF0F, (1U<<31) | 173, 0x2E, 0x2EE2E0, 0x2E0, 0x2E, 0x2E,
   13345   0x0, 0x2F2F, (1U<<31) | 3925, (1U<<31) | 3920, (1U<<31) | 173, (1U<<31) | 173, (1U<<31) | 173, 0x2E2E0,
   13346   0x2E0, 0x2E0, 0x42E2E2E0, (1U<<31) | 182, 0x42E0, 0x0, 0x444, 0x444,
   13347   0x444, 0x444, 0x544, 0x444, 0x444, 0x544, 0x2C2C2C, 0x2C2C2C,
   13348   0x2C2C, 0x2C2C, 0x4A44A4A, 0x44, 0x4A44A4A, 0x4A44A4A, 0x4A4A4A4A, 0x4A4A4A,
   13349   0x4A4A4A4A, 0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x40, 0x40, 0x40, 0x40,
   13350   (1U<<31) | 934, 0x4F5, (1U<<31) | 934, 0x4F5, 0x1F1F, (1U<<31) | 1252, 0x3F3F3F, 0x3F3F,
   13351   0x3F3F3F, 0xAFAF1F, 0xAFAF1F, 0xBF2F, 0xAF1F, 0xAF1F, 0xAF1F, 0xAF1F,
   13352   0xAF1F, 0xAF1F, 0xAF1F, 0xAF1F, 0xBF3F, 0xAF1F, 0xAF1F, 0x3F3F3F,
   13353   0x2F2F2F, 0x3F3F3F, 0xBF2F, 0x3F3F3F, 0xBF2F, 0x3F3F3F, 0x2F2F2F, 0x3F3F3F,
   13354   0xBF2F, 0x3F3F3F, 0xBF2F, 0x2F2F2F, 0x2F2F, 0x2F2F2F, 0x2F2F, 0x2F2F,
   13355   0x2F2F, 0x2F2F2F, (1U<<31) | 3788, (1U<<31) | 3778, (1U<<31) | 3766, (1U<<31) | 3788, (1U<<31) | 3867, (1U<<31) | 3788,
   13356   (1U<<31) | 3778, (1U<<31) | 3850, (1U<<31) | 3778, (1U<<31) | 3766, (1U<<31) | 3829, (1U<<31) | 3766, 0x3F3F3F, (1U<<31) | 1264,
   13357   0x552C, (1U<<31) | 1252, 0x3F3F, (1U<<31) | 1271, (1U<<31) | 1252, 0x3F3F3F, 0xBF3F, 0xBF1F,
   13358   0xBF1F, 0x9F1F, 0x9F1F, 0x9F1F, 0x3F3F3F, (1U<<31) | 1259, 0x3F3F3F, 0x3F3F3F,
   13359   0x3F3F3F, 0xBF1F, 0x3F3F3F, 0x3F3F3F, 0xBF1F, (1U<<31) | 1264, 0x1F1F, 0x1F1F1F,
   13360   0x1F1F1F, (1U<<31) | 1264, 0x445, 0x1F1F, 0x1F1F1F, 0x1F1F1F, (1U<<31) | 1271, (1U<<31) | 1271,
   13361   0x1F1F1F, 0x1F1F1F, (1U<<31) | 1271, (1U<<31) | 1271, 0x1F1F1F, (1U<<31) | 191, (1U<<31) | 191, 0x3F3F3F,
   13362   0x1F1F1F, 0x1F1F1F, (1U<<31) | 1905, 0xCF3F3F0, (1U<<31) | 3744, (1U<<31) | 3754, 0xCF3F3F0, (1U<<31) | 3796,
   13363   (1U<<31) | 3744, (1U<<31) | 3805, (1U<<31) | 3754, (1U<<31) | 3816, (1U<<31) | 1252, 0x1F1F1F, 0x3F2C3F, 0x3F2C2C3F,
   13364   (1U<<31) | 1225, (1U<<31) | 1210, 0x3F2C3F3F, (1U<<31) | 1236, (1U<<31) | 1223, (1U<<31) | 1208, 0x3F3F3F, 0xBF3F,
   13365   0xBF1F, 0xBF1F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0xBF1F, 0x3F3F3F,
   13366   0x3F3F3F, 0xBF1F, (1U<<31) | 1264, 0x1F1F1F, 0x1F1F1F, (1U<<31) | 1271, 0x1F1F1F, (1U<<31) | 1271,
   13367   0x1F1F1F, (1U<<31) | 191, 0x3F3F, 0x3F3F3F, 0x1F1F1F, 0x3F3F, 0x1F1F1F, (1U<<31) | 1905,
   13368   0x1F1F1F, 0x53F5BF3F, 0x4AF1F, 0x4AF1F, 0x7A3A, 0x49F2F, 0x49F2F, 0x3A7A,
   13369   0x43F3F3F, 0x43F3F3F, 0x1F1F1F, 0x2F2F2F, 0x87, 0x2E554, 0x4F54, 0x2E554,
   13370   0x4F54, 0x1F1F1F, 0x4444, 0x4444, (1U<<31) | 137, (1U<<31) | 137, 0x55, 0x1444A44,
   13371   0x1444A44, 0x1444A444, 0x1444A44, 0x1444A44, 0x1444A44, 0x1444A44, 0x1444A44, 0x1444A44,
   13372   0x1444A44, 0x1444A44, 0x11444A2F, 0x11444A2F, (1U<<31) | 77, (1U<<31) | 77, 0x0, 0x0,
   13373   0x0, 0x42F1, 0x2F2F, 0x7777, 0x7777, 0x7777, 0x7777, 0x4474,
   13374   0x7769, 0x5, (1U<<31) | 210, 0x2F2F2F2F, (1U<<31) | 97, (1U<<31) | 87, 0x444, 0x444,
   13375   0x444, (1U<<31) | 2939, 0x555, 0x50, (1U<<31) | 0, (1U<<31) | 53, 0x42F2F5, 0x777,
   13376   0x2F2F2F2F, 0x777, 0x2F2F, 0xAF1F, 0x2F2F, 0x4, 0x41F1F5, (1U<<31) | 168,
   13377   0x515, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 42, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43,
   13378   (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 43, (1U<<31) | 14, (1U<<31) | 14,
   13379   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13380   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13381   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 30,
   13382   (1U<<31) | 30, (1U<<31) | 30, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13383   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13384   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13385   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13386   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 14,
   13387   (1U<<31) | 14, (1U<<31) | 14, (1U<<31) | 29, (1U<<31) | 29, (1U<<31) | 210, (1U<<31) | 210, 0x50, 0x440,
   13388   0x44447, 0x44477, 0x444777, (1U<<31) | 210, 0x42F2F, 0x4444, 0x2F2F, 0x51,
   13389   0x444, 0x444, 0x14441F1F, 0x5455, 0x4A454A, 0x4444, 0x1, 0x5455,
   13390   (1U<<31) | 210, 0x2F2F, 0x77, 0x44, 0x444, 0x2F2F, 0x2F2F, 0x77,
   13391   0x0, 0x0, 0x0, 0x0, 0x0, 0x40, 0x5, 0x44,
   13392   0x40, 0x5, 0x5, 0x440, 0x440, 0x40, 0x40, 0x4444,
   13393   0x4444, 0x4444, 0x441F1F, 0x1F1F1F, 0x1F1F, 0x2F2F, (1U<<31) | 64, (1U<<31) | 63,
   13394   0x42F2F, 0x441F1F, 0x0, (1U<<31) | 147, 0x0, 0x4, 0x4, 0x4,
   13395   0x4, 0x4, 0x4, 0xF0F, 0xF0F, 0x4444440, 0x4444440, 0x0,
   13396   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x40, 0x40,
   13397   0x40, 0x4, 0x40, 0x40, 0x4F4, (1U<<31) | 928, 0x2E440, 0x2E440,
   13398   0x2E440, 0x2E440, 0x4F4, (1U<<31) | 928, 0x4444440, 0x4444440, 0x444440, 0x444440,
   13399   0x444444, 0x444444, (1U<<31) | 2005, (1U<<31) | 2005, 0x2C2C2C, 0x2C2C2C, 0x2C2C, 0x2C2C,
   13400   0x4A44A4A, 0x44, 0x4A44A4A, 0x4A44A4A, 0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x4A4A4A4A,
   13401   0x4A4A4A, 0x4A4A4A4A, 0x3F3F3F, 0x3F3F3F, 0x3F3F, 0xBFBF3F, 0xBFBF3F, 0x3F3F3F3F,
   13402   0x3F3F, 0xBF3F, 0xBF3F, 0x4AF1F, 0x4AF1F, 0x7A3A, 0x49F2F, 0x49F2F,
   13403   0x3A7A, 0xBF3F, 0xBF3F, 0xBF3F, 0xBF3F, 0xBF3F, 0xBF3F, 0x3F3F3F,
   13404   0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x4CF3F, (1U<<31) | 2808, (1U<<31) | 1981, (1U<<31) | 2797, (1U<<31) | 1963,
   13405   (1U<<31) | 2784, (1U<<31) | 1941, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F,
   13406   (1U<<31) | 1264, (1U<<31) | 1264, (1U<<31) | 1264, 0x3F3F3F, 0xBF3F3F, 0xBF3F3F, 0x3F3F3F, 0xBF3F,
   13407   0xBF3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F, 0x3F3F3F, 0x3F3F3F,
   13408   0x3F3F3F, (1U<<31) | 1264, (1U<<31) | 1247, (1U<<31) | 1247, (1U<<31) | 1247, 0x3F3F, 0x3F3F3F, (1U<<31) | 1252,
   13409   (1U<<31) | 1252, (1U<<31) | 1252, 0x3F3F3F, 0x3F3F3F, (1U<<31) | 1252, (1U<<31) | 1252, (1U<<31) | 1252, 0x3F3F3F,
   13410   0x3F3F3F, 0x3F3F3F, 0x3F3F3F, 0x3F3F3F, (1U<<31) | 1252, 0x3F3F, 0x3F3F3F, 0x3F3F3F,
   13411   0x3F3F3F, 0x3F3F, 0x3F3F, 0x3F3F, 0x3F3F, 0x3F3F, 0x3F3F, (1U<<31) | 1252,
   13412   0x3F3F3F, 0x3F3F3F, 0x3F3F, 0x3F3F3F, (1U<<31) | 1252, 0x3F3F3F3F, 0x3F3F3F, 0x3F3F3F,
   13413   0x4BF4F0, 0x4BFBF4F0, (1U<<31) | 2247, (1U<<31) | 2718, (1U<<31) | 2257, (1U<<31) | 2729, (1U<<31) | 2269, 0x2B2B2B,
   13414   0x2B2B2B2B, (1U<<31) | 892, (1U<<31) | 890, 0x2B2B2B2B, (1U<<31) | 892, (1U<<31) | 890, (1U<<31) | 888, 0x444,
   13415   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13416   0x444, 0x444, 0x444, 0x40, 0x444, 0x444, 0x444, 0x444,
   13417   0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x5445, 0x5445,
   13418   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x5445, 0x5445,
   13419   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13420   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13421   0x2E440, 0x2E440, 0x2E440, 0x2E440, 0x4F44, 0x2E444, 0x4F44, 0x2E444,
   13422   0x444, 0x44, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13423   0x444, 0x444, 0x444, 0x40, 0x444, 0x444, 0x444, 0x444,
   13424   0x444, 0x444, 0x444, 0x4444, 0x444, 0x444, 0x444, 0x444,
   13425   0x444, 0x444, 0x44, 0x2F7, 0x2F7, 0x52E5, 0x52E5, 0x52E5,
   13426   0x555, 0x44, 0x55, 0x44, 0x444, 0x444, 0x444, 0x444,
   13427   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13428   0x444, 0x444, 0x555, 0x555, 0x444, 0x545, 0x444, 0x444,
   13429   0x555, 0x44, 0x44, 0x444, 0x444, 0x444, 0x444, 0x445,
   13430   0x445, 0x444, 0x555, 0x444, 0x555, 0x444, 0x555, 0x444,
   13431   0x555, 0x44, 0x55, 0x44, 0x44, 0x55, 0x444, 0x444,
   13432   0x555, 0x54, 0x54, 0x44, 0x44, 0x44, 0x44, 0x444,
   13433   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13434   0x444, 0x444, 0x444, 0x444, 0x555, 0x444, 0x444, 0x444,
   13435   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13436   0x44, 0x44, 0x44, 0x45, 0x44, 0x444, 0x444, 0x55,
   13437   0x45, 0x44, 0x55, 0x55, 0x55, 0x55, 0x555, 0x555,
   13438   0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13439   0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13440   0x555, 0x555, 0x554, 0x554, 0x554, 0x554, 0x554, 0x554,
   13441   0x554, 0x554, 0x55, 0x555, 0x555, 0x555, 0x555, 0x555,
   13442   0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13443   0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x5555, 0x555,
   13444   0x5555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13445   0x555, 0x444, 0x555, 0x44, 0x44, 0x444, 0x555, 0x445,
   13446   0x445, 0x544, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13447   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x445, 0x445,
   13448   0x444, 0x444, 0x444, 0x444, 0x555, 0x444, 0x444, 0x444,
   13449   0x444, 0x444, 0x444, 0x444, 0x444, 0x454, 0x554, 0x454,
   13450   0x554, 0x454, 0x454, 0x454, 0x454, 0x454, 0x454, 0x454,
   13451   0x454, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555,
   13452   0x4555, 0x554, 0x44, 0x444, 0x444, 0x44, 0x444, 0x444,
   13453   0x444, 0x444, 0x444, 0x554, 0x444, 0x444, 0x444, 0x444,
   13454   0x554, 0x444, 0x444, 0x554, 0x444, 0x444, 0x45, 0x4444,
   13455   0x4444, 0x4444, 0x4444, 0x44, 0x444, 0x444, 0x44, 0x44,
   13456   0x44, 0x444, 0x5545, 0x444, 0x4444, 0x4444, 0x4444, 0x4444,
   13457   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13458   0x444, 0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x58,
   13459   0x57, 0x85, 0x85, 0x87, 0x85, 0x85, 0x84, 0x84,
   13460   0x84, 0x84, 0x75, 0x75, 0x78, 0x75, 0x75, 0x74,
   13461   0x74, 0x74, 0x74, 0x58, 0x57, 0x48, 0x47, 0x48,
   13462   0x47, 0x484, 0x884, 0x884, 0x884, 0x884, 0x48, 0x48,
   13463   0x777, 0x474, 0x774, 0x774, 0x774, 0x774, 0x777, 0x777,
   13464   0x77, 0x7777, 0x7777, 0x47777, 0x7777, 0x7777, 0x47, 0x47,
   13465   0x777, 0x777, 0x777, 0x777, 0x4E4, 0x5E5, 0x4444, 0x4444,
   13466   0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 0x445,
   13467   0x444, 0x444, 0x444, 0x444, 0x445, 0x445, 0x445, 0x445,
   13468   0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x444, 0x445,
   13469   0x4455, 0x4455, 0x445, 0x444, 0x444, 0x444, 0x444, 0x4444,
   13470   0x4444, 0x4444, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555,
   13471   0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555,
   13472   0x5555, 0x5555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13473   0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555,
   13474   0x555, 0x555, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13475   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13476   0x4444, 0x4444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13477   0x444, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13478   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13479   0x4444, 0x4444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13480   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13481   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13482   0x444, 0x444, 0x444, 0x444, 0x444, 0x4455, 0x4455, 0x4455,
   13483   0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x445,
   13484   0x445, 0x445, 0x445, 0x445, 0x445, 0x4455, 0x4455, 0x4455,
   13485   0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x445,
   13486   0x445, 0x445, 0x445, 0x445, 0x445, 0x444, 0x444, 0x444,
   13487   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13488   0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444,
   13489   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13490   0x444, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455,
   13491   0x4455, 0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x445,
   13492   0x445, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455,
   13493   0x4455, 0x444, 0x4444, 0x4444, 0x4444, 0x555, 0x555, 0x5555,
   13494   0x5555, 0x555, 0x555, 0x555, 0x555, 0x5555, 0x5555, 0x554,
   13495   0x554, 0x555, 0x555, 0x4455, 0x5555, 0x5555, 0x5555, 0x4455,
   13496   0x4455, 0x4455, 0x4455, 0x555, 0x555, 0x445, 0x444, 0x445,
   13497   0x444, 0x445, 0x445, 0x554, 0x554, 0x5555, 0x5555, 0x5555,
   13498   0x5555, 0x555, 0x555, 0x555, 0x555, 0x4555, 0x455, 0x454,
   13499   0x5555, 0x555, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x454,
   13500   0x454, 0x454, 0x454, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444,
   13501   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x445, 0x4455,
   13502   0x445, 0x4455, 0x5555, 0x5555, 0x555, 0x555, 0x5555, 0x5555,
   13503   0x555, 0x555, 0x4444, 0x4444, 0x4444, 0x5555, 0x5555, 0x555,
   13504   0x4455, 0x4455, 0x445, 0x445, 0x5555, 0x5555, 0x555, 0x555,
   13505   0x555, 0x555, 0x4444, 0x455, 0x4555, 0x4555, 0x4555, 0x4555,
   13506   0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x4444,
   13507   0x455, 0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555,
   13508   0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x455, 0x455,
   13509   0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x455, 0x455, 0x444,
   13510   0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x444, 0x454, 0x455,
   13511   0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444,
   13512   0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x454, 0x455, 0x455,
   13513   0x44, 0x55, 0x4555, 0x44, 0x54, 0x44, 0x54, 0x44,
   13514   0x44, 0x54, 0x444, 0x444, 0x44, 0x54, 0x44, 0x54,
   13515   0x55, 0x4444, 0x544, 0x4455, 0x555, 0x44444, 0x5444, 0x44555,
   13516   0x5555, 0x55, 0x555, 0x455, 0x4555, 0x4555, 0x4555, 0x4555,
   13517   0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x455, 0x455,
   13518   0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444,
   13519   0x4444, 0x4444, 0x4444, 0x4444, 0x455, 0x455, 0x455, 0x4555,
   13520   0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444,
   13521   0x4444, 0x455, 0x455, 0x445, 0x554, 0x444, 0x444, 0x555,
   13522   0x555, 0x555, 0x555, 0x44E4, 0x44, 0x44, 0x44444, 0x44444,
   13523   0x44444, 0x44444, 0x444, 0x444, 0x444, 0x444, 0x4555, 0x4555,
   13524   0x455, 0x455, 0x4555, 0x54, 0x54, 0x54, 0x55, 0x54,
   13525   0x55, 0x54, 0x55, 0x54, 0x55, 0x44, 0x45, 0x4555,
   13526   0x4555, 0x45, 0x45, 0x54, 0x555, 0x54, 0x555, 0x45,
   13527   0x45, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x454,
   13528   0x54, 0x4444, 0x544, 0x4455, 0x555, 0x444, 0x444, 0x444,
   13529   0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x55E4, 0x4444,
   13530   0x4444, 0x4444, 0x4455, 0x44555, 0x555, 0x555, 0x555, 0x555,
   13531   0x555, 0x555, 0x454, 0x454, 0x54, 0x455, 0x455, 0x4555,
   13532   0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444,
   13533   0x4444, 0x4444, 0x45, 0x555, 0x555, 0x44, 0x44C4, 0x44D4,
   13534   0x4D4C, (1U<<31) | 2887, 0x4D4C, (1U<<31) | 2887, 0x44C, 0x44D, 0x44C, 0x44D,
   13535   0x44C, 0x44D, (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 198, (1U<<31) | 205,
   13536   (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 1281, (1U<<31) | 1289, (1U<<31) | 1281, (1U<<31) | 1289,
   13537   (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 196, (1U<<31) | 203, (1U<<31) | 196, (1U<<31) | 203, 0x4C4C4C, 0x4D4D4D,
   13538   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D,
   13539   0x4C4C, 0x4D4D, 0x4C4C, 0x4D4D, 0x4C4C, 0x4D4D, 0x4C4C4C, 0x4D4D4D,
   13540   0x4D4D4D, (1U<<31) | 2892, (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841, 0x4C4C4C, 0x4D4D4D,
   13541   0x4D4D4D, (1U<<31) | 2892, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13542   0x4D4D4D, (1U<<31) | 2892, (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841, 0x4C4C4C, 0x4D4D4D,
   13543   0x4D4D4D, (1U<<31) | 2892, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859, 0x4C4C4D, (1U<<31) | 2861,
   13544   0x4C4C4D4D, (1U<<31) | 2859, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, 0x4C4C4C, 0x4D4D4D,
   13545   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859,
   13546   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892,
   13547   (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892,
   13548   0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D, (1U<<31) | 1279, (1U<<31) | 1287,
   13549   (1U<<31) | 1277, (1U<<31) | 1285, (1U<<31) | 1279, (1U<<31) | 1287, (1U<<31) | 1277, (1U<<31) | 1285, (1U<<31) | 2742, (1U<<31) | 2817,
   13550   (1U<<31) | 2742, (1U<<31) | 2817, (1U<<31) | 2285, (1U<<31) | 2323, (1U<<31) | 2283, (1U<<31) | 2321, 0x44C4C, 0x44D4D,
   13551   0x4C4C4C, 0x4D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D,
   13552   0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D,
   13553   0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C, 0x44D4D,
   13554   0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D,
   13555   0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D,
   13556   0x4D4D, (1U<<31) | 2894, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13557   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13558   0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D, 0x4C4C, 0x4D4D, 0x4C4C4D, (1U<<31) | 2861,
   13559   0x4C, 0x4D, 0x4C4C, 0x4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D,
   13560   0x44C4C4D, (1U<<31) | 2341, 0x4C4C4C, 0x4D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D,
   13561   0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D,
   13562   0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365, 0x44D4C, (1U<<31) | 2359, 0x44D4C4C, (1U<<31) | 2357,
   13563   0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x44D4C, (1U<<31) | 2359, 0x44D4C4C, (1U<<31) | 2357,
   13564   0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D,
   13565   0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13566   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13567   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13568   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13569   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13570   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13571   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13572   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13573   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2759, (1U<<31) | 2834, (1U<<31) | 2757, (1U<<31) | 2832,
   13574   (1U<<31) | 2757, (1U<<31) | 2832, (1U<<31) | 2757, (1U<<31) | 2832, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D,
   13575   0x44C4C4C, 0x44D4D4D, 0x44C4C, 0x44D4D, 0x44C4C, 0x44D4D, 0x4C4C4C, 0x4D4D4D,
   13576   0x44C4C, 0x44D4D, 0x4C4C4C, 0x4D4D4D, 0x454C4C, 0x454D4D, 0x454C4C4C, 0x454D4D4D,
   13577   0x454D4D, (1U<<31) | 2418, 0x454D4D4D, (1U<<31) | 2416, 0x44C4C4C, 0x44D4D4D, 0x44C4C4C, 0x44D4D4D,
   13578   (1U<<31) | 2301, (1U<<31) | 2329, (1U<<31) | 2301, (1U<<31) | 2329, 0x44C4C4C, 0x44D4D4D, 0x44C4C4D, (1U<<31) | 2341,
   13579   0x44C4C4D, (1U<<31) | 2341, (1U<<31) | 2311, (1U<<31) | 2339, (1U<<31) | 2311, (1U<<31) | 2339, 0x44C4C4D, (1U<<31) | 2341,
   13580   (1U<<31) | 2749, (1U<<31) | 2824, (1U<<31) | 2749, (1U<<31) | 2824, (1U<<31) | 2749, (1U<<31) | 2824, (1U<<31) | 2749, (1U<<31) | 2824,
   13581   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13582   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13583   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365,
   13584   0x4D4D4D, (1U<<31) | 2892, 0x4D4D4D, (1U<<31) | 2892, 0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365,
   13585   0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365, 0x44C4D, (1U<<31) | 2351, 0x44C4D4D, (1U<<31) | 2349,
   13586   0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859,
   13587   0x4C4C4C, 0x4D4D4D, 0x4C4C4D, (1U<<31) | 2861, 0x44C4D, (1U<<31) | 2351, 0x44C4D4D, (1U<<31) | 2349,
   13588   0x44C4C, 0x44D4D, 0x44C4C, 0x44D4D, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859,
   13589   0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13590   0x4C4C4C4C, 0x4D4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13591   0x4C4C4C4C, 0x4D4D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D,
   13592   0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D,
   13593   0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4D4D, (1U<<31) | 2859,
   13594   0x4C4C4C, 0x4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D, 0x44C4D, (1U<<31) | 2351,
   13595   0x44C4D4D, (1U<<31) | 2349, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859, 0x44C4D, (1U<<31) | 2351,
   13596   0x44C4D4D, (1U<<31) | 2349, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D4D, (1U<<31) | 2859, (1U<<31) | 2766, (1U<<31) | 2841,
   13597   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D,
   13598   0x4C4C, 0x4D4D, 0x4C4C, 0x4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13599   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13600   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D,
   13601   0x4C4C4C, 0x4D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x444D4D, (1U<<31) | 2090,
   13602   0x444D4D4D, (1U<<31) | 2088, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13603   0x4C4C4C4C, 0x4D4D4D4D, 0x44C4C, 0x44D4D, 0x44C4C4C, 0x44D4D4D, 0x444D4D, (1U<<31) | 2090,
   13604   0x444D4D4D, (1U<<31) | 2088, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C4C, 0x4D4D4D4D, 0x44C4C, 0x44D4D,
   13605   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13606   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x444D4D, (1U<<31) | 2090, 0x444D4D4D, (1U<<31) | 2088,
   13607   0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4C4D, (1U<<31) | 2870,
   13608   0x4C4D, (1U<<31) | 2870, 0x4C4C4C, 0x4D4D4D, 0x4C4C, 0x4D4D, 0x4C4C4C, 0x4D4D4D,
   13609   0x4C4C, 0x4D4D, 0x4C4C4C, 0x4D4D4D, 0x44C4C4D, (1U<<31) | 2341, 0x4C4C4D, (1U<<31) | 2861,
   13610   0x4C4C4D, (1U<<31) | 2861, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892,
   13611   (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892,
   13612   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841,
   13613   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4D, (1U<<31) | 2861,
   13614   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, 0x4C4C4C, 0x4D4D4D, 0x4C4C4C, 0x4D4D4D,
   13615   0x4D4D4D, (1U<<31) | 2892, 0x4C4C4D, (1U<<31) | 2861, 0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892,
   13616   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, (1U<<31) | 2766, (1U<<31) | 2841, (1U<<31) | 2766, (1U<<31) | 2841,
   13617   0x4C4C4C, 0x4D4D4D, 0x4D4D4D, (1U<<31) | 2892, (1U<<31) | 2775, (1U<<31) | 2850, 0x44D4D, (1U<<31) | 2367,
   13618   0x44D4D4D, (1U<<31) | 2365, 0x44D4D, (1U<<31) | 2367, 0x44D4D4D, (1U<<31) | 2365, 0x44D4D, (1U<<31) | 2367,
   13619   0x44D4D4D, (1U<<31) | 2365, 0x4C4D, (1U<<31) | 2870, 0x4C4D, (1U<<31) | 2870, 0x4C4D4D, (1U<<31) | 2868,
   13620   0x4C4D4D, (1U<<31) | 2868, 0x4C4D, (1U<<31) | 2870, 0x4C4D, (1U<<31) | 2870, 0x4C4C4C, 0x4D4D4D,
   13621   0x4C4D, (1U<<31) | 2870, 0x4C4D, (1U<<31) | 2870, 0x2E0, 0x2E0, 0x2E0, 0x2E0,
   13622   0x42E0, 0x52E0, 0x42E2E2E, 0x42E2E2E, 0x42E2E2E, 0x42E2E2E, 0x42E2E2E, 0x42E2E2E,
   13623   0x442E2E, 0x452E2E, 0x442E2E, 0x442E2E, 0x442E2E, 0x442E2E2E, 0x442E2E2E, 0x442E2E2E,
   13624   0x442E2E2E, 0x442E2E2E, 0x442E2E2E, 0x4442E2E, 0x4452E2E, 0x4442E2E, 0x4442E2E, 0x4442E2E,
   13625   0x4B4B4B, 0x2E0, 0x3939, 0x2A2A, 0x44, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13626   0x4A4A4A, 0x393939, 0x393939, 0x444, 0x393939, 0x393939, 0x444, 0x444,
   13627   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A,
   13628   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x444, 0x393939, 0x2A2A2A, 0x393939,
   13629   0x2A2A2A, 0x2A2A2A, 0x2A2A2A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C,
   13630   0x45959, 0x43B3B, 0x44A4A, 0x444, 0x2C2C2C, 0x42C2C, 0x4444, 0x2C2C2C,
   13631   0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13632   0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13633   0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x4444,
   13634   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A,
   13635   0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x42C2C2C, 0x4595959, 0x43B3B3B, 0x44A4A4A,
   13636   0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x42C2C2C, 0x4595959, 0x43B3B3B, 0x44A4A4A,
   13637   0x44, 0x2C2C2C2C, 0x42C2C2C, 0x2C2C2C2C, 0x42C2C2C, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13638   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C4, 0x594, 0x3B4,
   13639   0x2C4, 0x4A4, 0x4, 0x2C2C2C2C, 0x42C2C2C, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13640   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C4, 0x594, 0x3B4,
   13641   0x2C4, 0x4A4, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959,
   13642   0x43B3B, 0x44A4A, 0x44, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13643   0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C,
   13644   0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13645   0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C,
   13646   0x45959, 0x43B3B, 0x44A4A, 0x39390, 0x39390, 0x39390, 0x2A2A4, 0x2A2A4,
   13647   0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A0, 0x2A2A0, 0x2A2A0, 0x42C4,
   13648   0x4595, 0x43B4, 0x44A4, 0x42C4, 0x4595, 0x43B4, 0x44A4, 0x440,
   13649   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A,
   13650   0x4555, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x393955,
   13651   0x4A4A5959, 0x2C2C3B3B, 0x3B3B4A4A, 0x4A4A5959, 0x2C2C3B3B, 0x3B3B4A4A, 0x393955, 0x4455,
   13652   0x393955, 0x393955, 0x2A2A55, 0x2A2A55, 0x393955, 0x393955, 0x393955, 0x4455,
   13653   0x393955, 0x393955, 0x2A2A55, 0x2A2A55, 0x4A4A5959, 0x2C2C3B3B, 0x3B3B4A4A, 0x4A4A5959,
   13654   0x2C2C3B3B, 0x3B3B4A4A, 0x393955, 0x454, 0x454, 0x454, 0x454, 0x454,
   13655   0x454, 0x898989, 0x7A7A7A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x8959,
   13656   0x7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959,
   13657   0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959,
   13658   0x7A7A4A, 0x898959, 0x7A7A4A, 0x898989, 0x7A7A7A, 0x7A7A6B, 0x89897A, 0x598989,
   13659   0x4A7A7A, 0x7A89, 0x6B7A, 0x7A89, 0x6B7A, 0x5989, 0x4A7A, 0x5989,
   13660   0x4A7A, 0x4A89, 0x3B7A, 0x4A89, 0x3B7A, 0x42C, 0x559, 0x43B,
   13661   0x44A, 0x8989, 0x7A7A, (1U<<31) | 3722, 0x7A7A7A7A, 0x898989, 0x7A7A7A, 0x898989,
   13662   0x7A7A7A, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, (1U<<31) | 3722, 0x7A7A7A7A, 0x898989,
   13663   0x7A7A7A, 0x8989, 0x7A7A, 0x8989, 0x7A7A, 0x8989, 0x7A7A, 0x898959,
   13664   0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959,
   13665   0x7A7A4A, 0x898959, 0x7A7A4A, 0x8989, 0x7A7A, 0x898989, 0x7A7A7A, 0x898959,
   13666   0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959,
   13667   0x7A7A4A, 0x8959, 0x7A4A, 0x8959, 0x7A4A, 0x7A7A3B, 0x89894A, 0x8959,
   13668   0x7A4A, 0x8959, 0x7A4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B,
   13669   0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x2C2C2C,
   13670   0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13671   0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x442C2C,
   13672   0x545959, 0x443B3B, 0x444A4A, 0x444, 0x2C42C2C, 0x5945959, 0x3B43B3B, 0x4A44A4A,
   13673   0x42E4, 0x42E2C, 0x42E59, 0x42E3B, 0x42E4A, 0x42C, 0x459, 0x43B,
   13674   0x44A, 0x42E4, 0x4444, 0x42E4, 0x4455, 0x3B3B3B3B, 0x4A4A4A4A, 0x3B3B3B3B,
   13675   0x4A4A4A4A, 0x4455, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x393955, 0x393955,
   13676   0x393955, 0x393955, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959,
   13677   0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959,
   13678   0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959,
   13679   0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959,
   13680   0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x45959,
   13681   0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959,
   13682   0x3B3B3B, 0x4A4A4A, 0x444, 0x2C2C, 0x4455, 0x3B3B3B3B, 0x4A4A4A4A, 0x3B3B3B3B,
   13683   0x4A4A4A4A, 0x4455, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x455, 0x393939,
   13684   0x3B3B3B, 0x4A4A4A, 0x393939, 0x39394, 0x39394, 0x392A39, 0x392A39, 0x393939,
   13685   0x444, 0x393939, 0x444, 0x3B3B3B, 0x4A4A4A, 0x393955, 0x393955, 0x445,
   13686   0x445, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C, 0x5959, 0x3B3B,
   13687   0x4A4A, 0x2C2C, 0x5959, 0x3B3B, 0x4A4A, 0x2C2C2C, 0x42C2C, 0x2C2C2C,
   13688   0x42C2C, 0x393939, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959,
   13689   0x3B3B3B, 0x4A4A4A, 0x2C2C, 0x5959, 0x3B3B, 0x4A4A, 0x393939, 0x2A2A2A,
   13690   0x394, 0x394, 0x2A39, 0x2A39, 0x2A39, 0x2A39, 0x2A39, 0x2A39,
   13691   0x2A39, 0x2A39, 0x39392A, 0x44439, 0x44439, 0x4439, 0x39392A, 0x4439,
   13692   0x39392A, 0x4444, 0x2A4, 0x44, 0x439, 0x42A, 0x42C2C, 0x45959,
   13693   0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x43B3B,
   13694   0x44A4A, 0x455, 0x43939, 0x42A2A, 0x43939, 0x444, 0x43939, 0x42A2A,
   13695   0x43939, 0x42A2A, 0x444, 0x43939, 0x42A2A, 0x42C2C2C, 0x4595959, 0x43B3B3B,
   13696   0x44A4A4A, 0x42C2C2C, 0x4595959, 0x43B3B3B, 0x44A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13697   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B,
   13698   0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13699   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13700   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13701   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13702   0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42E2C0, 0x42E590, 0x42E3B0,
   13703   0x42E4A0, 0x393939, 0x393939, 0x444, 0x393939, 0x393939, 0x444, 0x444,
   13704   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A,
   13705   0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A,
   13706   0x393939, 0x2A2A2A, 0x393939, 0x2A2A2A, 0x2A2A2A, 0x2A2A2A, 0x2C2C2C, 0x595959,
   13707   0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C2C, 0x59595959,
   13708   0x3B3B3B3B, 0x4A4A4A4A, 0x440, 0x2C2C2C, 0x42C2C, 0x888, 0x777, 0x777,
   13709   0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 0x777,
   13710   0x777, 0x2FCF2F, 0x2FCF2F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1F1FCF1F,
   13711   0x1F1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x74F7,
   13712   0x44F4, 0x44F4, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F, 0x1FCF1F,
   13713   0x1FCF1F, 0x1FCF1F, 0x40, 0x40, 0x440, 0x40, 0x40, 0x440,
   13714   0x0, 0x44, 0x44, 0x44, 0x85, 0x74, 0x47, 0x58,
   13715   0x88, 0x77, 0x77, 0x4F0, 0x4F0, 0x77, 0x77, 0x87,
   13716   0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x84,
   13717   0x84, 0x84, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85,
   13718   0x85, 0x84, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85,
   13719   0x85, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 0x777,
   13720   0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x88,
   13721   0x77, 0x77, 0x73, 0x73, 0x74, 0x74, 0x74, 0x74,
   13722   0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 0x75, 0x75,
   13723   0x75, 0x75, 0x75, 0x75, 0x74, 0x74, 0x74, 0x74,
   13724   0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 0x75, 0x75,
   13725   0x75, 0x75, 0x75, 0x75, 0x88, 0x77, 0x77, 0x88,
   13726   0x77, 0x77, 0x8888, 0x7777, 0x7777, 0x8888, 0x7777, 0x7777,
   13727   0x8888, 0x7777, 0x7777, 0x8888, 0x7777, 0x7777, 0x888, 0x777,
   13728   0x777, 0x888, 0x777, 0x777, 0x48, 0x48, 0x48, 0x48,
   13729   0x47, 0x47, 0x47, 0x47, 0x2E1, 0x2E1, 0x2E1, 0x2E1,
   13730   0x51, 0x51, 0x51, 0x4CF2F, 0x4CF1F, 0x4CF4F, 0x4CF2F, 0x4CF1F,
   13731   0x4CF4F, 0x88, 0x77, 0x77, 0x58, 0x58, 0x58, 0x58,
   13732   0x57, 0x57, 0x57, 0x57, 0x448, (1U<<31) | 1911, (1U<<31) | 2933, 0x444,
   13733   0x545, 0x0, 0x0, 0x0, 0x88, 0x77, 0x33, 0x44,
   13734   0x55, 0xCF4F, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777,
   13735   0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x444, 0x444,
   13736   0x444, 0x555, 0x444, 0x555, 0x4444, 0xCF4F, 0xCF4F, 0xCF4F,
   13737   0xCF4F, 0xCF4F, 0xCF4F, 0xCF4F, 0xCF4F, 0xCF4F, 0x88, 0x88,
   13738   0x77, 0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77,
   13739   0x88, 0x77, 0x77, 0x4, 0x5, 0x4, 0x4, 0x4,
   13740   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13741   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13742   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13743   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13744   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13745   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13746   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13747   0x4, 0x4, 0x4, 0x4, 0x4, 0x4F4, 0x444, 0x455,
   13748   0x455, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x4444,
   13749   0x4444, 0x88, 0x77, 0x77, 0x4477, 0x4444, 0x4477, 0x4444,
   13750   0x4477, 0x4444, 0x44747, 0x44444, 0x44747, 0x44444, 0x44747, 0x44444,
   13751   0x44747, 0x44444, 0x4477, 0x4444, 0x77, 0x77, 0x77, 0x77,
   13752   0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x88,
   13753   0x77, 0x77, 0x88, 0x77, 0x77, 0x4453, 0x4453, 0x4453,
   13754   0x4454, 0x4454, 0x4454, 0x4455, 0x4455, 0x4455, 0x4453, 0x4453,
   13755   0x4453, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2122, (1U<<31) | 2122, (1U<<31) | 2122, (1U<<31) | 2139,
   13756   (1U<<31) | 2139, (1U<<31) | 2139, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2097, (1U<<31) | 2097, (1U<<31) | 2097,
   13757   (1U<<31) | 2113, (1U<<31) | 2113, (1U<<31) | 2113, (1U<<31) | 2097, (1U<<31) | 2097, (1U<<31) | 2097, 0x453, 0x453,
   13758   0x453, 0x454, 0x454, 0x454, 0x455, 0x455, 0x455, 0x453,
   13759   0x453, 0x453, (1U<<31) | 2396, (1U<<31) | 2396, (1U<<31) | 2396, (1U<<31) | 2410, (1U<<31) | 2410, (1U<<31) | 2410,
   13760   (1U<<31) | 2434, (1U<<31) | 2434, (1U<<31) | 2434, (1U<<31) | 2396, (1U<<31) | 2396, (1U<<31) | 2396, (1U<<31) | 2388, (1U<<31) | 2388,
   13761   (1U<<31) | 2388, (1U<<31) | 2402, (1U<<31) | 2402, (1U<<31) | 2402, (1U<<31) | 2388, (1U<<31) | 2388, (1U<<31) | 2388, 0x44453,
   13762   0x44453, 0x44453, 0x44454, 0x44454, 0x44454, 0x44455, 0x44455, 0x44455,
   13763   0x44453, 0x44453, 0x44453, (1U<<31) | 2022, (1U<<31) | 2022, (1U<<31) | 2022, (1U<<31) | 2040, (1U<<31) | 2040,
   13764   (1U<<31) | 2040, (1U<<31) | 2059, (1U<<31) | 2059, (1U<<31) | 2059, (1U<<31) | 2022, (1U<<31) | 2022, (1U<<31) | 2022, (1U<<31) | 2012,
   13765   (1U<<31) | 2012, (1U<<31) | 2012, (1U<<31) | 2030, (1U<<31) | 2030, (1U<<31) | 2030, (1U<<31) | 2012, (1U<<31) | 2012, (1U<<31) | 2012,
   13766   0x4453, 0x4453, 0x4453, 0x4454, 0x4454, 0x4454, 0x4455, 0x4455,
   13767   0x4455, 0x4453, 0x4453, 0x4453, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2122,
   13768   (1U<<31) | 2122, (1U<<31) | 2122, (1U<<31) | 2139, (1U<<31) | 2139, (1U<<31) | 2139, (1U<<31) | 2106, (1U<<31) | 2106, (1U<<31) | 2106,
   13769   (1U<<31) | 2097, (1U<<31) | 2097, (1U<<31) | 2097, (1U<<31) | 2113, (1U<<31) | 2113, (1U<<31) | 2113, (1U<<31) | 2097, (1U<<31) | 2097,
   13770   (1U<<31) | 2097, 0x44453, 0x44453, 0x44453, 0x44454, 0x44454, 0x44454, 0x44455,
   13771   0x44455, 0x44455, 0x44453, 0x44453, 0x44453, (1U<<31) | 2022, (1U<<31) | 2022, (1U<<31) | 2022,
   13772   (1U<<31) | 2040, (1U<<31) | 2040, (1U<<31) | 2040, (1U<<31) | 2059, (1U<<31) | 2059, (1U<<31) | 2059, (1U<<31) | 2022, (1U<<31) | 2022,
   13773   (1U<<31) | 2022, (1U<<31) | 2012, (1U<<31) | 2012, (1U<<31) | 2012, (1U<<31) | 2030, (1U<<31) | 2030, (1U<<31) | 2030, (1U<<31) | 2012,
   13774   (1U<<31) | 2012, (1U<<31) | 2012, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54,
   13775   0x34450, 0x34450, 0x34450, 0x44450, 0x44450, 0x44450, 0x54450, 0x54450,
   13776   0x54450, 0x34450, 0x34450, 0x34450, 0x334450, 0x334450, 0x334450, 0x444450,
   13777   0x444450, 0x444450, 0x554450, 0x554450, 0x554450, 0x334450, 0x334450, 0x334450,
   13778   0x33334450, 0x33334450, 0x33334450, 0x44444450, 0x44444450, 0x44444450, 0x33334450, 0x33334450,
   13779   0x33334450, 0x3450, 0x3450, 0x3450, 0x4450, 0x4450, 0x4450, 0x5450,
   13780   0x5450, 0x5450, 0x3450, 0x3450, 0x3450, 0x33450, 0x33450, 0x33450,
   13781   0x44450, 0x44450, 0x44450, 0x55450, 0x55450, 0x55450, 0x33450, 0x33450,
   13782   0x33450, 0x3333450, 0x3333450, 0x3333450, 0x4444450, 0x4444450, 0x4444450, 0x3333450,
   13783   0x3333450, 0x3333450, 0x344450, 0x344450, 0x344450, 0x444450, 0x444450, 0x444450,
   13784   0x544450, 0x544450, 0x544450, 0x344450, 0x344450, 0x344450, 0x3344450, 0x3344450,
   13785   0x3344450, 0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450, 0x5544450, 0x3344450,
   13786   0x3344450, 0x3344450, (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1995, (1U<<31) | 1995, (1U<<31) | 1995,
   13787   (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1029, 0x34450, 0x34450, 0x34450, 0x44450, 0x44450,
   13788   0x44450, 0x54450, 0x54450, 0x54450, 0x34450, 0x34450, 0x34450, 0x334450,
   13789   0x334450, 0x334450, 0x444450, 0x444450, 0x444450, 0x554450, 0x554450, 0x554450,
   13790   0x334450, 0x334450, 0x334450, 0x33334450, 0x33334450, 0x33334450, 0x44444450, 0x44444450,
   13791   0x44444450, 0x33334450, 0x33334450, 0x33334450, 0x344450, 0x344450, 0x344450, 0x444450,
   13792   0x444450, 0x444450, 0x544450, 0x544450, 0x544450, 0x344450, 0x344450, 0x344450,
   13793   0x3344450, 0x3344450, 0x3344450, 0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450,
   13794   0x5544450, 0x3344450, 0x3344450, 0x3344450, (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1995,
   13795   (1U<<31) | 1995, (1U<<31) | 1995, (1U<<31) | 1029, (1U<<31) | 1029, (1U<<31) | 1029, 0x34450, 0x44450, 0x34450,
   13796   0x334450, 0x444450, 0x334450, 0x33334450, 0x44444450, 0x33334450, 0x3450, 0x4450,
   13797   0x3450, 0x33450, 0x44450, 0x33450, 0x3333450, 0x4444450, 0x3333450, 0x344450,
   13798   0x444450, 0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 1029, (1U<<31) | 1995, (1U<<31) | 1029,
   13799   0x34450, 0x44450, 0x34450, 0x334450, 0x444450, 0x334450, 0x33334450, 0x44444450,
   13800   0x33334450, 0x344450, 0x444450, 0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 1029,
   13801   (1U<<31) | 1995, (1U<<31) | 1029, 0x55, (1U<<31) | 3249, (1U<<31) | 3237, (1U<<31) | 3237, (1U<<31) | 3167, (1U<<31) | 3156,
   13802   (1U<<31) | 3156, (1U<<31) | 3093, (1U<<31) | 2146, (1U<<31) | 3083, (1U<<31) | 2129, (1U<<31) | 3083, (1U<<31) | 2129, (1U<<31) | 3293,
   13803   (1U<<31) | 3282, (1U<<31) | 3282, (1U<<31) | 3207, (1U<<31) | 3197, (1U<<31) | 3197, (1U<<31) | 3129, (1U<<31) | 2440, (1U<<31) | 3120,
   13804   (1U<<31) | 2425, (1U<<31) | 3120, (1U<<31) | 2425, (1U<<31) | 3439, (1U<<31) | 3424, (1U<<31) | 3424, (1U<<31) | 3249, (1U<<31) | 3237,
   13805   (1U<<31) | 3237, (1U<<31) | 3167, (1U<<31) | 2067, (1U<<31) | 3156, (1U<<31) | 2048, (1U<<31) | 3156, (1U<<31) | 2048, (1U<<31) | 3495,
   13806   (1U<<31) | 3481, (1U<<31) | 3481, (1U<<31) | 3293, (1U<<31) | 3282, (1U<<31) | 3282, (1U<<31) | 3207, (1U<<31) | 2146, (1U<<31) | 3197,
   13807   (1U<<31) | 2129, (1U<<31) | 3197, (1U<<31) | 2129, (1U<<31) | 3667, (1U<<31) | 3650, (1U<<31) | 3650, (1U<<31) | 3387, (1U<<31) | 3375,
   13808   (1U<<31) | 3375, (1U<<31) | 3293, (1U<<31) | 2067, (1U<<31) | 3282, (1U<<31) | 2048, (1U<<31) | 3282, (1U<<31) | 2048, (1U<<31) | 3339,
   13809   (1U<<31) | 3326, (1U<<31) | 3326, (1U<<31) | 3249, (1U<<31) | 3237, (1U<<31) | 3237, (1U<<31) | 3387, (1U<<31) | 3375, (1U<<31) | 3375,
   13810   (1U<<31) | 3293, (1U<<31) | 3282, (1U<<31) | 3282, (1U<<31) | 3261, (1U<<31) | 3226, (1U<<31) | 3226, (1U<<31) | 3178, (1U<<31) | 3146,
   13811   (1U<<31) | 3146, (1U<<31) | 3103, (1U<<31) | 2156, (1U<<31) | 3074, (1U<<31) | 2113, (1U<<31) | 3074, (1U<<31) | 2113, (1U<<31) | 3304,
   13812   (1U<<31) | 3272, (1U<<31) | 3272, (1U<<31) | 3217, (1U<<31) | 3188, (1U<<31) | 3188, (1U<<31) | 3138, (1U<<31) | 2449, (1U<<31) | 3112,
   13813   (1U<<31) | 2402, (1U<<31) | 3112, (1U<<31) | 2402, (1U<<31) | 3454, (1U<<31) | 3410, (1U<<31) | 3410, (1U<<31) | 3261, (1U<<31) | 3226,
   13814   (1U<<31) | 3226, (1U<<31) | 3178, (1U<<31) | 2078, (1U<<31) | 3146, (1U<<31) | 2030, (1U<<31) | 3146, (1U<<31) | 2030, (1U<<31) | 3509,
   13815   (1U<<31) | 3468, (1U<<31) | 3468, (1U<<31) | 3304, (1U<<31) | 3272, (1U<<31) | 3272, (1U<<31) | 3217, (1U<<31) | 2156, (1U<<31) | 3188,
   13816   (1U<<31) | 2113, (1U<<31) | 3188, (1U<<31) | 2113, (1U<<31) | 3684, (1U<<31) | 3634, (1U<<31) | 3634, (1U<<31) | 3399, (1U<<31) | 3364,
   13817   (1U<<31) | 3364, (1U<<31) | 3304, (1U<<31) | 2078, (1U<<31) | 3272, (1U<<31) | 2030, (1U<<31) | 3272, (1U<<31) | 2030, (1U<<31) | 3352,
   13818   (1U<<31) | 3314, (1U<<31) | 3314, (1U<<31) | 3261, (1U<<31) | 3226, (1U<<31) | 3226, (1U<<31) | 3399, (1U<<31) | 3364, (1U<<31) | 3364,
   13819   (1U<<31) | 3304, (1U<<31) | 3272, (1U<<31) | 3272, (1U<<31) | 2882, 0x4F5, (1U<<31) | 3207, (1U<<31) | 3197, (1U<<31) | 3197,
   13820   (1U<<31) | 3207, (1U<<31) | 3197, (1U<<31) | 3197, (1U<<31) | 3207, (1U<<31) | 3197, (1U<<31) | 3197, (1U<<31) | 3207, (1U<<31) | 3197,
   13821   (1U<<31) | 3197, (1U<<31) | 3217, (1U<<31) | 3188, (1U<<31) | 3188, (1U<<31) | 3217, (1U<<31) | 3188, (1U<<31) | 3188, (1U<<31) | 3217,
   13822   (1U<<31) | 3188, (1U<<31) | 3188, (1U<<31) | 3217, (1U<<31) | 3188, (1U<<31) | 3188, 0x88, 0x77, 0x77,
   13823   0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54,
   13824   0x48, 0x48, 0x48, 0x48, 0x47, 0x47, 0x47, 0x47,
   13825   0x58, 0x58, 0x58, 0x58, 0x57, 0x57, 0x57, 0x57,
   13826   0x11, 0x141, 0x11, 0x141, 0x14, 0x144, 0x11, 0x141,
   13827   (1U<<31) | 940, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 940,
   13828   (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 940,
   13829   (1U<<31) | 1734, (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 940, (1U<<31) | 1734, (1U<<31) | 1734,
   13830   (1U<<31) | 960, (1U<<31) | 972, (1U<<31) | 960, (1U<<31) | 972, (1U<<31) | 1755, (1U<<31) | 1768, (1U<<31) | 960, (1U<<31) | 972,
   13831   (1U<<31) | 1755, (1U<<31) | 1768, (1U<<31) | 1755, (1U<<31) | 1768, (1U<<31) | 960, (1U<<31) | 972, (1U<<31) | 960, (1U<<31) | 972,
   13832   (1U<<31) | 1755, (1U<<31) | 1768, (1U<<31) | 960, (1U<<31) | 972, (1U<<31) | 1755, (1U<<31) | 1768, (1U<<31) | 1755, (1U<<31) | 1768,
   13833   (1U<<31) | 2974, (1U<<31) | 2974, (1U<<31) | 3534, (1U<<31) | 3534, (1U<<31) | 3024, (1U<<31) | 3024, (1U<<31) | 3584, (1U<<31) | 3584,
   13834   (1U<<31) | 2974, (1U<<31) | 2974, (1U<<31) | 3534, (1U<<31) | 3534, (1U<<31) | 3024, (1U<<31) | 3024, (1U<<31) | 3584, (1U<<31) | 3584,
   13835   (1U<<31) | 2974, (1U<<31) | 2974, (1U<<31) | 3534, (1U<<31) | 3534, (1U<<31) | 3024, (1U<<31) | 3024, (1U<<31) | 3584, (1U<<31) | 3584,
   13836   (1U<<31) | 2974, (1U<<31) | 2974, (1U<<31) | 3534, (1U<<31) | 3534, (1U<<31) | 3024, (1U<<31) | 3024, (1U<<31) | 3584, (1U<<31) | 3584,
   13837   (1U<<31) | 2962, (1U<<31) | 3522, (1U<<31) | 2962, (1U<<31) | 3522, (1U<<31) | 2531, (1U<<31) | 2544, (1U<<31) | 2962, (1U<<31) | 3522,
   13838   (1U<<31) | 2531, (1U<<31) | 2544, (1U<<31) | 2531, (1U<<31) | 2544, (1U<<31) | 2962, (1U<<31) | 3522, (1U<<31) | 2962, (1U<<31) | 3522,
   13839   (1U<<31) | 2531, (1U<<31) | 2544, (1U<<31) | 2962, (1U<<31) | 3522, (1U<<31) | 2531, (1U<<31) | 2544, (1U<<31) | 2531, (1U<<31) | 2544,
   13840   0x595959, 0x595959, 0x595959, 0x595959, 0x2C2C2C2C, 0x2C2C2C, 0x595959, 0x3B3B3B,
   13841   0x4A4A4A, 0x5959, 0x445959, 0x444A4A, 0x40, 0x0, 0x442E0, 0x442E0,
   13842   0x442E0, 0x442E0, 0x2E2C, 0x2E3B, 0x2E4A, 0x2E2C, 0x2E2C, 0x2E4A,
   13843   0x2E4A, 0x3B, 0x4A0, 0x2E2C0, 0x2E3B0, 0x2E4A0, 0x2E4A0, 0x2E4A0,
   13844   0x2C2C2C, 0x3B3B3B, 0x4A4A4A, (1U<<31) | 4005, 0x4A4A4A, (1U<<31) | 4003, (1U<<31) | 4003, 0x2C2C2C,
   13845   0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A,
   13846   0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C59, 0x44A7A, 0x44A7A, 0x2C4, 0x7A7A4A,
   13847   0x7A7A44, 0x7A7A4A, 0x7A7A44, 0x2C2C2C, 0x2C2C44, 0x595959, 0x595944, 0x3B3B3B,
   13848   0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x7A7A4A, 0x7A7A44, 0x7A7A4A, 0x7A7A44, 0x2C2C2C,
   13849   0x2C2C44, 0x595959, 0x595944, 0x3B3B3B, 0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x2C2C2C,
   13850   0x2C2C44, 0x595959, 0x595944, 0x3B3B3B, 0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x2C2C2C,
   13851   0x2C2C44, 0x3B3B3B, 0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x2C2C2C, 0x2C2C44, 0x3B3B3B,
   13852   0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x47A4A, 0x47A4A, 0x2C4, 0x7A7A, 0x2C2C,
   13853   0x7A7A, 0x7A7A7A7A, 0x7A7A7A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C,
   13854   0x595959, 0x3B3B3B, 0x4A4A4A, 0x3B3B3B3B, 0x3B3B3B3B, 0x7A7A7A, 0x2C2C2C, 0x595959,
   13855   0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x3B3B3B3B, 0x4A2C2C4A,
   13856   0x4A3B3B4A, 0x4A3B3B4A, 0x4A2C2C4A, 0x4A3B3B4A, 0x4A3B3B4A, 0x2C2C3B, 0x3B3B4A, 0x4A4A59,
   13857   0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A,
   13858   0x4A4A59, 0x7A7A7A7A, 0x2C4A4A4A, 0x4A4A3B, 0x59594A, 0x59594A, 0x3B3B2C, 0x3B3B2C,
   13859   0x4A4A3B, 0x4A4A3B, 0x59594A, 0x3B3B2C, 0x4A4A3B, 0x5959, (1U<<31) | 4007, 0x4A4A,
   13860   0x7A7A, 0x7A7A, 0x7A7A, 0x7A7A, 0x7A7A, 0x2C2C2C, 0x595959, 0x59595959,
   13861   0x595959, 0x3B3B3B, 0x4A4A4A, 0x4A4A4A4A, 0x4A4A4A, 0x7A7A, 0x4A4A4A4A, 0x4A4A4A,
   13862   0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x4A4A4A, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B,
   13863   0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x4A4A4A, (1U<<31) | 4005, 0x4A4A4A,
   13864   (1U<<31) | 4003, (1U<<31) | 4003, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A,
   13865   0x4A4A4A, 0x4A2C4A, 0x4A3B4A, 0x4A2C4A, 0x4A4A4A, 0x3B4A, 0x2C3B, 0x3B4A,
   13866   0x4A59, 0x3B4A, 0x2C3B, 0x3B4A, 0x4A59, 0x555, 0x1F0, 0x2E0,
   13867   0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x555,
   13868   0x555, 0x444, 0x444, 0x5, 0x5, 0x5, 0x5, 0x1,
   13869   0x0, 0x1F0, 0x8A8A, 0x8A8A8A, 0x8A8A8A, 0x8A8A, 0x8A8A, 0x8A8A,
   13870   0x8A8A, 0x8A8A8A, 0x8A8A8A, 0x8A8A8A, 0x8A8A8A, 0x8A8A, 0x8A8A, 0x8A8A,
   13871   0x8A8A, 0x8A8A, 0x8A8A, 0x8A8A, 0x8A8A, 0x48A8A8A, (1U<<31) | 3735, (1U<<31) | 3735,
   13872   (1U<<31) | 3735, (1U<<31) | 3735, 0x8A8A8A, 0x8A8A8A, 0x8A8A, 0x8A8A, (1U<<31) | 3735, (1U<<31) | 3735,
   13873   (1U<<31) | 3735, (1U<<31) | 3735, (1U<<31) | 3735, 0x8A8A, 0x8A8A, 0x8A8A, 0x8A8A, 0x8A8A,
   13874   0x8A8A, 0x8A8A, 0x8A8A, 0x8A8A, (1U<<31) | 3735, 0x8A8A8A, 0x8A8A8A, 0x8A8A8A,
   13875   (1U<<31) | 3735, (1U<<31) | 3735, 0x8A8A8A, 0x8A8A8A, (1U<<31) | 3735, (1U<<31) | 3735, (1U<<31) | 3735, (1U<<31) | 3735,
   13876   (1U<<31) | 3735, (1U<<31) | 3735, 0x48A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A,
   13877   0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A,
   13878   0x2E8A, 0x2E8A, 0x2E8A, 0x2E8A0, 0x2E8A0, 0x2E8A0, 0x2E8A0, 0x2E8A0,
   13879   0x2E8A0, 0x2E8A0, 0x2E8A0, 0x2E8A0, 0x2E8A0, 0x50, 0x50, 0x50,
   13880   0x50, 0x0, 0x44, 0x4444, 0x4444, 0x4444, 0x4444, 0x44,
   13881   0x4, 0x44, 0x4, 0x4, 0x44, 0x4, 0x44, 0x4,
   13882   0x5, 0x2E89, 0x2E89, 0x52E4A, 0x52E4A, 0x2E4A, 0x2E4A, 0x2E890,
   13883   0x2E890, 0x52E4A0, 0x52E4A0, 0x2E4A0, 0x2E4A0, 0x888, 0x888, 0x898959,
   13884   0x898944, 0x7A7A4A, 0x7A7A44, 0x898959, 0x898944, 0x7A7A4A, 0x7A7A44, 0x898959,
   13885   0x898944, 0x7A7A4A, 0x7A7A44, 0x897A, 0x894A, 0x894A, 0x3B7A, 0x7A89,
   13886   0x7A7A, 0x597A, 0x4A89, 0x597A, 0x4A89, 0x898989, 0x7A7A7A, 0x595989,
   13887   0x4A4A7A, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 0x8989, 0x8989, 0x7A7A,
   13888   0x7A7A, 0x8989, 0x7A7A, 0x48959, 0x47A4A, 0x8959, 0x7A4A, 0x8959,
   13889   0x7A4A, 0x45959, 0x4594A4A, 0x4A4A4A, 0x7A7A, 0x0, (1U<<31) | 723, 0x44A4A0,
   13890   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4,
   13891   0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x2F2F,
   13892   0x2F2F, 0x4, 0x4, 0x42E4, 0x5E50, 0x40, 0x40, 0x50,
   13893   0x42E4, 0x42E4, 0x42E0, 0x52F4, 0x4, 0x2C2C2C, 0x2C2C2C2C, 0x4A4A4A,
   13894   0x595959, 0x3B3B3B, 0x2C2C2C, 0x2C2C2C2C, 0x2C2C2C, 0x2C2C2C, 0x4A4A4A, 0x595959,
   13895   0x3B3B3B, 0x2C2C2C, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x2C2C59, (1U<<31) | 903, (1U<<31) | 2709,
   13896   (1U<<31) | 2953, (1U<<31) | 1152, (1U<<31) | 903, (1U<<31) | 2709, (1U<<31) | 2953, (1U<<31) | 1152, (1U<<31) | 903, (1U<<31) | 2709,
   13897   (1U<<31) | 2953, (1U<<31) | 1152, 0x4A4A4A, (1U<<31) | 1662, (1U<<31) | 2197, (1U<<31) | 2477, (1U<<31) | 1838, 0x42C2C,
   13898   0x44A4A, 0x45959, 0x43B3B, 0x2C2C2C, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x42C2C2C,
   13899   (1U<<31) | 1684, 0x44A4A4A, (1U<<31) | 2175, 0x43B3B3B, (1U<<31) | 1860, 0x42C2C2C, (1U<<31) | 1684, 0x44A4A4A,
   13900   (1U<<31) | 2175, 0x43B3B3B, (1U<<31) | 1860, (1U<<31) | 3713, (1U<<31) | 3700, (1U<<31) | 3713, (1U<<31) | 3713, (1U<<31) | 3700,
   13901   (1U<<31) | 3700, 0x2C2C2C, (1U<<31) | 903, 0x4A4A4A, (1U<<31) | 2709, 0x3B3B3B, (1U<<31) | 1152, 0x2C2C2C,
   13902   (1U<<31) | 903, 0x4A4A4A, (1U<<31) | 2709, 0x3B3B3B, (1U<<31) | 1152, 0x2C2C2C, (1U<<31) | 903, 0x4A4A4A,
   13903   (1U<<31) | 2709, 0x3B3B3B, (1U<<31) | 1152, 0x2C2C2C, (1U<<31) | 903, 0x4A4A4A, (1U<<31) | 2709, 0x3B3B3B,
   13904   (1U<<31) | 1152, 0x448989, 0x447A7A, 0x4898989, 0x47A7A7A, 0x4898989, 0x47A7A7A, (1U<<31) | 2625,
   13905   (1U<<31) | 2557, 0x3B2C2C3B, 0x594A4A59, 0x2C59592C, 0x4A3B3B4A, 0x2C2C3B, 0x4A4A59, 0x59592C,
   13906   0x3B3B4A, 0x2C2C, (1U<<31) | 912, 0x4A4A, (1U<<31) | 2693, 0x3B3B, (1U<<31) | 1161, 0x42E2C,
   13907   0x2E42C, 0x2E42C, 0x3B2C2C3B, 0x594A4A59, 0x4A3B3B4A, 0x2C2C2C2C, 0x4A4A4A4A, 0x3B3B3B3B,
   13908   0x3B2C2C3B, 0x594A4A59, 0x4A3B3B4A, 0x2C2C2C2C, 0x4A4A4A4A, 0x3B3B3B3B, 0x3B2C2C3B, 0x594A4A59,
   13909   0x4A3B3B4A, 0x3B2C2C3B, 0x594A4A59, 0x4A3B3B4A, 0x2C2C3B, 0x4A4A59, 0x3B3B4A, 0x2C2C2C,
   13910   0x4A4A4A, 0x3B3B3B, 0x2C2C3B, 0x4A4A59, 0x3B3B4A, 0x2C2C2C, 0x4A4A4A, 0x3B3B3B,
   13911   0x2C2C3B, 0x4A4A59, 0x3B3B4A, 0x2C2C3B, 0x4A4A59, 0x3B3B4A, (1U<<31) | 1694, 0x4595959,
   13912   0x2C2C2C2C, 0x4A4A3B, (1U<<31) | 2700, 0x59594A, (1U<<31) | 2944, 0x3B3B2C, (1U<<31) | 1143, 0x4A4A3B,
   13913   (1U<<31) | 2700, 0x59594A, (1U<<31) | 2944, 0x3B3B2C, (1U<<31) | 1143, 0x2C2C2C2C, 0x2C2C2C2C, 0x2C2C2C,
   13914   0x4A4A4A, 0x595959, 0x3B3B3B, 0x2C2C2C, 0x2C2C2C, 0x2C2C2C, 0x42C2C2C, 0x2C2C2C,
   13915   0x2C2C2C, 0x2C2C2C, 0x2C2C2C, 0x2C2C2C, 0x2E42C0, (1U<<31) | 1662, (1U<<31) | 1672, (1U<<31) | 2197,
   13916   (1U<<31) | 2185, (1U<<31) | 1838, (1U<<31) | 1848, (1U<<31) | 1662, (1U<<31) | 1672, (1U<<31) | 2197, (1U<<31) | 2185, (1U<<31) | 1838,
   13917   (1U<<31) | 1848, 0x2E42C0, 0x2C2C4A, 0x4A4A59, 0x3B3B59, 0x3B3B4A, 0x4A4A2C, 0x59592C,
   13918   0x2C2C4, 0x2C3B, 0x4A59, 0x3B4A, 0x2C3B, 0x4A59, 0x2C3B, 0x4A59,
   13919   0x3B4A, 0x3B4A, 0x2C3B, 0x4A59, 0x3B4A, 0x1F, 0x1F1F, 0x0,
   13920   0x2E40, (1U<<31) | 3898, (1U<<31) | 3895, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   13921   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3895, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3895,
   13922   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3895, (1U<<31) | 3898, (1U<<31) | 3895, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3895,
   13923   (1U<<31) | 3895, 0x2E4422, 0x2E5522, 0x2E4422, 0x2E5522, 0x595959, 0x595959, 0x595959,
   13924   0x595959, 0x5959, 0x25959, 0x8A8A8A, 0x7B7B7B, (1U<<31) | 3735, 0x7B7B7B7B, 0x28A8A8A,
   13925   0x27B7B7B, 0x8A7A, 0x8A4A, 0x7B4B, 0x4B7B, 0x8A4A, 0x7B4B, 0x27B7B7B,
   13926   0x8A8A8A, 0x7B7B7B, 0x8A8A8A, 0x7B7B7B, 0x2E2D, 0x592E89, 0x5A2E8A, 0x4A2E7A,
   13927   0x4B2E7B, 0x89592E0, 0x8A5A2E0, 0x7A4A2E0, 0x7B4B2E0, 0x8A8A8A, 0x7B7B7B, 0x8A8A8A,
   13928   0x7B7B7B, 0x8A4, 0x7B4, 0x5A5A4, 0x5A5A4, 0x5A5A4, 0x7B7B, 0x48A8A,
   13929   0x47B7B, 0x7B7B, 0x8A8A, 0x7B7B, 0x598989, 0x5A8A8A, 0x4A7A7A, 0x4B7B7B,
   13930   0x89894, 0x8A8A4, 0x7A7A4, 0x7B7B4, 0x89894, 0x8A8A4, 0x7A7A4, 0x7B7B4,
   13931   0x89894, 0x8A8A4, 0x7A7A4, 0x7B7B4, 0x0, 0x0, (1U<<31) | 364, (1U<<31) | 441,
   13932   (1U<<31) | 738, (1U<<31) | 803, (1U<<31) | 604, (1U<<31) | 681, (1U<<31) | 473, (1U<<31) | 528, (1U<<31) | 386, (1U<<31) | 398,
   13933   (1U<<31) | 750, (1U<<31) | 815, (1U<<31) | 626, (1U<<31) | 638, (1U<<31) | 485, (1U<<31) | 540, 0x4A2E4A, 0x4B2E4B,
   13934   0x592E59, 0x5A2E5A, 0x4A4A2E0, 0x4B4B2E0, 0x59592E0, 0x5A5A2E0, 0x22D2D3C, 0x4B4B3C,
   13935   0x3C3C2D, 0x4B4B3C, 0x3C3C2D, 0x2D2D2D, 0x3C3C3C, 0x2D2D2D, 0x3C3C3C, 0x2D2D2D2D,
   13936   0x4B4B4B, 0x4B7B7B, 0x4B4B4B, 0x3C3C3C, 0x3C3C3C, 0x4B4B4B, 0x3C3C3C, 0x3C3C3C,
   13937   0x2D2D3C, 0x3C3C4B, 0x2D4, 0x4B4B5A, 0x3C3C3C, 0x3C3C3C, 0x3C3C3C, 0x4B4B5A,
   13938   0x2D2D5A, 0x2D2D2D, 0x2D2D2D, 0x4B4B4B, 0x3C3C3C, 0x4A4B4B, 0x595A5A, 0x3B3C3C,
   13939   0x44B4B, 0x45A5A, 0x43C3C, 0x4A4A4A, 0x4B4B4B, 0x595959, 0x5A5A5A, 0x4A4B4B,
   13940   0x3B3C3C, 0x44B4B, 0x43C3C, 0x4A4A4A, 0x4B4B4B, 0x4A4B4B, 0x595A5A, 0x3B3C3C,
   13941   0x44B4B, 0x45A5A, 0x43C3C, 0x4A4A4A, 0x4B4B4B, 0x595959, 0x5A5A5A, 0x2D2D2D,
   13942   0x3C3C3C, 0x2D2D2D, 0x3C3C3C, 0x259, 0x25A, 0x25B, 0x34A, 0x34B,
   13943   0x34C, 0x2C3, 0x2D4, (1U<<31) | 1010, 0x4A2, 0x4B2, 0x4C3, 0x592,
   13944   0x5A2, 0x5B2, 0x458989, 0x447A7A, 0x457A7A, 0x4894, 0x4895, 0x4894,
   13945   0x4895, 0x47A4, 0x47A5, 0x47A4, 0x47A5, 0x48989, 0x447A7A, 0x458989,
   13946   0x457A7A, 0x3B2, 0x3C3, 0x3D4, 0x428B8B8B, 0x437C7C7C, (1U<<31) | 1428, (1U<<31) | 1793,
   13947   (1U<<31) | 1406, (1U<<31) | 1804, (1U<<31) | 1560, (1U<<31) | 1527, (1U<<31) | 1538, (1U<<31) | 1549, (1U<<31) | 1472, (1U<<31) | 1450,
   13948   (1U<<31) | 1516, (1U<<31) | 1494, (1U<<31) | 1461, (1U<<31) | 1439, (1U<<31) | 1505, (1U<<31) | 1483, (1U<<31) | 1373, (1U<<31) | 1340,
   13949   (1U<<31) | 1384, (1U<<31) | 1351, (1U<<31) | 1362, (1U<<31) | 1329, (1U<<31) | 1417, (1U<<31) | 1395, 0x442E4B20, 0x442E4C30,
   13950   0x442E5B20, 0x442E5B20, 0x333, 0x333, 0x33, 0x333, 0x334, 0x334,
   13951   0x333, 0x555, 0x444, 0x333, 0x333, (1U<<31) | 1651, (1U<<31) | 1827, (1U<<31) | 1628,
   13952   (1U<<31) | 1583, 0x2489892, 0x248A8A2, 0x4248B8B2, 0x247A7A2, 0x247B7B2, 0x4347C7C3, 0x42489892,
   13953   0x4247A7A2, 0x24A4A4A, 0x24B4B4B, 0x34C4C4C, 0x2898989, 0x28A8A8A, 0x28B8B8B, 0x27A7A7A,
   13954   0x27B7B7B, 0x37C7C7C, 0x2595959, 0x25A5A5A, 0x25B5B5B, 0x24A2E0, 0x24B2E0, 0x34C2E0,
   13955   0x2892E0, 0x28A2E0, 0x28B2E0, 0x27A2E0, 0x27B2E0, 0x37C2E0, 0x2592E0, 0x25A2E0,
   13956   0x25B2E0, 0x24A4A4A, 0x24B4B4B, 0x34C4C4C, 0x2595959, 0x25A5A5A, 0x25B5B5B, 0x27A4A7A,
   13957   0x27B4B7B, 0x437C4C7C, 0x24A894A, 0x24A8A4A, 0x424B8B4B, 0x27A897A, 0x27A8A7A, 0x427B8B7B,
   13958   0x2598959, 0x25A8A5A, 0x425B8B5B, 0x24A894A, 0x24A8A4A, 0x424B8B4B, 0x2598959, 0x25A8A5A,
   13959   0x425B8B5B, 0x24A7A4A, 0x24B7B4B, 0x434C7C4C, 0x2897A89, 0x28A7A8A, 0x428B7B8B, 0x2597A59,
   13960   0x25A7A5A, 0x425B7B5B, 0x24A7A4A, 0x24B7B4B, 0x434C7C4C, 0x2597A59, 0x25A7A5A, 0x425B7B5B,
   13961   0x2895989, 0x28A5A8A, 0x428B5B8B, 0x27A597A, 0x27A5A7A, 0x427B5B7B, (1U<<31) | 1594, (1U<<31) | 1617,
   13962   0x24A894A, 0x24A8A4A, 0x424B8B4B, 0x2598959, 0x25A8A5A, 0x425B8B5B, 0x24A894A, 0x24A8A4A,
   13963   0x424B8B4B, 0x2598959, 0x25A8A5A, 0x425B8B5B, 0x24A7A4A, 0x24B7B4B, 0x434C7C4C, 0x2597A59,
   13964   0x25A7A5A, 0x425B7B5B, 0x24A7A4A, 0x24B7B4B, 0x434C7C4C, 0x2597A59, 0x25A7A5A, 0x425B7B5B,
   13965   0x27A4A7A, 0x27B4B7B, 0x437C4C7C, 0x2895989, 0x28A5A8A, 0x428B5B8B, 0x27A597A, 0x27A5A7A,
   13966   0x427B5B7B, (1U<<31) | 234, (1U<<31) | 1059, (1U<<31) | 1890, (1U<<31) | 1651, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583,
   13967   0x24A4A4A, 0x24B4B4B, 0x34C4C4C, 0x24A2E4A, 0x24B2E4B, 0x34C2E4C, 0x2892E89, 0x28A2E8A,
   13968   0x28B2E8B, 0x27A2E7A, 0x27B2E7B, 0x37C2E7C, 0x2592E59, 0x25A2E5A, 0x25B2E5B, 0x2898989,
   13969   0x28A8A8A, 0x28B8B8B, 0x27A7A7A, 0x27B7B7B, 0x37C7C7C, 0x2595959, 0x25A5A5A, 0x25B5B5B,
   13970   (1U<<31) | 310, (1U<<31) | 332, (1U<<31) | 1317, (1U<<31) | 266, (1U<<31) | 288, (1U<<31) | 1781, (1U<<31) | 1305, (1U<<31) | 1293,
   13971   0x24892, 0x248A2, 0x248B2, 0x247A2, 0x247B2, 0x347C3, 0x24892, 0x247A2,
   13972   0x2898989, 0x28A8A8A, 0x428B8B8B, 0x27A7A7A, 0x27B7B7B, 0x437C7C7C, (1U<<31) | 1628, (1U<<31) | 1583,
   13973   0x28948989, 0x28A48A8A, (1U<<31) | 1641, 0x27A47A7A, 0x27B47B7B, (1U<<31) | 1817, (1U<<31) | 1605, (1U<<31) | 1571,
   13974   (1U<<31) | 1651, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 1651, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583,
   13975   (1U<<31) | 1651, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 224,
   13976   (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880,
   13977   (1U<<31) | 827, (1U<<31) | 868, (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 1019,
   13978   (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 693, (1U<<31) | 1123, (1U<<31) | 453, (1U<<31) | 1102, (1U<<31) | 214, (1U<<31) | 1039,
   13979   (1U<<31) | 1870, (1U<<31) | 354, (1U<<31) | 420, (1U<<31) | 1081, 0x22C4A2C, 0x22C4B2C, 0x32C4C2C, 0x24A2E0,
   13980   0x24B2E0, 0x34C2E0, 0x23B4A3B, 0x23B4B3B, 0x33C4C3C, 0x24A2E0, 0x24B2E0, 0x34C2E0,
   13981   0x22C592C, 0x22C5A2C, 0x22C5B2C, 0x2592E0, 0x25A2E0, 0x25B2E0, 0x24A594A, 0x24A5A4A,
   13982   0x24B5B4B, 0x2592E0, 0x25A2E0, 0x25B2E0, 0x23B593B, 0x23B5A3B, 0x23B5B3B, 0x2592E0,
   13983   0x25A2E0, 0x25B2E0, 0x22C3B2C, 0x32C3C2C, 0x42D3D2D, 0x23B2E0, 0x33C2E0, 0x43D2E0,
   13984   0x22C4A2C, 0x22C4B2C, 0x32C4C2C, 0x24A2E0, 0x24B2E0, 0x34C2E0, 0x23B4A3B, 0x23B4B3B,
   13985   0x33C4C3C, 0x24A2E0, 0x24B2E0, 0x34C2E0, 0x22C592C, 0x22C5A2C, 0x22C5B2C, 0x2592E0,
   13986   0x25A2E0, 0x25B2E0, 0x24A594A, 0x24A5A4A, 0x24B5B4B, 0x2592E0, 0x25A2E0, 0x25B2E0,
   13987   0x23B593B, 0x23B5A3B, 0x23B5B3B, 0x2592E0, 0x25A2E0, 0x25B2E0, 0x22C3B2C, 0x32C3C2C,
   13988   0x42D3D2D, 0x23B2E0, 0x33C2E0, 0x43D2E0, 0x22C4A2C, 0x22C4B2C, 0x32C4C2C, 0x24A2E0,
   13989   0x24B2E0, 0x34C2E0, 0x23B4A3B, 0x23B4B3B, 0x33C4C3C, 0x24A2E0, 0x24B2E0, 0x34C2E0,
   13990   0x22C592C, 0x22C5A2C, 0x22C5B2C, 0x2592E0, 0x25A2E0, 0x25B2E0, 0x24A594A, 0x24A5A4A,
   13991   0x24B5B4B, 0x2592E0, 0x25A2E0, 0x25B2E0, 0x23B593B, 0x23B5A3B, 0x23B5B3B, 0x2592E0,
   13992   0x25A2E0, 0x25B2E0, 0x22C3B2C, 0x32C3C2C, 0x42D3D2D, 0x23B2E0, 0x33C2E0, 0x43D2E0,
   13993   (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 224, (1U<<31) | 1049,
   13994   (1U<<31) | 1880, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, 0x24A44A4A, 0x24B44B4B, 0x34C44C4C, 0x25945959,
   13995   0x25A45A5A, 0x25B45B5B, (1U<<31) | 376, (1U<<31) | 453, (1U<<31) | 1102, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583,
   13996   0x24A44A4A, 0x24B44B4B, 0x34C44C4C, 0x25945959, 0x25A45A5A, 0x25B45B5B, (1U<<31) | 376, (1U<<31) | 453,
   13997   (1U<<31) | 1102, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 224,
   13998   (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880,
   13999   (1U<<31) | 255, (1U<<31) | 277, (1U<<31) | 1070, (1U<<31) | 299, (1U<<31) | 321, (1U<<31) | 343, (1U<<31) | 727, (1U<<31) | 792,
   14000   (1U<<31) | 1639, (1U<<31) | 593, (1U<<31) | 670, (1U<<31) | 1815, (1U<<31) | 1929, (1U<<31) | 1917, 0x28948989, 0x28A48A8A,
   14001   (1U<<31) | 1641, 0x27A47A7A, 0x27B47B7B, (1U<<31) | 1817, (1U<<31) | 1929, (1U<<31) | 1917, 0x28948989, 0x28A48A8A,
   14002   (1U<<31) | 1641, 0x27A47A7A, 0x27B47B7B, (1U<<31) | 1817, (1U<<31) | 1929, (1U<<31) | 1917, (1U<<31) | 782, (1U<<31) | 847,
   14003   (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 1112, (1U<<31) | 670,
   14004   (1U<<31) | 857, (1U<<31) | 792, (1U<<31) | 1091, (1U<<31) | 430, (1U<<31) | 572, (1U<<31) | 517, 0x2898989, 0x28A8A8A,
   14005   0x428B8B8B, 0x27A7A7A, 0x27B7B7B, 0x437C7C7C, (1U<<31) | 1628, (1U<<31) | 1583, 0x27A2E0, (1U<<31) | 1651,
   14006   (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, 0x27A3B7A, 0x27B3B7B, 0x437C3C7C, 0x23B47A3B, 0x23B47B3B,
   14007   0x33C47C3C, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 1628,
   14008   (1U<<31) | 1583, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 782,
   14009   (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651,
   14010   (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 376, (1U<<31) | 453, (1U<<31) | 1102, (1U<<31) | 224, (1U<<31) | 1049,
   14011   (1U<<31) | 1880, (1U<<31) | 762, (1U<<31) | 827, (1U<<31) | 868, (1U<<31) | 616, (1U<<31) | 693, (1U<<31) | 1123, (1U<<31) | 497,
   14012   (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 376, (1U<<31) | 453, (1U<<31) | 1102,
   14013   (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 772, (1U<<31) | 837, (1U<<31) | 878, (1U<<31) | 650, (1U<<31) | 703,
   14014   (1U<<31) | 1133, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 497,
   14015   (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651,
   14016   (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651,
   14017   (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713,
   14018   (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713,
   14019   (1U<<31) | 1827, (1U<<31) | 782, (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 1628,
   14020   (1U<<31) | 1583, (1U<<31) | 310, (1U<<31) | 332, (1U<<31) | 1317, (1U<<31) | 266, (1U<<31) | 288, (1U<<31) | 1781, (1U<<31) | 1305,
   14021   (1U<<31) | 1293, (1U<<31) | 255, (1U<<31) | 277, (1U<<31) | 1070, (1U<<31) | 299, (1U<<31) | 321, (1U<<31) | 343, (1U<<31) | 782,
   14022   (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 782,
   14023   (1U<<31) | 847, (1U<<31) | 1651, (1U<<31) | 660, (1U<<31) | 713, (1U<<31) | 1827, (1U<<31) | 376, (1U<<31) | 453, (1U<<31) | 1102,
   14024   (1U<<31) | 224, (1U<<31) | 1049, (1U<<31) | 1880, (1U<<31) | 772, (1U<<31) | 837, (1U<<31) | 878, (1U<<31) | 650, (1U<<31) | 703,
   14025   (1U<<31) | 1133, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 1019, (1U<<31) | 1704, (1U<<31) | 2916, (1U<<31) | 497,
   14026   (1U<<31) | 552, (1U<<31) | 583, (1U<<31) | 497, (1U<<31) | 552, (1U<<31) | 583, 0x4C4C3D, (1U<<31) | 1168, 0x4C4C3D,
   14027   (1U<<31) | 1168, 0x4C4C5B, 0x4C4C5B, (1U<<31) | 1003, (1U<<31) | 996, 0x4A4C4C, 0x595B5B, 0x3B3D3D,
   14028   0x44C4C, 0x45B5B, 0x43D3D, 0x4C4C4C, 0x5B5B5B, 0x3B3B3B, 0x3C3C3C, 0x3D3D3D,
   14029   0x4A4C4C, 0x595959, 0x595A5A, 0x595B5B, 0x3B3D3D, 0x44C4C, 0x45959, 0x45A5A,
   14030   0x45B5B, 0x43D3D, 0x4C4C4C, 0x595959, 0x5A5A5A, 0x5B5B5B, 0x3B3B3B, 0x3C3C3C,
   14031   0x3D3D3D, 0x4A4C4C, 0x595B5B, 0x3B3D3D, 0x44C4C, 0x45B5B, 0x43D3D, 0x4C4C4C,
   14032   0x5B5B5B, 0x3B3B3B, 0x3C3C3C, 0x3D3D3D, 0x32C2C3, 0x42D2D4, (1U<<31) | 2926, 0x24A4A2,
   14033   0x24B4B2, 0x34C4C3, 0x259592, 0x25A5A2, 0x25B5B2, 0x23B3B2, 0x33C3C3, 0x43D3D4,
   14034   0x32C2C3, 0x42D2D4, (1U<<31) | 2926, 0x24A4A2, 0x24B4B2, 0x34C4C3, 0x259592, 0x25A5A2,
   14035   0x25B5B2, 0x23B3B2, 0x33C3C3, 0x43D3D4, 0x2898989, 0x28A8A8A, 0x28B8B8B, 0x27A7A7A,
   14036   0x27B7B7B, 0x37C7C7C, (1U<<31) | 782, (1U<<31) | 660, 0x428B8B8B, 0x437C7C7C, (1U<<31) | 1628, (1U<<31) | 1583,
   14037   0x2898989, 0x28A8A8A, 0x28B8B8B, 0x27A7A7A, 0x27B7B7B, 0x37C7C7C, (1U<<31) | 782, (1U<<31) | 660,
   14038   0x428B8B8B, 0x437C7C7C, (1U<<31) | 1628, (1U<<31) | 1583, (1U<<31) | 2673, (1U<<31) | 2291, (1U<<31) | 2507, (1U<<31) | 2615,
   14039   (1U<<31) | 2683, (1U<<31) | 2237, (1U<<31) | 2517, (1U<<31) | 2605, (1U<<31) | 2643, (1U<<31) | 2467, (1U<<31) | 2663, (1U<<31) | 2497,
   14040   (1U<<31) | 2575, (1U<<31) | 2207, (1U<<31) | 2585, (1U<<31) | 2217, 0x442E4B20, 0x442E4C30, 0x442E5B20, 0x442E5B20,
   14041   (1U<<31) | 2633, (1U<<31) | 2457, (1U<<31) | 2653, (1U<<31) | 2487, (1U<<31) | 2565, (1U<<31) | 2165, (1U<<31) | 2595, (1U<<31) | 2227,
   14042   0x2E8B, 0x2E7C, 0x4489894, 0x447A7A4, 0x4894, 0x4895, 0x4894, 0x4895,
   14043   0x47A4, 0x47A5, 0x47A4, 0x47A5, 0x5B8B8B, 0x4C7C7C, 0x444, 0x555,
   14044   0x444, 0x555, 0x444, 0x555, 0x444, 0x555, 0x2E0, 0x2E0,
   14045   0x2E0, 0x4, 0x5, 0x40, 0x50, (1U<<31) | 3722, (1U<<31) | 3735, 0x7A7A7A7A,
   14046   0x7B7B7B7B, (1U<<31) | 3722, 0x7A7A7A7A, (1U<<31) | 3722, (1U<<31) | 3735, 0x7A7A7A7A, 0x7B7B7B7B, (1U<<31) | 3722,
   14047   (1U<<31) | 3735, 0x7A7A7A7A, 0x7B7B7B7B, (1U<<31) | 3722, 0x7A7A7A7A, (1U<<31) | 3722, (1U<<31) | 3735, 0x7A7A7A7A,
   14048   0x7B7B7B7B, (1U<<31) | 3722, (1U<<31) | 3735, 0x7A7A7A7A, 0x7B7B7B7B, (1U<<31) | 3722, 0x7A7A7A7A, (1U<<31) | 3722,
   14049   (1U<<31) | 3735, 0x7A7A7A7A, 0x7B7B7B7B, (1U<<31) | 3722, 0x7A7A7A7A, 0x2E0, 0x2E0, 0x2E0,
   14050   0x2E0, 0x20, 0x2E0, 0x4442, 0x4452, 0x4440, 0x4450, 0x0,
   14051   0x0, (1U<<31) | 984, (1U<<31) | 3893, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   14052   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 1014, (1U<<31) | 3898,
   14053   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   14054   (1U<<31) | 3898, (1U<<31) | 2899, (1U<<31) | 2373, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   14055   (1U<<31) | 3880, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   14056   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 2912, (1U<<31) | 2912, (1U<<31) | 2912, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 2912,
   14057   (1U<<31) | 2912, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 2912, (1U<<31) | 2912, (1U<<31) | 2912, (1U<<31) | 3898,
   14058   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898,
   14059   (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, (1U<<31) | 3898, 0x442E0, 0x4440,
   14060   0x2595959, 0x4, 0x5, 0x4, 0x5, 0x4, 0x45, (1U<<31) | 1901,
   14061   (1U<<31) | 2384, (1U<<31) | 2527, (1U<<31) | 1901, (1U<<31) | 2384, (1U<<31) | 2527, 0x5, 0x2E5, 0x2E0,
   14062   0x2E0, 0x2E2E, 0x2E2E2E, 0x4A4A4A, 0x4A4A4A, 0x4A4A4A, 0x24A4A4A, 0x4A4A4A,
   14063   0x4A4A4A, 0x4A4A4A4A, 0x2E, 0x27A7A7A, 0x27A7A7A, 0x7A7A4, 0x7A7A4, 0x7A7A4,
   14064   0x7A7A4, 0x7A7A4, 0x7A7A4, (1U<<31) | 3731, (1U<<31) | 3889, (1U<<31) | 3883, (1U<<31) | 3709, 0x47A7A,
   14065   0x57A7A, 0x7A4, 0x7A5, (1U<<31) | 3731, (1U<<31) | 3709, 0x7A4, 0x7A5, 0x2E0,
   14066   0x7A7A7A, 0x7A7A7A, 0x7A7A7A, 0x7A7A7A, 0x7A4, (1U<<31) | 1015, 0x7A7A, 0x7A7A,
   14067   0x7A7A, 0x7A7A, 0x0, 0x7A7A, 0x7A7A, 0x2E0, 0x7A7A4, 0x7A7A4,
   14068   0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, 0x2E0, 0x2898989, 0x2898989, 0x89894,
   14069   0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 0x4A7A, 0x894A, 0x897A,
   14070   0x7A4A, 0x894, 0x895, 0x897A7A, 0x48989, 0x58989, 0x7A8989, 0x894A,
   14071   0x7A4A, 0x894, 0x895, 0x0, 0x2E2C2C0, 0x898989, 0x898989, 0x0,
   14072   0x898989, 0x898989, 0x894, 0x4A4A3B, 0x3B3B2C, 0x3B3B2C, 0x2C2C2C, 0x3B3B3B,
   14073   0x2C2C2C, 0x3B3B3B, 0x0, 0x3B3B4A, 0x2C4, 0x3B3B3B, 0x3B3B3B, 0x4A4A59,
   14074   0x2C2C59, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x44A4A, 0x45959, 0x43B3B, 0x4A4A4A,
   14075   0x3B3B3B, 0x44A4A, 0x43B3B, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x44A4A, 0x45959,
   14076   0x43B3B, 0x2C2C2C, 0x3B3B3B, 0x2C2C2C, 0x3B3B3B, 0x8989, 0x8989, 0x89894,
   14077   0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 0x898989, 0x7A7A7A, 0x898989,
   14078   0x7A7A7A, 0x898989, 0x7A7A7A, 0x2E2C, 0x442E0, 0x440, (1U<<31) | 3722, 0x7A7A7A7A,
   14079   0x2898989, 0x27A7A7A, 0x27A7A7A, 0x22C2C3B, 0x4A4A3B, 0x2C2C2C2C, 0x3B3B, 0x4A4A59,
   14080   0x59594, 0x59594, 0x59594, 0x48989, 0x47A7A, 0x4898989, 0x47A7A7A, 0x344,
   14081   0x444, 0x244, 0x555, 0x242C42C4, 0x242C42C4, 0x242C42C4, 0x242C42C4, 0x242C42C4,
   14082   0x242C42C4, (1U<<31) | 245, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4,
   14083   0x22C2C2C, 0x2C5959, 0x225959, 0x595959, 0x22595959, (1U<<31) | 3895, (1U<<31) | 3895, (1U<<31) | 3895,
   14084   (1U<<31) | 3898, 0x4A4A4A, (1U<<31) | 3898, 0x3B3B3B, (1U<<31) | 3898, 0x3B3B3B, (1U<<31) | 3898, 0x4A4A4A,
   14085   (1U<<31) | 3898, 0x3B3B3B, (1U<<31) | 3898, 0x3B3B3B, (1U<<31) | 3898, 0x2C2C3B, (1U<<31) | 3898, 0x3B3B3B,
   14086   (1U<<31) | 3898, 0x2C2C2C, (1U<<31) | 3898, 0x2C2C2C, (1U<<31) | 3898, 0x4A4A4A, (1U<<31) | 3898, 0x3B3B3B,
   14087   0x2E4422, 0x2E5522, 0x444, 0x555, 0x3B7A, 0x3B7B, 0x47A3B, 0x47B3B,
   14088   0x40, 0x50, 0x40, 0x50, 0x40, 0x20, 0x4, 0x0,
   14089   0x45, 0x8989, 0x8A8A, 0x7A7A, 0x7B7B, 0x8989, 0x7A7A, 0x22C2C2C,
   14090   0x24A4A4A, 0x2595959, 0x22C2C2C, 0x24A4A4A, 0x2595959, 0x23B3B3B, 0x23B3B3B, (1U<<31) | 507,
   14091   (1U<<31) | 562, (1U<<31) | 410, (1U<<31) | 463, 0x2C4A, 0x2C59, 0x2C3B, 0x4A59, 0x2C4A,
   14092   0x2C59, 0x2C3B, 0x4A59, 0x3B4A, 0x3B59, 0x3B4A, 0x3B59, 0x2C3B,
   14093   0x4A59, 0x3B4A, 0x4A4A4A4A, 0x594A4A59, 0x594A4A59, 0x4A4A4A4A, 0x594A4A59, 0x594A4A59,
   14094   0x4A3B3B4A, 0x3B3B3B3B, 0x4A3B3B4A, 0x3B3B3B3B, 0x4A3B3B4A, 0x4A3B3B4A, 0x2C2C2C2C, 0x2C2C2C,
   14095   0x22C2C, 0x4A4A4A, 0x24A4A, 0x595959, 0x25959, 0x3B3B3B, 0x23B3B, 0x2C2C2C,
   14096   0x4A4A4A, 0x595959, 0x3B3B3B, 0x2C2C2C, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x442E0,
   14097   0x442E0, 0x442E0, 0x442E0, 0x442E0, 0x442E0, 0x442E0, 0x442E0, 0x442E0,
   14098   0x442E0, 0x442E0, 0x442E0, 0x4440, 0x4, 0x44, 0x2E2E, 0x44F0,
   14099   0x0, 0x4F0, 0x40, 0x4444, (1U<<31) | 2005, 0x4F0, 0x4F0, 0x4F4,
   14100   0x4F0, 0x4, 0x4, 0x4, 0x44, 0x44F, 0xCF4F, 0x4F4,
   14101   0x4F4, 0x4F4, 0x2E4F0, 0x2E4F0, 0x2E4F0, 0x2E4F0, 0x2E4F0, 0x44F4,
   14102   0x4F4, 0x4F0, 0x4F0, 0x44F0, 0x44F0, 0x44F4, 0x44F0, 0x4F4,
   14103   0x44F0, 0xCF4F0, 0x44F0, 0x2E4F0, 0x440, 0x44F0, 0x44F0, 0xCF4F0,
   14104   0x40, 0x44F0, 0x2E4F0, 0x444, 0x0, 0x4F0, 0x4F4, 0x4F4,
   14105   0x2E, 0x444, 0
   14106 };
   14107 
   14108 static const unsigned char IIT_LongEncodingTable[] = {
   14109   /* 0 */ 0, 4, 4, 15, 0, 15, 0, 15, 0, 15, 0, 1, 1, 0,
   14110   /* 14 */ 15, 2, 15, 10, 15, 17, 10, 4, 4, 1, 1, 1, 1, 1, 0,
   14111   /* 29 */ 0, 15, 2, 15, 9, 15, 17, 4, 1, 1, 1, 1, 0,
   14112   /* 42 */ 4, 4, 4, 15, 1, 11, 4, 1, 1, 1, 0,
   14113   /* 53 */ 0, 4, 4, 15, 3, 15, 3, 1, 1, 0,
   14114   /* 63 */ 0, 15, 0, 10, 4, 4, 4, 4, 4, 4, 4, 1, 1, 0,
   14115   /* 77 */ 0, 15, 2, 10, 4, 4, 4, 1, 1, 0,
   14116   /* 87 */ 21, 15, 2, 1, 15, 2, 15, 2, 1, 0,
   14117   /* 97 */ 15, 2, 15, 2, 15, 2, 15, 2, 1, 0,
   14118   /* 107 */ 0, 15, 3, 33, 3, 31, 3, 1, 0,
   14119   /* 116 */ 0, 15, 3, 34, 1, 0, 4, 31, 3, 1, 0,
   14120   /* 127 */ 0, 15, 3, 15, 12, 4, 31, 3, 1, 0,
   14121   /* 137 */ 15, 1, 15, 12, 15, 1, 4, 4, 1, 0,
   14122   /* 147 */ 15, 1, 15, 1, 15, 1, 4, 4, 4, 1, 0,
   14123   /* 158 */ 0, 15, 4, 15, 12, 15, 17, 4, 1, 0,
   14124   /* 168 */ 21, 1, 5, 1, 0,
   14125   /* 173 */ 21, 15, 1, 1, 15, 1, 15, 1, 0,
   14126   /* 182 */ 0, 19, 15, 1, 0,
   14127   /* 187 */ 2, 18, 1, 0,
   14128   /* 191 */ 15, 1, 25, 1, 0,
   14129   /* 196 */ 36, 1, 36, 1, 36, 1, 0,
   14130   /* 203 */ 37, 1, 37, 1, 37, 1, 0,
   14131   /* 210 */ 27, 2, 2, 0,
   14132   /* 214 */ 11, 3, 12, 2, 12, 2, 11, 3, 2, 0,
   14133   /* 224 */ 11, 3, 11, 3, 11, 3, 11, 3, 2, 0,
   14134   /* 234 */ 11, 3, 12, 2, 12, 2, 4, 11, 3, 2, 0,
   14135   /* 245 */ 12, 2, 12, 2, 4, 12, 2, 4, 2, 0,
   14136   /* 255 */ 10, 4, 10, 4, 10, 4, 10, 4, 4, 2, 0,
   14137   /* 266 */ 10, 7, 10, 7, 10, 7, 10, 4, 4, 2, 0,
   14138   /* 277 */ 11, 4, 11, 4, 11, 4, 11, 4, 4, 2, 0,
   14139   /* 288 */ 11, 7, 11, 7, 11, 7, 11, 4, 4, 2, 0,
   14140   /* 299 */ 9, 5, 9, 5, 9, 5, 9, 5, 4, 2, 0,
   14141   /* 310 */ 9, 8, 9, 8, 9, 8, 9, 5, 4, 2, 0,
   14142   /* 321 */ 10, 5, 10, 5, 10, 5, 10, 5, 4, 2, 0,
   14143   /* 332 */ 10, 8, 10, 8, 10, 8, 10, 5, 4, 2, 0,
   14144   /* 343 */ 11, 5, 11, 5, 11, 5, 11, 5, 4, 2, 0,
   14145   /* 354 */ 10, 4, 11, 3, 11, 3, 10, 4, 2, 0,
   14146   /* 364 */ 10, 4, 10, 4, 14, 2, 10, 4, 10, 4, 2, 0,
   14147   /* 376 */ 10, 4, 10, 4, 10, 4, 10, 4, 2, 0,
   14148   /* 386 */ 10, 4, 10, 4, 14, 2, 9, 5, 10, 4, 2, 0,
   14149   /* 398 */ 10, 4, 10, 4, 14, 2, 10, 5, 10, 4, 2, 0,
   14150   /* 410 */ 10, 7, 10, 7, 10, 7, 10, 4, 2, 0,
   14151   /* 420 */ 11, 4, 12, 3, 12, 3, 11, 4, 2, 0,
   14152   /* 430 */ 11, 4, 11, 4, 11, 4, 4, 11, 4, 2, 0,
   14153   /* 441 */ 11, 4, 11, 4, 14, 2, 11, 4, 11, 4, 2, 0,
   14154   /* 453 */ 11, 4, 11, 4, 11, 4, 11, 4, 2, 0,
   14155   /* 463 */ 11, 7, 11, 7, 11, 7, 11, 4, 2, 0,
   14156   /* 473 */ 9, 5, 9, 5, 14, 2, 10, 4, 9, 5, 2, 0,
   14157   /* 485 */ 9, 5, 9, 5, 14, 2, 9, 5, 9, 5, 2, 0,
   14158   /* 497 */ 9, 5, 9, 5, 9, 5, 9, 5, 2, 0,
   14159   /* 507 */ 9, 8, 9, 8, 9, 8, 9, 5, 2, 0,
   14160   /* 517 */ 10, 5, 10, 5, 10, 5, 4, 10, 5, 2, 0,
   14161   /* 528 */ 10, 5, 10, 5, 14, 2, 10, 4, 10, 5, 2, 0,
   14162   /* 540 */ 10, 5, 10, 5, 14, 2, 10, 5, 10, 5, 2, 0,
   14163   /* 552 */ 10, 5, 10, 5, 10, 5, 10, 5, 2, 0,
   14164   /* 562 */ 10, 8, 10, 8, 10, 8, 10, 5, 2, 0,
   14165   /* 572 */ 11, 5, 11, 5, 11, 5, 4, 11, 5, 2, 0,
   14166   /* 583 */ 11, 5, 11, 5, 11, 5, 11, 5, 2, 0,
   14167   /* 593 */ 10, 7, 10, 7, 10, 7, 4, 10, 7, 2, 0,
   14168   /* 604 */ 10, 7, 10, 7, 14, 2, 10, 4, 10, 7, 2, 0,
   14169   /* 616 */ 10, 7, 10, 7, 10, 4, 10, 7, 2, 0,
   14170   /* 626 */ 10, 7, 10, 7, 14, 2, 9, 5, 10, 7, 2, 0,
   14171   /* 638 */ 10, 7, 10, 7, 14, 2, 10, 5, 10, 7, 2, 0,
   14172   /* 650 */ 10, 7, 10, 4, 10, 7, 10, 7, 2, 0,
   14173   /* 660 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 0,
   14174   /* 670 */ 11, 7, 11, 7, 11, 7, 4, 11, 7, 2, 0,
   14175   /* 681 */ 11, 7, 11, 7, 14, 2, 11, 4, 11, 7, 2, 0,
   14176   /* 693 */ 11, 7, 11, 7, 11, 4, 11, 7, 2, 0,
   14177   /* 703 */ 11, 7, 11, 4, 11, 7, 11, 7, 2, 0,
   14178   /* 713 */ 11, 7, 11, 7, 11, 7, 11, 7, 2, 0,
   14179   /* 723 */ 27, 7, 2, 0,
   14180   /* 727 */ 9, 8, 9, 8, 9, 8, 4, 9, 8, 2, 0,
   14181   /* 738 */ 9, 8, 9, 8, 14, 2, 10, 4, 9, 8, 2, 0,
   14182   /* 750 */ 9, 8, 9, 8, 14, 2, 9, 5, 9, 8, 2, 0,
   14183   /* 762 */ 9, 8, 9, 8, 9, 5, 9, 8, 2, 0,
   14184   /* 772 */ 9, 8, 9, 5, 9, 8, 9, 8, 2, 0,
   14185   /* 782 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 0,
   14186   /* 792 */ 10, 8, 10, 8, 10, 8, 4, 10, 8, 2, 0,
   14187   /* 803 */ 10, 8, 10, 8, 14, 2, 10, 4, 10, 8, 2, 0,
   14188   /* 815 */ 10, 8, 10, 8, 14, 2, 10, 5, 10, 8, 2, 0,
   14189   /* 827 */ 10, 8, 10, 8, 10, 5, 10, 8, 2, 0,
   14190   /* 837 */ 10, 8, 10, 5, 10, 8, 10, 8, 2, 0,
   14191   /* 847 */ 10, 8, 10, 8, 10, 8, 10, 8, 2, 0,
   14192   /* 857 */ 11, 8, 11, 8, 11, 8, 4, 11, 8, 2, 0,
   14193   /* 868 */ 11, 8, 11, 8, 11, 5, 11, 8, 2, 0,
   14194   /* 878 */ 11, 8, 11, 5, 11, 8, 11, 8, 2, 0,
   14195   /* 888 */ 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 0,
   14196   /* 903 */ 21, 12, 2, 4, 12, 2, 12, 2, 0,
   14197   /* 912 */ 21, 12, 2, 4, 12, 2, 0,
   14198   /* 919 */ 18, 4, 14, 2, 14, 2, 14, 2, 0,
   14199   /* 928 */ 21, 4, 4, 14, 2, 0,
   14200   /* 934 */ 21, 5, 5, 14, 2, 0,
   14201   /* 940 */ 40, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 14, 2, 0,
   14202   /* 960 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 14, 2, 0,
   14203   /* 972 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 14, 2, 0,
   14204   /* 984 */ 0, 17, 17, 14, 2, 0,
   14205   /* 990 */ 14, 2, 18, 14, 2, 0,
   14206   /* 996 */ 16, 2, 16, 2, 16, 2, 0,
   14207   /* 1003 */ 11, 5, 16, 2, 16, 2, 0,
   14208   /* 1010 */ 5, 16, 2, 0,
   14209   /* 1014 */ 17, 17, 17, 2, 0,
   14210   /* 1019 */ 12, 2, 12, 2, 12, 2, 12, 2, 3, 0,
   14211   /* 1029 */ 0, 5, 4, 4, 4, 3, 3, 3, 3, 0,
   14212   /* 1039 */ 12, 3, 13, 2, 13, 2, 12, 3, 3, 0,
   14213   /* 1049 */ 12, 3, 12, 3, 12, 3, 12, 3, 3, 0,
   14214   /* 1059 */ 12, 3, 13, 2, 13, 2, 4, 12, 3, 3, 0,
   14215   /* 1070 */ 12, 4, 12, 4, 12, 4, 12, 4, 4, 3, 0,
   14216   /* 1081 */ 12, 4, 13, 3, 13, 3, 12, 4, 3, 0,
   14217   /* 1091 */ 12, 4, 12, 4, 12, 4, 4, 12, 4, 3, 0,
   14218   /* 1102 */ 12, 4, 12, 4, 12, 4, 12, 4, 3, 0,
   14219   /* 1112 */ 12, 7, 12, 7, 12, 7, 4, 12, 7, 3, 0,
   14220   /* 1123 */ 12, 7, 12, 7, 12, 4, 12, 7, 3, 0,
   14221   /* 1133 */ 12, 7, 12, 4, 12, 7, 12, 7, 3, 0,
   14222   /* 1143 */ 21, 12, 2, 4, 11, 3, 11, 3, 0,
   14223   /* 1152 */ 21, 11, 3, 4, 11, 3, 11, 3, 0,
   14224   /* 1161 */ 21, 11, 3, 4, 11, 3, 0,
   14225   /* 1168 */ 16, 2, 13, 3, 13, 3, 0,
   14226   /* 1175 */ 15, 3, 33, 3, 31, 3, 1, 15, 3, 0,
   14227   /* 1185 */ 15, 3, 34, 1, 0, 4, 31, 3, 1, 15, 3, 0,
   14228   /* 1197 */ 15, 3, 15, 12, 4, 31, 3, 1, 15, 3, 0,
   14229   /* 1208 */ 15, 3, 15, 3, 12, 2, 12, 2, 12, 2, 12, 2, 15, 3, 0,
   14230   /* 1223 */ 15, 3, 15, 3, 12, 2, 12, 2, 12, 2, 15, 3, 0,
   14231   /* 1236 */ 15, 3, 15, 3, 12, 2, 12, 2, 15, 3, 0,
   14232   /* 1247 */ 15, 3, 25, 3, 0,
   14233   /* 1252 */ 15, 3, 25, 3, 25, 3, 0,
   14234   /* 1259 */ 15, 3, 26, 3, 0,
   14235   /* 1264 */ 15, 3, 26, 3, 26, 3, 0,
   14236   /* 1271 */ 15, 1, 25, 1, 4, 0,
   14237   /* 1277 */ 12, 4, 12, 4, 36, 1, 4, 0,
   14238   /* 1285 */ 13, 4, 13, 4, 37, 1, 4, 0,
   14239   /* 1293 */ 10, 7, 10, 7, 10, 7, 10, 4, 4, 2, 4, 0,
   14240   /* 1305 */ 9, 8, 9, 8, 9, 8, 9, 5, 4, 2, 4, 0,
   14241   /* 1317 */ 11, 8, 11, 8, 11, 8, 11, 5, 4, 2, 4, 0,
   14242   /* 1329 */ 10, 4, 10, 4, 14, 2, 10, 4, 2, 4, 0,
   14243   /* 1340 */ 9, 5, 9, 5, 14, 2, 10, 4, 2, 4, 0,
   14244   /* 1351 */ 10, 5, 10, 5, 14, 2, 10, 4, 2, 4, 0,
   14245   /* 1362 */ 10, 7, 10, 7, 14, 2, 10, 4, 2, 4, 0,
   14246   /* 1373 */ 9, 8, 9, 8, 14, 2, 10, 4, 2, 4, 0,
   14247   /* 1384 */ 10, 8, 10, 8, 14, 2, 10, 4, 2, 4, 0,
   14248   /* 1395 */ 11, 4, 11, 4, 14, 2, 11, 4, 2, 4, 0,
   14249   /* 1406 */ 11, 5, 11, 5, 14, 2, 11, 4, 2, 4, 0,
   14250   /* 1417 */ 11, 7, 11, 7, 14, 2, 11, 4, 2, 4, 0,
   14251   /* 1428 */ 11, 8, 11, 8, 14, 2, 11, 4, 2, 4, 0,
   14252   /* 1439 */ 10, 4, 10, 4, 14, 2, 9, 5, 2, 4, 0,
   14253   /* 1450 */ 9, 5, 9, 5, 14, 2, 9, 5, 2, 4, 0,
   14254   /* 1461 */ 10, 7, 10, 7, 14, 2, 9, 5, 2, 4, 0,
   14255   /* 1472 */ 9, 8, 9, 8, 14, 2, 9, 5, 2, 4, 0,
   14256   /* 1483 */ 10, 4, 10, 4, 14, 2, 10, 5, 2, 4, 0,
   14257   /* 1494 */ 10, 5, 10, 5, 14, 2, 10, 5, 2, 4, 0,
   14258   /* 1505 */ 10, 7, 10, 7, 14, 2, 10, 5, 2, 4, 0,
   14259   /* 1516 */ 10, 8, 10, 8, 14, 2, 10, 5, 2, 4, 0,
   14260   /* 1527 */ 11, 4, 11, 4, 14, 2, 11, 5, 2, 4, 0,
   14261   /* 1538 */ 11, 5, 11, 5, 14, 2, 11, 5, 2, 4, 0,
   14262   /* 1549 */ 11, 7, 11, 7, 14, 2, 11, 5, 2, 4, 0,
   14263   /* 1560 */ 11, 8, 11, 8, 14, 2, 11, 5, 2, 4, 0,
   14264   /* 1571 */ 10, 7, 10, 7, 10, 7, 4, 10, 7, 2, 4, 0,
   14265   /* 1583 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 4, 0,
   14266   /* 1594 */ 10, 7, 10, 7, 9, 8, 10, 7, 2, 4, 0,
   14267   /* 1605 */ 9, 8, 9, 8, 9, 8, 4, 9, 8, 2, 4, 0,
   14268   /* 1617 */ 9, 8, 9, 8, 10, 7, 9, 8, 2, 4, 0,
   14269   /* 1628 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 4, 0,
   14270   /* 1639 */ 11, 8, 11, 8, 11, 8, 4, 11, 8, 2, 4, 0,
   14271   /* 1651 */ 11, 8, 11, 8, 11, 8, 11, 8, 2, 4, 0,
   14272   /* 1662 */ 12, 2, 12, 2, 12, 2, 12, 2, 4, 0,
   14273   /* 1672 */ 21, 12, 2, 4, 12, 2, 12, 2, 12, 2, 4, 0,
   14274   /* 1684 */ 21, 12, 2, 4, 12, 2, 12, 2, 4, 0,
   14275   /* 1694 */ 12, 2, 9, 5, 9, 5, 12, 2, 4, 0,
   14276   /* 1704 */ 13, 2, 13, 2, 13, 2, 13, 2, 4, 0,
   14277   /* 1714 */ 15, 1, 15, 1, 14, 2, 14, 2, 4, 0,
   14278   /* 1724 */ 15, 4, 15, 4, 14, 2, 14, 2, 4, 0,
   14279   /* 1734 */ 40, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 14, 2, 4, 0,
   14280   /* 1755 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 14, 2, 4, 0,
   14281   /* 1768 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 14, 2, 4, 0,
   14282   /* 1781 */ 12, 7, 12, 7, 12, 7, 12, 4, 4, 3, 4, 0,
   14283   /* 1793 */ 12, 4, 12, 4, 14, 2, 12, 4, 3, 4, 0,
   14284   /* 1804 */ 12, 7, 12, 7, 14, 2, 12, 4, 3, 4, 0,
   14285   /* 1815 */ 12, 7, 12, 7, 12, 7, 4, 12, 7, 3, 4, 0,
   14286   /* 1827 */ 12, 7, 12, 7, 12, 7, 12, 7, 3, 4, 0,
   14287   /* 1838 */ 11, 3, 11, 3, 11, 3, 11, 3, 4, 0,
   14288   /* 1848 */ 21, 11, 3, 4, 11, 3, 11, 3, 11, 3, 4, 0,
   14289   /* 1860 */ 21, 11, 3, 4, 11, 3, 11, 3, 4, 0,
   14290   /* 1870 */ 13, 3, 16, 2, 16, 2, 13, 3, 4, 0,
   14291   /* 1880 */ 13, 3, 13, 3, 13, 3, 13, 3, 4, 0,
   14292   /* 1890 */ 13, 3, 16, 2, 16, 2, 4, 13, 3, 4, 0,
   14293   /* 1901 */ 21, 3, 4, 0,
   14294   /* 1905 */ 15, 3, 26, 3, 4, 0,
   14295   /* 1911 */ 21, 4, 1, 4, 4, 0,
   14296   /* 1917 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 4, 4, 0,
   14297   /* 1929 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 4, 4, 0,
   14298   /* 1941 */ 23, 15, 3, 15, 3, 15, 3, 15, 3, 15, 12, 15, 3, 15, 3, 15, 3, 15, 3, 4, 4, 0,
   14299   /* 1963 */ 22, 15, 3, 15, 3, 15, 3, 15, 12, 15, 3, 15, 3, 15, 3, 4, 4, 0,
   14300   /* 1981 */ 21, 15, 3, 15, 3, 15, 12, 15, 3, 15, 3, 4, 4, 0,
   14301   /* 1995 */ 0, 5, 4, 4, 4, 4, 4, 4, 4, 0,
   14302   /* 2005 */ 21, 4, 4, 4, 4, 4, 0,
   14303   /* 2012 */ 23, 3, 3, 3, 3, 5, 4, 4, 4, 0,
   14304   /* 2022 */ 21, 3, 3, 5, 4, 4, 4, 0,
   14305   /* 2030 */ 23, 4, 4, 4, 4, 5, 4, 4, 4, 0,
   14306   /* 2040 */ 21, 4, 4, 5, 4, 4, 4, 0,
   14307   /* 2048 */ 23, 4, 4, 4, 4, 5, 5, 4, 4, 4, 0,
   14308   /* 2059 */ 21, 5, 5, 5, 4, 4, 4, 0,
   14309   /* 2067 */ 23, 7, 7, 7, 7, 5, 5, 4, 4, 4, 0,
   14310   /* 2078 */ 23, 7, 7, 7, 7, 5, 4, 4, 4, 0,
   14311   /* 2088 */ 16, 4, 16, 4, 16, 4, 4, 4, 0,
   14312   /* 2097 */ 23, 3, 3, 3, 3, 5, 4, 4, 0,
   14313   /* 2106 */ 21, 3, 3, 5, 4, 4, 0,
   14314   /* 2113 */ 23, 4, 4, 4, 4, 5, 4, 4, 0,
   14315   /* 2122 */ 21, 4, 4, 5, 4, 4, 0,
   14316   /* 2129 */ 23, 4, 4, 4, 4, 5, 5, 4, 4, 0,
   14317   /* 2139 */ 21, 5, 5, 5, 4, 4, 0,
   14318   /* 2146 */ 23, 7, 7, 7, 7, 5, 5, 4, 4, 0,
   14319   /* 2156 */ 23, 7, 7, 7, 7, 5, 4, 4, 0,
   14320   /* 2165 */ 0, 14, 2, 2, 10, 4, 10, 4, 4, 0,
   14321   /* 2175 */ 21, 10, 4, 4, 10, 4, 10, 4, 4, 0,
   14322   /* 2185 */ 21, 10, 4, 4, 10, 4, 10, 4, 10, 4, 4, 0,
   14323   /* 2197 */ 10, 4, 10, 4, 10, 4, 10, 4, 4, 0,
   14324   /* 2207 */ 0, 14, 2, 2, 9, 5, 10, 4, 4, 0,
   14325   /* 2217 */ 0, 14, 2, 2, 10, 5, 10, 4, 4, 0,
   14326   /* 2227 */ 0, 14, 2, 2, 11, 4, 11, 4, 4, 0,
   14327   /* 2237 */ 0, 14, 2, 2, 11, 5, 11, 4, 4, 0,
   14328   /* 2247 */ 0, 15, 4, 15, 11, 15, 11, 4, 4, 0,
   14329   /* 2257 */ 0, 15, 4, 15, 11, 15, 11, 15, 11, 4, 4, 0,
   14330   /* 2269 */ 0, 15, 4, 15, 11, 15, 11, 15, 11, 15, 11, 4, 4, 0,
   14331   /* 2283 */ 36, 1, 36, 1, 12, 4, 4, 0,
   14332   /* 2291 */ 0, 14, 2, 3, 12, 4, 12, 4, 4, 0,
   14333   /* 2301 */ 12, 4, 12, 4, 12, 4, 12, 4, 4, 0,
   14334   /* 2311 */ 13, 4, 13, 4, 12, 4, 12, 4, 4, 0,
   14335   /* 2321 */ 37, 1, 37, 1, 13, 4, 4, 0,
   14336   /* 2329 */ 13, 4, 13, 4, 13, 4, 13, 4, 4, 0,
   14337   /* 2339 */ 16, 4, 16, 4, 13, 4, 13, 4, 4, 0,
   14338   /* 2349 */ 16, 4, 16, 4, 13, 4, 4, 0,
   14339   /* 2357 */ 13, 4, 13, 4, 16, 4, 4, 0,
   14340   /* 2365 */ 16, 4, 16, 4, 16, 4, 4, 0,
   14341   /* 2373 */ 17, 17, 4, 4, 0,
   14342   /* 2378 */ 15, 0, 18, 4, 4, 0,
   14343   /* 2384 */ 21, 4, 4, 0,
   14344   /* 2388 */ 23, 3, 3, 3, 3, 5, 4, 0,
   14345   /* 2396 */ 21, 3, 3, 5, 4, 0,
   14346   /* 2402 */ 23, 4, 4, 4, 4, 5, 4, 0,
   14347   /* 2410 */ 21, 4, 4, 5, 4, 0,
   14348   /* 2416 */ 16, 4, 16, 4, 16, 4, 5, 4, 0,
   14349   /* 2425 */ 23, 4, 4, 4, 4, 5, 5, 4, 0,
   14350   /* 2434 */ 21, 5, 5, 5, 4, 0,
   14351   /* 2440 */ 23, 7, 7, 7, 7, 5, 5, 4, 0,
   14352   /* 2449 */ 23, 7, 7, 7, 7, 5, 4, 0,
   14353   /* 2457 */ 0, 14, 2, 2, 10, 4, 9, 5, 4, 0,
   14354   /* 2467 */ 0, 14, 2, 2, 9, 5, 9, 5, 4, 0,
   14355   /* 2477 */ 9, 5, 9, 5, 9, 5, 9, 5, 4, 0,
   14356   /* 2487 */ 0, 14, 2, 2, 10, 4, 10, 5, 4, 0,
   14357   /* 2497 */ 0, 14, 2, 2, 10, 5, 10, 5, 4, 0,
   14358   /* 2507 */ 0, 14, 2, 2, 11, 4, 11, 5, 4, 0,
   14359   /* 2517 */ 0, 14, 2, 2, 11, 5, 11, 5, 4, 0,
   14360   /* 2527 */ 21, 5, 4, 0,
   14361   /* 2531 */ 0, 14, 2, 9, 6, 9, 6, 9, 6, 9, 6, 4, 0,
   14362   /* 2544 */ 0, 14, 2, 7, 7, 7, 7, 7, 7, 7, 7, 4, 0,
   14363   /* 2557 */ 21, 10, 4, 4, 10, 7, 4, 0,
   14364   /* 2565 */ 0, 14, 2, 2, 10, 4, 10, 7, 4, 0,
   14365   /* 2575 */ 0, 14, 2, 2, 9, 5, 10, 7, 4, 0,
   14366   /* 2585 */ 0, 14, 2, 2, 10, 5, 10, 7, 4, 0,
   14367   /* 2595 */ 0, 14, 2, 2, 11, 4, 11, 7, 4, 0,
   14368   /* 2605 */ 0, 14, 2, 2, 11, 5, 11, 7, 4, 0,
   14369   /* 2615 */ 0, 14, 2, 3, 12, 4, 12, 7, 4, 0,
   14370   /* 2625 */ 21, 9, 5, 4, 9, 8, 4, 0,
   14371   /* 2633 */ 0, 14, 2, 2, 10, 4, 9, 8, 4, 0,
   14372   /* 2643 */ 0, 14, 2, 2, 9, 5, 9, 8, 4, 0,
   14373   /* 2653 */ 0, 14, 2, 2, 10, 4, 10, 8, 4, 0,
   14374   /* 2663 */ 0, 14, 2, 2, 10, 5, 10, 8, 4, 0,
   14375   /* 2673 */ 0, 14, 2, 2, 11, 4, 11, 8, 4, 0,
   14376   /* 2683 */ 0, 14, 2, 2, 11, 5, 11, 8, 4, 0,
   14377   /* 2693 */ 21, 10, 4, 4, 10, 4, 0,
   14378   /* 2700 */ 21, 11, 3, 4, 10, 4, 10, 4, 0,
   14379   /* 2709 */ 21, 10, 4, 4, 10, 4, 10, 4, 0,
   14380   /* 2718 */ 0, 15, 4, 15, 11, 15, 11, 15, 11, 4, 0,
   14381   /* 2729 */ 0, 15, 4, 15, 11, 15, 11, 15, 11, 15, 11, 4, 0,
   14382   /* 2742 */ 12, 4, 36, 1, 12, 4, 0,
   14383   /* 2749 */ 0, 36, 1, 14, 2, 12, 4, 0,
   14384   /* 2757 */ 36, 1, 36, 1, 12, 4, 12, 4, 0,
   14385   /* 2766 */ 12, 4, 36, 1, 12, 4, 12, 4, 0,
   14386   /* 2775 */ 13, 4, 36, 1, 12, 4, 12, 4, 0,
   14387   /* 2784 */ 23, 15, 3, 15, 3, 15, 3, 15, 3, 15, 12, 4, 0,
   14388   /* 2797 */ 22, 15, 3, 15, 3, 15, 3, 15, 12, 4, 0,
   14389   /* 2808 */ 21, 15, 3, 15, 3, 15, 12, 4, 0,
   14390   /* 2817 */ 13, 4, 37, 1, 13, 4, 0,
   14391   /* 2824 */ 0, 37, 1, 14, 2, 13, 4, 0,
   14392   /* 2832 */ 37, 1, 37, 1, 13, 4, 13, 4, 0,
   14393   /* 2841 */ 13, 4, 37, 1, 13, 4, 13, 4, 0,
   14394   /* 2850 */ 16, 4, 37, 1, 13, 4, 13, 4, 0,
   14395   /* 2859 */ 16, 4, 16, 4, 13, 4, 13, 4, 0,
   14396   /* 2868 */ 16, 4, 16, 4, 13, 4, 0,
   14397   /* 2875 */ 0, 14, 20, 5, 15, 4, 0,
   14398   /* 2882 */ 5, 19, 15, 4, 0,
   14399   /* 2887 */ 13, 4, 16, 4, 0,
   14400   /* 2892 */ 16, 4, 16, 4, 16, 4, 0,
   14401   /* 2899 */ 4, 17, 4, 0,
   14402   /* 2903 */ 0, 15, 4, 15, 12, 15, 17, 4, 0,
   14403   /* 2912 */ 17, 17, 4, 0,
   14404   /* 2916 */ 16, 2, 16, 2, 16, 2, 16, 2, 5, 0,
   14405   /* 2926 */ 5, 16, 2, 16, 2, 5, 0,
   14406   /* 2933 */ 21, 5, 1, 4, 5, 0,
   14407   /* 2939 */ 21, 1, 5, 5, 0,
   14408   /* 2944 */ 21, 10, 4, 4, 9, 5, 9, 5, 0,
   14409   /* 2953 */ 21, 9, 5, 4, 9, 5, 9, 5, 0,
   14410   /* 2962 */ 0, 14, 2, 9, 6, 9, 6, 9, 6, 9, 6, 0,
   14411   /* 2974 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
   14412   /* 3024 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 0,
   14413   /* 3074 */ 23, 4, 4, 4, 4, 5, 4, 7, 0,
   14414   /* 3083 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 0,
   14415   /* 3093 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 0,
   14416   /* 3103 */ 23, 7, 7, 7, 7, 5, 4, 7, 0,
   14417   /* 3112 */ 23, 4, 4, 4, 4, 5, 7, 0,
   14418   /* 3120 */ 23, 4, 4, 4, 4, 5, 5, 7, 0,
   14419   /* 3129 */ 23, 7, 7, 7, 7, 5, 5, 7, 0,
   14420   /* 3138 */ 23, 7, 7, 7, 7, 5, 7, 0,
   14421   /* 3146 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 0,
   14422   /* 3156 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 0,
   14423   /* 3167 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 0,
   14424   /* 3178 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 0,
   14425   /* 3188 */ 23, 4, 4, 4, 4, 5, 7, 7, 0,
   14426   /* 3197 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 0,
   14427   /* 3207 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 0,
   14428   /* 3217 */ 23, 7, 7, 7, 7, 5, 7, 7, 0,
   14429   /* 3226 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 0,
   14430   /* 3237 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 0,
   14431   /* 3249 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 0,
   14432   /* 3261 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 0,
   14433   /* 3272 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 0,
   14434   /* 3282 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 0,
   14435   /* 3293 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 0,
   14436   /* 3304 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 0,
   14437   /* 3314 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 0,
   14438   /* 3326 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 0,
   14439   /* 3339 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 0,
   14440   /* 3352 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 0,
   14441   /* 3364 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 0,
   14442   /* 3375 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 0,
   14443   /* 3387 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 0,
   14444   /* 3399 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 0,
   14445   /* 3410 */ 23, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 7, 7, 0,
   14446   /* 3424 */ 23, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
   14447   /* 3439 */ 23, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
   14448   /* 3454 */ 23, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 7, 7, 0,
   14449   /* 3468 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 0,
   14450   /* 3481 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 0,
   14451   /* 3495 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 0,
   14452   /* 3509 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 0,
   14453   /* 3522 */ 0, 14, 2, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14454   /* 3534 */ 23, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14455   /* 3584 */ 40, 7, 7, 7, 7, 7, 7, 7, 7, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 9, 6, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14456   /* 3634 */ 23, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14457   /* 3650 */ 23, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14458   /* 3667 */ 23, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14459   /* 3684 */ 23, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
   14460   /* 3700 */ 21, 10, 4, 4, 10, 7, 10, 7, 0,
   14461   /* 3709 */ 17, 10, 7, 0,
   14462   /* 3713 */ 21, 9, 5, 4, 9, 8, 9, 8, 0,
   14463   /* 3722 */ 9, 8, 9, 8, 9, 8, 9, 8, 0,
   14464   /* 3731 */ 17, 9, 8, 0,
   14465   /* 3735 */ 10, 8, 10, 8, 10, 8, 10, 8, 0,
   14466   /* 3744 */ 0, 15, 3, 15, 3, 15, 3, 15, 12, 0,
   14467   /* 3754 */ 0, 15, 3, 15, 3, 15, 3, 15, 3, 15, 12, 0,
   14468   /* 3766 */ 23, 15, 3, 15, 3, 15, 3, 15, 3, 15, 12, 0,
   14469   /* 3778 */ 22, 15, 3, 15, 3, 15, 3, 15, 12, 0,
   14470   /* 3788 */ 21, 15, 3, 15, 3, 15, 12, 0,
   14471   /* 3796 */ 0, 15, 3, 15, 3, 5, 15, 12, 0,
   14472   /* 3805 */ 0, 15, 3, 15, 3, 15, 3, 5, 15, 12, 0,
   14473   /* 3816 */ 0, 15, 3, 15, 3, 15, 3, 15, 3, 5, 15, 12, 0,
   14474   /* 3829 */ 23, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 5, 15, 12, 0,
   14475   /* 3850 */ 22, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 15, 3, 5, 15, 12, 0,
   14476   /* 3867 */ 21, 15, 3, 15, 3, 15, 3, 15, 3, 5, 15, 12, 0,
   14477   /* 3880 */ 4, 17, 0,
   14478   /* 3883 */ 10, 7, 10, 7, 17, 0,
   14479   /* 3889 */ 9, 8, 17, 0,
   14480   /* 3893 */ 0, 14, 17, 17, 0,
   14481   /* 3898 */ 17, 17, 17, 0,
   14482   /* 3902 */ 15, 0, 18, 0,
   14483   /* 3906 */ 1, 18, 0,
   14484   /* 3909 */ 15, 4, 18, 0,
   14485   /* 3913 */ 0, 19, 0,
   14486   /* 3916 */ 15, 1, 19, 0,
   14487   /* 3920 */ 1, 14, 2, 19, 0,
   14488   /* 3925 */ 21, 14, 2, 1, 14, 2, 4, 19, 0,
   14489   /* 3934 */ 15, 2, 15, 10, 15, 19, 0,
   14490   /* 3941 */ 15, 2, 15, 2, 15, 2, 15, 2, 19, 19, 0,
   14491   /* 3952 */ 15, 2, 15, 2, 4, 19, 19, 0,
   14492   /* 3960 */ 0, 19, 19, 19, 0,
   14493   /* 3965 */ 15, 0, 29, 0,
   14494   /* 3969 */ 0, 1, 29, 0,
   14495   /* 3973 */ 0, 5, 4, 14, 2, 4, 29, 0,
   14496   /* 3981 */ 5, 5, 4, 14, 2, 4, 29, 0,
   14497   /* 3989 */ 18, 5, 4, 15, 4, 4, 4, 29, 0,
   14498   /* 3998 */ 0, 5, 4, 29, 0,
   14499   /* 4003 */ 28, 35, 28, 35, 28, 35, 28, 35, 0,
   14500   255
   14501 };
   14502 
   14503 #endif
   14504 
   14505 // Add parameter attributes that are not common to all intrinsics.
   14506 #ifdef GET_INTRINSIC_ATTRIBUTES
   14507 AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {
   14508   static const uint8_t IntrinsicsToAttributesMap[] = {
   14509     1, // llvm.addressofreturnaddress
   14510     2, // llvm.adjust.trampoline
   14511     3, // llvm.annotation
   14512     3, // llvm.assume
   14513     4, // llvm.bitreverse
   14514     4, // llvm.bswap
   14515     4, // llvm.canonicalize
   14516     4, // llvm.ceil
   14517     3, // llvm.clear_cache
   14518     5, // llvm.codeview.annotation
   14519     1, // llvm.convert.from.fp16
   14520     1, // llvm.convert.to.fp16
   14521     4, // llvm.copysign
   14522     3, // llvm.coro.alloc
   14523     6, // llvm.coro.begin
   14524     7, // llvm.coro.destroy
   14525     8, // llvm.coro.done
   14526     3, // llvm.coro.end
   14527     1, // llvm.coro.frame
   14528     9, // llvm.coro.free
   14529     10, // llvm.coro.id
   14530     11, // llvm.coro.param
   14531     12, // llvm.coro.promise
   14532     7, // llvm.coro.resume
   14533     3, // llvm.coro.save
   14534     1, // llvm.coro.size
   14535     13, // llvm.coro.subfn.addr
   14536     3, // llvm.coro.suspend
   14537     4, // llvm.cos
   14538     4, // llvm.ctlz
   14539     4, // llvm.ctpop
   14540     4, // llvm.cttz
   14541     4, // llvm.dbg.addr
   14542     4, // llvm.dbg.declare
   14543     4, // llvm.dbg.value
   14544     3, // llvm.debugtrap
   14545     1, // llvm.donothing
   14546     3, // llvm.eh.dwarf.cfa
   14547     1, // llvm.eh.exceptioncode
   14548     1, // llvm.eh.exceptionpointer
   14549     3, // llvm.eh.return.i32
   14550     3, // llvm.eh.return.i64
   14551     1, // llvm.eh.sjlj.callsite
   14552     3, // llvm.eh.sjlj.functioncontext
   14553     14, // llvm.eh.sjlj.longjmp
   14554     1, // llvm.eh.sjlj.lsda
   14555     3, // llvm.eh.sjlj.setjmp
   14556     3, // llvm.eh.sjlj.setup.dispatch
   14557     1, // llvm.eh.typeid.for
   14558     3, // llvm.eh.unwind.init
   14559     4, // llvm.exp
   14560     4, // llvm.exp2
   14561     1, // llvm.expect
   14562     15, // llvm.experimental.constrained.cos
   14563     15, // llvm.experimental.constrained.exp
   14564     15, // llvm.experimental.constrained.exp2
   14565     15, // llvm.experimental.constrained.fadd
   14566     15, // llvm.experimental.constrained.fdiv
   14567     15, // llvm.experimental.constrained.fma
   14568     15, // llvm.experimental.constrained.fmul
   14569     15, // llvm.experimental.constrained.frem
   14570     15, // llvm.experimental.constrained.fsub
   14571     15, // llvm.experimental.constrained.log
   14572     15, // llvm.experimental.constrained.log10
   14573     15, // llvm.experimental.constrained.log2
   14574     15, // llvm.experimental.constrained.nearbyint
   14575     15, // llvm.experimental.constrained.pow
   14576     15, // llvm.experimental.constrained.powi
   14577     15, // llvm.experimental.constrained.rint
   14578     15, // llvm.experimental.constrained.sin
   14579     15, // llvm.experimental.constrained.sqrt
   14580     7, // llvm.experimental.deoptimize
   14581     16, // llvm.experimental.gc.relocate
   14582     16, // llvm.experimental.gc.result
   14583     7, // llvm.experimental.gc.statepoint
   14584     7, // llvm.experimental.guard
   14585     7, // llvm.experimental.patchpoint.i64
   14586     7, // llvm.experimental.patchpoint.void
   14587     7, // llvm.experimental.stackmap
   14588     1, // llvm.experimental.vector.reduce.add
   14589     1, // llvm.experimental.vector.reduce.and
   14590     1, // llvm.experimental.vector.reduce.fadd
   14591     1, // llvm.experimental.vector.reduce.fmax
   14592     1, // llvm.experimental.vector.reduce.fmin
   14593     1, // llvm.experimental.vector.reduce.fmul
   14594     1, // llvm.experimental.vector.reduce.mul
   14595     1, // llvm.experimental.vector.reduce.or
   14596     1, // llvm.experimental.vector.reduce.smax
   14597     1, // llvm.experimental.vector.reduce.smin
   14598     1, // llvm.experimental.vector.reduce.umax
   14599     1, // llvm.experimental.vector.reduce.umin
   14600     1, // llvm.experimental.vector.reduce.xor
   14601     4, // llvm.fabs
   14602     4, // llvm.floor
   14603     3, // llvm.flt.rounds
   14604     4, // llvm.fma
   14605     4, // llvm.fmuladd
   14606     1, // llvm.frameaddress
   14607     2, // llvm.gcread
   14608     3, // llvm.gcroot
   14609     17, // llvm.gcwrite
   14610     3, // llvm.get.dynamic.area.offset
   14611     18, // llvm.init.trampoline
   14612     3, // llvm.instrprof.increment
   14613     3, // llvm.instrprof.increment.step
   14614     3, // llvm.instrprof.value.profile
   14615     19, // llvm.invariant.end
   14616     2, // llvm.invariant.group.barrier
   14617     20, // llvm.invariant.start
   14618     20, // llvm.lifetime.end
   14619     20, // llvm.lifetime.start
   14620     2, // llvm.load.relative
   14621     1, // llvm.localaddress
   14622     3, // llvm.localescape
   14623     1, // llvm.localrecover
   14624     4, // llvm.log
   14625     4, // llvm.log10
   14626     4, // llvm.log2
   14627     14, // llvm.longjmp
   14628     21, // llvm.masked.compressstore
   14629     16, // llvm.masked.expandload
   14630     16, // llvm.masked.gather
   14631     2, // llvm.masked.load
   14632     3, // llvm.masked.scatter
   14633     21, // llvm.masked.store
   14634     4, // llvm.maxnum
   14635     22, // llvm.memcpy
   14636     22, // llvm.memcpy.element.unordered.atomic
   14637     23, // llvm.memmove
   14638     22, // llvm.memmove.element.unordered.atomic
   14639     24, // llvm.memset
   14640     24, // llvm.memset.element.unordered.atomic
   14641     4, // llvm.minnum
   14642     4, // llvm.nearbyint
   14643     4, // llvm.objectsize
   14644     3, // llvm.pcmarker
   14645     4, // llvm.pow
   14646     4, // llvm.powi
   14647     25, // llvm.prefetch
   14648     3, // llvm.ptr.annotation
   14649     16, // llvm.read_register
   14650     3, // llvm.readcyclecounter
   14651     1, // llvm.returnaddress
   14652     4, // llvm.rint
   14653     4, // llvm.round
   14654     4, // llvm.sadd.with.overflow
   14655     3, // llvm.setjmp
   14656     14, // llvm.siglongjmp
   14657     3, // llvm.sigsetjmp
   14658     4, // llvm.sin
   14659     4, // llvm.smul.with.overflow
   14660     4, // llvm.sqrt
   14661     26, // llvm.ssa.copy
   14662     4, // llvm.ssub.with.overflow
   14663     3, // llvm.stackguard
   14664     3, // llvm.stackprotector
   14665     3, // llvm.stackrestore
   14666     3, // llvm.stacksave
   14667     1, // llvm.thread.pointer
   14668     14, // llvm.trap
   14669     4, // llvm.trunc
   14670     1, // llvm.type.checked.load
   14671     1, // llvm.type.test
   14672     4, // llvm.uadd.with.overflow
   14673     4, // llvm.umul.with.overflow
   14674     4, // llvm.usub.with.overflow
   14675     3, // llvm.va_copy
   14676     3, // llvm.va_end
   14677     3, // llvm.va_start
   14678     3, // llvm.var.annotation
   14679     3, // llvm.write_register
   14680     27, // llvm.xray.customevent
   14681     3, // llvm.aarch64.clrex
   14682     1, // llvm.aarch64.crc32b
   14683     1, // llvm.aarch64.crc32cb
   14684     1, // llvm.aarch64.crc32ch
   14685     1, // llvm.aarch64.crc32cw
   14686     1, // llvm.aarch64.crc32cx
   14687     1, // llvm.aarch64.crc32h
   14688     1, // llvm.aarch64.crc32w
   14689     1, // llvm.aarch64.crc32x
   14690     1, // llvm.aarch64.crypto.aesd
   14691     1, // llvm.aarch64.crypto.aese
   14692     1, // llvm.aarch64.crypto.aesimc
   14693     1, // llvm.aarch64.crypto.aesmc
   14694     1, // llvm.aarch64.crypto.sha1c
   14695     1, // llvm.aarch64.crypto.sha1h
   14696     1, // llvm.aarch64.crypto.sha1m
   14697     1, // llvm.aarch64.crypto.sha1p
   14698     1, // llvm.aarch64.crypto.sha1su0
   14699     1, // llvm.aarch64.crypto.sha1su1
   14700     1, // llvm.aarch64.crypto.sha256h
   14701     1, // llvm.aarch64.crypto.sha256h2
   14702     1, // llvm.aarch64.crypto.sha256su0
   14703     1, // llvm.aarch64.crypto.sha256su1
   14704     3, // llvm.aarch64.dmb
   14705     3, // llvm.aarch64.dsb
   14706     3, // llvm.aarch64.hint
   14707     3, // llvm.aarch64.isb
   14708     3, // llvm.aarch64.ldaxp
   14709     3, // llvm.aarch64.ldaxr
   14710     3, // llvm.aarch64.ldxp
   14711     3, // llvm.aarch64.ldxr
   14712     1, // llvm.aarch64.neon.abs
   14713     1, // llvm.aarch64.neon.addhn
   14714     1, // llvm.aarch64.neon.addp
   14715     1, // llvm.aarch64.neon.cls
   14716     1, // llvm.aarch64.neon.fabd
   14717     1, // llvm.aarch64.neon.facge
   14718     1, // llvm.aarch64.neon.facgt
   14719     1, // llvm.aarch64.neon.faddv
   14720     1, // llvm.aarch64.neon.fcvtas
   14721     1, // llvm.aarch64.neon.fcvtau
   14722     1, // llvm.aarch64.neon.fcvtms
   14723     1, // llvm.aarch64.neon.fcvtmu
   14724     1, // llvm.aarch64.neon.fcvtns
   14725     1, // llvm.aarch64.neon.fcvtnu
   14726     1, // llvm.aarch64.neon.fcvtps
   14727     1, // llvm.aarch64.neon.fcvtpu
   14728     1, // llvm.aarch64.neon.fcvtxn
   14729     1, // llvm.aarch64.neon.fcvtzs
   14730     1, // llvm.aarch64.neon.fcvtzu
   14731     1, // llvm.aarch64.neon.fmax
   14732     1, // llvm.aarch64.neon.fmaxnm
   14733     1, // llvm.aarch64.neon.fmaxnmp
   14734     1, // llvm.aarch64.neon.fmaxnmv
   14735     1, // llvm.aarch64.neon.fmaxp
   14736     1, // llvm.aarch64.neon.fmaxv
   14737     1, // llvm.aarch64.neon.fmin
   14738     1, // llvm.aarch64.neon.fminnm
   14739     1, // llvm.aarch64.neon.fminnmp
   14740     1, // llvm.aarch64.neon.fminnmv
   14741     1, // llvm.aarch64.neon.fminp
   14742     1, // llvm.aarch64.neon.fminv
   14743     1, // llvm.aarch64.neon.fmulx
   14744     1, // llvm.aarch64.neon.frecpe
   14745     1, // llvm.aarch64.neon.frecps
   14746     1, // llvm.aarch64.neon.frecpx
   14747     1, // llvm.aarch64.neon.frintn
   14748     1, // llvm.aarch64.neon.frsqrte
   14749     1, // llvm.aarch64.neon.frsqrts
   14750     2, // llvm.aarch64.neon.ld1x2
   14751     2, // llvm.aarch64.neon.ld1x3
   14752     2, // llvm.aarch64.neon.ld1x4
   14753     2, // llvm.aarch64.neon.ld2
   14754     2, // llvm.aarch64.neon.ld2lane
   14755     2, // llvm.aarch64.neon.ld2r
   14756     2, // llvm.aarch64.neon.ld3
   14757     2, // llvm.aarch64.neon.ld3lane
   14758     2, // llvm.aarch64.neon.ld3r
   14759     2, // llvm.aarch64.neon.ld4
   14760     2, // llvm.aarch64.neon.ld4lane
   14761     2, // llvm.aarch64.neon.ld4r
   14762     1, // llvm.aarch64.neon.pmul
   14763     1, // llvm.aarch64.neon.pmull
   14764     1, // llvm.aarch64.neon.pmull64
   14765     1, // llvm.aarch64.neon.raddhn
   14766     1, // llvm.aarch64.neon.rbit
   14767     1, // llvm.aarch64.neon.rshrn
   14768     1, // llvm.aarch64.neon.rsubhn
   14769     1, // llvm.aarch64.neon.sabd
   14770     1, // llvm.aarch64.neon.saddlp
   14771     1, // llvm.aarch64.neon.saddlv
   14772     1, // llvm.aarch64.neon.saddv
   14773     1, // llvm.aarch64.neon.scalar.sqxtn
   14774     1, // llvm.aarch64.neon.scalar.sqxtun
   14775     1, // llvm.aarch64.neon.scalar.uqxtn
   14776     1, // llvm.aarch64.neon.shadd
   14777     1, // llvm.aarch64.neon.shll
   14778     1, // llvm.aarch64.neon.shsub
   14779     1, // llvm.aarch64.neon.smax
   14780     1, // llvm.aarch64.neon.smaxp
   14781     1, // llvm.aarch64.neon.smaxv
   14782     1, // llvm.aarch64.neon.smin
   14783     1, // llvm.aarch64.neon.sminp
   14784     1, // llvm.aarch64.neon.sminv
   14785     1, // llvm.aarch64.neon.smull
   14786     1, // llvm.aarch64.neon.sqabs
   14787     1, // llvm.aarch64.neon.sqadd
   14788     1, // llvm.aarch64.neon.sqdmulh
   14789     1, // llvm.aarch64.neon.sqdmull
   14790     1, // llvm.aarch64.neon.sqdmulls.scalar
   14791     1, // llvm.aarch64.neon.sqneg
   14792     1, // llvm.aarch64.neon.sqrdmulh
   14793     1, // llvm.aarch64.neon.sqrshl
   14794     1, // llvm.aarch64.neon.sqrshrn
   14795     1, // llvm.aarch64.neon.sqrshrun
   14796     1, // llvm.aarch64.neon.sqshl
   14797     1, // llvm.aarch64.neon.sqshlu
   14798     1, // llvm.aarch64.neon.sqshrn
   14799     1, // llvm.aarch64.neon.sqshrun
   14800     1, // llvm.aarch64.neon.sqsub
   14801     1, // llvm.aarch64.neon.sqxtn
   14802     1, // llvm.aarch64.neon.sqxtun
   14803     1, // llvm.aarch64.neon.srhadd
   14804     1, // llvm.aarch64.neon.srshl
   14805     1, // llvm.aarch64.neon.sshl
   14806     1, // llvm.aarch64.neon.sshll
   14807     19, // llvm.aarch64.neon.st1x2
   14808     28, // llvm.aarch64.neon.st1x3
   14809     29, // llvm.aarch64.neon.st1x4
   14810     19, // llvm.aarch64.neon.st2
   14811     28, // llvm.aarch64.neon.st2lane
   14812     28, // llvm.aarch64.neon.st3
   14813     29, // llvm.aarch64.neon.st3lane
   14814     29, // llvm.aarch64.neon.st4
   14815     30, // llvm.aarch64.neon.st4lane
   14816     1, // llvm.aarch64.neon.subhn
   14817     1, // llvm.aarch64.neon.suqadd
   14818     1, // llvm.aarch64.neon.tbl1
   14819     1, // llvm.aarch64.neon.tbl2
   14820     1, // llvm.aarch64.neon.tbl3
   14821     1, // llvm.aarch64.neon.tbl4
   14822     1, // llvm.aarch64.neon.tbx1
   14823     1, // llvm.aarch64.neon.tbx2
   14824     1, // llvm.aarch64.neon.tbx3
   14825     1, // llvm.aarch64.neon.tbx4
   14826     1, // llvm.aarch64.neon.uabd
   14827     1, // llvm.aarch64.neon.uaddlp
   14828     1, // llvm.aarch64.neon.uaddlv
   14829     1, // llvm.aarch64.neon.uaddv
   14830     1, // llvm.aarch64.neon.uhadd
   14831     1, // llvm.aarch64.neon.uhsub
   14832     1, // llvm.aarch64.neon.umax
   14833     1, // llvm.aarch64.neon.umaxp
   14834     1, // llvm.aarch64.neon.umaxv
   14835     1, // llvm.aarch64.neon.umin
   14836     1, // llvm.aarch64.neon.uminp
   14837     1, // llvm.aarch64.neon.uminv
   14838     1, // llvm.aarch64.neon.umull
   14839     1, // llvm.aarch64.neon.uqadd
   14840     1, // llvm.aarch64.neon.uqrshl
   14841     1, // llvm.aarch64.neon.uqrshrn
   14842     1, // llvm.aarch64.neon.uqshl
   14843     1, // llvm.aarch64.neon.uqshrn
   14844     1, // llvm.aarch64.neon.uqsub
   14845     1, // llvm.aarch64.neon.uqxtn
   14846     1, // llvm.aarch64.neon.urecpe
   14847     1, // llvm.aarch64.neon.urhadd
   14848     1, // llvm.aarch64.neon.urshl
   14849     1, // llvm.aarch64.neon.ursqrte
   14850     1, // llvm.aarch64.neon.ushl
   14851     1, // llvm.aarch64.neon.ushll
   14852     1, // llvm.aarch64.neon.usqadd
   14853     1, // llvm.aarch64.neon.vcopy.lane
   14854     1, // llvm.aarch64.neon.vcvtfp2fxs
   14855     1, // llvm.aarch64.neon.vcvtfp2fxu
   14856     1, // llvm.aarch64.neon.vcvtfp2hf
   14857     1, // llvm.aarch64.neon.vcvtfxs2fp
   14858     1, // llvm.aarch64.neon.vcvtfxu2fp
   14859     1, // llvm.aarch64.neon.vcvthf2fp
   14860     1, // llvm.aarch64.neon.vsli
   14861     1, // llvm.aarch64.neon.vsri
   14862     1, // llvm.aarch64.sdiv
   14863     1, // llvm.aarch64.sisd.fabd
   14864     1, // llvm.aarch64.sisd.fcvtxn
   14865     3, // llvm.aarch64.stlxp
   14866     3, // llvm.aarch64.stlxr
   14867     3, // llvm.aarch64.stxp
   14868     3, // llvm.aarch64.stxr
   14869     1, // llvm.aarch64.udiv
   14870     4, // llvm.amdgcn.alignbit
   14871     4, // llvm.amdgcn.alignbyte
   14872     18, // llvm.amdgcn.atomic.dec
   14873     18, // llvm.amdgcn.atomic.inc
   14874     31, // llvm.amdgcn.break
   14875     3, // llvm.amdgcn.buffer.atomic.add
   14876     3, // llvm.amdgcn.buffer.atomic.and
   14877     3, // llvm.amdgcn.buffer.atomic.cmpswap
   14878     3, // llvm.amdgcn.buffer.atomic.or
   14879     3, // llvm.amdgcn.buffer.atomic.smax
   14880     3, // llvm.amdgcn.buffer.atomic.smin
   14881     3, // llvm.amdgcn.buffer.atomic.sub
   14882     3, // llvm.amdgcn.buffer.atomic.swap
   14883     3, // llvm.amdgcn.buffer.atomic.umax
   14884     3, // llvm.amdgcn.buffer.atomic.umin
   14885     3, // llvm.amdgcn.buffer.atomic.xor
   14886     16, // llvm.amdgcn.buffer.load
   14887     16, // llvm.amdgcn.buffer.load.format
   14888     32, // llvm.amdgcn.buffer.store
   14889     32, // llvm.amdgcn.buffer.store.format
   14890     3, // llvm.amdgcn.buffer.wbinvl1
   14891     3, // llvm.amdgcn.buffer.wbinvl1.sc
   14892     3, // llvm.amdgcn.buffer.wbinvl1.vol
   14893     4, // llvm.amdgcn.class
   14894     4, // llvm.amdgcn.cos
   14895     4, // llvm.amdgcn.cubeid
   14896     4, // llvm.amdgcn.cubema
   14897     4, // llvm.amdgcn.cubesc
   14898     4, // llvm.amdgcn.cubetc
   14899     4, // llvm.amdgcn.cvt.pk.u8.f32
   14900     4, // llvm.amdgcn.cvt.pkrtz
   14901     4, // llvm.amdgcn.dispatch.id
   14902     4, // llvm.amdgcn.dispatch.ptr
   14903     4, // llvm.amdgcn.div.fixup
   14904     4, // llvm.amdgcn.div.fmas
   14905     4, // llvm.amdgcn.div.scale
   14906     31, // llvm.amdgcn.ds.bpermute
   14907     31, // llvm.amdgcn.ds.permute
   14908     31, // llvm.amdgcn.ds.swizzle
   14909     33, // llvm.amdgcn.else
   14910     31, // llvm.amdgcn.else.break
   14911     33, // llvm.amdgcn.end.cf
   14912     3, // llvm.amdgcn.exp
   14913     3, // llvm.amdgcn.exp.compr
   14914     31, // llvm.amdgcn.fcmp
   14915     4, // llvm.amdgcn.fdiv.fast
   14916     4, // llvm.amdgcn.fmed3
   14917     4, // llvm.amdgcn.fmul.legacy
   14918     4, // llvm.amdgcn.fract
   14919     4, // llvm.amdgcn.frexp.exp
   14920     4, // llvm.amdgcn.frexp.mant
   14921     4, // llvm.amdgcn.groupstaticsize
   14922     31, // llvm.amdgcn.icmp
   14923     33, // llvm.amdgcn.if
   14924     31, // llvm.amdgcn.if.break
   14925     3, // llvm.amdgcn.image.atomic.add
   14926     3, // llvm.amdgcn.image.atomic.and
   14927     3, // llvm.amdgcn.image.atomic.cmpswap
   14928     3, // llvm.amdgcn.image.atomic.dec
   14929     3, // llvm.amdgcn.image.atomic.inc
   14930     3, // llvm.amdgcn.image.atomic.or
   14931     3, // llvm.amdgcn.image.atomic.smax
   14932     3, // llvm.amdgcn.image.atomic.smin
   14933     3, // llvm.amdgcn.image.atomic.sub
   14934     3, // llvm.amdgcn.image.atomic.swap
   14935     3, // llvm.amdgcn.image.atomic.umax
   14936     3, // llvm.amdgcn.image.atomic.umin
   14937     3, // llvm.amdgcn.image.atomic.xor
   14938     16, // llvm.amdgcn.image.gather4
   14939     16, // llvm.amdgcn.image.gather4.b
   14940     16, // llvm.amdgcn.image.gather4.b.cl
   14941     16, // llvm.amdgcn.image.gather4.b.cl.o
   14942     16, // llvm.amdgcn.image.gather4.b.o
   14943     16, // llvm.amdgcn.image.gather4.c
   14944     16, // llvm.amdgcn.image.gather4.c.b
   14945     16, // llvm.amdgcn.image.gather4.c.b.cl
   14946     16, // llvm.amdgcn.image.gather4.c.b.cl.o
   14947     16, // llvm.amdgcn.image.gather4.c.b.o
   14948     16, // llvm.amdgcn.image.gather4.c.cl
   14949     16, // llvm.amdgcn.image.gather4.c.cl.o
   14950     16, // llvm.amdgcn.image.gather4.c.l
   14951     16, // llvm.amdgcn.image.gather4.c.l.o
   14952     16, // llvm.amdgcn.image.gather4.c.lz
   14953     16, // llvm.amdgcn.image.gather4.c.lz.o
   14954     16, // llvm.amdgcn.image.gather4.c.o
   14955     16, // llvm.amdgcn.image.gather4.cl
   14956     16, // llvm.amdgcn.image.gather4.cl.o
   14957     16, // llvm.amdgcn.image.gather4.l
   14958     16, // llvm.amdgcn.image.gather4.l.o
   14959     16, // llvm.amdgcn.image.gather4.lz
   14960     16, // llvm.amdgcn.image.gather4.lz.o
   14961     16, // llvm.amdgcn.image.gather4.o
   14962     16, // llvm.amdgcn.image.getlod
   14963     16, // llvm.amdgcn.image.getresinfo
   14964     16, // llvm.amdgcn.image.load
   14965     16, // llvm.amdgcn.image.load.mip
   14966     16, // llvm.amdgcn.image.sample
   14967     16, // llvm.amdgcn.image.sample.b
   14968     16, // llvm.amdgcn.image.sample.b.cl
   14969     16, // llvm.amdgcn.image.sample.b.cl.o
   14970     16, // llvm.amdgcn.image.sample.b.o
   14971     16, // llvm.amdgcn.image.sample.c
   14972     16, // llvm.amdgcn.image.sample.c.b
   14973     16, // llvm.amdgcn.image.sample.c.b.cl
   14974     16, // llvm.amdgcn.image.sample.c.b.cl.o
   14975     16, // llvm.amdgcn.image.sample.c.b.o
   14976     16, // llvm.amdgcn.image.sample.c.cd
   14977     16, // llvm.amdgcn.image.sample.c.cd.cl
   14978     16, // llvm.amdgcn.image.sample.c.cd.cl.o
   14979     16, // llvm.amdgcn.image.sample.c.cd.o
   14980     16, // llvm.amdgcn.image.sample.c.cl
   14981     16, // llvm.amdgcn.image.sample.c.cl.o
   14982     16, // llvm.amdgcn.image.sample.c.d
   14983     16, // llvm.amdgcn.image.sample.c.d.cl
   14984     16, // llvm.amdgcn.image.sample.c.d.cl.o
   14985     16, // llvm.amdgcn.image.sample.c.d.o
   14986     16, // llvm.amdgcn.image.sample.c.l
   14987     16, // llvm.amdgcn.image.sample.c.l.o
   14988     16, // llvm.amdgcn.image.sample.c.lz
   14989     16, // llvm.amdgcn.image.sample.c.lz.o
   14990     16, // llvm.amdgcn.image.sample.c.o
   14991     16, // llvm.amdgcn.image.sample.cd
   14992     16, // llvm.amdgcn.image.sample.cd.cl
   14993     16, // llvm.amdgcn.image.sample.cd.cl.o
   14994     16, // llvm.amdgcn.image.sample.cd.o
   14995     16, // llvm.amdgcn.image.sample.cl
   14996     16, // llvm.amdgcn.image.sample.cl.o
   14997     16, // llvm.amdgcn.image.sample.d
   14998     16, // llvm.amdgcn.image.sample.d.cl
   14999     16, // llvm.amdgcn.image.sample.d.cl.o
   15000     16, // llvm.amdgcn.image.sample.d.o
   15001     16, // llvm.amdgcn.image.sample.l
   15002     16, // llvm.amdgcn.image.sample.l.o
   15003     16, // llvm.amdgcn.image.sample.lz
   15004     16, // llvm.amdgcn.image.sample.lz.o
   15005     16, // llvm.amdgcn.image.sample.o
   15006     3, // llvm.amdgcn.image.store
   15007     3, // llvm.amdgcn.image.store.mip
   15008     4, // llvm.amdgcn.implicit.buffer.ptr
   15009     4, // llvm.amdgcn.implicitarg.ptr
   15010     33, // llvm.amdgcn.init.exec
   15011     33, // llvm.amdgcn.init.exec.from.input
   15012     4, // llvm.amdgcn.interp.mov
   15013     4, // llvm.amdgcn.interp.p1
   15014     4, // llvm.amdgcn.interp.p2
   15015     4, // llvm.amdgcn.kernarg.segment.ptr
   15016     4, // llvm.amdgcn.ldexp
   15017     4, // llvm.amdgcn.lerp
   15018     4, // llvm.amdgcn.log.clamp
   15019     33, // llvm.amdgcn.loop
   15020     1, // llvm.amdgcn.mbcnt.hi
   15021     1, // llvm.amdgcn.mbcnt.lo
   15022     31, // llvm.amdgcn.mov.dpp
   15023     4, // llvm.amdgcn.mqsad.pk.u16.u8
   15024     4, // llvm.amdgcn.mqsad.u32.u8
   15025     4, // llvm.amdgcn.msad.u8
   15026     1, // llvm.amdgcn.ps.live
   15027     4, // llvm.amdgcn.qsad.pk.u16.u8
   15028     4, // llvm.amdgcn.queue.ptr
   15029     4, // llvm.amdgcn.rcp
   15030     4, // llvm.amdgcn.rcp.legacy
   15031     31, // llvm.amdgcn.readfirstlane
   15032     31, // llvm.amdgcn.readlane
   15033     4, // llvm.amdgcn.rsq
   15034     4, // llvm.amdgcn.rsq.clamp
   15035     4, // llvm.amdgcn.rsq.legacy
   15036     33, // llvm.amdgcn.s.barrier
   15037     3, // llvm.amdgcn.s.dcache.inv
   15038     3, // llvm.amdgcn.s.dcache.inv.vol
   15039     3, // llvm.amdgcn.s.dcache.wb
   15040     3, // llvm.amdgcn.s.dcache.wb.vol
   15041     3, // llvm.amdgcn.s.decperflevel
   15042     4, // llvm.amdgcn.s.getpc
   15043     34, // llvm.amdgcn.s.getreg
   15044     3, // llvm.amdgcn.s.incperflevel
   15045     3, // llvm.amdgcn.s.memrealtime
   15046     3, // llvm.amdgcn.s.memtime
   15047     3, // llvm.amdgcn.s.sendmsg
   15048     3, // llvm.amdgcn.s.sendmsghalt
   15049     3, // llvm.amdgcn.s.sleep
   15050     3, // llvm.amdgcn.s.waitcnt
   15051     4, // llvm.amdgcn.sad.hi.u8
   15052     4, // llvm.amdgcn.sad.u16
   15053     4, // llvm.amdgcn.sad.u8
   15054     4, // llvm.amdgcn.sbfe
   15055     31, // llvm.amdgcn.set.inactive
   15056     4, // llvm.amdgcn.sffbh
   15057     4, // llvm.amdgcn.sin
   15058     3, // llvm.amdgcn.tbuffer.load
   15059     3, // llvm.amdgcn.tbuffer.store
   15060     4, // llvm.amdgcn.trig.preop
   15061     4, // llvm.amdgcn.ubfe
   15062     33, // llvm.amdgcn.unreachable
   15063     31, // llvm.amdgcn.update.dpp
   15064     33, // llvm.amdgcn.wave.barrier
   15065     4, // llvm.amdgcn.workgroup.id.x
   15066     4, // llvm.amdgcn.workgroup.id.y
   15067     4, // llvm.amdgcn.workgroup.id.z
   15068     4, // llvm.amdgcn.workitem.id.x
   15069     4, // llvm.amdgcn.workitem.id.y
   15070     4, // llvm.amdgcn.workitem.id.z
   15071     4, // llvm.amdgcn.wqm
   15072     4, // llvm.amdgcn.wwm
   15073     3, // llvm.arm.cdp
   15074     3, // llvm.arm.cdp2
   15075     3, // llvm.arm.clrex
   15076     1, // llvm.arm.crc32b
   15077     1, // llvm.arm.crc32cb
   15078     1, // llvm.arm.crc32ch
   15079     1, // llvm.arm.crc32cw
   15080     1, // llvm.arm.crc32h
   15081     1, // llvm.arm.crc32w
   15082     3, // llvm.arm.dbg
   15083     3, // llvm.arm.dmb
   15084     3, // llvm.arm.dsb
   15085     3, // llvm.arm.get.fpscr
   15086     3, // llvm.arm.hint
   15087     3, // llvm.arm.isb
   15088     3, // llvm.arm.ldaex
   15089     3, // llvm.arm.ldaexd
   15090     3, // llvm.arm.ldc
   15091     3, // llvm.arm.ldc2
   15092     3, // llvm.arm.ldc2l
   15093     3, // llvm.arm.ldcl
   15094     3, // llvm.arm.ldrex
   15095     3, // llvm.arm.ldrexd
   15096     3, // llvm.arm.mcr
   15097     3, // llvm.arm.mcr2
   15098     3, // llvm.arm.mcrr
   15099     3, // llvm.arm.mcrr2
   15100     3, // llvm.arm.mrc
   15101     3, // llvm.arm.mrc2
   15102     3, // llvm.arm.mrrc
   15103     3, // llvm.arm.mrrc2
   15104     1, // llvm.arm.neon.aesd
   15105     1, // llvm.arm.neon.aese
   15106     1, // llvm.arm.neon.aesimc
   15107     1, // llvm.arm.neon.aesmc
   15108     1, // llvm.arm.neon.sha1c
   15109     1, // llvm.arm.neon.sha1h
   15110     1, // llvm.arm.neon.sha1m
   15111     1, // llvm.arm.neon.sha1p
   15112     1, // llvm.arm.neon.sha1su0
   15113     1, // llvm.arm.neon.sha1su1
   15114     1, // llvm.arm.neon.sha256h
   15115     1, // llvm.arm.neon.sha256h2
   15116     1, // llvm.arm.neon.sha256su0
   15117     1, // llvm.arm.neon.sha256su1
   15118     1, // llvm.arm.neon.vabds
   15119     1, // llvm.arm.neon.vabdu
   15120     1, // llvm.arm.neon.vabs
   15121     1, // llvm.arm.neon.vacge
   15122     1, // llvm.arm.neon.vacgt
   15123     1, // llvm.arm.neon.vbsl
   15124     1, // llvm.arm.neon.vcls
   15125     1, // llvm.arm.neon.vcvtas
   15126     1, // llvm.arm.neon.vcvtau
   15127     1, // llvm.arm.neon.vcvtfp2fxs
   15128     1, // llvm.arm.neon.vcvtfp2fxu
   15129     1, // llvm.arm.neon.vcvtfp2hf
   15130     1, // llvm.arm.neon.vcvtfxs2fp
   15131     1, // llvm.arm.neon.vcvtfxu2fp
   15132     1, // llvm.arm.neon.vcvthf2fp
   15133     1, // llvm.arm.neon.vcvtms
   15134     1, // llvm.arm.neon.vcvtmu
   15135     1, // llvm.arm.neon.vcvtns
   15136     1, // llvm.arm.neon.vcvtnu
   15137     1, // llvm.arm.neon.vcvtps
   15138     1, // llvm.arm.neon.vcvtpu
   15139     1, // llvm.arm.neon.vhadds
   15140     1, // llvm.arm.neon.vhaddu
   15141     1, // llvm.arm.neon.vhsubs
   15142     1, // llvm.arm.neon.vhsubu
   15143     2, // llvm.arm.neon.vld1
   15144     2, // llvm.arm.neon.vld2
   15145     2, // llvm.arm.neon.vld2lane
   15146     2, // llvm.arm.neon.vld3
   15147     2, // llvm.arm.neon.vld3lane
   15148     2, // llvm.arm.neon.vld4
   15149     2, // llvm.arm.neon.vld4lane
   15150     1, // llvm.arm.neon.vmaxnm
   15151     1, // llvm.arm.neon.vmaxs
   15152     1, // llvm.arm.neon.vmaxu
   15153     1, // llvm.arm.neon.vminnm
   15154     1, // llvm.arm.neon.vmins
   15155     1, // llvm.arm.neon.vminu
   15156     1, // llvm.arm.neon.vmullp
   15157     1, // llvm.arm.neon.vmulls
   15158     1, // llvm.arm.neon.vmullu
   15159     1, // llvm.arm.neon.vmulp
   15160     1, // llvm.arm.neon.vpadals
   15161     1, // llvm.arm.neon.vpadalu
   15162     1, // llvm.arm.neon.vpadd
   15163     1, // llvm.arm.neon.vpaddls
   15164     1, // llvm.arm.neon.vpaddlu
   15165     1, // llvm.arm.neon.vpmaxs
   15166     1, // llvm.arm.neon.vpmaxu
   15167     1, // llvm.arm.neon.vpmins
   15168     1, // llvm.arm.neon.vpminu
   15169     1, // llvm.arm.neon.vqabs
   15170     1, // llvm.arm.neon.vqadds
   15171     1, // llvm.arm.neon.vqaddu
   15172     1, // llvm.arm.neon.vqdmulh
   15173     1, // llvm.arm.neon.vqdmull
   15174     1, // llvm.arm.neon.vqmovns
   15175     1, // llvm.arm.neon.vqmovnsu
   15176     1, // llvm.arm.neon.vqmovnu
   15177     1, // llvm.arm.neon.vqneg
   15178     1, // llvm.arm.neon.vqrdmulh
   15179     1, // llvm.arm.neon.vqrshiftns
   15180     1, // llvm.arm.neon.vqrshiftnsu
   15181     1, // llvm.arm.neon.vqrshiftnu
   15182     1, // llvm.arm.neon.vqrshifts
   15183     1, // llvm.arm.neon.vqrshiftu
   15184     1, // llvm.arm.neon.vqshiftns
   15185     1, // llvm.arm.neon.vqshiftnsu
   15186     1, // llvm.arm.neon.vqshiftnu
   15187     1, // llvm.arm.neon.vqshifts
   15188     1, // llvm.arm.neon.vqshiftsu
   15189     1, // llvm.arm.neon.vqshiftu
   15190     1, // llvm.arm.neon.vqsubs
   15191     1, // llvm.arm.neon.vqsubu
   15192     1, // llvm.arm.neon.vraddhn
   15193     1, // llvm.arm.neon.vrecpe
   15194     1, // llvm.arm.neon.vrecps
   15195     1, // llvm.arm.neon.vrhadds
   15196     1, // llvm.arm.neon.vrhaddu
   15197     1, // llvm.arm.neon.vrinta
   15198     1, // llvm.arm.neon.vrintm
   15199     1, // llvm.arm.neon.vrintn
   15200     1, // llvm.arm.neon.vrintp
   15201     1, // llvm.arm.neon.vrintx
   15202     1, // llvm.arm.neon.vrintz
   15203     1, // llvm.arm.neon.vrshiftn
   15204     1, // llvm.arm.neon.vrshifts
   15205     1, // llvm.arm.neon.vrshiftu
   15206     1, // llvm.arm.neon.vrsqrte
   15207     1, // llvm.arm.neon.vrsqrts
   15208     1, // llvm.arm.neon.vrsubhn
   15209     1, // llvm.arm.neon.vshiftins
   15210     1, // llvm.arm.neon.vshifts
   15211     1, // llvm.arm.neon.vshiftu
   15212     21, // llvm.arm.neon.vst1
   15213     21, // llvm.arm.neon.vst2
   15214     21, // llvm.arm.neon.vst2lane
   15215     21, // llvm.arm.neon.vst3
   15216     21, // llvm.arm.neon.vst3lane
   15217     21, // llvm.arm.neon.vst4
   15218     21, // llvm.arm.neon.vst4lane
   15219     1, // llvm.arm.neon.vtbl1
   15220     1, // llvm.arm.neon.vtbl2
   15221     1, // llvm.arm.neon.vtbl3
   15222     1, // llvm.arm.neon.vtbl4
   15223     1, // llvm.arm.neon.vtbx1
   15224     1, // llvm.arm.neon.vtbx2
   15225     1, // llvm.arm.neon.vtbx3
   15226     1, // llvm.arm.neon.vtbx4
   15227     1, // llvm.arm.qadd
   15228     1, // llvm.arm.qadd16
   15229     1, // llvm.arm.qadd8
   15230     1, // llvm.arm.qasx
   15231     1, // llvm.arm.qsax
   15232     1, // llvm.arm.qsub
   15233     1, // llvm.arm.qsub16
   15234     1, // llvm.arm.qsub8
   15235     3, // llvm.arm.sadd16
   15236     3, // llvm.arm.sadd8
   15237     3, // llvm.arm.sasx
   15238     16, // llvm.arm.sel
   15239     3, // llvm.arm.set.fpscr
   15240     1, // llvm.arm.shadd16
   15241     1, // llvm.arm.shadd8
   15242     1, // llvm.arm.shasx
   15243     1, // llvm.arm.shsax
   15244     1, // llvm.arm.shsub16
   15245     1, // llvm.arm.shsub8
   15246     1, // llvm.arm.smlabb
   15247     1, // llvm.arm.smlabt
   15248     1, // llvm.arm.smlad
   15249     1, // llvm.arm.smladx
   15250     1, // llvm.arm.smlald
   15251     1, // llvm.arm.smlaldx
   15252     1, // llvm.arm.smlatb
   15253     1, // llvm.arm.smlatt
   15254     1, // llvm.arm.smlawb
   15255     1, // llvm.arm.smlawt
   15256     1, // llvm.arm.smlsd
   15257     1, // llvm.arm.smlsdx
   15258     1, // llvm.arm.smlsld
   15259     1, // llvm.arm.smlsldx
   15260     1, // llvm.arm.smuad
   15261     1, // llvm.arm.smuadx
   15262     1, // llvm.arm.smulbb
   15263     1, // llvm.arm.smulbt
   15264     1, // llvm.arm.smultb
   15265     1, // llvm.arm.smultt
   15266     1, // llvm.arm.smulwb
   15267     1, // llvm.arm.smulwt
   15268     1, // llvm.arm.smusd
   15269     1, // llvm.arm.smusdx
   15270     3, // llvm.arm.space
   15271     1, // llvm.arm.ssat
   15272     1, // llvm.arm.ssat16
   15273     3, // llvm.arm.ssax
   15274     3, // llvm.arm.ssub16
   15275     3, // llvm.arm.ssub8
   15276     3, // llvm.arm.stc
   15277     3, // llvm.arm.stc2
   15278     3, // llvm.arm.stc2l
   15279     3, // llvm.arm.stcl
   15280     3, // llvm.arm.stlex
   15281     3, // llvm.arm.stlexd
   15282     3, // llvm.arm.strex
   15283     3, // llvm.arm.strexd
   15284     1, // llvm.arm.sxtab16
   15285     1, // llvm.arm.sxtb16
   15286     3, // llvm.arm.uadd16
   15287     3, // llvm.arm.uadd8
   15288     3, // llvm.arm.uasx
   15289     1, // llvm.arm.uhadd16
   15290     1, // llvm.arm.uhadd8
   15291     1, // llvm.arm.uhasx
   15292     1, // llvm.arm.uhsax
   15293     1, // llvm.arm.uhsub16
   15294     1, // llvm.arm.uhsub8
   15295     3, // llvm.arm.undefined
   15296     1, // llvm.arm.uqadd16
   15297     1, // llvm.arm.uqadd8
   15298     1, // llvm.arm.uqasx
   15299     1, // llvm.arm.uqsax
   15300     1, // llvm.arm.uqsub16
   15301     1, // llvm.arm.uqsub8
   15302     1, // llvm.arm.usad8
   15303     1, // llvm.arm.usada8
   15304     1, // llvm.arm.usat
   15305     1, // llvm.arm.usat16
   15306     3, // llvm.arm.usax
   15307     3, // llvm.arm.usub16
   15308     3, // llvm.arm.usub8
   15309     1, // llvm.arm.uxtab16
   15310     1, // llvm.arm.uxtb16
   15311     1, // llvm.arm.vcvtr
   15312     1, // llvm.arm.vcvtru
   15313     16, // llvm.bpf.load.byte
   15314     16, // llvm.bpf.load.half
   15315     16, // llvm.bpf.load.word
   15316     3, // llvm.bpf.pseudo
   15317     1, // llvm.hexagon.A2.abs
   15318     1, // llvm.hexagon.A2.absp
   15319     1, // llvm.hexagon.A2.abssat
   15320     1, // llvm.hexagon.A2.add
   15321     1, // llvm.hexagon.A2.addh.h16.hh
   15322     1, // llvm.hexagon.A2.addh.h16.hl
   15323     1, // llvm.hexagon.A2.addh.h16.lh
   15324     1, // llvm.hexagon.A2.addh.h16.ll
   15325     1, // llvm.hexagon.A2.addh.h16.sat.hh
   15326     1, // llvm.hexagon.A2.addh.h16.sat.hl
   15327     1, // llvm.hexagon.A2.addh.h16.sat.lh
   15328     1, // llvm.hexagon.A2.addh.h16.sat.ll
   15329     1, // llvm.hexagon.A2.addh.l16.hl
   15330     1, // llvm.hexagon.A2.addh.l16.ll
   15331     1, // llvm.hexagon.A2.addh.l16.sat.hl
   15332     1, // llvm.hexagon.A2.addh.l16.sat.ll
   15333     1, // llvm.hexagon.A2.addi
   15334     1, // llvm.hexagon.A2.addp
   15335     1, // llvm.hexagon.A2.addpsat
   15336     1, // llvm.hexagon.A2.addsat
   15337     1, // llvm.hexagon.A2.addsp
   15338     1, // llvm.hexagon.A2.and
   15339     1, // llvm.hexagon.A2.andir
   15340     1, // llvm.hexagon.A2.andp
   15341     1, // llvm.hexagon.A2.aslh
   15342     1, // llvm.hexagon.A2.asrh
   15343     1, // llvm.hexagon.A2.combine.hh
   15344     1, // llvm.hexagon.A2.combine.hl
   15345     1, // llvm.hexagon.A2.combine.lh
   15346     1, // llvm.hexagon.A2.combine.ll
   15347     1, // llvm.hexagon.A2.combineii
   15348     1, // llvm.hexagon.A2.combinew
   15349     1, // llvm.hexagon.A2.max
   15350     1, // llvm.hexagon.A2.maxp
   15351     1, // llvm.hexagon.A2.maxu
   15352     1, // llvm.hexagon.A2.maxup
   15353     1, // llvm.hexagon.A2.min
   15354     1, // llvm.hexagon.A2.minp
   15355     1, // llvm.hexagon.A2.minu
   15356     1, // llvm.hexagon.A2.minup
   15357     1, // llvm.hexagon.A2.neg
   15358     1, // llvm.hexagon.A2.negp
   15359     1, // llvm.hexagon.A2.negsat
   15360     1, // llvm.hexagon.A2.not
   15361     1, // llvm.hexagon.A2.notp
   15362     1, // llvm.hexagon.A2.or
   15363     1, // llvm.hexagon.A2.orir
   15364     1, // llvm.hexagon.A2.orp
   15365     1, // llvm.hexagon.A2.roundsat
   15366     1, // llvm.hexagon.A2.sat
   15367     1, // llvm.hexagon.A2.satb
   15368     1, // llvm.hexagon.A2.sath
   15369     1, // llvm.hexagon.A2.satub
   15370     1, // llvm.hexagon.A2.satuh
   15371     1, // llvm.hexagon.A2.sub
   15372     1, // llvm.hexagon.A2.subh.h16.hh
   15373     1, // llvm.hexagon.A2.subh.h16.hl
   15374     1, // llvm.hexagon.A2.subh.h16.lh
   15375     1, // llvm.hexagon.A2.subh.h16.ll
   15376     1, // llvm.hexagon.A2.subh.h16.sat.hh
   15377     1, // llvm.hexagon.A2.subh.h16.sat.hl
   15378     1, // llvm.hexagon.A2.subh.h16.sat.lh
   15379     1, // llvm.hexagon.A2.subh.h16.sat.ll
   15380     1, // llvm.hexagon.A2.subh.l16.hl
   15381     1, // llvm.hexagon.A2.subh.l16.ll
   15382     1, // llvm.hexagon.A2.subh.l16.sat.hl
   15383     1, // llvm.hexagon.A2.subh.l16.sat.ll
   15384     1, // llvm.hexagon.A2.subp
   15385     1, // llvm.hexagon.A2.subri
   15386     1, // llvm.hexagon.A2.subsat
   15387     1, // llvm.hexagon.A2.svaddh
   15388     1, // llvm.hexagon.A2.svaddhs
   15389     1, // llvm.hexagon.A2.svadduhs
   15390     1, // llvm.hexagon.A2.svavgh
   15391     1, // llvm.hexagon.A2.svavghs
   15392     1, // llvm.hexagon.A2.svnavgh
   15393     1, // llvm.hexagon.A2.svsubh
   15394     1, // llvm.hexagon.A2.svsubhs
   15395     1, // llvm.hexagon.A2.svsubuhs
   15396     1, // llvm.hexagon.A2.swiz
   15397     1, // llvm.hexagon.A2.sxtb
   15398     1, // llvm.hexagon.A2.sxth
   15399     1, // llvm.hexagon.A2.sxtw
   15400     1, // llvm.hexagon.A2.tfr
   15401     1, // llvm.hexagon.A2.tfrih
   15402     1, // llvm.hexagon.A2.tfril
   15403     1, // llvm.hexagon.A2.tfrp
   15404     1, // llvm.hexagon.A2.tfrpi
   15405     1, // llvm.hexagon.A2.tfrsi
   15406     1, // llvm.hexagon.A2.vabsh
   15407     1, // llvm.hexagon.A2.vabshsat
   15408     1, // llvm.hexagon.A2.vabsw
   15409     1, // llvm.hexagon.A2.vabswsat
   15410     1, // llvm.hexagon.A2.vaddb.map
   15411     1, // llvm.hexagon.A2.vaddh
   15412     1, // llvm.hexagon.A2.vaddhs
   15413     1, // llvm.hexagon.A2.vaddub
   15414     1, // llvm.hexagon.A2.vaddubs
   15415     1, // llvm.hexagon.A2.vadduhs
   15416     1, // llvm.hexagon.A2.vaddw
   15417     1, // llvm.hexagon.A2.vaddws
   15418     1, // llvm.hexagon.A2.vavgh
   15419     1, // llvm.hexagon.A2.vavghcr
   15420     1, // llvm.hexagon.A2.vavghr
   15421     1, // llvm.hexagon.A2.vavgub
   15422     1, // llvm.hexagon.A2.vavgubr
   15423     1, // llvm.hexagon.A2.vavguh
   15424     1, // llvm.hexagon.A2.vavguhr
   15425     1, // llvm.hexagon.A2.vavguw
   15426     1, // llvm.hexagon.A2.vavguwr
   15427     1, // llvm.hexagon.A2.vavgw
   15428     1, // llvm.hexagon.A2.vavgwcr
   15429     1, // llvm.hexagon.A2.vavgwr
   15430     1, // llvm.hexagon.A2.vcmpbeq
   15431     1, // llvm.hexagon.A2.vcmpbgtu
   15432     1, // llvm.hexagon.A2.vcmpheq
   15433     1, // llvm.hexagon.A2.vcmphgt
   15434     1, // llvm.hexagon.A2.vcmphgtu
   15435     1, // llvm.hexagon.A2.vcmpweq
   15436     1, // llvm.hexagon.A2.vcmpwgt
   15437     1, // llvm.hexagon.A2.vcmpwgtu
   15438     1, // llvm.hexagon.A2.vconj
   15439     1, // llvm.hexagon.A2.vmaxb
   15440     1, // llvm.hexagon.A2.vmaxh
   15441     1, // llvm.hexagon.A2.vmaxub
   15442     1, // llvm.hexagon.A2.vmaxuh
   15443     1, // llvm.hexagon.A2.vmaxuw
   15444     1, // llvm.hexagon.A2.vmaxw
   15445     1, // llvm.hexagon.A2.vminb
   15446     1, // llvm.hexagon.A2.vminh
   15447     1, // llvm.hexagon.A2.vminub
   15448     1, // llvm.hexagon.A2.vminuh
   15449     1, // llvm.hexagon.A2.vminuw
   15450     1, // llvm.hexagon.A2.vminw
   15451     1, // llvm.hexagon.A2.vnavgh
   15452     1, // llvm.hexagon.A2.vnavghcr
   15453     1, // llvm.hexagon.A2.vnavghr
   15454     1, // llvm.hexagon.A2.vnavgw
   15455     1, // llvm.hexagon.A2.vnavgwcr
   15456     1, // llvm.hexagon.A2.vnavgwr
   15457     1, // llvm.hexagon.A2.vraddub
   15458     1, // llvm.hexagon.A2.vraddub.acc
   15459     1, // llvm.hexagon.A2.vrsadub
   15460     1, // llvm.hexagon.A2.vrsadub.acc
   15461     1, // llvm.hexagon.A2.vsubb.map
   15462     1, // llvm.hexagon.A2.vsubh
   15463     1, // llvm.hexagon.A2.vsubhs
   15464     1, // llvm.hexagon.A2.vsubub
   15465     1, // llvm.hexagon.A2.vsububs
   15466     1, // llvm.hexagon.A2.vsubuhs
   15467     1, // llvm.hexagon.A2.vsubw
   15468     1, // llvm.hexagon.A2.vsubws
   15469     1, // llvm.hexagon.A2.xor
   15470     1, // llvm.hexagon.A2.xorp
   15471     1, // llvm.hexagon.A2.zxtb
   15472     1, // llvm.hexagon.A2.zxth
   15473     1, // llvm.hexagon.A4.andn
   15474     1, // llvm.hexagon.A4.andnp
   15475     1, // llvm.hexagon.A4.bitsplit
   15476     1, // llvm.hexagon.A4.bitspliti
   15477     1, // llvm.hexagon.A4.boundscheck
   15478     1, // llvm.hexagon.A4.cmpbeq
   15479     1, // llvm.hexagon.A4.cmpbeqi
   15480     1, // llvm.hexagon.A4.cmpbgt
   15481     1, // llvm.hexagon.A4.cmpbgti
   15482     1, // llvm.hexagon.A4.cmpbgtu
   15483     1, // llvm.hexagon.A4.cmpbgtui
   15484     1, // llvm.hexagon.A4.cmpheq
   15485     1, // llvm.hexagon.A4.cmpheqi
   15486     1, // llvm.hexagon.A4.cmphgt
   15487     1, // llvm.hexagon.A4.cmphgti
   15488     1, // llvm.hexagon.A4.cmphgtu
   15489     1, // llvm.hexagon.A4.cmphgtui
   15490     1, // llvm.hexagon.A4.combineir
   15491     1, // llvm.hexagon.A4.combineri
   15492     1, // llvm.hexagon.A4.cround.ri
   15493     1, // llvm.hexagon.A4.cround.rr
   15494     1, // llvm.hexagon.A4.modwrapu
   15495     1, // llvm.hexagon.A4.orn
   15496     1, // llvm.hexagon.A4.ornp
   15497     1, // llvm.hexagon.A4.rcmpeq
   15498     1, // llvm.hexagon.A4.rcmpeqi
   15499     1, // llvm.hexagon.A4.rcmpneq
   15500     1, // llvm.hexagon.A4.rcmpneqi
   15501     1, // llvm.hexagon.A4.round.ri
   15502     1, // llvm.hexagon.A4.round.ri.sat
   15503     1, // llvm.hexagon.A4.round.rr
   15504     1, // llvm.hexagon.A4.round.rr.sat
   15505     1, // llvm.hexagon.A4.tlbmatch
   15506     1, // llvm.hexagon.A4.vcmpbeq.any
   15507     1, // llvm.hexagon.A4.vcmpbeqi
   15508     1, // llvm.hexagon.A4.vcmpbgt
   15509     1, // llvm.hexagon.A4.vcmpbgti
   15510     1, // llvm.hexagon.A4.vcmpbgtui
   15511     1, // llvm.hexagon.A4.vcmpheqi
   15512     1, // llvm.hexagon.A4.vcmphgti
   15513     1, // llvm.hexagon.A4.vcmphgtui
   15514     1, // llvm.hexagon.A4.vcmpweqi
   15515     1, // llvm.hexagon.A4.vcmpwgti
   15516     1, // llvm.hexagon.A4.vcmpwgtui
   15517     1, // llvm.hexagon.A4.vrmaxh
   15518     1, // llvm.hexagon.A4.vrmaxuh
   15519     1, // llvm.hexagon.A4.vrmaxuw
   15520     1, // llvm.hexagon.A4.vrmaxw
   15521     1, // llvm.hexagon.A4.vrminh
   15522     1, // llvm.hexagon.A4.vrminuh
   15523     1, // llvm.hexagon.A4.vrminuw
   15524     1, // llvm.hexagon.A4.vrminw
   15525     1, // llvm.hexagon.A5.vaddhubs
   15526     1, // llvm.hexagon.C2.all8
   15527     1, // llvm.hexagon.C2.and
   15528     1, // llvm.hexagon.C2.andn
   15529     1, // llvm.hexagon.C2.any8
   15530     1, // llvm.hexagon.C2.bitsclr
   15531     1, // llvm.hexagon.C2.bitsclri
   15532     1, // llvm.hexagon.C2.bitsset
   15533     1, // llvm.hexagon.C2.cmpeq
   15534     1, // llvm.hexagon.C2.cmpeqi
   15535     1, // llvm.hexagon.C2.cmpeqp
   15536     1, // llvm.hexagon.C2.cmpgei
   15537     1, // llvm.hexagon.C2.cmpgeui
   15538     1, // llvm.hexagon.C2.cmpgt
   15539     1, // llvm.hexagon.C2.cmpgti
   15540     1, // llvm.hexagon.C2.cmpgtp
   15541     1, // llvm.hexagon.C2.cmpgtu
   15542     1, // llvm.hexagon.C2.cmpgtui
   15543     1, // llvm.hexagon.C2.cmpgtup
   15544     1, // llvm.hexagon.C2.cmplt
   15545     1, // llvm.hexagon.C2.cmpltu
   15546     1, // llvm.hexagon.C2.mask
   15547     1, // llvm.hexagon.C2.mux
   15548     1, // llvm.hexagon.C2.muxii
   15549     1, // llvm.hexagon.C2.muxir
   15550     1, // llvm.hexagon.C2.muxri
   15551     1, // llvm.hexagon.C2.not
   15552     1, // llvm.hexagon.C2.or
   15553     1, // llvm.hexagon.C2.orn
   15554     1, // llvm.hexagon.C2.pxfer.map
   15555     1, // llvm.hexagon.C2.tfrpr
   15556     1, // llvm.hexagon.C2.tfrrp
   15557     1, // llvm.hexagon.C2.vitpack
   15558     1, // llvm.hexagon.C2.vmux
   15559     1, // llvm.hexagon.C2.xor
   15560     1, // llvm.hexagon.C4.and.and
   15561     1, // llvm.hexagon.C4.and.andn
   15562     1, // llvm.hexagon.C4.and.or
   15563     1, // llvm.hexagon.C4.and.orn
   15564     1, // llvm.hexagon.C4.cmplte
   15565     1, // llvm.hexagon.C4.cmpltei
   15566     1, // llvm.hexagon.C4.cmplteu
   15567     1, // llvm.hexagon.C4.cmplteui
   15568     1, // llvm.hexagon.C4.cmpneq
   15569     1, // llvm.hexagon.C4.cmpneqi
   15570     1, // llvm.hexagon.C4.fastcorner9
   15571     1, // llvm.hexagon.C4.fastcorner9.not
   15572     1, // llvm.hexagon.C4.nbitsclr
   15573     1, // llvm.hexagon.C4.nbitsclri
   15574     1, // llvm.hexagon.C4.nbitsset
   15575     1, // llvm.hexagon.C4.or.and
   15576     1, // llvm.hexagon.C4.or.andn
   15577     1, // llvm.hexagon.C4.or.or
   15578     1, // llvm.hexagon.C4.or.orn
   15579     1, // llvm.hexagon.F2.conv.d2df
   15580     1, // llvm.hexagon.F2.conv.d2sf
   15581     1, // llvm.hexagon.F2.conv.df2d
   15582     1, // llvm.hexagon.F2.conv.df2d.chop
   15583     1, // llvm.hexagon.F2.conv.df2sf
   15584     1, // llvm.hexagon.F2.conv.df2ud
   15585     1, // llvm.hexagon.F2.conv.df2ud.chop
   15586     1, // llvm.hexagon.F2.conv.df2uw
   15587     1, // llvm.hexagon.F2.conv.df2uw.chop
   15588     1, // llvm.hexagon.F2.conv.df2w
   15589     1, // llvm.hexagon.F2.conv.df2w.chop
   15590     1, // llvm.hexagon.F2.conv.sf2d
   15591     1, // llvm.hexagon.F2.conv.sf2d.chop
   15592     1, // llvm.hexagon.F2.conv.sf2df
   15593     1, // llvm.hexagon.F2.conv.sf2ud
   15594     1, // llvm.hexagon.F2.conv.sf2ud.chop
   15595     1, // llvm.hexagon.F2.conv.sf2uw
   15596     1, // llvm.hexagon.F2.conv.sf2uw.chop
   15597     1, // llvm.hexagon.F2.conv.sf2w
   15598     1, // llvm.hexagon.F2.conv.sf2w.chop
   15599     1, // llvm.hexagon.F2.conv.ud2df
   15600     1, // llvm.hexagon.F2.conv.ud2sf
   15601     35, // llvm.hexagon.F2.conv.uw2df
   15602     35, // llvm.hexagon.F2.conv.uw2sf
   15603     35, // llvm.hexagon.F2.conv.w2df
   15604     35, // llvm.hexagon.F2.conv.w2sf
   15605     35, // llvm.hexagon.F2.dfclass
   15606     35, // llvm.hexagon.F2.dfcmpeq
   15607     35, // llvm.hexagon.F2.dfcmpge
   15608     35, // llvm.hexagon.F2.dfcmpgt
   15609     35, // llvm.hexagon.F2.dfcmpuo
   15610     35, // llvm.hexagon.F2.dfimm.n
   15611     35, // llvm.hexagon.F2.dfimm.p
   15612     35, // llvm.hexagon.F2.sfadd
   15613     35, // llvm.hexagon.F2.sfclass
   15614     35, // llvm.hexagon.F2.sfcmpeq
   15615     35, // llvm.hexagon.F2.sfcmpge
   15616     35, // llvm.hexagon.F2.sfcmpgt
   15617     35, // llvm.hexagon.F2.sfcmpuo
   15618     35, // llvm.hexagon.F2.sffixupd
   15619     35, // llvm.hexagon.F2.sffixupn
   15620     1, // llvm.hexagon.F2.sffixupr
   15621     35, // llvm.hexagon.F2.sffma
   15622     35, // llvm.hexagon.F2.sffma.lib
   15623     35, // llvm.hexagon.F2.sffma.sc
   15624     35, // llvm.hexagon.F2.sffms
   15625     35, // llvm.hexagon.F2.sffms.lib
   15626     35, // llvm.hexagon.F2.sfimm.n
   15627     35, // llvm.hexagon.F2.sfimm.p
   15628     35, // llvm.hexagon.F2.sfmax
   15629     35, // llvm.hexagon.F2.sfmin
   15630     35, // llvm.hexagon.F2.sfmpy
   15631     35, // llvm.hexagon.F2.sfsub
   15632     18, // llvm.hexagon.L2.loadw.locked
   15633     18, // llvm.hexagon.L4.loadd.locked
   15634     1, // llvm.hexagon.M2.acci
   15635     1, // llvm.hexagon.M2.accii
   15636     1, // llvm.hexagon.M2.cmaci.s0
   15637     1, // llvm.hexagon.M2.cmacr.s0
   15638     1, // llvm.hexagon.M2.cmacs.s0
   15639     1, // llvm.hexagon.M2.cmacs.s1
   15640     1, // llvm.hexagon.M2.cmacsc.s0
   15641     1, // llvm.hexagon.M2.cmacsc.s1
   15642     1, // llvm.hexagon.M2.cmpyi.s0
   15643     1, // llvm.hexagon.M2.cmpyr.s0
   15644     1, // llvm.hexagon.M2.cmpyrs.s0
   15645     1, // llvm.hexagon.M2.cmpyrs.s1
   15646     1, // llvm.hexagon.M2.cmpyrsc.s0
   15647     1, // llvm.hexagon.M2.cmpyrsc.s1
   15648     1, // llvm.hexagon.M2.cmpys.s0
   15649     1, // llvm.hexagon.M2.cmpys.s1
   15650     1, // llvm.hexagon.M2.cmpysc.s0
   15651     1, // llvm.hexagon.M2.cmpysc.s1
   15652     1, // llvm.hexagon.M2.cnacs.s0
   15653     1, // llvm.hexagon.M2.cnacs.s1
   15654     1, // llvm.hexagon.M2.cnacsc.s0
   15655     1, // llvm.hexagon.M2.cnacsc.s1
   15656     1, // llvm.hexagon.M2.dpmpyss.acc.s0
   15657     1, // llvm.hexagon.M2.dpmpyss.nac.s0
   15658     1, // llvm.hexagon.M2.dpmpyss.rnd.s0
   15659     1, // llvm.hexagon.M2.dpmpyss.s0
   15660     1, // llvm.hexagon.M2.dpmpyuu.acc.s0
   15661     1, // llvm.hexagon.M2.dpmpyuu.nac.s0
   15662     1, // llvm.hexagon.M2.dpmpyuu.s0
   15663     1, // llvm.hexagon.M2.hmmpyh.rs1
   15664     1, // llvm.hexagon.M2.hmmpyh.s1
   15665     1, // llvm.hexagon.M2.hmmpyl.rs1
   15666     1, // llvm.hexagon.M2.hmmpyl.s1
   15667     1, // llvm.hexagon.M2.maci
   15668     1, // llvm.hexagon.M2.macsin
   15669     1, // llvm.hexagon.M2.macsip
   15670     1, // llvm.hexagon.M2.mmachs.rs0
   15671     1, // llvm.hexagon.M2.mmachs.rs1
   15672     1, // llvm.hexagon.M2.mmachs.s0
   15673     1, // llvm.hexagon.M2.mmachs.s1
   15674     1, // llvm.hexagon.M2.mmacls.rs0
   15675     1, // llvm.hexagon.M2.mmacls.rs1
   15676     1, // llvm.hexagon.M2.mmacls.s0
   15677     1, // llvm.hexagon.M2.mmacls.s1
   15678     1, // llvm.hexagon.M2.mmacuhs.rs0
   15679     1, // llvm.hexagon.M2.mmacuhs.rs1
   15680     1, // llvm.hexagon.M2.mmacuhs.s0
   15681     1, // llvm.hexagon.M2.mmacuhs.s1
   15682     1, // llvm.hexagon.M2.mmaculs.rs0
   15683     1, // llvm.hexagon.M2.mmaculs.rs1
   15684     1, // llvm.hexagon.M2.mmaculs.s0
   15685     1, // llvm.hexagon.M2.mmaculs.s1
   15686     1, // llvm.hexagon.M2.mmpyh.rs0
   15687     1, // llvm.hexagon.M2.mmpyh.rs1
   15688     1, // llvm.hexagon.M2.mmpyh.s0
   15689     1, // llvm.hexagon.M2.mmpyh.s1
   15690     1, // llvm.hexagon.M2.mmpyl.rs0
   15691     1, // llvm.hexagon.M2.mmpyl.rs1
   15692     1, // llvm.hexagon.M2.mmpyl.s0
   15693     1, // llvm.hexagon.M2.mmpyl.s1
   15694     1, // llvm.hexagon.M2.mmpyuh.rs0
   15695     1, // llvm.hexagon.M2.mmpyuh.rs1
   15696     1, // llvm.hexagon.M2.mmpyuh.s0
   15697     1, // llvm.hexagon.M2.mmpyuh.s1
   15698     1, // llvm.hexagon.M2.mmpyul.rs0
   15699     1, // llvm.hexagon.M2.mmpyul.rs1
   15700     1, // llvm.hexagon.M2.mmpyul.s0
   15701     1, // llvm.hexagon.M2.mmpyul.s1
   15702     1, // llvm.hexagon.M2.mpy.acc.hh.s0
   15703     1, // llvm.hexagon.M2.mpy.acc.hh.s1
   15704     1, // llvm.hexagon.M2.mpy.acc.hl.s0
   15705     1, // llvm.hexagon.M2.mpy.acc.hl.s1
   15706     1, // llvm.hexagon.M2.mpy.acc.lh.s0
   15707     1, // llvm.hexagon.M2.mpy.acc.lh.s1
   15708     1, // llvm.hexagon.M2.mpy.acc.ll.s0
   15709     1, // llvm.hexagon.M2.mpy.acc.ll.s1
   15710     1, // llvm.hexagon.M2.mpy.acc.sat.hh.s0
   15711     1, // llvm.hexagon.M2.mpy.acc.sat.hh.s1
   15712     1, // llvm.hexagon.M2.mpy.acc.sat.hl.s0
   15713     1, // llvm.hexagon.M2.mpy.acc.sat.hl.s1
   15714     1, // llvm.hexagon.M2.mpy.acc.sat.lh.s0
   15715     1, // llvm.hexagon.M2.mpy.acc.sat.lh.s1
   15716     1, // llvm.hexagon.M2.mpy.acc.sat.ll.s0
   15717     1, // llvm.hexagon.M2.mpy.acc.sat.ll.s1
   15718     1, // llvm.hexagon.M2.mpy.hh.s0
   15719     1, // llvm.hexagon.M2.mpy.hh.s1
   15720     1, // llvm.hexagon.M2.mpy.hl.s0
   15721     1, // llvm.hexagon.M2.mpy.hl.s1
   15722     1, // llvm.hexagon.M2.mpy.lh.s0
   15723     1, // llvm.hexagon.M2.mpy.lh.s1
   15724     1, // llvm.hexagon.M2.mpy.ll.s0
   15725     1, // llvm.hexagon.M2.mpy.ll.s1
   15726     1, // llvm.hexagon.M2.mpy.nac.hh.s0
   15727     1, // llvm.hexagon.M2.mpy.nac.hh.s1
   15728     1, // llvm.hexagon.M2.mpy.nac.hl.s0
   15729     1, // llvm.hexagon.M2.mpy.nac.hl.s1
   15730     1, // llvm.hexagon.M2.mpy.nac.lh.s0
   15731     1, // llvm.hexagon.M2.mpy.nac.lh.s1
   15732     1, // llvm.hexagon.M2.mpy.nac.ll.s0
   15733     1, // llvm.hexagon.M2.mpy.nac.ll.s1
   15734     1, // llvm.hexagon.M2.mpy.nac.sat.hh.s0
   15735     1, // llvm.hexagon.M2.mpy.nac.sat.hh.s1
   15736     1, // llvm.hexagon.M2.mpy.nac.sat.hl.s0
   15737     1, // llvm.hexagon.M2.mpy.nac.sat.hl.s1
   15738     1, // llvm.hexagon.M2.mpy.nac.sat.lh.s0
   15739     1, // llvm.hexagon.M2.mpy.nac.sat.lh.s1
   15740     1, // llvm.hexagon.M2.mpy.nac.sat.ll.s0
   15741     1, // llvm.hexagon.M2.mpy.nac.sat.ll.s1
   15742     1, // llvm.hexagon.M2.mpy.rnd.hh.s0
   15743     1, // llvm.hexagon.M2.mpy.rnd.hh.s1
   15744     1, // llvm.hexagon.M2.mpy.rnd.hl.s0
   15745     1, // llvm.hexagon.M2.mpy.rnd.hl.s1
   15746     1, // llvm.hexagon.M2.mpy.rnd.lh.s0
   15747     1, // llvm.hexagon.M2.mpy.rnd.lh.s1
   15748     1, // llvm.hexagon.M2.mpy.rnd.ll.s0
   15749     1, // llvm.hexagon.M2.mpy.rnd.ll.s1
   15750     1, // llvm.hexagon.M2.mpy.sat.hh.s0
   15751     1, // llvm.hexagon.M2.mpy.sat.hh.s1
   15752     1, // llvm.hexagon.M2.mpy.sat.hl.s0
   15753     1, // llvm.hexagon.M2.mpy.sat.hl.s1
   15754     1, // llvm.hexagon.M2.mpy.sat.lh.s0
   15755     1, // llvm.hexagon.M2.mpy.sat.lh.s1
   15756     1, // llvm.hexagon.M2.mpy.sat.ll.s0
   15757     1, // llvm.hexagon.M2.mpy.sat.ll.s1
   15758     1, // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
   15759     1, // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
   15760     1, // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
   15761     1, // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
   15762     1, // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
   15763     1, // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
   15764     1, // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
   15765     1, // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
   15766     1, // llvm.hexagon.M2.mpy.up
   15767     1, // llvm.hexagon.M2.mpy.up.s1
   15768     1, // llvm.hexagon.M2.mpy.up.s1.sat
   15769     1, // llvm.hexagon.M2.mpyd.acc.hh.s0
   15770     1, // llvm.hexagon.M2.mpyd.acc.hh.s1
   15771     1, // llvm.hexagon.M2.mpyd.acc.hl.s0
   15772     1, // llvm.hexagon.M2.mpyd.acc.hl.s1
   15773     1, // llvm.hexagon.M2.mpyd.acc.lh.s0
   15774     1, // llvm.hexagon.M2.mpyd.acc.lh.s1
   15775     1, // llvm.hexagon.M2.mpyd.acc.ll.s0
   15776     1, // llvm.hexagon.M2.mpyd.acc.ll.s1
   15777     1, // llvm.hexagon.M2.mpyd.hh.s0
   15778     1, // llvm.hexagon.M2.mpyd.hh.s1
   15779     1, // llvm.hexagon.M2.mpyd.hl.s0
   15780     1, // llvm.hexagon.M2.mpyd.hl.s1
   15781     1, // llvm.hexagon.M2.mpyd.lh.s0
   15782     1, // llvm.hexagon.M2.mpyd.lh.s1
   15783     1, // llvm.hexagon.M2.mpyd.ll.s0
   15784     1, // llvm.hexagon.M2.mpyd.ll.s1
   15785     1, // llvm.hexagon.M2.mpyd.nac.hh.s0
   15786     1, // llvm.hexagon.M2.mpyd.nac.hh.s1
   15787     1, // llvm.hexagon.M2.mpyd.nac.hl.s0
   15788     1, // llvm.hexagon.M2.mpyd.nac.hl.s1
   15789     1, // llvm.hexagon.M2.mpyd.nac.lh.s0
   15790     1, // llvm.hexagon.M2.mpyd.nac.lh.s1
   15791     1, // llvm.hexagon.M2.mpyd.nac.ll.s0
   15792     1, // llvm.hexagon.M2.mpyd.nac.ll.s1
   15793     1, // llvm.hexagon.M2.mpyd.rnd.hh.s0
   15794     1, // llvm.hexagon.M2.mpyd.rnd.hh.s1
   15795     1, // llvm.hexagon.M2.mpyd.rnd.hl.s0
   15796     1, // llvm.hexagon.M2.mpyd.rnd.hl.s1
   15797     1, // llvm.hexagon.M2.mpyd.rnd.lh.s0
   15798     1, // llvm.hexagon.M2.mpyd.rnd.lh.s1
   15799     1, // llvm.hexagon.M2.mpyd.rnd.ll.s0
   15800     1, // llvm.hexagon.M2.mpyd.rnd.ll.s1
   15801     1, // llvm.hexagon.M2.mpyi
   15802     1, // llvm.hexagon.M2.mpysmi
   15803     1, // llvm.hexagon.M2.mpysu.up
   15804     1, // llvm.hexagon.M2.mpyu.acc.hh.s0
   15805     1, // llvm.hexagon.M2.mpyu.acc.hh.s1
   15806     1, // llvm.hexagon.M2.mpyu.acc.hl.s0
   15807     1, // llvm.hexagon.M2.mpyu.acc.hl.s1
   15808     1, // llvm.hexagon.M2.mpyu.acc.lh.s0
   15809     1, // llvm.hexagon.M2.mpyu.acc.lh.s1
   15810     1, // llvm.hexagon.M2.mpyu.acc.ll.s0
   15811     1, // llvm.hexagon.M2.mpyu.acc.ll.s1
   15812     1, // llvm.hexagon.M2.mpyu.hh.s0
   15813     1, // llvm.hexagon.M2.mpyu.hh.s1
   15814     1, // llvm.hexagon.M2.mpyu.hl.s0
   15815     1, // llvm.hexagon.M2.mpyu.hl.s1
   15816     1, // llvm.hexagon.M2.mpyu.lh.s0
   15817     1, // llvm.hexagon.M2.mpyu.lh.s1
   15818     1, // llvm.hexagon.M2.mpyu.ll.s0
   15819     1, // llvm.hexagon.M2.mpyu.ll.s1
   15820     1, // llvm.hexagon.M2.mpyu.nac.hh.s0
   15821     1, // llvm.hexagon.M2.mpyu.nac.hh.s1
   15822     1, // llvm.hexagon.M2.mpyu.nac.hl.s0
   15823     1, // llvm.hexagon.M2.mpyu.nac.hl.s1
   15824     1, // llvm.hexagon.M2.mpyu.nac.lh.s0
   15825     1, // llvm.hexagon.M2.mpyu.nac.lh.s1
   15826     1, // llvm.hexagon.M2.mpyu.nac.ll.s0
   15827     1, // llvm.hexagon.M2.mpyu.nac.ll.s1
   15828     1, // llvm.hexagon.M2.mpyu.up
   15829     1, // llvm.hexagon.M2.mpyud.acc.hh.s0
   15830     1, // llvm.hexagon.M2.mpyud.acc.hh.s1
   15831     1, // llvm.hexagon.M2.mpyud.acc.hl.s0
   15832     1, // llvm.hexagon.M2.mpyud.acc.hl.s1
   15833     1, // llvm.hexagon.M2.mpyud.acc.lh.s0
   15834     1, // llvm.hexagon.M2.mpyud.acc.lh.s1
   15835     1, // llvm.hexagon.M2.mpyud.acc.ll.s0
   15836     1, // llvm.hexagon.M2.mpyud.acc.ll.s1
   15837     1, // llvm.hexagon.M2.mpyud.hh.s0
   15838     1, // llvm.hexagon.M2.mpyud.hh.s1
   15839     1, // llvm.hexagon.M2.mpyud.hl.s0
   15840     1, // llvm.hexagon.M2.mpyud.hl.s1
   15841     1, // llvm.hexagon.M2.mpyud.lh.s0
   15842     1, // llvm.hexagon.M2.mpyud.lh.s1
   15843     1, // llvm.hexagon.M2.mpyud.ll.s0
   15844     1, // llvm.hexagon.M2.mpyud.ll.s1
   15845     1, // llvm.hexagon.M2.mpyud.nac.hh.s0
   15846     1, // llvm.hexagon.M2.mpyud.nac.hh.s1
   15847     1, // llvm.hexagon.M2.mpyud.nac.hl.s0
   15848     1, // llvm.hexagon.M2.mpyud.nac.hl.s1
   15849     1, // llvm.hexagon.M2.mpyud.nac.lh.s0
   15850     1, // llvm.hexagon.M2.mpyud.nac.lh.s1
   15851     1, // llvm.hexagon.M2.mpyud.nac.ll.s0
   15852     1, // llvm.hexagon.M2.mpyud.nac.ll.s1
   15853     1, // llvm.hexagon.M2.mpyui
   15854     1, // llvm.hexagon.M2.nacci
   15855     1, // llvm.hexagon.M2.naccii
   15856     1, // llvm.hexagon.M2.subacc
   15857     1, // llvm.hexagon.M2.vabsdiffh
   15858     1, // llvm.hexagon.M2.vabsdiffw
   15859     1, // llvm.hexagon.M2.vcmac.s0.sat.i
   15860     1, // llvm.hexagon.M2.vcmac.s0.sat.r
   15861     1, // llvm.hexagon.M2.vcmpy.s0.sat.i
   15862     1, // llvm.hexagon.M2.vcmpy.s0.sat.r
   15863     1, // llvm.hexagon.M2.vcmpy.s1.sat.i
   15864     1, // llvm.hexagon.M2.vcmpy.s1.sat.r
   15865     1, // llvm.hexagon.M2.vdmacs.s0
   15866     1, // llvm.hexagon.M2.vdmacs.s1
   15867     1, // llvm.hexagon.M2.vdmpyrs.s0
   15868     1, // llvm.hexagon.M2.vdmpyrs.s1
   15869     1, // llvm.hexagon.M2.vdmpys.s0
   15870     1, // llvm.hexagon.M2.vdmpys.s1
   15871     1, // llvm.hexagon.M2.vmac2
   15872     1, // llvm.hexagon.M2.vmac2es
   15873     1, // llvm.hexagon.M2.vmac2es.s0
   15874     1, // llvm.hexagon.M2.vmac2es.s1
   15875     1, // llvm.hexagon.M2.vmac2s.s0
   15876     1, // llvm.hexagon.M2.vmac2s.s1
   15877     1, // llvm.hexagon.M2.vmac2su.s0
   15878     1, // llvm.hexagon.M2.vmac2su.s1
   15879     1, // llvm.hexagon.M2.vmpy2es.s0
   15880     1, // llvm.hexagon.M2.vmpy2es.s1
   15881     1, // llvm.hexagon.M2.vmpy2s.s0
   15882     1, // llvm.hexagon.M2.vmpy2s.s0pack
   15883     1, // llvm.hexagon.M2.vmpy2s.s1
   15884     1, // llvm.hexagon.M2.vmpy2s.s1pack
   15885     1, // llvm.hexagon.M2.vmpy2su.s0
   15886     1, // llvm.hexagon.M2.vmpy2su.s1
   15887     1, // llvm.hexagon.M2.vraddh
   15888     1, // llvm.hexagon.M2.vradduh
   15889     1, // llvm.hexagon.M2.vrcmaci.s0
   15890     1, // llvm.hexagon.M2.vrcmaci.s0c
   15891     1, // llvm.hexagon.M2.vrcmacr.s0
   15892     1, // llvm.hexagon.M2.vrcmacr.s0c
   15893     1, // llvm.hexagon.M2.vrcmpyi.s0
   15894     1, // llvm.hexagon.M2.vrcmpyi.s0c
   15895     1, // llvm.hexagon.M2.vrcmpyr.s0
   15896     1, // llvm.hexagon.M2.vrcmpyr.s0c
   15897     1, // llvm.hexagon.M2.vrcmpys.acc.s1
   15898     1, // llvm.hexagon.M2.vrcmpys.s1
   15899     1, // llvm.hexagon.M2.vrcmpys.s1rp
   15900     1, // llvm.hexagon.M2.vrmac.s0
   15901     1, // llvm.hexagon.M2.vrmpy.s0
   15902     1, // llvm.hexagon.M2.xor.xacc
   15903     1, // llvm.hexagon.M4.and.and
   15904     1, // llvm.hexagon.M4.and.andn
   15905     1, // llvm.hexagon.M4.and.or
   15906     1, // llvm.hexagon.M4.and.xor
   15907     1, // llvm.hexagon.M4.cmpyi.wh
   15908     1, // llvm.hexagon.M4.cmpyi.whc
   15909     1, // llvm.hexagon.M4.cmpyr.wh
   15910     1, // llvm.hexagon.M4.cmpyr.whc
   15911     1, // llvm.hexagon.M4.mac.up.s1.sat
   15912     1, // llvm.hexagon.M4.mpyri.addi
   15913     1, // llvm.hexagon.M4.mpyri.addr
   15914     1, // llvm.hexagon.M4.mpyri.addr.u2
   15915     1, // llvm.hexagon.M4.mpyrr.addi
   15916     1, // llvm.hexagon.M4.mpyrr.addr
   15917     1, // llvm.hexagon.M4.nac.up.s1.sat
   15918     1, // llvm.hexagon.M4.or.and
   15919     1, // llvm.hexagon.M4.or.andn
   15920     1, // llvm.hexagon.M4.or.or
   15921     1, // llvm.hexagon.M4.or.xor
   15922     1, // llvm.hexagon.M4.pmpyw
   15923     1, // llvm.hexagon.M4.pmpyw.acc
   15924     1, // llvm.hexagon.M4.vpmpyh
   15925     1, // llvm.hexagon.M4.vpmpyh.acc
   15926     1, // llvm.hexagon.M4.vrmpyeh.acc.s0
   15927     1, // llvm.hexagon.M4.vrmpyeh.acc.s1
   15928     1, // llvm.hexagon.M4.vrmpyeh.s0
   15929     1, // llvm.hexagon.M4.vrmpyeh.s1
   15930     1, // llvm.hexagon.M4.vrmpyoh.acc.s0
   15931     1, // llvm.hexagon.M4.vrmpyoh.acc.s1
   15932     1, // llvm.hexagon.M4.vrmpyoh.s0
   15933     1, // llvm.hexagon.M4.vrmpyoh.s1
   15934     1, // llvm.hexagon.M4.xor.and
   15935     1, // llvm.hexagon.M4.xor.andn
   15936     1, // llvm.hexagon.M4.xor.or
   15937     1, // llvm.hexagon.M4.xor.xacc
   15938     1, // llvm.hexagon.M5.vdmacbsu
   15939     1, // llvm.hexagon.M5.vdmpybsu
   15940     1, // llvm.hexagon.M5.vmacbsu
   15941     1, // llvm.hexagon.M5.vmacbuu
   15942     1, // llvm.hexagon.M5.vmpybsu
   15943     1, // llvm.hexagon.M5.vmpybuu
   15944     1, // llvm.hexagon.M5.vrmacbsu
   15945     1, // llvm.hexagon.M5.vrmacbuu
   15946     1, // llvm.hexagon.M5.vrmpybsu
   15947     1, // llvm.hexagon.M5.vrmpybuu
   15948     1, // llvm.hexagon.M6.vabsdiffb
   15949     1, // llvm.hexagon.M6.vabsdiffub
   15950     1, // llvm.hexagon.S2.addasl.rrri
   15951     1, // llvm.hexagon.S2.asl.i.p
   15952     1, // llvm.hexagon.S2.asl.i.p.acc
   15953     1, // llvm.hexagon.S2.asl.i.p.and
   15954     1, // llvm.hexagon.S2.asl.i.p.nac
   15955     1, // llvm.hexagon.S2.asl.i.p.or
   15956     1, // llvm.hexagon.S2.asl.i.p.xacc
   15957     1, // llvm.hexagon.S2.asl.i.r
   15958     1, // llvm.hexagon.S2.asl.i.r.acc
   15959     1, // llvm.hexagon.S2.asl.i.r.and
   15960     1, // llvm.hexagon.S2.asl.i.r.nac
   15961     1, // llvm.hexagon.S2.asl.i.r.or
   15962     1, // llvm.hexagon.S2.asl.i.r.sat
   15963     1, // llvm.hexagon.S2.asl.i.r.xacc
   15964     1, // llvm.hexagon.S2.asl.i.vh
   15965     1, // llvm.hexagon.S2.asl.i.vw
   15966     1, // llvm.hexagon.S2.asl.r.p
   15967     1, // llvm.hexagon.S2.asl.r.p.acc
   15968     1, // llvm.hexagon.S2.asl.r.p.and
   15969     1, // llvm.hexagon.S2.asl.r.p.nac
   15970     1, // llvm.hexagon.S2.asl.r.p.or
   15971     1, // llvm.hexagon.S2.asl.r.p.xor
   15972     1, // llvm.hexagon.S2.asl.r.r
   15973     1, // llvm.hexagon.S2.asl.r.r.acc
   15974     1, // llvm.hexagon.S2.asl.r.r.and
   15975     1, // llvm.hexagon.S2.asl.r.r.nac
   15976     1, // llvm.hexagon.S2.asl.r.r.or
   15977     1, // llvm.hexagon.S2.asl.r.r.sat
   15978     1, // llvm.hexagon.S2.asl.r.vh
   15979     1, // llvm.hexagon.S2.asl.r.vw
   15980     1, // llvm.hexagon.S2.asr.i.p
   15981     1, // llvm.hexagon.S2.asr.i.p.acc
   15982     1, // llvm.hexagon.S2.asr.i.p.and
   15983     1, // llvm.hexagon.S2.asr.i.p.nac
   15984     1, // llvm.hexagon.S2.asr.i.p.or
   15985     1, // llvm.hexagon.S2.asr.i.p.rnd
   15986     1, // llvm.hexagon.S2.asr.i.p.rnd.goodsyntax
   15987     1, // llvm.hexagon.S2.asr.i.r
   15988     1, // llvm.hexagon.S2.asr.i.r.acc
   15989     1, // llvm.hexagon.S2.asr.i.r.and
   15990     1, // llvm.hexagon.S2.asr.i.r.nac
   15991     1, // llvm.hexagon.S2.asr.i.r.or
   15992     1, // llvm.hexagon.S2.asr.i.r.rnd
   15993     1, // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
   15994     1, // llvm.hexagon.S2.asr.i.svw.trun
   15995     1, // llvm.hexagon.S2.asr.i.vh
   15996     1, // llvm.hexagon.S2.asr.i.vw
   15997     1, // llvm.hexagon.S2.asr.r.p
   15998     1, // llvm.hexagon.S2.asr.r.p.acc
   15999     1, // llvm.hexagon.S2.asr.r.p.and
   16000     1, // llvm.hexagon.S2.asr.r.p.nac
   16001     1, // llvm.hexagon.S2.asr.r.p.or
   16002     1, // llvm.hexagon.S2.asr.r.p.xor
   16003     1, // llvm.hexagon.S2.asr.r.r
   16004     1, // llvm.hexagon.S2.asr.r.r.acc
   16005     1, // llvm.hexagon.S2.asr.r.r.and
   16006     1, // llvm.hexagon.S2.asr.r.r.nac
   16007     1, // llvm.hexagon.S2.asr.r.r.or
   16008     1, // llvm.hexagon.S2.asr.r.r.sat
   16009     1, // llvm.hexagon.S2.asr.r.svw.trun
   16010     1, // llvm.hexagon.S2.asr.r.vh
   16011     1, // llvm.hexagon.S2.asr.r.vw
   16012     1, // llvm.hexagon.S2.brev
   16013     1, // llvm.hexagon.S2.brevp
   16014     1, // llvm.hexagon.S2.cabacencbin
   16015     1, // llvm.hexagon.S2.cl0
   16016     1, // llvm.hexagon.S2.cl0p
   16017     1, // llvm.hexagon.S2.cl1
   16018     1, // llvm.hexagon.S2.cl1p
   16019     1, // llvm.hexagon.S2.clb
   16020     1, // llvm.hexagon.S2.clbnorm
   16021     1, // llvm.hexagon.S2.clbp
   16022     1, // llvm.hexagon.S2.clrbit.i
   16023     1, // llvm.hexagon.S2.clrbit.r
   16024     1, // llvm.hexagon.S2.ct0
   16025     1, // llvm.hexagon.S2.ct0p
   16026     1, // llvm.hexagon.S2.ct1
   16027     1, // llvm.hexagon.S2.ct1p
   16028     1, // llvm.hexagon.S2.deinterleave
   16029     1, // llvm.hexagon.S2.extractu
   16030     1, // llvm.hexagon.S2.extractu.rp
   16031     1, // llvm.hexagon.S2.extractup
   16032     1, // llvm.hexagon.S2.extractup.rp
   16033     1, // llvm.hexagon.S2.insert
   16034     1, // llvm.hexagon.S2.insert.rp
   16035     1, // llvm.hexagon.S2.insertp
   16036     1, // llvm.hexagon.S2.insertp.rp
   16037     1, // llvm.hexagon.S2.interleave
   16038     1, // llvm.hexagon.S2.lfsp
   16039     1, // llvm.hexagon.S2.lsl.r.p
   16040     1, // llvm.hexagon.S2.lsl.r.p.acc
   16041     1, // llvm.hexagon.S2.lsl.r.p.and
   16042     1, // llvm.hexagon.S2.lsl.r.p.nac
   16043     1, // llvm.hexagon.S2.lsl.r.p.or
   16044     1, // llvm.hexagon.S2.lsl.r.p.xor
   16045     1, // llvm.hexagon.S2.lsl.r.r
   16046     1, // llvm.hexagon.S2.lsl.r.r.acc
   16047     1, // llvm.hexagon.S2.lsl.r.r.and
   16048     1, // llvm.hexagon.S2.lsl.r.r.nac
   16049     1, // llvm.hexagon.S2.lsl.r.r.or
   16050     1, // llvm.hexagon.S2.lsl.r.vh
   16051     1, // llvm.hexagon.S2.lsl.r.vw
   16052     1, // llvm.hexagon.S2.lsr.i.p
   16053     1, // llvm.hexagon.S2.lsr.i.p.acc
   16054     1, // llvm.hexagon.S2.lsr.i.p.and
   16055     1, // llvm.hexagon.S2.lsr.i.p.nac
   16056     1, // llvm.hexagon.S2.lsr.i.p.or
   16057     1, // llvm.hexagon.S2.lsr.i.p.xacc
   16058     1, // llvm.hexagon.S2.lsr.i.r
   16059     1, // llvm.hexagon.S2.lsr.i.r.acc
   16060     1, // llvm.hexagon.S2.lsr.i.r.and
   16061     1, // llvm.hexagon.S2.lsr.i.r.nac
   16062     1, // llvm.hexagon.S2.lsr.i.r.or
   16063     1, // llvm.hexagon.S2.lsr.i.r.xacc
   16064     1, // llvm.hexagon.S2.lsr.i.vh
   16065     1, // llvm.hexagon.S2.lsr.i.vw
   16066     1, // llvm.hexagon.S2.lsr.r.p
   16067     1, // llvm.hexagon.S2.lsr.r.p.acc
   16068     1, // llvm.hexagon.S2.lsr.r.p.and
   16069     1, // llvm.hexagon.S2.lsr.r.p.nac
   16070     1, // llvm.hexagon.S2.lsr.r.p.or
   16071     1, // llvm.hexagon.S2.lsr.r.p.xor
   16072     1, // llvm.hexagon.S2.lsr.r.r
   16073     1, // llvm.hexagon.S2.lsr.r.r.acc
   16074     1, // llvm.hexagon.S2.lsr.r.r.and
   16075     1, // llvm.hexagon.S2.lsr.r.r.nac
   16076     1, // llvm.hexagon.S2.lsr.r.r.or
   16077     1, // llvm.hexagon.S2.lsr.r.vh
   16078     1, // llvm.hexagon.S2.lsr.r.vw
   16079     1, // llvm.hexagon.S2.packhl
   16080     1, // llvm.hexagon.S2.parityp
   16081     1, // llvm.hexagon.S2.setbit.i
   16082     1, // llvm.hexagon.S2.setbit.r
   16083     1, // llvm.hexagon.S2.shuffeb
   16084     1, // llvm.hexagon.S2.shuffeh
   16085     1, // llvm.hexagon.S2.shuffob
   16086     1, // llvm.hexagon.S2.shuffoh
   16087     18, // llvm.hexagon.S2.storew.locked
   16088     1, // llvm.hexagon.S2.svsathb
   16089     1, // llvm.hexagon.S2.svsathub
   16090     1, // llvm.hexagon.S2.tableidxb.goodsyntax
   16091     1, // llvm.hexagon.S2.tableidxd.goodsyntax
   16092     1, // llvm.hexagon.S2.tableidxh.goodsyntax
   16093     1, // llvm.hexagon.S2.tableidxw.goodsyntax
   16094     1, // llvm.hexagon.S2.togglebit.i
   16095     1, // llvm.hexagon.S2.togglebit.r
   16096     1, // llvm.hexagon.S2.tstbit.i
   16097     1, // llvm.hexagon.S2.tstbit.r
   16098     1, // llvm.hexagon.S2.valignib
   16099     1, // llvm.hexagon.S2.valignrb
   16100     1, // llvm.hexagon.S2.vcnegh
   16101     1, // llvm.hexagon.S2.vcrotate
   16102     1, // llvm.hexagon.S2.vrcnegh
   16103     1, // llvm.hexagon.S2.vrndpackwh
   16104     1, // llvm.hexagon.S2.vrndpackwhs
   16105     1, // llvm.hexagon.S2.vsathb
   16106     1, // llvm.hexagon.S2.vsathb.nopack
   16107     1, // llvm.hexagon.S2.vsathub
   16108     1, // llvm.hexagon.S2.vsathub.nopack
   16109     1, // llvm.hexagon.S2.vsatwh
   16110     1, // llvm.hexagon.S2.vsatwh.nopack
   16111     1, // llvm.hexagon.S2.vsatwuh
   16112     1, // llvm.hexagon.S2.vsatwuh.nopack
   16113     1, // llvm.hexagon.S2.vsplatrb
   16114     1, // llvm.hexagon.S2.vsplatrh
   16115     1, // llvm.hexagon.S2.vspliceib
   16116     1, // llvm.hexagon.S2.vsplicerb
   16117     1, // llvm.hexagon.S2.vsxtbh
   16118     1, // llvm.hexagon.S2.vsxthw
   16119     1, // llvm.hexagon.S2.vtrunehb
   16120     1, // llvm.hexagon.S2.vtrunewh
   16121     1, // llvm.hexagon.S2.vtrunohb
   16122     1, // llvm.hexagon.S2.vtrunowh
   16123     1, // llvm.hexagon.S2.vzxtbh
   16124     1, // llvm.hexagon.S2.vzxthw
   16125     1, // llvm.hexagon.S4.addaddi
   16126     1, // llvm.hexagon.S4.addi.asl.ri
   16127     1, // llvm.hexagon.S4.addi.lsr.ri
   16128     1, // llvm.hexagon.S4.andi.asl.ri
   16129     1, // llvm.hexagon.S4.andi.lsr.ri
   16130     1, // llvm.hexagon.S4.clbaddi
   16131     1, // llvm.hexagon.S4.clbpaddi
   16132     1, // llvm.hexagon.S4.clbpnorm
   16133     1, // llvm.hexagon.S4.extract
   16134     1, // llvm.hexagon.S4.extract.rp
   16135     1, // llvm.hexagon.S4.extractp
   16136     1, // llvm.hexagon.S4.extractp.rp
   16137     1, // llvm.hexagon.S4.lsli
   16138     1, // llvm.hexagon.S4.ntstbit.i
   16139     1, // llvm.hexagon.S4.ntstbit.r
   16140     1, // llvm.hexagon.S4.or.andi
   16141     1, // llvm.hexagon.S4.or.andix
   16142     1, // llvm.hexagon.S4.or.ori
   16143     1, // llvm.hexagon.S4.ori.asl.ri
   16144     1, // llvm.hexagon.S4.ori.lsr.ri
   16145     1, // llvm.hexagon.S4.parity
   16146     18, // llvm.hexagon.S4.stored.locked
   16147     1, // llvm.hexagon.S4.subaddi
   16148     1, // llvm.hexagon.S4.subi.asl.ri
   16149     1, // llvm.hexagon.S4.subi.lsr.ri
   16150     1, // llvm.hexagon.S4.vrcrotate
   16151     1, // llvm.hexagon.S4.vrcrotate.acc
   16152     1, // llvm.hexagon.S4.vxaddsubh
   16153     1, // llvm.hexagon.S4.vxaddsubhr
   16154     1, // llvm.hexagon.S4.vxaddsubw
   16155     1, // llvm.hexagon.S4.vxsubaddh
   16156     1, // llvm.hexagon.S4.vxsubaddhr
   16157     1, // llvm.hexagon.S4.vxsubaddw
   16158     1, // llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax
   16159     1, // llvm.hexagon.S5.asrhub.sat
   16160     1, // llvm.hexagon.S5.popcountp
   16161     1, // llvm.hexagon.S5.vasrhrnd.goodsyntax
   16162     1, // llvm.hexagon.S6.rol.i.p
   16163     1, // llvm.hexagon.S6.rol.i.p.acc
   16164     1, // llvm.hexagon.S6.rol.i.p.and
   16165     1, // llvm.hexagon.S6.rol.i.p.nac
   16166     1, // llvm.hexagon.S6.rol.i.p.or
   16167     1, // llvm.hexagon.S6.rol.i.p.xacc
   16168     1, // llvm.hexagon.S6.rol.i.r
   16169     1, // llvm.hexagon.S6.rol.i.r.acc
   16170     1, // llvm.hexagon.S6.rol.i.r.and
   16171     1, // llvm.hexagon.S6.rol.i.r.nac
   16172     1, // llvm.hexagon.S6.rol.i.r.or
   16173     1, // llvm.hexagon.S6.rol.i.r.xacc
   16174     1, // llvm.hexagon.S6.vsplatrbp
   16175     1, // llvm.hexagon.S6.vtrunehb.ppp
   16176     1, // llvm.hexagon.S6.vtrunohb.ppp
   16177     1, // llvm.hexagon.SI.to.SXTHI.asrh
   16178     1, // llvm.hexagon.V6.extractw
   16179     1, // llvm.hexagon.V6.extractw.128B
   16180     1, // llvm.hexagon.V6.hi
   16181     1, // llvm.hexagon.V6.hi.128B
   16182     1, // llvm.hexagon.V6.lo
   16183     1, // llvm.hexagon.V6.lo.128B
   16184     1, // llvm.hexagon.V6.lvsplatb
   16185     1, // llvm.hexagon.V6.lvsplatb.128B
   16186     1, // llvm.hexagon.V6.lvsplath
   16187     1, // llvm.hexagon.V6.lvsplath.128B
   16188     1, // llvm.hexagon.V6.lvsplatw
   16189     1, // llvm.hexagon.V6.lvsplatw.128B
   16190     1, // llvm.hexagon.V6.pred.and
   16191     1, // llvm.hexagon.V6.pred.and.128B
   16192     1, // llvm.hexagon.V6.pred.and.n
   16193     1, // llvm.hexagon.V6.pred.and.n.128B
   16194     1, // llvm.hexagon.V6.pred.not
   16195     1, // llvm.hexagon.V6.pred.not.128B
   16196     1, // llvm.hexagon.V6.pred.or
   16197     1, // llvm.hexagon.V6.pred.or.128B
   16198     1, // llvm.hexagon.V6.pred.or.n
   16199     1, // llvm.hexagon.V6.pred.or.n.128B
   16200     1, // llvm.hexagon.V6.pred.scalar2
   16201     1, // llvm.hexagon.V6.pred.scalar2.128B
   16202     1, // llvm.hexagon.V6.pred.scalar2v2
   16203     1, // llvm.hexagon.V6.pred.scalar2v2.128B
   16204     1, // llvm.hexagon.V6.pred.xor
   16205     1, // llvm.hexagon.V6.pred.xor.128B
   16206     1, // llvm.hexagon.V6.shuffeqh
   16207     1, // llvm.hexagon.V6.shuffeqh.128B
   16208     1, // llvm.hexagon.V6.shuffeqw
   16209     1, // llvm.hexagon.V6.shuffeqw.128B
   16210     1, // llvm.hexagon.V6.vabsdiffh
   16211     1, // llvm.hexagon.V6.vabsdiffh.128B
   16212     1, // llvm.hexagon.V6.vabsdiffub
   16213     1, // llvm.hexagon.V6.vabsdiffub.128B
   16214     1, // llvm.hexagon.V6.vabsdiffuh
   16215     1, // llvm.hexagon.V6.vabsdiffuh.128B
   16216     1, // llvm.hexagon.V6.vabsdiffw
   16217     1, // llvm.hexagon.V6.vabsdiffw.128B
   16218     1, // llvm.hexagon.V6.vabsh
   16219     1, // llvm.hexagon.V6.vabsh.128B
   16220     1, // llvm.hexagon.V6.vabsh.sat
   16221     1, // llvm.hexagon.V6.vabsh.sat.128B
   16222     1, // llvm.hexagon.V6.vabsw
   16223     1, // llvm.hexagon.V6.vabsw.128B
   16224     1, // llvm.hexagon.V6.vabsw.sat
   16225     1, // llvm.hexagon.V6.vabsw.sat.128B
   16226     1, // llvm.hexagon.V6.vaddb
   16227     1, // llvm.hexagon.V6.vaddb.128B
   16228     1, // llvm.hexagon.V6.vaddb.dv
   16229     1, // llvm.hexagon.V6.vaddb.dv.128B
   16230     1, // llvm.hexagon.V6.vaddbnq
   16231     1, // llvm.hexagon.V6.vaddbnq.128B
   16232     1, // llvm.hexagon.V6.vaddbq
   16233     1, // llvm.hexagon.V6.vaddbq.128B
   16234     1, // llvm.hexagon.V6.vaddbsat
   16235     1, // llvm.hexagon.V6.vaddbsat.128B
   16236     1, // llvm.hexagon.V6.vaddbsat.dv
   16237     1, // llvm.hexagon.V6.vaddbsat.dv.128B
   16238     1, // llvm.hexagon.V6.vaddclbh
   16239     1, // llvm.hexagon.V6.vaddclbh.128B
   16240     1, // llvm.hexagon.V6.vaddclbw
   16241     1, // llvm.hexagon.V6.vaddclbw.128B
   16242     1, // llvm.hexagon.V6.vaddh
   16243     1, // llvm.hexagon.V6.vaddh.128B
   16244     1, // llvm.hexagon.V6.vaddh.dv
   16245     1, // llvm.hexagon.V6.vaddh.dv.128B
   16246     1, // llvm.hexagon.V6.vaddhnq
   16247     1, // llvm.hexagon.V6.vaddhnq.128B
   16248     1, // llvm.hexagon.V6.vaddhq
   16249     1, // llvm.hexagon.V6.vaddhq.128B
   16250     1, // llvm.hexagon.V6.vaddhsat
   16251     1, // llvm.hexagon.V6.vaddhsat.128B
   16252     1, // llvm.hexagon.V6.vaddhsat.dv
   16253     1, // llvm.hexagon.V6.vaddhsat.dv.128B
   16254     1, // llvm.hexagon.V6.vaddhw
   16255     1, // llvm.hexagon.V6.vaddhw.128B
   16256     1, // llvm.hexagon.V6.vaddhw.acc
   16257     1, // llvm.hexagon.V6.vaddhw.acc.128B
   16258     1, // llvm.hexagon.V6.vaddubh
   16259     1, // llvm.hexagon.V6.vaddubh.128B
   16260     1, // llvm.hexagon.V6.vaddubh.acc
   16261     1, // llvm.hexagon.V6.vaddubh.acc.128B
   16262     1, // llvm.hexagon.V6.vaddubsat
   16263     1, // llvm.hexagon.V6.vaddubsat.128B
   16264     1, // llvm.hexagon.V6.vaddubsat.dv
   16265     1, // llvm.hexagon.V6.vaddubsat.dv.128B
   16266     1, // llvm.hexagon.V6.vaddububb.sat
   16267     1, // llvm.hexagon.V6.vaddububb.sat.128B
   16268     1, // llvm.hexagon.V6.vadduhsat
   16269     1, // llvm.hexagon.V6.vadduhsat.128B
   16270     1, // llvm.hexagon.V6.vadduhsat.dv
   16271     1, // llvm.hexagon.V6.vadduhsat.dv.128B
   16272     1, // llvm.hexagon.V6.vadduhw
   16273     1, // llvm.hexagon.V6.vadduhw.128B
   16274     1, // llvm.hexagon.V6.vadduhw.acc
   16275     1, // llvm.hexagon.V6.vadduhw.acc.128B
   16276     1, // llvm.hexagon.V6.vadduwsat
   16277     1, // llvm.hexagon.V6.vadduwsat.128B
   16278     1, // llvm.hexagon.V6.vadduwsat.dv
   16279     1, // llvm.hexagon.V6.vadduwsat.dv.128B
   16280     1, // llvm.hexagon.V6.vaddw
   16281     1, // llvm.hexagon.V6.vaddw.128B
   16282     1, // llvm.hexagon.V6.vaddw.dv
   16283     1, // llvm.hexagon.V6.vaddw.dv.128B
   16284     1, // llvm.hexagon.V6.vaddwnq
   16285     1, // llvm.hexagon.V6.vaddwnq.128B
   16286     1, // llvm.hexagon.V6.vaddwq
   16287     1, // llvm.hexagon.V6.vaddwq.128B
   16288     1, // llvm.hexagon.V6.vaddwsat
   16289     1, // llvm.hexagon.V6.vaddwsat.128B
   16290     1, // llvm.hexagon.V6.vaddwsat.dv
   16291     1, // llvm.hexagon.V6.vaddwsat.dv.128B
   16292     1, // llvm.hexagon.V6.valignb
   16293     1, // llvm.hexagon.V6.valignb.128B
   16294     1, // llvm.hexagon.V6.valignbi
   16295     1, // llvm.hexagon.V6.valignbi.128B
   16296     1, // llvm.hexagon.V6.vand
   16297     1, // llvm.hexagon.V6.vand.128B
   16298     1, // llvm.hexagon.V6.vandnqrt
   16299     1, // llvm.hexagon.V6.vandnqrt.128B
   16300     1, // llvm.hexagon.V6.vandnqrt.acc
   16301     1, // llvm.hexagon.V6.vandnqrt.acc.128B
   16302     1, // llvm.hexagon.V6.vandqrt
   16303     1, // llvm.hexagon.V6.vandqrt.128B
   16304     1, // llvm.hexagon.V6.vandqrt.acc
   16305     1, // llvm.hexagon.V6.vandqrt.acc.128B
   16306     1, // llvm.hexagon.V6.vandvnqv
   16307     1, // llvm.hexagon.V6.vandvnqv.128B
   16308     1, // llvm.hexagon.V6.vandvqv
   16309     1, // llvm.hexagon.V6.vandvqv.128B
   16310     1, // llvm.hexagon.V6.vandvrt
   16311     1, // llvm.hexagon.V6.vandvrt.128B
   16312     1, // llvm.hexagon.V6.vandvrt.acc
   16313     1, // llvm.hexagon.V6.vandvrt.acc.128B
   16314     1, // llvm.hexagon.V6.vaslh
   16315     1, // llvm.hexagon.V6.vaslh.128B
   16316     1, // llvm.hexagon.V6.vaslhv
   16317     1, // llvm.hexagon.V6.vaslhv.128B
   16318     1, // llvm.hexagon.V6.vaslw
   16319     1, // llvm.hexagon.V6.vaslw.128B
   16320     1, // llvm.hexagon.V6.vaslw.acc
   16321     1, // llvm.hexagon.V6.vaslw.acc.128B
   16322     1, // llvm.hexagon.V6.vaslwv
   16323     1, // llvm.hexagon.V6.vaslwv.128B
   16324     1, // llvm.hexagon.V6.vasrh
   16325     1, // llvm.hexagon.V6.vasrh.128B
   16326     1, // llvm.hexagon.V6.vasrhbrndsat
   16327     1, // llvm.hexagon.V6.vasrhbrndsat.128B
   16328     1, // llvm.hexagon.V6.vasrhbsat
   16329     1, // llvm.hexagon.V6.vasrhbsat.128B
   16330     1, // llvm.hexagon.V6.vasrhubrndsat
   16331     1, // llvm.hexagon.V6.vasrhubrndsat.128B
   16332     1, // llvm.hexagon.V6.vasrhubsat
   16333     1, // llvm.hexagon.V6.vasrhubsat.128B
   16334     1, // llvm.hexagon.V6.vasrhv
   16335     1, // llvm.hexagon.V6.vasrhv.128B
   16336     1, // llvm.hexagon.V6.vasruwuhrndsat
   16337     1, // llvm.hexagon.V6.vasruwuhrndsat.128B
   16338     1, // llvm.hexagon.V6.vasrw
   16339     1, // llvm.hexagon.V6.vasrw.128B
   16340     1, // llvm.hexagon.V6.vasrw.acc
   16341     1, // llvm.hexagon.V6.vasrw.acc.128B
   16342     1, // llvm.hexagon.V6.vasrwh
   16343     1, // llvm.hexagon.V6.vasrwh.128B
   16344     1, // llvm.hexagon.V6.vasrwhrndsat
   16345     1, // llvm.hexagon.V6.vasrwhrndsat.128B
   16346     1, // llvm.hexagon.V6.vasrwhsat
   16347     1, // llvm.hexagon.V6.vasrwhsat.128B
   16348     1, // llvm.hexagon.V6.vasrwuhrndsat
   16349     1, // llvm.hexagon.V6.vasrwuhrndsat.128B
   16350     1, // llvm.hexagon.V6.vasrwuhsat
   16351     1, // llvm.hexagon.V6.vasrwuhsat.128B
   16352     1, // llvm.hexagon.V6.vasrwv
   16353     1, // llvm.hexagon.V6.vasrwv.128B
   16354     1, // llvm.hexagon.V6.vassign
   16355     1, // llvm.hexagon.V6.vassign.128B
   16356     1, // llvm.hexagon.V6.vassignp
   16357     1, // llvm.hexagon.V6.vassignp.128B
   16358     1, // llvm.hexagon.V6.vavgh
   16359     1, // llvm.hexagon.V6.vavgh.128B
   16360     1, // llvm.hexagon.V6.vavghrnd
   16361     1, // llvm.hexagon.V6.vavghrnd.128B
   16362     1, // llvm.hexagon.V6.vavgub
   16363     1, // llvm.hexagon.V6.vavgub.128B
   16364     1, // llvm.hexagon.V6.vavgubrnd
   16365     1, // llvm.hexagon.V6.vavgubrnd.128B
   16366     1, // llvm.hexagon.V6.vavguh
   16367     1, // llvm.hexagon.V6.vavguh.128B
   16368     1, // llvm.hexagon.V6.vavguhrnd
   16369     1, // llvm.hexagon.V6.vavguhrnd.128B
   16370     1, // llvm.hexagon.V6.vavgw
   16371     1, // llvm.hexagon.V6.vavgw.128B
   16372     1, // llvm.hexagon.V6.vavgwrnd
   16373     1, // llvm.hexagon.V6.vavgwrnd.128B
   16374     1, // llvm.hexagon.V6.vcl0h
   16375     1, // llvm.hexagon.V6.vcl0h.128B
   16376     1, // llvm.hexagon.V6.vcl0w
   16377     1, // llvm.hexagon.V6.vcl0w.128B
   16378     1, // llvm.hexagon.V6.vcombine
   16379     1, // llvm.hexagon.V6.vcombine.128B
   16380     1, // llvm.hexagon.V6.vd0
   16381     1, // llvm.hexagon.V6.vd0.128B
   16382     1, // llvm.hexagon.V6.vdealb
   16383     1, // llvm.hexagon.V6.vdealb.128B
   16384     1, // llvm.hexagon.V6.vdealb4w
   16385     1, // llvm.hexagon.V6.vdealb4w.128B
   16386     1, // llvm.hexagon.V6.vdealh
   16387     1, // llvm.hexagon.V6.vdealh.128B
   16388     1, // llvm.hexagon.V6.vdealvdd
   16389     1, // llvm.hexagon.V6.vdealvdd.128B
   16390     1, // llvm.hexagon.V6.vdelta
   16391     1, // llvm.hexagon.V6.vdelta.128B
   16392     1, // llvm.hexagon.V6.vdmpybus
   16393     1, // llvm.hexagon.V6.vdmpybus.128B
   16394     1, // llvm.hexagon.V6.vdmpybus.acc
   16395     1, // llvm.hexagon.V6.vdmpybus.acc.128B
   16396     1, // llvm.hexagon.V6.vdmpybus.dv
   16397     1, // llvm.hexagon.V6.vdmpybus.dv.128B
   16398     1, // llvm.hexagon.V6.vdmpybus.dv.acc
   16399     1, // llvm.hexagon.V6.vdmpybus.dv.acc.128B
   16400     1, // llvm.hexagon.V6.vdmpyhb
   16401     1, // llvm.hexagon.V6.vdmpyhb.128B
   16402     1, // llvm.hexagon.V6.vdmpyhb.acc
   16403     1, // llvm.hexagon.V6.vdmpyhb.acc.128B
   16404     1, // llvm.hexagon.V6.vdmpyhb.dv
   16405     1, // llvm.hexagon.V6.vdmpyhb.dv.128B
   16406     1, // llvm.hexagon.V6.vdmpyhb.dv.acc
   16407     1, // llvm.hexagon.V6.vdmpyhb.dv.acc.128B
   16408     1, // llvm.hexagon.V6.vdmpyhisat
   16409     1, // llvm.hexagon.V6.vdmpyhisat.128B
   16410     1, // llvm.hexagon.V6.vdmpyhisat.acc
   16411     1, // llvm.hexagon.V6.vdmpyhisat.acc.128B
   16412     1, // llvm.hexagon.V6.vdmpyhsat
   16413     1, // llvm.hexagon.V6.vdmpyhsat.128B
   16414     1, // llvm.hexagon.V6.vdmpyhsat.acc
   16415     1, // llvm.hexagon.V6.vdmpyhsat.acc.128B
   16416     1, // llvm.hexagon.V6.vdmpyhsuisat
   16417     1, // llvm.hexagon.V6.vdmpyhsuisat.128B
   16418     1, // llvm.hexagon.V6.vdmpyhsuisat.acc
   16419     1, // llvm.hexagon.V6.vdmpyhsuisat.acc.128B
   16420     1, // llvm.hexagon.V6.vdmpyhsusat
   16421     1, // llvm.hexagon.V6.vdmpyhsusat.128B
   16422     1, // llvm.hexagon.V6.vdmpyhsusat.acc
   16423     1, // llvm.hexagon.V6.vdmpyhsusat.acc.128B
   16424     1, // llvm.hexagon.V6.vdmpyhvsat
   16425     1, // llvm.hexagon.V6.vdmpyhvsat.128B
   16426     1, // llvm.hexagon.V6.vdmpyhvsat.acc
   16427     1, // llvm.hexagon.V6.vdmpyhvsat.acc.128B
   16428     1, // llvm.hexagon.V6.vdsaduh
   16429     1, // llvm.hexagon.V6.vdsaduh.128B
   16430     1, // llvm.hexagon.V6.vdsaduh.acc
   16431     1, // llvm.hexagon.V6.vdsaduh.acc.128B
   16432     1, // llvm.hexagon.V6.veqb
   16433     1, // llvm.hexagon.V6.veqb.128B
   16434     1, // llvm.hexagon.V6.veqb.and
   16435     1, // llvm.hexagon.V6.veqb.and.128B
   16436     1, // llvm.hexagon.V6.veqb.or
   16437     1, // llvm.hexagon.V6.veqb.or.128B
   16438     1, // llvm.hexagon.V6.veqb.xor
   16439     1, // llvm.hexagon.V6.veqb.xor.128B
   16440     1, // llvm.hexagon.V6.veqh
   16441     1, // llvm.hexagon.V6.veqh.128B
   16442     1, // llvm.hexagon.V6.veqh.and
   16443     1, // llvm.hexagon.V6.veqh.and.128B
   16444     1, // llvm.hexagon.V6.veqh.or
   16445     1, // llvm.hexagon.V6.veqh.or.128B
   16446     1, // llvm.hexagon.V6.veqh.xor
   16447     1, // llvm.hexagon.V6.veqh.xor.128B
   16448     1, // llvm.hexagon.V6.veqw
   16449     1, // llvm.hexagon.V6.veqw.128B
   16450     1, // llvm.hexagon.V6.veqw.and
   16451     1, // llvm.hexagon.V6.veqw.and.128B
   16452     1, // llvm.hexagon.V6.veqw.or
   16453     1, // llvm.hexagon.V6.veqw.or.128B
   16454     1, // llvm.hexagon.V6.veqw.xor
   16455     1, // llvm.hexagon.V6.veqw.xor.128B
   16456     1, // llvm.hexagon.V6.vgtb
   16457     1, // llvm.hexagon.V6.vgtb.128B
   16458     1, // llvm.hexagon.V6.vgtb.and
   16459     1, // llvm.hexagon.V6.vgtb.and.128B
   16460     1, // llvm.hexagon.V6.vgtb.or
   16461     1, // llvm.hexagon.V6.vgtb.or.128B
   16462     1, // llvm.hexagon.V6.vgtb.xor
   16463     1, // llvm.hexagon.V6.vgtb.xor.128B
   16464     1, // llvm.hexagon.V6.vgth
   16465     1, // llvm.hexagon.V6.vgth.128B
   16466     1, // llvm.hexagon.V6.vgth.and
   16467     1, // llvm.hexagon.V6.vgth.and.128B
   16468     1, // llvm.hexagon.V6.vgth.or
   16469     1, // llvm.hexagon.V6.vgth.or.128B
   16470     1, // llvm.hexagon.V6.vgth.xor
   16471     1, // llvm.hexagon.V6.vgth.xor.128B
   16472     1, // llvm.hexagon.V6.vgtub
   16473     1, // llvm.hexagon.V6.vgtub.128B
   16474     1, // llvm.hexagon.V6.vgtub.and
   16475     1, // llvm.hexagon.V6.vgtub.and.128B
   16476     1, // llvm.hexagon.V6.vgtub.or
   16477     1, // llvm.hexagon.V6.vgtub.or.128B
   16478     1, // llvm.hexagon.V6.vgtub.xor
   16479     1, // llvm.hexagon.V6.vgtub.xor.128B
   16480     1, // llvm.hexagon.V6.vgtuh
   16481     1, // llvm.hexagon.V6.vgtuh.128B
   16482     1, // llvm.hexagon.V6.vgtuh.and
   16483     1, // llvm.hexagon.V6.vgtuh.and.128B
   16484     1, // llvm.hexagon.V6.vgtuh.or
   16485     1, // llvm.hexagon.V6.vgtuh.or.128B
   16486     1, // llvm.hexagon.V6.vgtuh.xor
   16487     1, // llvm.hexagon.V6.vgtuh.xor.128B
   16488     1, // llvm.hexagon.V6.vgtuw
   16489     1, // llvm.hexagon.V6.vgtuw.128B
   16490     1, // llvm.hexagon.V6.vgtuw.and
   16491     1, // llvm.hexagon.V6.vgtuw.and.128B
   16492     1, // llvm.hexagon.V6.vgtuw.or
   16493     1, // llvm.hexagon.V6.vgtuw.or.128B
   16494     1, // llvm.hexagon.V6.vgtuw.xor
   16495     1, // llvm.hexagon.V6.vgtuw.xor.128B
   16496     1, // llvm.hexagon.V6.vgtw
   16497     1, // llvm.hexagon.V6.vgtw.128B
   16498     1, // llvm.hexagon.V6.vgtw.and
   16499     1, // llvm.hexagon.V6.vgtw.and.128B
   16500     1, // llvm.hexagon.V6.vgtw.or
   16501     1, // llvm.hexagon.V6.vgtw.or.128B
   16502     1, // llvm.hexagon.V6.vgtw.xor
   16503     1, // llvm.hexagon.V6.vgtw.xor.128B
   16504     1, // llvm.hexagon.V6.vinsertwr
   16505     1, // llvm.hexagon.V6.vinsertwr.128B
   16506     1, // llvm.hexagon.V6.vlalignb
   16507     1, // llvm.hexagon.V6.vlalignb.128B
   16508     1, // llvm.hexagon.V6.vlalignbi
   16509     1, // llvm.hexagon.V6.vlalignbi.128B
   16510     1, // llvm.hexagon.V6.vlsrb
   16511     1, // llvm.hexagon.V6.vlsrb.128B
   16512     1, // llvm.hexagon.V6.vlsrh
   16513     1, // llvm.hexagon.V6.vlsrh.128B
   16514     1, // llvm.hexagon.V6.vlsrhv
   16515     1, // llvm.hexagon.V6.vlsrhv.128B
   16516     1, // llvm.hexagon.V6.vlsrw
   16517     1, // llvm.hexagon.V6.vlsrw.128B
   16518     1, // llvm.hexagon.V6.vlsrwv
   16519     1, // llvm.hexagon.V6.vlsrwv.128B
   16520     1, // llvm.hexagon.V6.vlutb
   16521     1, // llvm.hexagon.V6.vlutb.128B
   16522     1, // llvm.hexagon.V6.vlutb.acc
   16523     1, // llvm.hexagon.V6.vlutb.acc.128B
   16524     1, // llvm.hexagon.V6.vlutb.dv
   16525     1, // llvm.hexagon.V6.vlutb.dv.128B
   16526     1, // llvm.hexagon.V6.vlutb.dv.acc
   16527     1, // llvm.hexagon.V6.vlutb.dv.acc.128B
   16528     1, // llvm.hexagon.V6.vlutvvb
   16529     1, // llvm.hexagon.V6.vlutvvb.128B
   16530     1, // llvm.hexagon.V6.vlutvvb.nm
   16531     1, // llvm.hexagon.V6.vlutvvb.nm.128B
   16532     1, // llvm.hexagon.V6.vlutvvb.oracc
   16533     1, // llvm.hexagon.V6.vlutvvb.oracc.128B
   16534     1, // llvm.hexagon.V6.vlutvvb.oracci
   16535     1, // llvm.hexagon.V6.vlutvvb.oracci.128B
   16536     1, // llvm.hexagon.V6.vlutvvbi
   16537     1, // llvm.hexagon.V6.vlutvvbi.128B
   16538     1, // llvm.hexagon.V6.vlutvwh
   16539     1, // llvm.hexagon.V6.vlutvwh.128B
   16540     1, // llvm.hexagon.V6.vlutvwh.nm
   16541     1, // llvm.hexagon.V6.vlutvwh.nm.128B
   16542     1, // llvm.hexagon.V6.vlutvwh.oracc
   16543     1, // llvm.hexagon.V6.vlutvwh.oracc.128B
   16544     1, // llvm.hexagon.V6.vlutvwh.oracci
   16545     1, // llvm.hexagon.V6.vlutvwh.oracci.128B
   16546     1, // llvm.hexagon.V6.vlutvwhi
   16547     1, // llvm.hexagon.V6.vlutvwhi.128B
   16548     21, // llvm.hexagon.V6.vmaskedstorenq
   16549     21, // llvm.hexagon.V6.vmaskedstorenq.128B
   16550     21, // llvm.hexagon.V6.vmaskedstorentnq
   16551     21, // llvm.hexagon.V6.vmaskedstorentnq.128B
   16552     21, // llvm.hexagon.V6.vmaskedstorentq
   16553     21, // llvm.hexagon.V6.vmaskedstorentq.128B
   16554     21, // llvm.hexagon.V6.vmaskedstoreq
   16555     21, // llvm.hexagon.V6.vmaskedstoreq.128B
   16556     1, // llvm.hexagon.V6.vmaxb
   16557     1, // llvm.hexagon.V6.vmaxb.128B
   16558     1, // llvm.hexagon.V6.vmaxh
   16559     1, // llvm.hexagon.V6.vmaxh.128B
   16560     1, // llvm.hexagon.V6.vmaxub
   16561     1, // llvm.hexagon.V6.vmaxub.128B
   16562     1, // llvm.hexagon.V6.vmaxuh
   16563     1, // llvm.hexagon.V6.vmaxuh.128B
   16564     1, // llvm.hexagon.V6.vmaxw
   16565     1, // llvm.hexagon.V6.vmaxw.128B
   16566     1, // llvm.hexagon.V6.vminb
   16567     1, // llvm.hexagon.V6.vminb.128B
   16568     1, // llvm.hexagon.V6.vminh
   16569     1, // llvm.hexagon.V6.vminh.128B
   16570     1, // llvm.hexagon.V6.vminub
   16571     1, // llvm.hexagon.V6.vminub.128B
   16572     1, // llvm.hexagon.V6.vminuh
   16573     1, // llvm.hexagon.V6.vminuh.128B
   16574     1, // llvm.hexagon.V6.vminw
   16575     1, // llvm.hexagon.V6.vminw.128B
   16576     1, // llvm.hexagon.V6.vmpabus
   16577     1, // llvm.hexagon.V6.vmpabus.128B
   16578     1, // llvm.hexagon.V6.vmpabus.acc
   16579     1, // llvm.hexagon.V6.vmpabus.acc.128B
   16580     1, // llvm.hexagon.V6.vmpabusv
   16581     1, // llvm.hexagon.V6.vmpabusv.128B
   16582     1, // llvm.hexagon.V6.vmpabuuv
   16583     1, // llvm.hexagon.V6.vmpabuuv.128B
   16584     1, // llvm.hexagon.V6.vmpahb
   16585     1, // llvm.hexagon.V6.vmpahb.128B
   16586     1, // llvm.hexagon.V6.vmpahb.acc
   16587     1, // llvm.hexagon.V6.vmpahb.acc.128B
   16588     1, // llvm.hexagon.V6.vmpauhb
   16589     1, // llvm.hexagon.V6.vmpauhb.128B
   16590     1, // llvm.hexagon.V6.vmpauhb.acc
   16591     1, // llvm.hexagon.V6.vmpauhb.acc.128B
   16592     1, // llvm.hexagon.V6.vmpybus
   16593     1, // llvm.hexagon.V6.vmpybus.128B
   16594     1, // llvm.hexagon.V6.vmpybus.acc
   16595     1, // llvm.hexagon.V6.vmpybus.acc.128B
   16596     1, // llvm.hexagon.V6.vmpybusv
   16597     1, // llvm.hexagon.V6.vmpybusv.128B
   16598     1, // llvm.hexagon.V6.vmpybusv.acc
   16599     1, // llvm.hexagon.V6.vmpybusv.acc.128B
   16600     1, // llvm.hexagon.V6.vmpybv
   16601     1, // llvm.hexagon.V6.vmpybv.128B
   16602     1, // llvm.hexagon.V6.vmpybv.acc
   16603     1, // llvm.hexagon.V6.vmpybv.acc.128B
   16604     1, // llvm.hexagon.V6.vmpyewuh
   16605     1, // llvm.hexagon.V6.vmpyewuh.128B
   16606     1, // llvm.hexagon.V6.vmpyewuh.64
   16607     1, // llvm.hexagon.V6.vmpyewuh.64.128B
   16608     1, // llvm.hexagon.V6.vmpyh
   16609     1, // llvm.hexagon.V6.vmpyh.128B
   16610     1, // llvm.hexagon.V6.vmpyhsat.acc
   16611     1, // llvm.hexagon.V6.vmpyhsat.acc.128B
   16612     1, // llvm.hexagon.V6.vmpyhsrs
   16613     1, // llvm.hexagon.V6.vmpyhsrs.128B
   16614     1, // llvm.hexagon.V6.vmpyhss
   16615     1, // llvm.hexagon.V6.vmpyhss.128B
   16616     1, // llvm.hexagon.V6.vmpyhus
   16617     1, // llvm.hexagon.V6.vmpyhus.128B
   16618     1, // llvm.hexagon.V6.vmpyhus.acc
   16619     1, // llvm.hexagon.V6.vmpyhus.acc.128B
   16620     1, // llvm.hexagon.V6.vmpyhv
   16621     1, // llvm.hexagon.V6.vmpyhv.128B
   16622     1, // llvm.hexagon.V6.vmpyhv.acc
   16623     1, // llvm.hexagon.V6.vmpyhv.acc.128B
   16624     1, // llvm.hexagon.V6.vmpyhvsrs
   16625     1, // llvm.hexagon.V6.vmpyhvsrs.128B
   16626     1, // llvm.hexagon.V6.vmpyieoh
   16627     1, // llvm.hexagon.V6.vmpyieoh.128B
   16628     1, // llvm.hexagon.V6.vmpyiewh.acc
   16629     1, // llvm.hexagon.V6.vmpyiewh.acc.128B
   16630     1, // llvm.hexagon.V6.vmpyiewuh
   16631     1, // llvm.hexagon.V6.vmpyiewuh.128B
   16632     1, // llvm.hexagon.V6.vmpyiewuh.acc
   16633     1, // llvm.hexagon.V6.vmpyiewuh.acc.128B
   16634     1, // llvm.hexagon.V6.vmpyih
   16635     1, // llvm.hexagon.V6.vmpyih.128B
   16636     1, // llvm.hexagon.V6.vmpyih.acc
   16637     1, // llvm.hexagon.V6.vmpyih.acc.128B
   16638     1, // llvm.hexagon.V6.vmpyihb
   16639     1, // llvm.hexagon.V6.vmpyihb.128B
   16640     1, // llvm.hexagon.V6.vmpyihb.acc
   16641     1, // llvm.hexagon.V6.vmpyihb.acc.128B
   16642     1, // llvm.hexagon.V6.vmpyiowh
   16643     1, // llvm.hexagon.V6.vmpyiowh.128B
   16644     1, // llvm.hexagon.V6.vmpyiwb
   16645     1, // llvm.hexagon.V6.vmpyiwb.128B
   16646     1, // llvm.hexagon.V6.vmpyiwb.acc
   16647     1, // llvm.hexagon.V6.vmpyiwb.acc.128B
   16648     1, // llvm.hexagon.V6.vmpyiwh
   16649     1, // llvm.hexagon.V6.vmpyiwh.128B
   16650     1, // llvm.hexagon.V6.vmpyiwh.acc
   16651     1, // llvm.hexagon.V6.vmpyiwh.acc.128B
   16652     1, // llvm.hexagon.V6.vmpyiwub
   16653     1, // llvm.hexagon.V6.vmpyiwub.128B
   16654     1, // llvm.hexagon.V6.vmpyiwub.acc
   16655     1, // llvm.hexagon.V6.vmpyiwub.acc.128B
   16656     1, // llvm.hexagon.V6.vmpyowh
   16657     1, // llvm.hexagon.V6.vmpyowh.128B
   16658     1, // llvm.hexagon.V6.vmpyowh.64.acc
   16659     1, // llvm.hexagon.V6.vmpyowh.64.acc.128B
   16660     1, // llvm.hexagon.V6.vmpyowh.rnd
   16661     1, // llvm.hexagon.V6.vmpyowh.rnd.128B
   16662     1, // llvm.hexagon.V6.vmpyowh.rnd.sacc
   16663     1, // llvm.hexagon.V6.vmpyowh.rnd.sacc.128B
   16664     1, // llvm.hexagon.V6.vmpyowh.sacc
   16665     1, // llvm.hexagon.V6.vmpyowh.sacc.128B
   16666     1, // llvm.hexagon.V6.vmpyub
   16667     1, // llvm.hexagon.V6.vmpyub.128B
   16668     1, // llvm.hexagon.V6.vmpyub.acc
   16669     1, // llvm.hexagon.V6.vmpyub.acc.128B
   16670     1, // llvm.hexagon.V6.vmpyubv
   16671     1, // llvm.hexagon.V6.vmpyubv.128B
   16672     1, // llvm.hexagon.V6.vmpyubv.acc
   16673     1, // llvm.hexagon.V6.vmpyubv.acc.128B
   16674     1, // llvm.hexagon.V6.vmpyuh
   16675     1, // llvm.hexagon.V6.vmpyuh.128B
   16676     1, // llvm.hexagon.V6.vmpyuh.acc
   16677     1, // llvm.hexagon.V6.vmpyuh.acc.128B
   16678     1, // llvm.hexagon.V6.vmpyuhv
   16679     1, // llvm.hexagon.V6.vmpyuhv.128B
   16680     1, // llvm.hexagon.V6.vmpyuhv.acc
   16681     1, // llvm.hexagon.V6.vmpyuhv.acc.128B
   16682     1, // llvm.hexagon.V6.vmux
   16683     1, // llvm.hexagon.V6.vmux.128B
   16684     1, // llvm.hexagon.V6.vnavgh
   16685     1, // llvm.hexagon.V6.vnavgh.128B
   16686     1, // llvm.hexagon.V6.vnavgub
   16687     1, // llvm.hexagon.V6.vnavgub.128B
   16688     1, // llvm.hexagon.V6.vnavgw
   16689     1, // llvm.hexagon.V6.vnavgw.128B
   16690     1, // llvm.hexagon.V6.vnormamth
   16691     1, // llvm.hexagon.V6.vnormamth.128B
   16692     1, // llvm.hexagon.V6.vnormamtw
   16693     1, // llvm.hexagon.V6.vnormamtw.128B
   16694     1, // llvm.hexagon.V6.vnot
   16695     1, // llvm.hexagon.V6.vnot.128B
   16696     1, // llvm.hexagon.V6.vor
   16697     1, // llvm.hexagon.V6.vor.128B
   16698     1, // llvm.hexagon.V6.vpackeb
   16699     1, // llvm.hexagon.V6.vpackeb.128B
   16700     1, // llvm.hexagon.V6.vpackeh
   16701     1, // llvm.hexagon.V6.vpackeh.128B
   16702     1, // llvm.hexagon.V6.vpackhb.sat
   16703     1, // llvm.hexagon.V6.vpackhb.sat.128B
   16704     1, // llvm.hexagon.V6.vpackhub.sat
   16705     1, // llvm.hexagon.V6.vpackhub.sat.128B
   16706     1, // llvm.hexagon.V6.vpackob
   16707     1, // llvm.hexagon.V6.vpackob.128B
   16708     1, // llvm.hexagon.V6.vpackoh
   16709     1, // llvm.hexagon.V6.vpackoh.128B
   16710     1, // llvm.hexagon.V6.vpackwh.sat
   16711     1, // llvm.hexagon.V6.vpackwh.sat.128B
   16712     1, // llvm.hexagon.V6.vpackwuh.sat
   16713     1, // llvm.hexagon.V6.vpackwuh.sat.128B
   16714     1, // llvm.hexagon.V6.vpopcounth
   16715     1, // llvm.hexagon.V6.vpopcounth.128B
   16716     1, // llvm.hexagon.V6.vrdelta
   16717     1, // llvm.hexagon.V6.vrdelta.128B
   16718     1, // llvm.hexagon.V6.vrmpybus
   16719     1, // llvm.hexagon.V6.vrmpybus.128B
   16720     1, // llvm.hexagon.V6.vrmpybus.acc
   16721     1, // llvm.hexagon.V6.vrmpybus.acc.128B
   16722     1, // llvm.hexagon.V6.vrmpybusi
   16723     1, // llvm.hexagon.V6.vrmpybusi.128B
   16724     1, // llvm.hexagon.V6.vrmpybusi.acc
   16725     1, // llvm.hexagon.V6.vrmpybusi.acc.128B
   16726     1, // llvm.hexagon.V6.vrmpybusv
   16727     1, // llvm.hexagon.V6.vrmpybusv.128B
   16728     1, // llvm.hexagon.V6.vrmpybusv.acc
   16729     1, // llvm.hexagon.V6.vrmpybusv.acc.128B
   16730     1, // llvm.hexagon.V6.vrmpybv
   16731     1, // llvm.hexagon.V6.vrmpybv.128B
   16732     1, // llvm.hexagon.V6.vrmpybv.acc
   16733     1, // llvm.hexagon.V6.vrmpybv.acc.128B
   16734     1, // llvm.hexagon.V6.vrmpyub
   16735     1, // llvm.hexagon.V6.vrmpyub.128B
   16736     1, // llvm.hexagon.V6.vrmpyub.acc
   16737     1, // llvm.hexagon.V6.vrmpyub.acc.128B
   16738     1, // llvm.hexagon.V6.vrmpyubi
   16739     1, // llvm.hexagon.V6.vrmpyubi.128B
   16740     1, // llvm.hexagon.V6.vrmpyubi.acc
   16741     1, // llvm.hexagon.V6.vrmpyubi.acc.128B
   16742     1, // llvm.hexagon.V6.vrmpyubv
   16743     1, // llvm.hexagon.V6.vrmpyubv.128B
   16744     1, // llvm.hexagon.V6.vrmpyubv.acc
   16745     1, // llvm.hexagon.V6.vrmpyubv.acc.128B
   16746     1, // llvm.hexagon.V6.vror
   16747     1, // llvm.hexagon.V6.vror.128B
   16748     1, // llvm.hexagon.V6.vroundhb
   16749     1, // llvm.hexagon.V6.vroundhb.128B
   16750     1, // llvm.hexagon.V6.vroundhub
   16751     1, // llvm.hexagon.V6.vroundhub.128B
   16752     1, // llvm.hexagon.V6.vrounduhub
   16753     1, // llvm.hexagon.V6.vrounduhub.128B
   16754     1, // llvm.hexagon.V6.vrounduwuh
   16755     1, // llvm.hexagon.V6.vrounduwuh.128B
   16756     1, // llvm.hexagon.V6.vroundwh
   16757     1, // llvm.hexagon.V6.vroundwh.128B
   16758     1, // llvm.hexagon.V6.vroundwuh
   16759     1, // llvm.hexagon.V6.vroundwuh.128B
   16760     1, // llvm.hexagon.V6.vrsadubi
   16761     1, // llvm.hexagon.V6.vrsadubi.128B
   16762     1, // llvm.hexagon.V6.vrsadubi.acc
   16763     1, // llvm.hexagon.V6.vrsadubi.acc.128B
   16764     1, // llvm.hexagon.V6.vsathub
   16765     1, // llvm.hexagon.V6.vsathub.128B
   16766     1, // llvm.hexagon.V6.vsatuwuh
   16767     1, // llvm.hexagon.V6.vsatuwuh.128B
   16768     1, // llvm.hexagon.V6.vsatwh
   16769     1, // llvm.hexagon.V6.vsatwh.128B
   16770     1, // llvm.hexagon.V6.vsb
   16771     1, // llvm.hexagon.V6.vsb.128B
   16772     1, // llvm.hexagon.V6.vsh
   16773     1, // llvm.hexagon.V6.vsh.128B
   16774     1, // llvm.hexagon.V6.vshufeh
   16775     1, // llvm.hexagon.V6.vshufeh.128B
   16776     1, // llvm.hexagon.V6.vshuffb
   16777     1, // llvm.hexagon.V6.vshuffb.128B
   16778     1, // llvm.hexagon.V6.vshuffeb
   16779     1, // llvm.hexagon.V6.vshuffeb.128B
   16780     1, // llvm.hexagon.V6.vshuffh
   16781     1, // llvm.hexagon.V6.vshuffh.128B
   16782     1, // llvm.hexagon.V6.vshuffob
   16783     1, // llvm.hexagon.V6.vshuffob.128B
   16784     1, // llvm.hexagon.V6.vshuffvdd
   16785     1, // llvm.hexagon.V6.vshuffvdd.128B
   16786     1, // llvm.hexagon.V6.vshufoeb
   16787     1, // llvm.hexagon.V6.vshufoeb.128B
   16788     1, // llvm.hexagon.V6.vshufoeh
   16789     1, // llvm.hexagon.V6.vshufoeh.128B
   16790     1, // llvm.hexagon.V6.vshufoh
   16791     1, // llvm.hexagon.V6.vshufoh.128B
   16792     1, // llvm.hexagon.V6.vsubb
   16793     1, // llvm.hexagon.V6.vsubb.128B
   16794     1, // llvm.hexagon.V6.vsubb.dv
   16795     1, // llvm.hexagon.V6.vsubb.dv.128B
   16796     1, // llvm.hexagon.V6.vsubbnq
   16797     1, // llvm.hexagon.V6.vsubbnq.128B
   16798     1, // llvm.hexagon.V6.vsubbq
   16799     1, // llvm.hexagon.V6.vsubbq.128B
   16800     1, // llvm.hexagon.V6.vsubbsat
   16801     1, // llvm.hexagon.V6.vsubbsat.128B
   16802     1, // llvm.hexagon.V6.vsubbsat.dv
   16803     1, // llvm.hexagon.V6.vsubbsat.dv.128B
   16804     1, // llvm.hexagon.V6.vsubh
   16805     1, // llvm.hexagon.V6.vsubh.128B
   16806     1, // llvm.hexagon.V6.vsubh.dv
   16807     1, // llvm.hexagon.V6.vsubh.dv.128B
   16808     1, // llvm.hexagon.V6.vsubhnq
   16809     1, // llvm.hexagon.V6.vsubhnq.128B
   16810     1, // llvm.hexagon.V6.vsubhq
   16811     1, // llvm.hexagon.V6.vsubhq.128B
   16812     1, // llvm.hexagon.V6.vsubhsat
   16813     1, // llvm.hexagon.V6.vsubhsat.128B
   16814     1, // llvm.hexagon.V6.vsubhsat.dv
   16815     1, // llvm.hexagon.V6.vsubhsat.dv.128B
   16816     1, // llvm.hexagon.V6.vsubhw
   16817     1, // llvm.hexagon.V6.vsubhw.128B
   16818     1, // llvm.hexagon.V6.vsububh
   16819     1, // llvm.hexagon.V6.vsububh.128B
   16820     1, // llvm.hexagon.V6.vsububsat
   16821     1, // llvm.hexagon.V6.vsububsat.128B
   16822     1, // llvm.hexagon.V6.vsububsat.dv
   16823     1, // llvm.hexagon.V6.vsububsat.dv.128B
   16824     1, // llvm.hexagon.V6.vsubububb.sat
   16825     1, // llvm.hexagon.V6.vsubububb.sat.128B
   16826     1, // llvm.hexagon.V6.vsubuhsat
   16827     1, // llvm.hexagon.V6.vsubuhsat.128B
   16828     1, // llvm.hexagon.V6.vsubuhsat.dv
   16829     1, // llvm.hexagon.V6.vsubuhsat.dv.128B
   16830     1, // llvm.hexagon.V6.vsubuhw
   16831     1, // llvm.hexagon.V6.vsubuhw.128B
   16832     1, // llvm.hexagon.V6.vsubuwsat
   16833     1, // llvm.hexagon.V6.vsubuwsat.128B
   16834     1, // llvm.hexagon.V6.vsubuwsat.dv
   16835     1, // llvm.hexagon.V6.vsubuwsat.dv.128B
   16836     1, // llvm.hexagon.V6.vsubw
   16837     1, // llvm.hexagon.V6.vsubw.128B
   16838     1, // llvm.hexagon.V6.vsubw.dv
   16839     1, // llvm.hexagon.V6.vsubw.dv.128B
   16840     1, // llvm.hexagon.V6.vsubwnq
   16841     1, // llvm.hexagon.V6.vsubwnq.128B
   16842     1, // llvm.hexagon.V6.vsubwq
   16843     1, // llvm.hexagon.V6.vsubwq.128B
   16844     1, // llvm.hexagon.V6.vsubwsat
   16845     1, // llvm.hexagon.V6.vsubwsat.128B
   16846     1, // llvm.hexagon.V6.vsubwsat.dv
   16847     1, // llvm.hexagon.V6.vsubwsat.dv.128B
   16848     1, // llvm.hexagon.V6.vswap
   16849     1, // llvm.hexagon.V6.vswap.128B
   16850     1, // llvm.hexagon.V6.vtmpyb
   16851     1, // llvm.hexagon.V6.vtmpyb.128B
   16852     1, // llvm.hexagon.V6.vtmpyb.acc
   16853     1, // llvm.hexagon.V6.vtmpyb.acc.128B
   16854     1, // llvm.hexagon.V6.vtmpybus
   16855     1, // llvm.hexagon.V6.vtmpybus.128B
   16856     1, // llvm.hexagon.V6.vtmpybus.acc
   16857     1, // llvm.hexagon.V6.vtmpybus.acc.128B
   16858     1, // llvm.hexagon.V6.vtmpyhb
   16859     1, // llvm.hexagon.V6.vtmpyhb.128B
   16860     1, // llvm.hexagon.V6.vtmpyhb.acc
   16861     1, // llvm.hexagon.V6.vtmpyhb.acc.128B
   16862     1, // llvm.hexagon.V6.vunpackb
   16863     1, // llvm.hexagon.V6.vunpackb.128B
   16864     1, // llvm.hexagon.V6.vunpackh
   16865     1, // llvm.hexagon.V6.vunpackh.128B
   16866     1, // llvm.hexagon.V6.vunpackob
   16867     1, // llvm.hexagon.V6.vunpackob.128B
   16868     1, // llvm.hexagon.V6.vunpackoh
   16869     1, // llvm.hexagon.V6.vunpackoh.128B
   16870     1, // llvm.hexagon.V6.vunpackub
   16871     1, // llvm.hexagon.V6.vunpackub.128B
   16872     1, // llvm.hexagon.V6.vunpackuh
   16873     1, // llvm.hexagon.V6.vunpackuh.128B
   16874     1, // llvm.hexagon.V6.vxor
   16875     1, // llvm.hexagon.V6.vxor.128B
   16876     1, // llvm.hexagon.V6.vzb
   16877     1, // llvm.hexagon.V6.vzb.128B
   16878     1, // llvm.hexagon.V6.vzh
   16879     1, // llvm.hexagon.V6.vzh.128B
   16880     3, // llvm.hexagon.Y2.dccleana
   16881     3, // llvm.hexagon.Y2.dccleaninva
   16882     3, // llvm.hexagon.Y2.dcinva
   16883     36, // llvm.hexagon.Y2.dczeroa
   16884     3, // llvm.hexagon.Y4.l2fetch
   16885     3, // llvm.hexagon.Y5.l2fetch
   16886     21, // llvm.hexagon.brev.ldb
   16887     21, // llvm.hexagon.brev.ldd
   16888     21, // llvm.hexagon.brev.ldh
   16889     21, // llvm.hexagon.brev.ldub
   16890     21, // llvm.hexagon.brev.lduh
   16891     21, // llvm.hexagon.brev.ldw
   16892     21, // llvm.hexagon.brev.stb
   16893     21, // llvm.hexagon.brev.std
   16894     21, // llvm.hexagon.brev.sth
   16895     21, // llvm.hexagon.brev.sthhi
   16896     21, // llvm.hexagon.brev.stw
   16897     21, // llvm.hexagon.circ.ldb
   16898     21, // llvm.hexagon.circ.ldd
   16899     21, // llvm.hexagon.circ.ldh
   16900     21, // llvm.hexagon.circ.ldub
   16901     21, // llvm.hexagon.circ.lduh
   16902     21, // llvm.hexagon.circ.ldw
   16903     21, // llvm.hexagon.circ.stb
   16904     21, // llvm.hexagon.circ.std
   16905     21, // llvm.hexagon.circ.sth
   16906     21, // llvm.hexagon.circ.sthhi
   16907     21, // llvm.hexagon.circ.stw
   16908     21, // llvm.hexagon.mm256i.vaddw
   16909     3, // llvm.hexagon.prefetch
   16910     3, // llvm.mips.absq.s.ph
   16911     3, // llvm.mips.absq.s.qb
   16912     3, // llvm.mips.absq.s.w
   16913     1, // llvm.mips.add.a.b
   16914     1, // llvm.mips.add.a.d
   16915     1, // llvm.mips.add.a.h
   16916     1, // llvm.mips.add.a.w
   16917     1, // llvm.mips.addq.ph
   16918     1, // llvm.mips.addq.s.ph
   16919     3, // llvm.mips.addq.s.w
   16920     1, // llvm.mips.addqh.ph
   16921     1, // llvm.mips.addqh.r.ph
   16922     1, // llvm.mips.addqh.r.w
   16923     1, // llvm.mips.addqh.w
   16924     1, // llvm.mips.adds.a.b
   16925     1, // llvm.mips.adds.a.d
   16926     1, // llvm.mips.adds.a.h
   16927     1, // llvm.mips.adds.a.w
   16928     1, // llvm.mips.adds.s.b
   16929     1, // llvm.mips.adds.s.d
   16930     1, // llvm.mips.adds.s.h
   16931     1, // llvm.mips.adds.s.w
   16932     1, // llvm.mips.adds.u.b
   16933     1, // llvm.mips.adds.u.d
   16934     1, // llvm.mips.adds.u.h
   16935     1, // llvm.mips.adds.u.w
   16936     3, // llvm.mips.addsc
   16937     3, // llvm.mips.addu.ph
   16938     1, // llvm.mips.addu.qb
   16939     3, // llvm.mips.addu.s.ph
   16940     1, // llvm.mips.addu.s.qb
   16941     1, // llvm.mips.adduh.qb
   16942     1, // llvm.mips.adduh.r.qb
   16943     1, // llvm.mips.addv.b
   16944     1, // llvm.mips.addv.d
   16945     1, // llvm.mips.addv.h
   16946     1, // llvm.mips.addv.w
   16947     1, // llvm.mips.addvi.b
   16948     1, // llvm.mips.addvi.d
   16949     1, // llvm.mips.addvi.h
   16950     1, // llvm.mips.addvi.w
   16951     3, // llvm.mips.addwc
   16952     1, // llvm.mips.and.v
   16953     1, // llvm.mips.andi.b
   16954     1, // llvm.mips.append
   16955     1, // llvm.mips.asub.s.b
   16956     1, // llvm.mips.asub.s.d
   16957     1, // llvm.mips.asub.s.h
   16958     1, // llvm.mips.asub.s.w
   16959     1, // llvm.mips.asub.u.b
   16960     1, // llvm.mips.asub.u.d
   16961     1, // llvm.mips.asub.u.h
   16962     1, // llvm.mips.asub.u.w
   16963     1, // llvm.mips.ave.s.b
   16964     1, // llvm.mips.ave.s.d
   16965     1, // llvm.mips.ave.s.h
   16966     1, // llvm.mips.ave.s.w
   16967     1, // llvm.mips.ave.u.b
   16968     1, // llvm.mips.ave.u.d
   16969     1, // llvm.mips.ave.u.h
   16970     1, // llvm.mips.ave.u.w
   16971     1, // llvm.mips.aver.s.b
   16972     1, // llvm.mips.aver.s.d
   16973     1, // llvm.mips.aver.s.h
   16974     1, // llvm.mips.aver.s.w
   16975     1, // llvm.mips.aver.u.b
   16976     1, // llvm.mips.aver.u.d
   16977     1, // llvm.mips.aver.u.h
   16978     1, // llvm.mips.aver.u.w
   16979     1, // llvm.mips.balign
   16980     1, // llvm.mips.bclr.b
   16981     1, // llvm.mips.bclr.d
   16982     1, // llvm.mips.bclr.h
   16983     1, // llvm.mips.bclr.w
   16984     1, // llvm.mips.bclri.b
   16985     1, // llvm.mips.bclri.d
   16986     1, // llvm.mips.bclri.h
   16987     1, // llvm.mips.bclri.w
   16988     1, // llvm.mips.binsl.b
   16989     1, // llvm.mips.binsl.d
   16990     1, // llvm.mips.binsl.h
   16991     1, // llvm.mips.binsl.w
   16992     1, // llvm.mips.binsli.b
   16993     1, // llvm.mips.binsli.d
   16994     1, // llvm.mips.binsli.h
   16995     1, // llvm.mips.binsli.w
   16996     1, // llvm.mips.binsr.b
   16997     1, // llvm.mips.binsr.d
   16998     1, // llvm.mips.binsr.h
   16999     1, // llvm.mips.binsr.w
   17000     1, // llvm.mips.binsri.b
   17001     1, // llvm.mips.binsri.d
   17002     1, // llvm.mips.binsri.h
   17003     1, // llvm.mips.binsri.w
   17004     1, // llvm.mips.bitrev
   17005     1, // llvm.mips.bmnz.v
   17006     1, // llvm.mips.bmnzi.b
   17007     1, // llvm.mips.bmz.v
   17008     1, // llvm.mips.bmzi.b
   17009     1, // llvm.mips.bneg.b
   17010     1, // llvm.mips.bneg.d
   17011     1, // llvm.mips.bneg.h
   17012     1, // llvm.mips.bneg.w
   17013     1, // llvm.mips.bnegi.b
   17014     1, // llvm.mips.bnegi.d
   17015     1, // llvm.mips.bnegi.h
   17016     1, // llvm.mips.bnegi.w
   17017     1, // llvm.mips.bnz.b
   17018     1, // llvm.mips.bnz.d
   17019     1, // llvm.mips.bnz.h
   17020     1, // llvm.mips.bnz.v
   17021     1, // llvm.mips.bnz.w
   17022     16, // llvm.mips.bposge32
   17023     1, // llvm.mips.bsel.v
   17024     1, // llvm.mips.bseli.b
   17025     1, // llvm.mips.bset.b
   17026     1, // llvm.mips.bset.d
   17027     1, // llvm.mips.bset.h
   17028     1, // llvm.mips.bset.w
   17029     1, // llvm.mips.bseti.b
   17030     1, // llvm.mips.bseti.d
   17031     1, // llvm.mips.bseti.h
   17032     1, // llvm.mips.bseti.w
   17033     1, // llvm.mips.bz.b
   17034     1, // llvm.mips.bz.d
   17035     1, // llvm.mips.bz.h
   17036     1, // llvm.mips.bz.v
   17037     1, // llvm.mips.bz.w
   17038     1, // llvm.mips.ceq.b
   17039     1, // llvm.mips.ceq.d
   17040     1, // llvm.mips.ceq.h
   17041     1, // llvm.mips.ceq.w
   17042     1, // llvm.mips.ceqi.b
   17043     1, // llvm.mips.ceqi.d
   17044     1, // llvm.mips.ceqi.h
   17045     1, // llvm.mips.ceqi.w
   17046     3, // llvm.mips.cfcmsa
   17047     1, // llvm.mips.cle.s.b
   17048     1, // llvm.mips.cle.s.d
   17049     1, // llvm.mips.cle.s.h
   17050     1, // llvm.mips.cle.s.w
   17051     1, // llvm.mips.cle.u.b
   17052     1, // llvm.mips.cle.u.d
   17053     1, // llvm.mips.cle.u.h
   17054     1, // llvm.mips.cle.u.w
   17055     1, // llvm.mips.clei.s.b
   17056     1, // llvm.mips.clei.s.d
   17057     1, // llvm.mips.clei.s.h
   17058     1, // llvm.mips.clei.s.w
   17059     1, // llvm.mips.clei.u.b
   17060     1, // llvm.mips.clei.u.d
   17061     1, // llvm.mips.clei.u.h
   17062     1, // llvm.mips.clei.u.w
   17063     1, // llvm.mips.clt.s.b
   17064     1, // llvm.mips.clt.s.d
   17065     1, // llvm.mips.clt.s.h
   17066     1, // llvm.mips.clt.s.w
   17067     1, // llvm.mips.clt.u.b
   17068     1, // llvm.mips.clt.u.d
   17069     1, // llvm.mips.clt.u.h
   17070     1, // llvm.mips.clt.u.w
   17071     1, // llvm.mips.clti.s.b
   17072     1, // llvm.mips.clti.s.d
   17073     1, // llvm.mips.clti.s.h
   17074     1, // llvm.mips.clti.s.w
   17075     1, // llvm.mips.clti.u.b
   17076     1, // llvm.mips.clti.u.d
   17077     1, // llvm.mips.clti.u.h
   17078     1, // llvm.mips.clti.u.w
   17079     3, // llvm.mips.cmp.eq.ph
   17080     3, // llvm.mips.cmp.le.ph
   17081     3, // llvm.mips.cmp.lt.ph
   17082     3, // llvm.mips.cmpgdu.eq.qb
   17083     3, // llvm.mips.cmpgdu.le.qb
   17084     3, // llvm.mips.cmpgdu.lt.qb
   17085     3, // llvm.mips.cmpgu.eq.qb
   17086     3, // llvm.mips.cmpgu.le.qb
   17087     3, // llvm.mips.cmpgu.lt.qb
   17088     3, // llvm.mips.cmpu.eq.qb
   17089     3, // llvm.mips.cmpu.le.qb
   17090     3, // llvm.mips.cmpu.lt.qb
   17091     1, // llvm.mips.copy.s.b
   17092     1, // llvm.mips.copy.s.d
   17093     1, // llvm.mips.copy.s.h
   17094     1, // llvm.mips.copy.s.w
   17095     1, // llvm.mips.copy.u.b
   17096     1, // llvm.mips.copy.u.d
   17097     1, // llvm.mips.copy.u.h
   17098     1, // llvm.mips.copy.u.w
   17099     3, // llvm.mips.ctcmsa
   17100     1, // llvm.mips.div.s.b
   17101     1, // llvm.mips.div.s.d
   17102     1, // llvm.mips.div.s.h
   17103     1, // llvm.mips.div.s.w
   17104     1, // llvm.mips.div.u.b
   17105     1, // llvm.mips.div.u.d
   17106     1, // llvm.mips.div.u.h
   17107     1, // llvm.mips.div.u.w
   17108     1, // llvm.mips.dlsa
   17109     1, // llvm.mips.dotp.s.d
   17110     1, // llvm.mips.dotp.s.h
   17111     1, // llvm.mips.dotp.s.w
   17112     1, // llvm.mips.dotp.u.d
   17113     1, // llvm.mips.dotp.u.h
   17114     1, // llvm.mips.dotp.u.w
   17115     1, // llvm.mips.dpa.w.ph
   17116     1, // llvm.mips.dpadd.s.d
   17117     1, // llvm.mips.dpadd.s.h
   17118     1, // llvm.mips.dpadd.s.w
   17119     1, // llvm.mips.dpadd.u.d
   17120     1, // llvm.mips.dpadd.u.h
   17121     1, // llvm.mips.dpadd.u.w
   17122     3, // llvm.mips.dpaq.s.w.ph
   17123     3, // llvm.mips.dpaq.sa.l.w
   17124     3, // llvm.mips.dpaqx.s.w.ph
   17125     3, // llvm.mips.dpaqx.sa.w.ph
   17126     1, // llvm.mips.dpau.h.qbl
   17127     1, // llvm.mips.dpau.h.qbr
   17128     1, // llvm.mips.dpax.w.ph
   17129     1, // llvm.mips.dps.w.ph
   17130     3, // llvm.mips.dpsq.s.w.ph
   17131     3, // llvm.mips.dpsq.sa.l.w
   17132     3, // llvm.mips.dpsqx.s.w.ph
   17133     3, // llvm.mips.dpsqx.sa.w.ph
   17134     1, // llvm.mips.dpsu.h.qbl
   17135     1, // llvm.mips.dpsu.h.qbr
   17136     1, // llvm.mips.dpsub.s.d
   17137     1, // llvm.mips.dpsub.s.h
   17138     1, // llvm.mips.dpsub.s.w
   17139     1, // llvm.mips.dpsub.u.d
   17140     1, // llvm.mips.dpsub.u.h
   17141     1, // llvm.mips.dpsub.u.w
   17142     1, // llvm.mips.dpsx.w.ph
   17143     3, // llvm.mips.extp
   17144     3, // llvm.mips.extpdp
   17145     3, // llvm.mips.extr.r.w
   17146     3, // llvm.mips.extr.rs.w
   17147     3, // llvm.mips.extr.s.h
   17148     3, // llvm.mips.extr.w
   17149     1, // llvm.mips.fadd.d
   17150     1, // llvm.mips.fadd.w
   17151     1, // llvm.mips.fcaf.d
   17152     1, // llvm.mips.fcaf.w
   17153     1, // llvm.mips.fceq.d
   17154     1, // llvm.mips.fceq.w
   17155     1, // llvm.mips.fclass.d
   17156     1, // llvm.mips.fclass.w
   17157     1, // llvm.mips.fcle.d
   17158     1, // llvm.mips.fcle.w
   17159     1, // llvm.mips.fclt.d
   17160     1, // llvm.mips.fclt.w
   17161     1, // llvm.mips.fcne.d
   17162     1, // llvm.mips.fcne.w
   17163     1, // llvm.mips.fcor.d
   17164     1, // llvm.mips.fcor.w
   17165     1, // llvm.mips.fcueq.d
   17166     1, // llvm.mips.fcueq.w
   17167     1, // llvm.mips.fcule.d
   17168     1, // llvm.mips.fcule.w
   17169     1, // llvm.mips.fcult.d
   17170     1, // llvm.mips.fcult.w
   17171     1, // llvm.mips.fcun.d
   17172     1, // llvm.mips.fcun.w
   17173     1, // llvm.mips.fcune.d
   17174     1, // llvm.mips.fcune.w
   17175     1, // llvm.mips.fdiv.d
   17176     1, // llvm.mips.fdiv.w
   17177     1, // llvm.mips.fexdo.h
   17178     1, // llvm.mips.fexdo.w
   17179     1, // llvm.mips.fexp2.d
   17180     1, // llvm.mips.fexp2.w
   17181     1, // llvm.mips.fexupl.d
   17182     1, // llvm.mips.fexupl.w
   17183     1, // llvm.mips.fexupr.d
   17184     1, // llvm.mips.fexupr.w
   17185     1, // llvm.mips.ffint.s.d
   17186     1, // llvm.mips.ffint.s.w
   17187     1, // llvm.mips.ffint.u.d
   17188     1, // llvm.mips.ffint.u.w
   17189     1, // llvm.mips.ffql.d
   17190     1, // llvm.mips.ffql.w
   17191     1, // llvm.mips.ffqr.d
   17192     1, // llvm.mips.ffqr.w
   17193     1, // llvm.mips.fill.b
   17194     1, // llvm.mips.fill.d
   17195     1, // llvm.mips.fill.h
   17196     1, // llvm.mips.fill.w
   17197     1, // llvm.mips.flog2.d
   17198     1, // llvm.mips.flog2.w
   17199     1, // llvm.mips.fmadd.d
   17200     1, // llvm.mips.fmadd.w
   17201     1, // llvm.mips.fmax.a.d
   17202     1, // llvm.mips.fmax.a.w
   17203     1, // llvm.mips.fmax.d
   17204     1, // llvm.mips.fmax.w
   17205     1, // llvm.mips.fmin.a.d
   17206     1, // llvm.mips.fmin.a.w
   17207     1, // llvm.mips.fmin.d
   17208     1, // llvm.mips.fmin.w
   17209     1, // llvm.mips.fmsub.d
   17210     1, // llvm.mips.fmsub.w
   17211     1, // llvm.mips.fmul.d
   17212     1, // llvm.mips.fmul.w
   17213     1, // llvm.mips.frcp.d
   17214     1, // llvm.mips.frcp.w
   17215     1, // llvm.mips.frint.d
   17216     1, // llvm.mips.frint.w
   17217     1, // llvm.mips.frsqrt.d
   17218     1, // llvm.mips.frsqrt.w
   17219     1, // llvm.mips.fsaf.d
   17220     1, // llvm.mips.fsaf.w
   17221     1, // llvm.mips.fseq.d
   17222     1, // llvm.mips.fseq.w
   17223     1, // llvm.mips.fsle.d
   17224     1, // llvm.mips.fsle.w
   17225     1, // llvm.mips.fslt.d
   17226     1, // llvm.mips.fslt.w
   17227     1, // llvm.mips.fsne.d
   17228     1, // llvm.mips.fsne.w
   17229     1, // llvm.mips.fsor.d
   17230     1, // llvm.mips.fsor.w
   17231     1, // llvm.mips.fsqrt.d
   17232     1, // llvm.mips.fsqrt.w
   17233     1, // llvm.mips.fsub.d
   17234     1, // llvm.mips.fsub.w
   17235     1, // llvm.mips.fsueq.d
   17236     1, // llvm.mips.fsueq.w
   17237     1, // llvm.mips.fsule.d
   17238     1, // llvm.mips.fsule.w
   17239     1, // llvm.mips.fsult.d
   17240     1, // llvm.mips.fsult.w
   17241     1, // llvm.mips.fsun.d
   17242     1, // llvm.mips.fsun.w
   17243     1, // llvm.mips.fsune.d
   17244     1, // llvm.mips.fsune.w
   17245     1, // llvm.mips.ftint.s.d
   17246     1, // llvm.mips.ftint.s.w
   17247     1, // llvm.mips.ftint.u.d
   17248     1, // llvm.mips.ftint.u.w
   17249     1, // llvm.mips.ftq.h
   17250     1, // llvm.mips.ftq.w
   17251     1, // llvm.mips.ftrunc.s.d
   17252     1, // llvm.mips.ftrunc.s.w
   17253     1, // llvm.mips.ftrunc.u.d
   17254     1, // llvm.mips.ftrunc.u.w
   17255     1, // llvm.mips.hadd.s.d
   17256     1, // llvm.mips.hadd.s.h
   17257     1, // llvm.mips.hadd.s.w
   17258     1, // llvm.mips.hadd.u.d
   17259     1, // llvm.mips.hadd.u.h
   17260     1, // llvm.mips.hadd.u.w
   17261     1, // llvm.mips.hsub.s.d
   17262     1, // llvm.mips.hsub.s.h
   17263     1, // llvm.mips.hsub.s.w
   17264     1, // llvm.mips.hsub.u.d
   17265     1, // llvm.mips.hsub.u.h
   17266     1, // llvm.mips.hsub.u.w
   17267     1, // llvm.mips.ilvev.b
   17268     1, // llvm.mips.ilvev.d
   17269     1, // llvm.mips.ilvev.h
   17270     1, // llvm.mips.ilvev.w
   17271     1, // llvm.mips.ilvl.b
   17272     1, // llvm.mips.ilvl.d
   17273     1, // llvm.mips.ilvl.h
   17274     1, // llvm.mips.ilvl.w
   17275     1, // llvm.mips.ilvod.b
   17276     1, // llvm.mips.ilvod.d
   17277     1, // llvm.mips.ilvod.h
   17278     1, // llvm.mips.ilvod.w
   17279     1, // llvm.mips.ilvr.b
   17280     1, // llvm.mips.ilvr.d
   17281     1, // llvm.mips.ilvr.h
   17282     1, // llvm.mips.ilvr.w
   17283     1, // llvm.mips.insert.b
   17284     1, // llvm.mips.insert.d
   17285     1, // llvm.mips.insert.h
   17286     1, // llvm.mips.insert.w
   17287     16, // llvm.mips.insv
   17288     1, // llvm.mips.insve.b
   17289     1, // llvm.mips.insve.d
   17290     1, // llvm.mips.insve.h
   17291     1, // llvm.mips.insve.w
   17292     2, // llvm.mips.lbux
   17293     2, // llvm.mips.ld.b
   17294     2, // llvm.mips.ld.d
   17295     2, // llvm.mips.ld.h
   17296     2, // llvm.mips.ld.w
   17297     1, // llvm.mips.ldi.b
   17298     1, // llvm.mips.ldi.d
   17299     1, // llvm.mips.ldi.h
   17300     1, // llvm.mips.ldi.w
   17301     2, // llvm.mips.lhx
   17302     1, // llvm.mips.lsa
   17303     2, // llvm.mips.lwx
   17304     1, // llvm.mips.madd
   17305     1, // llvm.mips.madd.q.h
   17306     1, // llvm.mips.madd.q.w
   17307     1, // llvm.mips.maddr.q.h
   17308     1, // llvm.mips.maddr.q.w
   17309     1, // llvm.mips.maddu
   17310     1, // llvm.mips.maddv.b
   17311     1, // llvm.mips.maddv.d
   17312     1, // llvm.mips.maddv.h
   17313     1, // llvm.mips.maddv.w
   17314     3, // llvm.mips.maq.s.w.phl
   17315     3, // llvm.mips.maq.s.w.phr
   17316     3, // llvm.mips.maq.sa.w.phl
   17317     3, // llvm.mips.maq.sa.w.phr
   17318     1, // llvm.mips.max.a.b
   17319     1, // llvm.mips.max.a.d
   17320     1, // llvm.mips.max.a.h
   17321     1, // llvm.mips.max.a.w
   17322     1, // llvm.mips.max.s.b
   17323     1, // llvm.mips.max.s.d
   17324     1, // llvm.mips.max.s.h
   17325     1, // llvm.mips.max.s.w
   17326     1, // llvm.mips.max.u.b
   17327     1, // llvm.mips.max.u.d
   17328     1, // llvm.mips.max.u.h
   17329     1, // llvm.mips.max.u.w
   17330     1, // llvm.mips.maxi.s.b
   17331     1, // llvm.mips.maxi.s.d
   17332     1, // llvm.mips.maxi.s.h
   17333     1, // llvm.mips.maxi.s.w
   17334     1, // llvm.mips.maxi.u.b
   17335     1, // llvm.mips.maxi.u.d
   17336     1, // llvm.mips.maxi.u.h
   17337     1, // llvm.mips.maxi.u.w
   17338     1, // llvm.mips.min.a.b
   17339     1, // llvm.mips.min.a.d
   17340     1, // llvm.mips.min.a.h
   17341     1, // llvm.mips.min.a.w
   17342     1, // llvm.mips.min.s.b
   17343     1, // llvm.mips.min.s.d
   17344     1, // llvm.mips.min.s.h
   17345     1, // llvm.mips.min.s.w
   17346     1, // llvm.mips.min.u.b
   17347     1, // llvm.mips.min.u.d
   17348     1, // llvm.mips.min.u.h
   17349     1, // llvm.mips.min.u.w
   17350     1, // llvm.mips.mini.s.b
   17351     1, // llvm.mips.mini.s.d
   17352     1, // llvm.mips.mini.s.h
   17353     1, // llvm.mips.mini.s.w
   17354     1, // llvm.mips.mini.u.b
   17355     1, // llvm.mips.mini.u.d
   17356     1, // llvm.mips.mini.u.h
   17357     1, // llvm.mips.mini.u.w
   17358     1, // llvm.mips.mod.s.b
   17359     1, // llvm.mips.mod.s.d
   17360     1, // llvm.mips.mod.s.h
   17361     1, // llvm.mips.mod.s.w
   17362     1, // llvm.mips.mod.u.b
   17363     1, // llvm.mips.mod.u.d
   17364     1, // llvm.mips.mod.u.h
   17365     1, // llvm.mips.mod.u.w
   17366     1, // llvm.mips.modsub
   17367     1, // llvm.mips.move.v
   17368     1, // llvm.mips.msub
   17369     1, // llvm.mips.msub.q.h
   17370     1, // llvm.mips.msub.q.w
   17371     1, // llvm.mips.msubr.q.h
   17372     1, // llvm.mips.msubr.q.w
   17373     1, // llvm.mips.msubu
   17374     1, // llvm.mips.msubv.b
   17375     1, // llvm.mips.msubv.d
   17376     1, // llvm.mips.msubv.h
   17377     1, // llvm.mips.msubv.w
   17378     3, // llvm.mips.mthlip
   17379     3, // llvm.mips.mul.ph
   17380     1, // llvm.mips.mul.q.h
   17381     1, // llvm.mips.mul.q.w
   17382     3, // llvm.mips.mul.s.ph
   17383     3, // llvm.mips.muleq.s.w.phl
   17384     3, // llvm.mips.muleq.s.w.phr
   17385     3, // llvm.mips.muleu.s.ph.qbl
   17386     3, // llvm.mips.muleu.s.ph.qbr
   17387     3, // llvm.mips.mulq.rs.ph
   17388     3, // llvm.mips.mulq.rs.w
   17389     3, // llvm.mips.mulq.s.ph
   17390     3, // llvm.mips.mulq.s.w
   17391     1, // llvm.mips.mulr.q.h
   17392     1, // llvm.mips.mulr.q.w
   17393     1, // llvm.mips.mulsa.w.ph
   17394     3, // llvm.mips.mulsaq.s.w.ph
   17395     1, // llvm.mips.mult
   17396     1, // llvm.mips.multu
   17397     1, // llvm.mips.mulv.b
   17398     1, // llvm.mips.mulv.d
   17399     1, // llvm.mips.mulv.h
   17400     1, // llvm.mips.mulv.w
   17401     1, // llvm.mips.nloc.b
   17402     1, // llvm.mips.nloc.d
   17403     1, // llvm.mips.nloc.h
   17404     1, // llvm.mips.nloc.w
   17405     1, // llvm.mips.nlzc.b
   17406     1, // llvm.mips.nlzc.d
   17407     1, // llvm.mips.nlzc.h
   17408     1, // llvm.mips.nlzc.w
   17409     1, // llvm.mips.nor.v
   17410     1, // llvm.mips.nori.b
   17411     1, // llvm.mips.or.v
   17412     1, // llvm.mips.ori.b
   17413     1, // llvm.mips.packrl.ph
   17414     1, // llvm.mips.pckev.b
   17415     1, // llvm.mips.pckev.d
   17416     1, // llvm.mips.pckev.h
   17417     1, // llvm.mips.pckev.w
   17418     1, // llvm.mips.pckod.b
   17419     1, // llvm.mips.pckod.d
   17420     1, // llvm.mips.pckod.h
   17421     1, // llvm.mips.pckod.w
   17422     1, // llvm.mips.pcnt.b
   17423     1, // llvm.mips.pcnt.d
   17424     1, // llvm.mips.pcnt.h
   17425     1, // llvm.mips.pcnt.w
   17426     16, // llvm.mips.pick.ph
   17427     16, // llvm.mips.pick.qb
   17428     1, // llvm.mips.preceq.w.phl
   17429     1, // llvm.mips.preceq.w.phr
   17430     1, // llvm.mips.precequ.ph.qbl
   17431     1, // llvm.mips.precequ.ph.qbla
   17432     1, // llvm.mips.precequ.ph.qbr
   17433     1, // llvm.mips.precequ.ph.qbra
   17434     1, // llvm.mips.preceu.ph.qbl
   17435     1, // llvm.mips.preceu.ph.qbla
   17436     1, // llvm.mips.preceu.ph.qbr
   17437     1, // llvm.mips.preceu.ph.qbra
   17438     3, // llvm.mips.precr.qb.ph
   17439     1, // llvm.mips.precr.sra.ph.w
   17440     1, // llvm.mips.precr.sra.r.ph.w
   17441     1, // llvm.mips.precrq.ph.w
   17442     1, // llvm.mips.precrq.qb.ph
   17443     3, // llvm.mips.precrq.rs.ph.w
   17444     3, // llvm.mips.precrqu.s.qb.ph
   17445     1, // llvm.mips.prepend
   17446     1, // llvm.mips.raddu.w.qb
   17447     16, // llvm.mips.rddsp
   17448     1, // llvm.mips.repl.ph
   17449     1, // llvm.mips.repl.qb
   17450     1, // llvm.mips.sat.s.b
   17451     1, // llvm.mips.sat.s.d
   17452     1, // llvm.mips.sat.s.h
   17453     1, // llvm.mips.sat.s.w
   17454     1, // llvm.mips.sat.u.b
   17455     1, // llvm.mips.sat.u.d
   17456     1, // llvm.mips.sat.u.h
   17457     1, // llvm.mips.sat.u.w
   17458     1, // llvm.mips.shf.b
   17459     1, // llvm.mips.shf.h
   17460     1, // llvm.mips.shf.w
   17461     1, // llvm.mips.shilo
   17462     3, // llvm.mips.shll.ph
   17463     3, // llvm.mips.shll.qb
   17464     3, // llvm.mips.shll.s.ph
   17465     3, // llvm.mips.shll.s.w
   17466     1, // llvm.mips.shra.ph
   17467     1, // llvm.mips.shra.qb
   17468     1, // llvm.mips.shra.r.ph
   17469     1, // llvm.mips.shra.r.qb
   17470     1, // llvm.mips.shra.r.w
   17471     1, // llvm.mips.shrl.ph
   17472     1, // llvm.mips.shrl.qb
   17473     1, // llvm.mips.sld.b
   17474     1, // llvm.mips.sld.d
   17475     1, // llvm.mips.sld.h
   17476     1, // llvm.mips.sld.w
   17477     1, // llvm.mips.sldi.b
   17478     1, // llvm.mips.sldi.d
   17479     1, // llvm.mips.sldi.h
   17480     1, // llvm.mips.sldi.w
   17481     1, // llvm.mips.sll.b
   17482     1, // llvm.mips.sll.d
   17483     1, // llvm.mips.sll.h
   17484     1, // llvm.mips.sll.w
   17485     1, // llvm.mips.slli.b
   17486     1, // llvm.mips.slli.d
   17487     1, // llvm.mips.slli.h
   17488     1, // llvm.mips.slli.w
   17489     1, // llvm.mips.splat.b
   17490     1, // llvm.mips.splat.d
   17491     1, // llvm.mips.splat.h
   17492     1, // llvm.mips.splat.w
   17493     1, // llvm.mips.splati.b
   17494     1, // llvm.mips.splati.d
   17495     1, // llvm.mips.splati.h
   17496     1, // llvm.mips.splati.w
   17497     1, // llvm.mips.sra.b
   17498     1, // llvm.mips.sra.d
   17499     1, // llvm.mips.sra.h
   17500     1, // llvm.mips.sra.w
   17501     1, // llvm.mips.srai.b
   17502     1, // llvm.mips.srai.d
   17503     1, // llvm.mips.srai.h
   17504     1, // llvm.mips.srai.w
   17505     1, // llvm.mips.srar.b
   17506     1, // llvm.mips.srar.d
   17507     1, // llvm.mips.srar.h
   17508     1, // llvm.mips.srar.w
   17509     1, // llvm.mips.srari.b
   17510     1, // llvm.mips.srari.d
   17511     1, // llvm.mips.srari.h
   17512     1, // llvm.mips.srari.w
   17513     1, // llvm.mips.srl.b
   17514     1, // llvm.mips.srl.d
   17515     1, // llvm.mips.srl.h
   17516     1, // llvm.mips.srl.w
   17517     1, // llvm.mips.srli.b
   17518     1, // llvm.mips.srli.d
   17519     1, // llvm.mips.srli.h
   17520     1, // llvm.mips.srli.w
   17521     1, // llvm.mips.srlr.b
   17522     1, // llvm.mips.srlr.d
   17523     1, // llvm.mips.srlr.h
   17524     1, // llvm.mips.srlr.w
   17525     1, // llvm.mips.srlri.b
   17526     1, // llvm.mips.srlri.d
   17527     1, // llvm.mips.srlri.h
   17528     1, // llvm.mips.srlri.w
   17529     21, // llvm.mips.st.b
   17530     21, // llvm.mips.st.d
   17531     21, // llvm.mips.st.h
   17532     21, // llvm.mips.st.w
   17533     1, // llvm.mips.subq.ph
   17534     1, // llvm.mips.subq.s.ph
   17535     3, // llvm.mips.subq.s.w
   17536     1, // llvm.mips.subqh.ph
   17537     1, // llvm.mips.subqh.r.ph
   17538     1, // llvm.mips.subqh.r.w
   17539     1, // llvm.mips.subqh.w
   17540     1, // llvm.mips.subs.s.b
   17541     1, // llvm.mips.subs.s.d
   17542     1, // llvm.mips.subs.s.h
   17543     1, // llvm.mips.subs.s.w
   17544     1, // llvm.mips.subs.u.b
   17545     1, // llvm.mips.subs.u.d
   17546     1, // llvm.mips.subs.u.h
   17547     1, // llvm.mips.subs.u.w
   17548     1, // llvm.mips.subsus.u.b
   17549     1, // llvm.mips.subsus.u.d
   17550     1, // llvm.mips.subsus.u.h
   17551     1, // llvm.mips.subsus.u.w
   17552     1, // llvm.mips.subsuu.s.b
   17553     1, // llvm.mips.subsuu.s.d
   17554     1, // llvm.mips.subsuu.s.h
   17555     1, // llvm.mips.subsuu.s.w
   17556     3, // llvm.mips.subu.ph
   17557     1, // llvm.mips.subu.qb
   17558     3, // llvm.mips.subu.s.ph
   17559     1, // llvm.mips.subu.s.qb
   17560     1, // llvm.mips.subuh.qb
   17561     1, // llvm.mips.subuh.r.qb
   17562     1, // llvm.mips.subv.b
   17563     1, // llvm.mips.subv.d
   17564     1, // llvm.mips.subv.h
   17565     1, // llvm.mips.subv.w
   17566     1, // llvm.mips.subvi.b
   17567     1, // llvm.mips.subvi.d
   17568     1, // llvm.mips.subvi.h
   17569     1, // llvm.mips.subvi.w
   17570     1, // llvm.mips.vshf.b
   17571     1, // llvm.mips.vshf.d
   17572     1, // llvm.mips.vshf.h
   17573     1, // llvm.mips.vshf.w
   17574     3, // llvm.mips.wrdsp
   17575     1, // llvm.mips.xor.v
   17576     1, // llvm.mips.xori.b
   17577     1, // llvm.nvvm.add.rm.d
   17578     1, // llvm.nvvm.add.rm.f
   17579     1, // llvm.nvvm.add.rm.ftz.f
   17580     1, // llvm.nvvm.add.rn.d
   17581     1, // llvm.nvvm.add.rn.f
   17582     1, // llvm.nvvm.add.rn.ftz.f
   17583     1, // llvm.nvvm.add.rp.d
   17584     1, // llvm.nvvm.add.rp.f
   17585     1, // llvm.nvvm.add.rp.ftz.f
   17586     1, // llvm.nvvm.add.rz.d
   17587     1, // llvm.nvvm.add.rz.f
   17588     1, // llvm.nvvm.add.rz.ftz.f
   17589     18, // llvm.nvvm.atomic.add.gen.f.cta
   17590     18, // llvm.nvvm.atomic.add.gen.f.sys
   17591     18, // llvm.nvvm.atomic.add.gen.i.cta
   17592     18, // llvm.nvvm.atomic.add.gen.i.sys
   17593     18, // llvm.nvvm.atomic.and.gen.i.cta
   17594     18, // llvm.nvvm.atomic.and.gen.i.sys
   17595     18, // llvm.nvvm.atomic.cas.gen.i.cta
   17596     18, // llvm.nvvm.atomic.cas.gen.i.sys
   17597     18, // llvm.nvvm.atomic.dec.gen.i.cta
   17598     18, // llvm.nvvm.atomic.dec.gen.i.sys
   17599     18, // llvm.nvvm.atomic.exch.gen.i.cta
   17600     18, // llvm.nvvm.atomic.exch.gen.i.sys
   17601     18, // llvm.nvvm.atomic.inc.gen.i.cta
   17602     18, // llvm.nvvm.atomic.inc.gen.i.sys
   17603     18, // llvm.nvvm.atomic.load.add.f32
   17604     18, // llvm.nvvm.atomic.load.dec.32
   17605     18, // llvm.nvvm.atomic.load.inc.32
   17606     18, // llvm.nvvm.atomic.max.gen.i.cta
   17607     18, // llvm.nvvm.atomic.max.gen.i.sys
   17608     18, // llvm.nvvm.atomic.min.gen.i.cta
   17609     18, // llvm.nvvm.atomic.min.gen.i.sys
   17610     18, // llvm.nvvm.atomic.or.gen.i.cta
   17611     18, // llvm.nvvm.atomic.or.gen.i.sys
   17612     18, // llvm.nvvm.atomic.xor.gen.i.cta
   17613     18, // llvm.nvvm.atomic.xor.gen.i.sys
   17614     33, // llvm.nvvm.bar.sync
   17615     33, // llvm.nvvm.bar.warp.sync
   17616     33, // llvm.nvvm.barrier
   17617     33, // llvm.nvvm.barrier.n
   17618     33, // llvm.nvvm.barrier.sync
   17619     33, // llvm.nvvm.barrier.sync.cnt
   17620     33, // llvm.nvvm.barrier0
   17621     33, // llvm.nvvm.barrier0.and
   17622     33, // llvm.nvvm.barrier0.or
   17623     33, // llvm.nvvm.barrier0.popc
   17624     1, // llvm.nvvm.bitcast.d2ll
   17625     1, // llvm.nvvm.bitcast.f2i
   17626     1, // llvm.nvvm.bitcast.i2f
   17627     1, // llvm.nvvm.bitcast.ll2d
   17628     1, // llvm.nvvm.ceil.d
   17629     1, // llvm.nvvm.ceil.f
   17630     1, // llvm.nvvm.ceil.ftz.f
   17631     3, // llvm.nvvm.compiler.error
   17632     3, // llvm.nvvm.compiler.warn
   17633     1, // llvm.nvvm.cos.approx.f
   17634     1, // llvm.nvvm.cos.approx.ftz.f
   17635     1, // llvm.nvvm.d2f.rm
   17636     1, // llvm.nvvm.d2f.rm.ftz
   17637     1, // llvm.nvvm.d2f.rn
   17638     1, // llvm.nvvm.d2f.rn.ftz
   17639     1, // llvm.nvvm.d2f.rp
   17640     1, // llvm.nvvm.d2f.rp.ftz
   17641     1, // llvm.nvvm.d2f.rz
   17642     1, // llvm.nvvm.d2f.rz.ftz
   17643     1, // llvm.nvvm.d2i.hi
   17644     1, // llvm.nvvm.d2i.lo
   17645     1, // llvm.nvvm.d2i.rm
   17646     1, // llvm.nvvm.d2i.rn
   17647     1, // llvm.nvvm.d2i.rp
   17648     1, // llvm.nvvm.d2i.rz
   17649     1, // llvm.nvvm.d2ll.rm
   17650     1, // llvm.nvvm.d2ll.rn
   17651     1, // llvm.nvvm.d2ll.rp
   17652     1, // llvm.nvvm.d2ll.rz
   17653     1, // llvm.nvvm.d2ui.rm
   17654     1, // llvm.nvvm.d2ui.rn
   17655     1, // llvm.nvvm.d2ui.rp
   17656     1, // llvm.nvvm.d2ui.rz
   17657     1, // llvm.nvvm.d2ull.rm
   17658     1, // llvm.nvvm.d2ull.rn
   17659     1, // llvm.nvvm.d2ull.rp
   17660     1, // llvm.nvvm.d2ull.rz
   17661     1, // llvm.nvvm.div.approx.f
   17662     1, // llvm.nvvm.div.approx.ftz.f
   17663     1, // llvm.nvvm.div.rm.d
   17664     1, // llvm.nvvm.div.rm.f
   17665     1, // llvm.nvvm.div.rm.ftz.f
   17666     1, // llvm.nvvm.div.rn.d
   17667     1, // llvm.nvvm.div.rn.f
   17668     1, // llvm.nvvm.div.rn.ftz.f
   17669     1, // llvm.nvvm.div.rp.d
   17670     1, // llvm.nvvm.div.rp.f
   17671     1, // llvm.nvvm.div.rp.ftz.f
   17672     1, // llvm.nvvm.div.rz.d
   17673     1, // llvm.nvvm.div.rz.f
   17674     1, // llvm.nvvm.div.rz.ftz.f
   17675     1, // llvm.nvvm.ex2.approx.d
   17676     1, // llvm.nvvm.ex2.approx.f
   17677     1, // llvm.nvvm.ex2.approx.ftz.f
   17678     1, // llvm.nvvm.f2h.rn
   17679     1, // llvm.nvvm.f2h.rn.ftz
   17680     1, // llvm.nvvm.f2i.rm
   17681     1, // llvm.nvvm.f2i.rm.ftz
   17682     1, // llvm.nvvm.f2i.rn
   17683     1, // llvm.nvvm.f2i.rn.ftz
   17684     1, // llvm.nvvm.f2i.rp
   17685     1, // llvm.nvvm.f2i.rp.ftz
   17686     1, // llvm.nvvm.f2i.rz
   17687     1, // llvm.nvvm.f2i.rz.ftz
   17688     1, // llvm.nvvm.f2ll.rm
   17689     1, // llvm.nvvm.f2ll.rm.ftz
   17690     1, // llvm.nvvm.f2ll.rn
   17691     1, // llvm.nvvm.f2ll.rn.ftz
   17692     1, // llvm.nvvm.f2ll.rp
   17693     1, // llvm.nvvm.f2ll.rp.ftz
   17694     1, // llvm.nvvm.f2ll.rz
   17695     1, // llvm.nvvm.f2ll.rz.ftz
   17696     1, // llvm.nvvm.f2ui.rm
   17697     1, // llvm.nvvm.f2ui.rm.ftz
   17698     1, // llvm.nvvm.f2ui.rn
   17699     1, // llvm.nvvm.f2ui.rn.ftz
   17700     1, // llvm.nvvm.f2ui.rp
   17701     1, // llvm.nvvm.f2ui.rp.ftz
   17702     1, // llvm.nvvm.f2ui.rz
   17703     1, // llvm.nvvm.f2ui.rz.ftz
   17704     1, // llvm.nvvm.f2ull.rm
   17705     1, // llvm.nvvm.f2ull.rm.ftz
   17706     1, // llvm.nvvm.f2ull.rn
   17707     1, // llvm.nvvm.f2ull.rn.ftz
   17708     1, // llvm.nvvm.f2ull.rp
   17709     1, // llvm.nvvm.f2ull.rp.ftz
   17710     1, // llvm.nvvm.f2ull.rz
   17711     1, // llvm.nvvm.f2ull.rz.ftz
   17712     1, // llvm.nvvm.fabs.d
   17713     1, // llvm.nvvm.fabs.f
   17714     1, // llvm.nvvm.fabs.ftz.f
   17715     1, // llvm.nvvm.floor.d
   17716     1, // llvm.nvvm.floor.f
   17717     1, // llvm.nvvm.floor.ftz.f
   17718     1, // llvm.nvvm.fma.rm.d
   17719     1, // llvm.nvvm.fma.rm.f
   17720     1, // llvm.nvvm.fma.rm.ftz.f
   17721     1, // llvm.nvvm.fma.rn.d
   17722     1, // llvm.nvvm.fma.rn.f
   17723     1, // llvm.nvvm.fma.rn.ftz.f
   17724     1, // llvm.nvvm.fma.rp.d
   17725     1, // llvm.nvvm.fma.rp.f
   17726     1, // llvm.nvvm.fma.rp.ftz.f
   17727     1, // llvm.nvvm.fma.rz.d
   17728     1, // llvm.nvvm.fma.rz.f
   17729     1, // llvm.nvvm.fma.rz.ftz.f
   17730     1, // llvm.nvvm.fmax.d
   17731     1, // llvm.nvvm.fmax.f
   17732     1, // llvm.nvvm.fmax.ftz.f
   17733     1, // llvm.nvvm.fmin.d
   17734     1, // llvm.nvvm.fmin.f
   17735     1, // llvm.nvvm.fmin.ftz.f
   17736     1, // llvm.nvvm.i2d.rm
   17737     1, // llvm.nvvm.i2d.rn
   17738     1, // llvm.nvvm.i2d.rp
   17739     1, // llvm.nvvm.i2d.rz
   17740     1, // llvm.nvvm.i2f.rm
   17741     1, // llvm.nvvm.i2f.rn
   17742     1, // llvm.nvvm.i2f.rp
   17743     1, // llvm.nvvm.i2f.rz
   17744     1, // llvm.nvvm.isspacep.const
   17745     1, // llvm.nvvm.isspacep.global
   17746     1, // llvm.nvvm.isspacep.local
   17747     1, // llvm.nvvm.isspacep.shared
   17748     1, // llvm.nvvm.istypep.sampler
   17749     1, // llvm.nvvm.istypep.surface
   17750     1, // llvm.nvvm.istypep.texture
   17751     37, // llvm.nvvm.ldg.global.f
   17752     37, // llvm.nvvm.ldg.global.i
   17753     37, // llvm.nvvm.ldg.global.p
   17754     37, // llvm.nvvm.ldu.global.f
   17755     37, // llvm.nvvm.ldu.global.i
   17756     37, // llvm.nvvm.ldu.global.p
   17757     1, // llvm.nvvm.lg2.approx.d
   17758     1, // llvm.nvvm.lg2.approx.f
   17759     1, // llvm.nvvm.lg2.approx.ftz.f
   17760     1, // llvm.nvvm.ll2d.rm
   17761     1, // llvm.nvvm.ll2d.rn
   17762     1, // llvm.nvvm.ll2d.rp
   17763     1, // llvm.nvvm.ll2d.rz
   17764     1, // llvm.nvvm.ll2f.rm
   17765     1, // llvm.nvvm.ll2f.rn
   17766     1, // llvm.nvvm.ll2f.rp
   17767     1, // llvm.nvvm.ll2f.rz
   17768     1, // llvm.nvvm.lohi.i2d
   17769     31, // llvm.nvvm.match.all.sync.i32p
   17770     31, // llvm.nvvm.match.all.sync.i64p
   17771     31, // llvm.nvvm.match.any.sync.i32
   17772     31, // llvm.nvvm.match.any.sync.i64
   17773     3, // llvm.nvvm.membar.cta
   17774     3, // llvm.nvvm.membar.gl
   17775     3, // llvm.nvvm.membar.sys
   17776     1, // llvm.nvvm.move.double
   17777     1, // llvm.nvvm.move.float
   17778     1, // llvm.nvvm.move.i16
   17779     1, // llvm.nvvm.move.i32
   17780     1, // llvm.nvvm.move.i64
   17781     12, // llvm.nvvm.move.ptr
   17782     1, // llvm.nvvm.mul.rm.d
   17783     1, // llvm.nvvm.mul.rm.f
   17784     1, // llvm.nvvm.mul.rm.ftz.f
   17785     1, // llvm.nvvm.mul.rn.d
   17786     1, // llvm.nvvm.mul.rn.f
   17787     1, // llvm.nvvm.mul.rn.ftz.f
   17788     1, // llvm.nvvm.mul.rp.d
   17789     1, // llvm.nvvm.mul.rp.f
   17790     1, // llvm.nvvm.mul.rp.ftz.f
   17791     1, // llvm.nvvm.mul.rz.d
   17792     1, // llvm.nvvm.mul.rz.f
   17793     1, // llvm.nvvm.mul.rz.ftz.f
   17794     1, // llvm.nvvm.mul24.i
   17795     1, // llvm.nvvm.mul24.ui
   17796     1, // llvm.nvvm.mulhi.i
   17797     1, // llvm.nvvm.mulhi.ll
   17798     1, // llvm.nvvm.mulhi.ui
   17799     1, // llvm.nvvm.mulhi.ull
   17800     1, // llvm.nvvm.prmt
   17801     1, // llvm.nvvm.ptr.constant.to.gen
   17802     1, // llvm.nvvm.ptr.gen.to.constant
   17803     1, // llvm.nvvm.ptr.gen.to.global
   17804     1, // llvm.nvvm.ptr.gen.to.local
   17805     1, // llvm.nvvm.ptr.gen.to.param
   17806     1, // llvm.nvvm.ptr.gen.to.shared
   17807     1, // llvm.nvvm.ptr.global.to.gen
   17808     1, // llvm.nvvm.ptr.local.to.gen
   17809     1, // llvm.nvvm.ptr.shared.to.gen
   17810     1, // llvm.nvvm.rcp.approx.ftz.d
   17811     1, // llvm.nvvm.rcp.rm.d
   17812     1, // llvm.nvvm.rcp.rm.f
   17813     1, // llvm.nvvm.rcp.rm.ftz.f
   17814     1, // llvm.nvvm.rcp.rn.d
   17815     1, // llvm.nvvm.rcp.rn.f
   17816     1, // llvm.nvvm.rcp.rn.ftz.f
   17817     1, // llvm.nvvm.rcp.rp.d
   17818     1, // llvm.nvvm.rcp.rp.f
   17819     1, // llvm.nvvm.rcp.rp.ftz.f
   17820     1, // llvm.nvvm.rcp.rz.d
   17821     1, // llvm.nvvm.rcp.rz.f
   17822     1, // llvm.nvvm.rcp.rz.ftz.f
   17823     1, // llvm.nvvm.read.ptx.sreg.clock
   17824     1, // llvm.nvvm.read.ptx.sreg.clock64
   17825     1, // llvm.nvvm.read.ptx.sreg.ctaid.w
   17826     1, // llvm.nvvm.read.ptx.sreg.ctaid.x
   17827     1, // llvm.nvvm.read.ptx.sreg.ctaid.y
   17828     1, // llvm.nvvm.read.ptx.sreg.ctaid.z
   17829     1, // llvm.nvvm.read.ptx.sreg.envreg0
   17830     1, // llvm.nvvm.read.ptx.sreg.envreg1
   17831     1, // llvm.nvvm.read.ptx.sreg.envreg10
   17832     1, // llvm.nvvm.read.ptx.sreg.envreg11
   17833     1, // llvm.nvvm.read.ptx.sreg.envreg12
   17834     1, // llvm.nvvm.read.ptx.sreg.envreg13
   17835     1, // llvm.nvvm.read.ptx.sreg.envreg14
   17836     1, // llvm.nvvm.read.ptx.sreg.envreg15
   17837     1, // llvm.nvvm.read.ptx.sreg.envreg16
   17838     1, // llvm.nvvm.read.ptx.sreg.envreg17
   17839     1, // llvm.nvvm.read.ptx.sreg.envreg18
   17840     1, // llvm.nvvm.read.ptx.sreg.envreg19
   17841     1, // llvm.nvvm.read.ptx.sreg.envreg2
   17842     1, // llvm.nvvm.read.ptx.sreg.envreg20
   17843     1, // llvm.nvvm.read.ptx.sreg.envreg21
   17844     1, // llvm.nvvm.read.ptx.sreg.envreg22
   17845     1, // llvm.nvvm.read.ptx.sreg.envreg23
   17846     1, // llvm.nvvm.read.ptx.sreg.envreg24
   17847     1, // llvm.nvvm.read.ptx.sreg.envreg25
   17848     1, // llvm.nvvm.read.ptx.sreg.envreg26
   17849     1, // llvm.nvvm.read.ptx.sreg.envreg27
   17850     1, // llvm.nvvm.read.ptx.sreg.envreg28
   17851     1, // llvm.nvvm.read.ptx.sreg.envreg29
   17852     1, // llvm.nvvm.read.ptx.sreg.envreg3
   17853     1, // llvm.nvvm.read.ptx.sreg.envreg30
   17854     1, // llvm.nvvm.read.ptx.sreg.envreg31
   17855     1, // llvm.nvvm.read.ptx.sreg.envreg4
   17856     1, // llvm.nvvm.read.ptx.sreg.envreg5
   17857     1, // llvm.nvvm.read.ptx.sreg.envreg6
   17858     1, // llvm.nvvm.read.ptx.sreg.envreg7
   17859     1, // llvm.nvvm.read.ptx.sreg.envreg8
   17860     1, // llvm.nvvm.read.ptx.sreg.envreg9
   17861     1, // llvm.nvvm.read.ptx.sreg.gridid
   17862     1, // llvm.nvvm.read.ptx.sreg.laneid
   17863     1, // llvm.nvvm.read.ptx.sreg.lanemask.eq
   17864     1, // llvm.nvvm.read.ptx.sreg.lanemask.ge
   17865     1, // llvm.nvvm.read.ptx.sreg.lanemask.gt
   17866     1, // llvm.nvvm.read.ptx.sreg.lanemask.le
   17867     1, // llvm.nvvm.read.ptx.sreg.lanemask.lt
   17868     1, // llvm.nvvm.read.ptx.sreg.nctaid.w
   17869     1, // llvm.nvvm.read.ptx.sreg.nctaid.x
   17870     1, // llvm.nvvm.read.ptx.sreg.nctaid.y
   17871     1, // llvm.nvvm.read.ptx.sreg.nctaid.z
   17872     1, // llvm.nvvm.read.ptx.sreg.nsmid
   17873     1, // llvm.nvvm.read.ptx.sreg.ntid.w
   17874     1, // llvm.nvvm.read.ptx.sreg.ntid.x
   17875     1, // llvm.nvvm.read.ptx.sreg.ntid.y
   17876     1, // llvm.nvvm.read.ptx.sreg.ntid.z
   17877     1, // llvm.nvvm.read.ptx.sreg.nwarpid
   17878     1, // llvm.nvvm.read.ptx.sreg.pm0
   17879     1, // llvm.nvvm.read.ptx.sreg.pm1
   17880     1, // llvm.nvvm.read.ptx.sreg.pm2
   17881     1, // llvm.nvvm.read.ptx.sreg.pm3
   17882     1, // llvm.nvvm.read.ptx.sreg.smid
   17883     1, // llvm.nvvm.read.ptx.sreg.tid.w
   17884     1, // llvm.nvvm.read.ptx.sreg.tid.x
   17885     1, // llvm.nvvm.read.ptx.sreg.tid.y
   17886     1, // llvm.nvvm.read.ptx.sreg.tid.z
   17887     1, // llvm.nvvm.read.ptx.sreg.warpid
   17888     1, // llvm.nvvm.read.ptx.sreg.warpsize
   17889     1, // llvm.nvvm.reflect
   17890     1, // llvm.nvvm.rotate.b32
   17891     1, // llvm.nvvm.rotate.b64
   17892     1, // llvm.nvvm.rotate.right.b64
   17893     1, // llvm.nvvm.round.d
   17894     1, // llvm.nvvm.round.f
   17895     1, // llvm.nvvm.round.ftz.f
   17896     1, // llvm.nvvm.rsqrt.approx.d
   17897     1, // llvm.nvvm.rsqrt.approx.f
   17898     1, // llvm.nvvm.rsqrt.approx.ftz.f
   17899     1, // llvm.nvvm.sad.i
   17900     1, // llvm.nvvm.sad.ui
   17901     1, // llvm.nvvm.saturate.d
   17902     1, // llvm.nvvm.saturate.f
   17903     1, // llvm.nvvm.saturate.ftz.f
   17904     31, // llvm.nvvm.shfl.bfly.f32
   17905     31, // llvm.nvvm.shfl.bfly.i32
   17906     31, // llvm.nvvm.shfl.down.f32
   17907     31, // llvm.nvvm.shfl.down.i32
   17908     31, // llvm.nvvm.shfl.idx.f32
   17909     31, // llvm.nvvm.shfl.idx.i32
   17910     31, // llvm.nvvm.shfl.sync.bfly.f32
   17911     31, // llvm.nvvm.shfl.sync.bfly.i32
   17912     31, // llvm.nvvm.shfl.sync.down.f32
   17913     31, // llvm.nvvm.shfl.sync.down.i32
   17914     31, // llvm.nvvm.shfl.sync.idx.f32
   17915     31, // llvm.nvvm.shfl.sync.idx.i32
   17916     31, // llvm.nvvm.shfl.sync.up.f32
   17917     31, // llvm.nvvm.shfl.sync.up.i32
   17918     31, // llvm.nvvm.shfl.up.f32
   17919     31, // llvm.nvvm.shfl.up.i32
   17920     1, // llvm.nvvm.sin.approx.f
   17921     1, // llvm.nvvm.sin.approx.ftz.f
   17922     1, // llvm.nvvm.sqrt.approx.f
   17923     1, // llvm.nvvm.sqrt.approx.ftz.f
   17924     1, // llvm.nvvm.sqrt.f
   17925     1, // llvm.nvvm.sqrt.rm.d
   17926     1, // llvm.nvvm.sqrt.rm.f
   17927     1, // llvm.nvvm.sqrt.rm.ftz.f
   17928     1, // llvm.nvvm.sqrt.rn.d
   17929     1, // llvm.nvvm.sqrt.rn.f
   17930     1, // llvm.nvvm.sqrt.rn.ftz.f
   17931     1, // llvm.nvvm.sqrt.rp.d
   17932     1, // llvm.nvvm.sqrt.rp.f
   17933     1, // llvm.nvvm.sqrt.rp.ftz.f
   17934     1, // llvm.nvvm.sqrt.rz.d
   17935     1, // llvm.nvvm.sqrt.rz.f
   17936     1, // llvm.nvvm.sqrt.rz.ftz.f
   17937     3, // llvm.nvvm.suld.1d.array.i16.clamp
   17938     3, // llvm.nvvm.suld.1d.array.i16.trap
   17939     3, // llvm.nvvm.suld.1d.array.i16.zero
   17940     3, // llvm.nvvm.suld.1d.array.i32.clamp
   17941     3, // llvm.nvvm.suld.1d.array.i32.trap
   17942     3, // llvm.nvvm.suld.1d.array.i32.zero
   17943     3, // llvm.nvvm.suld.1d.array.i64.clamp
   17944     3, // llvm.nvvm.suld.1d.array.i64.trap
   17945     3, // llvm.nvvm.suld.1d.array.i64.zero
   17946     3, // llvm.nvvm.suld.1d.array.i8.clamp
   17947     3, // llvm.nvvm.suld.1d.array.i8.trap
   17948     3, // llvm.nvvm.suld.1d.array.i8.zero
   17949     3, // llvm.nvvm.suld.1d.array.v2i16.clamp
   17950     3, // llvm.nvvm.suld.1d.array.v2i16.trap
   17951     3, // llvm.nvvm.suld.1d.array.v2i16.zero
   17952     3, // llvm.nvvm.suld.1d.array.v2i32.clamp
   17953     3, // llvm.nvvm.suld.1d.array.v2i32.trap
   17954     3, // llvm.nvvm.suld.1d.array.v2i32.zero
   17955     3, // llvm.nvvm.suld.1d.array.v2i64.clamp
   17956     3, // llvm.nvvm.suld.1d.array.v2i64.trap
   17957     3, // llvm.nvvm.suld.1d.array.v2i64.zero
   17958     3, // llvm.nvvm.suld.1d.array.v2i8.clamp
   17959     3, // llvm.nvvm.suld.1d.array.v2i8.trap
   17960     3, // llvm.nvvm.suld.1d.array.v2i8.zero
   17961     3, // llvm.nvvm.suld.1d.array.v4i16.clamp
   17962     3, // llvm.nvvm.suld.1d.array.v4i16.trap
   17963     3, // llvm.nvvm.suld.1d.array.v4i16.zero
   17964     3, // llvm.nvvm.suld.1d.array.v4i32.clamp
   17965     3, // llvm.nvvm.suld.1d.array.v4i32.trap
   17966     3, // llvm.nvvm.suld.1d.array.v4i32.zero
   17967     3, // llvm.nvvm.suld.1d.array.v4i8.clamp
   17968     3, // llvm.nvvm.suld.1d.array.v4i8.trap
   17969     3, // llvm.nvvm.suld.1d.array.v4i8.zero
   17970     3, // llvm.nvvm.suld.1d.i16.clamp
   17971     3, // llvm.nvvm.suld.1d.i16.trap
   17972     3, // llvm.nvvm.suld.1d.i16.zero
   17973     3, // llvm.nvvm.suld.1d.i32.clamp
   17974     3, // llvm.nvvm.suld.1d.i32.trap
   17975     3, // llvm.nvvm.suld.1d.i32.zero
   17976     3, // llvm.nvvm.suld.1d.i64.clamp
   17977     3, // llvm.nvvm.suld.1d.i64.trap
   17978     3, // llvm.nvvm.suld.1d.i64.zero
   17979     3, // llvm.nvvm.suld.1d.i8.clamp
   17980     3, // llvm.nvvm.suld.1d.i8.trap
   17981     3, // llvm.nvvm.suld.1d.i8.zero
   17982     3, // llvm.nvvm.suld.1d.v2i16.clamp
   17983     3, // llvm.nvvm.suld.1d.v2i16.trap
   17984     3, // llvm.nvvm.suld.1d.v2i16.zero
   17985     3, // llvm.nvvm.suld.1d.v2i32.clamp
   17986     3, // llvm.nvvm.suld.1d.v2i32.trap
   17987     3, // llvm.nvvm.suld.1d.v2i32.zero
   17988     3, // llvm.nvvm.suld.1d.v2i64.clamp
   17989     3, // llvm.nvvm.suld.1d.v2i64.trap
   17990     3, // llvm.nvvm.suld.1d.v2i64.zero
   17991     3, // llvm.nvvm.suld.1d.v2i8.clamp
   17992     3, // llvm.nvvm.suld.1d.v2i8.trap
   17993     3, // llvm.nvvm.suld.1d.v2i8.zero
   17994     3, // llvm.nvvm.suld.1d.v4i16.clamp
   17995     3, // llvm.nvvm.suld.1d.v4i16.trap
   17996     3, // llvm.nvvm.suld.1d.v4i16.zero
   17997     3, // llvm.nvvm.suld.1d.v4i32.clamp
   17998     3, // llvm.nvvm.suld.1d.v4i32.trap
   17999     3, // llvm.nvvm.suld.1d.v4i32.zero
   18000     3, // llvm.nvvm.suld.1d.v4i8.clamp
   18001     3, // llvm.nvvm.suld.1d.v4i8.trap
   18002     3, // llvm.nvvm.suld.1d.v4i8.zero
   18003     3, // llvm.nvvm.suld.2d.array.i16.clamp
   18004     3, // llvm.nvvm.suld.2d.array.i16.trap
   18005     3, // llvm.nvvm.suld.2d.array.i16.zero
   18006     3, // llvm.nvvm.suld.2d.array.i32.clamp
   18007     3, // llvm.nvvm.suld.2d.array.i32.trap
   18008     3, // llvm.nvvm.suld.2d.array.i32.zero
   18009     3, // llvm.nvvm.suld.2d.array.i64.clamp
   18010     3, // llvm.nvvm.suld.2d.array.i64.trap
   18011     3, // llvm.nvvm.suld.2d.array.i64.zero
   18012     3, // llvm.nvvm.suld.2d.array.i8.clamp
   18013     3, // llvm.nvvm.suld.2d.array.i8.trap
   18014     3, // llvm.nvvm.suld.2d.array.i8.zero
   18015     3, // llvm.nvvm.suld.2d.array.v2i16.clamp
   18016     3, // llvm.nvvm.suld.2d.array.v2i16.trap
   18017     3, // llvm.nvvm.suld.2d.array.v2i16.zero
   18018     3, // llvm.nvvm.suld.2d.array.v2i32.clamp
   18019     3, // llvm.nvvm.suld.2d.array.v2i32.trap
   18020     3, // llvm.nvvm.suld.2d.array.v2i32.zero
   18021     3, // llvm.nvvm.suld.2d.array.v2i64.clamp
   18022     3, // llvm.nvvm.suld.2d.array.v2i64.trap
   18023     3, // llvm.nvvm.suld.2d.array.v2i64.zero
   18024     3, // llvm.nvvm.suld.2d.array.v2i8.clamp
   18025     3, // llvm.nvvm.suld.2d.array.v2i8.trap
   18026     3, // llvm.nvvm.suld.2d.array.v2i8.zero
   18027     3, // llvm.nvvm.suld.2d.array.v4i16.clamp
   18028     3, // llvm.nvvm.suld.2d.array.v4i16.trap
   18029     3, // llvm.nvvm.suld.2d.array.v4i16.zero
   18030     3, // llvm.nvvm.suld.2d.array.v4i32.clamp
   18031     3, // llvm.nvvm.suld.2d.array.v4i32.trap
   18032     3, // llvm.nvvm.suld.2d.array.v4i32.zero
   18033     3, // llvm.nvvm.suld.2d.array.v4i8.clamp
   18034     3, // llvm.nvvm.suld.2d.array.v4i8.trap
   18035     3, // llvm.nvvm.suld.2d.array.v4i8.zero
   18036     3, // llvm.nvvm.suld.2d.i16.clamp
   18037     3, // llvm.nvvm.suld.2d.i16.trap
   18038     3, // llvm.nvvm.suld.2d.i16.zero
   18039     3, // llvm.nvvm.suld.2d.i32.clamp
   18040     3, // llvm.nvvm.suld.2d.i32.trap
   18041     3, // llvm.nvvm.suld.2d.i32.zero
   18042     3, // llvm.nvvm.suld.2d.i64.clamp
   18043     3, // llvm.nvvm.suld.2d.i64.trap
   18044     3, // llvm.nvvm.suld.2d.i64.zero
   18045     3, // llvm.nvvm.suld.2d.i8.clamp
   18046     3, // llvm.nvvm.suld.2d.i8.trap
   18047     3, // llvm.nvvm.suld.2d.i8.zero
   18048     3, // llvm.nvvm.suld.2d.v2i16.clamp
   18049     3, // llvm.nvvm.suld.2d.v2i16.trap
   18050     3, // llvm.nvvm.suld.2d.v2i16.zero
   18051     3, // llvm.nvvm.suld.2d.v2i32.clamp
   18052     3, // llvm.nvvm.suld.2d.v2i32.trap
   18053     3, // llvm.nvvm.suld.2d.v2i32.zero
   18054     3, // llvm.nvvm.suld.2d.v2i64.clamp
   18055     3, // llvm.nvvm.suld.2d.v2i64.trap
   18056     3, // llvm.nvvm.suld.2d.v2i64.zero
   18057     3, // llvm.nvvm.suld.2d.v2i8.clamp
   18058     3, // llvm.nvvm.suld.2d.v2i8.trap
   18059     3, // llvm.nvvm.suld.2d.v2i8.zero
   18060     3, // llvm.nvvm.suld.2d.v4i16.clamp
   18061     3, // llvm.nvvm.suld.2d.v4i16.trap
   18062     3, // llvm.nvvm.suld.2d.v4i16.zero
   18063     3, // llvm.nvvm.suld.2d.v4i32.clamp
   18064     3, // llvm.nvvm.suld.2d.v4i32.trap
   18065     3, // llvm.nvvm.suld.2d.v4i32.zero
   18066     3, // llvm.nvvm.suld.2d.v4i8.clamp
   18067     3, // llvm.nvvm.suld.2d.v4i8.trap
   18068     3, // llvm.nvvm.suld.2d.v4i8.zero
   18069     3, // llvm.nvvm.suld.3d.i16.clamp
   18070     3, // llvm.nvvm.suld.3d.i16.trap
   18071     3, // llvm.nvvm.suld.3d.i16.zero
   18072     3, // llvm.nvvm.suld.3d.i32.clamp
   18073     3, // llvm.nvvm.suld.3d.i32.trap
   18074     3, // llvm.nvvm.suld.3d.i32.zero
   18075     3, // llvm.nvvm.suld.3d.i64.clamp
   18076     3, // llvm.nvvm.suld.3d.i64.trap
   18077     3, // llvm.nvvm.suld.3d.i64.zero
   18078     3, // llvm.nvvm.suld.3d.i8.clamp
   18079     3, // llvm.nvvm.suld.3d.i8.trap
   18080     3, // llvm.nvvm.suld.3d.i8.zero
   18081     3, // llvm.nvvm.suld.3d.v2i16.clamp
   18082     3, // llvm.nvvm.suld.3d.v2i16.trap
   18083     3, // llvm.nvvm.suld.3d.v2i16.zero
   18084     3, // llvm.nvvm.suld.3d.v2i32.clamp
   18085     3, // llvm.nvvm.suld.3d.v2i32.trap
   18086     3, // llvm.nvvm.suld.3d.v2i32.zero
   18087     3, // llvm.nvvm.suld.3d.v2i64.clamp
   18088     3, // llvm.nvvm.suld.3d.v2i64.trap
   18089     3, // llvm.nvvm.suld.3d.v2i64.zero
   18090     3, // llvm.nvvm.suld.3d.v2i8.clamp
   18091     3, // llvm.nvvm.suld.3d.v2i8.trap
   18092     3, // llvm.nvvm.suld.3d.v2i8.zero
   18093     3, // llvm.nvvm.suld.3d.v4i16.clamp
   18094     3, // llvm.nvvm.suld.3d.v4i16.trap
   18095     3, // llvm.nvvm.suld.3d.v4i16.zero
   18096     3, // llvm.nvvm.suld.3d.v4i32.clamp
   18097     3, // llvm.nvvm.suld.3d.v4i32.trap
   18098     3, // llvm.nvvm.suld.3d.v4i32.zero
   18099     3, // llvm.nvvm.suld.3d.v4i8.clamp
   18100     3, // llvm.nvvm.suld.3d.v4i8.trap
   18101     3, // llvm.nvvm.suld.3d.v4i8.zero
   18102     1, // llvm.nvvm.suq.array.size
   18103     1, // llvm.nvvm.suq.channel.data.type
   18104     1, // llvm.nvvm.suq.channel.order
   18105     1, // llvm.nvvm.suq.depth
   18106     1, // llvm.nvvm.suq.height
   18107     1, // llvm.nvvm.suq.width
   18108     3, // llvm.nvvm.sust.b.1d.array.i16.clamp
   18109     3, // llvm.nvvm.sust.b.1d.array.i16.trap
   18110     3, // llvm.nvvm.sust.b.1d.array.i16.zero
   18111     3, // llvm.nvvm.sust.b.1d.array.i32.clamp
   18112     3, // llvm.nvvm.sust.b.1d.array.i32.trap
   18113     3, // llvm.nvvm.sust.b.1d.array.i32.zero
   18114     3, // llvm.nvvm.sust.b.1d.array.i64.clamp
   18115     3, // llvm.nvvm.sust.b.1d.array.i64.trap
   18116     3, // llvm.nvvm.sust.b.1d.array.i64.zero
   18117     3, // llvm.nvvm.sust.b.1d.array.i8.clamp
   18118     3, // llvm.nvvm.sust.b.1d.array.i8.trap
   18119     3, // llvm.nvvm.sust.b.1d.array.i8.zero
   18120     3, // llvm.nvvm.sust.b.1d.array.v2i16.clamp
   18121     3, // llvm.nvvm.sust.b.1d.array.v2i16.trap
   18122     3, // llvm.nvvm.sust.b.1d.array.v2i16.zero
   18123     3, // llvm.nvvm.sust.b.1d.array.v2i32.clamp
   18124     3, // llvm.nvvm.sust.b.1d.array.v2i32.trap
   18125     3, // llvm.nvvm.sust.b.1d.array.v2i32.zero
   18126     3, // llvm.nvvm.sust.b.1d.array.v2i64.clamp
   18127     3, // llvm.nvvm.sust.b.1d.array.v2i64.trap
   18128     3, // llvm.nvvm.sust.b.1d.array.v2i64.zero
   18129     3, // llvm.nvvm.sust.b.1d.array.v2i8.clamp
   18130     3, // llvm.nvvm.sust.b.1d.array.v2i8.trap
   18131     3, // llvm.nvvm.sust.b.1d.array.v2i8.zero
   18132     3, // llvm.nvvm.sust.b.1d.array.v4i16.clamp
   18133     3, // llvm.nvvm.sust.b.1d.array.v4i16.trap
   18134     3, // llvm.nvvm.sust.b.1d.array.v4i16.zero
   18135     3, // llvm.nvvm.sust.b.1d.array.v4i32.clamp
   18136     3, // llvm.nvvm.sust.b.1d.array.v4i32.trap
   18137     3, // llvm.nvvm.sust.b.1d.array.v4i32.zero
   18138     3, // llvm.nvvm.sust.b.1d.array.v4i8.clamp
   18139     3, // llvm.nvvm.sust.b.1d.array.v4i8.trap
   18140     3, // llvm.nvvm.sust.b.1d.array.v4i8.zero
   18141     3, // llvm.nvvm.sust.b.1d.i16.clamp
   18142     3, // llvm.nvvm.sust.b.1d.i16.trap
   18143     3, // llvm.nvvm.sust.b.1d.i16.zero
   18144     3, // llvm.nvvm.sust.b.1d.i32.clamp
   18145     3, // llvm.nvvm.sust.b.1d.i32.trap
   18146     3, // llvm.nvvm.sust.b.1d.i32.zero
   18147     3, // llvm.nvvm.sust.b.1d.i64.clamp
   18148     3, // llvm.nvvm.sust.b.1d.i64.trap
   18149     3, // llvm.nvvm.sust.b.1d.i64.zero
   18150     3, // llvm.nvvm.sust.b.1d.i8.clamp
   18151     3, // llvm.nvvm.sust.b.1d.i8.trap
   18152     3, // llvm.nvvm.sust.b.1d.i8.zero
   18153     3, // llvm.nvvm.sust.b.1d.v2i16.clamp
   18154     3, // llvm.nvvm.sust.b.1d.v2i16.trap
   18155     3, // llvm.nvvm.sust.b.1d.v2i16.zero
   18156     3, // llvm.nvvm.sust.b.1d.v2i32.clamp
   18157     3, // llvm.nvvm.sust.b.1d.v2i32.trap
   18158     3, // llvm.nvvm.sust.b.1d.v2i32.zero
   18159     3, // llvm.nvvm.sust.b.1d.v2i64.clamp
   18160     3, // llvm.nvvm.sust.b.1d.v2i64.trap
   18161     3, // llvm.nvvm.sust.b.1d.v2i64.zero
   18162     3, // llvm.nvvm.sust.b.1d.v2i8.clamp
   18163     3, // llvm.nvvm.sust.b.1d.v2i8.trap
   18164     3, // llvm.nvvm.sust.b.1d.v2i8.zero
   18165     3, // llvm.nvvm.sust.b.1d.v4i16.clamp
   18166     3, // llvm.nvvm.sust.b.1d.v4i16.trap
   18167     3, // llvm.nvvm.sust.b.1d.v4i16.zero
   18168     3, // llvm.nvvm.sust.b.1d.v4i32.clamp
   18169     3, // llvm.nvvm.sust.b.1d.v4i32.trap
   18170     3, // llvm.nvvm.sust.b.1d.v4i32.zero
   18171     3, // llvm.nvvm.sust.b.1d.v4i8.clamp
   18172     3, // llvm.nvvm.sust.b.1d.v4i8.trap
   18173     3, // llvm.nvvm.sust.b.1d.v4i8.zero
   18174     3, // llvm.nvvm.sust.b.2d.array.i16.clamp
   18175     3, // llvm.nvvm.sust.b.2d.array.i16.trap
   18176     3, // llvm.nvvm.sust.b.2d.array.i16.zero
   18177     3, // llvm.nvvm.sust.b.2d.array.i32.clamp
   18178     3, // llvm.nvvm.sust.b.2d.array.i32.trap
   18179     3, // llvm.nvvm.sust.b.2d.array.i32.zero
   18180     3, // llvm.nvvm.sust.b.2d.array.i64.clamp
   18181     3, // llvm.nvvm.sust.b.2d.array.i64.trap
   18182     3, // llvm.nvvm.sust.b.2d.array.i64.zero
   18183     3, // llvm.nvvm.sust.b.2d.array.i8.clamp
   18184     3, // llvm.nvvm.sust.b.2d.array.i8.trap
   18185     3, // llvm.nvvm.sust.b.2d.array.i8.zero
   18186     3, // llvm.nvvm.sust.b.2d.array.v2i16.clamp
   18187     3, // llvm.nvvm.sust.b.2d.array.v2i16.trap
   18188     3, // llvm.nvvm.sust.b.2d.array.v2i16.zero
   18189     3, // llvm.nvvm.sust.b.2d.array.v2i32.clamp
   18190     3, // llvm.nvvm.sust.b.2d.array.v2i32.trap
   18191     3, // llvm.nvvm.sust.b.2d.array.v2i32.zero
   18192     3, // llvm.nvvm.sust.b.2d.array.v2i64.clamp
   18193     3, // llvm.nvvm.sust.b.2d.array.v2i64.trap
   18194     3, // llvm.nvvm.sust.b.2d.array.v2i64.zero
   18195     3, // llvm.nvvm.sust.b.2d.array.v2i8.clamp
   18196     3, // llvm.nvvm.sust.b.2d.array.v2i8.trap
   18197     3, // llvm.nvvm.sust.b.2d.array.v2i8.zero
   18198     3, // llvm.nvvm.sust.b.2d.array.v4i16.clamp
   18199     3, // llvm.nvvm.sust.b.2d.array.v4i16.trap
   18200     3, // llvm.nvvm.sust.b.2d.array.v4i16.zero
   18201     3, // llvm.nvvm.sust.b.2d.array.v4i32.clamp
   18202     3, // llvm.nvvm.sust.b.2d.array.v4i32.trap
   18203     3, // llvm.nvvm.sust.b.2d.array.v4i32.zero
   18204     3, // llvm.nvvm.sust.b.2d.array.v4i8.clamp
   18205     3, // llvm.nvvm.sust.b.2d.array.v4i8.trap
   18206     3, // llvm.nvvm.sust.b.2d.array.v4i8.zero
   18207     3, // llvm.nvvm.sust.b.2d.i16.clamp
   18208     3, // llvm.nvvm.sust.b.2d.i16.trap
   18209     3, // llvm.nvvm.sust.b.2d.i16.zero
   18210     3, // llvm.nvvm.sust.b.2d.i32.clamp
   18211     3, // llvm.nvvm.sust.b.2d.i32.trap
   18212     3, // llvm.nvvm.sust.b.2d.i32.zero
   18213     3, // llvm.nvvm.sust.b.2d.i64.clamp
   18214     3, // llvm.nvvm.sust.b.2d.i64.trap
   18215     3, // llvm.nvvm.sust.b.2d.i64.zero
   18216     3, // llvm.nvvm.sust.b.2d.i8.clamp
   18217     3, // llvm.nvvm.sust.b.2d.i8.trap
   18218     3, // llvm.nvvm.sust.b.2d.i8.zero
   18219     3, // llvm.nvvm.sust.b.2d.v2i16.clamp
   18220     3, // llvm.nvvm.sust.b.2d.v2i16.trap
   18221     3, // llvm.nvvm.sust.b.2d.v2i16.zero
   18222     3, // llvm.nvvm.sust.b.2d.v2i32.clamp
   18223     3, // llvm.nvvm.sust.b.2d.v2i32.trap
   18224     3, // llvm.nvvm.sust.b.2d.v2i32.zero
   18225     3, // llvm.nvvm.sust.b.2d.v2i64.clamp
   18226     3, // llvm.nvvm.sust.b.2d.v2i64.trap
   18227     3, // llvm.nvvm.sust.b.2d.v2i64.zero
   18228     3, // llvm.nvvm.sust.b.2d.v2i8.clamp
   18229     3, // llvm.nvvm.sust.b.2d.v2i8.trap
   18230     3, // llvm.nvvm.sust.b.2d.v2i8.zero
   18231     3, // llvm.nvvm.sust.b.2d.v4i16.clamp
   18232     3, // llvm.nvvm.sust.b.2d.v4i16.trap
   18233     3, // llvm.nvvm.sust.b.2d.v4i16.zero
   18234     3, // llvm.nvvm.sust.b.2d.v4i32.clamp
   18235     3, // llvm.nvvm.sust.b.2d.v4i32.trap
   18236     3, // llvm.nvvm.sust.b.2d.v4i32.zero
   18237     3, // llvm.nvvm.sust.b.2d.v4i8.clamp
   18238     3, // llvm.nvvm.sust.b.2d.v4i8.trap
   18239     3, // llvm.nvvm.sust.b.2d.v4i8.zero
   18240     3, // llvm.nvvm.sust.b.3d.i16.clamp
   18241     3, // llvm.nvvm.sust.b.3d.i16.trap
   18242     3, // llvm.nvvm.sust.b.3d.i16.zero
   18243     3, // llvm.nvvm.sust.b.3d.i32.clamp
   18244     3, // llvm.nvvm.sust.b.3d.i32.trap
   18245     3, // llvm.nvvm.sust.b.3d.i32.zero
   18246     3, // llvm.nvvm.sust.b.3d.i64.clamp
   18247     3, // llvm.nvvm.sust.b.3d.i64.trap
   18248     3, // llvm.nvvm.sust.b.3d.i64.zero
   18249     3, // llvm.nvvm.sust.b.3d.i8.clamp
   18250     3, // llvm.nvvm.sust.b.3d.i8.trap
   18251     3, // llvm.nvvm.sust.b.3d.i8.zero
   18252     3, // llvm.nvvm.sust.b.3d.v2i16.clamp
   18253     3, // llvm.nvvm.sust.b.3d.v2i16.trap
   18254     3, // llvm.nvvm.sust.b.3d.v2i16.zero
   18255     3, // llvm.nvvm.sust.b.3d.v2i32.clamp
   18256     3, // llvm.nvvm.sust.b.3d.v2i32.trap
   18257     3, // llvm.nvvm.sust.b.3d.v2i32.zero
   18258     3, // llvm.nvvm.sust.b.3d.v2i64.clamp
   18259     3, // llvm.nvvm.sust.b.3d.v2i64.trap
   18260     3, // llvm.nvvm.sust.b.3d.v2i64.zero
   18261     3, // llvm.nvvm.sust.b.3d.v2i8.clamp
   18262     3, // llvm.nvvm.sust.b.3d.v2i8.trap
   18263     3, // llvm.nvvm.sust.b.3d.v2i8.zero
   18264     3, // llvm.nvvm.sust.b.3d.v4i16.clamp
   18265     3, // llvm.nvvm.sust.b.3d.v4i16.trap
   18266     3, // llvm.nvvm.sust.b.3d.v4i16.zero
   18267     3, // llvm.nvvm.sust.b.3d.v4i32.clamp
   18268     3, // llvm.nvvm.sust.b.3d.v4i32.trap
   18269     3, // llvm.nvvm.sust.b.3d.v4i32.zero
   18270     3, // llvm.nvvm.sust.b.3d.v4i8.clamp
   18271     3, // llvm.nvvm.sust.b.3d.v4i8.trap
   18272     3, // llvm.nvvm.sust.b.3d.v4i8.zero
   18273     3, // llvm.nvvm.sust.p.1d.array.i16.trap
   18274     3, // llvm.nvvm.sust.p.1d.array.i32.trap
   18275     3, // llvm.nvvm.sust.p.1d.array.i8.trap
   18276     3, // llvm.nvvm.sust.p.1d.array.v2i16.trap
   18277     3, // llvm.nvvm.sust.p.1d.array.v2i32.trap
   18278     3, // llvm.nvvm.sust.p.1d.array.v2i8.trap
   18279     3, // llvm.nvvm.sust.p.1d.array.v4i16.trap
   18280     3, // llvm.nvvm.sust.p.1d.array.v4i32.trap
   18281     3, // llvm.nvvm.sust.p.1d.array.v4i8.trap
   18282     3, // llvm.nvvm.sust.p.1d.i16.trap
   18283     3, // llvm.nvvm.sust.p.1d.i32.trap
   18284     3, // llvm.nvvm.sust.p.1d.i8.trap
   18285     3, // llvm.nvvm.sust.p.1d.v2i16.trap
   18286     3, // llvm.nvvm.sust.p.1d.v2i32.trap
   18287     3, // llvm.nvvm.sust.p.1d.v2i8.trap
   18288     3, // llvm.nvvm.sust.p.1d.v4i16.trap
   18289     3, // llvm.nvvm.sust.p.1d.v4i32.trap
   18290     3, // llvm.nvvm.sust.p.1d.v4i8.trap
   18291     3, // llvm.nvvm.sust.p.2d.array.i16.trap
   18292     3, // llvm.nvvm.sust.p.2d.array.i32.trap
   18293     3, // llvm.nvvm.sust.p.2d.array.i8.trap
   18294     3, // llvm.nvvm.sust.p.2d.array.v2i16.trap
   18295     3, // llvm.nvvm.sust.p.2d.array.v2i32.trap
   18296     3, // llvm.nvvm.sust.p.2d.array.v2i8.trap
   18297     3, // llvm.nvvm.sust.p.2d.array.v4i16.trap
   18298     3, // llvm.nvvm.sust.p.2d.array.v4i32.trap
   18299     3, // llvm.nvvm.sust.p.2d.array.v4i8.trap
   18300     3, // llvm.nvvm.sust.p.2d.i16.trap
   18301     3, // llvm.nvvm.sust.p.2d.i32.trap
   18302     3, // llvm.nvvm.sust.p.2d.i8.trap
   18303     3, // llvm.nvvm.sust.p.2d.v2i16.trap
   18304     3, // llvm.nvvm.sust.p.2d.v2i32.trap
   18305     3, // llvm.nvvm.sust.p.2d.v2i8.trap
   18306     3, // llvm.nvvm.sust.p.2d.v4i16.trap
   18307     3, // llvm.nvvm.sust.p.2d.v4i32.trap
   18308     3, // llvm.nvvm.sust.p.2d.v4i8.trap
   18309     3, // llvm.nvvm.sust.p.3d.i16.trap
   18310     3, // llvm.nvvm.sust.p.3d.i32.trap
   18311     3, // llvm.nvvm.sust.p.3d.i8.trap
   18312     3, // llvm.nvvm.sust.p.3d.v2i16.trap
   18313     3, // llvm.nvvm.sust.p.3d.v2i32.trap
   18314     3, // llvm.nvvm.sust.p.3d.v2i8.trap
   18315     3, // llvm.nvvm.sust.p.3d.v4i16.trap
   18316     3, // llvm.nvvm.sust.p.3d.v4i32.trap
   18317     3, // llvm.nvvm.sust.p.3d.v4i8.trap
   18318     1, // llvm.nvvm.swap.lo.hi.b64
   18319     3, // llvm.nvvm.tex.1d.array.grad.v4f32.f32
   18320     3, // llvm.nvvm.tex.1d.array.grad.v4s32.f32
   18321     3, // llvm.nvvm.tex.1d.array.grad.v4u32.f32
   18322     3, // llvm.nvvm.tex.1d.array.level.v4f32.f32
   18323     3, // llvm.nvvm.tex.1d.array.level.v4s32.f32
   18324     3, // llvm.nvvm.tex.1d.array.level.v4u32.f32
   18325     3, // llvm.nvvm.tex.1d.array.v4f32.f32
   18326     3, // llvm.nvvm.tex.1d.array.v4f32.s32
   18327     3, // llvm.nvvm.tex.1d.array.v4s32.f32
   18328     3, // llvm.nvvm.tex.1d.array.v4s32.s32
   18329     3, // llvm.nvvm.tex.1d.array.v4u32.f32
   18330     3, // llvm.nvvm.tex.1d.array.v4u32.s32
   18331     3, // llvm.nvvm.tex.1d.grad.v4f32.f32
   18332     3, // llvm.nvvm.tex.1d.grad.v4s32.f32
   18333     3, // llvm.nvvm.tex.1d.grad.v4u32.f32
   18334     3, // llvm.nvvm.tex.1d.level.v4f32.f32
   18335     3, // llvm.nvvm.tex.1d.level.v4s32.f32
   18336     3, // llvm.nvvm.tex.1d.level.v4u32.f32
   18337     3, // llvm.nvvm.tex.1d.v4f32.f32
   18338     3, // llvm.nvvm.tex.1d.v4f32.s32
   18339     3, // llvm.nvvm.tex.1d.v4s32.f32
   18340     3, // llvm.nvvm.tex.1d.v4s32.s32
   18341     3, // llvm.nvvm.tex.1d.v4u32.f32
   18342     3, // llvm.nvvm.tex.1d.v4u32.s32
   18343     3, // llvm.nvvm.tex.2d.array.grad.v4f32.f32
   18344     3, // llvm.nvvm.tex.2d.array.grad.v4s32.f32
   18345     3, // llvm.nvvm.tex.2d.array.grad.v4u32.f32
   18346     3, // llvm.nvvm.tex.2d.array.level.v4f32.f32
   18347     3, // llvm.nvvm.tex.2d.array.level.v4s32.f32
   18348     3, // llvm.nvvm.tex.2d.array.level.v4u32.f32
   18349     3, // llvm.nvvm.tex.2d.array.v4f32.f32
   18350     3, // llvm.nvvm.tex.2d.array.v4f32.s32
   18351     3, // llvm.nvvm.tex.2d.array.v4s32.f32
   18352     3, // llvm.nvvm.tex.2d.array.v4s32.s32
   18353     3, // llvm.nvvm.tex.2d.array.v4u32.f32
   18354     3, // llvm.nvvm.tex.2d.array.v4u32.s32
   18355     3, // llvm.nvvm.tex.2d.grad.v4f32.f32
   18356     3, // llvm.nvvm.tex.2d.grad.v4s32.f32
   18357     3, // llvm.nvvm.tex.2d.grad.v4u32.f32
   18358     3, // llvm.nvvm.tex.2d.level.v4f32.f32
   18359     3, // llvm.nvvm.tex.2d.level.v4s32.f32
   18360     3, // llvm.nvvm.tex.2d.level.v4u32.f32
   18361     3, // llvm.nvvm.tex.2d.v4f32.f32
   18362     3, // llvm.nvvm.tex.2d.v4f32.s32
   18363     3, // llvm.nvvm.tex.2d.v4s32.f32
   18364     3, // llvm.nvvm.tex.2d.v4s32.s32
   18365     3, // llvm.nvvm.tex.2d.v4u32.f32
   18366     3, // llvm.nvvm.tex.2d.v4u32.s32
   18367     3, // llvm.nvvm.tex.3d.grad.v4f32.f32
   18368     3, // llvm.nvvm.tex.3d.grad.v4s32.f32
   18369     3, // llvm.nvvm.tex.3d.grad.v4u32.f32
   18370     3, // llvm.nvvm.tex.3d.level.v4f32.f32
   18371     3, // llvm.nvvm.tex.3d.level.v4s32.f32
   18372     3, // llvm.nvvm.tex.3d.level.v4u32.f32
   18373     3, // llvm.nvvm.tex.3d.v4f32.f32
   18374     3, // llvm.nvvm.tex.3d.v4f32.s32
   18375     3, // llvm.nvvm.tex.3d.v4s32.f32
   18376     3, // llvm.nvvm.tex.3d.v4s32.s32
   18377     3, // llvm.nvvm.tex.3d.v4u32.f32
   18378     3, // llvm.nvvm.tex.3d.v4u32.s32
   18379     3, // llvm.nvvm.tex.cube.array.level.v4f32.f32
   18380     3, // llvm.nvvm.tex.cube.array.level.v4s32.f32
   18381     3, // llvm.nvvm.tex.cube.array.level.v4u32.f32
   18382     3, // llvm.nvvm.tex.cube.array.v4f32.f32
   18383     3, // llvm.nvvm.tex.cube.array.v4s32.f32
   18384     3, // llvm.nvvm.tex.cube.array.v4u32.f32
   18385     3, // llvm.nvvm.tex.cube.level.v4f32.f32
   18386     3, // llvm.nvvm.tex.cube.level.v4s32.f32
   18387     3, // llvm.nvvm.tex.cube.level.v4u32.f32
   18388     3, // llvm.nvvm.tex.cube.v4f32.f32
   18389     3, // llvm.nvvm.tex.cube.v4s32.f32
   18390     3, // llvm.nvvm.tex.cube.v4u32.f32
   18391     3, // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32
   18392     3, // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32
   18393     3, // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32
   18394     3, // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32
   18395     3, // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32
   18396     3, // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32
   18397     3, // llvm.nvvm.tex.unified.1d.array.v4f32.f32
   18398     3, // llvm.nvvm.tex.unified.1d.array.v4f32.s32
   18399     3, // llvm.nvvm.tex.unified.1d.array.v4s32.f32
   18400     3, // llvm.nvvm.tex.unified.1d.array.v4s32.s32
   18401     3, // llvm.nvvm.tex.unified.1d.array.v4u32.f32
   18402     3, // llvm.nvvm.tex.unified.1d.array.v4u32.s32
   18403     3, // llvm.nvvm.tex.unified.1d.grad.v4f32.f32
   18404     3, // llvm.nvvm.tex.unified.1d.grad.v4s32.f32
   18405     3, // llvm.nvvm.tex.unified.1d.grad.v4u32.f32
   18406     3, // llvm.nvvm.tex.unified.1d.level.v4f32.f32
   18407     3, // llvm.nvvm.tex.unified.1d.level.v4s32.f32
   18408     3, // llvm.nvvm.tex.unified.1d.level.v4u32.f32
   18409     3, // llvm.nvvm.tex.unified.1d.v4f32.f32
   18410     3, // llvm.nvvm.tex.unified.1d.v4f32.s32
   18411     3, // llvm.nvvm.tex.unified.1d.v4s32.f32
   18412     3, // llvm.nvvm.tex.unified.1d.v4s32.s32
   18413     3, // llvm.nvvm.tex.unified.1d.v4u32.f32
   18414     3, // llvm.nvvm.tex.unified.1d.v4u32.s32
   18415     3, // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32
   18416     3, // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32
   18417     3, // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32
   18418     3, // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32
   18419     3, // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32
   18420     3, // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32
   18421     3, // llvm.nvvm.tex.unified.2d.array.v4f32.f32
   18422     3, // llvm.nvvm.tex.unified.2d.array.v4f32.s32
   18423     3, // llvm.nvvm.tex.unified.2d.array.v4s32.f32
   18424     3, // llvm.nvvm.tex.unified.2d.array.v4s32.s32
   18425     3, // llvm.nvvm.tex.unified.2d.array.v4u32.f32
   18426     3, // llvm.nvvm.tex.unified.2d.array.v4u32.s32
   18427     3, // llvm.nvvm.tex.unified.2d.grad.v4f32.f32
   18428     3, // llvm.nvvm.tex.unified.2d.grad.v4s32.f32
   18429     3, // llvm.nvvm.tex.unified.2d.grad.v4u32.f32
   18430     3, // llvm.nvvm.tex.unified.2d.level.v4f32.f32
   18431     3, // llvm.nvvm.tex.unified.2d.level.v4s32.f32
   18432     3, // llvm.nvvm.tex.unified.2d.level.v4u32.f32
   18433     3, // llvm.nvvm.tex.unified.2d.v4f32.f32
   18434     3, // llvm.nvvm.tex.unified.2d.v4f32.s32
   18435     3, // llvm.nvvm.tex.unified.2d.v4s32.f32
   18436     3, // llvm.nvvm.tex.unified.2d.v4s32.s32
   18437     3, // llvm.nvvm.tex.unified.2d.v4u32.f32
   18438     3, // llvm.nvvm.tex.unified.2d.v4u32.s32
   18439     3, // llvm.nvvm.tex.unified.3d.grad.v4f32.f32
   18440     3, // llvm.nvvm.tex.unified.3d.grad.v4s32.f32
   18441     3, // llvm.nvvm.tex.unified.3d.grad.v4u32.f32
   18442     3, // llvm.nvvm.tex.unified.3d.level.v4f32.f32
   18443     3, // llvm.nvvm.tex.unified.3d.level.v4s32.f32
   18444     3, // llvm.nvvm.tex.unified.3d.level.v4u32.f32
   18445     3, // llvm.nvvm.tex.unified.3d.v4f32.f32
   18446     3, // llvm.nvvm.tex.unified.3d.v4f32.s32
   18447     3, // llvm.nvvm.tex.unified.3d.v4s32.f32
   18448     3, // llvm.nvvm.tex.unified.3d.v4s32.s32
   18449     3, // llvm.nvvm.tex.unified.3d.v4u32.f32
   18450     3, // llvm.nvvm.tex.unified.3d.v4u32.s32
   18451     3, // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32
   18452     3, // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32
   18453     3, // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32
   18454     3, // llvm.nvvm.tex.unified.cube.array.v4f32.f32
   18455     3, // llvm.nvvm.tex.unified.cube.array.v4s32.f32
   18456     3, // llvm.nvvm.tex.unified.cube.array.v4u32.f32
   18457     3, // llvm.nvvm.tex.unified.cube.level.v4f32.f32
   18458     3, // llvm.nvvm.tex.unified.cube.level.v4s32.f32
   18459     3, // llvm.nvvm.tex.unified.cube.level.v4u32.f32
   18460     3, // llvm.nvvm.tex.unified.cube.v4f32.f32
   18461     3, // llvm.nvvm.tex.unified.cube.v4s32.f32
   18462     3, // llvm.nvvm.tex.unified.cube.v4u32.f32
   18463     1, // llvm.nvvm.texsurf.handle
   18464     1, // llvm.nvvm.texsurf.handle.internal
   18465     3, // llvm.nvvm.tld4.a.2d.v4f32.f32
   18466     3, // llvm.nvvm.tld4.a.2d.v4s32.f32
   18467     3, // llvm.nvvm.tld4.a.2d.v4u32.f32
   18468     3, // llvm.nvvm.tld4.b.2d.v4f32.f32
   18469     3, // llvm.nvvm.tld4.b.2d.v4s32.f32
   18470     3, // llvm.nvvm.tld4.b.2d.v4u32.f32
   18471     3, // llvm.nvvm.tld4.g.2d.v4f32.f32
   18472     3, // llvm.nvvm.tld4.g.2d.v4s32.f32
   18473     3, // llvm.nvvm.tld4.g.2d.v4u32.f32
   18474     3, // llvm.nvvm.tld4.r.2d.v4f32.f32
   18475     3, // llvm.nvvm.tld4.r.2d.v4s32.f32
   18476     3, // llvm.nvvm.tld4.r.2d.v4u32.f32
   18477     3, // llvm.nvvm.tld4.unified.a.2d.v4f32.f32
   18478     3, // llvm.nvvm.tld4.unified.a.2d.v4s32.f32
   18479     3, // llvm.nvvm.tld4.unified.a.2d.v4u32.f32
   18480     3, // llvm.nvvm.tld4.unified.b.2d.v4f32.f32
   18481     3, // llvm.nvvm.tld4.unified.b.2d.v4s32.f32
   18482     3, // llvm.nvvm.tld4.unified.b.2d.v4u32.f32
   18483     3, // llvm.nvvm.tld4.unified.g.2d.v4f32.f32
   18484     3, // llvm.nvvm.tld4.unified.g.2d.v4s32.f32
   18485     3, // llvm.nvvm.tld4.unified.g.2d.v4u32.f32
   18486     3, // llvm.nvvm.tld4.unified.r.2d.v4f32.f32
   18487     3, // llvm.nvvm.tld4.unified.r.2d.v4s32.f32
   18488     3, // llvm.nvvm.tld4.unified.r.2d.v4u32.f32
   18489     1, // llvm.nvvm.trunc.d
   18490     1, // llvm.nvvm.trunc.f
   18491     1, // llvm.nvvm.trunc.ftz.f
   18492     1, // llvm.nvvm.txq.array.size
   18493     1, // llvm.nvvm.txq.channel.data.type
   18494     1, // llvm.nvvm.txq.channel.order
   18495     1, // llvm.nvvm.txq.depth
   18496     1, // llvm.nvvm.txq.height
   18497     1, // llvm.nvvm.txq.num.mipmap.levels
   18498     1, // llvm.nvvm.txq.num.samples
   18499     1, // llvm.nvvm.txq.width
   18500     1, // llvm.nvvm.ui2d.rm
   18501     1, // llvm.nvvm.ui2d.rn
   18502     1, // llvm.nvvm.ui2d.rp
   18503     1, // llvm.nvvm.ui2d.rz
   18504     1, // llvm.nvvm.ui2f.rm
   18505     1, // llvm.nvvm.ui2f.rn
   18506     1, // llvm.nvvm.ui2f.rp
   18507     1, // llvm.nvvm.ui2f.rz
   18508     1, // llvm.nvvm.ull2d.rm
   18509     1, // llvm.nvvm.ull2d.rn
   18510     1, // llvm.nvvm.ull2d.rp
   18511     1, // llvm.nvvm.ull2d.rz
   18512     1, // llvm.nvvm.ull2f.rm
   18513     1, // llvm.nvvm.ull2f.rn
   18514     1, // llvm.nvvm.ull2f.rp
   18515     1, // llvm.nvvm.ull2f.rz
   18516     31, // llvm.nvvm.vote.all
   18517     31, // llvm.nvvm.vote.all.sync
   18518     31, // llvm.nvvm.vote.any
   18519     31, // llvm.nvvm.vote.any.sync
   18520     31, // llvm.nvvm.vote.ballot
   18521     31, // llvm.nvvm.vote.ballot.sync
   18522     31, // llvm.nvvm.vote.uni
   18523     31, // llvm.nvvm.vote.uni.sync
   18524     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.f16
   18525     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.f16
   18526     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.global.stride.f16
   18527     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.f16
   18528     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.shared.stride.f16
   18529     13, // llvm.nvvm.wmma.load.a.sync.col.m16n16k16.stride.f16
   18530     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.f16
   18531     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.f16
   18532     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.global.stride.f16
   18533     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.f16
   18534     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.shared.stride.f16
   18535     13, // llvm.nvvm.wmma.load.a.sync.row.m16n16k16.stride.f16
   18536     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.f16
   18537     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.f16
   18538     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.global.stride.f16
   18539     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.f16
   18540     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.shared.stride.f16
   18541     13, // llvm.nvvm.wmma.load.b.sync.col.m16n16k16.stride.f16
   18542     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.f16
   18543     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.f16
   18544     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.global.stride.f16
   18545     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.f16
   18546     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.shared.stride.f16
   18547     13, // llvm.nvvm.wmma.load.b.sync.row.m16n16k16.stride.f16
   18548     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f16
   18549     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.f32
   18550     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f16
   18551     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.f32
   18552     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f16
   18553     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.global.stride.f32
   18554     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f16
   18555     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.f32
   18556     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f16
   18557     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.shared.stride.f32
   18558     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f16
   18559     13, // llvm.nvvm.wmma.load.c.sync.col.m16n16k16.stride.f32
   18560     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f16
   18561     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.f32
   18562     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f16
   18563     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.f32
   18564     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f16
   18565     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.global.stride.f32
   18566     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f16
   18567     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.f32
   18568     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f16
   18569     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.shared.stride.f32
   18570     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f16
   18571     13, // llvm.nvvm.wmma.load.c.sync.row.m16n16k16.stride.f32
   18572     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16
   18573     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f16.satfinite
   18574     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32
   18575     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f16.f32.satfinite
   18576     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16
   18577     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f16.satfinite
   18578     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32
   18579     1, // llvm.nvvm.wmma.mma.sync.col.col.m16n16k16.f32.f32.satfinite
   18580     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16
   18581     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f16.satfinite
   18582     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32
   18583     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f16.f32.satfinite
   18584     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16
   18585     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f16.satfinite
   18586     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32
   18587     1, // llvm.nvvm.wmma.mma.sync.col.row.m16n16k16.f32.f32.satfinite
   18588     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16
   18589     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f16.satfinite
   18590     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32
   18591     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f16.f32.satfinite
   18592     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16
   18593     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f16.satfinite
   18594     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32
   18595     1, // llvm.nvvm.wmma.mma.sync.row.col.m16n16k16.f32.f32.satfinite
   18596     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16
   18597     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f16.satfinite
   18598     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32
   18599     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f16.f32.satfinite
   18600     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16
   18601     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f16.satfinite
   18602     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32
   18603     1, // llvm.nvvm.wmma.mma.sync.row.row.m16n16k16.f32.f32.satfinite
   18604     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f16
   18605     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.f32
   18606     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f16
   18607     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.f32
   18608     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f16
   18609     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.global.stride.f32
   18610     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f16
   18611     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.f32
   18612     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f16
   18613     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.shared.stride.f32
   18614     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f16
   18615     38, // llvm.nvvm.wmma.store.d.sync.col.m16n16k16.stride.f32
   18616     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f16
   18617     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.f32
   18618     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f16
   18619     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.f32
   18620     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f16
   18621     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.global.stride.f32
   18622     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f16
   18623     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.f32
   18624     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f16
   18625     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.shared.stride.f32
   18626     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f16
   18627     38, // llvm.nvvm.wmma.store.d.sync.row.m16n16k16.stride.f32
   18628     1, // llvm.ppc.altivec.crypto.vcipher
   18629     1, // llvm.ppc.altivec.crypto.vcipherlast
   18630     1, // llvm.ppc.altivec.crypto.vncipher
   18631     1, // llvm.ppc.altivec.crypto.vncipherlast
   18632     1, // llvm.ppc.altivec.crypto.vpermxor
   18633     1, // llvm.ppc.altivec.crypto.vpmsumb
   18634     1, // llvm.ppc.altivec.crypto.vpmsumd
   18635     1, // llvm.ppc.altivec.crypto.vpmsumh
   18636     1, // llvm.ppc.altivec.crypto.vpmsumw
   18637     1, // llvm.ppc.altivec.crypto.vsbox
   18638     1, // llvm.ppc.altivec.crypto.vshasigmad
   18639     1, // llvm.ppc.altivec.crypto.vshasigmaw
   18640     3, // llvm.ppc.altivec.dss
   18641     3, // llvm.ppc.altivec.dssall
   18642     3, // llvm.ppc.altivec.dst
   18643     3, // llvm.ppc.altivec.dstst
   18644     3, // llvm.ppc.altivec.dststt
   18645     3, // llvm.ppc.altivec.dstt
   18646     2, // llvm.ppc.altivec.lvebx
   18647     2, // llvm.ppc.altivec.lvehx
   18648     2, // llvm.ppc.altivec.lvewx
   18649     1, // llvm.ppc.altivec.lvsl
   18650     1, // llvm.ppc.altivec.lvsr
   18651     2, // llvm.ppc.altivec.lvx
   18652     2, // llvm.ppc.altivec.lvxl
   18653     16, // llvm.ppc.altivec.mfvscr
   18654     3, // llvm.ppc.altivec.mtvscr
   18655     39, // llvm.ppc.altivec.stvebx
   18656     39, // llvm.ppc.altivec.stvehx
   18657     39, // llvm.ppc.altivec.stvewx
   18658     39, // llvm.ppc.altivec.stvx
   18659     39, // llvm.ppc.altivec.stvxl
   18660     1, // llvm.ppc.altivec.vabsdub
   18661     1, // llvm.ppc.altivec.vabsduh
   18662     1, // llvm.ppc.altivec.vabsduw
   18663     1, // llvm.ppc.altivec.vaddcuq
   18664     1, // llvm.ppc.altivec.vaddcuw
   18665     1, // llvm.ppc.altivec.vaddecuq
   18666     1, // llvm.ppc.altivec.vaddeuqm
   18667     1, // llvm.ppc.altivec.vaddsbs
   18668     1, // llvm.ppc.altivec.vaddshs
   18669     1, // llvm.ppc.altivec.vaddsws
   18670     1, // llvm.ppc.altivec.vaddubs
   18671     1, // llvm.ppc.altivec.vadduhs
   18672     1, // llvm.ppc.altivec.vadduws
   18673     1, // llvm.ppc.altivec.vavgsb
   18674     1, // llvm.ppc.altivec.vavgsh
   18675     1, // llvm.ppc.altivec.vavgsw
   18676     1, // llvm.ppc.altivec.vavgub
   18677     1, // llvm.ppc.altivec.vavguh
   18678     1, // llvm.ppc.altivec.vavguw
   18679     1, // llvm.ppc.altivec.vbpermq
   18680     1, // llvm.ppc.altivec.vcfsx
   18681     1, // llvm.ppc.altivec.vcfux
   18682     1, // llvm.ppc.altivec.vclzlsbb
   18683     1, // llvm.ppc.altivec.vcmpbfp
   18684     1, // llvm.ppc.altivec.vcmpbfp.p
   18685     1, // llvm.ppc.altivec.vcmpeqfp
   18686     1, // llvm.ppc.altivec.vcmpeqfp.p
   18687     1, // llvm.ppc.altivec.vcmpequb
   18688     1, // llvm.ppc.altivec.vcmpequb.p
   18689     1, // llvm.ppc.altivec.vcmpequd
   18690     1, // llvm.ppc.altivec.vcmpequd.p
   18691     1, // llvm.ppc.altivec.vcmpequh
   18692     1, // llvm.ppc.altivec.vcmpequh.p
   18693     1, // llvm.ppc.altivec.vcmpequw
   18694     1, // llvm.ppc.altivec.vcmpequw.p
   18695     1, // llvm.ppc.altivec.vcmpgefp
   18696     1, // llvm.ppc.altivec.vcmpgefp.p
   18697     1, // llvm.ppc.altivec.vcmpgtfp
   18698     1, // llvm.ppc.altivec.vcmpgtfp.p
   18699     1, // llvm.ppc.altivec.vcmpgtsb
   18700     1, // llvm.ppc.altivec.vcmpgtsb.p
   18701     1, // llvm.ppc.altivec.vcmpgtsd
   18702     1, // llvm.ppc.altivec.vcmpgtsd.p
   18703     1, // llvm.ppc.altivec.vcmpgtsh
   18704     1, // llvm.ppc.altivec.vcmpgtsh.p
   18705     1, // llvm.ppc.altivec.vcmpgtsw
   18706     1, // llvm.ppc.altivec.vcmpgtsw.p
   18707     1, // llvm.ppc.altivec.vcmpgtub
   18708     1, // llvm.ppc.altivec.vcmpgtub.p
   18709     1, // llvm.ppc.altivec.vcmpgtud
   18710     1, // llvm.ppc.altivec.vcmpgtud.p
   18711     1, // llvm.ppc.altivec.vcmpgtuh
   18712     1, // llvm.ppc.altivec.vcmpgtuh.p
   18713     1, // llvm.ppc.altivec.vcmpgtuw
   18714     1, // llvm.ppc.altivec.vcmpgtuw.p
   18715     1, // llvm.ppc.altivec.vcmpneb
   18716     1, // llvm.ppc.altivec.vcmpneb.p
   18717     1, // llvm.ppc.altivec.vcmpneh
   18718     1, // llvm.ppc.altivec.vcmpneh.p
   18719     1, // llvm.ppc.altivec.vcmpnew
   18720     1, // llvm.ppc.altivec.vcmpnew.p
   18721     1, // llvm.ppc.altivec.vcmpnezb
   18722     1, // llvm.ppc.altivec.vcmpnezb.p
   18723     1, // llvm.ppc.altivec.vcmpnezh
   18724     1, // llvm.ppc.altivec.vcmpnezh.p
   18725     1, // llvm.ppc.altivec.vcmpnezw
   18726     1, // llvm.ppc.altivec.vcmpnezw.p
   18727     1, // llvm.ppc.altivec.vctsxs
   18728     1, // llvm.ppc.altivec.vctuxs
   18729     1, // llvm.ppc.altivec.vctzlsbb
   18730     1, // llvm.ppc.altivec.vexptefp
   18731     1, // llvm.ppc.altivec.vgbbd
   18732     1, // llvm.ppc.altivec.vlogefp
   18733     1, // llvm.ppc.altivec.vmaddfp
   18734     1, // llvm.ppc.altivec.vmaxfp
   18735     1, // llvm.ppc.altivec.vmaxsb
   18736     1, // llvm.ppc.altivec.vmaxsd
   18737     1, // llvm.ppc.altivec.vmaxsh
   18738     1, // llvm.ppc.altivec.vmaxsw
   18739     1, // llvm.ppc.altivec.vmaxub
   18740     1, // llvm.ppc.altivec.vmaxud
   18741     1, // llvm.ppc.altivec.vmaxuh
   18742     1, // llvm.ppc.altivec.vmaxuw
   18743     1, // llvm.ppc.altivec.vmhaddshs
   18744     1, // llvm.ppc.altivec.vmhraddshs
   18745     1, // llvm.ppc.altivec.vminfp
   18746     1, // llvm.ppc.altivec.vminsb
   18747     1, // llvm.ppc.altivec.vminsd
   18748     1, // llvm.ppc.altivec.vminsh
   18749     1, // llvm.ppc.altivec.vminsw
   18750     1, // llvm.ppc.altivec.vminub
   18751     1, // llvm.ppc.altivec.vminud
   18752     1, // llvm.ppc.altivec.vminuh
   18753     1, // llvm.ppc.altivec.vminuw
   18754     1, // llvm.ppc.altivec.vmladduhm
   18755     1, // llvm.ppc.altivec.vmsummbm
   18756     1, // llvm.ppc.altivec.vmsumshm
   18757     1, // llvm.ppc.altivec.vmsumshs
   18758     1, // llvm.ppc.altivec.vmsumubm
   18759     1, // llvm.ppc.altivec.vmsumuhm
   18760     1, // llvm.ppc.altivec.vmsumuhs
   18761     1, // llvm.ppc.altivec.vmulesb
   18762     1, // llvm.ppc.altivec.vmulesh
   18763     1, // llvm.ppc.altivec.vmulesw
   18764     1, // llvm.ppc.altivec.vmuleub
   18765     1, // llvm.ppc.altivec.vmuleuh
   18766     1, // llvm.ppc.altivec.vmuleuw
   18767     1, // llvm.ppc.altivec.vmulosb
   18768     1, // llvm.ppc.altivec.vmulosh
   18769     1, // llvm.ppc.altivec.vmulosw
   18770     1, // llvm.ppc.altivec.vmuloub
   18771     1, // llvm.ppc.altivec.vmulouh
   18772     1, // llvm.ppc.altivec.vmulouw
   18773     1, // llvm.ppc.altivec.vnmsubfp
   18774     1, // llvm.ppc.altivec.vperm
   18775     1, // llvm.ppc.altivec.vpkpx
   18776     1, // llvm.ppc.altivec.vpksdss
   18777     1, // llvm.ppc.altivec.vpksdus
   18778     1, // llvm.ppc.altivec.vpkshss
   18779     1, // llvm.ppc.altivec.vpkshus
   18780     1, // llvm.ppc.altivec.vpkswss
   18781     1, // llvm.ppc.altivec.vpkswus
   18782     1, // llvm.ppc.altivec.vpkudus
   18783     1, // llvm.ppc.altivec.vpkuhus
   18784     1, // llvm.ppc.altivec.vpkuwus
   18785     1, // llvm.ppc.altivec.vprtybd
   18786     1, // llvm.ppc.altivec.vprtybq
   18787     1, // llvm.ppc.altivec.vprtybw
   18788     1, // llvm.ppc.altivec.vrefp
   18789     1, // llvm.ppc.altivec.vrfim
   18790     1, // llvm.ppc.altivec.vrfin
   18791     1, // llvm.ppc.altivec.vrfip
   18792     1, // llvm.ppc.altivec.vrfiz
   18793     1, // llvm.ppc.altivec.vrlb
   18794     1, // llvm.ppc.altivec.vrld
   18795     1, // llvm.ppc.altivec.vrldmi
   18796     1, // llvm.ppc.altivec.vrldnm
   18797     1, // llvm.ppc.altivec.vrlh
   18798     1, // llvm.ppc.altivec.vrlw
   18799     1, // llvm.ppc.altivec.vrlwmi
   18800     1, // llvm.ppc.altivec.vrlwnm
   18801     1, // llvm.ppc.altivec.vrsqrtefp
   18802     1, // llvm.ppc.altivec.vsel
   18803     1, // llvm.ppc.altivec.vsl
   18804     1, // llvm.ppc.altivec.vslb
   18805     1, // llvm.ppc.altivec.vslh
   18806     1, // llvm.ppc.altivec.vslo
   18807     1, // llvm.ppc.altivec.vslv
   18808     1, // llvm.ppc.altivec.vslw
   18809     1, // llvm.ppc.altivec.vsr
   18810     1, // llvm.ppc.altivec.vsrab
   18811     1, // llvm.ppc.altivec.vsrah
   18812     1, // llvm.ppc.altivec.vsraw
   18813     1, // llvm.ppc.altivec.vsrb
   18814     1, // llvm.ppc.altivec.vsrh
   18815     1, // llvm.ppc.altivec.vsro
   18816     1, // llvm.ppc.altivec.vsrv
   18817     1, // llvm.ppc.altivec.vsrw
   18818     1, // llvm.ppc.altivec.vsubcuq
   18819     1, // llvm.ppc.altivec.vsubcuw
   18820     1, // llvm.ppc.altivec.vsubecuq
   18821     1, // llvm.ppc.altivec.vsubeuqm
   18822     1, // llvm.ppc.altivec.vsubsbs
   18823     1, // llvm.ppc.altivec.vsubshs
   18824     1, // llvm.ppc.altivec.vsubsws
   18825     1, // llvm.ppc.altivec.vsububs
   18826     1, // llvm.ppc.altivec.vsubuhs
   18827     1, // llvm.ppc.altivec.vsubuws
   18828     1, // llvm.ppc.altivec.vsum2sws
   18829     1, // llvm.ppc.altivec.vsum4sbs
   18830     1, // llvm.ppc.altivec.vsum4shs
   18831     1, // llvm.ppc.altivec.vsum4ubs
   18832     1, // llvm.ppc.altivec.vsumsws
   18833     1, // llvm.ppc.altivec.vupkhpx
   18834     1, // llvm.ppc.altivec.vupkhsb
   18835     1, // llvm.ppc.altivec.vupkhsh
   18836     1, // llvm.ppc.altivec.vupkhsw
   18837     1, // llvm.ppc.altivec.vupklpx
   18838     1, // llvm.ppc.altivec.vupklsb
   18839     1, // llvm.ppc.altivec.vupklsh
   18840     1, // llvm.ppc.altivec.vupklsw
   18841     1, // llvm.ppc.bpermd
   18842     3, // llvm.ppc.cfence
   18843     3, // llvm.ppc.dcba
   18844     3, // llvm.ppc.dcbf
   18845     3, // llvm.ppc.dcbi
   18846     3, // llvm.ppc.dcbst
   18847     18, // llvm.ppc.dcbt
   18848     18, // llvm.ppc.dcbtst
   18849     3, // llvm.ppc.dcbz
   18850     3, // llvm.ppc.dcbzl
   18851     1, // llvm.ppc.divde
   18852     1, // llvm.ppc.divdeu
   18853     1, // llvm.ppc.divwe
   18854     1, // llvm.ppc.divweu
   18855     3, // llvm.ppc.get.texasr
   18856     3, // llvm.ppc.get.texasru
   18857     3, // llvm.ppc.get.tfhar
   18858     3, // llvm.ppc.get.tfiar
   18859     3, // llvm.ppc.is.decremented.ctr.nonzero
   18860     3, // llvm.ppc.lwsync
   18861     3, // llvm.ppc.mtctr
   18862     1, // llvm.ppc.qpx.qvfabs
   18863     1, // llvm.ppc.qpx.qvfadd
   18864     1, // llvm.ppc.qpx.qvfadds
   18865     1, // llvm.ppc.qpx.qvfcfid
   18866     1, // llvm.ppc.qpx.qvfcfids
   18867     1, // llvm.ppc.qpx.qvfcfidu
   18868     1, // llvm.ppc.qpx.qvfcfidus
   18869     1, // llvm.ppc.qpx.qvfcmpeq
   18870     1, // llvm.ppc.qpx.qvfcmpgt
   18871     1, // llvm.ppc.qpx.qvfcmplt
   18872     1, // llvm.ppc.qpx.qvfcpsgn
   18873     1, // llvm.ppc.qpx.qvfctid
   18874     1, // llvm.ppc.qpx.qvfctidu
   18875     1, // llvm.ppc.qpx.qvfctiduz
   18876     1, // llvm.ppc.qpx.qvfctidz
   18877     1, // llvm.ppc.qpx.qvfctiw
   18878     1, // llvm.ppc.qpx.qvfctiwu
   18879     1, // llvm.ppc.qpx.qvfctiwuz
   18880     1, // llvm.ppc.qpx.qvfctiwz
   18881     1, // llvm.ppc.qpx.qvflogical
   18882     1, // llvm.ppc.qpx.qvfmadd
   18883     1, // llvm.ppc.qpx.qvfmadds
   18884     1, // llvm.ppc.qpx.qvfmsub
   18885     1, // llvm.ppc.qpx.qvfmsubs
   18886     1, // llvm.ppc.qpx.qvfmul
   18887     1, // llvm.ppc.qpx.qvfmuls
   18888     1, // llvm.ppc.qpx.qvfnabs
   18889     1, // llvm.ppc.qpx.qvfneg
   18890     1, // llvm.ppc.qpx.qvfnmadd
   18891     1, // llvm.ppc.qpx.qvfnmadds
   18892     1, // llvm.ppc.qpx.qvfnmsub
   18893     1, // llvm.ppc.qpx.qvfnmsubs
   18894     1, // llvm.ppc.qpx.qvfperm
   18895     1, // llvm.ppc.qpx.qvfre
   18896     1, // llvm.ppc.qpx.qvfres
   18897     1, // llvm.ppc.qpx.qvfrim
   18898     1, // llvm.ppc.qpx.qvfrin
   18899     1, // llvm.ppc.qpx.qvfrip
   18900     1, // llvm.ppc.qpx.qvfriz
   18901     1, // llvm.ppc.qpx.qvfrsp
   18902     1, // llvm.ppc.qpx.qvfrsqrte
   18903     1, // llvm.ppc.qpx.qvfrsqrtes
   18904     1, // llvm.ppc.qpx.qvfsel
   18905     1, // llvm.ppc.qpx.qvfsub
   18906     1, // llvm.ppc.qpx.qvfsubs
   18907     1, // llvm.ppc.qpx.qvftstnan
   18908     1, // llvm.ppc.qpx.qvfxmadd
   18909     1, // llvm.ppc.qpx.qvfxmadds
   18910     1, // llvm.ppc.qpx.qvfxmul
   18911     1, // llvm.ppc.qpx.qvfxmuls
   18912     1, // llvm.ppc.qpx.qvfxxcpnmadd
   18913     1, // llvm.ppc.qpx.qvfxxcpnmadds
   18914     1, // llvm.ppc.qpx.qvfxxmadd
   18915     1, // llvm.ppc.qpx.qvfxxmadds
   18916     1, // llvm.ppc.qpx.qvfxxnpmadd
   18917     1, // llvm.ppc.qpx.qvfxxnpmadds
   18918     1, // llvm.ppc.qpx.qvgpci
   18919     2, // llvm.ppc.qpx.qvlfcd
   18920     2, // llvm.ppc.qpx.qvlfcda
   18921     2, // llvm.ppc.qpx.qvlfcs
   18922     2, // llvm.ppc.qpx.qvlfcsa
   18923     2, // llvm.ppc.qpx.qvlfd
   18924     2, // llvm.ppc.qpx.qvlfda
   18925     2, // llvm.ppc.qpx.qvlfiwa
   18926     2, // llvm.ppc.qpx.qvlfiwaa
   18927     2, // llvm.ppc.qpx.qvlfiwz
   18928     2, // llvm.ppc.qpx.qvlfiwza
   18929     2, // llvm.ppc.qpx.qvlfs
   18930     2, // llvm.ppc.qpx.qvlfsa
   18931     1, // llvm.ppc.qpx.qvlpcld
   18932     1, // llvm.ppc.qpx.qvlpcls
   18933     1, // llvm.ppc.qpx.qvlpcrd
   18934     1, // llvm.ppc.qpx.qvlpcrs
   18935     39, // llvm.ppc.qpx.qvstfcd
   18936     39, // llvm.ppc.qpx.qvstfcda
   18937     39, // llvm.ppc.qpx.qvstfcs
   18938     39, // llvm.ppc.qpx.qvstfcsa
   18939     39, // llvm.ppc.qpx.qvstfd
   18940     39, // llvm.ppc.qpx.qvstfda
   18941     39, // llvm.ppc.qpx.qvstfiw
   18942     39, // llvm.ppc.qpx.qvstfiwa
   18943     39, // llvm.ppc.qpx.qvstfs
   18944     39, // llvm.ppc.qpx.qvstfsa
   18945     3, // llvm.ppc.set.texasr
   18946     3, // llvm.ppc.set.texasru
   18947     3, // llvm.ppc.set.tfhar
   18948     3, // llvm.ppc.set.tfiar
   18949     3, // llvm.ppc.sync
   18950     3, // llvm.ppc.tabort
   18951     3, // llvm.ppc.tabortdc
   18952     3, // llvm.ppc.tabortdci
   18953     3, // llvm.ppc.tabortwc
   18954     3, // llvm.ppc.tabortwci
   18955     3, // llvm.ppc.tbegin
   18956     3, // llvm.ppc.tcheck
   18957     3, // llvm.ppc.tend
   18958     3, // llvm.ppc.tendall
   18959     3, // llvm.ppc.trechkpt
   18960     3, // llvm.ppc.treclaim
   18961     3, // llvm.ppc.tresume
   18962     3, // llvm.ppc.tsr
   18963     3, // llvm.ppc.tsuspend
   18964     3, // llvm.ppc.ttest
   18965     2, // llvm.ppc.vsx.lxvd2x
   18966     2, // llvm.ppc.vsx.lxvd2x.be
   18967     2, // llvm.ppc.vsx.lxvl
   18968     2, // llvm.ppc.vsx.lxvll
   18969     2, // llvm.ppc.vsx.lxvw4x
   18970     2, // llvm.ppc.vsx.lxvw4x.be
   18971     39, // llvm.ppc.vsx.stxvd2x
   18972     39, // llvm.ppc.vsx.stxvd2x.be
   18973     39, // llvm.ppc.vsx.stxvl
   18974     39, // llvm.ppc.vsx.stxvll
   18975     39, // llvm.ppc.vsx.stxvw4x
   18976     39, // llvm.ppc.vsx.stxvw4x.be
   18977     1, // llvm.ppc.vsx.xsmaxdp
   18978     1, // llvm.ppc.vsx.xsmindp
   18979     1, // llvm.ppc.vsx.xvcmpeqdp
   18980     1, // llvm.ppc.vsx.xvcmpeqdp.p
   18981     1, // llvm.ppc.vsx.xvcmpeqsp
   18982     1, // llvm.ppc.vsx.xvcmpeqsp.p
   18983     1, // llvm.ppc.vsx.xvcmpgedp
   18984     1, // llvm.ppc.vsx.xvcmpgedp.p
   18985     1, // llvm.ppc.vsx.xvcmpgesp
   18986     1, // llvm.ppc.vsx.xvcmpgesp.p
   18987     1, // llvm.ppc.vsx.xvcmpgtdp
   18988     1, // llvm.ppc.vsx.xvcmpgtdp.p
   18989     1, // llvm.ppc.vsx.xvcmpgtsp
   18990     1, // llvm.ppc.vsx.xvcmpgtsp.p
   18991     1, // llvm.ppc.vsx.xvcvdpsp
   18992     1, // llvm.ppc.vsx.xvcvdpsxws
   18993     1, // llvm.ppc.vsx.xvcvdpuxws
   18994     1, // llvm.ppc.vsx.xvcvhpsp
   18995     1, // llvm.ppc.vsx.xvcvspdp
   18996     1, // llvm.ppc.vsx.xvcvsphp
   18997     1, // llvm.ppc.vsx.xvcvsxdsp
   18998     1, // llvm.ppc.vsx.xvcvsxwdp
   18999     1, // llvm.ppc.vsx.xvcvuxdsp
   19000     1, // llvm.ppc.vsx.xvcvuxwdp
   19001     1, // llvm.ppc.vsx.xvdivdp
   19002     1, // llvm.ppc.vsx.xvdivsp
   19003     1, // llvm.ppc.vsx.xviexpdp
   19004     1, // llvm.ppc.vsx.xviexpsp
   19005     1, // llvm.ppc.vsx.xvmaxdp
   19006     1, // llvm.ppc.vsx.xvmaxsp
   19007     1, // llvm.ppc.vsx.xvmindp
   19008     1, // llvm.ppc.vsx.xvminsp
   19009     1, // llvm.ppc.vsx.xvrdpip
   19010     1, // llvm.ppc.vsx.xvredp
   19011     1, // llvm.ppc.vsx.xvresp
   19012     1, // llvm.ppc.vsx.xvrspip
   19013     1, // llvm.ppc.vsx.xvrsqrtedp
   19014     1, // llvm.ppc.vsx.xvrsqrtesp
   19015     1, // llvm.ppc.vsx.xvtstdcdp
   19016     1, // llvm.ppc.vsx.xvtstdcsp
   19017     1, // llvm.ppc.vsx.xvxexpdp
   19018     1, // llvm.ppc.vsx.xvxexpsp
   19019     1, // llvm.ppc.vsx.xvxsigdp
   19020     1, // llvm.ppc.vsx.xvxsigsp
   19021     1, // llvm.ppc.vsx.xxextractuw
   19022     1, // llvm.ppc.vsx.xxinsertw
   19023     1, // llvm.ppc.vsx.xxleqv
   19024     4, // llvm.r600.cube
   19025     33, // llvm.r600.group.barrier
   19026     4, // llvm.r600.implicitarg.ptr
   19027     3, // llvm.r600.rat.store.typed
   19028     4, // llvm.r600.read.global.size.x
   19029     4, // llvm.r600.read.global.size.y
   19030     4, // llvm.r600.read.global.size.z
   19031     4, // llvm.r600.read.local.size.x
   19032     4, // llvm.r600.read.local.size.y
   19033     4, // llvm.r600.read.local.size.z
   19034     4, // llvm.r600.read.ngroups.x
   19035     4, // llvm.r600.read.ngroups.y
   19036     4, // llvm.r600.read.ngroups.z
   19037     4, // llvm.r600.read.tgid.x
   19038     4, // llvm.r600.read.tgid.y
   19039     4, // llvm.r600.read.tgid.z
   19040     4, // llvm.r600.read.tidig.x
   19041     4, // llvm.r600.read.tidig.y
   19042     4, // llvm.r600.read.tidig.z
   19043     4, // llvm.r600.recipsqrt.clamped
   19044     4, // llvm.r600.recipsqrt.ieee
   19045     3, // llvm.s390.efpc
   19046     1, // llvm.s390.etnd
   19047     1, // llvm.s390.lcbb
   19048     21, // llvm.s390.ntstg
   19049     3, // llvm.s390.ppa.txassist
   19050     3, // llvm.s390.sfpc
   19051     40, // llvm.s390.tabort
   19052     41, // llvm.s390.tbegin
   19053     41, // llvm.s390.tbegin.nofloat
   19054     41, // llvm.s390.tbeginc
   19055     1, // llvm.s390.tdc
   19056     3, // llvm.s390.tend
   19057     1, // llvm.s390.vaccb
   19058     1, // llvm.s390.vacccq
   19059     1, // llvm.s390.vaccf
   19060     1, // llvm.s390.vaccg
   19061     1, // llvm.s390.vacch
   19062     1, // llvm.s390.vaccq
   19063     1, // llvm.s390.vacq
   19064     1, // llvm.s390.vaq
   19065     1, // llvm.s390.vavgb
   19066     1, // llvm.s390.vavgf
   19067     1, // llvm.s390.vavgg
   19068     1, // llvm.s390.vavgh
   19069     1, // llvm.s390.vavglb
   19070     1, // llvm.s390.vavglf
   19071     1, // llvm.s390.vavglg
   19072     1, // llvm.s390.vavglh
   19073     1, // llvm.s390.vbperm
   19074     1, // llvm.s390.vceqbs
   19075     1, // llvm.s390.vceqfs
   19076     1, // llvm.s390.vceqgs
   19077     1, // llvm.s390.vceqhs
   19078     1, // llvm.s390.vchbs
   19079     1, // llvm.s390.vchfs
   19080     1, // llvm.s390.vchgs
   19081     1, // llvm.s390.vchhs
   19082     1, // llvm.s390.vchlbs
   19083     1, // llvm.s390.vchlfs
   19084     1, // llvm.s390.vchlgs
   19085     1, // llvm.s390.vchlhs
   19086     1, // llvm.s390.vcksm
   19087     1, // llvm.s390.verimb
   19088     1, // llvm.s390.verimf
   19089     1, // llvm.s390.verimg
   19090     1, // llvm.s390.verimh
   19091     1, // llvm.s390.verllb
   19092     1, // llvm.s390.verllf
   19093     1, // llvm.s390.verllg
   19094     1, // llvm.s390.verllh
   19095     1, // llvm.s390.verllvb
   19096     1, // llvm.s390.verllvf
   19097     1, // llvm.s390.verllvg
   19098     1, // llvm.s390.verllvh
   19099     1, // llvm.s390.vfaeb
   19100     1, // llvm.s390.vfaebs
   19101     1, // llvm.s390.vfaef
   19102     1, // llvm.s390.vfaefs
   19103     1, // llvm.s390.vfaeh
   19104     1, // llvm.s390.vfaehs
   19105     1, // llvm.s390.vfaezb
   19106     1, // llvm.s390.vfaezbs
   19107     1, // llvm.s390.vfaezf
   19108     1, // llvm.s390.vfaezfs
   19109     1, // llvm.s390.vfaezh
   19110     1, // llvm.s390.vfaezhs
   19111     1, // llvm.s390.vfcedbs
   19112     1, // llvm.s390.vfcesbs
   19113     1, // llvm.s390.vfchdbs
   19114     1, // llvm.s390.vfchedbs
   19115     1, // llvm.s390.vfchesbs
   19116     1, // llvm.s390.vfchsbs
   19117     1, // llvm.s390.vfeeb
   19118     1, // llvm.s390.vfeebs
   19119     1, // llvm.s390.vfeef
   19120     1, // llvm.s390.vfeefs
   19121     1, // llvm.s390.vfeeh
   19122     1, // llvm.s390.vfeehs
   19123     1, // llvm.s390.vfeezb
   19124     1, // llvm.s390.vfeezbs
   19125     1, // llvm.s390.vfeezf
   19126     1, // llvm.s390.vfeezfs
   19127     1, // llvm.s390.vfeezh
   19128     1, // llvm.s390.vfeezhs
   19129     1, // llvm.s390.vfeneb
   19130     1, // llvm.s390.vfenebs
   19131     1, // llvm.s390.vfenef
   19132     1, // llvm.s390.vfenefs
   19133     1, // llvm.s390.vfeneh
   19134     1, // llvm.s390.vfenehs
   19135     1, // llvm.s390.vfenezb
   19136     1, // llvm.s390.vfenezbs
   19137     1, // llvm.s390.vfenezf
   19138     1, // llvm.s390.vfenezfs
   19139     1, // llvm.s390.vfenezh
   19140     1, // llvm.s390.vfenezhs
   19141     1, // llvm.s390.vfidb
   19142     1, // llvm.s390.vfisb
   19143     1, // llvm.s390.vfmaxdb
   19144     1, // llvm.s390.vfmaxsb
   19145     1, // llvm.s390.vfmindb
   19146     1, // llvm.s390.vfminsb
   19147     1, // llvm.s390.vftcidb
   19148     1, // llvm.s390.vftcisb
   19149     1, // llvm.s390.vgfmab
   19150     1, // llvm.s390.vgfmaf
   19151     1, // llvm.s390.vgfmag
   19152     1, // llvm.s390.vgfmah
   19153     1, // llvm.s390.vgfmb
   19154     1, // llvm.s390.vgfmf
   19155     1, // llvm.s390.vgfmg
   19156     1, // llvm.s390.vgfmh
   19157     1, // llvm.s390.vistrb
   19158     1, // llvm.s390.vistrbs
   19159     1, // llvm.s390.vistrf
   19160     1, // llvm.s390.vistrfs
   19161     1, // llvm.s390.vistrh
   19162     1, // llvm.s390.vistrhs
   19163     2, // llvm.s390.vlbb
   19164     2, // llvm.s390.vll
   19165     2, // llvm.s390.vlrl
   19166     1, // llvm.s390.vmaeb
   19167     1, // llvm.s390.vmaef
   19168     1, // llvm.s390.vmaeh
   19169     1, // llvm.s390.vmahb
   19170     1, // llvm.s390.vmahf
   19171     1, // llvm.s390.vmahh
   19172     1, // llvm.s390.vmaleb
   19173     1, // llvm.s390.vmalef
   19174     1, // llvm.s390.vmaleh
   19175     1, // llvm.s390.vmalhb
   19176     1, // llvm.s390.vmalhf
   19177     1, // llvm.s390.vmalhh
   19178     1, // llvm.s390.vmalob
   19179     1, // llvm.s390.vmalof
   19180     1, // llvm.s390.vmaloh
   19181     1, // llvm.s390.vmaob
   19182     1, // llvm.s390.vmaof
   19183     1, // llvm.s390.vmaoh
   19184     1, // llvm.s390.vmeb
   19185     1, // llvm.s390.vmef
   19186     1, // llvm.s390.vmeh
   19187     1, // llvm.s390.vmhb
   19188     1, // llvm.s390.vmhf
   19189     1, // llvm.s390.vmhh
   19190     1, // llvm.s390.vmleb
   19191     1, // llvm.s390.vmlef
   19192     1, // llvm.s390.vmleh
   19193     1, // llvm.s390.vmlhb
   19194     1, // llvm.s390.vmlhf
   19195     1, // llvm.s390.vmlhh
   19196     1, // llvm.s390.vmlob
   19197     1, // llvm.s390.vmlof
   19198     1, // llvm.s390.vmloh
   19199     1, // llvm.s390.vmob
   19200     1, // llvm.s390.vmof
   19201     1, // llvm.s390.vmoh
   19202     1, // llvm.s390.vmslg
   19203     1, // llvm.s390.vpdi
   19204     1, // llvm.s390.vperm
   19205     1, // llvm.s390.vpklsf
   19206     1, // llvm.s390.vpklsfs
   19207     1, // llvm.s390.vpklsg
   19208     1, // llvm.s390.vpklsgs
   19209     1, // llvm.s390.vpklsh
   19210     1, // llvm.s390.vpklshs
   19211     1, // llvm.s390.vpksf
   19212     1, // llvm.s390.vpksfs
   19213     1, // llvm.s390.vpksg
   19214     1, // llvm.s390.vpksgs
   19215     1, // llvm.s390.vpksh
   19216     1, // llvm.s390.vpkshs
   19217     1, // llvm.s390.vsbcbiq
   19218     1, // llvm.s390.vsbiq
   19219     1, // llvm.s390.vscbib
   19220     1, // llvm.s390.vscbif
   19221     1, // llvm.s390.vscbig
   19222     1, // llvm.s390.vscbih
   19223     1, // llvm.s390.vscbiq
   19224     1, // llvm.s390.vsl
   19225     1, // llvm.s390.vslb
   19226     1, // llvm.s390.vsldb
   19227     1, // llvm.s390.vsq
   19228     1, // llvm.s390.vsra
   19229     1, // llvm.s390.vsrab
   19230     1, // llvm.s390.vsrl
   19231     1, // llvm.s390.vsrlb
   19232     21, // llvm.s390.vstl
   19233     1, // llvm.s390.vstrcb
   19234     1, // llvm.s390.vstrcbs
   19235     1, // llvm.s390.vstrcf
   19236     1, // llvm.s390.vstrcfs
   19237     1, // llvm.s390.vstrch
   19238     1, // llvm.s390.vstrchs
   19239     1, // llvm.s390.vstrczb
   19240     1, // llvm.s390.vstrczbs
   19241     1, // llvm.s390.vstrczf
   19242     1, // llvm.s390.vstrczfs
   19243     1, // llvm.s390.vstrczh
   19244     1, // llvm.s390.vstrczhs
   19245     21, // llvm.s390.vstrl
   19246     1, // llvm.s390.vsumb
   19247     1, // llvm.s390.vsumgf
   19248     1, // llvm.s390.vsumgh
   19249     1, // llvm.s390.vsumh
   19250     1, // llvm.s390.vsumqf
   19251     1, // llvm.s390.vsumqg
   19252     1, // llvm.s390.vtm
   19253     1, // llvm.s390.vuphb
   19254     1, // llvm.s390.vuphf
   19255     1, // llvm.s390.vuphh
   19256     1, // llvm.s390.vuplb
   19257     1, // llvm.s390.vuplf
   19258     1, // llvm.s390.vuplhb
   19259     1, // llvm.s390.vuplhf
   19260     1, // llvm.s390.vuplhh
   19261     1, // llvm.s390.vuplhw
   19262     1, // llvm.s390.vupllb
   19263     1, // llvm.s390.vupllf
   19264     1, // llvm.s390.vupllh
   19265     16, // llvm.wasm.current.memory
   19266     3, // llvm.wasm.grow.memory
   19267     7, // llvm.wasm.rethrow
   19268     7, // llvm.wasm.throw
   19269     1, // llvm.x86.3dnow.pavgusb
   19270     1, // llvm.x86.3dnow.pf2id
   19271     1, // llvm.x86.3dnow.pfacc
   19272     1, // llvm.x86.3dnow.pfadd
   19273     1, // llvm.x86.3dnow.pfcmpeq
   19274     1, // llvm.x86.3dnow.pfcmpge
   19275     1, // llvm.x86.3dnow.pfcmpgt
   19276     1, // llvm.x86.3dnow.pfmax
   19277     1, // llvm.x86.3dnow.pfmin
   19278     1, // llvm.x86.3dnow.pfmul
   19279     1, // llvm.x86.3dnow.pfrcp
   19280     1, // llvm.x86.3dnow.pfrcpit1
   19281     1, // llvm.x86.3dnow.pfrcpit2
   19282     1, // llvm.x86.3dnow.pfrsqit1
   19283     1, // llvm.x86.3dnow.pfrsqrt
   19284     1, // llvm.x86.3dnow.pfsub
   19285     1, // llvm.x86.3dnow.pfsubr
   19286     1, // llvm.x86.3dnow.pi2fd
   19287     1, // llvm.x86.3dnow.pmulhrw
   19288     1, // llvm.x86.3dnowa.pf2iw
   19289     1, // llvm.x86.3dnowa.pfnacc
   19290     1, // llvm.x86.3dnowa.pfpnacc
   19291     1, // llvm.x86.3dnowa.pi2fw
   19292     1, // llvm.x86.3dnowa.pswapd
   19293     21, // llvm.x86.addcarry.u32
   19294     21, // llvm.x86.addcarry.u64
   19295     21, // llvm.x86.addcarryx.u32
   19296     21, // llvm.x86.addcarryx.u64
   19297     1, // llvm.x86.aesni.aesdec
   19298     1, // llvm.x86.aesni.aesdeclast
   19299     1, // llvm.x86.aesni.aesenc
   19300     1, // llvm.x86.aesni.aesenclast
   19301     1, // llvm.x86.aesni.aesimc
   19302     1, // llvm.x86.aesni.aeskeygenassist
   19303     1, // llvm.x86.avx.addsub.pd.256
   19304     1, // llvm.x86.avx.addsub.ps.256
   19305     1, // llvm.x86.avx.blendv.pd.256
   19306     1, // llvm.x86.avx.blendv.ps.256
   19307     1, // llvm.x86.avx.cmp.pd.256
   19308     1, // llvm.x86.avx.cmp.ps.256
   19309     1, // llvm.x86.avx.cvt.pd2.ps.256
   19310     1, // llvm.x86.avx.cvt.pd2dq.256
   19311     1, // llvm.x86.avx.cvt.ps2dq.256
   19312     1, // llvm.x86.avx.cvtdq2.ps.256
   19313     1, // llvm.x86.avx.cvtt.pd2dq.256
   19314     1, // llvm.x86.avx.cvtt.ps2dq.256
   19315     1, // llvm.x86.avx.dp.ps.256
   19316     1, // llvm.x86.avx.hadd.pd.256
   19317     1, // llvm.x86.avx.hadd.ps.256
   19318     1, // llvm.x86.avx.hsub.pd.256
   19319     1, // llvm.x86.avx.hsub.ps.256
   19320     16, // llvm.x86.avx.ldu.dq.256
   19321     2, // llvm.x86.avx.maskload.pd
   19322     2, // llvm.x86.avx.maskload.pd.256
   19323     2, // llvm.x86.avx.maskload.ps
   19324     2, // llvm.x86.avx.maskload.ps.256
   19325     21, // llvm.x86.avx.maskstore.pd
   19326     21, // llvm.x86.avx.maskstore.pd.256
   19327     21, // llvm.x86.avx.maskstore.ps
   19328     21, // llvm.x86.avx.maskstore.ps.256
   19329     1, // llvm.x86.avx.max.pd.256
   19330     1, // llvm.x86.avx.max.ps.256
   19331     1, // llvm.x86.avx.min.pd.256
   19332     1, // llvm.x86.avx.min.ps.256
   19333     1, // llvm.x86.avx.movmsk.pd.256
   19334     1, // llvm.x86.avx.movmsk.ps.256
   19335     1, // llvm.x86.avx.ptestc.256
   19336     1, // llvm.x86.avx.ptestnzc.256
   19337     1, // llvm.x86.avx.ptestz.256
   19338     1, // llvm.x86.avx.rcp.ps.256
   19339     1, // llvm.x86.avx.round.pd.256
   19340     1, // llvm.x86.avx.round.ps.256
   19341     1, // llvm.x86.avx.rsqrt.ps.256
   19342     1, // llvm.x86.avx.sqrt.pd.256
   19343     1, // llvm.x86.avx.sqrt.ps.256
   19344     1, // llvm.x86.avx.vpermilvar.pd
   19345     1, // llvm.x86.avx.vpermilvar.pd.256
   19346     1, // llvm.x86.avx.vpermilvar.ps
   19347     1, // llvm.x86.avx.vpermilvar.ps.256
   19348     1, // llvm.x86.avx.vtestc.pd
   19349     1, // llvm.x86.avx.vtestc.pd.256
   19350     1, // llvm.x86.avx.vtestc.ps
   19351     1, // llvm.x86.avx.vtestc.ps.256
   19352     1, // llvm.x86.avx.vtestnzc.pd
   19353     1, // llvm.x86.avx.vtestnzc.pd.256
   19354     1, // llvm.x86.avx.vtestnzc.ps
   19355     1, // llvm.x86.avx.vtestnzc.ps.256
   19356     1, // llvm.x86.avx.vtestz.pd
   19357     1, // llvm.x86.avx.vtestz.pd.256
   19358     1, // llvm.x86.avx.vtestz.ps
   19359     1, // llvm.x86.avx.vtestz.ps.256
   19360     3, // llvm.x86.avx.vzeroall
   19361     3, // llvm.x86.avx.vzeroupper
   19362     2, // llvm.x86.avx2.gather.d.d
   19363     2, // llvm.x86.avx2.gather.d.d.256
   19364     2, // llvm.x86.avx2.gather.d.pd
   19365     2, // llvm.x86.avx2.gather.d.pd.256
   19366     2, // llvm.x86.avx2.gather.d.ps
   19367     2, // llvm.x86.avx2.gather.d.ps.256
   19368     2, // llvm.x86.avx2.gather.d.q
   19369     2, // llvm.x86.avx2.gather.d.q.256
   19370     2, // llvm.x86.avx2.gather.q.d
   19371     2, // llvm.x86.avx2.gather.q.d.256
   19372     2, // llvm.x86.avx2.gather.q.pd
   19373     2, // llvm.x86.avx2.gather.q.pd.256
   19374     2, // llvm.x86.avx2.gather.q.ps
   19375     2, // llvm.x86.avx2.gather.q.ps.256
   19376     2, // llvm.x86.avx2.gather.q.q
   19377     2, // llvm.x86.avx2.gather.q.q.256
   19378     2, // llvm.x86.avx2.maskload.d
   19379     2, // llvm.x86.avx2.maskload.d.256
   19380     2, // llvm.x86.avx2.maskload.q
   19381     2, // llvm.x86.avx2.maskload.q.256
   19382     21, // llvm.x86.avx2.maskstore.d
   19383     21, // llvm.x86.avx2.maskstore.d.256
   19384     21, // llvm.x86.avx2.maskstore.q
   19385     21, // llvm.x86.avx2.maskstore.q.256
   19386     1, // llvm.x86.avx2.mpsadbw
   19387     1, // llvm.x86.avx2.packssdw
   19388     1, // llvm.x86.avx2.packsswb
   19389     1, // llvm.x86.avx2.packusdw
   19390     1, // llvm.x86.avx2.packuswb
   19391     1, // llvm.x86.avx2.padds.b
   19392     1, // llvm.x86.avx2.padds.w
   19393     1, // llvm.x86.avx2.paddus.b
   19394     1, // llvm.x86.avx2.paddus.w
   19395     1, // llvm.x86.avx2.pblendvb
   19396     1, // llvm.x86.avx2.permd
   19397     1, // llvm.x86.avx2.permps
   19398     1, // llvm.x86.avx2.phadd.d
   19399     1, // llvm.x86.avx2.phadd.sw
   19400     1, // llvm.x86.avx2.phadd.w
   19401     1, // llvm.x86.avx2.phsub.d
   19402     1, // llvm.x86.avx2.phsub.sw
   19403     1, // llvm.x86.avx2.phsub.w
   19404     1, // llvm.x86.avx2.pmadd.ub.sw
   19405     1, // llvm.x86.avx2.pmadd.wd
   19406     1, // llvm.x86.avx2.pmovmskb
   19407     1, // llvm.x86.avx2.pmul.dq
   19408     1, // llvm.x86.avx2.pmul.hr.sw
   19409     1, // llvm.x86.avx2.pmulh.w
   19410     1, // llvm.x86.avx2.pmulhu.w
   19411     1, // llvm.x86.avx2.pmulu.dq
   19412     1, // llvm.x86.avx2.psad.bw
   19413     1, // llvm.x86.avx2.pshuf.b
   19414     1, // llvm.x86.avx2.psign.b
   19415     1, // llvm.x86.avx2.psign.d
   19416     1, // llvm.x86.avx2.psign.w
   19417     1, // llvm.x86.avx2.psll.d
   19418     1, // llvm.x86.avx2.psll.q
   19419     1, // llvm.x86.avx2.psll.w
   19420     1, // llvm.x86.avx2.pslli.d
   19421     1, // llvm.x86.avx2.pslli.q
   19422     1, // llvm.x86.avx2.pslli.w
   19423     1, // llvm.x86.avx2.psllv.d
   19424     1, // llvm.x86.avx2.psllv.d.256
   19425     1, // llvm.x86.avx2.psllv.q
   19426     1, // llvm.x86.avx2.psllv.q.256
   19427     1, // llvm.x86.avx2.psra.d
   19428     1, // llvm.x86.avx2.psra.w
   19429     1, // llvm.x86.avx2.psrai.d
   19430     1, // llvm.x86.avx2.psrai.w
   19431     1, // llvm.x86.avx2.psrav.d
   19432     1, // llvm.x86.avx2.psrav.d.256
   19433     1, // llvm.x86.avx2.psrl.d
   19434     1, // llvm.x86.avx2.psrl.q
   19435     1, // llvm.x86.avx2.psrl.w
   19436     1, // llvm.x86.avx2.psrli.d
   19437     1, // llvm.x86.avx2.psrli.q
   19438     1, // llvm.x86.avx2.psrli.w
   19439     1, // llvm.x86.avx2.psrlv.d
   19440     1, // llvm.x86.avx2.psrlv.d.256
   19441     1, // llvm.x86.avx2.psrlv.q
   19442     1, // llvm.x86.avx2.psrlv.q.256
   19443     1, // llvm.x86.avx2.psubs.b
   19444     1, // llvm.x86.avx2.psubs.w
   19445     1, // llvm.x86.avx2.psubus.b
   19446     1, // llvm.x86.avx2.psubus.w
   19447     1, // llvm.x86.avx512.broadcastmb.128
   19448     1, // llvm.x86.avx512.broadcastmb.256
   19449     1, // llvm.x86.avx512.broadcastmb.512
   19450     1, // llvm.x86.avx512.broadcastmw.128
   19451     1, // llvm.x86.avx512.broadcastmw.256
   19452     1, // llvm.x86.avx512.broadcastmw.512
   19453     1, // llvm.x86.avx512.cvtb2mask.128
   19454     1, // llvm.x86.avx512.cvtb2mask.256
   19455     1, // llvm.x86.avx512.cvtb2mask.512
   19456     1, // llvm.x86.avx512.cvtd2mask.128
   19457     1, // llvm.x86.avx512.cvtd2mask.256
   19458     1, // llvm.x86.avx512.cvtd2mask.512
   19459     1, // llvm.x86.avx512.cvtq2mask.128
   19460     1, // llvm.x86.avx512.cvtq2mask.256
   19461     1, // llvm.x86.avx512.cvtq2mask.512
   19462     1, // llvm.x86.avx512.cvtsi2sd64
   19463     1, // llvm.x86.avx512.cvtsi2ss32
   19464     1, // llvm.x86.avx512.cvtsi2ss64
   19465     1, // llvm.x86.avx512.cvttsd2si
   19466     1, // llvm.x86.avx512.cvttsd2si64
   19467     1, // llvm.x86.avx512.cvttsd2usi
   19468     1, // llvm.x86.avx512.cvttsd2usi64
   19469     1, // llvm.x86.avx512.cvttss2si
   19470     1, // llvm.x86.avx512.cvttss2si64
   19471     1, // llvm.x86.avx512.cvttss2usi
   19472     1, // llvm.x86.avx512.cvttss2usi64
   19473     1, // llvm.x86.avx512.cvtusi2sd
   19474     1, // llvm.x86.avx512.cvtusi2ss
   19475     1, // llvm.x86.avx512.cvtusi642sd
   19476     1, // llvm.x86.avx512.cvtusi642ss
   19477     1, // llvm.x86.avx512.cvtw2mask.128
   19478     1, // llvm.x86.avx512.cvtw2mask.256
   19479     1, // llvm.x86.avx512.cvtw2mask.512
   19480     1, // llvm.x86.avx512.exp2.pd
   19481     1, // llvm.x86.avx512.exp2.ps
   19482     2, // llvm.x86.avx512.gather.dpd.512
   19483     2, // llvm.x86.avx512.gather.dpi.512
   19484     2, // llvm.x86.avx512.gather.dpq.512
   19485     2, // llvm.x86.avx512.gather.dps.512
   19486     2, // llvm.x86.avx512.gather.qpd.512
   19487     2, // llvm.x86.avx512.gather.qpi.512
   19488     2, // llvm.x86.avx512.gather.qpq.512
   19489     2, // llvm.x86.avx512.gather.qps.512
   19490     2, // llvm.x86.avx512.gather3div2.df
   19491     2, // llvm.x86.avx512.gather3div2.di
   19492     2, // llvm.x86.avx512.gather3div4.df
   19493     2, // llvm.x86.avx512.gather3div4.di
   19494     2, // llvm.x86.avx512.gather3div4.sf
   19495     2, // llvm.x86.avx512.gather3div4.si
   19496     2, // llvm.x86.avx512.gather3div8.sf
   19497     2, // llvm.x86.avx512.gather3div8.si
   19498     2, // llvm.x86.avx512.gather3siv2.df
   19499     2, // llvm.x86.avx512.gather3siv2.di
   19500     2, // llvm.x86.avx512.gather3siv4.df
   19501     2, // llvm.x86.avx512.gather3siv4.di
   19502     2, // llvm.x86.avx512.gather3siv4.sf
   19503     2, // llvm.x86.avx512.gather3siv4.si
   19504     2, // llvm.x86.avx512.gather3siv8.sf
   19505     2, // llvm.x86.avx512.gather3siv8.si
   19506     21, // llvm.x86.avx512.gatherpf.dpd.512
   19507     21, // llvm.x86.avx512.gatherpf.dps.512
   19508     21, // llvm.x86.avx512.gatherpf.qpd.512
   19509     21, // llvm.x86.avx512.gatherpf.qps.512
   19510     1, // llvm.x86.avx512.kand.w
   19511     1, // llvm.x86.avx512.kandn.w
   19512     1, // llvm.x86.avx512.knot.w
   19513     1, // llvm.x86.avx512.kor.w
   19514     1, // llvm.x86.avx512.kortestc.w
   19515     1, // llvm.x86.avx512.kortestz.w
   19516     1, // llvm.x86.avx512.kunpck.bw
   19517     1, // llvm.x86.avx512.kunpck.dq
   19518     1, // llvm.x86.avx512.kunpck.wd
   19519     1, // llvm.x86.avx512.kxnor.w
   19520     1, // llvm.x86.avx512.kxor.w
   19521     1, // llvm.x86.avx512.mask.add.pd.512
   19522     1, // llvm.x86.avx512.mask.add.ps.512
   19523     1, // llvm.x86.avx512.mask.add.sd.round
   19524     1, // llvm.x86.avx512.mask.add.ss.round
   19525     1, // llvm.x86.avx512.mask.cmp.pd.128
   19526     1, // llvm.x86.avx512.mask.cmp.pd.256
   19527     1, // llvm.x86.avx512.mask.cmp.pd.512
   19528     1, // llvm.x86.avx512.mask.cmp.ps.128
   19529     1, // llvm.x86.avx512.mask.cmp.ps.256
   19530     1, // llvm.x86.avx512.mask.cmp.ps.512
   19531     1, // llvm.x86.avx512.mask.cmp.sd
   19532     1, // llvm.x86.avx512.mask.cmp.ss
   19533     1, // llvm.x86.avx512.mask.compress.d.128
   19534     1, // llvm.x86.avx512.mask.compress.d.256
   19535     1, // llvm.x86.avx512.mask.compress.d.512
   19536     1, // llvm.x86.avx512.mask.compress.pd.128
   19537     1, // llvm.x86.avx512.mask.compress.pd.256
   19538     1, // llvm.x86.avx512.mask.compress.pd.512
   19539     1, // llvm.x86.avx512.mask.compress.ps.128
   19540     1, // llvm.x86.avx512.mask.compress.ps.256
   19541     1, // llvm.x86.avx512.mask.compress.ps.512
   19542     1, // llvm.x86.avx512.mask.compress.q.128
   19543     1, // llvm.x86.avx512.mask.compress.q.256
   19544     1, // llvm.x86.avx512.mask.compress.q.512
   19545     21, // llvm.x86.avx512.mask.compress.store.d.128
   19546     21, // llvm.x86.avx512.mask.compress.store.d.256
   19547     21, // llvm.x86.avx512.mask.compress.store.d.512
   19548     21, // llvm.x86.avx512.mask.compress.store.pd.128
   19549     21, // llvm.x86.avx512.mask.compress.store.pd.256
   19550     21, // llvm.x86.avx512.mask.compress.store.pd.512
   19551     21, // llvm.x86.avx512.mask.compress.store.ps.128
   19552     21, // llvm.x86.avx512.mask.compress.store.ps.256
   19553     21, // llvm.x86.avx512.mask.compress.store.ps.512
   19554     21, // llvm.x86.avx512.mask.compress.store.q.128
   19555     21, // llvm.x86.avx512.mask.compress.store.q.256
   19556     21, // llvm.x86.avx512.mask.compress.store.q.512
   19557     1, // llvm.x86.avx512.mask.conflict.d.128
   19558     1, // llvm.x86.avx512.mask.conflict.d.256
   19559     1, // llvm.x86.avx512.mask.conflict.d.512
   19560     1, // llvm.x86.avx512.mask.conflict.q.128
   19561     1, // llvm.x86.avx512.mask.conflict.q.256
   19562     1, // llvm.x86.avx512.mask.conflict.q.512
   19563     1, // llvm.x86.avx512.mask.cvtdq2ps.128
   19564     1, // llvm.x86.avx512.mask.cvtdq2ps.256
   19565     1, // llvm.x86.avx512.mask.cvtdq2ps.512
   19566     1, // llvm.x86.avx512.mask.cvtpd2dq.128
   19567     1, // llvm.x86.avx512.mask.cvtpd2dq.256
   19568     1, // llvm.x86.avx512.mask.cvtpd2dq.512
   19569     1, // llvm.x86.avx512.mask.cvtpd2ps
   19570     1, // llvm.x86.avx512.mask.cvtpd2ps.256
   19571     1, // llvm.x86.avx512.mask.cvtpd2ps.512
   19572     1, // llvm.x86.avx512.mask.cvtpd2qq.128
   19573     1, // llvm.x86.avx512.mask.cvtpd2qq.256
   19574     1, // llvm.x86.avx512.mask.cvtpd2qq.512
   19575     1, // llvm.x86.avx512.mask.cvtpd2udq.128
   19576     1, // llvm.x86.avx512.mask.cvtpd2udq.256
   19577     1, // llvm.x86.avx512.mask.cvtpd2udq.512
   19578     1, // llvm.x86.avx512.mask.cvtpd2uqq.128
   19579     1, // llvm.x86.avx512.mask.cvtpd2uqq.256
   19580     1, // llvm.x86.avx512.mask.cvtpd2uqq.512
   19581     1, // llvm.x86.avx512.mask.cvtps2dq.128
   19582     1, // llvm.x86.avx512.mask.cvtps2dq.256
   19583     1, // llvm.x86.avx512.mask.cvtps2dq.512
   19584     1, // llvm.x86.avx512.mask.cvtps2pd.128
   19585     1, // llvm.x86.avx512.mask.cvtps2pd.256
   19586     1, // llvm.x86.avx512.mask.cvtps2pd.512
   19587     1, // llvm.x86.avx512.mask.cvtps2qq.128
   19588     1, // llvm.x86.avx512.mask.cvtps2qq.256
   19589     1, // llvm.x86.avx512.mask.cvtps2qq.512
   19590     1, // llvm.x86.avx512.mask.cvtps2udq.128
   19591     1, // llvm.x86.avx512.mask.cvtps2udq.256
   19592     1, // llvm.x86.avx512.mask.cvtps2udq.512
   19593     1, // llvm.x86.avx512.mask.cvtps2uqq.128
   19594     1, // llvm.x86.avx512.mask.cvtps2uqq.256
   19595     1, // llvm.x86.avx512.mask.cvtps2uqq.512
   19596     1, // llvm.x86.avx512.mask.cvtqq2pd.128
   19597     1, // llvm.x86.avx512.mask.cvtqq2pd.256
   19598     1, // llvm.x86.avx512.mask.cvtqq2pd.512
   19599     1, // llvm.x86.avx512.mask.cvtqq2ps.128
   19600     1, // llvm.x86.avx512.mask.cvtqq2ps.256
   19601     1, // llvm.x86.avx512.mask.cvtqq2ps.512
   19602     1, // llvm.x86.avx512.mask.cvtsd2ss.round
   19603     1, // llvm.x86.avx512.mask.cvtss2sd.round
   19604     1, // llvm.x86.avx512.mask.cvttpd2dq.128
   19605     1, // llvm.x86.avx512.mask.cvttpd2dq.256
   19606     1, // llvm.x86.avx512.mask.cvttpd2dq.512
   19607     1, // llvm.x86.avx512.mask.cvttpd2qq.128
   19608     1, // llvm.x86.avx512.mask.cvttpd2qq.256
   19609     1, // llvm.x86.avx512.mask.cvttpd2qq.512
   19610     1, // llvm.x86.avx512.mask.cvttpd2udq.128
   19611     1, // llvm.x86.avx512.mask.cvttpd2udq.256
   19612     1, // llvm.x86.avx512.mask.cvttpd2udq.512
   19613     1, // llvm.x86.avx512.mask.cvttpd2uqq.128
   19614     1, // llvm.x86.avx512.mask.cvttpd2uqq.256
   19615     1, // llvm.x86.avx512.mask.cvttpd2uqq.512
   19616     1, // llvm.x86.avx512.mask.cvttps2dq.128
   19617     1, // llvm.x86.avx512.mask.cvttps2dq.256
   19618     1, // llvm.x86.avx512.mask.cvttps2dq.512
   19619     1, // llvm.x86.avx512.mask.cvttps2qq.128
   19620     1, // llvm.x86.avx512.mask.cvttps2qq.256
   19621     1, // llvm.x86.avx512.mask.cvttps2qq.512
   19622     1, // llvm.x86.avx512.mask.cvttps2udq.128
   19623     1, // llvm.x86.avx512.mask.cvttps2udq.256
   19624     1, // llvm.x86.avx512.mask.cvttps2udq.512
   19625     1, // llvm.x86.avx512.mask.cvttps2uqq.128
   19626     1, // llvm.x86.avx512.mask.cvttps2uqq.256
   19627     1, // llvm.x86.avx512.mask.cvttps2uqq.512
   19628     1, // llvm.x86.avx512.mask.cvtudq2ps.128
   19629     1, // llvm.x86.avx512.mask.cvtudq2ps.256
   19630     1, // llvm.x86.avx512.mask.cvtudq2ps.512
   19631     1, // llvm.x86.avx512.mask.cvtuqq2pd.128
   19632     1, // llvm.x86.avx512.mask.cvtuqq2pd.256
   19633     1, // llvm.x86.avx512.mask.cvtuqq2pd.512
   19634     1, // llvm.x86.avx512.mask.cvtuqq2ps.128
   19635     1, // llvm.x86.avx512.mask.cvtuqq2ps.256
   19636     1, // llvm.x86.avx512.mask.cvtuqq2ps.512
   19637     1, // llvm.x86.avx512.mask.dbpsadbw.128
   19638     1, // llvm.x86.avx512.mask.dbpsadbw.256
   19639     1, // llvm.x86.avx512.mask.dbpsadbw.512
   19640     1, // llvm.x86.avx512.mask.div.pd.512
   19641     1, // llvm.x86.avx512.mask.div.ps.512
   19642     1, // llvm.x86.avx512.mask.div.sd.round
   19643     1, // llvm.x86.avx512.mask.div.ss.round
   19644     1, // llvm.x86.avx512.mask.expand.d.128
   19645     1, // llvm.x86.avx512.mask.expand.d.256
   19646     1, // llvm.x86.avx512.mask.expand.d.512
   19647     2, // llvm.x86.avx512.mask.expand.load.d.128
   19648     2, // llvm.x86.avx512.mask.expand.load.d.256
   19649     2, // llvm.x86.avx512.mask.expand.load.d.512
   19650     2, // llvm.x86.avx512.mask.expand.load.pd.128
   19651     2, // llvm.x86.avx512.mask.expand.load.pd.256
   19652     2, // llvm.x86.avx512.mask.expand.load.pd.512
   19653     2, // llvm.x86.avx512.mask.expand.load.ps.128
   19654     2, // llvm.x86.avx512.mask.expand.load.ps.256
   19655     2, // llvm.x86.avx512.mask.expand.load.ps.512
   19656     2, // llvm.x86.avx512.mask.expand.load.q.128
   19657     2, // llvm.x86.avx512.mask.expand.load.q.256
   19658     2, // llvm.x86.avx512.mask.expand.load.q.512
   19659     1, // llvm.x86.avx512.mask.expand.pd.128
   19660     1, // llvm.x86.avx512.mask.expand.pd.256
   19661     1, // llvm.x86.avx512.mask.expand.pd.512
   19662     1, // llvm.x86.avx512.mask.expand.ps.128
   19663     1, // llvm.x86.avx512.mask.expand.ps.256
   19664     1, // llvm.x86.avx512.mask.expand.ps.512
   19665     1, // llvm.x86.avx512.mask.expand.q.128
   19666     1, // llvm.x86.avx512.mask.expand.q.256
   19667     1, // llvm.x86.avx512.mask.expand.q.512
   19668     1, // llvm.x86.avx512.mask.fixupimm.pd.128
   19669     1, // llvm.x86.avx512.mask.fixupimm.pd.256
   19670     1, // llvm.x86.avx512.mask.fixupimm.pd.512
   19671     1, // llvm.x86.avx512.mask.fixupimm.ps.128
   19672     1, // llvm.x86.avx512.mask.fixupimm.ps.256
   19673     1, // llvm.x86.avx512.mask.fixupimm.ps.512
   19674     1, // llvm.x86.avx512.mask.fixupimm.sd
   19675     1, // llvm.x86.avx512.mask.fixupimm.ss
   19676     1, // llvm.x86.avx512.mask.fpclass.pd.128
   19677     1, // llvm.x86.avx512.mask.fpclass.pd.256
   19678     1, // llvm.x86.avx512.mask.fpclass.pd.512
   19679     1, // llvm.x86.avx512.mask.fpclass.ps.128
   19680     1, // llvm.x86.avx512.mask.fpclass.ps.256
   19681     1, // llvm.x86.avx512.mask.fpclass.ps.512
   19682     1, // llvm.x86.avx512.mask.fpclass.sd
   19683     1, // llvm.x86.avx512.mask.fpclass.ss
   19684     1, // llvm.x86.avx512.mask.getexp.pd.128
   19685     1, // llvm.x86.avx512.mask.getexp.pd.256
   19686     1, // llvm.x86.avx512.mask.getexp.pd.512
   19687     1, // llvm.x86.avx512.mask.getexp.ps.128
   19688     1, // llvm.x86.avx512.mask.getexp.ps.256
   19689     1, // llvm.x86.avx512.mask.getexp.ps.512
   19690     1, // llvm.x86.avx512.mask.getexp.sd
   19691     1, // llvm.x86.avx512.mask.getexp.ss
   19692     1, // llvm.x86.avx512.mask.getmant.pd.128
   19693     1, // llvm.x86.avx512.mask.getmant.pd.256
   19694     1, // llvm.x86.avx512.mask.getmant.pd.512
   19695     1, // llvm.x86.avx512.mask.getmant.ps.128
   19696     1, // llvm.x86.avx512.mask.getmant.ps.256
   19697     1, // llvm.x86.avx512.mask.getmant.ps.512
   19698     1, // llvm.x86.avx512.mask.getmant.sd
   19699     1, // llvm.x86.avx512.mask.getmant.ss
   19700     1, // llvm.x86.avx512.mask.max.pd.512
   19701     1, // llvm.x86.avx512.mask.max.ps.512
   19702     1, // llvm.x86.avx512.mask.max.sd.round
   19703     1, // llvm.x86.avx512.mask.max.ss.round
   19704     1, // llvm.x86.avx512.mask.min.pd.512
   19705     1, // llvm.x86.avx512.mask.min.ps.512
   19706     1, // llvm.x86.avx512.mask.min.sd.round
   19707     1, // llvm.x86.avx512.mask.min.ss.round
   19708     1, // llvm.x86.avx512.mask.mul.pd.512
   19709     1, // llvm.x86.avx512.mask.mul.ps.512
   19710     1, // llvm.x86.avx512.mask.mul.sd.round
   19711     1, // llvm.x86.avx512.mask.mul.ss.round
   19712     1, // llvm.x86.avx512.mask.padds.b.128
   19713     1, // llvm.x86.avx512.mask.padds.b.256
   19714     1, // llvm.x86.avx512.mask.padds.b.512
   19715     1, // llvm.x86.avx512.mask.padds.w.128
   19716     1, // llvm.x86.avx512.mask.padds.w.256
   19717     1, // llvm.x86.avx512.mask.padds.w.512
   19718     1, // llvm.x86.avx512.mask.paddus.b.128
   19719     1, // llvm.x86.avx512.mask.paddus.b.256
   19720     1, // llvm.x86.avx512.mask.paddus.b.512
   19721     1, // llvm.x86.avx512.mask.paddus.w.128
   19722     1, // llvm.x86.avx512.mask.paddus.w.256
   19723     1, // llvm.x86.avx512.mask.paddus.w.512
   19724     1, // llvm.x86.avx512.mask.permvar.df.256
   19725     1, // llvm.x86.avx512.mask.permvar.df.512
   19726     1, // llvm.x86.avx512.mask.permvar.di.256
   19727     1, // llvm.x86.avx512.mask.permvar.di.512
   19728     1, // llvm.x86.avx512.mask.permvar.hi.128
   19729     1, // llvm.x86.avx512.mask.permvar.hi.256
   19730     1, // llvm.x86.avx512.mask.permvar.hi.512
   19731     1, // llvm.x86.avx512.mask.permvar.qi.128
   19732     1, // llvm.x86.avx512.mask.permvar.qi.256
   19733     1, // llvm.x86.avx512.mask.permvar.qi.512
   19734     1, // llvm.x86.avx512.mask.permvar.sf.256
   19735     1, // llvm.x86.avx512.mask.permvar.sf.512
   19736     1, // llvm.x86.avx512.mask.permvar.si.256
   19737     1, // llvm.x86.avx512.mask.permvar.si.512
   19738     1, // llvm.x86.avx512.mask.pmaddubs.w.128
   19739     1, // llvm.x86.avx512.mask.pmaddubs.w.256
   19740     1, // llvm.x86.avx512.mask.pmaddubs.w.512
   19741     1, // llvm.x86.avx512.mask.pmaddw.d.128
   19742     1, // llvm.x86.avx512.mask.pmaddw.d.256
   19743     1, // llvm.x86.avx512.mask.pmaddw.d.512
   19744     1, // llvm.x86.avx512.mask.pmov.db.128
   19745     1, // llvm.x86.avx512.mask.pmov.db.256
   19746     1, // llvm.x86.avx512.mask.pmov.db.512
   19747     21, // llvm.x86.avx512.mask.pmov.db.mem.128
   19748     21, // llvm.x86.avx512.mask.pmov.db.mem.256
   19749     21, // llvm.x86.avx512.mask.pmov.db.mem.512
   19750     1, // llvm.x86.avx512.mask.pmov.dw.128
   19751     1, // llvm.x86.avx512.mask.pmov.dw.256
   19752     1, // llvm.x86.avx512.mask.pmov.dw.512
   19753     21, // llvm.x86.avx512.mask.pmov.dw.mem.128
   19754     21, // llvm.x86.avx512.mask.pmov.dw.mem.256
   19755     21, // llvm.x86.avx512.mask.pmov.dw.mem.512
   19756     1, // llvm.x86.avx512.mask.pmov.qb.128
   19757     1, // llvm.x86.avx512.mask.pmov.qb.256
   19758     1, // llvm.x86.avx512.mask.pmov.qb.512
   19759     21, // llvm.x86.avx512.mask.pmov.qb.mem.128
   19760     21, // llvm.x86.avx512.mask.pmov.qb.mem.256
   19761     21, // llvm.x86.avx512.mask.pmov.qb.mem.512
   19762     1, // llvm.x86.avx512.mask.pmov.qd.128
   19763     1, // llvm.x86.avx512.mask.pmov.qd.256
   19764     1, // llvm.x86.avx512.mask.pmov.qd.512
   19765     21, // llvm.x86.avx512.mask.pmov.qd.mem.128
   19766     21, // llvm.x86.avx512.mask.pmov.qd.mem.256
   19767     21, // llvm.x86.avx512.mask.pmov.qd.mem.512
   19768     1, // llvm.x86.avx512.mask.pmov.qw.128
   19769     1, // llvm.x86.avx512.mask.pmov.qw.256
   19770     1, // llvm.x86.avx512.mask.pmov.qw.512
   19771     21, // llvm.x86.avx512.mask.pmov.qw.mem.128
   19772     21, // llvm.x86.avx512.mask.pmov.qw.mem.256
   19773     21, // llvm.x86.avx512.mask.pmov.qw.mem.512
   19774     1, // llvm.x86.avx512.mask.pmov.wb.128
   19775     1, // llvm.x86.avx512.mask.pmov.wb.256
   19776     1, // llvm.x86.avx512.mask.pmov.wb.512
   19777     21, // llvm.x86.avx512.mask.pmov.wb.mem.128
   19778     21, // llvm.x86.avx512.mask.pmov.wb.mem.256
   19779     21, // llvm.x86.avx512.mask.pmov.wb.mem.512
   19780     1, // llvm.x86.avx512.mask.pmovs.db.128
   19781     1, // llvm.x86.avx512.mask.pmovs.db.256
   19782     1, // llvm.x86.avx512.mask.pmovs.db.512
   19783     21, // llvm.x86.avx512.mask.pmovs.db.mem.128
   19784     21, // llvm.x86.avx512.mask.pmovs.db.mem.256
   19785     21, // llvm.x86.avx512.mask.pmovs.db.mem.512
   19786     1, // llvm.x86.avx512.mask.pmovs.dw.128
   19787     1, // llvm.x86.avx512.mask.pmovs.dw.256
   19788     1, // llvm.x86.avx512.mask.pmovs.dw.512
   19789     21, // llvm.x86.avx512.mask.pmovs.dw.mem.128
   19790     21, // llvm.x86.avx512.mask.pmovs.dw.mem.256
   19791     21, // llvm.x86.avx512.mask.pmovs.dw.mem.512
   19792     1, // llvm.x86.avx512.mask.pmovs.qb.128
   19793     1, // llvm.x86.avx512.mask.pmovs.qb.256
   19794     1, // llvm.x86.avx512.mask.pmovs.qb.512
   19795     21, // llvm.x86.avx512.mask.pmovs.qb.mem.128
   19796     21, // llvm.x86.avx512.mask.pmovs.qb.mem.256
   19797     21, // llvm.x86.avx512.mask.pmovs.qb.mem.512
   19798     1, // llvm.x86.avx512.mask.pmovs.qd.128
   19799     1, // llvm.x86.avx512.mask.pmovs.qd.256
   19800     1, // llvm.x86.avx512.mask.pmovs.qd.512
   19801     21, // llvm.x86.avx512.mask.pmovs.qd.mem.128
   19802     21, // llvm.x86.avx512.mask.pmovs.qd.mem.256
   19803     21, // llvm.x86.avx512.mask.pmovs.qd.mem.512
   19804     1, // llvm.x86.avx512.mask.pmovs.qw.128
   19805     1, // llvm.x86.avx512.mask.pmovs.qw.256
   19806     1, // llvm.x86.avx512.mask.pmovs.qw.512
   19807     21, // llvm.x86.avx512.mask.pmovs.qw.mem.128
   19808     21, // llvm.x86.avx512.mask.pmovs.qw.mem.256
   19809     21, // llvm.x86.avx512.mask.pmovs.qw.mem.512
   19810     1, // llvm.x86.avx512.mask.pmovs.wb.128
   19811     1, // llvm.x86.avx512.mask.pmovs.wb.256
   19812     1, // llvm.x86.avx512.mask.pmovs.wb.512
   19813     21, // llvm.x86.avx512.mask.pmovs.wb.mem.128
   19814     21, // llvm.x86.avx512.mask.pmovs.wb.mem.256
   19815     21, // llvm.x86.avx512.mask.pmovs.wb.mem.512
   19816     1, // llvm.x86.avx512.mask.pmovus.db.128
   19817     1, // llvm.x86.avx512.mask.pmovus.db.256
   19818     1, // llvm.x86.avx512.mask.pmovus.db.512
   19819     21, // llvm.x86.avx512.mask.pmovus.db.mem.128
   19820     21, // llvm.x86.avx512.mask.pmovus.db.mem.256
   19821     21, // llvm.x86.avx512.mask.pmovus.db.mem.512
   19822     1, // llvm.x86.avx512.mask.pmovus.dw.128
   19823     1, // llvm.x86.avx512.mask.pmovus.dw.256
   19824     1, // llvm.x86.avx512.mask.pmovus.dw.512
   19825     21, // llvm.x86.avx512.mask.pmovus.dw.mem.128
   19826     21, // llvm.x86.avx512.mask.pmovus.dw.mem.256
   19827     21, // llvm.x86.avx512.mask.pmovus.dw.mem.512
   19828     1, // llvm.x86.avx512.mask.pmovus.qb.128
   19829     1, // llvm.x86.avx512.mask.pmovus.qb.256
   19830     1, // llvm.x86.avx512.mask.pmovus.qb.512
   19831     21, // llvm.x86.avx512.mask.pmovus.qb.mem.128
   19832     21, // llvm.x86.avx512.mask.pmovus.qb.mem.256
   19833     21, // llvm.x86.avx512.mask.pmovus.qb.mem.512
   19834     1, // llvm.x86.avx512.mask.pmovus.qd.128
   19835     1, // llvm.x86.avx512.mask.pmovus.qd.256
   19836     1, // llvm.x86.avx512.mask.pmovus.qd.512
   19837     21, // llvm.x86.avx512.mask.pmovus.qd.mem.128
   19838     21, // llvm.x86.avx512.mask.pmovus.qd.mem.256
   19839     21, // llvm.x86.avx512.mask.pmovus.qd.mem.512
   19840     1, // llvm.x86.avx512.mask.pmovus.qw.128
   19841     1, // llvm.x86.avx512.mask.pmovus.qw.256
   19842     1, // llvm.x86.avx512.mask.pmovus.qw.512
   19843     21, // llvm.x86.avx512.mask.pmovus.qw.mem.128
   19844     21, // llvm.x86.avx512.mask.pmovus.qw.mem.256
   19845     21, // llvm.x86.avx512.mask.pmovus.qw.mem.512
   19846     1, // llvm.x86.avx512.mask.pmovus.wb.128
   19847     1, // llvm.x86.avx512.mask.pmovus.wb.256
   19848     1, // llvm.x86.avx512.mask.pmovus.wb.512
   19849     21, // llvm.x86.avx512.mask.pmovus.wb.mem.128
   19850     21, // llvm.x86.avx512.mask.pmovus.wb.mem.256
   19851     21, // llvm.x86.avx512.mask.pmovus.wb.mem.512
   19852     1, // llvm.x86.avx512.mask.pmul.hr.sw.128
   19853     1, // llvm.x86.avx512.mask.pmul.hr.sw.256
   19854     1, // llvm.x86.avx512.mask.pmul.hr.sw.512
   19855     1, // llvm.x86.avx512.mask.pmulh.w.128
   19856     1, // llvm.x86.avx512.mask.pmulh.w.256
   19857     1, // llvm.x86.avx512.mask.pmulh.w.512
   19858     1, // llvm.x86.avx512.mask.pmulhu.w.128
   19859     1, // llvm.x86.avx512.mask.pmulhu.w.256
   19860     1, // llvm.x86.avx512.mask.pmulhu.w.512
   19861     1, // llvm.x86.avx512.mask.pmultishift.qb.128
   19862     1, // llvm.x86.avx512.mask.pmultishift.qb.256
   19863     1, // llvm.x86.avx512.mask.pmultishift.qb.512
   19864     1, // llvm.x86.avx512.mask.prol.d.128
   19865     1, // llvm.x86.avx512.mask.prol.d.256
   19866     1, // llvm.x86.avx512.mask.prol.d.512
   19867     1, // llvm.x86.avx512.mask.prol.q.128
   19868     1, // llvm.x86.avx512.mask.prol.q.256
   19869     1, // llvm.x86.avx512.mask.prol.q.512
   19870     1, // llvm.x86.avx512.mask.prolv.d.128
   19871     1, // llvm.x86.avx512.mask.prolv.d.256
   19872     1, // llvm.x86.avx512.mask.prolv.d.512
   19873     1, // llvm.x86.avx512.mask.prolv.q.128
   19874     1, // llvm.x86.avx512.mask.prolv.q.256
   19875     1, // llvm.x86.avx512.mask.prolv.q.512
   19876     1, // llvm.x86.avx512.mask.pror.d.128
   19877     1, // llvm.x86.avx512.mask.pror.d.256
   19878     1, // llvm.x86.avx512.mask.pror.d.512
   19879     1, // llvm.x86.avx512.mask.pror.q.128
   19880     1, // llvm.x86.avx512.mask.pror.q.256
   19881     1, // llvm.x86.avx512.mask.pror.q.512
   19882     1, // llvm.x86.avx512.mask.prorv.d.128
   19883     1, // llvm.x86.avx512.mask.prorv.d.256
   19884     1, // llvm.x86.avx512.mask.prorv.d.512
   19885     1, // llvm.x86.avx512.mask.prorv.q.128
   19886     1, // llvm.x86.avx512.mask.prorv.q.256
   19887     1, // llvm.x86.avx512.mask.prorv.q.512
   19888     1, // llvm.x86.avx512.mask.psubs.b.128
   19889     1, // llvm.x86.avx512.mask.psubs.b.256
   19890     1, // llvm.x86.avx512.mask.psubs.b.512
   19891     1, // llvm.x86.avx512.mask.psubs.w.128
   19892     1, // llvm.x86.avx512.mask.psubs.w.256
   19893     1, // llvm.x86.avx512.mask.psubs.w.512
   19894     1, // llvm.x86.avx512.mask.psubus.b.128
   19895     1, // llvm.x86.avx512.mask.psubus.b.256
   19896     1, // llvm.x86.avx512.mask.psubus.b.512
   19897     1, // llvm.x86.avx512.mask.psubus.w.128
   19898     1, // llvm.x86.avx512.mask.psubus.w.256
   19899     1, // llvm.x86.avx512.mask.psubus.w.512
   19900     1, // llvm.x86.avx512.mask.pternlog.d.128
   19901     1, // llvm.x86.avx512.mask.pternlog.d.256
   19902     1, // llvm.x86.avx512.mask.pternlog.d.512
   19903     1, // llvm.x86.avx512.mask.pternlog.q.128
   19904     1, // llvm.x86.avx512.mask.pternlog.q.256
   19905     1, // llvm.x86.avx512.mask.pternlog.q.512
   19906     1, // llvm.x86.avx512.mask.range.pd.128
   19907     1, // llvm.x86.avx512.mask.range.pd.256
   19908     1, // llvm.x86.avx512.mask.range.pd.512
   19909     1, // llvm.x86.avx512.mask.range.ps.128
   19910     1, // llvm.x86.avx512.mask.range.ps.256
   19911     1, // llvm.x86.avx512.mask.range.ps.512
   19912     1, // llvm.x86.avx512.mask.range.sd
   19913     1, // llvm.x86.avx512.mask.range.ss
   19914     1, // llvm.x86.avx512.mask.reduce.pd.128
   19915     1, // llvm.x86.avx512.mask.reduce.pd.256
   19916     1, // llvm.x86.avx512.mask.reduce.pd.512
   19917     1, // llvm.x86.avx512.mask.reduce.ps.128
   19918     1, // llvm.x86.avx512.mask.reduce.ps.256
   19919     1, // llvm.x86.avx512.mask.reduce.ps.512
   19920     1, // llvm.x86.avx512.mask.reduce.sd
   19921     1, // llvm.x86.avx512.mask.reduce.ss
   19922     1, // llvm.x86.avx512.mask.rndscale.pd.128
   19923     1, // llvm.x86.avx512.mask.rndscale.pd.256
   19924     1, // llvm.x86.avx512.mask.rndscale.pd.512
   19925     1, // llvm.x86.avx512.mask.rndscale.ps.128
   19926     1, // llvm.x86.avx512.mask.rndscale.ps.256
   19927     1, // llvm.x86.avx512.mask.rndscale.ps.512
   19928     1, // llvm.x86.avx512.mask.rndscale.sd
   19929     1, // llvm.x86.avx512.mask.rndscale.ss
   19930     1, // llvm.x86.avx512.mask.scalef.pd.128
   19931     1, // llvm.x86.avx512.mask.scalef.pd.256
   19932     1, // llvm.x86.avx512.mask.scalef.pd.512
   19933     1, // llvm.x86.avx512.mask.scalef.ps.128
   19934     1, // llvm.x86.avx512.mask.scalef.ps.256
   19935     1, // llvm.x86.avx512.mask.scalef.ps.512
   19936     1, // llvm.x86.avx512.mask.scalef.sd
   19937     1, // llvm.x86.avx512.mask.scalef.ss
   19938     1, // llvm.x86.avx512.mask.shuf.f32x4
   19939     1, // llvm.x86.avx512.mask.shuf.f32x4.256
   19940     1, // llvm.x86.avx512.mask.shuf.f64x2
   19941     1, // llvm.x86.avx512.mask.shuf.f64x2.256
   19942     1, // llvm.x86.avx512.mask.shuf.i32x4
   19943     1, // llvm.x86.avx512.mask.shuf.i32x4.256
   19944     1, // llvm.x86.avx512.mask.shuf.i64x2
   19945     1, // llvm.x86.avx512.mask.shuf.i64x2.256
   19946     1, // llvm.x86.avx512.mask.sqrt.pd.128
   19947     1, // llvm.x86.avx512.mask.sqrt.pd.256
   19948     1, // llvm.x86.avx512.mask.sqrt.pd.512
   19949     1, // llvm.x86.avx512.mask.sqrt.ps.128
   19950     1, // llvm.x86.avx512.mask.sqrt.ps.256
   19951     1, // llvm.x86.avx512.mask.sqrt.ps.512
   19952     1, // llvm.x86.avx512.mask.sqrt.sd
   19953     1, // llvm.x86.avx512.mask.sqrt.ss
   19954     21, // llvm.x86.avx512.mask.store.ss
   19955     1, // llvm.x86.avx512.mask.sub.pd.512
   19956     1, // llvm.x86.avx512.mask.sub.ps.512
   19957     1, // llvm.x86.avx512.mask.sub.sd.round
   19958     1, // llvm.x86.avx512.mask.sub.ss.round
   19959     1, // llvm.x86.avx512.mask.vcvtph2ps.128
   19960     1, // llvm.x86.avx512.mask.vcvtph2ps.256
   19961     1, // llvm.x86.avx512.mask.vcvtph2ps.512
   19962     1, // llvm.x86.avx512.mask.vcvtps2ph.128
   19963     1, // llvm.x86.avx512.mask.vcvtps2ph.256
   19964     1, // llvm.x86.avx512.mask.vcvtps2ph.512
   19965     1, // llvm.x86.avx512.mask.vfmadd.pd.128
   19966     1, // llvm.x86.avx512.mask.vfmadd.pd.256
   19967     1, // llvm.x86.avx512.mask.vfmadd.pd.512
   19968     1, // llvm.x86.avx512.mask.vfmadd.ps.128
   19969     1, // llvm.x86.avx512.mask.vfmadd.ps.256
   19970     1, // llvm.x86.avx512.mask.vfmadd.ps.512
   19971     1, // llvm.x86.avx512.mask.vfmadd.sd
   19972     1, // llvm.x86.avx512.mask.vfmadd.ss
   19973     1, // llvm.x86.avx512.mask.vfmaddsub.pd.128
   19974     1, // llvm.x86.avx512.mask.vfmaddsub.pd.256
   19975     1, // llvm.x86.avx512.mask.vfmaddsub.pd.512
   19976     1, // llvm.x86.avx512.mask.vfmaddsub.ps.128
   19977     1, // llvm.x86.avx512.mask.vfmaddsub.ps.256
   19978     1, // llvm.x86.avx512.mask.vfmaddsub.ps.512
   19979     1, // llvm.x86.avx512.mask.vfnmadd.pd.128
   19980     1, // llvm.x86.avx512.mask.vfnmadd.pd.256
   19981     1, // llvm.x86.avx512.mask.vfnmadd.pd.512
   19982     1, // llvm.x86.avx512.mask.vfnmadd.ps.128
   19983     1, // llvm.x86.avx512.mask.vfnmadd.ps.256
   19984     1, // llvm.x86.avx512.mask.vfnmadd.ps.512
   19985     1, // llvm.x86.avx512.mask.vfnmsub.pd.128
   19986     1, // llvm.x86.avx512.mask.vfnmsub.pd.256
   19987     1, // llvm.x86.avx512.mask.vfnmsub.pd.512
   19988     1, // llvm.x86.avx512.mask.vfnmsub.ps.128
   19989     1, // llvm.x86.avx512.mask.vfnmsub.ps.256
   19990     1, // llvm.x86.avx512.mask.vfnmsub.ps.512
   19991     1, // llvm.x86.avx512.mask.vpermi2var.d.128
   19992     1, // llvm.x86.avx512.mask.vpermi2var.d.256
   19993     1, // llvm.x86.avx512.mask.vpermi2var.d.512
   19994     1, // llvm.x86.avx512.mask.vpermi2var.hi.128
   19995     1, // llvm.x86.avx512.mask.vpermi2var.hi.256
   19996     1, // llvm.x86.avx512.mask.vpermi2var.hi.512
   19997     1, // llvm.x86.avx512.mask.vpermi2var.pd.128
   19998     1, // llvm.x86.avx512.mask.vpermi2var.pd.256
   19999     1, // llvm.x86.avx512.mask.vpermi2var.pd.512
   20000     1, // llvm.x86.avx512.mask.vpermi2var.ps.128
   20001     1, // llvm.x86.avx512.mask.vpermi2var.ps.256
   20002     1, // llvm.x86.avx512.mask.vpermi2var.ps.512
   20003     1, // llvm.x86.avx512.mask.vpermi2var.q.128
   20004     1, // llvm.x86.avx512.mask.vpermi2var.q.256
   20005     1, // llvm.x86.avx512.mask.vpermi2var.q.512
   20006     1, // llvm.x86.avx512.mask.vpermi2var.qi.128
   20007     1, // llvm.x86.avx512.mask.vpermi2var.qi.256
   20008     1, // llvm.x86.avx512.mask.vpermi2var.qi.512
   20009     1, // llvm.x86.avx512.mask.vpermt2var.d.128
   20010     1, // llvm.x86.avx512.mask.vpermt2var.d.256
   20011     1, // llvm.x86.avx512.mask.vpermt2var.d.512
   20012     1, // llvm.x86.avx512.mask.vpermt2var.hi.128
   20013     1, // llvm.x86.avx512.mask.vpermt2var.hi.256
   20014     1, // llvm.x86.avx512.mask.vpermt2var.hi.512
   20015     1, // llvm.x86.avx512.mask.vpermt2var.pd.128
   20016     1, // llvm.x86.avx512.mask.vpermt2var.pd.256
   20017     1, // llvm.x86.avx512.mask.vpermt2var.pd.512
   20018     1, // llvm.x86.avx512.mask.vpermt2var.ps.128
   20019     1, // llvm.x86.avx512.mask.vpermt2var.ps.256
   20020     1, // llvm.x86.avx512.mask.vpermt2var.ps.512
   20021     1, // llvm.x86.avx512.mask.vpermt2var.q.128
   20022     1, // llvm.x86.avx512.mask.vpermt2var.q.256
   20023     1, // llvm.x86.avx512.mask.vpermt2var.q.512
   20024     1, // llvm.x86.avx512.mask.vpermt2var.qi.128
   20025     1, // llvm.x86.avx512.mask.vpermt2var.qi.256
   20026     1, // llvm.x86.avx512.mask.vpermt2var.qi.512
   20027     1, // llvm.x86.avx512.mask.vpmadd52h.uq.128
   20028     1, // llvm.x86.avx512.mask.vpmadd52h.uq.256
   20029     1, // llvm.x86.avx512.mask.vpmadd52h.uq.512
   20030     1, // llvm.x86.avx512.mask.vpmadd52l.uq.128
   20031     1, // llvm.x86.avx512.mask.vpmadd52l.uq.256
   20032     1, // llvm.x86.avx512.mask.vpmadd52l.uq.512
   20033     1, // llvm.x86.avx512.mask3.vfmadd.pd.128
   20034     1, // llvm.x86.avx512.mask3.vfmadd.pd.256
   20035     1, // llvm.x86.avx512.mask3.vfmadd.pd.512
   20036     1, // llvm.x86.avx512.mask3.vfmadd.ps.128
   20037     1, // llvm.x86.avx512.mask3.vfmadd.ps.256
   20038     1, // llvm.x86.avx512.mask3.vfmadd.ps.512
   20039     1, // llvm.x86.avx512.mask3.vfmadd.sd
   20040     1, // llvm.x86.avx512.mask3.vfmadd.ss
   20041     1, // llvm.x86.avx512.mask3.vfmaddsub.pd.128
   20042     1, // llvm.x86.avx512.mask3.vfmaddsub.pd.256
   20043     1, // llvm.x86.avx512.mask3.vfmaddsub.pd.512
   20044     1, // llvm.x86.avx512.mask3.vfmaddsub.ps.128
   20045     1, // llvm.x86.avx512.mask3.vfmaddsub.ps.256
   20046     1, // llvm.x86.avx512.mask3.vfmaddsub.ps.512
   20047     1, // llvm.x86.avx512.mask3.vfmsub.pd.128
   20048     1, // llvm.x86.avx512.mask3.vfmsub.pd.256
   20049     1, // llvm.x86.avx512.mask3.vfmsub.pd.512
   20050     1, // llvm.x86.avx512.mask3.vfmsub.ps.128
   20051     1, // llvm.x86.avx512.mask3.vfmsub.ps.256
   20052     1, // llvm.x86.avx512.mask3.vfmsub.ps.512
   20053     1, // llvm.x86.avx512.mask3.vfmsub.sd
   20054     1, // llvm.x86.avx512.mask3.vfmsub.ss
   20055     1, // llvm.x86.avx512.mask3.vfmsubadd.pd.128
   20056     1, // llvm.x86.avx512.mask3.vfmsubadd.pd.256
   20057     1, // llvm.x86.avx512.mask3.vfmsubadd.pd.512
   20058     1, // llvm.x86.avx512.mask3.vfmsubadd.ps.128
   20059     1, // llvm.x86.avx512.mask3.vfmsubadd.ps.256
   20060     1, // llvm.x86.avx512.mask3.vfmsubadd.ps.512
   20061     1, // llvm.x86.avx512.mask3.vfnmsub.pd.128
   20062     1, // llvm.x86.avx512.mask3.vfnmsub.pd.256
   20063     1, // llvm.x86.avx512.mask3.vfnmsub.pd.512
   20064     1, // llvm.x86.avx512.mask3.vfnmsub.ps.128
   20065     1, // llvm.x86.avx512.mask3.vfnmsub.ps.256
   20066     1, // llvm.x86.avx512.mask3.vfnmsub.ps.512
   20067     1, // llvm.x86.avx512.mask3.vfnmsub.sd
   20068     1, // llvm.x86.avx512.mask3.vfnmsub.ss
   20069     1, // llvm.x86.avx512.maskz.fixupimm.pd.128
   20070     1, // llvm.x86.avx512.maskz.fixupimm.pd.256
   20071     1, // llvm.x86.avx512.maskz.fixupimm.pd.512
   20072     1, // llvm.x86.avx512.maskz.fixupimm.ps.128
   20073     1, // llvm.x86.avx512.maskz.fixupimm.ps.256
   20074     1, // llvm.x86.avx512.maskz.fixupimm.ps.512
   20075     1, // llvm.x86.avx512.maskz.fixupimm.sd
   20076     1, // llvm.x86.avx512.maskz.fixupimm.ss
   20077     1, // llvm.x86.avx512.maskz.pternlog.d.128
   20078     1, // llvm.x86.avx512.maskz.pternlog.d.256
   20079     1, // llvm.x86.avx512.maskz.pternlog.d.512
   20080     1, // llvm.x86.avx512.maskz.pternlog.q.128
   20081     1, // llvm.x86.avx512.maskz.pternlog.q.256
   20082     1, // llvm.x86.avx512.maskz.pternlog.q.512
   20083     1, // llvm.x86.avx512.maskz.vfmadd.pd.128
   20084     1, // llvm.x86.avx512.maskz.vfmadd.pd.256
   20085     1, // llvm.x86.avx512.maskz.vfmadd.pd.512
   20086     1, // llvm.x86.avx512.maskz.vfmadd.ps.128
   20087     1, // llvm.x86.avx512.maskz.vfmadd.ps.256
   20088     1, // llvm.x86.avx512.maskz.vfmadd.ps.512
   20089     1, // llvm.x86.avx512.maskz.vfmadd.sd
   20090     1, // llvm.x86.avx512.maskz.vfmadd.ss
   20091     1, // llvm.x86.avx512.maskz.vfmaddsub.pd.128
   20092     1, // llvm.x86.avx512.maskz.vfmaddsub.pd.256
   20093     1, // llvm.x86.avx512.maskz.vfmaddsub.pd.512
   20094     1, // llvm.x86.avx512.maskz.vfmaddsub.ps.128
   20095     1, // llvm.x86.avx512.maskz.vfmaddsub.ps.256
   20096     1, // llvm.x86.avx512.maskz.vfmaddsub.ps.512
   20097     1, // llvm.x86.avx512.maskz.vpermt2var.d.128
   20098     1, // llvm.x86.avx512.maskz.vpermt2var.d.256
   20099     1, // llvm.x86.avx512.maskz.vpermt2var.d.512
   20100     1, // llvm.x86.avx512.maskz.vpermt2var.hi.128
   20101     1, // llvm.x86.avx512.maskz.vpermt2var.hi.256
   20102     1, // llvm.x86.avx512.maskz.vpermt2var.hi.512
   20103     1, // llvm.x86.avx512.maskz.vpermt2var.pd.128
   20104     1, // llvm.x86.avx512.maskz.vpermt2var.pd.256
   20105     1, // llvm.x86.avx512.maskz.vpermt2var.pd.512
   20106     1, // llvm.x86.avx512.maskz.vpermt2var.ps.128
   20107     1, // llvm.x86.avx512.maskz.vpermt2var.ps.256
   20108     1, // llvm.x86.avx512.maskz.vpermt2var.ps.512
   20109     1, // llvm.x86.avx512.maskz.vpermt2var.q.128
   20110     1, // llvm.x86.avx512.maskz.vpermt2var.q.256
   20111     1, // llvm.x86.avx512.maskz.vpermt2var.q.512
   20112     1, // llvm.x86.avx512.maskz.vpermt2var.qi.128
   20113     1, // llvm.x86.avx512.maskz.vpermt2var.qi.256
   20114     1, // llvm.x86.avx512.maskz.vpermt2var.qi.512
   20115     1, // llvm.x86.avx512.maskz.vpmadd52h.uq.128
   20116     1, // llvm.x86.avx512.maskz.vpmadd52h.uq.256
   20117     1, // llvm.x86.avx512.maskz.vpmadd52h.uq.512
   20118     1, // llvm.x86.avx512.maskz.vpmadd52l.uq.128
   20119     1, // llvm.x86.avx512.maskz.vpmadd52l.uq.256
   20120     1, // llvm.x86.avx512.maskz.vpmadd52l.uq.512
   20121     1, // llvm.x86.avx512.packssdw.512
   20122     1, // llvm.x86.avx512.packsswb.512
   20123     1, // llvm.x86.avx512.packusdw.512
   20124     1, // llvm.x86.avx512.packuswb.512
   20125     1, // llvm.x86.avx512.pmul.dq.512
   20126     1, // llvm.x86.avx512.pmulu.dq.512
   20127     1, // llvm.x86.avx512.psad.bw.512
   20128     1, // llvm.x86.avx512.pshuf.b.512
   20129     1, // llvm.x86.avx512.psll.d.512
   20130     1, // llvm.x86.avx512.psll.q.512
   20131     1, // llvm.x86.avx512.psll.w.512
   20132     1, // llvm.x86.avx512.pslli.d.512
   20133     1, // llvm.x86.avx512.pslli.q.512
   20134     1, // llvm.x86.avx512.pslli.w.512
   20135     1, // llvm.x86.avx512.psllv.d.512
   20136     1, // llvm.x86.avx512.psllv.q.512
   20137     1, // llvm.x86.avx512.psllv.w.128
   20138     1, // llvm.x86.avx512.psllv.w.256
   20139     1, // llvm.x86.avx512.psllv.w.512
   20140     1, // llvm.x86.avx512.psra.d.512
   20141     1, // llvm.x86.avx512.psra.q.128
   20142     1, // llvm.x86.avx512.psra.q.256
   20143     1, // llvm.x86.avx512.psra.q.512
   20144     1, // llvm.x86.avx512.psra.w.512
   20145     1, // llvm.x86.avx512.psrai.d.512
   20146     1, // llvm.x86.avx512.psrai.q.128
   20147     1, // llvm.x86.avx512.psrai.q.256
   20148     1, // llvm.x86.avx512.psrai.q.512
   20149     1, // llvm.x86.avx512.psrai.w.512
   20150     1, // llvm.x86.avx512.psrav.d.512
   20151     1, // llvm.x86.avx512.psrav.q.128
   20152     1, // llvm.x86.avx512.psrav.q.256
   20153     1, // llvm.x86.avx512.psrav.q.512
   20154     1, // llvm.x86.avx512.psrav.w.128
   20155     1, // llvm.x86.avx512.psrav.w.256
   20156     1, // llvm.x86.avx512.psrav.w.512
   20157     1, // llvm.x86.avx512.psrl.d.512
   20158     1, // llvm.x86.avx512.psrl.q.512
   20159     1, // llvm.x86.avx512.psrl.w.512
   20160     1, // llvm.x86.avx512.psrli.d.512
   20161     1, // llvm.x86.avx512.psrli.q.512
   20162     1, // llvm.x86.avx512.psrli.w.512
   20163     1, // llvm.x86.avx512.psrlv.d.512
   20164     1, // llvm.x86.avx512.psrlv.q.512
   20165     1, // llvm.x86.avx512.psrlv.w.128
   20166     1, // llvm.x86.avx512.psrlv.w.256
   20167     1, // llvm.x86.avx512.psrlv.w.512
   20168     1, // llvm.x86.avx512.ptestm.b.128
   20169     1, // llvm.x86.avx512.ptestm.b.256
   20170     1, // llvm.x86.avx512.ptestm.b.512
   20171     1, // llvm.x86.avx512.ptestm.d.128
   20172     1, // llvm.x86.avx512.ptestm.d.256
   20173     1, // llvm.x86.avx512.ptestm.d.512
   20174     1, // llvm.x86.avx512.ptestm.q.128
   20175     1, // llvm.x86.avx512.ptestm.q.256
   20176     1, // llvm.x86.avx512.ptestm.q.512
   20177     1, // llvm.x86.avx512.ptestm.w.128
   20178     1, // llvm.x86.avx512.ptestm.w.256
   20179     1, // llvm.x86.avx512.ptestm.w.512
   20180     1, // llvm.x86.avx512.ptestnm.b.128
   20181     1, // llvm.x86.avx512.ptestnm.b.256
   20182     1, // llvm.x86.avx512.ptestnm.b.512
   20183     1, // llvm.x86.avx512.ptestnm.d.128
   20184     1, // llvm.x86.avx512.ptestnm.d.256
   20185     1, // llvm.x86.avx512.ptestnm.d.512
   20186     1, // llvm.x86.avx512.ptestnm.q.128
   20187     1, // llvm.x86.avx512.ptestnm.q.256
   20188     1, // llvm.x86.avx512.ptestnm.q.512
   20189     1, // llvm.x86.avx512.ptestnm.w.128
   20190     1, // llvm.x86.avx512.ptestnm.w.256
   20191     1, // llvm.x86.avx512.ptestnm.w.512
   20192     1, // llvm.x86.avx512.rcp14.pd.128
   20193     1, // llvm.x86.avx512.rcp14.pd.256
   20194     1, // llvm.x86.avx512.rcp14.pd.512
   20195     1, // llvm.x86.avx512.rcp14.ps.128
   20196     1, // llvm.x86.avx512.rcp14.ps.256
   20197     1, // llvm.x86.avx512.rcp14.ps.512
   20198     1, // llvm.x86.avx512.rcp14.sd
   20199     1, // llvm.x86.avx512.rcp14.ss
   20200     1, // llvm.x86.avx512.rcp28.pd
   20201     1, // llvm.x86.avx512.rcp28.ps
   20202     1, // llvm.x86.avx512.rcp28.sd
   20203     1, // llvm.x86.avx512.rcp28.ss
   20204     1, // llvm.x86.avx512.rsqrt14.pd.128
   20205     1, // llvm.x86.avx512.rsqrt14.pd.256
   20206     1, // llvm.x86.avx512.rsqrt14.pd.512
   20207     1, // llvm.x86.avx512.rsqrt14.ps.128
   20208     1, // llvm.x86.avx512.rsqrt14.ps.256
   20209     1, // llvm.x86.avx512.rsqrt14.ps.512
   20210     1, // llvm.x86.avx512.rsqrt14.sd
   20211     1, // llvm.x86.avx512.rsqrt14.ss
   20212     1, // llvm.x86.avx512.rsqrt28.pd
   20213     1, // llvm.x86.avx512.rsqrt28.ps
   20214     1, // llvm.x86.avx512.rsqrt28.sd
   20215     1, // llvm.x86.avx512.rsqrt28.ss
   20216     21, // llvm.x86.avx512.scatter.dpd.512
   20217     21, // llvm.x86.avx512.scatter.dpi.512
   20218     21, // llvm.x86.avx512.scatter.dpq.512
   20219     21, // llvm.x86.avx512.scatter.dps.512
   20220     21, // llvm.x86.avx512.scatter.qpd.512
   20221     21, // llvm.x86.avx512.scatter.qpi.512
   20222     21, // llvm.x86.avx512.scatter.qpq.512
   20223     21, // llvm.x86.avx512.scatter.qps.512
   20224     21, // llvm.x86.avx512.scatterdiv2.df
   20225     21, // llvm.x86.avx512.scatterdiv2.di
   20226     21, // llvm.x86.avx512.scatterdiv4.df
   20227     21, // llvm.x86.avx512.scatterdiv4.di
   20228     21, // llvm.x86.avx512.scatterdiv4.sf
   20229     21, // llvm.x86.avx512.scatterdiv4.si
   20230     21, // llvm.x86.avx512.scatterdiv8.sf
   20231     21, // llvm.x86.avx512.scatterdiv8.si
   20232     21, // llvm.x86.avx512.scatterpf.dpd.512
   20233     21, // llvm.x86.avx512.scatterpf.dps.512
   20234     21, // llvm.x86.avx512.scatterpf.qpd.512
   20235     21, // llvm.x86.avx512.scatterpf.qps.512
   20236     21, // llvm.x86.avx512.scattersiv2.df
   20237     21, // llvm.x86.avx512.scattersiv2.di
   20238     21, // llvm.x86.avx512.scattersiv4.df
   20239     21, // llvm.x86.avx512.scattersiv4.di
   20240     21, // llvm.x86.avx512.scattersiv4.sf
   20241     21, // llvm.x86.avx512.scattersiv4.si
   20242     21, // llvm.x86.avx512.scattersiv8.sf
   20243     21, // llvm.x86.avx512.scattersiv8.si
   20244     2, // llvm.x86.avx512.vbroadcast.sd.512
   20245     2, // llvm.x86.avx512.vbroadcast.ss.512
   20246     1, // llvm.x86.avx512.vcomi.sd
   20247     1, // llvm.x86.avx512.vcomi.ss
   20248     1, // llvm.x86.avx512.vcvtsd2si32
   20249     1, // llvm.x86.avx512.vcvtsd2si64
   20250     1, // llvm.x86.avx512.vcvtsd2usi32
   20251     1, // llvm.x86.avx512.vcvtsd2usi64
   20252     1, // llvm.x86.avx512.vcvtss2si32
   20253     1, // llvm.x86.avx512.vcvtss2si64
   20254     1, // llvm.x86.avx512.vcvtss2usi32
   20255     1, // llvm.x86.avx512.vcvtss2usi64
   20256     1, // llvm.x86.avx512.vpermilvar.pd.512
   20257     1, // llvm.x86.avx512.vpermilvar.ps.512
   20258     1, // llvm.x86.bmi.bextr.32
   20259     1, // llvm.x86.bmi.bextr.64
   20260     1, // llvm.x86.bmi.bzhi.32
   20261     1, // llvm.x86.bmi.bzhi.64
   20262     1, // llvm.x86.bmi.pdep.32
   20263     1, // llvm.x86.bmi.pdep.64
   20264     1, // llvm.x86.bmi.pext.32
   20265     1, // llvm.x86.bmi.pext.64
   20266     3, // llvm.x86.clflushopt
   20267     3, // llvm.x86.clwb
   20268     3, // llvm.x86.clzero
   20269     3, // llvm.x86.flags.read.u32
   20270     3, // llvm.x86.flags.read.u64
   20271     3, // llvm.x86.flags.write.u32
   20272     3, // llvm.x86.flags.write.u64
   20273     1, // llvm.x86.fma.vfmadd.pd
   20274     1, // llvm.x86.fma.vfmadd.pd.256
   20275     1, // llvm.x86.fma.vfmadd.ps
   20276     1, // llvm.x86.fma.vfmadd.ps.256
   20277     1, // llvm.x86.fma.vfmadd.sd
   20278     1, // llvm.x86.fma.vfmadd.ss
   20279     1, // llvm.x86.fma.vfmaddsub.pd
   20280     1, // llvm.x86.fma.vfmaddsub.pd.256
   20281     1, // llvm.x86.fma.vfmaddsub.ps
   20282     1, // llvm.x86.fma.vfmaddsub.ps.256
   20283     1, // llvm.x86.fma.vfmsub.pd
   20284     1, // llvm.x86.fma.vfmsub.pd.256
   20285     1, // llvm.x86.fma.vfmsub.ps
   20286     1, // llvm.x86.fma.vfmsub.ps.256
   20287     1, // llvm.x86.fma.vfmsub.sd
   20288     1, // llvm.x86.fma.vfmsub.ss
   20289     1, // llvm.x86.fma.vfmsubadd.pd
   20290     1, // llvm.x86.fma.vfmsubadd.pd.256
   20291     1, // llvm.x86.fma.vfmsubadd.ps
   20292     1, // llvm.x86.fma.vfmsubadd.ps.256
   20293     1, // llvm.x86.fma.vfnmadd.pd
   20294     1, // llvm.x86.fma.vfnmadd.pd.256
   20295     1, // llvm.x86.fma.vfnmadd.ps
   20296     1, // llvm.x86.fma.vfnmadd.ps.256
   20297     1, // llvm.x86.fma.vfnmadd.sd
   20298     1, // llvm.x86.fma.vfnmadd.ss
   20299     1, // llvm.x86.fma.vfnmsub.pd
   20300     1, // llvm.x86.fma.vfnmsub.pd.256
   20301     1, // llvm.x86.fma.vfnmsub.ps
   20302     1, // llvm.x86.fma.vfnmsub.ps.256
   20303     1, // llvm.x86.fma.vfnmsub.sd
   20304     1, // llvm.x86.fma.vfnmsub.ss
   20305     3, // llvm.x86.fxrstor
   20306     3, // llvm.x86.fxrstor64
   20307     3, // llvm.x86.fxsave
   20308     3, // llvm.x86.fxsave64
   20309     3, // llvm.x86.int
   20310     3, // llvm.x86.llwpcb
   20311     3, // llvm.x86.lwpins32
   20312     3, // llvm.x86.lwpins64
   20313     3, // llvm.x86.lwpval32
   20314     3, // llvm.x86.lwpval64
   20315     3, // llvm.x86.mmx.emms
   20316     3, // llvm.x86.mmx.femms
   20317     3, // llvm.x86.mmx.maskmovq
   20318     3, // llvm.x86.mmx.movnt.dq
   20319     1, // llvm.x86.mmx.packssdw
   20320     1, // llvm.x86.mmx.packsswb
   20321     1, // llvm.x86.mmx.packuswb
   20322     1, // llvm.x86.mmx.padd.b
   20323     1, // llvm.x86.mmx.padd.d
   20324     1, // llvm.x86.mmx.padd.q
   20325     1, // llvm.x86.mmx.padd.w
   20326     1, // llvm.x86.mmx.padds.b
   20327     1, // llvm.x86.mmx.padds.w
   20328     1, // llvm.x86.mmx.paddus.b
   20329     1, // llvm.x86.mmx.paddus.w
   20330     1, // llvm.x86.mmx.palignr.b
   20331     1, // llvm.x86.mmx.pand
   20332     1, // llvm.x86.mmx.pandn
   20333     1, // llvm.x86.mmx.pavg.b
   20334     1, // llvm.x86.mmx.pavg.w
   20335     1, // llvm.x86.mmx.pcmpeq.b
   20336     1, // llvm.x86.mmx.pcmpeq.d
   20337     1, // llvm.x86.mmx.pcmpeq.w
   20338     1, // llvm.x86.mmx.pcmpgt.b
   20339     1, // llvm.x86.mmx.pcmpgt.d
   20340     1, // llvm.x86.mmx.pcmpgt.w
   20341     1, // llvm.x86.mmx.pextr.w
   20342     1, // llvm.x86.mmx.pinsr.w
   20343     1, // llvm.x86.mmx.pmadd.wd
   20344     1, // llvm.x86.mmx.pmaxs.w
   20345     1, // llvm.x86.mmx.pmaxu.b
   20346     1, // llvm.x86.mmx.pmins.w
   20347     1, // llvm.x86.mmx.pminu.b
   20348     1, // llvm.x86.mmx.pmovmskb
   20349     1, // llvm.x86.mmx.pmulh.w
   20350     1, // llvm.x86.mmx.pmulhu.w
   20351     1, // llvm.x86.mmx.pmull.w
   20352     1, // llvm.x86.mmx.pmulu.dq
   20353     1, // llvm.x86.mmx.por
   20354     1, // llvm.x86.mmx.psad.bw
   20355     1, // llvm.x86.mmx.psll.d
   20356     1, // llvm.x86.mmx.psll.q
   20357     1, // llvm.x86.mmx.psll.w
   20358     1, // llvm.x86.mmx.pslli.d
   20359     1, // llvm.x86.mmx.pslli.q
   20360     1, // llvm.x86.mmx.pslli.w
   20361     1, // llvm.x86.mmx.psra.d
   20362     1, // llvm.x86.mmx.psra.w
   20363     1, // llvm.x86.mmx.psrai.d
   20364     1, // llvm.x86.mmx.psrai.w
   20365     1, // llvm.x86.mmx.psrl.d
   20366     1, // llvm.x86.mmx.psrl.q
   20367     1, // llvm.x86.mmx.psrl.w
   20368     1, // llvm.x86.mmx.psrli.d
   20369     1, // llvm.x86.mmx.psrli.q
   20370     1, // llvm.x86.mmx.psrli.w
   20371     1, // llvm.x86.mmx.psub.b
   20372     1, // llvm.x86.mmx.psub.d
   20373     1, // llvm.x86.mmx.psub.q
   20374     1, // llvm.x86.mmx.psub.w
   20375     1, // llvm.x86.mmx.psubs.b
   20376     1, // llvm.x86.mmx.psubs.w
   20377     1, // llvm.x86.mmx.psubus.b
   20378     1, // llvm.x86.mmx.psubus.w
   20379     1, // llvm.x86.mmx.punpckhbw
   20380     1, // llvm.x86.mmx.punpckhdq
   20381     1, // llvm.x86.mmx.punpckhwd
   20382     1, // llvm.x86.mmx.punpcklbw
   20383     1, // llvm.x86.mmx.punpckldq
   20384     1, // llvm.x86.mmx.punpcklwd
   20385     1, // llvm.x86.mmx.pxor
   20386     3, // llvm.x86.monitorx
   20387     3, // llvm.x86.mwaitx
   20388     1, // llvm.x86.pclmulqdq
   20389     3, // llvm.x86.rdfsbase.32
   20390     3, // llvm.x86.rdfsbase.64
   20391     3, // llvm.x86.rdgsbase.32
   20392     3, // llvm.x86.rdgsbase.64
   20393     3, // llvm.x86.rdpkru
   20394     3, // llvm.x86.rdpmc
   20395     3, // llvm.x86.rdrand.16
   20396     3, // llvm.x86.rdrand.32
   20397     3, // llvm.x86.rdrand.64
   20398     3, // llvm.x86.rdseed.16
   20399     3, // llvm.x86.rdseed.32
   20400     3, // llvm.x86.rdseed.64
   20401     3, // llvm.x86.rdtsc
   20402     21, // llvm.x86.rdtscp
   20403     3, // llvm.x86.seh.ehguard
   20404     3, // llvm.x86.seh.ehregnode
   20405     1, // llvm.x86.seh.lsda
   20406     1, // llvm.x86.seh.recoverfp
   20407     1, // llvm.x86.sha1msg1
   20408     1, // llvm.x86.sha1msg2
   20409     1, // llvm.x86.sha1nexte
   20410     1, // llvm.x86.sha1rnds4
   20411     1, // llvm.x86.sha256msg1
   20412     1, // llvm.x86.sha256msg2
   20413     1, // llvm.x86.sha256rnds2
   20414     3, // llvm.x86.slwpcb
   20415     1, // llvm.x86.sse.cmp.ps
   20416     1, // llvm.x86.sse.cmp.ss
   20417     1, // llvm.x86.sse.comieq.ss
   20418     1, // llvm.x86.sse.comige.ss
   20419     1, // llvm.x86.sse.comigt.ss
   20420     1, // llvm.x86.sse.comile.ss
   20421     1, // llvm.x86.sse.comilt.ss
   20422     1, // llvm.x86.sse.comineq.ss
   20423     1, // llvm.x86.sse.cvtpd2pi
   20424     1, // llvm.x86.sse.cvtpi2pd
   20425     1, // llvm.x86.sse.cvtpi2ps
   20426     1, // llvm.x86.sse.cvtps2pi
   20427     1, // llvm.x86.sse.cvtsi2ss
   20428     1, // llvm.x86.sse.cvtsi642ss
   20429     1, // llvm.x86.sse.cvtss2si
   20430     1, // llvm.x86.sse.cvtss2si64
   20431     1, // llvm.x86.sse.cvttpd2pi
   20432     1, // llvm.x86.sse.cvttps2pi
   20433     1, // llvm.x86.sse.cvttss2si
   20434     1, // llvm.x86.sse.cvttss2si64
   20435     3, // llvm.x86.sse.ldmxcsr
   20436     1, // llvm.x86.sse.max.ps
   20437     1, // llvm.x86.sse.max.ss
   20438     1, // llvm.x86.sse.min.ps
   20439     1, // llvm.x86.sse.min.ss
   20440     1, // llvm.x86.sse.movmsk.ps
   20441     1, // llvm.x86.sse.pshuf.w
   20442     1, // llvm.x86.sse.rcp.ps
   20443     1, // llvm.x86.sse.rcp.ss
   20444     1, // llvm.x86.sse.rsqrt.ps
   20445     1, // llvm.x86.sse.rsqrt.ss
   20446     3, // llvm.x86.sse.sfence
   20447     1, // llvm.x86.sse.sqrt.ps
   20448     1, // llvm.x86.sse.sqrt.ss
   20449     3, // llvm.x86.sse.stmxcsr
   20450     1, // llvm.x86.sse.ucomieq.ss
   20451     1, // llvm.x86.sse.ucomige.ss
   20452     1, // llvm.x86.sse.ucomigt.ss
   20453     1, // llvm.x86.sse.ucomile.ss
   20454     1, // llvm.x86.sse.ucomilt.ss
   20455     1, // llvm.x86.sse.ucomineq.ss
   20456     3, // llvm.x86.sse2.clflush
   20457     1, // llvm.x86.sse2.cmp.pd
   20458     1, // llvm.x86.sse2.cmp.sd
   20459     1, // llvm.x86.sse2.comieq.sd
   20460     1, // llvm.x86.sse2.comige.sd
   20461     1, // llvm.x86.sse2.comigt.sd
   20462     1, // llvm.x86.sse2.comile.sd
   20463     1, // llvm.x86.sse2.comilt.sd
   20464     1, // llvm.x86.sse2.comineq.sd
   20465     1, // llvm.x86.sse2.cvtdq2ps
   20466     1, // llvm.x86.sse2.cvtpd2dq
   20467     1, // llvm.x86.sse2.cvtpd2ps
   20468     1, // llvm.x86.sse2.cvtps2dq
   20469     1, // llvm.x86.sse2.cvtsd2si
   20470     1, // llvm.x86.sse2.cvtsd2si64
   20471     1, // llvm.x86.sse2.cvtsd2ss
   20472     1, // llvm.x86.sse2.cvtsi2sd
   20473     1, // llvm.x86.sse2.cvtsi642sd
   20474     1, // llvm.x86.sse2.cvtss2sd
   20475     1, // llvm.x86.sse2.cvttpd2dq
   20476     1, // llvm.x86.sse2.cvttps2dq
   20477     1, // llvm.x86.sse2.cvttsd2si
   20478     1, // llvm.x86.sse2.cvttsd2si64
   20479     3, // llvm.x86.sse2.lfence
   20480     3, // llvm.x86.sse2.maskmov.dqu
   20481     1, // llvm.x86.sse2.max.pd
   20482     1, // llvm.x86.sse2.max.sd
   20483     3, // llvm.x86.sse2.mfence
   20484     1, // llvm.x86.sse2.min.pd
   20485     1, // llvm.x86.sse2.min.sd
   20486     1, // llvm.x86.sse2.movmsk.pd
   20487     1, // llvm.x86.sse2.packssdw.128
   20488     1, // llvm.x86.sse2.packsswb.128
   20489     1, // llvm.x86.sse2.packuswb.128
   20490     1, // llvm.x86.sse2.padds.b
   20491     1, // llvm.x86.sse2.padds.w
   20492     1, // llvm.x86.sse2.paddus.b
   20493     1, // llvm.x86.sse2.paddus.w
   20494     3, // llvm.x86.sse2.pause
   20495     1, // llvm.x86.sse2.pmadd.wd
   20496     1, // llvm.x86.sse2.pmovmskb.128
   20497     1, // llvm.x86.sse2.pmulh.w
   20498     1, // llvm.x86.sse2.pmulhu.w
   20499     1, // llvm.x86.sse2.pmulu.dq
   20500     1, // llvm.x86.sse2.psad.bw
   20501     1, // llvm.x86.sse2.psll.d
   20502     1, // llvm.x86.sse2.psll.q
   20503     1, // llvm.x86.sse2.psll.w
   20504     1, // llvm.x86.sse2.pslli.d
   20505     1, // llvm.x86.sse2.pslli.q
   20506     1, // llvm.x86.sse2.pslli.w
   20507     1, // llvm.x86.sse2.psra.d
   20508     1, // llvm.x86.sse2.psra.w
   20509     1, // llvm.x86.sse2.psrai.d
   20510     1, // llvm.x86.sse2.psrai.w
   20511     1, // llvm.x86.sse2.psrl.d
   20512     1, // llvm.x86.sse2.psrl.q
   20513     1, // llvm.x86.sse2.psrl.w
   20514     1, // llvm.x86.sse2.psrli.d
   20515     1, // llvm.x86.sse2.psrli.q
   20516     1, // llvm.x86.sse2.psrli.w
   20517     1, // llvm.x86.sse2.psubs.b
   20518     1, // llvm.x86.sse2.psubs.w
   20519     1, // llvm.x86.sse2.psubus.b
   20520     1, // llvm.x86.sse2.psubus.w
   20521     1, // llvm.x86.sse2.sqrt.pd
   20522     1, // llvm.x86.sse2.sqrt.sd
   20523     1, // llvm.x86.sse2.ucomieq.sd
   20524     1, // llvm.x86.sse2.ucomige.sd
   20525     1, // llvm.x86.sse2.ucomigt.sd
   20526     1, // llvm.x86.sse2.ucomile.sd
   20527     1, // llvm.x86.sse2.ucomilt.sd
   20528     1, // llvm.x86.sse2.ucomineq.sd
   20529     1, // llvm.x86.sse3.addsub.pd
   20530     1, // llvm.x86.sse3.addsub.ps
   20531     1, // llvm.x86.sse3.hadd.pd
   20532     1, // llvm.x86.sse3.hadd.ps
   20533     1, // llvm.x86.sse3.hsub.pd
   20534     1, // llvm.x86.sse3.hsub.ps
   20535     16, // llvm.x86.sse3.ldu.dq
   20536     3, // llvm.x86.sse3.monitor
   20537     3, // llvm.x86.sse3.mwait
   20538     1, // llvm.x86.sse41.blendvpd
   20539     1, // llvm.x86.sse41.blendvps
   20540     1, // llvm.x86.sse41.dppd
   20541     1, // llvm.x86.sse41.dpps
   20542     1, // llvm.x86.sse41.insertps
   20543     1, // llvm.x86.sse41.mpsadbw
   20544     1, // llvm.x86.sse41.packusdw
   20545     1, // llvm.x86.sse41.pblendvb
   20546     1, // llvm.x86.sse41.phminposuw
   20547     1, // llvm.x86.sse41.pmuldq
   20548     1, // llvm.x86.sse41.ptestc
   20549     1, // llvm.x86.sse41.ptestnzc
   20550     1, // llvm.x86.sse41.ptestz
   20551     1, // llvm.x86.sse41.round.pd
   20552     1, // llvm.x86.sse41.round.ps
   20553     1, // llvm.x86.sse41.round.sd
   20554     1, // llvm.x86.sse41.round.ss
   20555     1, // llvm.x86.sse42.crc32.32.16
   20556     1, // llvm.x86.sse42.crc32.32.32
   20557     1, // llvm.x86.sse42.crc32.32.8
   20558     1, // llvm.x86.sse42.crc32.64.64
   20559     1, // llvm.x86.sse42.pcmpestri128
   20560     1, // llvm.x86.sse42.pcmpestria128
   20561     1, // llvm.x86.sse42.pcmpestric128
   20562     1, // llvm.x86.sse42.pcmpestrio128
   20563     1, // llvm.x86.sse42.pcmpestris128
   20564     1, // llvm.x86.sse42.pcmpestriz128
   20565     1, // llvm.x86.sse42.pcmpestrm128
   20566     1, // llvm.x86.sse42.pcmpistri128
   20567     1, // llvm.x86.sse42.pcmpistria128
   20568     1, // llvm.x86.sse42.pcmpistric128
   20569     1, // llvm.x86.sse42.pcmpistrio128
   20570     1, // llvm.x86.sse42.pcmpistris128
   20571     1, // llvm.x86.sse42.pcmpistriz128
   20572     1, // llvm.x86.sse42.pcmpistrm128
   20573     1, // llvm.x86.sse4a.extrq
   20574     1, // llvm.x86.sse4a.extrqi
   20575     1, // llvm.x86.sse4a.insertq
   20576     1, // llvm.x86.sse4a.insertqi
   20577     1, // llvm.x86.ssse3.pabs.b
   20578     1, // llvm.x86.ssse3.pabs.d
   20579     1, // llvm.x86.ssse3.pabs.w
   20580     1, // llvm.x86.ssse3.phadd.d
   20581     1, // llvm.x86.ssse3.phadd.d.128
   20582     1, // llvm.x86.ssse3.phadd.sw
   20583     1, // llvm.x86.ssse3.phadd.sw.128
   20584     1, // llvm.x86.ssse3.phadd.w
   20585     1, // llvm.x86.ssse3.phadd.w.128
   20586     1, // llvm.x86.ssse3.phsub.d
   20587     1, // llvm.x86.ssse3.phsub.d.128
   20588     1, // llvm.x86.ssse3.phsub.sw
   20589     1, // llvm.x86.ssse3.phsub.sw.128
   20590     1, // llvm.x86.ssse3.phsub.w
   20591     1, // llvm.x86.ssse3.phsub.w.128
   20592     1, // llvm.x86.ssse3.pmadd.ub.sw
   20593     1, // llvm.x86.ssse3.pmadd.ub.sw.128
   20594     1, // llvm.x86.ssse3.pmul.hr.sw
   20595     1, // llvm.x86.ssse3.pmul.hr.sw.128
   20596     1, // llvm.x86.ssse3.pshuf.b
   20597     1, // llvm.x86.ssse3.pshuf.b.128
   20598     1, // llvm.x86.ssse3.psign.b
   20599     1, // llvm.x86.ssse3.psign.b.128
   20600     1, // llvm.x86.ssse3.psign.d
   20601     1, // llvm.x86.ssse3.psign.d.128
   20602     1, // llvm.x86.ssse3.psign.w
   20603     1, // llvm.x86.ssse3.psign.w.128
   20604     21, // llvm.x86.subborrow.u32
   20605     21, // llvm.x86.subborrow.u64
   20606     1, // llvm.x86.tbm.bextri.u32
   20607     1, // llvm.x86.tbm.bextri.u64
   20608     1, // llvm.x86.vcvtph2ps.128
   20609     1, // llvm.x86.vcvtph2ps.256
   20610     1, // llvm.x86.vcvtps2ph.128
   20611     1, // llvm.x86.vcvtps2ph.256
   20612     3, // llvm.x86.wrfsbase.32
   20613     3, // llvm.x86.wrfsbase.64
   20614     3, // llvm.x86.wrgsbase.32
   20615     3, // llvm.x86.wrgsbase.64
   20616     3, // llvm.x86.wrpkru
   20617     3, // llvm.x86.xabort
   20618     3, // llvm.x86.xbegin
   20619     3, // llvm.x86.xend
   20620     3, // llvm.x86.xgetbv
   20621     1, // llvm.x86.xop.vfrcz.pd
   20622     1, // llvm.x86.xop.vfrcz.pd.256
   20623     1, // llvm.x86.xop.vfrcz.ps
   20624     1, // llvm.x86.xop.vfrcz.ps.256
   20625     1, // llvm.x86.xop.vfrcz.sd
   20626     1, // llvm.x86.xop.vfrcz.ss
   20627     1, // llvm.x86.xop.vpcomb
   20628     1, // llvm.x86.xop.vpcomd
   20629     1, // llvm.x86.xop.vpcomq
   20630     1, // llvm.x86.xop.vpcomub
   20631     1, // llvm.x86.xop.vpcomud
   20632     1, // llvm.x86.xop.vpcomuq
   20633     1, // llvm.x86.xop.vpcomuw
   20634     1, // llvm.x86.xop.vpcomw
   20635     1, // llvm.x86.xop.vpermil2pd
   20636     1, // llvm.x86.xop.vpermil2pd.256
   20637     1, // llvm.x86.xop.vpermil2ps
   20638     1, // llvm.x86.xop.vpermil2ps.256
   20639     1, // llvm.x86.xop.vphaddbd
   20640     1, // llvm.x86.xop.vphaddbq
   20641     1, // llvm.x86.xop.vphaddbw
   20642     1, // llvm.x86.xop.vphadddq
   20643     1, // llvm.x86.xop.vphaddubd
   20644     1, // llvm.x86.xop.vphaddubq
   20645     1, // llvm.x86.xop.vphaddubw
   20646     1, // llvm.x86.xop.vphaddudq
   20647     1, // llvm.x86.xop.vphadduwd
   20648     1, // llvm.x86.xop.vphadduwq
   20649     1, // llvm.x86.xop.vphaddwd
   20650     1, // llvm.x86.xop.vphaddwq
   20651     1, // llvm.x86.xop.vphsubbw
   20652     1, // llvm.x86.xop.vphsubdq
   20653     1, // llvm.x86.xop.vphsubwd
   20654     1, // llvm.x86.xop.vpmacsdd
   20655     1, // llvm.x86.xop.vpmacsdqh
   20656     1, // llvm.x86.xop.vpmacsdql
   20657     1, // llvm.x86.xop.vpmacssdd
   20658     1, // llvm.x86.xop.vpmacssdqh
   20659     1, // llvm.x86.xop.vpmacssdql
   20660     1, // llvm.x86.xop.vpmacsswd
   20661     1, // llvm.x86.xop.vpmacssww
   20662     1, // llvm.x86.xop.vpmacswd
   20663     1, // llvm.x86.xop.vpmacsww
   20664     1, // llvm.x86.xop.vpmadcsswd
   20665     1, // llvm.x86.xop.vpmadcswd
   20666     1, // llvm.x86.xop.vpperm
   20667     1, // llvm.x86.xop.vprotb
   20668     1, // llvm.x86.xop.vprotbi
   20669     1, // llvm.x86.xop.vprotd
   20670     1, // llvm.x86.xop.vprotdi
   20671     1, // llvm.x86.xop.vprotq
   20672     1, // llvm.x86.xop.vprotqi
   20673     1, // llvm.x86.xop.vprotw
   20674     1, // llvm.x86.xop.vprotwi
   20675     1, // llvm.x86.xop.vpshab
   20676     1, // llvm.x86.xop.vpshad
   20677     1, // llvm.x86.xop.vpshaq
   20678     1, // llvm.x86.xop.vpshaw
   20679     1, // llvm.x86.xop.vpshlb
   20680     1, // llvm.x86.xop.vpshld
   20681     1, // llvm.x86.xop.vpshlq
   20682     1, // llvm.x86.xop.vpshlw
   20683     3, // llvm.x86.xrstor
   20684     3, // llvm.x86.xrstor64
   20685     3, // llvm.x86.xrstors
   20686     3, // llvm.x86.xrstors64
   20687     3, // llvm.x86.xsave
   20688     3, // llvm.x86.xsave64
   20689     3, // llvm.x86.xsavec
   20690     3, // llvm.x86.xsavec64
   20691     3, // llvm.x86.xsaveopt
   20692     3, // llvm.x86.xsaveopt64
   20693     3, // llvm.x86.xsaves
   20694     3, // llvm.x86.xsaves64
   20695     3, // llvm.x86.xsetbv
   20696     3, // llvm.x86.xtest
   20697     1, // llvm.xcore.bitrev
   20698     3, // llvm.xcore.checkevent
   20699     42, // llvm.xcore.chkct
   20700     3, // llvm.xcore.clre
   20701     42, // llvm.xcore.clrpt
   20702     3, // llvm.xcore.clrsr
   20703     1, // llvm.xcore.crc32
   20704     1, // llvm.xcore.crc8
   20705     42, // llvm.xcore.edu
   20706     42, // llvm.xcore.eeu
   20707     42, // llvm.xcore.endin
   20708     42, // llvm.xcore.freer
   20709     3, // llvm.xcore.geted
   20710     3, // llvm.xcore.getet
   20711     1, // llvm.xcore.getid
   20712     3, // llvm.xcore.getps
   20713     3, // llvm.xcore.getr
   20714     42, // llvm.xcore.getst
   20715     42, // llvm.xcore.getts
   20716     42, // llvm.xcore.in
   20717     42, // llvm.xcore.inct
   20718     42, // llvm.xcore.initcp
   20719     42, // llvm.xcore.initdp
   20720     42, // llvm.xcore.initlr
   20721     42, // llvm.xcore.initpc
   20722     42, // llvm.xcore.initsp
   20723     42, // llvm.xcore.inshr
   20724     42, // llvm.xcore.int
   20725     42, // llvm.xcore.mjoin
   20726     42, // llvm.xcore.msync
   20727     42, // llvm.xcore.out
   20728     42, // llvm.xcore.outct
   20729     42, // llvm.xcore.outshr
   20730     42, // llvm.xcore.outt
   20731     42, // llvm.xcore.peek
   20732     42, // llvm.xcore.setc
   20733     43, // llvm.xcore.setclk
   20734     42, // llvm.xcore.setd
   20735     42, // llvm.xcore.setev
   20736     3, // llvm.xcore.setps
   20737     42, // llvm.xcore.setpsc
   20738     42, // llvm.xcore.setpt
   20739     43, // llvm.xcore.setrdy
   20740     3, // llvm.xcore.setsr
   20741     42, // llvm.xcore.settw
   20742     42, // llvm.xcore.setv
   20743     1, // llvm.xcore.sext
   20744     3, // llvm.xcore.ssync
   20745     42, // llvm.xcore.syncr
   20746     42, // llvm.xcore.testct
   20747     42, // llvm.xcore.testwct
   20748     16, // llvm.xcore.waitevent
   20749     1, // llvm.xcore.zext
   20750   };
   20751 
   20752   AttributeList AS[5];
   20753   unsigned NumAttrs = 0;
   20754   if (id != 0) {
   20755     switch(IntrinsicsToAttributesMap[id - 1]) {
   20756     default: llvm_unreachable("Invalid attribute number");
   20757     case 3: {
   20758       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
   20759       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20760       NumAttrs = 1;
   20761       break;
   20762       }
   20763     case 42: {
   20764       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20765       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20766       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
   20767       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20768       NumAttrs = 2;
   20769       break;
   20770       }
   20771     case 43: {
   20772       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20773       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20774       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
   20775       AS[1] = AttributeList::get(C, 2, AttrParam2);
   20776       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
   20777       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20778       NumAttrs = 3;
   20779       break;
   20780       }
   20781     case 6: {
   20782       const Attribute::AttrKind AttrParam2[]= {Attribute::WriteOnly};
   20783       AS[0] = AttributeList::get(C, 2, AttrParam2);
   20784       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
   20785       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20786       NumAttrs = 2;
   20787       break;
   20788       }
   20789     case 25: {
   20790       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20791       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20792       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOrArgMemOnly};
   20793       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20794       NumAttrs = 2;
   20795       break;
   20796       }
   20797     case 21: {
   20798       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20799       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20800       NumAttrs = 1;
   20801       break;
   20802       }
   20803     case 18: {
   20804       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20805       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20806       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20807       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20808       NumAttrs = 2;
   20809       break;
   20810       }
   20811     case 8: {
   20812       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20813       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20814       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20815       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20816       NumAttrs = 2;
   20817       break;
   20818       }
   20819     case 24: {
   20820       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
   20821       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20822       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20823       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20824       NumAttrs = 2;
   20825       break;
   20826       }
   20827     case 22: {
   20828       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
   20829       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20830       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20831       AS[1] = AttributeList::get(C, 2, AttrParam2);
   20832       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20833       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20834       NumAttrs = 3;
   20835       break;
   20836       }
   20837     case 23: {
   20838       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20839       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20840       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20841       AS[1] = AttributeList::get(C, 2, AttrParam2);
   20842       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20843       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20844       NumAttrs = 3;
   20845       break;
   20846       }
   20847     case 20: {
   20848       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
   20849       AS[0] = AttributeList::get(C, 2, AttrParam2);
   20850       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20851       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20852       NumAttrs = 2;
   20853       break;
   20854       }
   20855     case 17: {
   20856       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
   20857       AS[0] = AttributeList::get(C, 2, AttrParam2);
   20858       const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
   20859       AS[1] = AttributeList::get(C, 3, AttrParam3);
   20860       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20861       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20862       NumAttrs = 3;
   20863       break;
   20864       }
   20865     case 19: {
   20866       const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
   20867       AS[0] = AttributeList::get(C, 3, AttrParam3);
   20868       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20869       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20870       NumAttrs = 2;
   20871       break;
   20872       }
   20873     case 28: {
   20874       const Attribute::AttrKind AttrParam4[]= {Attribute::NoCapture};
   20875       AS[0] = AttributeList::get(C, 4, AttrParam4);
   20876       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20877       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20878       NumAttrs = 2;
   20879       break;
   20880       }
   20881     case 29: {
   20882       const Attribute::AttrKind AttrParam5[]= {Attribute::NoCapture};
   20883       AS[0] = AttributeList::get(C, 5, AttrParam5);
   20884       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20885       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20886       NumAttrs = 2;
   20887       break;
   20888       }
   20889     case 30: {
   20890       const Attribute::AttrKind AttrParam6[]= {Attribute::NoCapture};
   20891       AS[0] = AttributeList::get(C, 6, AttrParam6);
   20892       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ArgMemOnly};
   20893       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20894       NumAttrs = 2;
   20895       break;
   20896       }
   20897     case 15: {
   20898       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::InaccessibleMemOnly};
   20899       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20900       NumAttrs = 1;
   20901       break;
   20902       }
   20903     case 32: {
   20904       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
   20905       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20906       NumAttrs = 1;
   20907       break;
   20908       }
   20909     case 27: {
   20910       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20911       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20912       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly};
   20913       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20914       NumAttrs = 2;
   20915       break;
   20916       }
   20917     case 39: {
   20918       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
   20919       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20920       NumAttrs = 1;
   20921       break;
   20922       }
   20923     case 38: {
   20924       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::WriteOnly};
   20925       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20926       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
   20927       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20928       NumAttrs = 2;
   20929       break;
   20930       }
   20931     case 16: {
   20932       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
   20933       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20934       NumAttrs = 1;
   20935       break;
   20936       }
   20937     case 2: {
   20938       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
   20939       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20940       NumAttrs = 1;
   20941       break;
   20942       }
   20943     case 37: {
   20944       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20945       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20946       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
   20947       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20948       NumAttrs = 2;
   20949       break;
   20950       }
   20951     case 13: {
   20952       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20953       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20954       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
   20955       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20956       NumAttrs = 2;
   20957       break;
   20958       }
   20959     case 9: {
   20960       const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20961       AS[0] = AttributeList::get(C, 2, AttrParam2);
   20962       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
   20963       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20964       NumAttrs = 2;
   20965       break;
   20966       }
   20967     case 10: {
   20968       const Attribute::AttrKind AttrParam2[]= {Attribute::ReadNone};
   20969       AS[0] = AttributeList::get(C, 2, AttrParam2);
   20970       const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture,Attribute::ReadOnly};
   20971       AS[1] = AttributeList::get(C, 3, AttrParam3);
   20972       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly,Attribute::ArgMemOnly};
   20973       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20974       NumAttrs = 3;
   20975       break;
   20976       }
   20977     case 1: {
   20978       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
   20979       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20980       NumAttrs = 1;
   20981       break;
   20982       }
   20983     case 12: {
   20984       const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
   20985       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20986       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
   20987       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20988       NumAttrs = 2;
   20989       break;
   20990       }
   20991     case 26: {
   20992       const Attribute::AttrKind AttrParam1[]= {Attribute::Returned};
   20993       AS[0] = AttributeList::get(C, 1, AttrParam1);
   20994       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
   20995       AS[1] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   20996       NumAttrs = 2;
   20997       break;
   20998       }
   20999     case 11: {
   21000       const Attribute::AttrKind AttrParam1[]= {Attribute::ReadNone};
   21001       AS[0] = AttributeList::get(C, 1, AttrParam1);
   21002       const Attribute::AttrKind AttrParam2[]= {Attribute::ReadNone};
   21003       AS[1] = AttributeList::get(C, 2, AttrParam2);
   21004       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
   21005       AS[2] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21006       NumAttrs = 3;
   21007       break;
   21008       }
   21009     case 36: {
   21010       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::WriteOnly,Attribute::ArgMemOnly};
   21011       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21012       NumAttrs = 1;
   21013       break;
   21014       }
   21015     case 34: {
   21016       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Speculatable,Attribute::ReadOnly};
   21017       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21018       NumAttrs = 1;
   21019       break;
   21020       }
   21021     case 4: {
   21022       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Speculatable,Attribute::ReadNone};
   21023       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21024       NumAttrs = 1;
   21025       break;
   21026       }
   21027     case 33: {
   21028       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent};
   21029       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21030       NumAttrs = 1;
   21031       break;
   21032       }
   21033     case 31: {
   21034       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::Convergent,Attribute::ReadNone};
   21035       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21036       NumAttrs = 1;
   21037       break;
   21038       }
   21039     case 14: {
   21040       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoReturn};
   21041       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21042       NumAttrs = 1;
   21043       break;
   21044       }
   21045     case 41: {
   21046       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoDuplicate};
   21047       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21048       NumAttrs = 1;
   21049       break;
   21050       }
   21051     case 5: {
   21052       const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoDuplicate,Attribute::InaccessibleMemOnly};
   21053       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21054       NumAttrs = 1;
   21055       break;
   21056       }
   21057     case 7: {
   21058       return AttributeList();
   21059       }
   21060     case 35: {
   21061       const Attribute::AttrKind Atts[] = {Attribute::ReadNone};
   21062       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21063       NumAttrs = 1;
   21064       break;
   21065       }
   21066     case 40: {
   21067       const Attribute::AttrKind Atts[] = {Attribute::NoReturn};
   21068       AS[0] = AttributeList::get(C, AttributeList::FunctionIndex, Atts);
   21069       NumAttrs = 1;
   21070       break;
   21071       }
   21072     }
   21073   }
   21074   return AttributeList::get(C, makeArrayRef(AS, NumAttrs));
   21075 }
   21076 #endif // GET_INTRINSIC_ATTRIBUTES
   21077 
   21078 // Get the LLVM intrinsic that corresponds to a builtin.
   21079 // This is used by the C front-end.  The builtin name is passed
   21080 // in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
   21081 // in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
   21082 #ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
   21083 Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefixStr, StringRef BuiltinNameStr) {
   21084   static const char BuiltinNames[] = {
   21085   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'd', 'j', 'u', 's',
   21086   't', '_', 't', 'r', 'a', 'm', 'p', 'o', 'l', 'i', 'n', 'e', '\000', '_', '_',
   21087   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'd', 'e', 'b', 'u', 'g', 't', 'r',
   21088   'a', 'p', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'u', 'n',
   21089   'w', 'i', 'n', 'd', '_', 'i', 'n', 'i', 't', '\000', '_', '_', 'b', 'u', 'i',
   21090   'l', 't', 'i', 'n', '_', 'f', 'l', 't', '_', 'r', 'o', 'u', 'n', 'd', 's',
   21091   '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'n', 'i', 't',
   21092   '_', 't', 'r', 'a', 'm', 'p', 'o', 'l', 'i', 'n', 'e', '\000', '_', '_', 'b',
   21093   'u', 'i', 'l', 't', 'i', 'n', '_', 'o', 'b', 'j', 'e', 'c', 't', '_', 's',
   21094   'i', 'z', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's',
   21095   't', 'a', 'c', 'k', '_', 'r', 'e', 's', 't', 'o', 'r', 'e', '\000', '_', '_',
   21096   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 't', 'a', 'c', 'k', '_', 's',
   21097   'a', 'v', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 't',
   21098   'h', 'r', 'e', 'a', 'd', '_', 'p', 'o', 'i', 'n', 't', 'e', 'r', '\000', '_',
   21099   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 't', 'r', 'a', 'p', '\000', '_',
   21100   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'd', 'm',
   21101   'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm',
   21102   '_', 'd', 's', 'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   21103   'a', 'r', 'm', '_', 'i', 's', 'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
   21104   'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'b', 'u', 'f', 'f', 'e',
   21105   'r', '_', 'w', 'b', 'i', 'n', 'v', 'l', '1', '\000', '_', '_', 'b', 'u', 'i',
   21106   'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'b', 'u', 'f',
   21107   'f', 'e', 'r', '_', 'w', 'b', 'i', 'n', 'v', 'l', '1', '_', 's', 'c', '\000',
   21108   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21109   'n', '_', 'b', 'u', 'f', 'f', 'e', 'r', '_', 'w', 'b', 'i', 'n', 'v', 'l',
   21110   '1', '_', 'v', 'o', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   21111   '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'u', 'b', 'e', 'i', 'd', '\000',
   21112   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21113   'n', '_', 'c', 'u', 'b', 'e', 'm', 'a', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21114   't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c', 'u', 'b', 'e',
   21115   's', 'c', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm',
   21116   'd', 'g', 'c', 'n', '_', 'c', 'u', 'b', 'e', 't', 'c', '\000', '_', '_', 'b',
   21117   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'c',
   21118   'v', 't', '_', 'p', 'k', '_', 'u', '8', '_', 'f', '3', '2', '\000', '_', '_',
   21119   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_',
   21120   'd', 'i', 's', 'p', 'a', 't', 'c', 'h', '_', 'i', 'd', '\000', '_', '_', 'b',
   21121   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd',
   21122   'i', 's', 'p', 'a', 't', 'c', 'h', '_', 'p', 't', 'r', '\000', '_', '_', 'b',
   21123   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd',
   21124   's', '_', 'b', 'p', 'e', 'r', 'm', 'u', 't', 'e', '\000', '_', '_', 'b', 'u',
   21125   'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's',
   21126   '_', 'p', 'e', 'r', 'm', 'u', 't', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21127   't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'd', 's', '_', 's',
   21128   'w', 'i', 'z', 'z', 'l', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   21129   'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'f', 'm', 'e', 'd', '3', '\000',
   21130   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21131   'n', '_', 'f', 'm', 'u', 'l', '_', 'l', 'e', 'g', 'a', 'c', 'y', '\000', '_',
   21132   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n',
   21133   '_', 'g', 'r', 'o', 'u', 'p', 's', 't', 'a', 't', 'i', 'c', 's', 'i', 'z',
   21134   'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd',
   21135   'g', 'c', 'n', '_', 'i', 'm', 'p', 'l', 'i', 'c', 'i', 't', '_', 'b', 'u',
   21136   'f', 'f', 'e', 'r', '_', 'p', 't', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21137   't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'i', 'm', 'p', 'l',
   21138   'i', 'c', 'i', 't', 'a', 'r', 'g', '_', 'p', 't', 'r', '\000', '_', '_', 'b',
   21139   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'i',
   21140   'n', 't', 'e', 'r', 'p', '_', 'm', 'o', 'v', '\000', '_', '_', 'b', 'u', 'i',
   21141   'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'i', 'n', 't',
   21142   'e', 'r', 'p', '_', 'p', '1', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   21143   'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'i', 'n', 't', 'e', 'r', 'p',
   21144   '_', 'p', '2', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a',
   21145   'm', 'd', 'g', 'c', 'n', '_', 'k', 'e', 'r', 'n', 'a', 'r', 'g', '_', 's',
   21146   'e', 'g', 'm', 'e', 'n', 't', '_', 'p', 't', 'r', '\000', '_', '_', 'b', 'u',
   21147   'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'l', 'e',
   21148   'r', 'p', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm',
   21149   'd', 'g', 'c', 'n', '_', 'm', 'b', 'c', 'n', 't', '_', 'h', 'i', '\000', '_',
   21150   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n',
   21151   '_', 'm', 'b', 'c', 'n', 't', '_', 'l', 'o', '\000', '_', '_', 'b', 'u', 'i',
   21152   'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'm', 'q', 's',
   21153   'a', 'd', '_', 'p', 'k', '_', 'u', '1', '6', '_', 'u', '8', '\000', '_', '_',
   21154   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_',
   21155   'm', 'q', 's', 'a', 'd', '_', 'u', '3', '2', '_', 'u', '8', '\000', '_', '_',
   21156   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_',
   21157   'm', 's', 'a', 'd', '_', 'u', '8', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
   21158   'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'q', 's', 'a', 'd', '_',
   21159   'p', 'k', '_', 'u', '1', '6', '_', 'u', '8', '\000', '_', '_', 'b', 'u', 'i',
   21160   'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'q', 'u', 'e',
   21161   'u', 'e', '_', 'p', 't', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   21162   'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'r', 'c', 'p', '_', 'l', 'e',
   21163   'g', 'a', 'c', 'y', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   21164   'a', 'm', 'd', 'g', 'c', 'n', '_', 'r', 'e', 'a', 'd', 'f', 'i', 'r', 's',
   21165   't', 'l', 'a', 'n', 'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   21166   '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'r', 'e', 'a', 'd', 'l', 'a', 'n',
   21167   'e', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd',
   21168   'g', 'c', 'n', '_', 'r', 's', 'q', '_', 'l', 'e', 'g', 'a', 'c', 'y', '\000',
   21169   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21170   'n', '_', 's', '_', 'b', 'a', 'r', 'r', 'i', 'e', 'r', '\000', '_', '_', 'b',
   21171   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's',
   21172   '_', 'd', 'c', 'a', 'c', 'h', 'e', '_', 'i', 'n', 'v', '\000', '_', '_', 'b',
   21173   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's',
   21174   '_', 'd', 'c', 'a', 'c', 'h', 'e', '_', 'i', 'n', 'v', '_', 'v', 'o', 'l',
   21175   '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g',
   21176   'c', 'n', '_', 's', '_', 'd', 'c', 'a', 'c', 'h', 'e', '_', 'w', 'b', '\000',
   21177   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21178   'n', '_', 's', '_', 'd', 'c', 'a', 'c', 'h', 'e', '_', 'w', 'b', '_', 'v',
   21179   'o', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm',
   21180   'd', 'g', 'c', 'n', '_', 's', '_', 'd', 'e', 'c', 'p', 'e', 'r', 'f', 'l',
   21181   'e', 'v', 'e', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   21182   'a', 'm', 'd', 'g', 'c', 'n', '_', 's', '_', 'g', 'e', 't', 'p', 'c', '\000',
   21183   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c',
   21184   'n', '_', 's', '_', 'g', 'e', 't', 'r', 'e', 'g', '\000', '_', '_', 'b', 'u',
   21185   'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's', '_',
   21186   'i', 'n', 'c', 'p', 'e', 'r', 'f', 'l', 'e', 'v', 'e', 'l', '\000', '_', '_',
   21187   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_',
   21188   's', '_', 'm', 'e', 'm', 'r', 'e', 'a', 'l', 't', 'i', 'm', 'e', '\000', '_',
   21189   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n',
   21190   '_', 's', '_', 'm', 'e', 'm', 't', 'i', 'm', 'e', '\000', '_', '_', 'b', 'u',
   21191   'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's', '_',
   21192   's', 'e', 'n', 'd', 'm', 's', 'g', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
   21193   'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's', '_', 's', 'e', 'n',
   21194   'd', 'm', 's', 'g', 'h', 'a', 'l', 't', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21195   't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's', '_', 's', 'l',
   21196   'e', 'e', 'p', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a',
   21197   'm', 'd', 'g', 'c', 'n', '_', 's', '_', 'w', 'a', 'i', 't', 'c', 'n', 't',
   21198   '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g',
   21199   'c', 'n', '_', 's', 'a', 'd', '_', 'h', 'i', '_', 'u', '8', '\000', '_', '_',
   21200   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_',
   21201   's', 'a', 'd', '_', 'u', '1', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
   21202   'i', 'n', '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 's', 'a', 'd', '_', 'u',
   21203   '8', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd',
   21204   'g', 'c', 'n', '_', 'w', 'a', 'v', 'e', '_', 'b', 'a', 'r', 'r', 'i', 'e',
   21205   'r', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'm', 'd',
   21206   'g', 'c', 'n', '_', 'w', 'o', 'r', 'k', 'g', 'r', 'o', 'u', 'p', '_', 'i',
   21207   'd', '_', 'x', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a',
   21208   'm', 'd', 'g', 'c', 'n', '_', 'w', 'o', 'r', 'k', 'g', 'r', 'o', 'u', 'p',
   21209   '_', 'i', 'd', '_', 'y', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   21210   '_', 'a', 'm', 'd', 'g', 'c', 'n', '_', 'w', 'o', 'r', 'k', 'g', 'r', 'o',
   21211   'u', 'p', '_', 'i', 'd', '_', 'z', '\000', '_', '_', 'b', 'u', 'i', 'l', 't',
   21212   'i', 'n', '_', 'a', 'r', 'm', '_', 'c', 'd', 'p', '\000', '_', '_', 'b', 'u',
   21213   'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'c', 'd', 'p', '2', '\000',
   21214   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'g',
   21215   'e', 't', '_', 'f', 'p', 's', 'c', 'r', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21216   't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'l', 'd', 'c', '\000', '_', '_', 'b',
   21217   'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'l', 'd', 'c', '2',
   21218   '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_',
   21219   'l', 'd', 'c', '2', 'l', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   21220   '_', 'a', 'r', 'm', '_', 'l', 'd', 'c', 'l', '\000', '_', '_', 'b', 'u', 'i',
   21221   'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'm', 'c', 'r', '\000', '_', '_',
   21222   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'm', 'c', 'r',
   21223   '2', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm',
   21224   '_', 'm', 'r', 'c', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   21225   'a', 'r', 'm', '_', 'm', 'r', 'c', '2', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21226   't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'q', 'a', 'd', 'd', '\000', '_', '_',
   21227   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'q', 'a', 'd',
   21228   'd', '1', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a',
   21229   'r', 'm', '_', 'q', 'a', 'd', 'd', '8', '\000', '_', '_', 'b', 'u', 'i', 'l',
   21230   't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'q', 'a', 's', 'x', '\000', '_', '_',
   21231   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'a', 'r', 'm', '_', 'q', 's', 'a',
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   29974   '3', '2', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   29975   '3', '2', '_', 'w', 'r', 'g', 's', 'b', 'a', 's', 'e', '6', '4', '\000', '_',
   29976   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'w',
   29977   'r', 'p', 'k', 'r', 'u', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   29978   '_', 'i', 'a', '3', '2', '_', 'x', 'a', 'b', 'o', 'r', 't', '\000', '_', '_',
   29979   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'x', 'b',
   29980   'e', 'g', 'i', 'n', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   29981   'i', 'a', '3', '2', '_', 'x', 'e', 'n', 'd', '\000', '_', '_', 'b', 'u', 'i',
   29982   'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r', 'c', 'z',
   29983   'p', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   29984   '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 'p', 'd', '2', '5', '6', '\000', '_',
   29985   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   29986   'f', 'r', 'c', 'z', 'p', 's', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   29987   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 'p', 's', '2',
   29988   '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   29989   '3', '2', '_', 'v', 'f', 'r', 'c', 'z', 's', 'd', '\000', '_', '_', 'b', 'u',
   29990   'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'f', 'r', 'c',
   29991   'z', 's', 's', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
   29992   'a', '3', '2', '_', 'v', 'p', 'c', 'o', 'm', 'b', '\000', '_', '_', 'b', 'u',
   29993   'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'c', 'o',
   29994   'm', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   29995   '3', '2', '_', 'v', 'p', 'c', 'o', 'm', 'q', '\000', '_', '_', 'b', 'u', 'i',
   29996   'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'c', 'o', 'm',
   29997   'u', 'b', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   29998   '3', '2', '_', 'v', 'p', 'c', 'o', 'm', 'u', 'd', '\000', '_', '_', 'b', 'u',
   29999   'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'c', 'o',
   30000   'm', 'u', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
   30001   'a', '3', '2', '_', 'v', 'p', 'c', 'o', 'm', 'u', 'w', '\000', '_', '_', 'b',
   30002   'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'c',
   30003   'o', 'm', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
   30004   'a', '3', '2', '_', 'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 'd', '\000',
   30005   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30006   'v', 'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 'd', '2', '5', '6', '\000', '_',
   30007   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30008   'p', 'e', 'r', 'm', 'i', 'l', '2', 'p', 's', '\000', '_', '_', 'b', 'u', 'i',
   30009   'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'e', 'r', 'm',
   30010   'i', 'l', '2', 'p', 's', '2', '5', '6', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30011   't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd',
   30012   'b', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   30013   '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'b', 'q', '\000', '_', '_', 'b',
   30014   'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h',
   30015   'a', 'd', 'd', 'b', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   30016   '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'd', 'q', '\000',
   30017   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30018   'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'd', '\000', '_', '_', 'b', 'u', 'i',
   30019   'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd',
   30020   'd', 'u', 'b', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   30021   'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'b', 'w', '\000',
   30022   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30023   'v', 'p', 'h', 'a', 'd', 'd', 'u', 'd', 'q', '\000', '_', '_', 'b', 'u', 'i',
   30024   'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd',
   30025   'd', 'u', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   30026   'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd', 'u', 'w', 'q', '\000',
   30027   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30028   'v', 'p', 'h', 'a', 'd', 'd', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30029   't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 'a', 'd', 'd',
   30030   'w', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   30031   '3', '2', '_', 'v', 'p', 'h', 's', 'u', 'b', 'b', 'w', '\000', '_', '_', 'b',
   30032   'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h',
   30033   's', 'u', 'b', 'd', 'q', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   30034   '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'h', 's', 'u', 'b', 'w', 'd', '\000',
   30035   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30036   'v', 'p', 'm', 'a', 'c', 's', 'd', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30037   't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's',
   30038   'd', 'q', 'h', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
   30039   'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 'd', 'q', 'l', '\000', '_',
   30040   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30041   'p', 'm', 'a', 'c', 's', 's', 'd', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30042   't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's',
   30043   's', 'd', 'q', 'h', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   30044   'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 's', 'd', 'q', 'l',
   30045   '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2',
   30046   '_', 'v', 'p', 'm', 'a', 'c', 's', 's', 'w', 'd', '\000', '_', '_', 'b', 'u',
   30047   'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a',
   30048   'c', 's', 's', 'w', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   30049   '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'c', 's', 'w', 'd', '\000',
   30050   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30051   'v', 'p', 'm', 'a', 'c', 's', 'w', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30052   't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'd', 'c',
   30053   's', 's', 'w', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   30054   'i', 'a', '3', '2', '_', 'v', 'p', 'm', 'a', 'd', 'c', 's', 'w', 'd', '\000',
   30055   '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_',
   30056   'v', 'p', 'p', 'e', 'r', 'm', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   30057   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'r', 'o', 't', 'b', '\000', '_',
   30058   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30059   'p', 'r', 'o', 't', 'b', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   30060   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'r', 'o', 't', 'd', '\000', '_',
   30061   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30062   'p', 'r', 'o', 't', 'd', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   30063   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'r', 'o', 't', 'q', '\000', '_',
   30064   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30065   'p', 'r', 'o', 't', 'q', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   30066   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 'r', 'o', 't', 'w', '\000', '_',
   30067   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30068   'p', 'r', 'o', 't', 'w', 'i', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i',
   30069   'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'a', 'b', '\000', '_',
   30070   '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v',
   30071   'p', 's', 'h', 'a', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n',
   30072   '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'a', 'q', '\000', '_', '_',
   30073   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p',
   30074   's', 'h', 'a', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_',
   30075   'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h', 'l', 'b', '\000', '_', '_', 'b',
   30076   'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's',
   30077   'h', 'l', 'd', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i',
   30078   'a', '3', '2', '_', 'v', 'p', 's', 'h', 'l', 'q', '\000', '_', '_', 'b', 'u',
   30079   'i', 'l', 't', 'i', 'n', '_', 'i', 'a', '3', '2', '_', 'v', 'p', 's', 'h',
   30080   'l', 'w', '\000', '_', '_', 'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 'i', 'a',
   30081   '3', '2', '_', 'x', 't', 'e', 's', 't', '\000', '_', '_', 'b', 'u', 'i', 'l',
   30082   't', 'i', 'n', '_', 'b', 'i', 't', 'r', 'e', 'v', '\000', '_', '_', 'b', 'u',
   30083   'i', 'l', 't', 'i', 'n', '_', 'g', 'e', 't', 'i', 'd', '\000', '_', '_', 'b',
   30084   'u', 'i', 'l', 't', 'i', 'n', '_', 'g', 'e', 't', 'p', 's', '\000', '_', '_',
   30085   'b', 'u', 'i', 'l', 't', 'i', 'n', '_', 's', 'e', 't', 'p', 's', '\000',
   30086   };
   30087 
   30088   struct BuiltinEntry {
   30089     Intrinsic::ID IntrinID;
   30090     unsigned StrTabOffset;
   30091     const char *getName() const {
   30092       return &BuiltinNames[StrTabOffset];
   30093     }
   30094     bool operator<(StringRef RHS) const {
   30095       return strncmp(getName(), RHS.data(), RHS.size()) < 0;
   30096     }
   30097   };
   30098   StringRef TargetPrefix(TargetPrefixStr);
   30099 
   30100   /* Target Independent Builtins */ {
   30101     static const BuiltinEntry Names[] = {
   30102       {Intrinsic::adjust_trampoline, 0}, // __builtin_adjust_trampoline
   30103       {Intrinsic::debugtrap, 28}, // __builtin_debugtrap
   30104       {Intrinsic::flt_rounds, 70}, // __builtin_flt_rounds
   30105       {Intrinsic::init_trampoline, 91}, // __builtin_init_trampoline
   30106       {Intrinsic::objectsize, 117}, // __builtin_object_size
   30107       {Intrinsic::stackrestore, 139}, // __builtin_stack_restore
   30108       {Intrinsic::stacksave, 163}, // __builtin_stack_save
   30109       {Intrinsic::thread_pointer, 184}, // __builtin_thread_pointer
   30110       {Intrinsic::trap, 209}, // __builtin_trap
   30111       {Intrinsic::eh_unwind_init, 48}, // __builtin_unwind_init
   30112     };
   30113     auto I = std::lower_bound(std::begin(Names),
   30114                               std::end(Names),
   30115                               BuiltinNameStr);
   30116     if (I != std::end(Names) &&
   30117         I->getName() == BuiltinNameStr)
   30118       return I->IntrinID;
   30119   }
   30120   if (TargetPrefix == "aarch64") {
   30121     static const BuiltinEntry aarch64Names[] = {
   30122       {Intrinsic::aarch64_dmb, 224}, // __builtin_arm_dmb
   30123       {Intrinsic::aarch64_dsb, 242}, // __builtin_arm_dsb
   30124       {Intrinsic::aarch64_isb, 260}, // __builtin_arm_isb
   30125     };
   30126     auto I = std::lower_bound(std::begin(aarch64Names),
   30127                               std::end(aarch64Names),
   30128                               BuiltinNameStr);
   30129     if (I != std::end(aarch64Names) &&
   30130         I->getName() == BuiltinNameStr)
   30131       return I->IntrinID;
   30132   }
   30133   if (TargetPrefix == "amdgcn") {
   30134     static const BuiltinEntry amdgcnNames[] = {
   30135       {Intrinsic::amdgcn_buffer_wbinvl1, 278}, // __builtin_amdgcn_buffer_wbinvl1
   30136       {Intrinsic::amdgcn_buffer_wbinvl1_sc, 310}, // __builtin_amdgcn_buffer_wbinvl1_sc
   30137       {Intrinsic::amdgcn_buffer_wbinvl1_vol, 345}, // __builtin_amdgcn_buffer_wbinvl1_vol
   30138       {Intrinsic::amdgcn_cubeid, 381}, // __builtin_amdgcn_cubeid
   30139       {Intrinsic::amdgcn_cubema, 405}, // __builtin_amdgcn_cubema
   30140       {Intrinsic::amdgcn_cubesc, 429}, // __builtin_amdgcn_cubesc
   30141       {Intrinsic::amdgcn_cubetc, 453}, // __builtin_amdgcn_cubetc
   30142       {Intrinsic::amdgcn_cvt_pk_u8_f32, 477}, // __builtin_amdgcn_cvt_pk_u8_f32
   30143       {Intrinsic::amdgcn_dispatch_id, 508}, // __builtin_amdgcn_dispatch_id
   30144       {Intrinsic::amdgcn_dispatch_ptr, 537}, // __builtin_amdgcn_dispatch_ptr
   30145       {Intrinsic::amdgcn_ds_bpermute, 567}, // __builtin_amdgcn_ds_bpermute
   30146       {Intrinsic::amdgcn_ds_permute, 596}, // __builtin_amdgcn_ds_permute
   30147       {Intrinsic::amdgcn_ds_swizzle, 624}, // __builtin_amdgcn_ds_swizzle
   30148       {Intrinsic::amdgcn_fmed3, 652}, // __builtin_amdgcn_fmed3
   30149       {Intrinsic::amdgcn_fmul_legacy, 675}, // __builtin_amdgcn_fmul_legacy
   30150       {Intrinsic::amdgcn_groupstaticsize, 704}, // __builtin_amdgcn_groupstaticsize
   30151       {Intrinsic::amdgcn_implicit_buffer_ptr, 737}, // __builtin_amdgcn_implicit_buffer_ptr
   30152       {Intrinsic::amdgcn_implicitarg_ptr, 774}, // __builtin_amdgcn_implicitarg_ptr
   30153       {Intrinsic::amdgcn_interp_mov, 807}, // __builtin_amdgcn_interp_mov
   30154       {Intrinsic::amdgcn_interp_p1, 835}, // __builtin_amdgcn_interp_p1
   30155       {Intrinsic::amdgcn_interp_p2, 862}, // __builtin_amdgcn_interp_p2
   30156       {Intrinsic::amdgcn_kernarg_segment_ptr, 889}, // __builtin_amdgcn_kernarg_segment_ptr
   30157       {Intrinsic::amdgcn_lerp, 926}, // __builtin_amdgcn_lerp
   30158       {Intrinsic::amdgcn_mbcnt_hi, 948}, // __builtin_amdgcn_mbcnt_hi
   30159       {Intrinsic::amdgcn_mbcnt_lo, 974}, // __builtin_amdgcn_mbcnt_lo
   30160       {Intrinsic::amdgcn_mqsad_pk_u16_u8, 1000}, // __builtin_amdgcn_mqsad_pk_u16_u8
   30161       {Intrinsic::amdgcn_mqsad_u32_u8, 1033}, // __builtin_amdgcn_mqsad_u32_u8
   30162       {Intrinsic::amdgcn_msad_u8, 1063}, // __builtin_amdgcn_msad_u8
   30163       {Intrinsic::amdgcn_qsad_pk_u16_u8, 1088}, // __builtin_amdgcn_qsad_pk_u16_u8
   30164       {Intrinsic::amdgcn_queue_ptr, 1120}, // __builtin_amdgcn_queue_ptr
   30165       {Intrinsic::amdgcn_rcp_legacy, 1147}, // __builtin_amdgcn_rcp_legacy
   30166       {Intrinsic::amdgcn_readfirstlane, 1175}, // __builtin_amdgcn_readfirstlane
   30167       {Intrinsic::amdgcn_readlane, 1206}, // __builtin_amdgcn_readlane
   30168       {Intrinsic::amdgcn_rsq_legacy, 1232}, // __builtin_amdgcn_rsq_legacy
   30169       {Intrinsic::amdgcn_s_barrier, 1260}, // __builtin_amdgcn_s_barrier
   30170       {Intrinsic::amdgcn_s_dcache_inv, 1287}, // __builtin_amdgcn_s_dcache_inv
   30171       {Intrinsic::amdgcn_s_dcache_inv_vol, 1317}, // __builtin_amdgcn_s_dcache_inv_vol
   30172       {Intrinsic::amdgcn_s_dcache_wb, 1351}, // __builtin_amdgcn_s_dcache_wb
   30173       {Intrinsic::amdgcn_s_dcache_wb_vol, 1380}, // __builtin_amdgcn_s_dcache_wb_vol
   30174       {Intrinsic::amdgcn_s_decperflevel, 1413}, // __builtin_amdgcn_s_decperflevel
   30175       {Intrinsic::amdgcn_s_getpc, 1445}, // __builtin_amdgcn_s_getpc
   30176       {Intrinsic::amdgcn_s_getreg, 1470}, // __builtin_amdgcn_s_getreg
   30177       {Intrinsic::amdgcn_s_incperflevel, 1496}, // __builtin_amdgcn_s_incperflevel
   30178       {Intrinsic::amdgcn_s_memrealtime, 1528}, // __builtin_amdgcn_s_memrealtime
   30179       {Intrinsic::amdgcn_s_memtime, 1559}, // __builtin_amdgcn_s_memtime
   30180       {Intrinsic::amdgcn_s_sendmsg, 1586}, // __builtin_amdgcn_s_sendmsg
   30181       {Intrinsic::amdgcn_s_sendmsghalt, 1613}, // __builtin_amdgcn_s_sendmsghalt
   30182       {Intrinsic::amdgcn_s_sleep, 1644}, // __builtin_amdgcn_s_sleep
   30183       {Intrinsic::amdgcn_s_waitcnt, 1669}, // __builtin_amdgcn_s_waitcnt
   30184       {Intrinsic::amdgcn_sad_hi_u8, 1696}, // __builtin_amdgcn_sad_hi_u8
   30185       {Intrinsic::amdgcn_sad_u16, 1723}, // __builtin_amdgcn_sad_u16
   30186       {Intrinsic::amdgcn_sad_u8, 1748}, // __builtin_amdgcn_sad_u8
   30187       {Intrinsic::amdgcn_wave_barrier, 1772}, // __builtin_amdgcn_wave_barrier
   30188       {Intrinsic::amdgcn_workgroup_id_x, 1802}, // __builtin_amdgcn_workgroup_id_x
   30189       {Intrinsic::amdgcn_workgroup_id_y, 1834}, // __builtin_amdgcn_workgroup_id_y
   30190       {Intrinsic::amdgcn_workgroup_id_z, 1866}, // __builtin_amdgcn_workgroup_id_z
   30191     };
   30192     auto I = std::lower_bound(std::begin(amdgcnNames),
   30193                               std::end(amdgcnNames),
   30194                               BuiltinNameStr);
   30195     if (I != std::end(amdgcnNames) &&
   30196         I->getName() == BuiltinNameStr)
   30197       return I->IntrinID;
   30198   }
   30199   if (TargetPrefix == "arm") {
   30200     static const BuiltinEntry armNames[] = {
   30201       {Intrinsic::arm_cdp, 1898}, // __builtin_arm_cdp
   30202       {Intrinsic::arm_cdp2, 1916}, // __builtin_arm_cdp2
   30203       {Intrinsic::arm_dmb, 224}, // __builtin_arm_dmb
   30204       {Intrinsic::arm_dsb, 242}, // __builtin_arm_dsb
   30205       {Intrinsic::arm_get_fpscr, 1935}, // __builtin_arm_get_fpscr
   30206       {Intrinsic::arm_isb, 260}, // __builtin_arm_isb
   30207       {Intrinsic::arm_ldc, 1959}, // __builtin_arm_ldc
   30208       {Intrinsic::arm_ldc2, 1977}, // __builtin_arm_ldc2
   30209       {Intrinsic::arm_ldc2l, 1996}, // __builtin_arm_ldc2l
   30210       {Intrinsic::arm_ldcl, 2016}, // __builtin_arm_ldcl
   30211       {Intrinsic::arm_mcr, 2035}, // __builtin_arm_mcr
   30212       {Intrinsic::arm_mcr2, 2053}, // __builtin_arm_mcr2
   30213       {Intrinsic::arm_mrc, 2072}, // __builtin_arm_mrc
   30214       {Intrinsic::arm_mrc2, 2090}, // __builtin_arm_mrc2
   30215       {Intrinsic::arm_qadd, 2109}, // __builtin_arm_qadd
   30216       {Intrinsic::arm_qadd16, 2128}, // __builtin_arm_qadd16
   30217       {Intrinsic::arm_qadd8, 2149}, // __builtin_arm_qadd8
   30218       {Intrinsic::arm_qasx, 2169}, // __builtin_arm_qasx
   30219       {Intrinsic::arm_qsax, 2188}, // __builtin_arm_qsax
   30220       {Intrinsic::arm_qsub, 2207}, // __builtin_arm_qsub
   30221       {Intrinsic::arm_qsub16, 2226}, // __builtin_arm_qsub16
   30222       {Intrinsic::arm_qsub8, 2247}, // __builtin_arm_qsub8
   30223       {Intrinsic::arm_sadd16, 2267}, // __builtin_arm_sadd16
   30224       {Intrinsic::arm_sadd8, 2288}, // __builtin_arm_sadd8
   30225       {Intrinsic::arm_sasx, 2308}, // __builtin_arm_sasx
   30226       {Intrinsic::arm_sel, 2327}, // __builtin_arm_sel
   30227       {Intrinsic::arm_set_fpscr, 2345}, // __builtin_arm_set_fpscr
   30228       {Intrinsic::arm_shadd16, 2369}, // __builtin_arm_shadd16
   30229       {Intrinsic::arm_shadd8, 2391}, // __builtin_arm_shadd8
   30230       {Intrinsic::arm_shasx, 2412}, // __builtin_arm_shasx
   30231       {Intrinsic::arm_shsax, 2432}, // __builtin_arm_shsax
   30232       {Intrinsic::arm_shsub16, 2452}, // __builtin_arm_shsub16
   30233       {Intrinsic::arm_shsub8, 2474}, // __builtin_arm_shsub8
   30234       {Intrinsic::arm_smlabb, 2495}, // __builtin_arm_smlabb
   30235       {Intrinsic::arm_smlabt, 2516}, // __builtin_arm_smlabt
   30236       {Intrinsic::arm_smlad, 2537}, // __builtin_arm_smlad
   30237       {Intrinsic::arm_smladx, 2557}, // __builtin_arm_smladx
   30238       {Intrinsic::arm_smlald, 2578}, // __builtin_arm_smlald
   30239       {Intrinsic::arm_smlaldx, 2599}, // __builtin_arm_smlaldx
   30240       {Intrinsic::arm_smlatb, 2621}, // __builtin_arm_smlatb
   30241       {Intrinsic::arm_smlatt, 2642}, // __builtin_arm_smlatt
   30242       {Intrinsic::arm_smlawb, 2663}, // __builtin_arm_smlawb
   30243       {Intrinsic::arm_smlawt, 2684}, // __builtin_arm_smlawt
   30244       {Intrinsic::arm_smlsd, 2705}, // __builtin_arm_smlsd
   30245       {Intrinsic::arm_smlsdx, 2725}, // __builtin_arm_smlsdx
   30246       {Intrinsic::arm_smlsld, 2746}, // __builtin_arm_smlsld
   30247       {Intrinsic::arm_smlsldx, 2767}, // __builtin_arm_smlsldx
   30248       {Intrinsic::arm_smuad, 2789}, // __builtin_arm_smuad
   30249       {Intrinsic::arm_smuadx, 2809}, // __builtin_arm_smuadx
   30250       {Intrinsic::arm_smulbb, 2830}, // __builtin_arm_smulbb
   30251       {Intrinsic::arm_smulbt, 2851}, // __builtin_arm_smulbt
   30252       {Intrinsic::arm_smultb, 2872}, // __builtin_arm_smultb
   30253       {Intrinsic::arm_smultt, 2893}, // __builtin_arm_smultt
   30254       {Intrinsic::arm_smulwb, 2914}, // __builtin_arm_smulwb
   30255       {Intrinsic::arm_smulwt, 2935}, // __builtin_arm_smulwt
   30256       {Intrinsic::arm_smusd, 2956}, // __builtin_arm_smusd
   30257       {Intrinsic::arm_smusdx, 2976}, // __builtin_arm_smusdx
   30258       {Intrinsic::arm_ssat, 2997}, // __builtin_arm_ssat
   30259       {Intrinsic::arm_ssat16, 3016}, // __builtin_arm_ssat16
   30260       {Intrinsic::arm_ssax, 3037}, // __builtin_arm_ssax
   30261       {Intrinsic::arm_ssub16, 3056}, // __builtin_arm_ssub16
   30262       {Intrinsic::arm_ssub8, 3077}, // __builtin_arm_ssub8
   30263       {Intrinsic::arm_stc, 3097}, // __builtin_arm_stc
   30264       {Intrinsic::arm_stc2, 3115}, // __builtin_arm_stc2
   30265       {Intrinsic::arm_stc2l, 3134}, // __builtin_arm_stc2l
   30266       {Intrinsic::arm_stcl, 3154}, // __builtin_arm_stcl
   30267       {Intrinsic::arm_sxtab16, 3173}, // __builtin_arm_sxtab16
   30268       {Intrinsic::arm_sxtb16, 3195}, // __builtin_arm_sxtb16
   30269       {Intrinsic::arm_uadd16, 3216}, // __builtin_arm_uadd16
   30270       {Intrinsic::arm_uadd8, 3237}, // __builtin_arm_uadd8
   30271       {Intrinsic::arm_uasx, 3257}, // __builtin_arm_uasx
   30272       {Intrinsic::arm_uhadd16, 3276}, // __builtin_arm_uhadd16
   30273       {Intrinsic::arm_uhadd8, 3298}, // __builtin_arm_uhadd8
   30274       {Intrinsic::arm_uhasx, 3319}, // __builtin_arm_uhasx
   30275       {Intrinsic::arm_uhsax, 3339}, // __builtin_arm_uhsax
   30276       {Intrinsic::arm_uhsub16, 3359}, // __builtin_arm_uhsub16
   30277       {Intrinsic::arm_uhsub8, 3381}, // __builtin_arm_uhsub8
   30278       {Intrinsic::arm_uqadd16, 3402}, // __builtin_arm_uqadd16
   30279       {Intrinsic::arm_uqadd8, 3424}, // __builtin_arm_uqadd8
   30280       {Intrinsic::arm_uqasx, 3445}, // __builtin_arm_uqasx
   30281       {Intrinsic::arm_uqsax, 3465}, // __builtin_arm_uqsax
   30282       {Intrinsic::arm_uqsub16, 3485}, // __builtin_arm_uqsub16
   30283       {Intrinsic::arm_uqsub8, 3507}, // __builtin_arm_uqsub8
   30284       {Intrinsic::arm_usad8, 3528}, // __builtin_arm_usad8
   30285       {Intrinsic::arm_usada8, 3548}, // __builtin_arm_usada8
   30286       {Intrinsic::arm_usat, 3569}, // __builtin_arm_usat
   30287       {Intrinsic::arm_usat16, 3588}, // __builtin_arm_usat16
   30288       {Intrinsic::arm_usax, 3609}, // __builtin_arm_usax
   30289       {Intrinsic::arm_usub16, 3628}, // __builtin_arm_usub16
   30290       {Intrinsic::arm_usub8, 3649}, // __builtin_arm_usub8
   30291       {Intrinsic::arm_uxtab16, 3669}, // __builtin_arm_uxtab16
   30292       {Intrinsic::arm_uxtb16, 3691}, // __builtin_arm_uxtb16
   30293     };
   30294     auto I = std::lower_bound(std::begin(armNames),
   30295                               std::end(armNames),
   30296                               BuiltinNameStr);
   30297     if (I != std::end(armNames) &&
   30298         I->getName() == BuiltinNameStr)
   30299       return I->IntrinID;
   30300   }
   30301   if (TargetPrefix == "bpf") {
   30302     static const BuiltinEntry bpfNames[] = {
   30303       {Intrinsic::bpf_load_byte, 3712}, // __builtin_bpf_load_byte
   30304       {Intrinsic::bpf_load_half, 3736}, // __builtin_bpf_load_half
   30305       {Intrinsic::bpf_load_word, 3760}, // __builtin_bpf_load_word
   30306       {Intrinsic::bpf_pseudo, 3784}, // __builtin_bpf_pseudo
   30307     };
   30308     auto I = std::lower_bound(std::begin(bpfNames),
   30309                               std::end(bpfNames),
   30310                               BuiltinNameStr);
   30311     if (I != std::end(bpfNames) &&
   30312         I->getName() == BuiltinNameStr)
   30313       return I->IntrinID;
   30314   }
   30315   if (TargetPrefix == "hexagon") {
   30316     static const BuiltinEntry hexagonNames[] = {
   30317       {Intrinsic::hexagon_A2_abs, 3805}, // __builtin_HEXAGON_A2_abs
   30318       {Intrinsic::hexagon_A2_absp, 3830}, // __builtin_HEXAGON_A2_absp
   30319       {Intrinsic::hexagon_A2_abssat, 3856}, // __builtin_HEXAGON_A2_abssat
   30320       {Intrinsic::hexagon_A2_add, 3884}, // __builtin_HEXAGON_A2_add
   30321       {Intrinsic::hexagon_A2_addh_h16_hh, 3909}, // __builtin_HEXAGON_A2_addh_h16_hh
   30322       {Intrinsic::hexagon_A2_addh_h16_hl, 3942}, // __builtin_HEXAGON_A2_addh_h16_hl
   30323       {Intrinsic::hexagon_A2_addh_h16_lh, 3975}, // __builtin_HEXAGON_A2_addh_h16_lh
   30324       {Intrinsic::hexagon_A2_addh_h16_ll, 4008}, // __builtin_HEXAGON_A2_addh_h16_ll
   30325       {Intrinsic::hexagon_A2_addh_h16_sat_hh, 4041}, // __builtin_HEXAGON_A2_addh_h16_sat_hh
   30326       {Intrinsic::hexagon_A2_addh_h16_sat_hl, 4078}, // __builtin_HEXAGON_A2_addh_h16_sat_hl
   30327       {Intrinsic::hexagon_A2_addh_h16_sat_lh, 4115}, // __builtin_HEXAGON_A2_addh_h16_sat_lh
   30328       {Intrinsic::hexagon_A2_addh_h16_sat_ll, 4152}, // __builtin_HEXAGON_A2_addh_h16_sat_ll
   30329       {Intrinsic::hexagon_A2_addh_l16_hl, 4189}, // __builtin_HEXAGON_A2_addh_l16_hl
   30330       {Intrinsic::hexagon_A2_addh_l16_ll, 4222}, // __builtin_HEXAGON_A2_addh_l16_ll
   30331       {Intrinsic::hexagon_A2_addh_l16_sat_hl, 4255}, // __builtin_HEXAGON_A2_addh_l16_sat_hl
   30332       {Intrinsic::hexagon_A2_addh_l16_sat_ll, 4292}, // __builtin_HEXAGON_A2_addh_l16_sat_ll
   30333       {Intrinsic::hexagon_A2_addi, 4329}, // __builtin_HEXAGON_A2_addi
   30334       {Intrinsic::hexagon_A2_addp, 4355}, // __builtin_HEXAGON_A2_addp
   30335       {Intrinsic::hexagon_A2_addpsat, 4381}, // __builtin_HEXAGON_A2_addpsat
   30336       {Intrinsic::hexagon_A2_addsat, 4410}, // __builtin_HEXAGON_A2_addsat
   30337       {Intrinsic::hexagon_A2_addsp, 4438}, // __builtin_HEXAGON_A2_addsp
   30338       {Intrinsic::hexagon_A2_and, 4465}, // __builtin_HEXAGON_A2_and
   30339       {Intrinsic::hexagon_A2_andir, 4490}, // __builtin_HEXAGON_A2_andir
   30340       {Intrinsic::hexagon_A2_andp, 4517}, // __builtin_HEXAGON_A2_andp
   30341       {Intrinsic::hexagon_A2_aslh, 4543}, // __builtin_HEXAGON_A2_aslh
   30342       {Intrinsic::hexagon_A2_asrh, 4569}, // __builtin_HEXAGON_A2_asrh
   30343       {Intrinsic::hexagon_A2_combine_hh, 4595}, // __builtin_HEXAGON_A2_combine_hh
   30344       {Intrinsic::hexagon_A2_combine_hl, 4627}, // __builtin_HEXAGON_A2_combine_hl
   30345       {Intrinsic::hexagon_A2_combine_lh, 4659}, // __builtin_HEXAGON_A2_combine_lh
   30346       {Intrinsic::hexagon_A2_combine_ll, 4691}, // __builtin_HEXAGON_A2_combine_ll
   30347       {Intrinsic::hexagon_A2_combineii, 4723}, // __builtin_HEXAGON_A2_combineii
   30348       {Intrinsic::hexagon_A2_combinew, 4754}, // __builtin_HEXAGON_A2_combinew
   30349       {Intrinsic::hexagon_A2_max, 4784}, // __builtin_HEXAGON_A2_max
   30350       {Intrinsic::hexagon_A2_maxp, 4809}, // __builtin_HEXAGON_A2_maxp
   30351       {Intrinsic::hexagon_A2_maxu, 4835}, // __builtin_HEXAGON_A2_maxu
   30352       {Intrinsic::hexagon_A2_maxup, 4861}, // __builtin_HEXAGON_A2_maxup
   30353       {Intrinsic::hexagon_A2_min, 4888}, // __builtin_HEXAGON_A2_min
   30354       {Intrinsic::hexagon_A2_minp, 4913}, // __builtin_HEXAGON_A2_minp
   30355       {Intrinsic::hexagon_A2_minu, 4939}, // __builtin_HEXAGON_A2_minu
   30356       {Intrinsic::hexagon_A2_minup, 4965}, // __builtin_HEXAGON_A2_minup
   30357       {Intrinsic::hexagon_A2_neg, 4992}, // __builtin_HEXAGON_A2_neg
   30358       {Intrinsic::hexagon_A2_negp, 5017}, // __builtin_HEXAGON_A2_negp
   30359       {Intrinsic::hexagon_A2_negsat, 5043}, // __builtin_HEXAGON_A2_negsat
   30360       {Intrinsic::hexagon_A2_not, 5071}, // __builtin_HEXAGON_A2_not
   30361       {Intrinsic::hexagon_A2_notp, 5096}, // __builtin_HEXAGON_A2_notp
   30362       {Intrinsic::hexagon_A2_or, 5122}, // __builtin_HEXAGON_A2_or
   30363       {Intrinsic::hexagon_A2_orir, 5146}, // __builtin_HEXAGON_A2_orir
   30364       {Intrinsic::hexagon_A2_orp, 5172}, // __builtin_HEXAGON_A2_orp
   30365       {Intrinsic::hexagon_A2_roundsat, 5197}, // __builtin_HEXAGON_A2_roundsat
   30366       {Intrinsic::hexagon_A2_sat, 5227}, // __builtin_HEXAGON_A2_sat
   30367       {Intrinsic::hexagon_A2_satb, 5252}, // __builtin_HEXAGON_A2_satb
   30368       {Intrinsic::hexagon_A2_sath, 5278}, // __builtin_HEXAGON_A2_sath
   30369       {Intrinsic::hexagon_A2_satub, 5304}, // __builtin_HEXAGON_A2_satub
   30370       {Intrinsic::hexagon_A2_satuh, 5331}, // __builtin_HEXAGON_A2_satuh
   30371       {Intrinsic::hexagon_A2_sub, 5358}, // __builtin_HEXAGON_A2_sub
   30372       {Intrinsic::hexagon_A2_subh_h16_hh, 5383}, // __builtin_HEXAGON_A2_subh_h16_hh
   30373       {Intrinsic::hexagon_A2_subh_h16_hl, 5416}, // __builtin_HEXAGON_A2_subh_h16_hl
   30374       {Intrinsic::hexagon_A2_subh_h16_lh, 5449}, // __builtin_HEXAGON_A2_subh_h16_lh
   30375       {Intrinsic::hexagon_A2_subh_h16_ll, 5482}, // __builtin_HEXAGON_A2_subh_h16_ll
   30376       {Intrinsic::hexagon_A2_subh_h16_sat_hh, 5515}, // __builtin_HEXAGON_A2_subh_h16_sat_hh
   30377       {Intrinsic::hexagon_A2_subh_h16_sat_hl, 5552}, // __builtin_HEXAGON_A2_subh_h16_sat_hl
   30378       {Intrinsic::hexagon_A2_subh_h16_sat_lh, 5589}, // __builtin_HEXAGON_A2_subh_h16_sat_lh
   30379       {Intrinsic::hexagon_A2_subh_h16_sat_ll, 5626}, // __builtin_HEXAGON_A2_subh_h16_sat_ll
   30380       {Intrinsic::hexagon_A2_subh_l16_hl, 5663}, // __builtin_HEXAGON_A2_subh_l16_hl
   30381       {Intrinsic::hexagon_A2_subh_l16_ll, 5696}, // __builtin_HEXAGON_A2_subh_l16_ll
   30382       {Intrinsic::hexagon_A2_subh_l16_sat_hl, 5729}, // __builtin_HEXAGON_A2_subh_l16_sat_hl
   30383       {Intrinsic::hexagon_A2_subh_l16_sat_ll, 5766}, // __builtin_HEXAGON_A2_subh_l16_sat_ll
   30384       {Intrinsic::hexagon_A2_subp, 5803}, // __builtin_HEXAGON_A2_subp
   30385       {Intrinsic::hexagon_A2_subri, 5829}, // __builtin_HEXAGON_A2_subri
   30386       {Intrinsic::hexagon_A2_subsat, 5856}, // __builtin_HEXAGON_A2_subsat
   30387       {Intrinsic::hexagon_A2_svaddh, 5884}, // __builtin_HEXAGON_A2_svaddh
   30388       {Intrinsic::hexagon_A2_svaddhs, 5912}, // __builtin_HEXAGON_A2_svaddhs
   30389       {Intrinsic::hexagon_A2_svadduhs, 5941}, // __builtin_HEXAGON_A2_svadduhs
   30390       {Intrinsic::hexagon_A2_svavgh, 5971}, // __builtin_HEXAGON_A2_svavgh
   30391       {Intrinsic::hexagon_A2_svavghs, 5999}, // __builtin_HEXAGON_A2_svavghs
   30392       {Intrinsic::hexagon_A2_svnavgh, 6028}, // __builtin_HEXAGON_A2_svnavgh
   30393       {Intrinsic::hexagon_A2_svsubh, 6057}, // __builtin_HEXAGON_A2_svsubh
   30394       {Intrinsic::hexagon_A2_svsubhs, 6085}, // __builtin_HEXAGON_A2_svsubhs
   30395       {Intrinsic::hexagon_A2_svsubuhs, 6114}, // __builtin_HEXAGON_A2_svsubuhs
   30396       {Intrinsic::hexagon_A2_swiz, 6144}, // __builtin_HEXAGON_A2_swiz
   30397       {Intrinsic::hexagon_A2_sxtb, 6170}, // __builtin_HEXAGON_A2_sxtb
   30398       {Intrinsic::hexagon_A2_sxth, 6196}, // __builtin_HEXAGON_A2_sxth
   30399       {Intrinsic::hexagon_A2_sxtw, 6222}, // __builtin_HEXAGON_A2_sxtw
   30400       {Intrinsic::hexagon_A2_tfr, 6248}, // __builtin_HEXAGON_A2_tfr
   30401       {Intrinsic::hexagon_A2_tfrih, 6273}, // __builtin_HEXAGON_A2_tfrih
   30402       {Intrinsic::hexagon_A2_tfril, 6300}, // __builtin_HEXAGON_A2_tfril
   30403       {Intrinsic::hexagon_A2_tfrp, 6327}, // __builtin_HEXAGON_A2_tfrp
   30404       {Intrinsic::hexagon_A2_tfrpi, 6353}, // __builtin_HEXAGON_A2_tfrpi
   30405       {Intrinsic::hexagon_A2_tfrsi, 6380}, // __builtin_HEXAGON_A2_tfrsi
   30406       {Intrinsic::hexagon_A2_vabsh, 6407}, // __builtin_HEXAGON_A2_vabsh
   30407       {Intrinsic::hexagon_A2_vabshsat, 6434}, // __builtin_HEXAGON_A2_vabshsat
   30408       {Intrinsic::hexagon_A2_vabsw, 6464}, // __builtin_HEXAGON_A2_vabsw
   30409       {Intrinsic::hexagon_A2_vabswsat, 6491}, // __builtin_HEXAGON_A2_vabswsat
   30410       {Intrinsic::hexagon_A2_vaddb_map, 6521}, // __builtin_HEXAGON_A2_vaddb_map
   30411       {Intrinsic::hexagon_A2_vaddh, 6552}, // __builtin_HEXAGON_A2_vaddh
   30412       {Intrinsic::hexagon_A2_vaddhs, 6579}, // __builtin_HEXAGON_A2_vaddhs
   30413       {Intrinsic::hexagon_A2_vaddub, 6607}, // __builtin_HEXAGON_A2_vaddub
   30414       {Intrinsic::hexagon_A2_vaddubs, 6635}, // __builtin_HEXAGON_A2_vaddubs
   30415       {Intrinsic::hexagon_A2_vadduhs, 6664}, // __builtin_HEXAGON_A2_vadduhs
   30416       {Intrinsic::hexagon_A2_vaddw, 6693}, // __builtin_HEXAGON_A2_vaddw
   30417       {Intrinsic::hexagon_A2_vaddws, 6720}, // __builtin_HEXAGON_A2_vaddws
   30418       {Intrinsic::hexagon_A2_vavgh, 6748}, // __builtin_HEXAGON_A2_vavgh
   30419       {Intrinsic::hexagon_A2_vavghcr, 6775}, // __builtin_HEXAGON_A2_vavghcr
   30420       {Intrinsic::hexagon_A2_vavghr, 6804}, // __builtin_HEXAGON_A2_vavghr
   30421       {Intrinsic::hexagon_A2_vavgub, 6832}, // __builtin_HEXAGON_A2_vavgub
   30422       {Intrinsic::hexagon_A2_vavgubr, 6860}, // __builtin_HEXAGON_A2_vavgubr
   30423       {Intrinsic::hexagon_A2_vavguh, 6889}, // __builtin_HEXAGON_A2_vavguh
   30424       {Intrinsic::hexagon_A2_vavguhr, 6917}, // __builtin_HEXAGON_A2_vavguhr
   30425       {Intrinsic::hexagon_A2_vavguw, 6946}, // __builtin_HEXAGON_A2_vavguw
   30426       {Intrinsic::hexagon_A2_vavguwr, 6974}, // __builtin_HEXAGON_A2_vavguwr
   30427       {Intrinsic::hexagon_A2_vavgw, 7003}, // __builtin_HEXAGON_A2_vavgw
   30428       {Intrinsic::hexagon_A2_vavgwcr, 7030}, // __builtin_HEXAGON_A2_vavgwcr
   30429       {Intrinsic::hexagon_A2_vavgwr, 7059}, // __builtin_HEXAGON_A2_vavgwr
   30430       {Intrinsic::hexagon_A2_vcmpbeq, 7087}, // __builtin_HEXAGON_A2_vcmpbeq
   30431       {Intrinsic::hexagon_A2_vcmpbgtu, 7116}, // __builtin_HEXAGON_A2_vcmpbgtu
   30432       {Intrinsic::hexagon_A2_vcmpheq, 7146}, // __builtin_HEXAGON_A2_vcmpheq
   30433       {Intrinsic::hexagon_A2_vcmphgt, 7175}, // __builtin_HEXAGON_A2_vcmphgt
   30434       {Intrinsic::hexagon_A2_vcmphgtu, 7204}, // __builtin_HEXAGON_A2_vcmphgtu
   30435       {Intrinsic::hexagon_A2_vcmpweq, 7234}, // __builtin_HEXAGON_A2_vcmpweq
   30436       {Intrinsic::hexagon_A2_vcmpwgt, 7263}, // __builtin_HEXAGON_A2_vcmpwgt
   30437       {Intrinsic::hexagon_A2_vcmpwgtu, 7292}, // __builtin_HEXAGON_A2_vcmpwgtu
   30438       {Intrinsic::hexagon_A2_vconj, 7322}, // __builtin_HEXAGON_A2_vconj
   30439       {Intrinsic::hexagon_A2_vmaxb, 7349}, // __builtin_HEXAGON_A2_vmaxb
   30440       {Intrinsic::hexagon_A2_vmaxh, 7376}, // __builtin_HEXAGON_A2_vmaxh
   30441       {Intrinsic::hexagon_A2_vmaxub, 7403}, // __builtin_HEXAGON_A2_vmaxub
   30442       {Intrinsic::hexagon_A2_vmaxuh, 7431}, // __builtin_HEXAGON_A2_vmaxuh
   30443       {Intrinsic::hexagon_A2_vmaxuw, 7459}, // __builtin_HEXAGON_A2_vmaxuw
   30444       {Intrinsic::hexagon_A2_vmaxw, 7487}, // __builtin_HEXAGON_A2_vmaxw
   30445       {Intrinsic::hexagon_A2_vminb, 7514}, // __builtin_HEXAGON_A2_vminb
   30446       {Intrinsic::hexagon_A2_vminh, 7541}, // __builtin_HEXAGON_A2_vminh
   30447       {Intrinsic::hexagon_A2_vminub, 7568}, // __builtin_HEXAGON_A2_vminub
   30448       {Intrinsic::hexagon_A2_vminuh, 7596}, // __builtin_HEXAGON_A2_vminuh
   30449       {Intrinsic::hexagon_A2_vminuw, 7624}, // __builtin_HEXAGON_A2_vminuw
   30450       {Intrinsic::hexagon_A2_vminw, 7652}, // __builtin_HEXAGON_A2_vminw
   30451       {Intrinsic::hexagon_A2_vnavgh, 7679}, // __builtin_HEXAGON_A2_vnavgh
   30452       {Intrinsic::hexagon_A2_vnavghcr, 7707}, // __builtin_HEXAGON_A2_vnavghcr
   30453       {Intrinsic::hexagon_A2_vnavghr, 7737}, // __builtin_HEXAGON_A2_vnavghr
   30454       {Intrinsic::hexagon_A2_vnavgw, 7766}, // __builtin_HEXAGON_A2_vnavgw
   30455       {Intrinsic::hexagon_A2_vnavgwcr, 7794}, // __builtin_HEXAGON_A2_vnavgwcr
   30456       {Intrinsic::hexagon_A2_vnavgwr, 7824}, // __builtin_HEXAGON_A2_vnavgwr
   30457       {Intrinsic::hexagon_A2_vraddub, 7853}, // __builtin_HEXAGON_A2_vraddub
   30458       {Intrinsic::hexagon_A2_vraddub_acc, 7882}, // __builtin_HEXAGON_A2_vraddub_acc
   30459       {Intrinsic::hexagon_A2_vrsadub, 7915}, // __builtin_HEXAGON_A2_vrsadub
   30460       {Intrinsic::hexagon_A2_vrsadub_acc, 7944}, // __builtin_HEXAGON_A2_vrsadub_acc
   30461       {Intrinsic::hexagon_A2_vsubb_map, 7977}, // __builtin_HEXAGON_A2_vsubb_map
   30462       {Intrinsic::hexagon_A2_vsubh, 8008}, // __builtin_HEXAGON_A2_vsubh
   30463       {Intrinsic::hexagon_A2_vsubhs, 8035}, // __builtin_HEXAGON_A2_vsubhs
   30464       {Intrinsic::hexagon_A2_vsubub, 8063}, // __builtin_HEXAGON_A2_vsubub
   30465       {Intrinsic::hexagon_A2_vsububs, 8091}, // __builtin_HEXAGON_A2_vsububs
   30466       {Intrinsic::hexagon_A2_vsubuhs, 8120}, // __builtin_HEXAGON_A2_vsubuhs
   30467       {Intrinsic::hexagon_A2_vsubw, 8149}, // __builtin_HEXAGON_A2_vsubw
   30468       {Intrinsic::hexagon_A2_vsubws, 8176}, // __builtin_HEXAGON_A2_vsubws
   30469       {Intrinsic::hexagon_A2_xor, 8204}, // __builtin_HEXAGON_A2_xor
   30470       {Intrinsic::hexagon_A2_xorp, 8229}, // __builtin_HEXAGON_A2_xorp
   30471       {Intrinsic::hexagon_A2_zxtb, 8255}, // __builtin_HEXAGON_A2_zxtb
   30472       {Intrinsic::hexagon_A2_zxth, 8281}, // __builtin_HEXAGON_A2_zxth
   30473       {Intrinsic::hexagon_A4_andn, 8307}, // __builtin_HEXAGON_A4_andn
   30474       {Intrinsic::hexagon_A4_andnp, 8333}, // __builtin_HEXAGON_A4_andnp
   30475       {Intrinsic::hexagon_A4_bitsplit, 8360}, // __builtin_HEXAGON_A4_bitsplit
   30476       {Intrinsic::hexagon_A4_bitspliti, 8390}, // __builtin_HEXAGON_A4_bitspliti
   30477       {Intrinsic::hexagon_A4_boundscheck, 8421}, // __builtin_HEXAGON_A4_boundscheck
   30478       {Intrinsic::hexagon_A4_cmpbeq, 8454}, // __builtin_HEXAGON_A4_cmpbeq
   30479       {Intrinsic::hexagon_A4_cmpbeqi, 8482}, // __builtin_HEXAGON_A4_cmpbeqi
   30480       {Intrinsic::hexagon_A4_cmpbgt, 8511}, // __builtin_HEXAGON_A4_cmpbgt
   30481       {Intrinsic::hexagon_A4_cmpbgti, 8539}, // __builtin_HEXAGON_A4_cmpbgti
   30482       {Intrinsic::hexagon_A4_cmpbgtu, 8568}, // __builtin_HEXAGON_A4_cmpbgtu
   30483       {Intrinsic::hexagon_A4_cmpbgtui, 8597}, // __builtin_HEXAGON_A4_cmpbgtui
   30484       {Intrinsic::hexagon_A4_cmpheq, 8627}, // __builtin_HEXAGON_A4_cmpheq
   30485       {Intrinsic::hexagon_A4_cmpheqi, 8655}, // __builtin_HEXAGON_A4_cmpheqi
   30486       {Intrinsic::hexagon_A4_cmphgt, 8684}, // __builtin_HEXAGON_A4_cmphgt
   30487       {Intrinsic::hexagon_A4_cmphgti, 8712}, // __builtin_HEXAGON_A4_cmphgti
   30488       {Intrinsic::hexagon_A4_cmphgtu, 8741}, // __builtin_HEXAGON_A4_cmphgtu
   30489       {Intrinsic::hexagon_A4_cmphgtui, 8770}, // __builtin_HEXAGON_A4_cmphgtui
   30490       {Intrinsic::hexagon_A4_combineir, 8800}, // __builtin_HEXAGON_A4_combineir
   30491       {Intrinsic::hexagon_A4_combineri, 8831}, // __builtin_HEXAGON_A4_combineri
   30492       {Intrinsic::hexagon_A4_cround_ri, 8862}, // __builtin_HEXAGON_A4_cround_ri
   30493       {Intrinsic::hexagon_A4_cround_rr, 8893}, // __builtin_HEXAGON_A4_cround_rr
   30494       {Intrinsic::hexagon_A4_modwrapu, 8924}, // __builtin_HEXAGON_A4_modwrapu
   30495       {Intrinsic::hexagon_A4_orn, 8954}, // __builtin_HEXAGON_A4_orn
   30496       {Intrinsic::hexagon_A4_ornp, 8979}, // __builtin_HEXAGON_A4_ornp
   30497       {Intrinsic::hexagon_A4_rcmpeq, 9005}, // __builtin_HEXAGON_A4_rcmpeq
   30498       {Intrinsic::hexagon_A4_rcmpeqi, 9033}, // __builtin_HEXAGON_A4_rcmpeqi
   30499       {Intrinsic::hexagon_A4_rcmpneq, 9062}, // __builtin_HEXAGON_A4_rcmpneq
   30500       {Intrinsic::hexagon_A4_rcmpneqi, 9091}, // __builtin_HEXAGON_A4_rcmpneqi
   30501       {Intrinsic::hexagon_A4_round_ri, 9121}, // __builtin_HEXAGON_A4_round_ri
   30502       {Intrinsic::hexagon_A4_round_ri_sat, 9151}, // __builtin_HEXAGON_A4_round_ri_sat
   30503       {Intrinsic::hexagon_A4_round_rr, 9185}, // __builtin_HEXAGON_A4_round_rr
   30504       {Intrinsic::hexagon_A4_round_rr_sat, 9215}, // __builtin_HEXAGON_A4_round_rr_sat
   30505       {Intrinsic::hexagon_A4_tlbmatch, 9249}, // __builtin_HEXAGON_A4_tlbmatch
   30506       {Intrinsic::hexagon_A4_vcmpbeq_any, 9279}, // __builtin_HEXAGON_A4_vcmpbeq_any
   30507       {Intrinsic::hexagon_A4_vcmpbeqi, 9312}, // __builtin_HEXAGON_A4_vcmpbeqi
   30508       {Intrinsic::hexagon_A4_vcmpbgt, 9342}, // __builtin_HEXAGON_A4_vcmpbgt
   30509       {Intrinsic::hexagon_A4_vcmpbgti, 9371}, // __builtin_HEXAGON_A4_vcmpbgti
   30510       {Intrinsic::hexagon_A4_vcmpbgtui, 9401}, // __builtin_HEXAGON_A4_vcmpbgtui
   30511       {Intrinsic::hexagon_A4_vcmpheqi, 9432}, // __builtin_HEXAGON_A4_vcmpheqi
   30512       {Intrinsic::hexagon_A4_vcmphgti, 9462}, // __builtin_HEXAGON_A4_vcmphgti
   30513       {Intrinsic::hexagon_A4_vcmphgtui, 9492}, // __builtin_HEXAGON_A4_vcmphgtui
   30514       {Intrinsic::hexagon_A4_vcmpweqi, 9523}, // __builtin_HEXAGON_A4_vcmpweqi
   30515       {Intrinsic::hexagon_A4_vcmpwgti, 9553}, // __builtin_HEXAGON_A4_vcmpwgti
   30516       {Intrinsic::hexagon_A4_vcmpwgtui, 9583}, // __builtin_HEXAGON_A4_vcmpwgtui
   30517       {Intrinsic::hexagon_A4_vrmaxh, 9614}, // __builtin_HEXAGON_A4_vrmaxh
   30518       {Intrinsic::hexagon_A4_vrmaxuh, 9642}, // __builtin_HEXAGON_A4_vrmaxuh
   30519       {Intrinsic::hexagon_A4_vrmaxuw, 9671}, // __builtin_HEXAGON_A4_vrmaxuw
   30520       {Intrinsic::hexagon_A4_vrmaxw, 9700}, // __builtin_HEXAGON_A4_vrmaxw
   30521       {Intrinsic::hexagon_A4_vrminh, 9728}, // __builtin_HEXAGON_A4_vrminh
   30522       {Intrinsic::hexagon_A4_vrminuh, 9756}, // __builtin_HEXAGON_A4_vrminuh
   30523       {Intrinsic::hexagon_A4_vrminuw, 9785}, // __builtin_HEXAGON_A4_vrminuw
   30524       {Intrinsic::hexagon_A4_vrminw, 9814}, // __builtin_HEXAGON_A4_vrminw
   30525       {Intrinsic::hexagon_A5_vaddhubs, 9842}, // __builtin_HEXAGON_A5_vaddhubs
   30526       {Intrinsic::hexagon_C2_all8, 9872}, // __builtin_HEXAGON_C2_all8
   30527       {Intrinsic::hexagon_C2_and, 9898}, // __builtin_HEXAGON_C2_and
   30528       {Intrinsic::hexagon_C2_andn, 9923}, // __builtin_HEXAGON_C2_andn
   30529       {Intrinsic::hexagon_C2_any8, 9949}, // __builtin_HEXAGON_C2_any8
   30530       {Intrinsic::hexagon_C2_bitsclr, 9975}, // __builtin_HEXAGON_C2_bitsclr
   30531       {Intrinsic::hexagon_C2_bitsclri, 10004}, // __builtin_HEXAGON_C2_bitsclri
   30532       {Intrinsic::hexagon_C2_bitsset, 10034}, // __builtin_HEXAGON_C2_bitsset
   30533       {Intrinsic::hexagon_C2_cmpeq, 10063}, // __builtin_HEXAGON_C2_cmpeq
   30534       {Intrinsic::hexagon_C2_cmpeqi, 10090}, // __builtin_HEXAGON_C2_cmpeqi
   30535       {Intrinsic::hexagon_C2_cmpeqp, 10118}, // __builtin_HEXAGON_C2_cmpeqp
   30536       {Intrinsic::hexagon_C2_cmpgei, 10146}, // __builtin_HEXAGON_C2_cmpgei
   30537       {Intrinsic::hexagon_C2_cmpgeui, 10174}, // __builtin_HEXAGON_C2_cmpgeui
   30538       {Intrinsic::hexagon_C2_cmpgt, 10203}, // __builtin_HEXAGON_C2_cmpgt
   30539       {Intrinsic::hexagon_C2_cmpgti, 10230}, // __builtin_HEXAGON_C2_cmpgti
   30540       {Intrinsic::hexagon_C2_cmpgtp, 10258}, // __builtin_HEXAGON_C2_cmpgtp
   30541       {Intrinsic::hexagon_C2_cmpgtu, 10286}, // __builtin_HEXAGON_C2_cmpgtu
   30542       {Intrinsic::hexagon_C2_cmpgtui, 10314}, // __builtin_HEXAGON_C2_cmpgtui
   30543       {Intrinsic::hexagon_C2_cmpgtup, 10343}, // __builtin_HEXAGON_C2_cmpgtup
   30544       {Intrinsic::hexagon_C2_cmplt, 10372}, // __builtin_HEXAGON_C2_cmplt
   30545       {Intrinsic::hexagon_C2_cmpltu, 10399}, // __builtin_HEXAGON_C2_cmpltu
   30546       {Intrinsic::hexagon_C2_mask, 10427}, // __builtin_HEXAGON_C2_mask
   30547       {Intrinsic::hexagon_C2_mux, 10453}, // __builtin_HEXAGON_C2_mux
   30548       {Intrinsic::hexagon_C2_muxii, 10478}, // __builtin_HEXAGON_C2_muxii
   30549       {Intrinsic::hexagon_C2_muxir, 10505}, // __builtin_HEXAGON_C2_muxir
   30550       {Intrinsic::hexagon_C2_muxri, 10532}, // __builtin_HEXAGON_C2_muxri
   30551       {Intrinsic::hexagon_C2_not, 10559}, // __builtin_HEXAGON_C2_not
   30552       {Intrinsic::hexagon_C2_or, 10584}, // __builtin_HEXAGON_C2_or
   30553       {Intrinsic::hexagon_C2_orn, 10608}, // __builtin_HEXAGON_C2_orn
   30554       {Intrinsic::hexagon_C2_pxfer_map, 10633}, // __builtin_HEXAGON_C2_pxfer_map
   30555       {Intrinsic::hexagon_C2_tfrpr, 10664}, // __builtin_HEXAGON_C2_tfrpr
   30556       {Intrinsic::hexagon_C2_tfrrp, 10691}, // __builtin_HEXAGON_C2_tfrrp
   30557       {Intrinsic::hexagon_C2_vitpack, 10718}, // __builtin_HEXAGON_C2_vitpack
   30558       {Intrinsic::hexagon_C2_vmux, 10747}, // __builtin_HEXAGON_C2_vmux
   30559       {Intrinsic::hexagon_C2_xor, 10773}, // __builtin_HEXAGON_C2_xor
   30560       {Intrinsic::hexagon_C4_and_and, 10798}, // __builtin_HEXAGON_C4_and_and
   30561       {Intrinsic::hexagon_C4_and_andn, 10827}, // __builtin_HEXAGON_C4_and_andn
   30562       {Intrinsic::hexagon_C4_and_or, 10857}, // __builtin_HEXAGON_C4_and_or
   30563       {Intrinsic::hexagon_C4_and_orn, 10885}, // __builtin_HEXAGON_C4_and_orn
   30564       {Intrinsic::hexagon_C4_cmplte, 10914}, // __builtin_HEXAGON_C4_cmplte
   30565       {Intrinsic::hexagon_C4_cmpltei, 10942}, // __builtin_HEXAGON_C4_cmpltei
   30566       {Intrinsic::hexagon_C4_cmplteu, 10971}, // __builtin_HEXAGON_C4_cmplteu
   30567       {Intrinsic::hexagon_C4_cmplteui, 11000}, // __builtin_HEXAGON_C4_cmplteui
   30568       {Intrinsic::hexagon_C4_cmpneq, 11030}, // __builtin_HEXAGON_C4_cmpneq
   30569       {Intrinsic::hexagon_C4_cmpneqi, 11058}, // __builtin_HEXAGON_C4_cmpneqi
   30570       {Intrinsic::hexagon_C4_fastcorner9, 11087}, // __builtin_HEXAGON_C4_fastcorner9
   30571       {Intrinsic::hexagon_C4_fastcorner9_not, 11120}, // __builtin_HEXAGON_C4_fastcorner9_not
   30572       {Intrinsic::hexagon_C4_nbitsclr, 11157}, // __builtin_HEXAGON_C4_nbitsclr
   30573       {Intrinsic::hexagon_C4_nbitsclri, 11187}, // __builtin_HEXAGON_C4_nbitsclri
   30574       {Intrinsic::hexagon_C4_nbitsset, 11218}, // __builtin_HEXAGON_C4_nbitsset
   30575       {Intrinsic::hexagon_C4_or_and, 11248}, // __builtin_HEXAGON_C4_or_and
   30576       {Intrinsic::hexagon_C4_or_andn, 11276}, // __builtin_HEXAGON_C4_or_andn
   30577       {Intrinsic::hexagon_C4_or_or, 11305}, // __builtin_HEXAGON_C4_or_or
   30578       {Intrinsic::hexagon_C4_or_orn, 11332}, // __builtin_HEXAGON_C4_or_orn
   30579       {Intrinsic::hexagon_F2_conv_d2df, 11360}, // __builtin_HEXAGON_F2_conv_d2df
   30580       {Intrinsic::hexagon_F2_conv_d2sf, 11391}, // __builtin_HEXAGON_F2_conv_d2sf
   30581       {Intrinsic::hexagon_F2_conv_df2d, 11422}, // __builtin_HEXAGON_F2_conv_df2d
   30582       {Intrinsic::hexagon_F2_conv_df2d_chop, 11453}, // __builtin_HEXAGON_F2_conv_df2d_chop
   30583       {Intrinsic::hexagon_F2_conv_df2sf, 11489}, // __builtin_HEXAGON_F2_conv_df2sf
   30584       {Intrinsic::hexagon_F2_conv_df2ud, 11521}, // __builtin_HEXAGON_F2_conv_df2ud
   30585       {Intrinsic::hexagon_F2_conv_df2ud_chop, 11553}, // __builtin_HEXAGON_F2_conv_df2ud_chop
   30586       {Intrinsic::hexagon_F2_conv_df2uw, 11590}, // __builtin_HEXAGON_F2_conv_df2uw
   30587       {Intrinsic::hexagon_F2_conv_df2uw_chop, 11622}, // __builtin_HEXAGON_F2_conv_df2uw_chop
   30588       {Intrinsic::hexagon_F2_conv_df2w, 11659}, // __builtin_HEXAGON_F2_conv_df2w
   30589       {Intrinsic::hexagon_F2_conv_df2w_chop, 11690}, // __builtin_HEXAGON_F2_conv_df2w_chop
   30590       {Intrinsic::hexagon_F2_conv_sf2d, 11726}, // __builtin_HEXAGON_F2_conv_sf2d
   30591       {Intrinsic::hexagon_F2_conv_sf2d_chop, 11757}, // __builtin_HEXAGON_F2_conv_sf2d_chop
   30592       {Intrinsic::hexagon_F2_conv_sf2df, 11793}, // __builtin_HEXAGON_F2_conv_sf2df
   30593       {Intrinsic::hexagon_F2_conv_sf2ud, 11825}, // __builtin_HEXAGON_F2_conv_sf2ud
   30594       {Intrinsic::hexagon_F2_conv_sf2ud_chop, 11857}, // __builtin_HEXAGON_F2_conv_sf2ud_chop
   30595       {Intrinsic::hexagon_F2_conv_sf2uw, 11894}, // __builtin_HEXAGON_F2_conv_sf2uw
   30596       {Intrinsic::hexagon_F2_conv_sf2uw_chop, 11926}, // __builtin_HEXAGON_F2_conv_sf2uw_chop
   30597       {Intrinsic::hexagon_F2_conv_sf2w, 11963}, // __builtin_HEXAGON_F2_conv_sf2w
   30598       {Intrinsic::hexagon_F2_conv_sf2w_chop, 11994}, // __builtin_HEXAGON_F2_conv_sf2w_chop
   30599       {Intrinsic::hexagon_F2_conv_ud2df, 12030}, // __builtin_HEXAGON_F2_conv_ud2df
   30600       {Intrinsic::hexagon_F2_conv_ud2sf, 12062}, // __builtin_HEXAGON_F2_conv_ud2sf
   30601       {Intrinsic::hexagon_F2_conv_uw2df, 12094}, // __builtin_HEXAGON_F2_conv_uw2df
   30602       {Intrinsic::hexagon_F2_conv_uw2sf, 12126}, // __builtin_HEXAGON_F2_conv_uw2sf
   30603       {Intrinsic::hexagon_F2_conv_w2df, 12158}, // __builtin_HEXAGON_F2_conv_w2df
   30604       {Intrinsic::hexagon_F2_conv_w2sf, 12189}, // __builtin_HEXAGON_F2_conv_w2sf
   30605       {Intrinsic::hexagon_F2_dfclass, 12220}, // __builtin_HEXAGON_F2_dfclass
   30606       {Intrinsic::hexagon_F2_dfcmpeq, 12249}, // __builtin_HEXAGON_F2_dfcmpeq
   30607       {Intrinsic::hexagon_F2_dfcmpge, 12278}, // __builtin_HEXAGON_F2_dfcmpge
   30608       {Intrinsic::hexagon_F2_dfcmpgt, 12307}, // __builtin_HEXAGON_F2_dfcmpgt
   30609       {Intrinsic::hexagon_F2_dfcmpuo, 12336}, // __builtin_HEXAGON_F2_dfcmpuo
   30610       {Intrinsic::hexagon_F2_dfimm_n, 12365}, // __builtin_HEXAGON_F2_dfimm_n
   30611       {Intrinsic::hexagon_F2_dfimm_p, 12394}, // __builtin_HEXAGON_F2_dfimm_p
   30612       {Intrinsic::hexagon_F2_sfadd, 12423}, // __builtin_HEXAGON_F2_sfadd
   30613       {Intrinsic::hexagon_F2_sfclass, 12450}, // __builtin_HEXAGON_F2_sfclass
   30614       {Intrinsic::hexagon_F2_sfcmpeq, 12479}, // __builtin_HEXAGON_F2_sfcmpeq
   30615       {Intrinsic::hexagon_F2_sfcmpge, 12508}, // __builtin_HEXAGON_F2_sfcmpge
   30616       {Intrinsic::hexagon_F2_sfcmpgt, 12537}, // __builtin_HEXAGON_F2_sfcmpgt
   30617       {Intrinsic::hexagon_F2_sfcmpuo, 12566}, // __builtin_HEXAGON_F2_sfcmpuo
   30618       {Intrinsic::hexagon_F2_sffixupd, 12595}, // __builtin_HEXAGON_F2_sffixupd
   30619       {Intrinsic::hexagon_F2_sffixupn, 12625}, // __builtin_HEXAGON_F2_sffixupn
   30620       {Intrinsic::hexagon_F2_sffixupr, 12655}, // __builtin_HEXAGON_F2_sffixupr
   30621       {Intrinsic::hexagon_F2_sffma, 12685}, // __builtin_HEXAGON_F2_sffma
   30622       {Intrinsic::hexagon_F2_sffma_lib, 12712}, // __builtin_HEXAGON_F2_sffma_lib
   30623       {Intrinsic::hexagon_F2_sffma_sc, 12743}, // __builtin_HEXAGON_F2_sffma_sc
   30624       {Intrinsic::hexagon_F2_sffms, 12773}, // __builtin_HEXAGON_F2_sffms
   30625       {Intrinsic::hexagon_F2_sffms_lib, 12800}, // __builtin_HEXAGON_F2_sffms_lib
   30626       {Intrinsic::hexagon_F2_sfimm_n, 12831}, // __builtin_HEXAGON_F2_sfimm_n
   30627       {Intrinsic::hexagon_F2_sfimm_p, 12860}, // __builtin_HEXAGON_F2_sfimm_p
   30628       {Intrinsic::hexagon_F2_sfmax, 12889}, // __builtin_HEXAGON_F2_sfmax
   30629       {Intrinsic::hexagon_F2_sfmin, 12916}, // __builtin_HEXAGON_F2_sfmin
   30630       {Intrinsic::hexagon_F2_sfmpy, 12943}, // __builtin_HEXAGON_F2_sfmpy
   30631       {Intrinsic::hexagon_F2_sfsub, 12970}, // __builtin_HEXAGON_F2_sfsub
   30632       {Intrinsic::hexagon_L2_loadw_locked, 12997}, // __builtin_HEXAGON_L2_loadw_locked
   30633       {Intrinsic::hexagon_L4_loadd_locked, 13031}, // __builtin_HEXAGON_L4_loadd_locked
   30634       {Intrinsic::hexagon_M2_acci, 13065}, // __builtin_HEXAGON_M2_acci
   30635       {Intrinsic::hexagon_M2_accii, 13091}, // __builtin_HEXAGON_M2_accii
   30636       {Intrinsic::hexagon_M2_cmaci_s0, 13118}, // __builtin_HEXAGON_M2_cmaci_s0
   30637       {Intrinsic::hexagon_M2_cmacr_s0, 13148}, // __builtin_HEXAGON_M2_cmacr_s0
   30638       {Intrinsic::hexagon_M2_cmacs_s0, 13178}, // __builtin_HEXAGON_M2_cmacs_s0
   30639       {Intrinsic::hexagon_M2_cmacs_s1, 13208}, // __builtin_HEXAGON_M2_cmacs_s1
   30640       {Intrinsic::hexagon_M2_cmacsc_s0, 13238}, // __builtin_HEXAGON_M2_cmacsc_s0
   30641       {Intrinsic::hexagon_M2_cmacsc_s1, 13269}, // __builtin_HEXAGON_M2_cmacsc_s1
   30642       {Intrinsic::hexagon_M2_cmpyi_s0, 13300}, // __builtin_HEXAGON_M2_cmpyi_s0
   30643       {Intrinsic::hexagon_M2_cmpyr_s0, 13330}, // __builtin_HEXAGON_M2_cmpyr_s0
   30644       {Intrinsic::hexagon_M2_cmpyrs_s0, 13360}, // __builtin_HEXAGON_M2_cmpyrs_s0
   30645       {Intrinsic::hexagon_M2_cmpyrs_s1, 13391}, // __builtin_HEXAGON_M2_cmpyrs_s1
   30646       {Intrinsic::hexagon_M2_cmpyrsc_s0, 13422}, // __builtin_HEXAGON_M2_cmpyrsc_s0
   30647       {Intrinsic::hexagon_M2_cmpyrsc_s1, 13454}, // __builtin_HEXAGON_M2_cmpyrsc_s1
   30648       {Intrinsic::hexagon_M2_cmpys_s0, 13486}, // __builtin_HEXAGON_M2_cmpys_s0
   30649       {Intrinsic::hexagon_M2_cmpys_s1, 13516}, // __builtin_HEXAGON_M2_cmpys_s1
   30650       {Intrinsic::hexagon_M2_cmpysc_s0, 13546}, // __builtin_HEXAGON_M2_cmpysc_s0
   30651       {Intrinsic::hexagon_M2_cmpysc_s1, 13577}, // __builtin_HEXAGON_M2_cmpysc_s1
   30652       {Intrinsic::hexagon_M2_cnacs_s0, 13608}, // __builtin_HEXAGON_M2_cnacs_s0
   30653       {Intrinsic::hexagon_M2_cnacs_s1, 13638}, // __builtin_HEXAGON_M2_cnacs_s1
   30654       {Intrinsic::hexagon_M2_cnacsc_s0, 13668}, // __builtin_HEXAGON_M2_cnacsc_s0
   30655       {Intrinsic::hexagon_M2_cnacsc_s1, 13699}, // __builtin_HEXAGON_M2_cnacsc_s1
   30656       {Intrinsic::hexagon_M2_dpmpyss_acc_s0, 13730}, // __builtin_HEXAGON_M2_dpmpyss_acc_s0
   30657       {Intrinsic::hexagon_M2_dpmpyss_nac_s0, 13766}, // __builtin_HEXAGON_M2_dpmpyss_nac_s0
   30658       {Intrinsic::hexagon_M2_dpmpyss_rnd_s0, 13802}, // __builtin_HEXAGON_M2_dpmpyss_rnd_s0
   30659       {Intrinsic::hexagon_M2_dpmpyss_s0, 13838}, // __builtin_HEXAGON_M2_dpmpyss_s0
   30660       {Intrinsic::hexagon_M2_dpmpyuu_acc_s0, 13870}, // __builtin_HEXAGON_M2_dpmpyuu_acc_s0
   30661       {Intrinsic::hexagon_M2_dpmpyuu_nac_s0, 13906}, // __builtin_HEXAGON_M2_dpmpyuu_nac_s0
   30662       {Intrinsic::hexagon_M2_dpmpyuu_s0, 13942}, // __builtin_HEXAGON_M2_dpmpyuu_s0
   30663       {Intrinsic::hexagon_M2_hmmpyh_rs1, 13974}, // __builtin_HEXAGON_M2_hmmpyh_rs1
   30664       {Intrinsic::hexagon_M2_hmmpyh_s1, 14006}, // __builtin_HEXAGON_M2_hmmpyh_s1
   30665       {Intrinsic::hexagon_M2_hmmpyl_rs1, 14037}, // __builtin_HEXAGON_M2_hmmpyl_rs1
   30666       {Intrinsic::hexagon_M2_hmmpyl_s1, 14069}, // __builtin_HEXAGON_M2_hmmpyl_s1
   30667       {Intrinsic::hexagon_M2_maci, 14100}, // __builtin_HEXAGON_M2_maci
   30668       {Intrinsic::hexagon_M2_macsin, 14126}, // __builtin_HEXAGON_M2_macsin
   30669       {Intrinsic::hexagon_M2_macsip, 14154}, // __builtin_HEXAGON_M2_macsip
   30670       {Intrinsic::hexagon_M2_mmachs_rs0, 14182}, // __builtin_HEXAGON_M2_mmachs_rs0
   30671       {Intrinsic::hexagon_M2_mmachs_rs1, 14214}, // __builtin_HEXAGON_M2_mmachs_rs1
   30672       {Intrinsic::hexagon_M2_mmachs_s0, 14246}, // __builtin_HEXAGON_M2_mmachs_s0
   30673       {Intrinsic::hexagon_M2_mmachs_s1, 14277}, // __builtin_HEXAGON_M2_mmachs_s1
   30674       {Intrinsic::hexagon_M2_mmacls_rs0, 14308}, // __builtin_HEXAGON_M2_mmacls_rs0
   30675       {Intrinsic::hexagon_M2_mmacls_rs1, 14340}, // __builtin_HEXAGON_M2_mmacls_rs1
   30676       {Intrinsic::hexagon_M2_mmacls_s0, 14372}, // __builtin_HEXAGON_M2_mmacls_s0
   30677       {Intrinsic::hexagon_M2_mmacls_s1, 14403}, // __builtin_HEXAGON_M2_mmacls_s1
   30678       {Intrinsic::hexagon_M2_mmacuhs_rs0, 14434}, // __builtin_HEXAGON_M2_mmacuhs_rs0
   30679       {Intrinsic::hexagon_M2_mmacuhs_rs1, 14467}, // __builtin_HEXAGON_M2_mmacuhs_rs1
   30680       {Intrinsic::hexagon_M2_mmacuhs_s0, 14500}, // __builtin_HEXAGON_M2_mmacuhs_s0
   30681       {Intrinsic::hexagon_M2_mmacuhs_s1, 14532}, // __builtin_HEXAGON_M2_mmacuhs_s1
   30682       {Intrinsic::hexagon_M2_mmaculs_rs0, 14564}, // __builtin_HEXAGON_M2_mmaculs_rs0
   30683       {Intrinsic::hexagon_M2_mmaculs_rs1, 14597}, // __builtin_HEXAGON_M2_mmaculs_rs1
   30684       {Intrinsic::hexagon_M2_mmaculs_s0, 14630}, // __builtin_HEXAGON_M2_mmaculs_s0
   30685       {Intrinsic::hexagon_M2_mmaculs_s1, 14662}, // __builtin_HEXAGON_M2_mmaculs_s1
   30686       {Intrinsic::hexagon_M2_mmpyh_rs0, 14694}, // __builtin_HEXAGON_M2_mmpyh_rs0
   30687       {Intrinsic::hexagon_M2_mmpyh_rs1, 14725}, // __builtin_HEXAGON_M2_mmpyh_rs1
   30688       {Intrinsic::hexagon_M2_mmpyh_s0, 14756}, // __builtin_HEXAGON_M2_mmpyh_s0
   30689       {Intrinsic::hexagon_M2_mmpyh_s1, 14786}, // __builtin_HEXAGON_M2_mmpyh_s1
   30690       {Intrinsic::hexagon_M2_mmpyl_rs0, 14816}, // __builtin_HEXAGON_M2_mmpyl_rs0
   30691       {Intrinsic::hexagon_M2_mmpyl_rs1, 14847}, // __builtin_HEXAGON_M2_mmpyl_rs1
   30692       {Intrinsic::hexagon_M2_mmpyl_s0, 14878}, // __builtin_HEXAGON_M2_mmpyl_s0
   30693       {Intrinsic::hexagon_M2_mmpyl_s1, 14908}, // __builtin_HEXAGON_M2_mmpyl_s1
   30694       {Intrinsic::hexagon_M2_mmpyuh_rs0, 14938}, // __builtin_HEXAGON_M2_mmpyuh_rs0
   30695       {Intrinsic::hexagon_M2_mmpyuh_rs1, 14970}, // __builtin_HEXAGON_M2_mmpyuh_rs1
   30696       {Intrinsic::hexagon_M2_mmpyuh_s0, 15002}, // __builtin_HEXAGON_M2_mmpyuh_s0
   30697       {Intrinsic::hexagon_M2_mmpyuh_s1, 15033}, // __builtin_HEXAGON_M2_mmpyuh_s1
   30698       {Intrinsic::hexagon_M2_mmpyul_rs0, 15064}, // __builtin_HEXAGON_M2_mmpyul_rs0
   30699       {Intrinsic::hexagon_M2_mmpyul_rs1, 15096}, // __builtin_HEXAGON_M2_mmpyul_rs1
   30700       {Intrinsic::hexagon_M2_mmpyul_s0, 15128}, // __builtin_HEXAGON_M2_mmpyul_s0
   30701       {Intrinsic::hexagon_M2_mmpyul_s1, 15159}, // __builtin_HEXAGON_M2_mmpyul_s1
   30702       {Intrinsic::hexagon_M2_mpy_acc_hh_s0, 15190}, // __builtin_HEXAGON_M2_mpy_acc_hh_s0
   30703       {Intrinsic::hexagon_M2_mpy_acc_hh_s1, 15225}, // __builtin_HEXAGON_M2_mpy_acc_hh_s1
   30704       {Intrinsic::hexagon_M2_mpy_acc_hl_s0, 15260}, // __builtin_HEXAGON_M2_mpy_acc_hl_s0
   30705       {Intrinsic::hexagon_M2_mpy_acc_hl_s1, 15295}, // __builtin_HEXAGON_M2_mpy_acc_hl_s1
   30706       {Intrinsic::hexagon_M2_mpy_acc_lh_s0, 15330}, // __builtin_HEXAGON_M2_mpy_acc_lh_s0
   30707       {Intrinsic::hexagon_M2_mpy_acc_lh_s1, 15365}, // __builtin_HEXAGON_M2_mpy_acc_lh_s1
   30708       {Intrinsic::hexagon_M2_mpy_acc_ll_s0, 15400}, // __builtin_HEXAGON_M2_mpy_acc_ll_s0
   30709       {Intrinsic::hexagon_M2_mpy_acc_ll_s1, 15435}, // __builtin_HEXAGON_M2_mpy_acc_ll_s1
   30710       {Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0, 15470}, // __builtin_HEXAGON_M2_mpy_acc_sat_hh_s0
   30711       {Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1, 15509}, // __builtin_HEXAGON_M2_mpy_acc_sat_hh_s1
   30712       {Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0, 15548}, // __builtin_HEXAGON_M2_mpy_acc_sat_hl_s0
   30713       {Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1, 15587}, // __builtin_HEXAGON_M2_mpy_acc_sat_hl_s1
   30714       {Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0, 15626}, // __builtin_HEXAGON_M2_mpy_acc_sat_lh_s0
   30715       {Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1, 15665}, // __builtin_HEXAGON_M2_mpy_acc_sat_lh_s1
   30716       {Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0, 15704}, // __builtin_HEXAGON_M2_mpy_acc_sat_ll_s0
   30717       {Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1, 15743}, // __builtin_HEXAGON_M2_mpy_acc_sat_ll_s1
   30718       {Intrinsic::hexagon_M2_mpy_hh_s0, 15782}, // __builtin_HEXAGON_M2_mpy_hh_s0
   30719       {Intrinsic::hexagon_M2_mpy_hh_s1, 15813}, // __builtin_HEXAGON_M2_mpy_hh_s1
   30720       {Intrinsic::hexagon_M2_mpy_hl_s0, 15844}, // __builtin_HEXAGON_M2_mpy_hl_s0
   30721       {Intrinsic::hexagon_M2_mpy_hl_s1, 15875}, // __builtin_HEXAGON_M2_mpy_hl_s1
   30722       {Intrinsic::hexagon_M2_mpy_lh_s0, 15906}, // __builtin_HEXAGON_M2_mpy_lh_s0
   30723       {Intrinsic::hexagon_M2_mpy_lh_s1, 15937}, // __builtin_HEXAGON_M2_mpy_lh_s1
   30724       {Intrinsic::hexagon_M2_mpy_ll_s0, 15968}, // __builtin_HEXAGON_M2_mpy_ll_s0
   30725       {Intrinsic::hexagon_M2_mpy_ll_s1, 15999}, // __builtin_HEXAGON_M2_mpy_ll_s1
   30726       {Intrinsic::hexagon_M2_mpy_nac_hh_s0, 16030}, // __builtin_HEXAGON_M2_mpy_nac_hh_s0
   30727       {Intrinsic::hexagon_M2_mpy_nac_hh_s1, 16065}, // __builtin_HEXAGON_M2_mpy_nac_hh_s1
   30728       {Intrinsic::hexagon_M2_mpy_nac_hl_s0, 16100}, // __builtin_HEXAGON_M2_mpy_nac_hl_s0
   30729       {Intrinsic::hexagon_M2_mpy_nac_hl_s1, 16135}, // __builtin_HEXAGON_M2_mpy_nac_hl_s1
   30730       {Intrinsic::hexagon_M2_mpy_nac_lh_s0, 16170}, // __builtin_HEXAGON_M2_mpy_nac_lh_s0
   30731       {Intrinsic::hexagon_M2_mpy_nac_lh_s1, 16205}, // __builtin_HEXAGON_M2_mpy_nac_lh_s1
   30732       {Intrinsic::hexagon_M2_mpy_nac_ll_s0, 16240}, // __builtin_HEXAGON_M2_mpy_nac_ll_s0
   30733       {Intrinsic::hexagon_M2_mpy_nac_ll_s1, 16275}, // __builtin_HEXAGON_M2_mpy_nac_ll_s1
   30734       {Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0, 16310}, // __builtin_HEXAGON_M2_mpy_nac_sat_hh_s0
   30735       {Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1, 16349}, // __builtin_HEXAGON_M2_mpy_nac_sat_hh_s1
   30736       {Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0, 16388}, // __builtin_HEXAGON_M2_mpy_nac_sat_hl_s0
   30737       {Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1, 16427}, // __builtin_HEXAGON_M2_mpy_nac_sat_hl_s1
   30738       {Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0, 16466}, // __builtin_HEXAGON_M2_mpy_nac_sat_lh_s0
   30739       {Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1, 16505}, // __builtin_HEXAGON_M2_mpy_nac_sat_lh_s1
   30740       {Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0, 16544}, // __builtin_HEXAGON_M2_mpy_nac_sat_ll_s0
   30741       {Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1, 16583}, // __builtin_HEXAGON_M2_mpy_nac_sat_ll_s1
   30742       {Intrinsic::hexagon_M2_mpy_rnd_hh_s0, 16622}, // __builtin_HEXAGON_M2_mpy_rnd_hh_s0
   30743       {Intrinsic::hexagon_M2_mpy_rnd_hh_s1, 16657}, // __builtin_HEXAGON_M2_mpy_rnd_hh_s1
   30744       {Intrinsic::hexagon_M2_mpy_rnd_hl_s0, 16692}, // __builtin_HEXAGON_M2_mpy_rnd_hl_s0
   30745       {Intrinsic::hexagon_M2_mpy_rnd_hl_s1, 16727}, // __builtin_HEXAGON_M2_mpy_rnd_hl_s1
   30746       {Intrinsic::hexagon_M2_mpy_rnd_lh_s0, 16762}, // __builtin_HEXAGON_M2_mpy_rnd_lh_s0
   30747       {Intrinsic::hexagon_M2_mpy_rnd_lh_s1, 16797}, // __builtin_HEXAGON_M2_mpy_rnd_lh_s1
   30748       {Intrinsic::hexagon_M2_mpy_rnd_ll_s0, 16832}, // __builtin_HEXAGON_M2_mpy_rnd_ll_s0
   30749       {Intrinsic::hexagon_M2_mpy_rnd_ll_s1, 16867}, // __builtin_HEXAGON_M2_mpy_rnd_ll_s1
   30750       {Intrinsic::hexagon_M2_mpy_sat_hh_s0, 16902}, // __builtin_HEXAGON_M2_mpy_sat_hh_s0
   30751       {Intrinsic::hexagon_M2_mpy_sat_hh_s1, 16937}, // __builtin_HEXAGON_M2_mpy_sat_hh_s1
   30752       {Intrinsic::hexagon_M2_mpy_sat_hl_s0, 16972}, // __builtin_HEXAGON_M2_mpy_sat_hl_s0
   30753       {Intrinsic::hexagon_M2_mpy_sat_hl_s1, 17007}, // __builtin_HEXAGON_M2_mpy_sat_hl_s1
   30754       {Intrinsic::hexagon_M2_mpy_sat_lh_s0, 17042}, // __builtin_HEXAGON_M2_mpy_sat_lh_s0
   30755       {Intrinsic::hexagon_M2_mpy_sat_lh_s1, 17077}, // __builtin_HEXAGON_M2_mpy_sat_lh_s1
   30756       {Intrinsic::hexagon_M2_mpy_sat_ll_s0, 17112}, // __builtin_HEXAGON_M2_mpy_sat_ll_s0
   30757       {Intrinsic::hexagon_M2_mpy_sat_ll_s1, 17147}, // __builtin_HEXAGON_M2_mpy_sat_ll_s1
   30758       {Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0, 17182}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0
   30759       {Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1, 17221}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1
   30760       {Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0, 17260}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0
   30761       {Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1, 17299}, // __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1
   30762       {Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0, 17338}, // __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0
   30763       {Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1, 17377}, // __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1
   30764       {Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0, 17416}, // __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0
   30765       {Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1, 17455}, // __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1
   30766       {Intrinsic::hexagon_M2_mpy_up, 17494}, // __builtin_HEXAGON_M2_mpy_up
   30767       {Intrinsic::hexagon_M2_mpy_up_s1, 17522}, // __builtin_HEXAGON_M2_mpy_up_s1
   30768       {Intrinsic::hexagon_M2_mpy_up_s1_sat, 17553}, // __builtin_HEXAGON_M2_mpy_up_s1_sat
   30769       {Intrinsic::hexagon_M2_mpyd_acc_hh_s0, 17588}, // __builtin_HEXAGON_M2_mpyd_acc_hh_s0
   30770       {Intrinsic::hexagon_M2_mpyd_acc_hh_s1, 17624}, // __builtin_HEXAGON_M2_mpyd_acc_hh_s1
   30771       {Intrinsic::hexagon_M2_mpyd_acc_hl_s0, 17660}, // __builtin_HEXAGON_M2_mpyd_acc_hl_s0
   30772       {Intrinsic::hexagon_M2_mpyd_acc_hl_s1, 17696}, // __builtin_HEXAGON_M2_mpyd_acc_hl_s1
   30773       {Intrinsic::hexagon_M2_mpyd_acc_lh_s0, 17732}, // __builtin_HEXAGON_M2_mpyd_acc_lh_s0
   30774       {Intrinsic::hexagon_M2_mpyd_acc_lh_s1, 17768}, // __builtin_HEXAGON_M2_mpyd_acc_lh_s1
   30775       {Intrinsic::hexagon_M2_mpyd_acc_ll_s0, 17804}, // __builtin_HEXAGON_M2_mpyd_acc_ll_s0
   30776       {Intrinsic::hexagon_M2_mpyd_acc_ll_s1, 17840}, // __builtin_HEXAGON_M2_mpyd_acc_ll_s1
   30777       {Intrinsic::hexagon_M2_mpyd_hh_s0, 17876}, // __builtin_HEXAGON_M2_mpyd_hh_s0
   30778       {Intrinsic::hexagon_M2_mpyd_hh_s1, 17908}, // __builtin_HEXAGON_M2_mpyd_hh_s1
   30779       {Intrinsic::hexagon_M2_mpyd_hl_s0, 17940}, // __builtin_HEXAGON_M2_mpyd_hl_s0
   30780       {Intrinsic::hexagon_M2_mpyd_hl_s1, 17972}, // __builtin_HEXAGON_M2_mpyd_hl_s1
   30781       {Intrinsic::hexagon_M2_mpyd_lh_s0, 18004}, // __builtin_HEXAGON_M2_mpyd_lh_s0
   30782       {Intrinsic::hexagon_M2_mpyd_lh_s1, 18036}, // __builtin_HEXAGON_M2_mpyd_lh_s1
   30783       {Intrinsic::hexagon_M2_mpyd_ll_s0, 18068}, // __builtin_HEXAGON_M2_mpyd_ll_s0
   30784       {Intrinsic::hexagon_M2_mpyd_ll_s1, 18100}, // __builtin_HEXAGON_M2_mpyd_ll_s1
   30785       {Intrinsic::hexagon_M2_mpyd_nac_hh_s0, 18132}, // __builtin_HEXAGON_M2_mpyd_nac_hh_s0
   30786       {Intrinsic::hexagon_M2_mpyd_nac_hh_s1, 18168}, // __builtin_HEXAGON_M2_mpyd_nac_hh_s1
   30787       {Intrinsic::hexagon_M2_mpyd_nac_hl_s0, 18204}, // __builtin_HEXAGON_M2_mpyd_nac_hl_s0
   30788       {Intrinsic::hexagon_M2_mpyd_nac_hl_s1, 18240}, // __builtin_HEXAGON_M2_mpyd_nac_hl_s1
   30789       {Intrinsic::hexagon_M2_mpyd_nac_lh_s0, 18276}, // __builtin_HEXAGON_M2_mpyd_nac_lh_s0
   30790       {Intrinsic::hexagon_M2_mpyd_nac_lh_s1, 18312}, // __builtin_HEXAGON_M2_mpyd_nac_lh_s1
   30791       {Intrinsic::hexagon_M2_mpyd_nac_ll_s0, 18348}, // __builtin_HEXAGON_M2_mpyd_nac_ll_s0
   30792       {Intrinsic::hexagon_M2_mpyd_nac_ll_s1, 18384}, // __builtin_HEXAGON_M2_mpyd_nac_ll_s1
   30793       {Intrinsic::hexagon_M2_mpyd_rnd_hh_s0, 18420}, // __builtin_HEXAGON_M2_mpyd_rnd_hh_s0
   30794       {Intrinsic::hexagon_M2_mpyd_rnd_hh_s1, 18456}, // __builtin_HEXAGON_M2_mpyd_rnd_hh_s1
   30795       {Intrinsic::hexagon_M2_mpyd_rnd_hl_s0, 18492}, // __builtin_HEXAGON_M2_mpyd_rnd_hl_s0
   30796       {Intrinsic::hexagon_M2_mpyd_rnd_hl_s1, 18528}, // __builtin_HEXAGON_M2_mpyd_rnd_hl_s1
   30797       {Intrinsic::hexagon_M2_mpyd_rnd_lh_s0, 18564}, // __builtin_HEXAGON_M2_mpyd_rnd_lh_s0
   30798       {Intrinsic::hexagon_M2_mpyd_rnd_lh_s1, 18600}, // __builtin_HEXAGON_M2_mpyd_rnd_lh_s1
   30799       {Intrinsic::hexagon_M2_mpyd_rnd_ll_s0, 18636}, // __builtin_HEXAGON_M2_mpyd_rnd_ll_s0
   30800       {Intrinsic::hexagon_M2_mpyd_rnd_ll_s1, 18672}, // __builtin_HEXAGON_M2_mpyd_rnd_ll_s1
   30801       {Intrinsic::hexagon_M2_mpyi, 18708}, // __builtin_HEXAGON_M2_mpyi
   30802       {Intrinsic::hexagon_M2_mpysmi, 18734}, // __builtin_HEXAGON_M2_mpysmi
   30803       {Intrinsic::hexagon_M2_mpysu_up, 18762}, // __builtin_HEXAGON_M2_mpysu_up
   30804       {Intrinsic::hexagon_M2_mpyu_acc_hh_s0, 18792}, // __builtin_HEXAGON_M2_mpyu_acc_hh_s0
   30805       {Intrinsic::hexagon_M2_mpyu_acc_hh_s1, 18828}, // __builtin_HEXAGON_M2_mpyu_acc_hh_s1
   30806       {Intrinsic::hexagon_M2_mpyu_acc_hl_s0, 18864}, // __builtin_HEXAGON_M2_mpyu_acc_hl_s0
   30807       {Intrinsic::hexagon_M2_mpyu_acc_hl_s1, 18900}, // __builtin_HEXAGON_M2_mpyu_acc_hl_s1
   30808       {Intrinsic::hexagon_M2_mpyu_acc_lh_s0, 18936}, // __builtin_HEXAGON_M2_mpyu_acc_lh_s0
   30809       {Intrinsic::hexagon_M2_mpyu_acc_lh_s1, 18972}, // __builtin_HEXAGON_M2_mpyu_acc_lh_s1
   30810       {Intrinsic::hexagon_M2_mpyu_acc_ll_s0, 19008}, // __builtin_HEXAGON_M2_mpyu_acc_ll_s0
   30811       {Intrinsic::hexagon_M2_mpyu_acc_ll_s1, 19044}, // __builtin_HEXAGON_M2_mpyu_acc_ll_s1
   30812       {Intrinsic::hexagon_M2_mpyu_hh_s0, 19080}, // __builtin_HEXAGON_M2_mpyu_hh_s0
   30813       {Intrinsic::hexagon_M2_mpyu_hh_s1, 19112}, // __builtin_HEXAGON_M2_mpyu_hh_s1
   30814       {Intrinsic::hexagon_M2_mpyu_hl_s0, 19144}, // __builtin_HEXAGON_M2_mpyu_hl_s0
   30815       {Intrinsic::hexagon_M2_mpyu_hl_s1, 19176}, // __builtin_HEXAGON_M2_mpyu_hl_s1
   30816       {Intrinsic::hexagon_M2_mpyu_lh_s0, 19208}, // __builtin_HEXAGON_M2_mpyu_lh_s0
   30817       {Intrinsic::hexagon_M2_mpyu_lh_s1, 19240}, // __builtin_HEXAGON_M2_mpyu_lh_s1
   30818       {Intrinsic::hexagon_M2_mpyu_ll_s0, 19272}, // __builtin_HEXAGON_M2_mpyu_ll_s0
   30819       {Intrinsic::hexagon_M2_mpyu_ll_s1, 19304}, // __builtin_HEXAGON_M2_mpyu_ll_s1
   30820       {Intrinsic::hexagon_M2_mpyu_nac_hh_s0, 19336}, // __builtin_HEXAGON_M2_mpyu_nac_hh_s0
   30821       {Intrinsic::hexagon_M2_mpyu_nac_hh_s1, 19372}, // __builtin_HEXAGON_M2_mpyu_nac_hh_s1
   30822       {Intrinsic::hexagon_M2_mpyu_nac_hl_s0, 19408}, // __builtin_HEXAGON_M2_mpyu_nac_hl_s0
   30823       {Intrinsic::hexagon_M2_mpyu_nac_hl_s1, 19444}, // __builtin_HEXAGON_M2_mpyu_nac_hl_s1
   30824       {Intrinsic::hexagon_M2_mpyu_nac_lh_s0, 19480}, // __builtin_HEXAGON_M2_mpyu_nac_lh_s0
   30825       {Intrinsic::hexagon_M2_mpyu_nac_lh_s1, 19516}, // __builtin_HEXAGON_M2_mpyu_nac_lh_s1
   30826       {Intrinsic::hexagon_M2_mpyu_nac_ll_s0, 19552}, // __builtin_HEXAGON_M2_mpyu_nac_ll_s0
   30827       {Intrinsic::hexagon_M2_mpyu_nac_ll_s1, 19588}, // __builtin_HEXAGON_M2_mpyu_nac_ll_s1
   30828       {Intrinsic::hexagon_M2_mpyu_up, 19624}, // __builtin_HEXAGON_M2_mpyu_up
   30829       {Intrinsic::hexagon_M2_mpyud_acc_hh_s0, 19653}, // __builtin_HEXAGON_M2_mpyud_acc_hh_s0
   30830       {Intrinsic::hexagon_M2_mpyud_acc_hh_s1, 19690}, // __builtin_HEXAGON_M2_mpyud_acc_hh_s1
   30831       {Intrinsic::hexagon_M2_mpyud_acc_hl_s0, 19727}, // __builtin_HEXAGON_M2_mpyud_acc_hl_s0
   30832       {Intrinsic::hexagon_M2_mpyud_acc_hl_s1, 19764}, // __builtin_HEXAGON_M2_mpyud_acc_hl_s1
   30833       {Intrinsic::hexagon_M2_mpyud_acc_lh_s0, 19801}, // __builtin_HEXAGON_M2_mpyud_acc_lh_s0
   30834       {Intrinsic::hexagon_M2_mpyud_acc_lh_s1, 19838}, // __builtin_HEXAGON_M2_mpyud_acc_lh_s1
   30835       {Intrinsic::hexagon_M2_mpyud_acc_ll_s0, 19875}, // __builtin_HEXAGON_M2_mpyud_acc_ll_s0
   30836       {Intrinsic::hexagon_M2_mpyud_acc_ll_s1, 19912}, // __builtin_HEXAGON_M2_mpyud_acc_ll_s1
   30837       {Intrinsic::hexagon_M2_mpyud_hh_s0, 19949}, // __builtin_HEXAGON_M2_mpyud_hh_s0
   30838       {Intrinsic::hexagon_M2_mpyud_hh_s1, 19982}, // __builtin_HEXAGON_M2_mpyud_hh_s1
   30839       {Intrinsic::hexagon_M2_mpyud_hl_s0, 20015}, // __builtin_HEXAGON_M2_mpyud_hl_s0
   30840       {Intrinsic::hexagon_M2_mpyud_hl_s1, 20048}, // __builtin_HEXAGON_M2_mpyud_hl_s1
   30841       {Intrinsic::hexagon_M2_mpyud_lh_s0, 20081}, // __builtin_HEXAGON_M2_mpyud_lh_s0
   30842       {Intrinsic::hexagon_M2_mpyud_lh_s1, 20114}, // __builtin_HEXAGON_M2_mpyud_lh_s1
   30843       {Intrinsic::hexagon_M2_mpyud_ll_s0, 20147}, // __builtin_HEXAGON_M2_mpyud_ll_s0
   30844       {Intrinsic::hexagon_M2_mpyud_ll_s1, 20180}, // __builtin_HEXAGON_M2_mpyud_ll_s1
   30845       {Intrinsic::hexagon_M2_mpyud_nac_hh_s0, 20213}, // __builtin_HEXAGON_M2_mpyud_nac_hh_s0
   30846       {Intrinsic::hexagon_M2_mpyud_nac_hh_s1, 20250}, // __builtin_HEXAGON_M2_mpyud_nac_hh_s1
   30847       {Intrinsic::hexagon_M2_mpyud_nac_hl_s0, 20287}, // __builtin_HEXAGON_M2_mpyud_nac_hl_s0
   30848       {Intrinsic::hexagon_M2_mpyud_nac_hl_s1, 20324}, // __builtin_HEXAGON_M2_mpyud_nac_hl_s1
   30849       {Intrinsic::hexagon_M2_mpyud_nac_lh_s0, 20361}, // __builtin_HEXAGON_M2_mpyud_nac_lh_s0
   30850       {Intrinsic::hexagon_M2_mpyud_nac_lh_s1, 20398}, // __builtin_HEXAGON_M2_mpyud_nac_lh_s1
   30851       {Intrinsic::hexagon_M2_mpyud_nac_ll_s0, 20435}, // __builtin_HEXAGON_M2_mpyud_nac_ll_s0
   30852       {Intrinsic::hexagon_M2_mpyud_nac_ll_s1, 20472}, // __builtin_HEXAGON_M2_mpyud_nac_ll_s1
   30853       {Intrinsic::hexagon_M2_mpyui, 20509}, // __builtin_HEXAGON_M2_mpyui
   30854       {Intrinsic::hexagon_M2_nacci, 20536}, // __builtin_HEXAGON_M2_nacci
   30855       {Intrinsic::hexagon_M2_naccii, 20563}, // __builtin_HEXAGON_M2_naccii
   30856       {Intrinsic::hexagon_M2_subacc, 20591}, // __builtin_HEXAGON_M2_subacc
   30857       {Intrinsic::hexagon_M2_vabsdiffh, 20619}, // __builtin_HEXAGON_M2_vabsdiffh
   30858       {Intrinsic::hexagon_M2_vabsdiffw, 20650}, // __builtin_HEXAGON_M2_vabsdiffw
   30859       {Intrinsic::hexagon_M2_vcmac_s0_sat_i, 20681}, // __builtin_HEXAGON_M2_vcmac_s0_sat_i
   30860       {Intrinsic::hexagon_M2_vcmac_s0_sat_r, 20717}, // __builtin_HEXAGON_M2_vcmac_s0_sat_r
   30861       {Intrinsic::hexagon_M2_vcmpy_s0_sat_i, 20753}, // __builtin_HEXAGON_M2_vcmpy_s0_sat_i
   30862       {Intrinsic::hexagon_M2_vcmpy_s0_sat_r, 20789}, // __builtin_HEXAGON_M2_vcmpy_s0_sat_r
   30863       {Intrinsic::hexagon_M2_vcmpy_s1_sat_i, 20825}, // __builtin_HEXAGON_M2_vcmpy_s1_sat_i
   30864       {Intrinsic::hexagon_M2_vcmpy_s1_sat_r, 20861}, // __builtin_HEXAGON_M2_vcmpy_s1_sat_r
   30865       {Intrinsic::hexagon_M2_vdmacs_s0, 20897}, // __builtin_HEXAGON_M2_vdmacs_s0
   30866       {Intrinsic::hexagon_M2_vdmacs_s1, 20928}, // __builtin_HEXAGON_M2_vdmacs_s1
   30867       {Intrinsic::hexagon_M2_vdmpyrs_s0, 20959}, // __builtin_HEXAGON_M2_vdmpyrs_s0
   30868       {Intrinsic::hexagon_M2_vdmpyrs_s1, 20991}, // __builtin_HEXAGON_M2_vdmpyrs_s1
   30869       {Intrinsic::hexagon_M2_vdmpys_s0, 21023}, // __builtin_HEXAGON_M2_vdmpys_s0
   30870       {Intrinsic::hexagon_M2_vdmpys_s1, 21054}, // __builtin_HEXAGON_M2_vdmpys_s1
   30871       {Intrinsic::hexagon_M2_vmac2, 21085}, // __builtin_HEXAGON_M2_vmac2
   30872       {Intrinsic::hexagon_M2_vmac2es, 21112}, // __builtin_HEXAGON_M2_vmac2es
   30873       {Intrinsic::hexagon_M2_vmac2es_s0, 21141}, // __builtin_HEXAGON_M2_vmac2es_s0
   30874       {Intrinsic::hexagon_M2_vmac2es_s1, 21173}, // __builtin_HEXAGON_M2_vmac2es_s1
   30875       {Intrinsic::hexagon_M2_vmac2s_s0, 21205}, // __builtin_HEXAGON_M2_vmac2s_s0
   30876       {Intrinsic::hexagon_M2_vmac2s_s1, 21236}, // __builtin_HEXAGON_M2_vmac2s_s1
   30877       {Intrinsic::hexagon_M2_vmac2su_s0, 21267}, // __builtin_HEXAGON_M2_vmac2su_s0
   30878       {Intrinsic::hexagon_M2_vmac2su_s1, 21299}, // __builtin_HEXAGON_M2_vmac2su_s1
   30879       {Intrinsic::hexagon_M2_vmpy2es_s0, 21331}, // __builtin_HEXAGON_M2_vmpy2es_s0
   30880       {Intrinsic::hexagon_M2_vmpy2es_s1, 21363}, // __builtin_HEXAGON_M2_vmpy2es_s1
   30881       {Intrinsic::hexagon_M2_vmpy2s_s0, 21395}, // __builtin_HEXAGON_M2_vmpy2s_s0
   30882       {Intrinsic::hexagon_M2_vmpy2s_s0pack, 21426}, // __builtin_HEXAGON_M2_vmpy2s_s0pack
   30883       {Intrinsic::hexagon_M2_vmpy2s_s1, 21461}, // __builtin_HEXAGON_M2_vmpy2s_s1
   30884       {Intrinsic::hexagon_M2_vmpy2s_s1pack, 21492}, // __builtin_HEXAGON_M2_vmpy2s_s1pack
   30885       {Intrinsic::hexagon_M2_vmpy2su_s0, 21527}, // __builtin_HEXAGON_M2_vmpy2su_s0
   30886       {Intrinsic::hexagon_M2_vmpy2su_s1, 21559}, // __builtin_HEXAGON_M2_vmpy2su_s1
   30887       {Intrinsic::hexagon_M2_vraddh, 21591}, // __builtin_HEXAGON_M2_vraddh
   30888       {Intrinsic::hexagon_M2_vradduh, 21619}, // __builtin_HEXAGON_M2_vradduh
   30889       {Intrinsic::hexagon_M2_vrcmaci_s0, 21648}, // __builtin_HEXAGON_M2_vrcmaci_s0
   30890       {Intrinsic::hexagon_M2_vrcmaci_s0c, 21680}, // __builtin_HEXAGON_M2_vrcmaci_s0c
   30891       {Intrinsic::hexagon_M2_vrcmacr_s0, 21713}, // __builtin_HEXAGON_M2_vrcmacr_s0
   30892       {Intrinsic::hexagon_M2_vrcmacr_s0c, 21745}, // __builtin_HEXAGON_M2_vrcmacr_s0c
   30893       {Intrinsic::hexagon_M2_vrcmpyi_s0, 21778}, // __builtin_HEXAGON_M2_vrcmpyi_s0
   30894       {Intrinsic::hexagon_M2_vrcmpyi_s0c, 21810}, // __builtin_HEXAGON_M2_vrcmpyi_s0c
   30895       {Intrinsic::hexagon_M2_vrcmpyr_s0, 21843}, // __builtin_HEXAGON_M2_vrcmpyr_s0
   30896       {Intrinsic::hexagon_M2_vrcmpyr_s0c, 21875}, // __builtin_HEXAGON_M2_vrcmpyr_s0c
   30897       {Intrinsic::hexagon_M2_vrcmpys_acc_s1, 21908}, // __builtin_HEXAGON_M2_vrcmpys_acc_s1
   30898       {Intrinsic::hexagon_M2_vrcmpys_s1, 21944}, // __builtin_HEXAGON_M2_vrcmpys_s1
   30899       {Intrinsic::hexagon_M2_vrcmpys_s1rp, 21976}, // __builtin_HEXAGON_M2_vrcmpys_s1rp
   30900       {Intrinsic::hexagon_M2_vrmac_s0, 22010}, // __builtin_HEXAGON_M2_vrmac_s0
   30901       {Intrinsic::hexagon_M2_vrmpy_s0, 22040}, // __builtin_HEXAGON_M2_vrmpy_s0
   30902       {Intrinsic::hexagon_M2_xor_xacc, 22070}, // __builtin_HEXAGON_M2_xor_xacc
   30903       {Intrinsic::hexagon_M4_and_and, 22100}, // __builtin_HEXAGON_M4_and_and
   30904       {Intrinsic::hexagon_M4_and_andn, 22129}, // __builtin_HEXAGON_M4_and_andn
   30905       {Intrinsic::hexagon_M4_and_or, 22159}, // __builtin_HEXAGON_M4_and_or
   30906       {Intrinsic::hexagon_M4_and_xor, 22187}, // __builtin_HEXAGON_M4_and_xor
   30907       {Intrinsic::hexagon_M4_cmpyi_wh, 22216}, // __builtin_HEXAGON_M4_cmpyi_wh
   30908       {Intrinsic::hexagon_M4_cmpyi_whc, 22246}, // __builtin_HEXAGON_M4_cmpyi_whc
   30909       {Intrinsic::hexagon_M4_cmpyr_wh, 22277}, // __builtin_HEXAGON_M4_cmpyr_wh
   30910       {Intrinsic::hexagon_M4_cmpyr_whc, 22307}, // __builtin_HEXAGON_M4_cmpyr_whc
   30911       {Intrinsic::hexagon_M4_mac_up_s1_sat, 22338}, // __builtin_HEXAGON_M4_mac_up_s1_sat
   30912       {Intrinsic::hexagon_M4_mpyri_addi, 22373}, // __builtin_HEXAGON_M4_mpyri_addi
   30913       {Intrinsic::hexagon_M4_mpyri_addr, 22405}, // __builtin_HEXAGON_M4_mpyri_addr
   30914       {Intrinsic::hexagon_M4_mpyri_addr_u2, 22437}, // __builtin_HEXAGON_M4_mpyri_addr_u2
   30915       {Intrinsic::hexagon_M4_mpyrr_addi, 22472}, // __builtin_HEXAGON_M4_mpyrr_addi
   30916       {Intrinsic::hexagon_M4_mpyrr_addr, 22504}, // __builtin_HEXAGON_M4_mpyrr_addr
   30917       {Intrinsic::hexagon_M4_nac_up_s1_sat, 22536}, // __builtin_HEXAGON_M4_nac_up_s1_sat
   30918       {Intrinsic::hexagon_M4_or_and, 22571}, // __builtin_HEXAGON_M4_or_and
   30919       {Intrinsic::hexagon_M4_or_andn, 22599}, // __builtin_HEXAGON_M4_or_andn
   30920       {Intrinsic::hexagon_M4_or_or, 22628}, // __builtin_HEXAGON_M4_or_or
   30921       {Intrinsic::hexagon_M4_or_xor, 22655}, // __builtin_HEXAGON_M4_or_xor
   30922       {Intrinsic::hexagon_M4_pmpyw, 22683}, // __builtin_HEXAGON_M4_pmpyw
   30923       {Intrinsic::hexagon_M4_pmpyw_acc, 22710}, // __builtin_HEXAGON_M4_pmpyw_acc
   30924       {Intrinsic::hexagon_M4_vpmpyh, 22741}, // __builtin_HEXAGON_M4_vpmpyh
   30925       {Intrinsic::hexagon_M4_vpmpyh_acc, 22769}, // __builtin_HEXAGON_M4_vpmpyh_acc
   30926       {Intrinsic::hexagon_M4_vrmpyeh_acc_s0, 22801}, // __builtin_HEXAGON_M4_vrmpyeh_acc_s0
   30927       {Intrinsic::hexagon_M4_vrmpyeh_acc_s1, 22837}, // __builtin_HEXAGON_M4_vrmpyeh_acc_s1
   30928       {Intrinsic::hexagon_M4_vrmpyeh_s0, 22873}, // __builtin_HEXAGON_M4_vrmpyeh_s0
   30929       {Intrinsic::hexagon_M4_vrmpyeh_s1, 22905}, // __builtin_HEXAGON_M4_vrmpyeh_s1
   30930       {Intrinsic::hexagon_M4_vrmpyoh_acc_s0, 22937}, // __builtin_HEXAGON_M4_vrmpyoh_acc_s0
   30931       {Intrinsic::hexagon_M4_vrmpyoh_acc_s1, 22973}, // __builtin_HEXAGON_M4_vrmpyoh_acc_s1
   30932       {Intrinsic::hexagon_M4_vrmpyoh_s0, 23009}, // __builtin_HEXAGON_M4_vrmpyoh_s0
   30933       {Intrinsic::hexagon_M4_vrmpyoh_s1, 23041}, // __builtin_HEXAGON_M4_vrmpyoh_s1
   30934       {Intrinsic::hexagon_M4_xor_and, 23073}, // __builtin_HEXAGON_M4_xor_and
   30935       {Intrinsic::hexagon_M4_xor_andn, 23102}, // __builtin_HEXAGON_M4_xor_andn
   30936       {Intrinsic::hexagon_M4_xor_or, 23132}, // __builtin_HEXAGON_M4_xor_or
   30937       {Intrinsic::hexagon_M4_xor_xacc, 23160}, // __builtin_HEXAGON_M4_xor_xacc
   30938       {Intrinsic::hexagon_M5_vdmacbsu, 23190}, // __builtin_HEXAGON_M5_vdmacbsu
   30939       {Intrinsic::hexagon_M5_vdmpybsu, 23220}, // __builtin_HEXAGON_M5_vdmpybsu
   30940       {Intrinsic::hexagon_M5_vmacbsu, 23250}, // __builtin_HEXAGON_M5_vmacbsu
   30941       {Intrinsic::hexagon_M5_vmacbuu, 23279}, // __builtin_HEXAGON_M5_vmacbuu
   30942       {Intrinsic::hexagon_M5_vmpybsu, 23308}, // __builtin_HEXAGON_M5_vmpybsu
   30943       {Intrinsic::hexagon_M5_vmpybuu, 23337}, // __builtin_HEXAGON_M5_vmpybuu
   30944       {Intrinsic::hexagon_M5_vrmacbsu, 23366}, // __builtin_HEXAGON_M5_vrmacbsu
   30945       {Intrinsic::hexagon_M5_vrmacbuu, 23396}, // __builtin_HEXAGON_M5_vrmacbuu
   30946       {Intrinsic::hexagon_M5_vrmpybsu, 23426}, // __builtin_HEXAGON_M5_vrmpybsu
   30947       {Intrinsic::hexagon_M5_vrmpybuu, 23456}, // __builtin_HEXAGON_M5_vrmpybuu
   30948       {Intrinsic::hexagon_M6_vabsdiffb, 23486}, // __builtin_HEXAGON_M6_vabsdiffb
   30949       {Intrinsic::hexagon_M6_vabsdiffub, 23517}, // __builtin_HEXAGON_M6_vabsdiffub
   30950       {Intrinsic::hexagon_S2_addasl_rrri, 23549}, // __builtin_HEXAGON_S2_addasl_rrri
   30951       {Intrinsic::hexagon_S2_asl_i_p, 23582}, // __builtin_HEXAGON_S2_asl_i_p
   30952       {Intrinsic::hexagon_S2_asl_i_p_acc, 23611}, // __builtin_HEXAGON_S2_asl_i_p_acc
   30953       {Intrinsic::hexagon_S2_asl_i_p_and, 23644}, // __builtin_HEXAGON_S2_asl_i_p_and
   30954       {Intrinsic::hexagon_S2_asl_i_p_nac, 23677}, // __builtin_HEXAGON_S2_asl_i_p_nac
   30955       {Intrinsic::hexagon_S2_asl_i_p_or, 23710}, // __builtin_HEXAGON_S2_asl_i_p_or
   30956       {Intrinsic::hexagon_S2_asl_i_p_xacc, 23742}, // __builtin_HEXAGON_S2_asl_i_p_xacc
   30957       {Intrinsic::hexagon_S2_asl_i_r, 23776}, // __builtin_HEXAGON_S2_asl_i_r
   30958       {Intrinsic::hexagon_S2_asl_i_r_acc, 23805}, // __builtin_HEXAGON_S2_asl_i_r_acc
   30959       {Intrinsic::hexagon_S2_asl_i_r_and, 23838}, // __builtin_HEXAGON_S2_asl_i_r_and
   30960       {Intrinsic::hexagon_S2_asl_i_r_nac, 23871}, // __builtin_HEXAGON_S2_asl_i_r_nac
   30961       {Intrinsic::hexagon_S2_asl_i_r_or, 23904}, // __builtin_HEXAGON_S2_asl_i_r_or
   30962       {Intrinsic::hexagon_S2_asl_i_r_sat, 23936}, // __builtin_HEXAGON_S2_asl_i_r_sat
   30963       {Intrinsic::hexagon_S2_asl_i_r_xacc, 23969}, // __builtin_HEXAGON_S2_asl_i_r_xacc
   30964       {Intrinsic::hexagon_S2_asl_i_vh, 24003}, // __builtin_HEXAGON_S2_asl_i_vh
   30965       {Intrinsic::hexagon_S2_asl_i_vw, 24033}, // __builtin_HEXAGON_S2_asl_i_vw
   30966       {Intrinsic::hexagon_S2_asl_r_p, 24063}, // __builtin_HEXAGON_S2_asl_r_p
   30967       {Intrinsic::hexagon_S2_asl_r_p_acc, 24092}, // __builtin_HEXAGON_S2_asl_r_p_acc
   30968       {Intrinsic::hexagon_S2_asl_r_p_and, 24125}, // __builtin_HEXAGON_S2_asl_r_p_and
   30969       {Intrinsic::hexagon_S2_asl_r_p_nac, 24158}, // __builtin_HEXAGON_S2_asl_r_p_nac
   30970       {Intrinsic::hexagon_S2_asl_r_p_or, 24191}, // __builtin_HEXAGON_S2_asl_r_p_or
   30971       {Intrinsic::hexagon_S2_asl_r_p_xor, 24223}, // __builtin_HEXAGON_S2_asl_r_p_xor
   30972       {Intrinsic::hexagon_S2_asl_r_r, 24256}, // __builtin_HEXAGON_S2_asl_r_r
   30973       {Intrinsic::hexagon_S2_asl_r_r_acc, 24285}, // __builtin_HEXAGON_S2_asl_r_r_acc
   30974       {Intrinsic::hexagon_S2_asl_r_r_and, 24318}, // __builtin_HEXAGON_S2_asl_r_r_and
   30975       {Intrinsic::hexagon_S2_asl_r_r_nac, 24351}, // __builtin_HEXAGON_S2_asl_r_r_nac
   30976       {Intrinsic::hexagon_S2_asl_r_r_or, 24384}, // __builtin_HEXAGON_S2_asl_r_r_or
   30977       {Intrinsic::hexagon_S2_asl_r_r_sat, 24416}, // __builtin_HEXAGON_S2_asl_r_r_sat
   30978       {Intrinsic::hexagon_S2_asl_r_vh, 24449}, // __builtin_HEXAGON_S2_asl_r_vh
   30979       {Intrinsic::hexagon_S2_asl_r_vw, 24479}, // __builtin_HEXAGON_S2_asl_r_vw
   30980       {Intrinsic::hexagon_S2_asr_i_p, 24509}, // __builtin_HEXAGON_S2_asr_i_p
   30981       {Intrinsic::hexagon_S2_asr_i_p_acc, 24538}, // __builtin_HEXAGON_S2_asr_i_p_acc
   30982       {Intrinsic::hexagon_S2_asr_i_p_and, 24571}, // __builtin_HEXAGON_S2_asr_i_p_and
   30983       {Intrinsic::hexagon_S2_asr_i_p_nac, 24604}, // __builtin_HEXAGON_S2_asr_i_p_nac
   30984       {Intrinsic::hexagon_S2_asr_i_p_or, 24637}, // __builtin_HEXAGON_S2_asr_i_p_or
   30985       {Intrinsic::hexagon_S2_asr_i_p_rnd, 24669}, // __builtin_HEXAGON_S2_asr_i_p_rnd
   30986       {Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax, 24702}, // __builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax
   30987       {Intrinsic::hexagon_S2_asr_i_r, 24746}, // __builtin_HEXAGON_S2_asr_i_r
   30988       {Intrinsic::hexagon_S2_asr_i_r_acc, 24775}, // __builtin_HEXAGON_S2_asr_i_r_acc
   30989       {Intrinsic::hexagon_S2_asr_i_r_and, 24808}, // __builtin_HEXAGON_S2_asr_i_r_and
   30990       {Intrinsic::hexagon_S2_asr_i_r_nac, 24841}, // __builtin_HEXAGON_S2_asr_i_r_nac
   30991       {Intrinsic::hexagon_S2_asr_i_r_or, 24874}, // __builtin_HEXAGON_S2_asr_i_r_or
   30992       {Intrinsic::hexagon_S2_asr_i_r_rnd, 24906}, // __builtin_HEXAGON_S2_asr_i_r_rnd
   30993       {Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax, 24939}, // __builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax
   30994       {Intrinsic::hexagon_S2_asr_i_svw_trun, 24983}, // __builtin_HEXAGON_S2_asr_i_svw_trun
   30995       {Intrinsic::hexagon_S2_asr_i_vh, 25019}, // __builtin_HEXAGON_S2_asr_i_vh
   30996       {Intrinsic::hexagon_S2_asr_i_vw, 25049}, // __builtin_HEXAGON_S2_asr_i_vw
   30997       {Intrinsic::hexagon_S2_asr_r_p, 25079}, // __builtin_HEXAGON_S2_asr_r_p
   30998       {Intrinsic::hexagon_S2_asr_r_p_acc, 25108}, // __builtin_HEXAGON_S2_asr_r_p_acc
   30999       {Intrinsic::hexagon_S2_asr_r_p_and, 25141}, // __builtin_HEXAGON_S2_asr_r_p_and
   31000       {Intrinsic::hexagon_S2_asr_r_p_nac, 25174}, // __builtin_HEXAGON_S2_asr_r_p_nac
   31001       {Intrinsic::hexagon_S2_asr_r_p_or, 25207}, // __builtin_HEXAGON_S2_asr_r_p_or
   31002       {Intrinsic::hexagon_S2_asr_r_p_xor, 25239}, // __builtin_HEXAGON_S2_asr_r_p_xor
   31003       {Intrinsic::hexagon_S2_asr_r_r, 25272}, // __builtin_HEXAGON_S2_asr_r_r
   31004       {Intrinsic::hexagon_S2_asr_r_r_acc, 25301}, // __builtin_HEXAGON_S2_asr_r_r_acc
   31005       {Intrinsic::hexagon_S2_asr_r_r_and, 25334}, // __builtin_HEXAGON_S2_asr_r_r_and
   31006       {Intrinsic::hexagon_S2_asr_r_r_nac, 25367}, // __builtin_HEXAGON_S2_asr_r_r_nac
   31007       {Intrinsic::hexagon_S2_asr_r_r_or, 25400}, // __builtin_HEXAGON_S2_asr_r_r_or
   31008       {Intrinsic::hexagon_S2_asr_r_r_sat, 25432}, // __builtin_HEXAGON_S2_asr_r_r_sat
   31009       {Intrinsic::hexagon_S2_asr_r_svw_trun, 25465}, // __builtin_HEXAGON_S2_asr_r_svw_trun
   31010       {Intrinsic::hexagon_S2_asr_r_vh, 25501}, // __builtin_HEXAGON_S2_asr_r_vh
   31011       {Intrinsic::hexagon_S2_asr_r_vw, 25531}, // __builtin_HEXAGON_S2_asr_r_vw
   31012       {Intrinsic::hexagon_S2_brev, 25561}, // __builtin_HEXAGON_S2_brev
   31013       {Intrinsic::hexagon_S2_brevp, 25587}, // __builtin_HEXAGON_S2_brevp
   31014       {Intrinsic::hexagon_S2_cabacencbin, 25614}, // __builtin_HEXAGON_S2_cabacencbin
   31015       {Intrinsic::hexagon_S2_cl0, 25647}, // __builtin_HEXAGON_S2_cl0
   31016       {Intrinsic::hexagon_S2_cl0p, 25672}, // __builtin_HEXAGON_S2_cl0p
   31017       {Intrinsic::hexagon_S2_cl1, 25698}, // __builtin_HEXAGON_S2_cl1
   31018       {Intrinsic::hexagon_S2_cl1p, 25723}, // __builtin_HEXAGON_S2_cl1p
   31019       {Intrinsic::hexagon_S2_clb, 25749}, // __builtin_HEXAGON_S2_clb
   31020       {Intrinsic::hexagon_S2_clbnorm, 25774}, // __builtin_HEXAGON_S2_clbnorm
   31021       {Intrinsic::hexagon_S2_clbp, 25803}, // __builtin_HEXAGON_S2_clbp
   31022       {Intrinsic::hexagon_S2_clrbit_i, 25829}, // __builtin_HEXAGON_S2_clrbit_i
   31023       {Intrinsic::hexagon_S2_clrbit_r, 25859}, // __builtin_HEXAGON_S2_clrbit_r
   31024       {Intrinsic::hexagon_S2_ct0, 25889}, // __builtin_HEXAGON_S2_ct0
   31025       {Intrinsic::hexagon_S2_ct0p, 25914}, // __builtin_HEXAGON_S2_ct0p
   31026       {Intrinsic::hexagon_S2_ct1, 25940}, // __builtin_HEXAGON_S2_ct1
   31027       {Intrinsic::hexagon_S2_ct1p, 25965}, // __builtin_HEXAGON_S2_ct1p
   31028       {Intrinsic::hexagon_S2_deinterleave, 25991}, // __builtin_HEXAGON_S2_deinterleave
   31029       {Intrinsic::hexagon_S2_extractu, 26025}, // __builtin_HEXAGON_S2_extractu
   31030       {Intrinsic::hexagon_S2_extractu_rp, 26055}, // __builtin_HEXAGON_S2_extractu_rp
   31031       {Intrinsic::hexagon_S2_extractup, 26088}, // __builtin_HEXAGON_S2_extractup
   31032       {Intrinsic::hexagon_S2_extractup_rp, 26119}, // __builtin_HEXAGON_S2_extractup_rp
   31033       {Intrinsic::hexagon_S2_insert, 26153}, // __builtin_HEXAGON_S2_insert
   31034       {Intrinsic::hexagon_S2_insert_rp, 26181}, // __builtin_HEXAGON_S2_insert_rp
   31035       {Intrinsic::hexagon_S2_insertp, 26212}, // __builtin_HEXAGON_S2_insertp
   31036       {Intrinsic::hexagon_S2_insertp_rp, 26241}, // __builtin_HEXAGON_S2_insertp_rp
   31037       {Intrinsic::hexagon_S2_interleave, 26273}, // __builtin_HEXAGON_S2_interleave
   31038       {Intrinsic::hexagon_S2_lfsp, 26305}, // __builtin_HEXAGON_S2_lfsp
   31039       {Intrinsic::hexagon_S2_lsl_r_p, 26331}, // __builtin_HEXAGON_S2_lsl_r_p
   31040       {Intrinsic::hexagon_S2_lsl_r_p_acc, 26360}, // __builtin_HEXAGON_S2_lsl_r_p_acc
   31041       {Intrinsic::hexagon_S2_lsl_r_p_and, 26393}, // __builtin_HEXAGON_S2_lsl_r_p_and
   31042       {Intrinsic::hexagon_S2_lsl_r_p_nac, 26426}, // __builtin_HEXAGON_S2_lsl_r_p_nac
   31043       {Intrinsic::hexagon_S2_lsl_r_p_or, 26459}, // __builtin_HEXAGON_S2_lsl_r_p_or
   31044       {Intrinsic::hexagon_S2_lsl_r_p_xor, 26491}, // __builtin_HEXAGON_S2_lsl_r_p_xor
   31045       {Intrinsic::hexagon_S2_lsl_r_r, 26524}, // __builtin_HEXAGON_S2_lsl_r_r
   31046       {Intrinsic::hexagon_S2_lsl_r_r_acc, 26553}, // __builtin_HEXAGON_S2_lsl_r_r_acc
   31047       {Intrinsic::hexagon_S2_lsl_r_r_and, 26586}, // __builtin_HEXAGON_S2_lsl_r_r_and
   31048       {Intrinsic::hexagon_S2_lsl_r_r_nac, 26619}, // __builtin_HEXAGON_S2_lsl_r_r_nac
   31049       {Intrinsic::hexagon_S2_lsl_r_r_or, 26652}, // __builtin_HEXAGON_S2_lsl_r_r_or
   31050       {Intrinsic::hexagon_S2_lsl_r_vh, 26684}, // __builtin_HEXAGON_S2_lsl_r_vh
   31051       {Intrinsic::hexagon_S2_lsl_r_vw, 26714}, // __builtin_HEXAGON_S2_lsl_r_vw
   31052       {Intrinsic::hexagon_S2_lsr_i_p, 26744}, // __builtin_HEXAGON_S2_lsr_i_p
   31053       {Intrinsic::hexagon_S2_lsr_i_p_acc, 26773}, // __builtin_HEXAGON_S2_lsr_i_p_acc
   31054       {Intrinsic::hexagon_S2_lsr_i_p_and, 26806}, // __builtin_HEXAGON_S2_lsr_i_p_and
   31055       {Intrinsic::hexagon_S2_lsr_i_p_nac, 26839}, // __builtin_HEXAGON_S2_lsr_i_p_nac
   31056       {Intrinsic::hexagon_S2_lsr_i_p_or, 26872}, // __builtin_HEXAGON_S2_lsr_i_p_or
   31057       {Intrinsic::hexagon_S2_lsr_i_p_xacc, 26904}, // __builtin_HEXAGON_S2_lsr_i_p_xacc
   31058       {Intrinsic::hexagon_S2_lsr_i_r, 26938}, // __builtin_HEXAGON_S2_lsr_i_r
   31059       {Intrinsic::hexagon_S2_lsr_i_r_acc, 26967}, // __builtin_HEXAGON_S2_lsr_i_r_acc
   31060       {Intrinsic::hexagon_S2_lsr_i_r_and, 27000}, // __builtin_HEXAGON_S2_lsr_i_r_and
   31061       {Intrinsic::hexagon_S2_lsr_i_r_nac, 27033}, // __builtin_HEXAGON_S2_lsr_i_r_nac
   31062       {Intrinsic::hexagon_S2_lsr_i_r_or, 27066}, // __builtin_HEXAGON_S2_lsr_i_r_or
   31063       {Intrinsic::hexagon_S2_lsr_i_r_xacc, 27098}, // __builtin_HEXAGON_S2_lsr_i_r_xacc
   31064       {Intrinsic::hexagon_S2_lsr_i_vh, 27132}, // __builtin_HEXAGON_S2_lsr_i_vh
   31065       {Intrinsic::hexagon_S2_lsr_i_vw, 27162}, // __builtin_HEXAGON_S2_lsr_i_vw
   31066       {Intrinsic::hexagon_S2_lsr_r_p, 27192}, // __builtin_HEXAGON_S2_lsr_r_p
   31067       {Intrinsic::hexagon_S2_lsr_r_p_acc, 27221}, // __builtin_HEXAGON_S2_lsr_r_p_acc
   31068       {Intrinsic::hexagon_S2_lsr_r_p_and, 27254}, // __builtin_HEXAGON_S2_lsr_r_p_and
   31069       {Intrinsic::hexagon_S2_lsr_r_p_nac, 27287}, // __builtin_HEXAGON_S2_lsr_r_p_nac
   31070       {Intrinsic::hexagon_S2_lsr_r_p_or, 27320}, // __builtin_HEXAGON_S2_lsr_r_p_or
   31071       {Intrinsic::hexagon_S2_lsr_r_p_xor, 27352}, // __builtin_HEXAGON_S2_lsr_r_p_xor
   31072       {Intrinsic::hexagon_S2_lsr_r_r, 27385}, // __builtin_HEXAGON_S2_lsr_r_r
   31073       {Intrinsic::hexagon_S2_lsr_r_r_acc, 27414}, // __builtin_HEXAGON_S2_lsr_r_r_acc
   31074       {Intrinsic::hexagon_S2_lsr_r_r_and, 27447}, // __builtin_HEXAGON_S2_lsr_r_r_and
   31075       {Intrinsic::hexagon_S2_lsr_r_r_nac, 27480}, // __builtin_HEXAGON_S2_lsr_r_r_nac
   31076       {Intrinsic::hexagon_S2_lsr_r_r_or, 27513}, // __builtin_HEXAGON_S2_lsr_r_r_or
   31077       {Intrinsic::hexagon_S2_lsr_r_vh, 27545}, // __builtin_HEXAGON_S2_lsr_r_vh
   31078       {Intrinsic::hexagon_S2_lsr_r_vw, 27575}, // __builtin_HEXAGON_S2_lsr_r_vw
   31079       {Intrinsic::hexagon_S2_packhl, 27605}, // __builtin_HEXAGON_S2_packhl
   31080       {Intrinsic::hexagon_S2_parityp, 27633}, // __builtin_HEXAGON_S2_parityp
   31081       {Intrinsic::hexagon_S2_setbit_i, 27662}, // __builtin_HEXAGON_S2_setbit_i
   31082       {Intrinsic::hexagon_S2_setbit_r, 27692}, // __builtin_HEXAGON_S2_setbit_r
   31083       {Intrinsic::hexagon_S2_shuffeb, 27722}, // __builtin_HEXAGON_S2_shuffeb
   31084       {Intrinsic::hexagon_S2_shuffeh, 27751}, // __builtin_HEXAGON_S2_shuffeh
   31085       {Intrinsic::hexagon_S2_shuffob, 27780}, // __builtin_HEXAGON_S2_shuffob
   31086       {Intrinsic::hexagon_S2_shuffoh, 27809}, // __builtin_HEXAGON_S2_shuffoh
   31087       {Intrinsic::hexagon_S2_storew_locked, 27838}, // __builtin_HEXAGON_S2_storew_locked
   31088       {Intrinsic::hexagon_S2_svsathb, 27873}, // __builtin_HEXAGON_S2_svsathb
   31089       {Intrinsic::hexagon_S2_svsathub, 27902}, // __builtin_HEXAGON_S2_svsathub
   31090       {Intrinsic::hexagon_S2_tableidxb_goodsyntax, 27932}, // __builtin_HEXAGON_S2_tableidxb_goodsyntax
   31091       {Intrinsic::hexagon_S2_tableidxd_goodsyntax, 27974}, // __builtin_HEXAGON_S2_tableidxd_goodsyntax
   31092       {Intrinsic::hexagon_S2_tableidxh_goodsyntax, 28016}, // __builtin_HEXAGON_S2_tableidxh_goodsyntax
   31093       {Intrinsic::hexagon_S2_tableidxw_goodsyntax, 28058}, // __builtin_HEXAGON_S2_tableidxw_goodsyntax
   31094       {Intrinsic::hexagon_S2_togglebit_i, 28100}, // __builtin_HEXAGON_S2_togglebit_i
   31095       {Intrinsic::hexagon_S2_togglebit_r, 28133}, // __builtin_HEXAGON_S2_togglebit_r
   31096       {Intrinsic::hexagon_S2_tstbit_i, 28166}, // __builtin_HEXAGON_S2_tstbit_i
   31097       {Intrinsic::hexagon_S2_tstbit_r, 28196}, // __builtin_HEXAGON_S2_tstbit_r
   31098       {Intrinsic::hexagon_S2_valignib, 28226}, // __builtin_HEXAGON_S2_valignib
   31099       {Intrinsic::hexagon_S2_valignrb, 28256}, // __builtin_HEXAGON_S2_valignrb
   31100       {Intrinsic::hexagon_S2_vcnegh, 28286}, // __builtin_HEXAGON_S2_vcnegh
   31101       {Intrinsic::hexagon_S2_vcrotate, 28314}, // __builtin_HEXAGON_S2_vcrotate
   31102       {Intrinsic::hexagon_S2_vrcnegh, 28344}, // __builtin_HEXAGON_S2_vrcnegh
   31103       {Intrinsic::hexagon_S2_vrndpackwh, 28373}, // __builtin_HEXAGON_S2_vrndpackwh
   31104       {Intrinsic::hexagon_S2_vrndpackwhs, 28405}, // __builtin_HEXAGON_S2_vrndpackwhs
   31105       {Intrinsic::hexagon_S2_vsathb, 28438}, // __builtin_HEXAGON_S2_vsathb
   31106       {Intrinsic::hexagon_S2_vsathb_nopack, 28466}, // __builtin_HEXAGON_S2_vsathb_nopack
   31107       {Intrinsic::hexagon_S2_vsathub, 28501}, // __builtin_HEXAGON_S2_vsathub
   31108       {Intrinsic::hexagon_S2_vsathub_nopack, 28530}, // __builtin_HEXAGON_S2_vsathub_nopack
   31109       {Intrinsic::hexagon_S2_vsatwh, 28566}, // __builtin_HEXAGON_S2_vsatwh
   31110       {Intrinsic::hexagon_S2_vsatwh_nopack, 28594}, // __builtin_HEXAGON_S2_vsatwh_nopack
   31111       {Intrinsic::hexagon_S2_vsatwuh, 28629}, // __builtin_HEXAGON_S2_vsatwuh
   31112       {Intrinsic::hexagon_S2_vsatwuh_nopack, 28658}, // __builtin_HEXAGON_S2_vsatwuh_nopack
   31113       {Intrinsic::hexagon_S2_vsplatrb, 28694}, // __builtin_HEXAGON_S2_vsplatrb
   31114       {Intrinsic::hexagon_S2_vsplatrh, 28724}, // __builtin_HEXAGON_S2_vsplatrh
   31115       {Intrinsic::hexagon_S2_vspliceib, 28754}, // __builtin_HEXAGON_S2_vspliceib
   31116       {Intrinsic::hexagon_S2_vsplicerb, 28785}, // __builtin_HEXAGON_S2_vsplicerb
   31117       {Intrinsic::hexagon_S2_vsxtbh, 28816}, // __builtin_HEXAGON_S2_vsxtbh
   31118       {Intrinsic::hexagon_S2_vsxthw, 28844}, // __builtin_HEXAGON_S2_vsxthw
   31119       {Intrinsic::hexagon_S2_vtrunehb, 28872}, // __builtin_HEXAGON_S2_vtrunehb
   31120       {Intrinsic::hexagon_S2_vtrunewh, 28902}, // __builtin_HEXAGON_S2_vtrunewh
   31121       {Intrinsic::hexagon_S2_vtrunohb, 28932}, // __builtin_HEXAGON_S2_vtrunohb
   31122       {Intrinsic::hexagon_S2_vtrunowh, 28962}, // __builtin_HEXAGON_S2_vtrunowh
   31123       {Intrinsic::hexagon_S2_vzxtbh, 28992}, // __builtin_HEXAGON_S2_vzxtbh
   31124       {Intrinsic::hexagon_S2_vzxthw, 29020}, // __builtin_HEXAGON_S2_vzxthw
   31125       {Intrinsic::hexagon_S4_addaddi, 29048}, // __builtin_HEXAGON_S4_addaddi
   31126       {Intrinsic::hexagon_S4_addi_asl_ri, 29077}, // __builtin_HEXAGON_S4_addi_asl_ri
   31127       {Intrinsic::hexagon_S4_addi_lsr_ri, 29110}, // __builtin_HEXAGON_S4_addi_lsr_ri
   31128       {Intrinsic::hexagon_S4_andi_asl_ri, 29143}, // __builtin_HEXAGON_S4_andi_asl_ri
   31129       {Intrinsic::hexagon_S4_andi_lsr_ri, 29176}, // __builtin_HEXAGON_S4_andi_lsr_ri
   31130       {Intrinsic::hexagon_S4_clbaddi, 29209}, // __builtin_HEXAGON_S4_clbaddi
   31131       {Intrinsic::hexagon_S4_clbpaddi, 29238}, // __builtin_HEXAGON_S4_clbpaddi
   31132       {Intrinsic::hexagon_S4_clbpnorm, 29268}, // __builtin_HEXAGON_S4_clbpnorm
   31133       {Intrinsic::hexagon_S4_extract, 29298}, // __builtin_HEXAGON_S4_extract
   31134       {Intrinsic::hexagon_S4_extract_rp, 29327}, // __builtin_HEXAGON_S4_extract_rp
   31135       {Intrinsic::hexagon_S4_extractp, 29359}, // __builtin_HEXAGON_S4_extractp
   31136       {Intrinsic::hexagon_S4_extractp_rp, 29389}, // __builtin_HEXAGON_S4_extractp_rp
   31137       {Intrinsic::hexagon_S4_lsli, 29422}, // __builtin_HEXAGON_S4_lsli
   31138       {Intrinsic::hexagon_S4_ntstbit_i, 29448}, // __builtin_HEXAGON_S4_ntstbit_i
   31139       {Intrinsic::hexagon_S4_ntstbit_r, 29479}, // __builtin_HEXAGON_S4_ntstbit_r
   31140       {Intrinsic::hexagon_S4_or_andi, 29510}, // __builtin_HEXAGON_S4_or_andi
   31141       {Intrinsic::hexagon_S4_or_andix, 29539}, // __builtin_HEXAGON_S4_or_andix
   31142       {Intrinsic::hexagon_S4_or_ori, 29569}, // __builtin_HEXAGON_S4_or_ori
   31143       {Intrinsic::hexagon_S4_ori_asl_ri, 29597}, // __builtin_HEXAGON_S4_ori_asl_ri
   31144       {Intrinsic::hexagon_S4_ori_lsr_ri, 29629}, // __builtin_HEXAGON_S4_ori_lsr_ri
   31145       {Intrinsic::hexagon_S4_parity, 29661}, // __builtin_HEXAGON_S4_parity
   31146       {Intrinsic::hexagon_S4_stored_locked, 29689}, // __builtin_HEXAGON_S4_stored_locked
   31147       {Intrinsic::hexagon_S4_subaddi, 29724}, // __builtin_HEXAGON_S4_subaddi
   31148       {Intrinsic::hexagon_S4_subi_asl_ri, 29753}, // __builtin_HEXAGON_S4_subi_asl_ri
   31149       {Intrinsic::hexagon_S4_subi_lsr_ri, 29786}, // __builtin_HEXAGON_S4_subi_lsr_ri
   31150       {Intrinsic::hexagon_S4_vrcrotate, 29819}, // __builtin_HEXAGON_S4_vrcrotate
   31151       {Intrinsic::hexagon_S4_vrcrotate_acc, 29850}, // __builtin_HEXAGON_S4_vrcrotate_acc
   31152       {Intrinsic::hexagon_S4_vxaddsubh, 29885}, // __builtin_HEXAGON_S4_vxaddsubh
   31153       {Intrinsic::hexagon_S4_vxaddsubhr, 29916}, // __builtin_HEXAGON_S4_vxaddsubhr
   31154       {Intrinsic::hexagon_S4_vxaddsubw, 29948}, // __builtin_HEXAGON_S4_vxaddsubw
   31155       {Intrinsic::hexagon_S4_vxsubaddh, 29979}, // __builtin_HEXAGON_S4_vxsubaddh
   31156       {Intrinsic::hexagon_S4_vxsubaddhr, 30010}, // __builtin_HEXAGON_S4_vxsubaddhr
   31157       {Intrinsic::hexagon_S4_vxsubaddw, 30042}, // __builtin_HEXAGON_S4_vxsubaddw
   31158       {Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax, 30073}, // __builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax
   31159       {Intrinsic::hexagon_S5_asrhub_sat, 30120}, // __builtin_HEXAGON_S5_asrhub_sat
   31160       {Intrinsic::hexagon_S5_popcountp, 30152}, // __builtin_HEXAGON_S5_popcountp
   31161       {Intrinsic::hexagon_S5_vasrhrnd_goodsyntax, 30183}, // __builtin_HEXAGON_S5_vasrhrnd_goodsyntax
   31162       {Intrinsic::hexagon_S6_rol_i_p, 30224}, // __builtin_HEXAGON_S6_rol_i_p
   31163       {Intrinsic::hexagon_S6_rol_i_p_acc, 30253}, // __builtin_HEXAGON_S6_rol_i_p_acc
   31164       {Intrinsic::hexagon_S6_rol_i_p_and, 30286}, // __builtin_HEXAGON_S6_rol_i_p_and
   31165       {Intrinsic::hexagon_S6_rol_i_p_nac, 30319}, // __builtin_HEXAGON_S6_rol_i_p_nac
   31166       {Intrinsic::hexagon_S6_rol_i_p_or, 30352}, // __builtin_HEXAGON_S6_rol_i_p_or
   31167       {Intrinsic::hexagon_S6_rol_i_p_xacc, 30384}, // __builtin_HEXAGON_S6_rol_i_p_xacc
   31168       {Intrinsic::hexagon_S6_rol_i_r, 30418}, // __builtin_HEXAGON_S6_rol_i_r
   31169       {Intrinsic::hexagon_S6_rol_i_r_acc, 30447}, // __builtin_HEXAGON_S6_rol_i_r_acc
   31170       {Intrinsic::hexagon_S6_rol_i_r_and, 30480}, // __builtin_HEXAGON_S6_rol_i_r_and
   31171       {Intrinsic::hexagon_S6_rol_i_r_nac, 30513}, // __builtin_HEXAGON_S6_rol_i_r_nac
   31172       {Intrinsic::hexagon_S6_rol_i_r_or, 30546}, // __builtin_HEXAGON_S6_rol_i_r_or
   31173       {Intrinsic::hexagon_S6_rol_i_r_xacc, 30578}, // __builtin_HEXAGON_S6_rol_i_r_xacc
   31174       {Intrinsic::hexagon_S6_vsplatrbp, 30612}, // __builtin_HEXAGON_S6_vsplatrbp
   31175       {Intrinsic::hexagon_S6_vtrunehb_ppp, 30643}, // __builtin_HEXAGON_S6_vtrunehb_ppp
   31176       {Intrinsic::hexagon_S6_vtrunohb_ppp, 30677}, // __builtin_HEXAGON_S6_vtrunohb_ppp
   31177       {Intrinsic::hexagon_V6_extractw, 30738}, // __builtin_HEXAGON_V6_extractw
   31178       {Intrinsic::hexagon_V6_extractw_128B, 30768}, // __builtin_HEXAGON_V6_extractw_128B
   31179       {Intrinsic::hexagon_V6_hi, 30803}, // __builtin_HEXAGON_V6_hi
   31180       {Intrinsic::hexagon_V6_hi_128B, 30827}, // __builtin_HEXAGON_V6_hi_128B
   31181       {Intrinsic::hexagon_V6_lo, 30856}, // __builtin_HEXAGON_V6_lo
   31182       {Intrinsic::hexagon_V6_lo_128B, 30880}, // __builtin_HEXAGON_V6_lo_128B
   31183       {Intrinsic::hexagon_V6_lvsplatb, 30909}, // __builtin_HEXAGON_V6_lvsplatb
   31184       {Intrinsic::hexagon_V6_lvsplatb_128B, 30939}, // __builtin_HEXAGON_V6_lvsplatb_128B
   31185       {Intrinsic::hexagon_V6_lvsplath, 30974}, // __builtin_HEXAGON_V6_lvsplath
   31186       {Intrinsic::hexagon_V6_lvsplath_128B, 31004}, // __builtin_HEXAGON_V6_lvsplath_128B
   31187       {Intrinsic::hexagon_V6_lvsplatw, 31039}, // __builtin_HEXAGON_V6_lvsplatw
   31188       {Intrinsic::hexagon_V6_lvsplatw_128B, 31069}, // __builtin_HEXAGON_V6_lvsplatw_128B
   31189       {Intrinsic::hexagon_V6_pred_and, 31104}, // __builtin_HEXAGON_V6_pred_and
   31190       {Intrinsic::hexagon_V6_pred_and_128B, 31134}, // __builtin_HEXAGON_V6_pred_and_128B
   31191       {Intrinsic::hexagon_V6_pred_and_n, 31169}, // __builtin_HEXAGON_V6_pred_and_n
   31192       {Intrinsic::hexagon_V6_pred_and_n_128B, 31201}, // __builtin_HEXAGON_V6_pred_and_n_128B
   31193       {Intrinsic::hexagon_V6_pred_not, 31238}, // __builtin_HEXAGON_V6_pred_not
   31194       {Intrinsic::hexagon_V6_pred_not_128B, 31268}, // __builtin_HEXAGON_V6_pred_not_128B
   31195       {Intrinsic::hexagon_V6_pred_or, 31303}, // __builtin_HEXAGON_V6_pred_or
   31196       {Intrinsic::hexagon_V6_pred_or_128B, 31332}, // __builtin_HEXAGON_V6_pred_or_128B
   31197       {Intrinsic::hexagon_V6_pred_or_n, 31366}, // __builtin_HEXAGON_V6_pred_or_n
   31198       {Intrinsic::hexagon_V6_pred_or_n_128B, 31397}, // __builtin_HEXAGON_V6_pred_or_n_128B
   31199       {Intrinsic::hexagon_V6_pred_scalar2, 31433}, // __builtin_HEXAGON_V6_pred_scalar2
   31200       {Intrinsic::hexagon_V6_pred_scalar2_128B, 31467}, // __builtin_HEXAGON_V6_pred_scalar2_128B
   31201       {Intrinsic::hexagon_V6_pred_scalar2v2, 31506}, // __builtin_HEXAGON_V6_pred_scalar2v2
   31202       {Intrinsic::hexagon_V6_pred_scalar2v2_128B, 31542}, // __builtin_HEXAGON_V6_pred_scalar2v2_128B
   31203       {Intrinsic::hexagon_V6_pred_xor, 31583}, // __builtin_HEXAGON_V6_pred_xor
   31204       {Intrinsic::hexagon_V6_pred_xor_128B, 31613}, // __builtin_HEXAGON_V6_pred_xor_128B
   31205       {Intrinsic::hexagon_V6_shuffeqh, 31648}, // __builtin_HEXAGON_V6_shuffeqh
   31206       {Intrinsic::hexagon_V6_shuffeqh_128B, 31678}, // __builtin_HEXAGON_V6_shuffeqh_128B
   31207       {Intrinsic::hexagon_V6_shuffeqw, 31713}, // __builtin_HEXAGON_V6_shuffeqw
   31208       {Intrinsic::hexagon_V6_shuffeqw_128B, 31743}, // __builtin_HEXAGON_V6_shuffeqw_128B
   31209       {Intrinsic::hexagon_V6_vabsdiffh, 31778}, // __builtin_HEXAGON_V6_vabsdiffh
   31210       {Intrinsic::hexagon_V6_vabsdiffh_128B, 31809}, // __builtin_HEXAGON_V6_vabsdiffh_128B
   31211       {Intrinsic::hexagon_V6_vabsdiffub, 31845}, // __builtin_HEXAGON_V6_vabsdiffub
   31212       {Intrinsic::hexagon_V6_vabsdiffub_128B, 31877}, // __builtin_HEXAGON_V6_vabsdiffub_128B
   31213       {Intrinsic::hexagon_V6_vabsdiffuh, 31914}, // __builtin_HEXAGON_V6_vabsdiffuh
   31214       {Intrinsic::hexagon_V6_vabsdiffuh_128B, 31946}, // __builtin_HEXAGON_V6_vabsdiffuh_128B
   31215       {Intrinsic::hexagon_V6_vabsdiffw, 31983}, // __builtin_HEXAGON_V6_vabsdiffw
   31216       {Intrinsic::hexagon_V6_vabsdiffw_128B, 32014}, // __builtin_HEXAGON_V6_vabsdiffw_128B
   31217       {Intrinsic::hexagon_V6_vabsh, 32050}, // __builtin_HEXAGON_V6_vabsh
   31218       {Intrinsic::hexagon_V6_vabsh_128B, 32077}, // __builtin_HEXAGON_V6_vabsh_128B
   31219       {Intrinsic::hexagon_V6_vabsh_sat, 32109}, // __builtin_HEXAGON_V6_vabsh_sat
   31220       {Intrinsic::hexagon_V6_vabsh_sat_128B, 32140}, // __builtin_HEXAGON_V6_vabsh_sat_128B
   31221       {Intrinsic::hexagon_V6_vabsw, 32176}, // __builtin_HEXAGON_V6_vabsw
   31222       {Intrinsic::hexagon_V6_vabsw_128B, 32203}, // __builtin_HEXAGON_V6_vabsw_128B
   31223       {Intrinsic::hexagon_V6_vabsw_sat, 32235}, // __builtin_HEXAGON_V6_vabsw_sat
   31224       {Intrinsic::hexagon_V6_vabsw_sat_128B, 32266}, // __builtin_HEXAGON_V6_vabsw_sat_128B
   31225       {Intrinsic::hexagon_V6_vaddb, 32302}, // __builtin_HEXAGON_V6_vaddb
   31226       {Intrinsic::hexagon_V6_vaddb_128B, 32329}, // __builtin_HEXAGON_V6_vaddb_128B
   31227       {Intrinsic::hexagon_V6_vaddb_dv, 32361}, // __builtin_HEXAGON_V6_vaddb_dv
   31228       {Intrinsic::hexagon_V6_vaddb_dv_128B, 32391}, // __builtin_HEXAGON_V6_vaddb_dv_128B
   31229       {Intrinsic::hexagon_V6_vaddbnq, 32426}, // __builtin_HEXAGON_V6_vaddbnq
   31230       {Intrinsic::hexagon_V6_vaddbnq_128B, 32455}, // __builtin_HEXAGON_V6_vaddbnq_128B
   31231       {Intrinsic::hexagon_V6_vaddbq, 32489}, // __builtin_HEXAGON_V6_vaddbq
   31232       {Intrinsic::hexagon_V6_vaddbq_128B, 32517}, // __builtin_HEXAGON_V6_vaddbq_128B
   31233       {Intrinsic::hexagon_V6_vaddbsat, 32550}, // __builtin_HEXAGON_V6_vaddbsat
   31234       {Intrinsic::hexagon_V6_vaddbsat_128B, 32580}, // __builtin_HEXAGON_V6_vaddbsat_128B
   31235       {Intrinsic::hexagon_V6_vaddbsat_dv, 32615}, // __builtin_HEXAGON_V6_vaddbsat_dv
   31236       {Intrinsic::hexagon_V6_vaddbsat_dv_128B, 32648}, // __builtin_HEXAGON_V6_vaddbsat_dv_128B
   31237       {Intrinsic::hexagon_V6_vaddclbh, 32686}, // __builtin_HEXAGON_V6_vaddclbh
   31238       {Intrinsic::hexagon_V6_vaddclbh_128B, 32716}, // __builtin_HEXAGON_V6_vaddclbh_128B
   31239       {Intrinsic::hexagon_V6_vaddclbw, 32751}, // __builtin_HEXAGON_V6_vaddclbw
   31240       {Intrinsic::hexagon_V6_vaddclbw_128B, 32781}, // __builtin_HEXAGON_V6_vaddclbw_128B
   31241       {Intrinsic::hexagon_V6_vaddh, 32816}, // __builtin_HEXAGON_V6_vaddh
   31242       {Intrinsic::hexagon_V6_vaddh_128B, 32843}, // __builtin_HEXAGON_V6_vaddh_128B
   31243       {Intrinsic::hexagon_V6_vaddh_dv, 32875}, // __builtin_HEXAGON_V6_vaddh_dv
   31244       {Intrinsic::hexagon_V6_vaddh_dv_128B, 32905}, // __builtin_HEXAGON_V6_vaddh_dv_128B
   31245       {Intrinsic::hexagon_V6_vaddhnq, 32940}, // __builtin_HEXAGON_V6_vaddhnq
   31246       {Intrinsic::hexagon_V6_vaddhnq_128B, 32969}, // __builtin_HEXAGON_V6_vaddhnq_128B
   31247       {Intrinsic::hexagon_V6_vaddhq, 33003}, // __builtin_HEXAGON_V6_vaddhq
   31248       {Intrinsic::hexagon_V6_vaddhq_128B, 33031}, // __builtin_HEXAGON_V6_vaddhq_128B
   31249       {Intrinsic::hexagon_V6_vaddhsat, 33064}, // __builtin_HEXAGON_V6_vaddhsat
   31250       {Intrinsic::hexagon_V6_vaddhsat_128B, 33094}, // __builtin_HEXAGON_V6_vaddhsat_128B
   31251       {Intrinsic::hexagon_V6_vaddhsat_dv, 33129}, // __builtin_HEXAGON_V6_vaddhsat_dv
   31252       {Intrinsic::hexagon_V6_vaddhsat_dv_128B, 33162}, // __builtin_HEXAGON_V6_vaddhsat_dv_128B
   31253       {Intrinsic::hexagon_V6_vaddhw, 33200}, // __builtin_HEXAGON_V6_vaddhw
   31254       {Intrinsic::hexagon_V6_vaddhw_128B, 33228}, // __builtin_HEXAGON_V6_vaddhw_128B
   31255       {Intrinsic::hexagon_V6_vaddhw_acc, 33261}, // __builtin_HEXAGON_V6_vaddhw_acc
   31256       {Intrinsic::hexagon_V6_vaddhw_acc_128B, 33293}, // __builtin_HEXAGON_V6_vaddhw_acc_128B
   31257       {Intrinsic::hexagon_V6_vaddubh, 33330}, // __builtin_HEXAGON_V6_vaddubh
   31258       {Intrinsic::hexagon_V6_vaddubh_128B, 33359}, // __builtin_HEXAGON_V6_vaddubh_128B
   31259       {Intrinsic::hexagon_V6_vaddubh_acc, 33393}, // __builtin_HEXAGON_V6_vaddubh_acc
   31260       {Intrinsic::hexagon_V6_vaddubh_acc_128B, 33426}, // __builtin_HEXAGON_V6_vaddubh_acc_128B
   31261       {Intrinsic::hexagon_V6_vaddubsat, 33464}, // __builtin_HEXAGON_V6_vaddubsat
   31262       {Intrinsic::hexagon_V6_vaddubsat_128B, 33495}, // __builtin_HEXAGON_V6_vaddubsat_128B
   31263       {Intrinsic::hexagon_V6_vaddubsat_dv, 33531}, // __builtin_HEXAGON_V6_vaddubsat_dv
   31264       {Intrinsic::hexagon_V6_vaddubsat_dv_128B, 33565}, // __builtin_HEXAGON_V6_vaddubsat_dv_128B
   31265       {Intrinsic::hexagon_V6_vaddububb_sat, 33604}, // __builtin_HEXAGON_V6_vaddububb_sat
   31266       {Intrinsic::hexagon_V6_vaddububb_sat_128B, 33639}, // __builtin_HEXAGON_V6_vaddububb_sat_128B
   31267       {Intrinsic::hexagon_V6_vadduhsat, 33679}, // __builtin_HEXAGON_V6_vadduhsat
   31268       {Intrinsic::hexagon_V6_vadduhsat_128B, 33710}, // __builtin_HEXAGON_V6_vadduhsat_128B
   31269       {Intrinsic::hexagon_V6_vadduhsat_dv, 33746}, // __builtin_HEXAGON_V6_vadduhsat_dv
   31270       {Intrinsic::hexagon_V6_vadduhsat_dv_128B, 33780}, // __builtin_HEXAGON_V6_vadduhsat_dv_128B
   31271       {Intrinsic::hexagon_V6_vadduhw, 33819}, // __builtin_HEXAGON_V6_vadduhw
   31272       {Intrinsic::hexagon_V6_vadduhw_128B, 33848}, // __builtin_HEXAGON_V6_vadduhw_128B
   31273       {Intrinsic::hexagon_V6_vadduhw_acc, 33882}, // __builtin_HEXAGON_V6_vadduhw_acc
   31274       {Intrinsic::hexagon_V6_vadduhw_acc_128B, 33915}, // __builtin_HEXAGON_V6_vadduhw_acc_128B
   31275       {Intrinsic::hexagon_V6_vadduwsat, 33953}, // __builtin_HEXAGON_V6_vadduwsat
   31276       {Intrinsic::hexagon_V6_vadduwsat_128B, 33984}, // __builtin_HEXAGON_V6_vadduwsat_128B
   31277       {Intrinsic::hexagon_V6_vadduwsat_dv, 34020}, // __builtin_HEXAGON_V6_vadduwsat_dv
   31278       {Intrinsic::hexagon_V6_vadduwsat_dv_128B, 34054}, // __builtin_HEXAGON_V6_vadduwsat_dv_128B
   31279       {Intrinsic::hexagon_V6_vaddw, 34093}, // __builtin_HEXAGON_V6_vaddw
   31280       {Intrinsic::hexagon_V6_vaddw_128B, 34120}, // __builtin_HEXAGON_V6_vaddw_128B
   31281       {Intrinsic::hexagon_V6_vaddw_dv, 34152}, // __builtin_HEXAGON_V6_vaddw_dv
   31282       {Intrinsic::hexagon_V6_vaddw_dv_128B, 34182}, // __builtin_HEXAGON_V6_vaddw_dv_128B
   31283       {Intrinsic::hexagon_V6_vaddwnq, 34217}, // __builtin_HEXAGON_V6_vaddwnq
   31284       {Intrinsic::hexagon_V6_vaddwnq_128B, 34246}, // __builtin_HEXAGON_V6_vaddwnq_128B
   31285       {Intrinsic::hexagon_V6_vaddwq, 34280}, // __builtin_HEXAGON_V6_vaddwq
   31286       {Intrinsic::hexagon_V6_vaddwq_128B, 34308}, // __builtin_HEXAGON_V6_vaddwq_128B
   31287       {Intrinsic::hexagon_V6_vaddwsat, 34341}, // __builtin_HEXAGON_V6_vaddwsat
   31288       {Intrinsic::hexagon_V6_vaddwsat_128B, 34371}, // __builtin_HEXAGON_V6_vaddwsat_128B
   31289       {Intrinsic::hexagon_V6_vaddwsat_dv, 34406}, // __builtin_HEXAGON_V6_vaddwsat_dv
   31290       {Intrinsic::hexagon_V6_vaddwsat_dv_128B, 34439}, // __builtin_HEXAGON_V6_vaddwsat_dv_128B
   31291       {Intrinsic::hexagon_V6_valignb, 34477}, // __builtin_HEXAGON_V6_valignb
   31292       {Intrinsic::hexagon_V6_valignb_128B, 34506}, // __builtin_HEXAGON_V6_valignb_128B
   31293       {Intrinsic::hexagon_V6_valignbi, 34540}, // __builtin_HEXAGON_V6_valignbi
   31294       {Intrinsic::hexagon_V6_valignbi_128B, 34570}, // __builtin_HEXAGON_V6_valignbi_128B
   31295       {Intrinsic::hexagon_V6_vand, 34605}, // __builtin_HEXAGON_V6_vand
   31296       {Intrinsic::hexagon_V6_vand_128B, 34631}, // __builtin_HEXAGON_V6_vand_128B
   31297       {Intrinsic::hexagon_V6_vandnqrt, 34662}, // __builtin_HEXAGON_V6_vandnqrt
   31298       {Intrinsic::hexagon_V6_vandnqrt_128B, 34692}, // __builtin_HEXAGON_V6_vandnqrt_128B
   31299       {Intrinsic::hexagon_V6_vandnqrt_acc, 34727}, // __builtin_HEXAGON_V6_vandnqrt_acc
   31300       {Intrinsic::hexagon_V6_vandnqrt_acc_128B, 34761}, // __builtin_HEXAGON_V6_vandnqrt_acc_128B
   31301       {Intrinsic::hexagon_V6_vandqrt, 34800}, // __builtin_HEXAGON_V6_vandqrt
   31302       {Intrinsic::hexagon_V6_vandqrt_128B, 34829}, // __builtin_HEXAGON_V6_vandqrt_128B
   31303       {Intrinsic::hexagon_V6_vandqrt_acc, 34863}, // __builtin_HEXAGON_V6_vandqrt_acc
   31304       {Intrinsic::hexagon_V6_vandqrt_acc_128B, 34896}, // __builtin_HEXAGON_V6_vandqrt_acc_128B
   31305       {Intrinsic::hexagon_V6_vandvnqv, 34934}, // __builtin_HEXAGON_V6_vandvnqv
   31306       {Intrinsic::hexagon_V6_vandvnqv_128B, 34964}, // __builtin_HEXAGON_V6_vandvnqv_128B
   31307       {Intrinsic::hexagon_V6_vandvqv, 34999}, // __builtin_HEXAGON_V6_vandvqv
   31308       {Intrinsic::hexagon_V6_vandvqv_128B, 35028}, // __builtin_HEXAGON_V6_vandvqv_128B
   31309       {Intrinsic::hexagon_V6_vandvrt, 35062}, // __builtin_HEXAGON_V6_vandvrt
   31310       {Intrinsic::hexagon_V6_vandvrt_128B, 35091}, // __builtin_HEXAGON_V6_vandvrt_128B
   31311       {Intrinsic::hexagon_V6_vandvrt_acc, 35125}, // __builtin_HEXAGON_V6_vandvrt_acc
   31312       {Intrinsic::hexagon_V6_vandvrt_acc_128B, 35158}, // __builtin_HEXAGON_V6_vandvrt_acc_128B
   31313       {Intrinsic::hexagon_V6_vaslh, 35196}, // __builtin_HEXAGON_V6_vaslh
   31314       {Intrinsic::hexagon_V6_vaslh_128B, 35223}, // __builtin_HEXAGON_V6_vaslh_128B
   31315       {Intrinsic::hexagon_V6_vaslhv, 35255}, // __builtin_HEXAGON_V6_vaslhv
   31316       {Intrinsic::hexagon_V6_vaslhv_128B, 35283}, // __builtin_HEXAGON_V6_vaslhv_128B
   31317       {Intrinsic::hexagon_V6_vaslw, 35316}, // __builtin_HEXAGON_V6_vaslw
   31318       {Intrinsic::hexagon_V6_vaslw_128B, 35343}, // __builtin_HEXAGON_V6_vaslw_128B
   31319       {Intrinsic::hexagon_V6_vaslw_acc, 35375}, // __builtin_HEXAGON_V6_vaslw_acc
   31320       {Intrinsic::hexagon_V6_vaslw_acc_128B, 35406}, // __builtin_HEXAGON_V6_vaslw_acc_128B
   31321       {Intrinsic::hexagon_V6_vaslwv, 35442}, // __builtin_HEXAGON_V6_vaslwv
   31322       {Intrinsic::hexagon_V6_vaslwv_128B, 35470}, // __builtin_HEXAGON_V6_vaslwv_128B
   31323       {Intrinsic::hexagon_V6_vasrh, 35503}, // __builtin_HEXAGON_V6_vasrh
   31324       {Intrinsic::hexagon_V6_vasrh_128B, 35530}, // __builtin_HEXAGON_V6_vasrh_128B
   31325       {Intrinsic::hexagon_V6_vasrhbrndsat, 35562}, // __builtin_HEXAGON_V6_vasrhbrndsat
   31326       {Intrinsic::hexagon_V6_vasrhbrndsat_128B, 35596}, // __builtin_HEXAGON_V6_vasrhbrndsat_128B
   31327       {Intrinsic::hexagon_V6_vasrhbsat, 35635}, // __builtin_HEXAGON_V6_vasrhbsat
   31328       {Intrinsic::hexagon_V6_vasrhbsat_128B, 35666}, // __builtin_HEXAGON_V6_vasrhbsat_128B
   31329       {Intrinsic::hexagon_V6_vasrhubrndsat, 35702}, // __builtin_HEXAGON_V6_vasrhubrndsat
   31330       {Intrinsic::hexagon_V6_vasrhubrndsat_128B, 35737}, // __builtin_HEXAGON_V6_vasrhubrndsat_128B
   31331       {Intrinsic::hexagon_V6_vasrhubsat, 35777}, // __builtin_HEXAGON_V6_vasrhubsat
   31332       {Intrinsic::hexagon_V6_vasrhubsat_128B, 35809}, // __builtin_HEXAGON_V6_vasrhubsat_128B
   31333       {Intrinsic::hexagon_V6_vasrhv, 35846}, // __builtin_HEXAGON_V6_vasrhv
   31334       {Intrinsic::hexagon_V6_vasrhv_128B, 35874}, // __builtin_HEXAGON_V6_vasrhv_128B
   31335       {Intrinsic::hexagon_V6_vasruwuhrndsat, 35907}, // __builtin_HEXAGON_V6_vasruwuhrndsat
   31336       {Intrinsic::hexagon_V6_vasruwuhrndsat_128B, 35943}, // __builtin_HEXAGON_V6_vasruwuhrndsat_128B
   31337       {Intrinsic::hexagon_V6_vasrw, 35984}, // __builtin_HEXAGON_V6_vasrw
   31338       {Intrinsic::hexagon_V6_vasrw_128B, 36011}, // __builtin_HEXAGON_V6_vasrw_128B
   31339       {Intrinsic::hexagon_V6_vasrw_acc, 36043}, // __builtin_HEXAGON_V6_vasrw_acc
   31340       {Intrinsic::hexagon_V6_vasrw_acc_128B, 36074}, // __builtin_HEXAGON_V6_vasrw_acc_128B
   31341       {Intrinsic::hexagon_V6_vasrwh, 36110}, // __builtin_HEXAGON_V6_vasrwh
   31342       {Intrinsic::hexagon_V6_vasrwh_128B, 36138}, // __builtin_HEXAGON_V6_vasrwh_128B
   31343       {Intrinsic::hexagon_V6_vasrwhrndsat, 36171}, // __builtin_HEXAGON_V6_vasrwhrndsat
   31344       {Intrinsic::hexagon_V6_vasrwhrndsat_128B, 36205}, // __builtin_HEXAGON_V6_vasrwhrndsat_128B
   31345       {Intrinsic::hexagon_V6_vasrwhsat, 36244}, // __builtin_HEXAGON_V6_vasrwhsat
   31346       {Intrinsic::hexagon_V6_vasrwhsat_128B, 36275}, // __builtin_HEXAGON_V6_vasrwhsat_128B
   31347       {Intrinsic::hexagon_V6_vasrwuhrndsat, 36311}, // __builtin_HEXAGON_V6_vasrwuhrndsat
   31348       {Intrinsic::hexagon_V6_vasrwuhrndsat_128B, 36346}, // __builtin_HEXAGON_V6_vasrwuhrndsat_128B
   31349       {Intrinsic::hexagon_V6_vasrwuhsat, 36386}, // __builtin_HEXAGON_V6_vasrwuhsat
   31350       {Intrinsic::hexagon_V6_vasrwuhsat_128B, 36418}, // __builtin_HEXAGON_V6_vasrwuhsat_128B
   31351       {Intrinsic::hexagon_V6_vasrwv, 36455}, // __builtin_HEXAGON_V6_vasrwv
   31352       {Intrinsic::hexagon_V6_vasrwv_128B, 36483}, // __builtin_HEXAGON_V6_vasrwv_128B
   31353       {Intrinsic::hexagon_V6_vassign, 36516}, // __builtin_HEXAGON_V6_vassign
   31354       {Intrinsic::hexagon_V6_vassign_128B, 36545}, // __builtin_HEXAGON_V6_vassign_128B
   31355       {Intrinsic::hexagon_V6_vassignp, 36579}, // __builtin_HEXAGON_V6_vassignp
   31356       {Intrinsic::hexagon_V6_vassignp_128B, 36609}, // __builtin_HEXAGON_V6_vassignp_128B
   31357       {Intrinsic::hexagon_V6_vavgh, 36644}, // __builtin_HEXAGON_V6_vavgh
   31358       {Intrinsic::hexagon_V6_vavgh_128B, 36671}, // __builtin_HEXAGON_V6_vavgh_128B
   31359       {Intrinsic::hexagon_V6_vavghrnd, 36703}, // __builtin_HEXAGON_V6_vavghrnd
   31360       {Intrinsic::hexagon_V6_vavghrnd_128B, 36733}, // __builtin_HEXAGON_V6_vavghrnd_128B
   31361       {Intrinsic::hexagon_V6_vavgub, 36768}, // __builtin_HEXAGON_V6_vavgub
   31362       {Intrinsic::hexagon_V6_vavgub_128B, 36796}, // __builtin_HEXAGON_V6_vavgub_128B
   31363       {Intrinsic::hexagon_V6_vavgubrnd, 36829}, // __builtin_HEXAGON_V6_vavgubrnd
   31364       {Intrinsic::hexagon_V6_vavgubrnd_128B, 36860}, // __builtin_HEXAGON_V6_vavgubrnd_128B
   31365       {Intrinsic::hexagon_V6_vavguh, 36896}, // __builtin_HEXAGON_V6_vavguh
   31366       {Intrinsic::hexagon_V6_vavguh_128B, 36924}, // __builtin_HEXAGON_V6_vavguh_128B
   31367       {Intrinsic::hexagon_V6_vavguhrnd, 36957}, // __builtin_HEXAGON_V6_vavguhrnd
   31368       {Intrinsic::hexagon_V6_vavguhrnd_128B, 36988}, // __builtin_HEXAGON_V6_vavguhrnd_128B
   31369       {Intrinsic::hexagon_V6_vavgw, 37024}, // __builtin_HEXAGON_V6_vavgw
   31370       {Intrinsic::hexagon_V6_vavgw_128B, 37051}, // __builtin_HEXAGON_V6_vavgw_128B
   31371       {Intrinsic::hexagon_V6_vavgwrnd, 37083}, // __builtin_HEXAGON_V6_vavgwrnd
   31372       {Intrinsic::hexagon_V6_vavgwrnd_128B, 37113}, // __builtin_HEXAGON_V6_vavgwrnd_128B
   31373       {Intrinsic::hexagon_V6_vcl0h, 37148}, // __builtin_HEXAGON_V6_vcl0h
   31374       {Intrinsic::hexagon_V6_vcl0h_128B, 37175}, // __builtin_HEXAGON_V6_vcl0h_128B
   31375       {Intrinsic::hexagon_V6_vcl0w, 37207}, // __builtin_HEXAGON_V6_vcl0w
   31376       {Intrinsic::hexagon_V6_vcl0w_128B, 37234}, // __builtin_HEXAGON_V6_vcl0w_128B
   31377       {Intrinsic::hexagon_V6_vcombine, 37266}, // __builtin_HEXAGON_V6_vcombine
   31378       {Intrinsic::hexagon_V6_vcombine_128B, 37296}, // __builtin_HEXAGON_V6_vcombine_128B
   31379       {Intrinsic::hexagon_V6_vd0, 37331}, // __builtin_HEXAGON_V6_vd0
   31380       {Intrinsic::hexagon_V6_vd0_128B, 37356}, // __builtin_HEXAGON_V6_vd0_128B
   31381       {Intrinsic::hexagon_V6_vdealb, 37386}, // __builtin_HEXAGON_V6_vdealb
   31382       {Intrinsic::hexagon_V6_vdealb4w, 37447}, // __builtin_HEXAGON_V6_vdealb4w
   31383       {Intrinsic::hexagon_V6_vdealb4w_128B, 37477}, // __builtin_HEXAGON_V6_vdealb4w_128B
   31384       {Intrinsic::hexagon_V6_vdealb_128B, 37414}, // __builtin_HEXAGON_V6_vdealb_128B
   31385       {Intrinsic::hexagon_V6_vdealh, 37512}, // __builtin_HEXAGON_V6_vdealh
   31386       {Intrinsic::hexagon_V6_vdealh_128B, 37540}, // __builtin_HEXAGON_V6_vdealh_128B
   31387       {Intrinsic::hexagon_V6_vdealvdd, 37573}, // __builtin_HEXAGON_V6_vdealvdd
   31388       {Intrinsic::hexagon_V6_vdealvdd_128B, 37603}, // __builtin_HEXAGON_V6_vdealvdd_128B
   31389       {Intrinsic::hexagon_V6_vdelta, 37638}, // __builtin_HEXAGON_V6_vdelta
   31390       {Intrinsic::hexagon_V6_vdelta_128B, 37666}, // __builtin_HEXAGON_V6_vdelta_128B
   31391       {Intrinsic::hexagon_V6_vdmpybus, 37699}, // __builtin_HEXAGON_V6_vdmpybus
   31392       {Intrinsic::hexagon_V6_vdmpybus_128B, 37729}, // __builtin_HEXAGON_V6_vdmpybus_128B
   31393       {Intrinsic::hexagon_V6_vdmpybus_acc, 37764}, // __builtin_HEXAGON_V6_vdmpybus_acc
   31394       {Intrinsic::hexagon_V6_vdmpybus_acc_128B, 37798}, // __builtin_HEXAGON_V6_vdmpybus_acc_128B
   31395       {Intrinsic::hexagon_V6_vdmpybus_dv, 37837}, // __builtin_HEXAGON_V6_vdmpybus_dv
   31396       {Intrinsic::hexagon_V6_vdmpybus_dv_128B, 37870}, // __builtin_HEXAGON_V6_vdmpybus_dv_128B
   31397       {Intrinsic::hexagon_V6_vdmpybus_dv_acc, 37908}, // __builtin_HEXAGON_V6_vdmpybus_dv_acc
   31398       {Intrinsic::hexagon_V6_vdmpybus_dv_acc_128B, 37945}, // __builtin_HEXAGON_V6_vdmpybus_dv_acc_128B
   31399       {Intrinsic::hexagon_V6_vdmpyhb, 37987}, // __builtin_HEXAGON_V6_vdmpyhb
   31400       {Intrinsic::hexagon_V6_vdmpyhb_128B, 38016}, // __builtin_HEXAGON_V6_vdmpyhb_128B
   31401       {Intrinsic::hexagon_V6_vdmpyhb_acc, 38050}, // __builtin_HEXAGON_V6_vdmpyhb_acc
   31402       {Intrinsic::hexagon_V6_vdmpyhb_acc_128B, 38083}, // __builtin_HEXAGON_V6_vdmpyhb_acc_128B
   31403       {Intrinsic::hexagon_V6_vdmpyhb_dv, 38121}, // __builtin_HEXAGON_V6_vdmpyhb_dv
   31404       {Intrinsic::hexagon_V6_vdmpyhb_dv_128B, 38153}, // __builtin_HEXAGON_V6_vdmpyhb_dv_128B
   31405       {Intrinsic::hexagon_V6_vdmpyhb_dv_acc, 38190}, // __builtin_HEXAGON_V6_vdmpyhb_dv_acc
   31406       {Intrinsic::hexagon_V6_vdmpyhb_dv_acc_128B, 38226}, // __builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B
   31407       {Intrinsic::hexagon_V6_vdmpyhisat, 38267}, // __builtin_HEXAGON_V6_vdmpyhisat
   31408       {Intrinsic::hexagon_V6_vdmpyhisat_128B, 38299}, // __builtin_HEXAGON_V6_vdmpyhisat_128B
   31409       {Intrinsic::hexagon_V6_vdmpyhisat_acc, 38336}, // __builtin_HEXAGON_V6_vdmpyhisat_acc
   31410       {Intrinsic::hexagon_V6_vdmpyhisat_acc_128B, 38372}, // __builtin_HEXAGON_V6_vdmpyhisat_acc_128B
   31411       {Intrinsic::hexagon_V6_vdmpyhsat, 38413}, // __builtin_HEXAGON_V6_vdmpyhsat
   31412       {Intrinsic::hexagon_V6_vdmpyhsat_128B, 38444}, // __builtin_HEXAGON_V6_vdmpyhsat_128B
   31413       {Intrinsic::hexagon_V6_vdmpyhsat_acc, 38480}, // __builtin_HEXAGON_V6_vdmpyhsat_acc
   31414       {Intrinsic::hexagon_V6_vdmpyhsat_acc_128B, 38515}, // __builtin_HEXAGON_V6_vdmpyhsat_acc_128B
   31415       {Intrinsic::hexagon_V6_vdmpyhsuisat, 38555}, // __builtin_HEXAGON_V6_vdmpyhsuisat
   31416       {Intrinsic::hexagon_V6_vdmpyhsuisat_128B, 38589}, // __builtin_HEXAGON_V6_vdmpyhsuisat_128B
   31417       {Intrinsic::hexagon_V6_vdmpyhsuisat_acc, 38628}, // __builtin_HEXAGON_V6_vdmpyhsuisat_acc
   31418       {Intrinsic::hexagon_V6_vdmpyhsuisat_acc_128B, 38666}, // __builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B
   31419       {Intrinsic::hexagon_V6_vdmpyhsusat, 38709}, // __builtin_HEXAGON_V6_vdmpyhsusat
   31420       {Intrinsic::hexagon_V6_vdmpyhsusat_128B, 38742}, // __builtin_HEXAGON_V6_vdmpyhsusat_128B
   31421       {Intrinsic::hexagon_V6_vdmpyhsusat_acc, 38780}, // __builtin_HEXAGON_V6_vdmpyhsusat_acc
   31422       {Intrinsic::hexagon_V6_vdmpyhsusat_acc_128B, 38817}, // __builtin_HEXAGON_V6_vdmpyhsusat_acc_128B
   31423       {Intrinsic::hexagon_V6_vdmpyhvsat, 38859}, // __builtin_HEXAGON_V6_vdmpyhvsat
   31424       {Intrinsic::hexagon_V6_vdmpyhvsat_128B, 38891}, // __builtin_HEXAGON_V6_vdmpyhvsat_128B
   31425       {Intrinsic::hexagon_V6_vdmpyhvsat_acc, 38928}, // __builtin_HEXAGON_V6_vdmpyhvsat_acc
   31426       {Intrinsic::hexagon_V6_vdmpyhvsat_acc_128B, 38964}, // __builtin_HEXAGON_V6_vdmpyhvsat_acc_128B
   31427       {Intrinsic::hexagon_V6_vdsaduh, 39005}, // __builtin_HEXAGON_V6_vdsaduh
   31428       {Intrinsic::hexagon_V6_vdsaduh_128B, 39034}, // __builtin_HEXAGON_V6_vdsaduh_128B
   31429       {Intrinsic::hexagon_V6_vdsaduh_acc, 39068}, // __builtin_HEXAGON_V6_vdsaduh_acc
   31430       {Intrinsic::hexagon_V6_vdsaduh_acc_128B, 39101}, // __builtin_HEXAGON_V6_vdsaduh_acc_128B
   31431       {Intrinsic::hexagon_V6_veqb, 39139}, // __builtin_HEXAGON_V6_veqb
   31432       {Intrinsic::hexagon_V6_veqb_128B, 39165}, // __builtin_HEXAGON_V6_veqb_128B
   31433       {Intrinsic::hexagon_V6_veqb_and, 39196}, // __builtin_HEXAGON_V6_veqb_and
   31434       {Intrinsic::hexagon_V6_veqb_and_128B, 39226}, // __builtin_HEXAGON_V6_veqb_and_128B
   31435       {Intrinsic::hexagon_V6_veqb_or, 39261}, // __builtin_HEXAGON_V6_veqb_or
   31436       {Intrinsic::hexagon_V6_veqb_or_128B, 39290}, // __builtin_HEXAGON_V6_veqb_or_128B
   31437       {Intrinsic::hexagon_V6_veqb_xor, 39324}, // __builtin_HEXAGON_V6_veqb_xor
   31438       {Intrinsic::hexagon_V6_veqb_xor_128B, 39354}, // __builtin_HEXAGON_V6_veqb_xor_128B
   31439       {Intrinsic::hexagon_V6_veqh, 39389}, // __builtin_HEXAGON_V6_veqh
   31440       {Intrinsic::hexagon_V6_veqh_128B, 39415}, // __builtin_HEXAGON_V6_veqh_128B
   31441       {Intrinsic::hexagon_V6_veqh_and, 39446}, // __builtin_HEXAGON_V6_veqh_and
   31442       {Intrinsic::hexagon_V6_veqh_and_128B, 39476}, // __builtin_HEXAGON_V6_veqh_and_128B
   31443       {Intrinsic::hexagon_V6_veqh_or, 39511}, // __builtin_HEXAGON_V6_veqh_or
   31444       {Intrinsic::hexagon_V6_veqh_or_128B, 39540}, // __builtin_HEXAGON_V6_veqh_or_128B
   31445       {Intrinsic::hexagon_V6_veqh_xor, 39574}, // __builtin_HEXAGON_V6_veqh_xor
   31446       {Intrinsic::hexagon_V6_veqh_xor_128B, 39604}, // __builtin_HEXAGON_V6_veqh_xor_128B
   31447       {Intrinsic::hexagon_V6_veqw, 39639}, // __builtin_HEXAGON_V6_veqw
   31448       {Intrinsic::hexagon_V6_veqw_128B, 39665}, // __builtin_HEXAGON_V6_veqw_128B
   31449       {Intrinsic::hexagon_V6_veqw_and, 39696}, // __builtin_HEXAGON_V6_veqw_and
   31450       {Intrinsic::hexagon_V6_veqw_and_128B, 39726}, // __builtin_HEXAGON_V6_veqw_and_128B
   31451       {Intrinsic::hexagon_V6_veqw_or, 39761}, // __builtin_HEXAGON_V6_veqw_or
   31452       {Intrinsic::hexagon_V6_veqw_or_128B, 39790}, // __builtin_HEXAGON_V6_veqw_or_128B
   31453       {Intrinsic::hexagon_V6_veqw_xor, 39824}, // __builtin_HEXAGON_V6_veqw_xor
   31454       {Intrinsic::hexagon_V6_veqw_xor_128B, 39854}, // __builtin_HEXAGON_V6_veqw_xor_128B
   31455       {Intrinsic::hexagon_V6_vgtb, 39889}, // __builtin_HEXAGON_V6_vgtb
   31456       {Intrinsic::hexagon_V6_vgtb_128B, 39915}, // __builtin_HEXAGON_V6_vgtb_128B
   31457       {Intrinsic::hexagon_V6_vgtb_and, 39946}, // __builtin_HEXAGON_V6_vgtb_and
   31458       {Intrinsic::hexagon_V6_vgtb_and_128B, 39976}, // __builtin_HEXAGON_V6_vgtb_and_128B
   31459       {Intrinsic::hexagon_V6_vgtb_or, 40011}, // __builtin_HEXAGON_V6_vgtb_or
   31460       {Intrinsic::hexagon_V6_vgtb_or_128B, 40040}, // __builtin_HEXAGON_V6_vgtb_or_128B
   31461       {Intrinsic::hexagon_V6_vgtb_xor, 40074}, // __builtin_HEXAGON_V6_vgtb_xor
   31462       {Intrinsic::hexagon_V6_vgtb_xor_128B, 40104}, // __builtin_HEXAGON_V6_vgtb_xor_128B
   31463       {Intrinsic::hexagon_V6_vgth, 40139}, // __builtin_HEXAGON_V6_vgth
   31464       {Intrinsic::hexagon_V6_vgth_128B, 40165}, // __builtin_HEXAGON_V6_vgth_128B
   31465       {Intrinsic::hexagon_V6_vgth_and, 40196}, // __builtin_HEXAGON_V6_vgth_and
   31466       {Intrinsic::hexagon_V6_vgth_and_128B, 40226}, // __builtin_HEXAGON_V6_vgth_and_128B
   31467       {Intrinsic::hexagon_V6_vgth_or, 40261}, // __builtin_HEXAGON_V6_vgth_or
   31468       {Intrinsic::hexagon_V6_vgth_or_128B, 40290}, // __builtin_HEXAGON_V6_vgth_or_128B
   31469       {Intrinsic::hexagon_V6_vgth_xor, 40324}, // __builtin_HEXAGON_V6_vgth_xor
   31470       {Intrinsic::hexagon_V6_vgth_xor_128B, 40354}, // __builtin_HEXAGON_V6_vgth_xor_128B
   31471       {Intrinsic::hexagon_V6_vgtub, 40389}, // __builtin_HEXAGON_V6_vgtub
   31472       {Intrinsic::hexagon_V6_vgtub_128B, 40416}, // __builtin_HEXAGON_V6_vgtub_128B
   31473       {Intrinsic::hexagon_V6_vgtub_and, 40448}, // __builtin_HEXAGON_V6_vgtub_and
   31474       {Intrinsic::hexagon_V6_vgtub_and_128B, 40479}, // __builtin_HEXAGON_V6_vgtub_and_128B
   31475       {Intrinsic::hexagon_V6_vgtub_or, 40515}, // __builtin_HEXAGON_V6_vgtub_or
   31476       {Intrinsic::hexagon_V6_vgtub_or_128B, 40545}, // __builtin_HEXAGON_V6_vgtub_or_128B
   31477       {Intrinsic::hexagon_V6_vgtub_xor, 40580}, // __builtin_HEXAGON_V6_vgtub_xor
   31478       {Intrinsic::hexagon_V6_vgtub_xor_128B, 40611}, // __builtin_HEXAGON_V6_vgtub_xor_128B
   31479       {Intrinsic::hexagon_V6_vgtuh, 40647}, // __builtin_HEXAGON_V6_vgtuh
   31480       {Intrinsic::hexagon_V6_vgtuh_128B, 40674}, // __builtin_HEXAGON_V6_vgtuh_128B
   31481       {Intrinsic::hexagon_V6_vgtuh_and, 40706}, // __builtin_HEXAGON_V6_vgtuh_and
   31482       {Intrinsic::hexagon_V6_vgtuh_and_128B, 40737}, // __builtin_HEXAGON_V6_vgtuh_and_128B
   31483       {Intrinsic::hexagon_V6_vgtuh_or, 40773}, // __builtin_HEXAGON_V6_vgtuh_or
   31484       {Intrinsic::hexagon_V6_vgtuh_or_128B, 40803}, // __builtin_HEXAGON_V6_vgtuh_or_128B
   31485       {Intrinsic::hexagon_V6_vgtuh_xor, 40838}, // __builtin_HEXAGON_V6_vgtuh_xor
   31486       {Intrinsic::hexagon_V6_vgtuh_xor_128B, 40869}, // __builtin_HEXAGON_V6_vgtuh_xor_128B
   31487       {Intrinsic::hexagon_V6_vgtuw, 40905}, // __builtin_HEXAGON_V6_vgtuw
   31488       {Intrinsic::hexagon_V6_vgtuw_128B, 40932}, // __builtin_HEXAGON_V6_vgtuw_128B
   31489       {Intrinsic::hexagon_V6_vgtuw_and, 40964}, // __builtin_HEXAGON_V6_vgtuw_and
   31490       {Intrinsic::hexagon_V6_vgtuw_and_128B, 40995}, // __builtin_HEXAGON_V6_vgtuw_and_128B
   31491       {Intrinsic::hexagon_V6_vgtuw_or, 41031}, // __builtin_HEXAGON_V6_vgtuw_or
   31492       {Intrinsic::hexagon_V6_vgtuw_or_128B, 41061}, // __builtin_HEXAGON_V6_vgtuw_or_128B
   31493       {Intrinsic::hexagon_V6_vgtuw_xor, 41096}, // __builtin_HEXAGON_V6_vgtuw_xor
   31494       {Intrinsic::hexagon_V6_vgtuw_xor_128B, 41127}, // __builtin_HEXAGON_V6_vgtuw_xor_128B
   31495       {Intrinsic::hexagon_V6_vgtw, 41163}, // __builtin_HEXAGON_V6_vgtw
   31496       {Intrinsic::hexagon_V6_vgtw_128B, 41189}, // __builtin_HEXAGON_V6_vgtw_128B
   31497       {Intrinsic::hexagon_V6_vgtw_and, 41220}, // __builtin_HEXAGON_V6_vgtw_and
   31498       {Intrinsic::hexagon_V6_vgtw_and_128B, 41250}, // __builtin_HEXAGON_V6_vgtw_and_128B
   31499       {Intrinsic::hexagon_V6_vgtw_or, 41285}, // __builtin_HEXAGON_V6_vgtw_or
   31500       {Intrinsic::hexagon_V6_vgtw_or_128B, 41314}, // __builtin_HEXAGON_V6_vgtw_or_128B
   31501       {Intrinsic::hexagon_V6_vgtw_xor, 41348}, // __builtin_HEXAGON_V6_vgtw_xor
   31502       {Intrinsic::hexagon_V6_vgtw_xor_128B, 41378}, // __builtin_HEXAGON_V6_vgtw_xor_128B
   31503       {Intrinsic::hexagon_V6_vinsertwr, 41413}, // __builtin_HEXAGON_V6_vinsertwr
   31504       {Intrinsic::hexagon_V6_vinsertwr_128B, 41444}, // __builtin_HEXAGON_V6_vinsertwr_128B
   31505       {Intrinsic::hexagon_V6_vlalignb, 41480}, // __builtin_HEXAGON_V6_vlalignb
   31506       {Intrinsic::hexagon_V6_vlalignb_128B, 41510}, // __builtin_HEXAGON_V6_vlalignb_128B
   31507       {Intrinsic::hexagon_V6_vlalignbi, 41545}, // __builtin_HEXAGON_V6_vlalignbi
   31508       {Intrinsic::hexagon_V6_vlalignbi_128B, 41576}, // __builtin_HEXAGON_V6_vlalignbi_128B
   31509       {Intrinsic::hexagon_V6_vlsrb, 41612}, // __builtin_HEXAGON_V6_vlsrb
   31510       {Intrinsic::hexagon_V6_vlsrb_128B, 41639}, // __builtin_HEXAGON_V6_vlsrb_128B
   31511       {Intrinsic::hexagon_V6_vlsrh, 41671}, // __builtin_HEXAGON_V6_vlsrh
   31512       {Intrinsic::hexagon_V6_vlsrh_128B, 41698}, // __builtin_HEXAGON_V6_vlsrh_128B
   31513       {Intrinsic::hexagon_V6_vlsrhv, 41730}, // __builtin_HEXAGON_V6_vlsrhv
   31514       {Intrinsic::hexagon_V6_vlsrhv_128B, 41758}, // __builtin_HEXAGON_V6_vlsrhv_128B
   31515       {Intrinsic::hexagon_V6_vlsrw, 41791}, // __builtin_HEXAGON_V6_vlsrw
   31516       {Intrinsic::hexagon_V6_vlsrw_128B, 41818}, // __builtin_HEXAGON_V6_vlsrw_128B
   31517       {Intrinsic::hexagon_V6_vlsrwv, 41850}, // __builtin_HEXAGON_V6_vlsrwv
   31518       {Intrinsic::hexagon_V6_vlsrwv_128B, 41878}, // __builtin_HEXAGON_V6_vlsrwv_128B
   31519       {Intrinsic::hexagon_V6_vlutb, 41911}, // __builtin_HEXAGON_V6_vlutb
   31520       {Intrinsic::hexagon_V6_vlutb_128B, 41938}, // __builtin_HEXAGON_V6_vlutb_128B
   31521       {Intrinsic::hexagon_V6_vlutb_acc, 41970}, // __builtin_HEXAGON_V6_vlutb_acc
   31522       {Intrinsic::hexagon_V6_vlutb_acc_128B, 42001}, // __builtin_HEXAGON_V6_vlutb_acc_128B
   31523       {Intrinsic::hexagon_V6_vlutb_dv, 42037}, // __builtin_HEXAGON_V6_vlutb_dv
   31524       {Intrinsic::hexagon_V6_vlutb_dv_128B, 42067}, // __builtin_HEXAGON_V6_vlutb_dv_128B
   31525       {Intrinsic::hexagon_V6_vlutb_dv_acc, 42102}, // __builtin_HEXAGON_V6_vlutb_dv_acc
   31526       {Intrinsic::hexagon_V6_vlutb_dv_acc_128B, 42136}, // __builtin_HEXAGON_V6_vlutb_dv_acc_128B
   31527       {Intrinsic::hexagon_V6_vlutvvb, 42175}, // __builtin_HEXAGON_V6_vlutvvb
   31528       {Intrinsic::hexagon_V6_vlutvvb_128B, 42204}, // __builtin_HEXAGON_V6_vlutvvb_128B
   31529       {Intrinsic::hexagon_V6_vlutvvb_nm, 42238}, // __builtin_HEXAGON_V6_vlutvvb_nm
   31530       {Intrinsic::hexagon_V6_vlutvvb_nm_128B, 42270}, // __builtin_HEXAGON_V6_vlutvvb_nm_128B
   31531       {Intrinsic::hexagon_V6_vlutvvb_oracc, 42307}, // __builtin_HEXAGON_V6_vlutvvb_oracc
   31532       {Intrinsic::hexagon_V6_vlutvvb_oracc_128B, 42342}, // __builtin_HEXAGON_V6_vlutvvb_oracc_128B
   31533       {Intrinsic::hexagon_V6_vlutvvb_oracci, 42382}, // __builtin_HEXAGON_V6_vlutvvb_oracci
   31534       {Intrinsic::hexagon_V6_vlutvvb_oracci_128B, 42418}, // __builtin_HEXAGON_V6_vlutvvb_oracci_128B
   31535       {Intrinsic::hexagon_V6_vlutvvbi, 42459}, // __builtin_HEXAGON_V6_vlutvvbi
   31536       {Intrinsic::hexagon_V6_vlutvvbi_128B, 42489}, // __builtin_HEXAGON_V6_vlutvvbi_128B
   31537       {Intrinsic::hexagon_V6_vlutvwh, 42524}, // __builtin_HEXAGON_V6_vlutvwh
   31538       {Intrinsic::hexagon_V6_vlutvwh_128B, 42553}, // __builtin_HEXAGON_V6_vlutvwh_128B
   31539       {Intrinsic::hexagon_V6_vlutvwh_nm, 42587}, // __builtin_HEXAGON_V6_vlutvwh_nm
   31540       {Intrinsic::hexagon_V6_vlutvwh_nm_128B, 42619}, // __builtin_HEXAGON_V6_vlutvwh_nm_128B
   31541       {Intrinsic::hexagon_V6_vlutvwh_oracc, 42656}, // __builtin_HEXAGON_V6_vlutvwh_oracc
   31542       {Intrinsic::hexagon_V6_vlutvwh_oracc_128B, 42691}, // __builtin_HEXAGON_V6_vlutvwh_oracc_128B
   31543       {Intrinsic::hexagon_V6_vlutvwh_oracci, 42731}, // __builtin_HEXAGON_V6_vlutvwh_oracci
   31544       {Intrinsic::hexagon_V6_vlutvwh_oracci_128B, 42767}, // __builtin_HEXAGON_V6_vlutvwh_oracci_128B
   31545       {Intrinsic::hexagon_V6_vlutvwhi, 42808}, // __builtin_HEXAGON_V6_vlutvwhi
   31546       {Intrinsic::hexagon_V6_vlutvwhi_128B, 42838}, // __builtin_HEXAGON_V6_vlutvwhi_128B
   31547       {Intrinsic::hexagon_V6_vmaskedstorenq, 42873}, // __builtin_HEXAGON_V6_vmaskedstorenq
   31548       {Intrinsic::hexagon_V6_vmaskedstorenq_128B, 42909}, // __builtin_HEXAGON_V6_vmaskedstorenq_128B
   31549       {Intrinsic::hexagon_V6_vmaskedstorentnq, 42950}, // __builtin_HEXAGON_V6_vmaskedstorentnq
   31550       {Intrinsic::hexagon_V6_vmaskedstorentnq_128B, 42988}, // __builtin_HEXAGON_V6_vmaskedstorentnq_128B
   31551       {Intrinsic::hexagon_V6_vmaskedstorentq, 43031}, // __builtin_HEXAGON_V6_vmaskedstorentq
   31552       {Intrinsic::hexagon_V6_vmaskedstorentq_128B, 43068}, // __builtin_HEXAGON_V6_vmaskedstorentq_128B
   31553       {Intrinsic::hexagon_V6_vmaskedstoreq, 43110}, // __builtin_HEXAGON_V6_vmaskedstoreq
   31554       {Intrinsic::hexagon_V6_vmaskedstoreq_128B, 43145}, // __builtin_HEXAGON_V6_vmaskedstoreq_128B
   31555       {Intrinsic::hexagon_V6_vmaxb, 43185}, // __builtin_HEXAGON_V6_vmaxb
   31556       {Intrinsic::hexagon_V6_vmaxb_128B, 43212}, // __builtin_HEXAGON_V6_vmaxb_128B
   31557       {Intrinsic::hexagon_V6_vmaxh, 43244}, // __builtin_HEXAGON_V6_vmaxh
   31558       {Intrinsic::hexagon_V6_vmaxh_128B, 43271}, // __builtin_HEXAGON_V6_vmaxh_128B
   31559       {Intrinsic::hexagon_V6_vmaxub, 43303}, // __builtin_HEXAGON_V6_vmaxub
   31560       {Intrinsic::hexagon_V6_vmaxub_128B, 43331}, // __builtin_HEXAGON_V6_vmaxub_128B
   31561       {Intrinsic::hexagon_V6_vmaxuh, 43364}, // __builtin_HEXAGON_V6_vmaxuh
   31562       {Intrinsic::hexagon_V6_vmaxuh_128B, 43392}, // __builtin_HEXAGON_V6_vmaxuh_128B
   31563       {Intrinsic::hexagon_V6_vmaxw, 43425}, // __builtin_HEXAGON_V6_vmaxw
   31564       {Intrinsic::hexagon_V6_vmaxw_128B, 43452}, // __builtin_HEXAGON_V6_vmaxw_128B
   31565       {Intrinsic::hexagon_V6_vminb, 43484}, // __builtin_HEXAGON_V6_vminb
   31566       {Intrinsic::hexagon_V6_vminb_128B, 43511}, // __builtin_HEXAGON_V6_vminb_128B
   31567       {Intrinsic::hexagon_V6_vminh, 43543}, // __builtin_HEXAGON_V6_vminh
   31568       {Intrinsic::hexagon_V6_vminh_128B, 43570}, // __builtin_HEXAGON_V6_vminh_128B
   31569       {Intrinsic::hexagon_V6_vminub, 43602}, // __builtin_HEXAGON_V6_vminub
   31570       {Intrinsic::hexagon_V6_vminub_128B, 43630}, // __builtin_HEXAGON_V6_vminub_128B
   31571       {Intrinsic::hexagon_V6_vminuh, 43663}, // __builtin_HEXAGON_V6_vminuh
   31572       {Intrinsic::hexagon_V6_vminuh_128B, 43691}, // __builtin_HEXAGON_V6_vminuh_128B
   31573       {Intrinsic::hexagon_V6_vminw, 43724}, // __builtin_HEXAGON_V6_vminw
   31574       {Intrinsic::hexagon_V6_vminw_128B, 43751}, // __builtin_HEXAGON_V6_vminw_128B
   31575       {Intrinsic::hexagon_V6_vmpabus, 43783}, // __builtin_HEXAGON_V6_vmpabus
   31576       {Intrinsic::hexagon_V6_vmpabus_128B, 43812}, // __builtin_HEXAGON_V6_vmpabus_128B
   31577       {Intrinsic::hexagon_V6_vmpabus_acc, 43846}, // __builtin_HEXAGON_V6_vmpabus_acc
   31578       {Intrinsic::hexagon_V6_vmpabus_acc_128B, 43879}, // __builtin_HEXAGON_V6_vmpabus_acc_128B
   31579       {Intrinsic::hexagon_V6_vmpabusv, 43917}, // __builtin_HEXAGON_V6_vmpabusv
   31580       {Intrinsic::hexagon_V6_vmpabusv_128B, 43947}, // __builtin_HEXAGON_V6_vmpabusv_128B
   31581       {Intrinsic::hexagon_V6_vmpabuuv, 43982}, // __builtin_HEXAGON_V6_vmpabuuv
   31582       {Intrinsic::hexagon_V6_vmpabuuv_128B, 44012}, // __builtin_HEXAGON_V6_vmpabuuv_128B
   31583       {Intrinsic::hexagon_V6_vmpahb, 44047}, // __builtin_HEXAGON_V6_vmpahb
   31584       {Intrinsic::hexagon_V6_vmpahb_128B, 44075}, // __builtin_HEXAGON_V6_vmpahb_128B
   31585       {Intrinsic::hexagon_V6_vmpahb_acc, 44108}, // __builtin_HEXAGON_V6_vmpahb_acc
   31586       {Intrinsic::hexagon_V6_vmpahb_acc_128B, 44140}, // __builtin_HEXAGON_V6_vmpahb_acc_128B
   31587       {Intrinsic::hexagon_V6_vmpauhb, 44177}, // __builtin_HEXAGON_V6_vmpauhb
   31588       {Intrinsic::hexagon_V6_vmpauhb_128B, 44206}, // __builtin_HEXAGON_V6_vmpauhb_128B
   31589       {Intrinsic::hexagon_V6_vmpauhb_acc, 44240}, // __builtin_HEXAGON_V6_vmpauhb_acc
   31590       {Intrinsic::hexagon_V6_vmpauhb_acc_128B, 44273}, // __builtin_HEXAGON_V6_vmpauhb_acc_128B
   31591       {Intrinsic::hexagon_V6_vmpybus, 44311}, // __builtin_HEXAGON_V6_vmpybus
   31592       {Intrinsic::hexagon_V6_vmpybus_128B, 44340}, // __builtin_HEXAGON_V6_vmpybus_128B
   31593       {Intrinsic::hexagon_V6_vmpybus_acc, 44374}, // __builtin_HEXAGON_V6_vmpybus_acc
   31594       {Intrinsic::hexagon_V6_vmpybus_acc_128B, 44407}, // __builtin_HEXAGON_V6_vmpybus_acc_128B
   31595       {Intrinsic::hexagon_V6_vmpybusv, 44445}, // __builtin_HEXAGON_V6_vmpybusv
   31596       {Intrinsic::hexagon_V6_vmpybusv_128B, 44475}, // __builtin_HEXAGON_V6_vmpybusv_128B
   31597       {Intrinsic::hexagon_V6_vmpybusv_acc, 44510}, // __builtin_HEXAGON_V6_vmpybusv_acc
   31598       {Intrinsic::hexagon_V6_vmpybusv_acc_128B, 44544}, // __builtin_HEXAGON_V6_vmpybusv_acc_128B
   31599       {Intrinsic::hexagon_V6_vmpybv, 44583}, // __builtin_HEXAGON_V6_vmpybv
   31600       {Intrinsic::hexagon_V6_vmpybv_128B, 44611}, // __builtin_HEXAGON_V6_vmpybv_128B
   31601       {Intrinsic::hexagon_V6_vmpybv_acc, 44644}, // __builtin_HEXAGON_V6_vmpybv_acc
   31602       {Intrinsic::hexagon_V6_vmpybv_acc_128B, 44676}, // __builtin_HEXAGON_V6_vmpybv_acc_128B
   31603       {Intrinsic::hexagon_V6_vmpyewuh, 44713}, // __builtin_HEXAGON_V6_vmpyewuh
   31604       {Intrinsic::hexagon_V6_vmpyewuh_128B, 44743}, // __builtin_HEXAGON_V6_vmpyewuh_128B
   31605       {Intrinsic::hexagon_V6_vmpyewuh_64, 44778}, // __builtin_HEXAGON_V6_vmpyewuh_64
   31606       {Intrinsic::hexagon_V6_vmpyewuh_64_128B, 44811}, // __builtin_HEXAGON_V6_vmpyewuh_64_128B
   31607       {Intrinsic::hexagon_V6_vmpyh, 44849}, // __builtin_HEXAGON_V6_vmpyh
   31608       {Intrinsic::hexagon_V6_vmpyh_128B, 44876}, // __builtin_HEXAGON_V6_vmpyh_128B
   31609       {Intrinsic::hexagon_V6_vmpyhsat_acc, 44908}, // __builtin_HEXAGON_V6_vmpyhsat_acc
   31610       {Intrinsic::hexagon_V6_vmpyhsat_acc_128B, 44942}, // __builtin_HEXAGON_V6_vmpyhsat_acc_128B
   31611       {Intrinsic::hexagon_V6_vmpyhsrs, 44981}, // __builtin_HEXAGON_V6_vmpyhsrs
   31612       {Intrinsic::hexagon_V6_vmpyhsrs_128B, 45011}, // __builtin_HEXAGON_V6_vmpyhsrs_128B
   31613       {Intrinsic::hexagon_V6_vmpyhss, 45046}, // __builtin_HEXAGON_V6_vmpyhss
   31614       {Intrinsic::hexagon_V6_vmpyhss_128B, 45075}, // __builtin_HEXAGON_V6_vmpyhss_128B
   31615       {Intrinsic::hexagon_V6_vmpyhus, 45109}, // __builtin_HEXAGON_V6_vmpyhus
   31616       {Intrinsic::hexagon_V6_vmpyhus_128B, 45138}, // __builtin_HEXAGON_V6_vmpyhus_128B
   31617       {Intrinsic::hexagon_V6_vmpyhus_acc, 45172}, // __builtin_HEXAGON_V6_vmpyhus_acc
   31618       {Intrinsic::hexagon_V6_vmpyhus_acc_128B, 45205}, // __builtin_HEXAGON_V6_vmpyhus_acc_128B
   31619       {Intrinsic::hexagon_V6_vmpyhv, 45243}, // __builtin_HEXAGON_V6_vmpyhv
   31620       {Intrinsic::hexagon_V6_vmpyhv_128B, 45271}, // __builtin_HEXAGON_V6_vmpyhv_128B
   31621       {Intrinsic::hexagon_V6_vmpyhv_acc, 45304}, // __builtin_HEXAGON_V6_vmpyhv_acc
   31622       {Intrinsic::hexagon_V6_vmpyhv_acc_128B, 45336}, // __builtin_HEXAGON_V6_vmpyhv_acc_128B
   31623       {Intrinsic::hexagon_V6_vmpyhvsrs, 45373}, // __builtin_HEXAGON_V6_vmpyhvsrs
   31624       {Intrinsic::hexagon_V6_vmpyhvsrs_128B, 45404}, // __builtin_HEXAGON_V6_vmpyhvsrs_128B
   31625       {Intrinsic::hexagon_V6_vmpyieoh, 45440}, // __builtin_HEXAGON_V6_vmpyieoh
   31626       {Intrinsic::hexagon_V6_vmpyieoh_128B, 45470}, // __builtin_HEXAGON_V6_vmpyieoh_128B
   31627       {Intrinsic::hexagon_V6_vmpyiewh_acc, 45505}, // __builtin_HEXAGON_V6_vmpyiewh_acc
   31628       {Intrinsic::hexagon_V6_vmpyiewh_acc_128B, 45539}, // __builtin_HEXAGON_V6_vmpyiewh_acc_128B
   31629       {Intrinsic::hexagon_V6_vmpyiewuh, 45578}, // __builtin_HEXAGON_V6_vmpyiewuh
   31630       {Intrinsic::hexagon_V6_vmpyiewuh_128B, 45609}, // __builtin_HEXAGON_V6_vmpyiewuh_128B
   31631       {Intrinsic::hexagon_V6_vmpyiewuh_acc, 45645}, // __builtin_HEXAGON_V6_vmpyiewuh_acc
   31632       {Intrinsic::hexagon_V6_vmpyiewuh_acc_128B, 45680}, // __builtin_HEXAGON_V6_vmpyiewuh_acc_128B
   31633       {Intrinsic::hexagon_V6_vmpyih, 45720}, // __builtin_HEXAGON_V6_vmpyih
   31634       {Intrinsic::hexagon_V6_vmpyih_128B, 45748}, // __builtin_HEXAGON_V6_vmpyih_128B
   31635       {Intrinsic::hexagon_V6_vmpyih_acc, 45781}, // __builtin_HEXAGON_V6_vmpyih_acc
   31636       {Intrinsic::hexagon_V6_vmpyih_acc_128B, 45813}, // __builtin_HEXAGON_V6_vmpyih_acc_128B
   31637       {Intrinsic::hexagon_V6_vmpyihb, 45850}, // __builtin_HEXAGON_V6_vmpyihb
   31638       {Intrinsic::hexagon_V6_vmpyihb_128B, 45879}, // __builtin_HEXAGON_V6_vmpyihb_128B
   31639       {Intrinsic::hexagon_V6_vmpyihb_acc, 45913}, // __builtin_HEXAGON_V6_vmpyihb_acc
   31640       {Intrinsic::hexagon_V6_vmpyihb_acc_128B, 45946}, // __builtin_HEXAGON_V6_vmpyihb_acc_128B
   31641       {Intrinsic::hexagon_V6_vmpyiowh, 45984}, // __builtin_HEXAGON_V6_vmpyiowh
   31642       {Intrinsic::hexagon_V6_vmpyiowh_128B, 46014}, // __builtin_HEXAGON_V6_vmpyiowh_128B
   31643       {Intrinsic::hexagon_V6_vmpyiwb, 46049}, // __builtin_HEXAGON_V6_vmpyiwb
   31644       {Intrinsic::hexagon_V6_vmpyiwb_128B, 46078}, // __builtin_HEXAGON_V6_vmpyiwb_128B
   31645       {Intrinsic::hexagon_V6_vmpyiwb_acc, 46112}, // __builtin_HEXAGON_V6_vmpyiwb_acc
   31646       {Intrinsic::hexagon_V6_vmpyiwb_acc_128B, 46145}, // __builtin_HEXAGON_V6_vmpyiwb_acc_128B
   31647       {Intrinsic::hexagon_V6_vmpyiwh, 46183}, // __builtin_HEXAGON_V6_vmpyiwh
   31648       {Intrinsic::hexagon_V6_vmpyiwh_128B, 46212}, // __builtin_HEXAGON_V6_vmpyiwh_128B
   31649       {Intrinsic::hexagon_V6_vmpyiwh_acc, 46246}, // __builtin_HEXAGON_V6_vmpyiwh_acc
   31650       {Intrinsic::hexagon_V6_vmpyiwh_acc_128B, 46279}, // __builtin_HEXAGON_V6_vmpyiwh_acc_128B
   31651       {Intrinsic::hexagon_V6_vmpyiwub, 46317}, // __builtin_HEXAGON_V6_vmpyiwub
   31652       {Intrinsic::hexagon_V6_vmpyiwub_128B, 46347}, // __builtin_HEXAGON_V6_vmpyiwub_128B
   31653       {Intrinsic::hexagon_V6_vmpyiwub_acc, 46382}, // __builtin_HEXAGON_V6_vmpyiwub_acc
   31654       {Intrinsic::hexagon_V6_vmpyiwub_acc_128B, 46416}, // __builtin_HEXAGON_V6_vmpyiwub_acc_128B
   31655       {Intrinsic::hexagon_V6_vmpyowh, 46455}, // __builtin_HEXAGON_V6_vmpyowh
   31656       {Intrinsic::hexagon_V6_vmpyowh_128B, 46484}, // __builtin_HEXAGON_V6_vmpyowh_128B
   31657       {Intrinsic::hexagon_V6_vmpyowh_64_acc, 46518}, // __builtin_HEXAGON_V6_vmpyowh_64_acc
   31658       {Intrinsic::hexagon_V6_vmpyowh_64_acc_128B, 46554}, // __builtin_HEXAGON_V6_vmpyowh_64_acc_128B
   31659       {Intrinsic::hexagon_V6_vmpyowh_rnd, 46595}, // __builtin_HEXAGON_V6_vmpyowh_rnd
   31660       {Intrinsic::hexagon_V6_vmpyowh_rnd_128B, 46628}, // __builtin_HEXAGON_V6_vmpyowh_rnd_128B
   31661       {Intrinsic::hexagon_V6_vmpyowh_rnd_sacc, 46666}, // __builtin_HEXAGON_V6_vmpyowh_rnd_sacc
   31662       {Intrinsic::hexagon_V6_vmpyowh_rnd_sacc_128B, 46704}, // __builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B
   31663       {Intrinsic::hexagon_V6_vmpyowh_sacc, 46747}, // __builtin_HEXAGON_V6_vmpyowh_sacc
   31664       {Intrinsic::hexagon_V6_vmpyowh_sacc_128B, 46781}, // __builtin_HEXAGON_V6_vmpyowh_sacc_128B
   31665       {Intrinsic::hexagon_V6_vmpyub, 46820}, // __builtin_HEXAGON_V6_vmpyub
   31666       {Intrinsic::hexagon_V6_vmpyub_128B, 46848}, // __builtin_HEXAGON_V6_vmpyub_128B
   31667       {Intrinsic::hexagon_V6_vmpyub_acc, 46881}, // __builtin_HEXAGON_V6_vmpyub_acc
   31668       {Intrinsic::hexagon_V6_vmpyub_acc_128B, 46913}, // __builtin_HEXAGON_V6_vmpyub_acc_128B
   31669       {Intrinsic::hexagon_V6_vmpyubv, 46950}, // __builtin_HEXAGON_V6_vmpyubv
   31670       {Intrinsic::hexagon_V6_vmpyubv_128B, 46979}, // __builtin_HEXAGON_V6_vmpyubv_128B
   31671       {Intrinsic::hexagon_V6_vmpyubv_acc, 47013}, // __builtin_HEXAGON_V6_vmpyubv_acc
   31672       {Intrinsic::hexagon_V6_vmpyubv_acc_128B, 47046}, // __builtin_HEXAGON_V6_vmpyubv_acc_128B
   31673       {Intrinsic::hexagon_V6_vmpyuh, 47084}, // __builtin_HEXAGON_V6_vmpyuh
   31674       {Intrinsic::hexagon_V6_vmpyuh_128B, 47112}, // __builtin_HEXAGON_V6_vmpyuh_128B
   31675       {Intrinsic::hexagon_V6_vmpyuh_acc, 47145}, // __builtin_HEXAGON_V6_vmpyuh_acc
   31676       {Intrinsic::hexagon_V6_vmpyuh_acc_128B, 47177}, // __builtin_HEXAGON_V6_vmpyuh_acc_128B
   31677       {Intrinsic::hexagon_V6_vmpyuhv, 47214}, // __builtin_HEXAGON_V6_vmpyuhv
   31678       {Intrinsic::hexagon_V6_vmpyuhv_128B, 47243}, // __builtin_HEXAGON_V6_vmpyuhv_128B
   31679       {Intrinsic::hexagon_V6_vmpyuhv_acc, 47277}, // __builtin_HEXAGON_V6_vmpyuhv_acc
   31680       {Intrinsic::hexagon_V6_vmpyuhv_acc_128B, 47310}, // __builtin_HEXAGON_V6_vmpyuhv_acc_128B
   31681       {Intrinsic::hexagon_V6_vmux, 47348}, // __builtin_HEXAGON_V6_vmux
   31682       {Intrinsic::hexagon_V6_vmux_128B, 47374}, // __builtin_HEXAGON_V6_vmux_128B
   31683       {Intrinsic::hexagon_V6_vnavgh, 47405}, // __builtin_HEXAGON_V6_vnavgh
   31684       {Intrinsic::hexagon_V6_vnavgh_128B, 47433}, // __builtin_HEXAGON_V6_vnavgh_128B
   31685       {Intrinsic::hexagon_V6_vnavgub, 47466}, // __builtin_HEXAGON_V6_vnavgub
   31686       {Intrinsic::hexagon_V6_vnavgub_128B, 47495}, // __builtin_HEXAGON_V6_vnavgub_128B
   31687       {Intrinsic::hexagon_V6_vnavgw, 47529}, // __builtin_HEXAGON_V6_vnavgw
   31688       {Intrinsic::hexagon_V6_vnavgw_128B, 47557}, // __builtin_HEXAGON_V6_vnavgw_128B
   31689       {Intrinsic::hexagon_V6_vnormamth, 47590}, // __builtin_HEXAGON_V6_vnormamth
   31690       {Intrinsic::hexagon_V6_vnormamth_128B, 47621}, // __builtin_HEXAGON_V6_vnormamth_128B
   31691       {Intrinsic::hexagon_V6_vnormamtw, 47657}, // __builtin_HEXAGON_V6_vnormamtw
   31692       {Intrinsic::hexagon_V6_vnormamtw_128B, 47688}, // __builtin_HEXAGON_V6_vnormamtw_128B
   31693       {Intrinsic::hexagon_V6_vnot, 47724}, // __builtin_HEXAGON_V6_vnot
   31694       {Intrinsic::hexagon_V6_vnot_128B, 47750}, // __builtin_HEXAGON_V6_vnot_128B
   31695       {Intrinsic::hexagon_V6_vor, 47781}, // __builtin_HEXAGON_V6_vor
   31696       {Intrinsic::hexagon_V6_vor_128B, 47806}, // __builtin_HEXAGON_V6_vor_128B
   31697       {Intrinsic::hexagon_V6_vpackeb, 47836}, // __builtin_HEXAGON_V6_vpackeb
   31698       {Intrinsic::hexagon_V6_vpackeb_128B, 47865}, // __builtin_HEXAGON_V6_vpackeb_128B
   31699       {Intrinsic::hexagon_V6_vpackeh, 47899}, // __builtin_HEXAGON_V6_vpackeh
   31700       {Intrinsic::hexagon_V6_vpackeh_128B, 47928}, // __builtin_HEXAGON_V6_vpackeh_128B
   31701       {Intrinsic::hexagon_V6_vpackhb_sat, 47962}, // __builtin_HEXAGON_V6_vpackhb_sat
   31702       {Intrinsic::hexagon_V6_vpackhb_sat_128B, 47995}, // __builtin_HEXAGON_V6_vpackhb_sat_128B
   31703       {Intrinsic::hexagon_V6_vpackhub_sat, 48033}, // __builtin_HEXAGON_V6_vpackhub_sat
   31704       {Intrinsic::hexagon_V6_vpackhub_sat_128B, 48067}, // __builtin_HEXAGON_V6_vpackhub_sat_128B
   31705       {Intrinsic::hexagon_V6_vpackob, 48106}, // __builtin_HEXAGON_V6_vpackob
   31706       {Intrinsic::hexagon_V6_vpackob_128B, 48135}, // __builtin_HEXAGON_V6_vpackob_128B
   31707       {Intrinsic::hexagon_V6_vpackoh, 48169}, // __builtin_HEXAGON_V6_vpackoh
   31708       {Intrinsic::hexagon_V6_vpackoh_128B, 48198}, // __builtin_HEXAGON_V6_vpackoh_128B
   31709       {Intrinsic::hexagon_V6_vpackwh_sat, 48232}, // __builtin_HEXAGON_V6_vpackwh_sat
   31710       {Intrinsic::hexagon_V6_vpackwh_sat_128B, 48265}, // __builtin_HEXAGON_V6_vpackwh_sat_128B
   31711       {Intrinsic::hexagon_V6_vpackwuh_sat, 48303}, // __builtin_HEXAGON_V6_vpackwuh_sat
   31712       {Intrinsic::hexagon_V6_vpackwuh_sat_128B, 48337}, // __builtin_HEXAGON_V6_vpackwuh_sat_128B
   31713       {Intrinsic::hexagon_V6_vpopcounth, 48376}, // __builtin_HEXAGON_V6_vpopcounth
   31714       {Intrinsic::hexagon_V6_vpopcounth_128B, 48408}, // __builtin_HEXAGON_V6_vpopcounth_128B
   31715       {Intrinsic::hexagon_V6_vrdelta, 48445}, // __builtin_HEXAGON_V6_vrdelta
   31716       {Intrinsic::hexagon_V6_vrdelta_128B, 48474}, // __builtin_HEXAGON_V6_vrdelta_128B
   31717       {Intrinsic::hexagon_V6_vrmpybus, 48508}, // __builtin_HEXAGON_V6_vrmpybus
   31718       {Intrinsic::hexagon_V6_vrmpybus_128B, 48538}, // __builtin_HEXAGON_V6_vrmpybus_128B
   31719       {Intrinsic::hexagon_V6_vrmpybus_acc, 48573}, // __builtin_HEXAGON_V6_vrmpybus_acc
   31720       {Intrinsic::hexagon_V6_vrmpybus_acc_128B, 48607}, // __builtin_HEXAGON_V6_vrmpybus_acc_128B
   31721       {Intrinsic::hexagon_V6_vrmpybusi, 48646}, // __builtin_HEXAGON_V6_vrmpybusi
   31722       {Intrinsic::hexagon_V6_vrmpybusi_128B, 48677}, // __builtin_HEXAGON_V6_vrmpybusi_128B
   31723       {Intrinsic::hexagon_V6_vrmpybusi_acc, 48713}, // __builtin_HEXAGON_V6_vrmpybusi_acc
   31724       {Intrinsic::hexagon_V6_vrmpybusi_acc_128B, 48748}, // __builtin_HEXAGON_V6_vrmpybusi_acc_128B
   31725       {Intrinsic::hexagon_V6_vrmpybusv, 48788}, // __builtin_HEXAGON_V6_vrmpybusv
   31726       {Intrinsic::hexagon_V6_vrmpybusv_128B, 48819}, // __builtin_HEXAGON_V6_vrmpybusv_128B
   31727       {Intrinsic::hexagon_V6_vrmpybusv_acc, 48855}, // __builtin_HEXAGON_V6_vrmpybusv_acc
   31728       {Intrinsic::hexagon_V6_vrmpybusv_acc_128B, 48890}, // __builtin_HEXAGON_V6_vrmpybusv_acc_128B
   31729       {Intrinsic::hexagon_V6_vrmpybv, 48930}, // __builtin_HEXAGON_V6_vrmpybv
   31730       {Intrinsic::hexagon_V6_vrmpybv_128B, 48959}, // __builtin_HEXAGON_V6_vrmpybv_128B
   31731       {Intrinsic::hexagon_V6_vrmpybv_acc, 48993}, // __builtin_HEXAGON_V6_vrmpybv_acc
   31732       {Intrinsic::hexagon_V6_vrmpybv_acc_128B, 49026}, // __builtin_HEXAGON_V6_vrmpybv_acc_128B
   31733       {Intrinsic::hexagon_V6_vrmpyub, 49064}, // __builtin_HEXAGON_V6_vrmpyub
   31734       {Intrinsic::hexagon_V6_vrmpyub_128B, 49093}, // __builtin_HEXAGON_V6_vrmpyub_128B
   31735       {Intrinsic::hexagon_V6_vrmpyub_acc, 49127}, // __builtin_HEXAGON_V6_vrmpyub_acc
   31736       {Intrinsic::hexagon_V6_vrmpyub_acc_128B, 49160}, // __builtin_HEXAGON_V6_vrmpyub_acc_128B
   31737       {Intrinsic::hexagon_V6_vrmpyubi, 49198}, // __builtin_HEXAGON_V6_vrmpyubi
   31738       {Intrinsic::hexagon_V6_vrmpyubi_128B, 49228}, // __builtin_HEXAGON_V6_vrmpyubi_128B
   31739       {Intrinsic::hexagon_V6_vrmpyubi_acc, 49263}, // __builtin_HEXAGON_V6_vrmpyubi_acc
   31740       {Intrinsic::hexagon_V6_vrmpyubi_acc_128B, 49297}, // __builtin_HEXAGON_V6_vrmpyubi_acc_128B
   31741       {Intrinsic::hexagon_V6_vrmpyubv, 49336}, // __builtin_HEXAGON_V6_vrmpyubv
   31742       {Intrinsic::hexagon_V6_vrmpyubv_128B, 49366}, // __builtin_HEXAGON_V6_vrmpyubv_128B
   31743       {Intrinsic::hexagon_V6_vrmpyubv_acc, 49401}, // __builtin_HEXAGON_V6_vrmpyubv_acc
   31744       {Intrinsic::hexagon_V6_vrmpyubv_acc_128B, 49435}, // __builtin_HEXAGON_V6_vrmpyubv_acc_128B
   31745       {Intrinsic::hexagon_V6_vror, 49474}, // __builtin_HEXAGON_V6_vror
   31746       {Intrinsic::hexagon_V6_vror_128B, 49500}, // __builtin_HEXAGON_V6_vror_128B
   31747       {Intrinsic::hexagon_V6_vroundhb, 49531}, // __builtin_HEXAGON_V6_vroundhb
   31748       {Intrinsic::hexagon_V6_vroundhb_128B, 49561}, // __builtin_HEXAGON_V6_vroundhb_128B
   31749       {Intrinsic::hexagon_V6_vroundhub, 49596}, // __builtin_HEXAGON_V6_vroundhub
   31750       {Intrinsic::hexagon_V6_vroundhub_128B, 49627}, // __builtin_HEXAGON_V6_vroundhub_128B
   31751       {Intrinsic::hexagon_V6_vrounduhub, 49663}, // __builtin_HEXAGON_V6_vrounduhub
   31752       {Intrinsic::hexagon_V6_vrounduhub_128B, 49695}, // __builtin_HEXAGON_V6_vrounduhub_128B
   31753       {Intrinsic::hexagon_V6_vrounduwuh, 49732}, // __builtin_HEXAGON_V6_vrounduwuh
   31754       {Intrinsic::hexagon_V6_vrounduwuh_128B, 49764}, // __builtin_HEXAGON_V6_vrounduwuh_128B
   31755       {Intrinsic::hexagon_V6_vroundwh, 49801}, // __builtin_HEXAGON_V6_vroundwh
   31756       {Intrinsic::hexagon_V6_vroundwh_128B, 49831}, // __builtin_HEXAGON_V6_vroundwh_128B
   31757       {Intrinsic::hexagon_V6_vroundwuh, 49866}, // __builtin_HEXAGON_V6_vroundwuh
   31758       {Intrinsic::hexagon_V6_vroundwuh_128B, 49897}, // __builtin_HEXAGON_V6_vroundwuh_128B
   31759       {Intrinsic::hexagon_V6_vrsadubi, 49933}, // __builtin_HEXAGON_V6_vrsadubi
   31760       {Intrinsic::hexagon_V6_vrsadubi_128B, 49963}, // __builtin_HEXAGON_V6_vrsadubi_128B
   31761       {Intrinsic::hexagon_V6_vrsadubi_acc, 49998}, // __builtin_HEXAGON_V6_vrsadubi_acc
   31762       {Intrinsic::hexagon_V6_vrsadubi_acc_128B, 50032}, // __builtin_HEXAGON_V6_vrsadubi_acc_128B
   31763       {Intrinsic::hexagon_V6_vsathub, 50071}, // __builtin_HEXAGON_V6_vsathub
   31764       {Intrinsic::hexagon_V6_vsathub_128B, 50100}, // __builtin_HEXAGON_V6_vsathub_128B
   31765       {Intrinsic::hexagon_V6_vsatuwuh, 50134}, // __builtin_HEXAGON_V6_vsatuwuh
   31766       {Intrinsic::hexagon_V6_vsatuwuh_128B, 50164}, // __builtin_HEXAGON_V6_vsatuwuh_128B
   31767       {Intrinsic::hexagon_V6_vsatwh, 50199}, // __builtin_HEXAGON_V6_vsatwh
   31768       {Intrinsic::hexagon_V6_vsatwh_128B, 50227}, // __builtin_HEXAGON_V6_vsatwh_128B
   31769       {Intrinsic::hexagon_V6_vsb, 50260}, // __builtin_HEXAGON_V6_vsb
   31770       {Intrinsic::hexagon_V6_vsb_128B, 50285}, // __builtin_HEXAGON_V6_vsb_128B
   31771       {Intrinsic::hexagon_V6_vsh, 50315}, // __builtin_HEXAGON_V6_vsh
   31772       {Intrinsic::hexagon_V6_vsh_128B, 50340}, // __builtin_HEXAGON_V6_vsh_128B
   31773       {Intrinsic::hexagon_V6_vshufeh, 50370}, // __builtin_HEXAGON_V6_vshufeh
   31774       {Intrinsic::hexagon_V6_vshufeh_128B, 50399}, // __builtin_HEXAGON_V6_vshufeh_128B
   31775       {Intrinsic::hexagon_V6_vshuffb, 50433}, // __builtin_HEXAGON_V6_vshuffb
   31776       {Intrinsic::hexagon_V6_vshuffb_128B, 50462}, // __builtin_HEXAGON_V6_vshuffb_128B
   31777       {Intrinsic::hexagon_V6_vshuffeb, 50496}, // __builtin_HEXAGON_V6_vshuffeb
   31778       {Intrinsic::hexagon_V6_vshuffeb_128B, 50526}, // __builtin_HEXAGON_V6_vshuffeb_128B
   31779       {Intrinsic::hexagon_V6_vshuffh, 50561}, // __builtin_HEXAGON_V6_vshuffh
   31780       {Intrinsic::hexagon_V6_vshuffh_128B, 50590}, // __builtin_HEXAGON_V6_vshuffh_128B
   31781       {Intrinsic::hexagon_V6_vshuffob, 50624}, // __builtin_HEXAGON_V6_vshuffob
   31782       {Intrinsic::hexagon_V6_vshuffob_128B, 50654}, // __builtin_HEXAGON_V6_vshuffob_128B
   31783       {Intrinsic::hexagon_V6_vshuffvdd, 50689}, // __builtin_HEXAGON_V6_vshuffvdd
   31784       {Intrinsic::hexagon_V6_vshuffvdd_128B, 50720}, // __builtin_HEXAGON_V6_vshuffvdd_128B
   31785       {Intrinsic::hexagon_V6_vshufoeb, 50756}, // __builtin_HEXAGON_V6_vshufoeb
   31786       {Intrinsic::hexagon_V6_vshufoeb_128B, 50786}, // __builtin_HEXAGON_V6_vshufoeb_128B
   31787       {Intrinsic::hexagon_V6_vshufoeh, 50821}, // __builtin_HEXAGON_V6_vshufoeh
   31788       {Intrinsic::hexagon_V6_vshufoeh_128B, 50851}, // __builtin_HEXAGON_V6_vshufoeh_128B
   31789       {Intrinsic::hexagon_V6_vshufoh, 50886}, // __builtin_HEXAGON_V6_vshufoh
   31790       {Intrinsic::hexagon_V6_vshufoh_128B, 50915}, // __builtin_HEXAGON_V6_vshufoh_128B
   31791       {Intrinsic::hexagon_V6_vsubb, 50949}, // __builtin_HEXAGON_V6_vsubb
   31792       {Intrinsic::hexagon_V6_vsubb_128B, 50976}, // __builtin_HEXAGON_V6_vsubb_128B
   31793       {Intrinsic::hexagon_V6_vsubb_dv, 51008}, // __builtin_HEXAGON_V6_vsubb_dv
   31794       {Intrinsic::hexagon_V6_vsubb_dv_128B, 51038}, // __builtin_HEXAGON_V6_vsubb_dv_128B
   31795       {Intrinsic::hexagon_V6_vsubbnq, 51073}, // __builtin_HEXAGON_V6_vsubbnq
   31796       {Intrinsic::hexagon_V6_vsubbnq_128B, 51102}, // __builtin_HEXAGON_V6_vsubbnq_128B
   31797       {Intrinsic::hexagon_V6_vsubbq, 51136}, // __builtin_HEXAGON_V6_vsubbq
   31798       {Intrinsic::hexagon_V6_vsubbq_128B, 51164}, // __builtin_HEXAGON_V6_vsubbq_128B
   31799       {Intrinsic::hexagon_V6_vsubbsat, 51197}, // __builtin_HEXAGON_V6_vsubbsat
   31800       {Intrinsic::hexagon_V6_vsubbsat_128B, 51227}, // __builtin_HEXAGON_V6_vsubbsat_128B
   31801       {Intrinsic::hexagon_V6_vsubbsat_dv, 51262}, // __builtin_HEXAGON_V6_vsubbsat_dv
   31802       {Intrinsic::hexagon_V6_vsubbsat_dv_128B, 51295}, // __builtin_HEXAGON_V6_vsubbsat_dv_128B
   31803       {Intrinsic::hexagon_V6_vsubh, 51333}, // __builtin_HEXAGON_V6_vsubh
   31804       {Intrinsic::hexagon_V6_vsubh_128B, 51360}, // __builtin_HEXAGON_V6_vsubh_128B
   31805       {Intrinsic::hexagon_V6_vsubh_dv, 51392}, // __builtin_HEXAGON_V6_vsubh_dv
   31806       {Intrinsic::hexagon_V6_vsubh_dv_128B, 51422}, // __builtin_HEXAGON_V6_vsubh_dv_128B
   31807       {Intrinsic::hexagon_V6_vsubhnq, 51457}, // __builtin_HEXAGON_V6_vsubhnq
   31808       {Intrinsic::hexagon_V6_vsubhnq_128B, 51486}, // __builtin_HEXAGON_V6_vsubhnq_128B
   31809       {Intrinsic::hexagon_V6_vsubhq, 51520}, // __builtin_HEXAGON_V6_vsubhq
   31810       {Intrinsic::hexagon_V6_vsubhq_128B, 51548}, // __builtin_HEXAGON_V6_vsubhq_128B
   31811       {Intrinsic::hexagon_V6_vsubhsat, 51581}, // __builtin_HEXAGON_V6_vsubhsat
   31812       {Intrinsic::hexagon_V6_vsubhsat_128B, 51611}, // __builtin_HEXAGON_V6_vsubhsat_128B
   31813       {Intrinsic::hexagon_V6_vsubhsat_dv, 51646}, // __builtin_HEXAGON_V6_vsubhsat_dv
   31814       {Intrinsic::hexagon_V6_vsubhsat_dv_128B, 51679}, // __builtin_HEXAGON_V6_vsubhsat_dv_128B
   31815       {Intrinsic::hexagon_V6_vsubhw, 51717}, // __builtin_HEXAGON_V6_vsubhw
   31816       {Intrinsic::hexagon_V6_vsubhw_128B, 51745}, // __builtin_HEXAGON_V6_vsubhw_128B
   31817       {Intrinsic::hexagon_V6_vsububh, 51778}, // __builtin_HEXAGON_V6_vsububh
   31818       {Intrinsic::hexagon_V6_vsububh_128B, 51807}, // __builtin_HEXAGON_V6_vsububh_128B
   31819       {Intrinsic::hexagon_V6_vsububsat, 51841}, // __builtin_HEXAGON_V6_vsububsat
   31820       {Intrinsic::hexagon_V6_vsububsat_128B, 51872}, // __builtin_HEXAGON_V6_vsububsat_128B
   31821       {Intrinsic::hexagon_V6_vsububsat_dv, 51908}, // __builtin_HEXAGON_V6_vsububsat_dv
   31822       {Intrinsic::hexagon_V6_vsububsat_dv_128B, 51942}, // __builtin_HEXAGON_V6_vsububsat_dv_128B
   31823       {Intrinsic::hexagon_V6_vsubububb_sat, 51981}, // __builtin_HEXAGON_V6_vsubububb_sat
   31824       {Intrinsic::hexagon_V6_vsubububb_sat_128B, 52016}, // __builtin_HEXAGON_V6_vsubububb_sat_128B
   31825       {Intrinsic::hexagon_V6_vsubuhsat, 52056}, // __builtin_HEXAGON_V6_vsubuhsat
   31826       {Intrinsic::hexagon_V6_vsubuhsat_128B, 52087}, // __builtin_HEXAGON_V6_vsubuhsat_128B
   31827       {Intrinsic::hexagon_V6_vsubuhsat_dv, 52123}, // __builtin_HEXAGON_V6_vsubuhsat_dv
   31828       {Intrinsic::hexagon_V6_vsubuhsat_dv_128B, 52157}, // __builtin_HEXAGON_V6_vsubuhsat_dv_128B
   31829       {Intrinsic::hexagon_V6_vsubuhw, 52196}, // __builtin_HEXAGON_V6_vsubuhw
   31830       {Intrinsic::hexagon_V6_vsubuhw_128B, 52225}, // __builtin_HEXAGON_V6_vsubuhw_128B
   31831       {Intrinsic::hexagon_V6_vsubuwsat, 52259}, // __builtin_HEXAGON_V6_vsubuwsat
   31832       {Intrinsic::hexagon_V6_vsubuwsat_128B, 52290}, // __builtin_HEXAGON_V6_vsubuwsat_128B
   31833       {Intrinsic::hexagon_V6_vsubuwsat_dv, 52326}, // __builtin_HEXAGON_V6_vsubuwsat_dv
   31834       {Intrinsic::hexagon_V6_vsubuwsat_dv_128B, 52360}, // __builtin_HEXAGON_V6_vsubuwsat_dv_128B
   31835       {Intrinsic::hexagon_V6_vsubw, 52399}, // __builtin_HEXAGON_V6_vsubw
   31836       {Intrinsic::hexagon_V6_vsubw_128B, 52426}, // __builtin_HEXAGON_V6_vsubw_128B
   31837       {Intrinsic::hexagon_V6_vsubw_dv, 52458}, // __builtin_HEXAGON_V6_vsubw_dv
   31838       {Intrinsic::hexagon_V6_vsubw_dv_128B, 52488}, // __builtin_HEXAGON_V6_vsubw_dv_128B
   31839       {Intrinsic::hexagon_V6_vsubwnq, 52523}, // __builtin_HEXAGON_V6_vsubwnq
   31840       {Intrinsic::hexagon_V6_vsubwnq_128B, 52552}, // __builtin_HEXAGON_V6_vsubwnq_128B
   31841       {Intrinsic::hexagon_V6_vsubwq, 52586}, // __builtin_HEXAGON_V6_vsubwq
   31842       {Intrinsic::hexagon_V6_vsubwq_128B, 52614}, // __builtin_HEXAGON_V6_vsubwq_128B
   31843       {Intrinsic::hexagon_V6_vsubwsat, 52647}, // __builtin_HEXAGON_V6_vsubwsat
   31844       {Intrinsic::hexagon_V6_vsubwsat_128B, 52677}, // __builtin_HEXAGON_V6_vsubwsat_128B
   31845       {Intrinsic::hexagon_V6_vsubwsat_dv, 52712}, // __builtin_HEXAGON_V6_vsubwsat_dv
   31846       {Intrinsic::hexagon_V6_vsubwsat_dv_128B, 52745}, // __builtin_HEXAGON_V6_vsubwsat_dv_128B
   31847       {Intrinsic::hexagon_V6_vswap, 52783}, // __builtin_HEXAGON_V6_vswap
   31848       {Intrinsic::hexagon_V6_vswap_128B, 52810}, // __builtin_HEXAGON_V6_vswap_128B
   31849       {Intrinsic::hexagon_V6_vtmpyb, 52842}, // __builtin_HEXAGON_V6_vtmpyb
   31850       {Intrinsic::hexagon_V6_vtmpyb_128B, 52870}, // __builtin_HEXAGON_V6_vtmpyb_128B
   31851       {Intrinsic::hexagon_V6_vtmpyb_acc, 52903}, // __builtin_HEXAGON_V6_vtmpyb_acc
   31852       {Intrinsic::hexagon_V6_vtmpyb_acc_128B, 52935}, // __builtin_HEXAGON_V6_vtmpyb_acc_128B
   31853       {Intrinsic::hexagon_V6_vtmpybus, 52972}, // __builtin_HEXAGON_V6_vtmpybus
   31854       {Intrinsic::hexagon_V6_vtmpybus_128B, 53002}, // __builtin_HEXAGON_V6_vtmpybus_128B
   31855       {Intrinsic::hexagon_V6_vtmpybus_acc, 53037}, // __builtin_HEXAGON_V6_vtmpybus_acc
   31856       {Intrinsic::hexagon_V6_vtmpybus_acc_128B, 53071}, // __builtin_HEXAGON_V6_vtmpybus_acc_128B
   31857       {Intrinsic::hexagon_V6_vtmpyhb, 53110}, // __builtin_HEXAGON_V6_vtmpyhb
   31858       {Intrinsic::hexagon_V6_vtmpyhb_128B, 53139}, // __builtin_HEXAGON_V6_vtmpyhb_128B
   31859       {Intrinsic::hexagon_V6_vtmpyhb_acc, 53173}, // __builtin_HEXAGON_V6_vtmpyhb_acc
   31860       {Intrinsic::hexagon_V6_vtmpyhb_acc_128B, 53206}, // __builtin_HEXAGON_V6_vtmpyhb_acc_128B
   31861       {Intrinsic::hexagon_V6_vunpackb, 53244}, // __builtin_HEXAGON_V6_vunpackb
   31862       {Intrinsic::hexagon_V6_vunpackb_128B, 53274}, // __builtin_HEXAGON_V6_vunpackb_128B
   31863       {Intrinsic::hexagon_V6_vunpackh, 53309}, // __builtin_HEXAGON_V6_vunpackh
   31864       {Intrinsic::hexagon_V6_vunpackh_128B, 53339}, // __builtin_HEXAGON_V6_vunpackh_128B
   31865       {Intrinsic::hexagon_V6_vunpackob, 53374}, // __builtin_HEXAGON_V6_vunpackob
   31866       {Intrinsic::hexagon_V6_vunpackob_128B, 53405}, // __builtin_HEXAGON_V6_vunpackob_128B
   31867       {Intrinsic::hexagon_V6_vunpackoh, 53441}, // __builtin_HEXAGON_V6_vunpackoh
   31868       {Intrinsic::hexagon_V6_vunpackoh_128B, 53472}, // __builtin_HEXAGON_V6_vunpackoh_128B
   31869       {Intrinsic::hexagon_V6_vunpackub, 53508}, // __builtin_HEXAGON_V6_vunpackub
   31870       {Intrinsic::hexagon_V6_vunpackub_128B, 53539}, // __builtin_HEXAGON_V6_vunpackub_128B
   31871       {Intrinsic::hexagon_V6_vunpackuh, 53575}, // __builtin_HEXAGON_V6_vunpackuh
   31872       {Intrinsic::hexagon_V6_vunpackuh_128B, 53606}, // __builtin_HEXAGON_V6_vunpackuh_128B
   31873       {Intrinsic::hexagon_V6_vxor, 53642}, // __builtin_HEXAGON_V6_vxor
   31874       {Intrinsic::hexagon_V6_vxor_128B, 53668}, // __builtin_HEXAGON_V6_vxor_128B
   31875       {Intrinsic::hexagon_V6_vzb, 53699}, // __builtin_HEXAGON_V6_vzb
   31876       {Intrinsic::hexagon_V6_vzb_128B, 53724}, // __builtin_HEXAGON_V6_vzb_128B
   31877       {Intrinsic::hexagon_V6_vzh, 53754}, // __builtin_HEXAGON_V6_vzh
   31878       {Intrinsic::hexagon_V6_vzh_128B, 53779}, // __builtin_HEXAGON_V6_vzh_128B
   31879       {Intrinsic::hexagon_Y2_dccleana, 53809}, // __builtin_HEXAGON_Y2_dccleana
   31880       {Intrinsic::hexagon_Y2_dccleaninva, 53839}, // __builtin_HEXAGON_Y2_dccleaninva
   31881       {Intrinsic::hexagon_Y2_dcinva, 53872}, // __builtin_HEXAGON_Y2_dcinva
   31882       {Intrinsic::hexagon_Y2_dczeroa, 53900}, // __builtin_HEXAGON_Y2_dczeroa
   31883       {Intrinsic::hexagon_Y4_l2fetch, 53929}, // __builtin_HEXAGON_Y4_l2fetch
   31884       {Intrinsic::hexagon_Y5_l2fetch, 53958}, // __builtin_HEXAGON_Y5_l2fetch
   31885       {Intrinsic::hexagon_prefetch, 54437}, // __builtin_HEXAGON_prefetch
   31886       {Intrinsic::hexagon_SI_to_SXTHI_asrh, 30711}, // __builtin_SI_to_SXTHI_asrh
   31887       {Intrinsic::hexagon_mm256i_vaddw, 54413}, // __builtin__mm256i_vaddw
   31888       {Intrinsic::hexagon_brev_ldb, 53987}, // __builtin_brev_ldb
   31889       {Intrinsic::hexagon_brev_ldd, 54006}, // __builtin_brev_ldd
   31890       {Intrinsic::hexagon_brev_ldh, 54025}, // __builtin_brev_ldh
   31891       {Intrinsic::hexagon_brev_ldub, 54044}, // __builtin_brev_ldub
   31892       {Intrinsic::hexagon_brev_lduh, 54064}, // __builtin_brev_lduh
   31893       {Intrinsic::hexagon_brev_ldw, 54084}, // __builtin_brev_ldw
   31894       {Intrinsic::hexagon_brev_stb, 54103}, // __builtin_brev_stb
   31895       {Intrinsic::hexagon_brev_std, 54122}, // __builtin_brev_std
   31896       {Intrinsic::hexagon_brev_sth, 54141}, // __builtin_brev_sth
   31897       {Intrinsic::hexagon_brev_sthhi, 54160}, // __builtin_brev_sthhi
   31898       {Intrinsic::hexagon_brev_stw, 54181}, // __builtin_brev_stw
   31899       {Intrinsic::hexagon_circ_ldb, 54200}, // __builtin_circ_ldb
   31900       {Intrinsic::hexagon_circ_ldd, 54219}, // __builtin_circ_ldd
   31901       {Intrinsic::hexagon_circ_ldh, 54238}, // __builtin_circ_ldh
   31902       {Intrinsic::hexagon_circ_ldub, 54257}, // __builtin_circ_ldub
   31903       {Intrinsic::hexagon_circ_lduh, 54277}, // __builtin_circ_lduh
   31904       {Intrinsic::hexagon_circ_ldw, 54297}, // __builtin_circ_ldw
   31905       {Intrinsic::hexagon_circ_stb, 54316}, // __builtin_circ_stb
   31906       {Intrinsic::hexagon_circ_std, 54335}, // __builtin_circ_std
   31907       {Intrinsic::hexagon_circ_sth, 54354}, // __builtin_circ_sth
   31908       {Intrinsic::hexagon_circ_sthhi, 54373}, // __builtin_circ_sthhi
   31909       {Intrinsic::hexagon_circ_stw, 54394}, // __builtin_circ_stw
   31910     };
   31911     auto I = std::lower_bound(std::begin(hexagonNames),
   31912                               std::end(hexagonNames),
   31913                               BuiltinNameStr);
   31914     if (I != std::end(hexagonNames) &&
   31915         I->getName() == BuiltinNameStr)
   31916       return I->IntrinID;
   31917   }
   31918   if (TargetPrefix == "mips") {
   31919     static const BuiltinEntry mipsNames[] = {
   31920       {Intrinsic::mips_absq_s_ph, 54464}, // __builtin_mips_absq_s_ph
   31921       {Intrinsic::mips_absq_s_qb, 54489}, // __builtin_mips_absq_s_qb
   31922       {Intrinsic::mips_absq_s_w, 54514}, // __builtin_mips_absq_s_w
   31923       {Intrinsic::mips_addq_ph, 54626}, // __builtin_mips_addq_ph
   31924       {Intrinsic::mips_addq_s_ph, 54649}, // __builtin_mips_addq_s_ph
   31925       {Intrinsic::mips_addq_s_w, 54674}, // __builtin_mips_addq_s_w
   31926       {Intrinsic::mips_addqh_ph, 54698}, // __builtin_mips_addqh_ph
   31927       {Intrinsic::mips_addqh_r_ph, 54722}, // __builtin_mips_addqh_r_ph
   31928       {Intrinsic::mips_addqh_r_w, 54748}, // __builtin_mips_addqh_r_w
   31929       {Intrinsic::mips_addqh_w, 54773}, // __builtin_mips_addqh_w
   31930       {Intrinsic::mips_addsc, 55072}, // __builtin_mips_addsc
   31931       {Intrinsic::mips_addu_ph, 55093}, // __builtin_mips_addu_ph
   31932       {Intrinsic::mips_addu_qb, 55116}, // __builtin_mips_addu_qb
   31933       {Intrinsic::mips_addu_s_ph, 55139}, // __builtin_mips_addu_s_ph
   31934       {Intrinsic::mips_addu_s_qb, 55164}, // __builtin_mips_addu_s_qb
   31935       {Intrinsic::mips_adduh_qb, 55189}, // __builtin_mips_adduh_qb
   31936       {Intrinsic::mips_adduh_r_qb, 55213}, // __builtin_mips_adduh_r_qb
   31937       {Intrinsic::mips_addwc, 55411}, // __builtin_mips_addwc
   31938       {Intrinsic::mips_append, 55473}, // __builtin_mips_append
   31939       {Intrinsic::mips_balign, 56039}, // __builtin_mips_balign
   31940       {Intrinsic::mips_bitrev, 56593}, // __builtin_mips_bitrev
   31941       {Intrinsic::mips_bposge32, 56971}, // __builtin_mips_bposge32
   31942       {Intrinsic::mips_cmp_eq_ph, 58210}, // __builtin_mips_cmp_eq_ph
   31943       {Intrinsic::mips_cmp_le_ph, 58235}, // __builtin_mips_cmp_le_ph
   31944       {Intrinsic::mips_cmp_lt_ph, 58260}, // __builtin_mips_cmp_lt_ph
   31945       {Intrinsic::mips_cmpgdu_eq_qb, 58285}, // __builtin_mips_cmpgdu_eq_qb
   31946       {Intrinsic::mips_cmpgdu_le_qb, 58313}, // __builtin_mips_cmpgdu_le_qb
   31947       {Intrinsic::mips_cmpgdu_lt_qb, 58341}, // __builtin_mips_cmpgdu_lt_qb
   31948       {Intrinsic::mips_cmpgu_eq_qb, 58369}, // __builtin_mips_cmpgu_eq_qb
   31949       {Intrinsic::mips_cmpgu_le_qb, 58396}, // __builtin_mips_cmpgu_le_qb
   31950       {Intrinsic::mips_cmpgu_lt_qb, 58423}, // __builtin_mips_cmpgu_lt_qb
   31951       {Intrinsic::mips_cmpu_eq_qb, 58450}, // __builtin_mips_cmpu_eq_qb
   31952       {Intrinsic::mips_cmpu_le_qb, 58476}, // __builtin_mips_cmpu_le_qb
   31953       {Intrinsic::mips_cmpu_lt_qb, 58502}, // __builtin_mips_cmpu_lt_qb
   31954       {Intrinsic::mips_dlsa, 58909}, // __builtin_mips_dlsa
   31955       {Intrinsic::mips_dpa_w_ph, 59067}, // __builtin_mips_dpa_w_ph
   31956       {Intrinsic::mips_dpaq_s_w_ph, 59235}, // __builtin_mips_dpaq_s_w_ph
   31957       {Intrinsic::mips_dpaq_sa_l_w, 59262}, // __builtin_mips_dpaq_sa_l_w
   31958       {Intrinsic::mips_dpaqx_s_w_ph, 59289}, // __builtin_mips_dpaqx_s_w_ph
   31959       {Intrinsic::mips_dpaqx_sa_w_ph, 59317}, // __builtin_mips_dpaqx_sa_w_ph
   31960       {Intrinsic::mips_dpau_h_qbl, 59346}, // __builtin_mips_dpau_h_qbl
   31961       {Intrinsic::mips_dpau_h_qbr, 59372}, // __builtin_mips_dpau_h_qbr
   31962       {Intrinsic::mips_dpax_w_ph, 59398}, // __builtin_mips_dpax_w_ph
   31963       {Intrinsic::mips_dps_w_ph, 59423}, // __builtin_mips_dps_w_ph
   31964       {Intrinsic::mips_dpsq_s_w_ph, 59447}, // __builtin_mips_dpsq_s_w_ph
   31965       {Intrinsic::mips_dpsq_sa_l_w, 59474}, // __builtin_mips_dpsq_sa_l_w
   31966       {Intrinsic::mips_dpsqx_s_w_ph, 59501}, // __builtin_mips_dpsqx_s_w_ph
   31967       {Intrinsic::mips_dpsqx_sa_w_ph, 59529}, // __builtin_mips_dpsqx_sa_w_ph
   31968       {Intrinsic::mips_dpsu_h_qbl, 59558}, // __builtin_mips_dpsu_h_qbl
   31969       {Intrinsic::mips_dpsu_h_qbr, 59584}, // __builtin_mips_dpsu_h_qbr
   31970       {Intrinsic::mips_dpsx_w_ph, 59754}, // __builtin_mips_dpsx_w_ph
   31971       {Intrinsic::mips_extp, 59779}, // __builtin_mips_extp
   31972       {Intrinsic::mips_extpdp, 59799}, // __builtin_mips_extpdp
   31973       {Intrinsic::mips_extr_r_w, 59821}, // __builtin_mips_extr_r_w
   31974       {Intrinsic::mips_extr_rs_w, 59845}, // __builtin_mips_extr_rs_w
   31975       {Intrinsic::mips_extr_s_h, 59870}, // __builtin_mips_extr_s_h
   31976       {Intrinsic::mips_extr_w, 59894}, // __builtin_mips_extr_w
   31977       {Intrinsic::mips_insv, 62946}, // __builtin_mips_insv
   31978       {Intrinsic::mips_lbux, 63054}, // __builtin_mips_lbux
   31979       {Intrinsic::mips_lhx, 63230}, // __builtin_mips_lhx
   31980       {Intrinsic::mips_lsa, 63249}, // __builtin_mips_lsa
   31981       {Intrinsic::mips_lwx, 63268}, // __builtin_mips_lwx
   31982       {Intrinsic::mips_madd, 63287}, // __builtin_mips_madd
   31983       {Intrinsic::mips_maddu, 63401}, // __builtin_mips_maddu
   31984       {Intrinsic::mips_maq_s_w_phl, 63510}, // __builtin_mips_maq_s_w_phl
   31985       {Intrinsic::mips_maq_s_w_phr, 63537}, // __builtin_mips_maq_s_w_phr
   31986       {Intrinsic::mips_maq_sa_w_phl, 63564}, // __builtin_mips_maq_sa_w_phl
   31987       {Intrinsic::mips_maq_sa_w_phr, 63592}, // __builtin_mips_maq_sa_w_phr
   31988       {Intrinsic::mips_modsub, 64692}, // __builtin_mips_modsub
   31989       {Intrinsic::mips_msub, 64735}, // __builtin_mips_msub
   31990       {Intrinsic::mips_msubu, 64849}, // __builtin_mips_msubu
   31991       {Intrinsic::mips_mthlip, 64958}, // __builtin_mips_mthlip
   31992       {Intrinsic::mips_mul_ph, 64980}, // __builtin_mips_mul_ph
   31993       {Intrinsic::mips_mul_s_ph, 65046}, // __builtin_mips_mul_s_ph
   31994       {Intrinsic::mips_muleq_s_w_phl, 65070}, // __builtin_mips_muleq_s_w_phl
   31995       {Intrinsic::mips_muleq_s_w_phr, 65099}, // __builtin_mips_muleq_s_w_phr
   31996       {Intrinsic::mips_muleu_s_ph_qbl, 65128}, // __builtin_mips_muleu_s_ph_qbl
   31997       {Intrinsic::mips_muleu_s_ph_qbr, 65158}, // __builtin_mips_muleu_s_ph_qbr
   31998       {Intrinsic::mips_mulq_rs_ph, 65188}, // __builtin_mips_mulq_rs_ph
   31999       {Intrinsic::mips_mulq_rs_w, 65214}, // __builtin_mips_mulq_rs_w
   32000       {Intrinsic::mips_mulq_s_ph, 65239}, // __builtin_mips_mulq_s_ph
   32001       {Intrinsic::mips_mulq_s_w, 65264}, // __builtin_mips_mulq_s_w
   32002       {Intrinsic::mips_mulsa_w_ph, 65334}, // __builtin_mips_mulsa_w_ph
   32003       {Intrinsic::mips_mulsaq_s_w_ph, 65360}, // __builtin_mips_mulsaq_s_w_ph
   32004       {Intrinsic::mips_mult, 65389}, // __builtin_mips_mult
   32005       {Intrinsic::mips_multu, 65409}, // __builtin_mips_multu
   32006       {Intrinsic::mips_packrl_ph, 65762}, // __builtin_mips_packrl_ph
   32007       {Intrinsic::mips_pick_ph, 66047}, // __builtin_mips_pick_ph
   32008       {Intrinsic::mips_pick_qb, 66070}, // __builtin_mips_pick_qb
   32009       {Intrinsic::mips_preceq_w_phl, 66093}, // __builtin_mips_preceq_w_phl
   32010       {Intrinsic::mips_preceq_w_phr, 66121}, // __builtin_mips_preceq_w_phr
   32011       {Intrinsic::mips_precequ_ph_qbl, 66149}, // __builtin_mips_precequ_ph_qbl
   32012       {Intrinsic::mips_precequ_ph_qbla, 66179}, // __builtin_mips_precequ_ph_qbla
   32013       {Intrinsic::mips_precequ_ph_qbr, 66210}, // __builtin_mips_precequ_ph_qbr
   32014       {Intrinsic::mips_precequ_ph_qbra, 66240}, // __builtin_mips_precequ_ph_qbra
   32015       {Intrinsic::mips_preceu_ph_qbl, 66271}, // __builtin_mips_preceu_ph_qbl
   32016       {Intrinsic::mips_preceu_ph_qbla, 66300}, // __builtin_mips_preceu_ph_qbla
   32017       {Intrinsic::mips_preceu_ph_qbr, 66330}, // __builtin_mips_preceu_ph_qbr
   32018       {Intrinsic::mips_preceu_ph_qbra, 66359}, // __builtin_mips_preceu_ph_qbra
   32019       {Intrinsic::mips_precr_qb_ph, 66389}, // __builtin_mips_precr_qb_ph
   32020       {Intrinsic::mips_precr_sra_ph_w, 66416}, // __builtin_mips_precr_sra_ph_w
   32021       {Intrinsic::mips_precr_sra_r_ph_w, 66446}, // __builtin_mips_precr_sra_r_ph_w
   32022       {Intrinsic::mips_precrq_ph_w, 66478}, // __builtin_mips_precrq_ph_w
   32023       {Intrinsic::mips_precrq_qb_ph, 66505}, // __builtin_mips_precrq_qb_ph
   32024       {Intrinsic::mips_precrq_rs_ph_w, 66533}, // __builtin_mips_precrq_rs_ph_w
   32025       {Intrinsic::mips_precrqu_s_qb_ph, 66563}, // __builtin_mips_precrqu_s_qb_ph
   32026       {Intrinsic::mips_prepend, 66594}, // __builtin_mips_prepend
   32027       {Intrinsic::mips_raddu_w_qb, 66617}, // __builtin_mips_raddu_w_qb
   32028       {Intrinsic::mips_rddsp, 66643}, // __builtin_mips_rddsp
   32029       {Intrinsic::mips_repl_ph, 66664}, // __builtin_mips_repl_ph
   32030       {Intrinsic::mips_repl_qb, 66687}, // __builtin_mips_repl_qb
   32031       {Intrinsic::mips_shilo, 66946}, // __builtin_mips_shilo
   32032       {Intrinsic::mips_shll_ph, 66967}, // __builtin_mips_shll_ph
   32033       {Intrinsic::mips_shll_qb, 66990}, // __builtin_mips_shll_qb
   32034       {Intrinsic::mips_shll_s_ph, 67013}, // __builtin_mips_shll_s_ph
   32035       {Intrinsic::mips_shll_s_w, 67038}, // __builtin_mips_shll_s_w
   32036       {Intrinsic::mips_shra_ph, 67062}, // __builtin_mips_shra_ph
   32037       {Intrinsic::mips_shra_qb, 67085}, // __builtin_mips_shra_qb
   32038       {Intrinsic::mips_shra_r_ph, 67108}, // __builtin_mips_shra_r_ph
   32039       {Intrinsic::mips_shra_r_qb, 67133}, // __builtin_mips_shra_r_qb
   32040       {Intrinsic::mips_shra_r_w, 67158}, // __builtin_mips_shra_r_w
   32041       {Intrinsic::mips_shrl_ph, 67182}, // __builtin_mips_shrl_ph
   32042       {Intrinsic::mips_shrl_qb, 67205}, // __builtin_mips_shrl_qb
   32043       {Intrinsic::mips_subq_ph, 68484}, // __builtin_mips_subq_ph
   32044       {Intrinsic::mips_subq_s_ph, 68507}, // __builtin_mips_subq_s_ph
   32045       {Intrinsic::mips_subq_s_w, 68532}, // __builtin_mips_subq_s_w
   32046       {Intrinsic::mips_subqh_ph, 68556}, // __builtin_mips_subqh_ph
   32047       {Intrinsic::mips_subqh_r_ph, 68580}, // __builtin_mips_subqh_r_ph
   32048       {Intrinsic::mips_subqh_r_w, 68606}, // __builtin_mips_subqh_r_w
   32049       {Intrinsic::mips_subqh_w, 68631}, // __builtin_mips_subqh_w
   32050       {Intrinsic::mips_subu_ph, 69038}, // __builtin_mips_subu_ph
   32051       {Intrinsic::mips_subu_qb, 69061}, // __builtin_mips_subu_qb
   32052       {Intrinsic::mips_subu_s_ph, 69084}, // __builtin_mips_subu_s_ph
   32053       {Intrinsic::mips_subu_s_qb, 69109}, // __builtin_mips_subu_s_qb
   32054       {Intrinsic::mips_subuh_qb, 69134}, // __builtin_mips_subuh_qb
   32055       {Intrinsic::mips_subuh_r_qb, 69158}, // __builtin_mips_subuh_r_qb
   32056       {Intrinsic::mips_wrdsp, 69440}, // __builtin_mips_wrdsp
   32057       {Intrinsic::mips_add_a_b, 54538}, // __builtin_msa_add_a_b
   32058       {Intrinsic::mips_add_a_d, 54560}, // __builtin_msa_add_a_d
   32059       {Intrinsic::mips_add_a_h, 54582}, // __builtin_msa_add_a_h
   32060       {Intrinsic::mips_add_a_w, 54604}, // __builtin_msa_add_a_w
   32061       {Intrinsic::mips_adds_a_b, 54796}, // __builtin_msa_adds_a_b
   32062       {Intrinsic::mips_adds_a_d, 54819}, // __builtin_msa_adds_a_d
   32063       {Intrinsic::mips_adds_a_h, 54842}, // __builtin_msa_adds_a_h
   32064       {Intrinsic::mips_adds_a_w, 54865}, // __builtin_msa_adds_a_w
   32065       {Intrinsic::mips_adds_s_b, 54888}, // __builtin_msa_adds_s_b
   32066       {Intrinsic::mips_adds_s_d, 54911}, // __builtin_msa_adds_s_d
   32067       {Intrinsic::mips_adds_s_h, 54934}, // __builtin_msa_adds_s_h
   32068       {Intrinsic::mips_adds_s_w, 54957}, // __builtin_msa_adds_s_w
   32069       {Intrinsic::mips_adds_u_b, 54980}, // __builtin_msa_adds_u_b
   32070       {Intrinsic::mips_adds_u_d, 55003}, // __builtin_msa_adds_u_d
   32071       {Intrinsic::mips_adds_u_h, 55026}, // __builtin_msa_adds_u_h
   32072       {Intrinsic::mips_adds_u_w, 55049}, // __builtin_msa_adds_u_w
   32073       {Intrinsic::mips_addv_b, 55239}, // __builtin_msa_addv_b
   32074       {Intrinsic::mips_addv_d, 55260}, // __builtin_msa_addv_d
   32075       {Intrinsic::mips_addv_h, 55281}, // __builtin_msa_addv_h
   32076       {Intrinsic::mips_addv_w, 55302}, // __builtin_msa_addv_w
   32077       {Intrinsic::mips_addvi_b, 55323}, // __builtin_msa_addvi_b
   32078       {Intrinsic::mips_addvi_d, 55345}, // __builtin_msa_addvi_d
   32079       {Intrinsic::mips_addvi_h, 55367}, // __builtin_msa_addvi_h
   32080       {Intrinsic::mips_addvi_w, 55389}, // __builtin_msa_addvi_w
   32081       {Intrinsic::mips_and_v, 55432}, // __builtin_msa_and_v
   32082       {Intrinsic::mips_andi_b, 55452}, // __builtin_msa_andi_b
   32083       {Intrinsic::mips_asub_s_b, 55495}, // __builtin_msa_asub_s_b
   32084       {Intrinsic::mips_asub_s_d, 55518}, // __builtin_msa_asub_s_d
   32085       {Intrinsic::mips_asub_s_h, 55541}, // __builtin_msa_asub_s_h
   32086       {Intrinsic::mips_asub_s_w, 55564}, // __builtin_msa_asub_s_w
   32087       {Intrinsic::mips_asub_u_b, 55587}, // __builtin_msa_asub_u_b
   32088       {Intrinsic::mips_asub_u_d, 55610}, // __builtin_msa_asub_u_d
   32089       {Intrinsic::mips_asub_u_h, 55633}, // __builtin_msa_asub_u_h
   32090       {Intrinsic::mips_asub_u_w, 55656}, // __builtin_msa_asub_u_w
   32091       {Intrinsic::mips_ave_s_b, 55679}, // __builtin_msa_ave_s_b
   32092       {Intrinsic::mips_ave_s_d, 55701}, // __builtin_msa_ave_s_d
   32093       {Intrinsic::mips_ave_s_h, 55723}, // __builtin_msa_ave_s_h
   32094       {Intrinsic::mips_ave_s_w, 55745}, // __builtin_msa_ave_s_w
   32095       {Intrinsic::mips_ave_u_b, 55767}, // __builtin_msa_ave_u_b
   32096       {Intrinsic::mips_ave_u_d, 55789}, // __builtin_msa_ave_u_d
   32097       {Intrinsic::mips_ave_u_h, 55811}, // __builtin_msa_ave_u_h
   32098       {Intrinsic::mips_ave_u_w, 55833}, // __builtin_msa_ave_u_w
   32099       {Intrinsic::mips_aver_s_b, 55855}, // __builtin_msa_aver_s_b
   32100       {Intrinsic::mips_aver_s_d, 55878}, // __builtin_msa_aver_s_d
   32101       {Intrinsic::mips_aver_s_h, 55901}, // __builtin_msa_aver_s_h
   32102       {Intrinsic::mips_aver_s_w, 55924}, // __builtin_msa_aver_s_w
   32103       {Intrinsic::mips_aver_u_b, 55947}, // __builtin_msa_aver_u_b
   32104       {Intrinsic::mips_aver_u_d, 55970}, // __builtin_msa_aver_u_d
   32105       {Intrinsic::mips_aver_u_h, 55993}, // __builtin_msa_aver_u_h
   32106       {Intrinsic::mips_aver_u_w, 56016}, // __builtin_msa_aver_u_w
   32107       {Intrinsic::mips_bclr_b, 56061}, // __builtin_msa_bclr_b
   32108       {Intrinsic::mips_bclr_d, 56082}, // __builtin_msa_bclr_d
   32109       {Intrinsic::mips_bclr_h, 56103}, // __builtin_msa_bclr_h
   32110       {Intrinsic::mips_bclr_w, 56124}, // __builtin_msa_bclr_w
   32111       {Intrinsic::mips_bclri_b, 56145}, // __builtin_msa_bclri_b
   32112       {Intrinsic::mips_bclri_d, 56167}, // __builtin_msa_bclri_d
   32113       {Intrinsic::mips_bclri_h, 56189}, // __builtin_msa_bclri_h
   32114       {Intrinsic::mips_bclri_w, 56211}, // __builtin_msa_bclri_w
   32115       {Intrinsic::mips_binsl_b, 56233}, // __builtin_msa_binsl_b
   32116       {Intrinsic::mips_binsl_d, 56255}, // __builtin_msa_binsl_d
   32117       {Intrinsic::mips_binsl_h, 56277}, // __builtin_msa_binsl_h
   32118       {Intrinsic::mips_binsl_w, 56299}, // __builtin_msa_binsl_w
   32119       {Intrinsic::mips_binsli_b, 56321}, // __builtin_msa_binsli_b
   32120       {Intrinsic::mips_binsli_d, 56344}, // __builtin_msa_binsli_d
   32121       {Intrinsic::mips_binsli_h, 56367}, // __builtin_msa_binsli_h
   32122       {Intrinsic::mips_binsli_w, 56390}, // __builtin_msa_binsli_w
   32123       {Intrinsic::mips_binsr_b, 56413}, // __builtin_msa_binsr_b
   32124       {Intrinsic::mips_binsr_d, 56435}, // __builtin_msa_binsr_d
   32125       {Intrinsic::mips_binsr_h, 56457}, // __builtin_msa_binsr_h
   32126       {Intrinsic::mips_binsr_w, 56479}, // __builtin_msa_binsr_w
   32127       {Intrinsic::mips_binsri_b, 56501}, // __builtin_msa_binsri_b
   32128       {Intrinsic::mips_binsri_d, 56524}, // __builtin_msa_binsri_d
   32129       {Intrinsic::mips_binsri_h, 56547}, // __builtin_msa_binsri_h
   32130       {Intrinsic::mips_binsri_w, 56570}, // __builtin_msa_binsri_w
   32131       {Intrinsic::mips_bmnz_v, 56615}, // __builtin_msa_bmnz_v
   32132       {Intrinsic::mips_bmnzi_b, 56636}, // __builtin_msa_bmnzi_b
   32133       {Intrinsic::mips_bmz_v, 56658}, // __builtin_msa_bmz_v
   32134       {Intrinsic::mips_bmzi_b, 56678}, // __builtin_msa_bmzi_b
   32135       {Intrinsic::mips_bneg_b, 56699}, // __builtin_msa_bneg_b
   32136       {Intrinsic::mips_bneg_d, 56720}, // __builtin_msa_bneg_d
   32137       {Intrinsic::mips_bneg_h, 56741}, // __builtin_msa_bneg_h
   32138       {Intrinsic::mips_bneg_w, 56762}, // __builtin_msa_bneg_w
   32139       {Intrinsic::mips_bnegi_b, 56783}, // __builtin_msa_bnegi_b
   32140       {Intrinsic::mips_bnegi_d, 56805}, // __builtin_msa_bnegi_d
   32141       {Intrinsic::mips_bnegi_h, 56827}, // __builtin_msa_bnegi_h
   32142       {Intrinsic::mips_bnegi_w, 56849}, // __builtin_msa_bnegi_w
   32143       {Intrinsic::mips_bnz_b, 56871}, // __builtin_msa_bnz_b
   32144       {Intrinsic::mips_bnz_d, 56891}, // __builtin_msa_bnz_d
   32145       {Intrinsic::mips_bnz_h, 56911}, // __builtin_msa_bnz_h
   32146       {Intrinsic::mips_bnz_v, 56931}, // __builtin_msa_bnz_v
   32147       {Intrinsic::mips_bnz_w, 56951}, // __builtin_msa_bnz_w
   32148       {Intrinsic::mips_bsel_v, 56995}, // __builtin_msa_bsel_v
   32149       {Intrinsic::mips_bseli_b, 57016}, // __builtin_msa_bseli_b
   32150       {Intrinsic::mips_bset_b, 57038}, // __builtin_msa_bset_b
   32151       {Intrinsic::mips_bset_d, 57059}, // __builtin_msa_bset_d
   32152       {Intrinsic::mips_bset_h, 57080}, // __builtin_msa_bset_h
   32153       {Intrinsic::mips_bset_w, 57101}, // __builtin_msa_bset_w
   32154       {Intrinsic::mips_bseti_b, 57122}, // __builtin_msa_bseti_b
   32155       {Intrinsic::mips_bseti_d, 57144}, // __builtin_msa_bseti_d
   32156       {Intrinsic::mips_bseti_h, 57166}, // __builtin_msa_bseti_h
   32157       {Intrinsic::mips_bseti_w, 57188}, // __builtin_msa_bseti_w
   32158       {Intrinsic::mips_bz_b, 57210}, // __builtin_msa_bz_b
   32159       {Intrinsic::mips_bz_d, 57229}, // __builtin_msa_bz_d
   32160       {Intrinsic::mips_bz_h, 57248}, // __builtin_msa_bz_h
   32161       {Intrinsic::mips_bz_v, 57267}, // __builtin_msa_bz_v
   32162       {Intrinsic::mips_bz_w, 57286}, // __builtin_msa_bz_w
   32163       {Intrinsic::mips_ceq_b, 57305}, // __builtin_msa_ceq_b
   32164       {Intrinsic::mips_ceq_d, 57325}, // __builtin_msa_ceq_d
   32165       {Intrinsic::mips_ceq_h, 57345}, // __builtin_msa_ceq_h
   32166       {Intrinsic::mips_ceq_w, 57365}, // __builtin_msa_ceq_w
   32167       {Intrinsic::mips_ceqi_b, 57385}, // __builtin_msa_ceqi_b
   32168       {Intrinsic::mips_ceqi_d, 57406}, // __builtin_msa_ceqi_d
   32169       {Intrinsic::mips_ceqi_h, 57427}, // __builtin_msa_ceqi_h
   32170       {Intrinsic::mips_ceqi_w, 57448}, // __builtin_msa_ceqi_w
   32171       {Intrinsic::mips_cfcmsa, 57469}, // __builtin_msa_cfcmsa
   32172       {Intrinsic::mips_cle_s_b, 57490}, // __builtin_msa_cle_s_b
   32173       {Intrinsic::mips_cle_s_d, 57512}, // __builtin_msa_cle_s_d
   32174       {Intrinsic::mips_cle_s_h, 57534}, // __builtin_msa_cle_s_h
   32175       {Intrinsic::mips_cle_s_w, 57556}, // __builtin_msa_cle_s_w
   32176       {Intrinsic::mips_cle_u_b, 57578}, // __builtin_msa_cle_u_b
   32177       {Intrinsic::mips_cle_u_d, 57600}, // __builtin_msa_cle_u_d
   32178       {Intrinsic::mips_cle_u_h, 57622}, // __builtin_msa_cle_u_h
   32179       {Intrinsic::mips_cle_u_w, 57644}, // __builtin_msa_cle_u_w
   32180       {Intrinsic::mips_clei_s_b, 57666}, // __builtin_msa_clei_s_b
   32181       {Intrinsic::mips_clei_s_d, 57689}, // __builtin_msa_clei_s_d
   32182       {Intrinsic::mips_clei_s_h, 57712}, // __builtin_msa_clei_s_h
   32183       {Intrinsic::mips_clei_s_w, 57735}, // __builtin_msa_clei_s_w
   32184       {Intrinsic::mips_clei_u_b, 57758}, // __builtin_msa_clei_u_b
   32185       {Intrinsic::mips_clei_u_d, 57781}, // __builtin_msa_clei_u_d
   32186       {Intrinsic::mips_clei_u_h, 57804}, // __builtin_msa_clei_u_h
   32187       {Intrinsic::mips_clei_u_w, 57827}, // __builtin_msa_clei_u_w
   32188       {Intrinsic::mips_clt_s_b, 57850}, // __builtin_msa_clt_s_b
   32189       {Intrinsic::mips_clt_s_d, 57872}, // __builtin_msa_clt_s_d
   32190       {Intrinsic::mips_clt_s_h, 57894}, // __builtin_msa_clt_s_h
   32191       {Intrinsic::mips_clt_s_w, 57916}, // __builtin_msa_clt_s_w
   32192       {Intrinsic::mips_clt_u_b, 57938}, // __builtin_msa_clt_u_b
   32193       {Intrinsic::mips_clt_u_d, 57960}, // __builtin_msa_clt_u_d
   32194       {Intrinsic::mips_clt_u_h, 57982}, // __builtin_msa_clt_u_h
   32195       {Intrinsic::mips_clt_u_w, 58004}, // __builtin_msa_clt_u_w
   32196       {Intrinsic::mips_clti_s_b, 58026}, // __builtin_msa_clti_s_b
   32197       {Intrinsic::mips_clti_s_d, 58049}, // __builtin_msa_clti_s_d
   32198       {Intrinsic::mips_clti_s_h, 58072}, // __builtin_msa_clti_s_h
   32199       {Intrinsic::mips_clti_s_w, 58095}, // __builtin_msa_clti_s_w
   32200       {Intrinsic::mips_clti_u_b, 58118}, // __builtin_msa_clti_u_b
   32201       {Intrinsic::mips_clti_u_d, 58141}, // __builtin_msa_clti_u_d
   32202       {Intrinsic::mips_clti_u_h, 58164}, // __builtin_msa_clti_u_h
   32203       {Intrinsic::mips_clti_u_w, 58187}, // __builtin_msa_clti_u_w
   32204       {Intrinsic::mips_copy_s_b, 58528}, // __builtin_msa_copy_s_b
   32205       {Intrinsic::mips_copy_s_d, 58551}, // __builtin_msa_copy_s_d
   32206       {Intrinsic::mips_copy_s_h, 58574}, // __builtin_msa_copy_s_h
   32207       {Intrinsic::mips_copy_s_w, 58597}, // __builtin_msa_copy_s_w
   32208       {Intrinsic::mips_copy_u_b, 58620}, // __builtin_msa_copy_u_b
   32209       {Intrinsic::mips_copy_u_d, 58643}, // __builtin_msa_copy_u_d
   32210       {Intrinsic::mips_copy_u_h, 58666}, // __builtin_msa_copy_u_h
   32211       {Intrinsic::mips_copy_u_w, 58689}, // __builtin_msa_copy_u_w
   32212       {Intrinsic::mips_ctcmsa, 58712}, // __builtin_msa_ctcmsa
   32213       {Intrinsic::mips_div_s_b, 58733}, // __builtin_msa_div_s_b
   32214       {Intrinsic::mips_div_s_d, 58755}, // __builtin_msa_div_s_d
   32215       {Intrinsic::mips_div_s_h, 58777}, // __builtin_msa_div_s_h
   32216       {Intrinsic::mips_div_s_w, 58799}, // __builtin_msa_div_s_w
   32217       {Intrinsic::mips_div_u_b, 58821}, // __builtin_msa_div_u_b
   32218       {Intrinsic::mips_div_u_d, 58843}, // __builtin_msa_div_u_d
   32219       {Intrinsic::mips_div_u_h, 58865}, // __builtin_msa_div_u_h
   32220       {Intrinsic::mips_div_u_w, 58887}, // __builtin_msa_div_u_w
   32221       {Intrinsic::mips_dotp_s_d, 58929}, // __builtin_msa_dotp_s_d
   32222       {Intrinsic::mips_dotp_s_h, 58952}, // __builtin_msa_dotp_s_h
   32223       {Intrinsic::mips_dotp_s_w, 58975}, // __builtin_msa_dotp_s_w
   32224       {Intrinsic::mips_dotp_u_d, 58998}, // __builtin_msa_dotp_u_d
   32225       {Intrinsic::mips_dotp_u_h, 59021}, // __builtin_msa_dotp_u_h
   32226       {Intrinsic::mips_dotp_u_w, 59044}, // __builtin_msa_dotp_u_w
   32227       {Intrinsic::mips_dpadd_s_d, 59091}, // __builtin_msa_dpadd_s_d
   32228       {Intrinsic::mips_dpadd_s_h, 59115}, // __builtin_msa_dpadd_s_h
   32229       {Intrinsic::mips_dpadd_s_w, 59139}, // __builtin_msa_dpadd_s_w
   32230       {Intrinsic::mips_dpadd_u_d, 59163}, // __builtin_msa_dpadd_u_d
   32231       {Intrinsic::mips_dpadd_u_h, 59187}, // __builtin_msa_dpadd_u_h
   32232       {Intrinsic::mips_dpadd_u_w, 59211}, // __builtin_msa_dpadd_u_w
   32233       {Intrinsic::mips_dpsub_s_d, 59610}, // __builtin_msa_dpsub_s_d
   32234       {Intrinsic::mips_dpsub_s_h, 59634}, // __builtin_msa_dpsub_s_h
   32235       {Intrinsic::mips_dpsub_s_w, 59658}, // __builtin_msa_dpsub_s_w
   32236       {Intrinsic::mips_dpsub_u_d, 59682}, // __builtin_msa_dpsub_u_d
   32237       {Intrinsic::mips_dpsub_u_h, 59706}, // __builtin_msa_dpsub_u_h
   32238       {Intrinsic::mips_dpsub_u_w, 59730}, // __builtin_msa_dpsub_u_w
   32239       {Intrinsic::mips_fadd_d, 59916}, // __builtin_msa_fadd_d
   32240       {Intrinsic::mips_fadd_w, 59937}, // __builtin_msa_fadd_w
   32241       {Intrinsic::mips_fcaf_d, 59958}, // __builtin_msa_fcaf_d
   32242       {Intrinsic::mips_fcaf_w, 59979}, // __builtin_msa_fcaf_w
   32243       {Intrinsic::mips_fceq_d, 60000}, // __builtin_msa_fceq_d
   32244       {Intrinsic::mips_fceq_w, 60021}, // __builtin_msa_fceq_w
   32245       {Intrinsic::mips_fclass_d, 60042}, // __builtin_msa_fclass_d
   32246       {Intrinsic::mips_fclass_w, 60065}, // __builtin_msa_fclass_w
   32247       {Intrinsic::mips_fcle_d, 60088}, // __builtin_msa_fcle_d
   32248       {Intrinsic::mips_fcle_w, 60109}, // __builtin_msa_fcle_w
   32249       {Intrinsic::mips_fclt_d, 60130}, // __builtin_msa_fclt_d
   32250       {Intrinsic::mips_fclt_w, 60151}, // __builtin_msa_fclt_w
   32251       {Intrinsic::mips_fcne_d, 60172}, // __builtin_msa_fcne_d
   32252       {Intrinsic::mips_fcne_w, 60193}, // __builtin_msa_fcne_w
   32253       {Intrinsic::mips_fcor_d, 60214}, // __builtin_msa_fcor_d
   32254       {Intrinsic::mips_fcor_w, 60235}, // __builtin_msa_fcor_w
   32255       {Intrinsic::mips_fcueq_d, 60256}, // __builtin_msa_fcueq_d
   32256       {Intrinsic::mips_fcueq_w, 60278}, // __builtin_msa_fcueq_w
   32257       {Intrinsic::mips_fcule_d, 60300}, // __builtin_msa_fcule_d
   32258       {Intrinsic::mips_fcule_w, 60322}, // __builtin_msa_fcule_w
   32259       {Intrinsic::mips_fcult_d, 60344}, // __builtin_msa_fcult_d
   32260       {Intrinsic::mips_fcult_w, 60366}, // __builtin_msa_fcult_w
   32261       {Intrinsic::mips_fcun_d, 60388}, // __builtin_msa_fcun_d
   32262       {Intrinsic::mips_fcun_w, 60409}, // __builtin_msa_fcun_w
   32263       {Intrinsic::mips_fcune_d, 60430}, // __builtin_msa_fcune_d
   32264       {Intrinsic::mips_fcune_w, 60452}, // __builtin_msa_fcune_w
   32265       {Intrinsic::mips_fdiv_d, 60474}, // __builtin_msa_fdiv_d
   32266       {Intrinsic::mips_fdiv_w, 60495}, // __builtin_msa_fdiv_w
   32267       {Intrinsic::mips_fexdo_h, 60516}, // __builtin_msa_fexdo_h
   32268       {Intrinsic::mips_fexdo_w, 60538}, // __builtin_msa_fexdo_w
   32269       {Intrinsic::mips_fexp2_d, 60560}, // __builtin_msa_fexp2_d
   32270       {Intrinsic::mips_fexp2_w, 60582}, // __builtin_msa_fexp2_w
   32271       {Intrinsic::mips_fexupl_d, 60604}, // __builtin_msa_fexupl_d
   32272       {Intrinsic::mips_fexupl_w, 60627}, // __builtin_msa_fexupl_w
   32273       {Intrinsic::mips_fexupr_d, 60650}, // __builtin_msa_fexupr_d
   32274       {Intrinsic::mips_fexupr_w, 60673}, // __builtin_msa_fexupr_w
   32275       {Intrinsic::mips_ffint_s_d, 60696}, // __builtin_msa_ffint_s_d
   32276       {Intrinsic::mips_ffint_s_w, 60720}, // __builtin_msa_ffint_s_w
   32277       {Intrinsic::mips_ffint_u_d, 60744}, // __builtin_msa_ffint_u_d
   32278       {Intrinsic::mips_ffint_u_w, 60768}, // __builtin_msa_ffint_u_w
   32279       {Intrinsic::mips_ffql_d, 60792}, // __builtin_msa_ffql_d
   32280       {Intrinsic::mips_ffql_w, 60813}, // __builtin_msa_ffql_w
   32281       {Intrinsic::mips_ffqr_d, 60834}, // __builtin_msa_ffqr_d
   32282       {Intrinsic::mips_ffqr_w, 60855}, // __builtin_msa_ffqr_w
   32283       {Intrinsic::mips_fill_b, 60876}, // __builtin_msa_fill_b
   32284       {Intrinsic::mips_fill_d, 60897}, // __builtin_msa_fill_d
   32285       {Intrinsic::mips_fill_h, 60918}, // __builtin_msa_fill_h
   32286       {Intrinsic::mips_fill_w, 60939}, // __builtin_msa_fill_w
   32287       {Intrinsic::mips_flog2_d, 60960}, // __builtin_msa_flog2_d
   32288       {Intrinsic::mips_flog2_w, 60982}, // __builtin_msa_flog2_w
   32289       {Intrinsic::mips_fmadd_d, 61004}, // __builtin_msa_fmadd_d
   32290       {Intrinsic::mips_fmadd_w, 61026}, // __builtin_msa_fmadd_w
   32291       {Intrinsic::mips_fmax_a_d, 61048}, // __builtin_msa_fmax_a_d
   32292       {Intrinsic::mips_fmax_a_w, 61071}, // __builtin_msa_fmax_a_w
   32293       {Intrinsic::mips_fmax_d, 61094}, // __builtin_msa_fmax_d
   32294       {Intrinsic::mips_fmax_w, 61115}, // __builtin_msa_fmax_w
   32295       {Intrinsic::mips_fmin_a_d, 61136}, // __builtin_msa_fmin_a_d
   32296       {Intrinsic::mips_fmin_a_w, 61159}, // __builtin_msa_fmin_a_w
   32297       {Intrinsic::mips_fmin_d, 61182}, // __builtin_msa_fmin_d
   32298       {Intrinsic::mips_fmin_w, 61203}, // __builtin_msa_fmin_w
   32299       {Intrinsic::mips_fmsub_d, 61224}, // __builtin_msa_fmsub_d
   32300       {Intrinsic::mips_fmsub_w, 61246}, // __builtin_msa_fmsub_w
   32301       {Intrinsic::mips_fmul_d, 61268}, // __builtin_msa_fmul_d
   32302       {Intrinsic::mips_fmul_w, 61289}, // __builtin_msa_fmul_w
   32303       {Intrinsic::mips_frcp_d, 61310}, // __builtin_msa_frcp_d
   32304       {Intrinsic::mips_frcp_w, 61331}, // __builtin_msa_frcp_w
   32305       {Intrinsic::mips_frint_d, 61352}, // __builtin_msa_frint_d
   32306       {Intrinsic::mips_frint_w, 61374}, // __builtin_msa_frint_w
   32307       {Intrinsic::mips_frsqrt_d, 61396}, // __builtin_msa_frsqrt_d
   32308       {Intrinsic::mips_frsqrt_w, 61419}, // __builtin_msa_frsqrt_w
   32309       {Intrinsic::mips_fsaf_d, 61442}, // __builtin_msa_fsaf_d
   32310       {Intrinsic::mips_fsaf_w, 61463}, // __builtin_msa_fsaf_w
   32311       {Intrinsic::mips_fseq_d, 61484}, // __builtin_msa_fseq_d
   32312       {Intrinsic::mips_fseq_w, 61505}, // __builtin_msa_fseq_w
   32313       {Intrinsic::mips_fsle_d, 61526}, // __builtin_msa_fsle_d
   32314       {Intrinsic::mips_fsle_w, 61547}, // __builtin_msa_fsle_w
   32315       {Intrinsic::mips_fslt_d, 61568}, // __builtin_msa_fslt_d
   32316       {Intrinsic::mips_fslt_w, 61589}, // __builtin_msa_fslt_w
   32317       {Intrinsic::mips_fsne_d, 61610}, // __builtin_msa_fsne_d
   32318       {Intrinsic::mips_fsne_w, 61631}, // __builtin_msa_fsne_w
   32319       {Intrinsic::mips_fsor_d, 61652}, // __builtin_msa_fsor_d
   32320       {Intrinsic::mips_fsor_w, 61673}, // __builtin_msa_fsor_w
   32321       {Intrinsic::mips_fsqrt_d, 61694}, // __builtin_msa_fsqrt_d
   32322       {Intrinsic::mips_fsqrt_w, 61716}, // __builtin_msa_fsqrt_w
   32323       {Intrinsic::mips_fsub_d, 61738}, // __builtin_msa_fsub_d
   32324       {Intrinsic::mips_fsub_w, 61759}, // __builtin_msa_fsub_w
   32325       {Intrinsic::mips_fsueq_d, 61780}, // __builtin_msa_fsueq_d
   32326       {Intrinsic::mips_fsueq_w, 61802}, // __builtin_msa_fsueq_w
   32327       {Intrinsic::mips_fsule_d, 61824}, // __builtin_msa_fsule_d
   32328       {Intrinsic::mips_fsule_w, 61846}, // __builtin_msa_fsule_w
   32329       {Intrinsic::mips_fsult_d, 61868}, // __builtin_msa_fsult_d
   32330       {Intrinsic::mips_fsult_w, 61890}, // __builtin_msa_fsult_w
   32331       {Intrinsic::mips_fsun_d, 61912}, // __builtin_msa_fsun_d
   32332       {Intrinsic::mips_fsun_w, 61933}, // __builtin_msa_fsun_w
   32333       {Intrinsic::mips_fsune_d, 61954}, // __builtin_msa_fsune_d
   32334       {Intrinsic::mips_fsune_w, 61976}, // __builtin_msa_fsune_w
   32335       {Intrinsic::mips_ftint_s_d, 61998}, // __builtin_msa_ftint_s_d
   32336       {Intrinsic::mips_ftint_s_w, 62022}, // __builtin_msa_ftint_s_w
   32337       {Intrinsic::mips_ftint_u_d, 62046}, // __builtin_msa_ftint_u_d
   32338       {Intrinsic::mips_ftint_u_w, 62070}, // __builtin_msa_ftint_u_w
   32339       {Intrinsic::mips_ftq_h, 62094}, // __builtin_msa_ftq_h
   32340       {Intrinsic::mips_ftq_w, 62114}, // __builtin_msa_ftq_w
   32341       {Intrinsic::mips_ftrunc_s_d, 62134}, // __builtin_msa_ftrunc_s_d
   32342       {Intrinsic::mips_ftrunc_s_w, 62159}, // __builtin_msa_ftrunc_s_w
   32343       {Intrinsic::mips_ftrunc_u_d, 62184}, // __builtin_msa_ftrunc_u_d
   32344       {Intrinsic::mips_ftrunc_u_w, 62209}, // __builtin_msa_ftrunc_u_w
   32345       {Intrinsic::mips_hadd_s_d, 62234}, // __builtin_msa_hadd_s_d
   32346       {Intrinsic::mips_hadd_s_h, 62257}, // __builtin_msa_hadd_s_h
   32347       {Intrinsic::mips_hadd_s_w, 62280}, // __builtin_msa_hadd_s_w
   32348       {Intrinsic::mips_hadd_u_d, 62303}, // __builtin_msa_hadd_u_d
   32349       {Intrinsic::mips_hadd_u_h, 62326}, // __builtin_msa_hadd_u_h
   32350       {Intrinsic::mips_hadd_u_w, 62349}, // __builtin_msa_hadd_u_w
   32351       {Intrinsic::mips_hsub_s_d, 62372}, // __builtin_msa_hsub_s_d
   32352       {Intrinsic::mips_hsub_s_h, 62395}, // __builtin_msa_hsub_s_h
   32353       {Intrinsic::mips_hsub_s_w, 62418}, // __builtin_msa_hsub_s_w
   32354       {Intrinsic::mips_hsub_u_d, 62441}, // __builtin_msa_hsub_u_d
   32355       {Intrinsic::mips_hsub_u_h, 62464}, // __builtin_msa_hsub_u_h
   32356       {Intrinsic::mips_hsub_u_w, 62487}, // __builtin_msa_hsub_u_w
   32357       {Intrinsic::mips_ilvev_b, 62510}, // __builtin_msa_ilvev_b
   32358       {Intrinsic::mips_ilvev_d, 62532}, // __builtin_msa_ilvev_d
   32359       {Intrinsic::mips_ilvev_h, 62554}, // __builtin_msa_ilvev_h
   32360       {Intrinsic::mips_ilvev_w, 62576}, // __builtin_msa_ilvev_w
   32361       {Intrinsic::mips_ilvl_b, 62598}, // __builtin_msa_ilvl_b
   32362       {Intrinsic::mips_ilvl_d, 62619}, // __builtin_msa_ilvl_d
   32363       {Intrinsic::mips_ilvl_h, 62640}, // __builtin_msa_ilvl_h
   32364       {Intrinsic::mips_ilvl_w, 62661}, // __builtin_msa_ilvl_w
   32365       {Intrinsic::mips_ilvod_b, 62682}, // __builtin_msa_ilvod_b
   32366       {Intrinsic::mips_ilvod_d, 62704}, // __builtin_msa_ilvod_d
   32367       {Intrinsic::mips_ilvod_h, 62726}, // __builtin_msa_ilvod_h
   32368       {Intrinsic::mips_ilvod_w, 62748}, // __builtin_msa_ilvod_w
   32369       {Intrinsic::mips_ilvr_b, 62770}, // __builtin_msa_ilvr_b
   32370       {Intrinsic::mips_ilvr_d, 62791}, // __builtin_msa_ilvr_d
   32371       {Intrinsic::mips_ilvr_h, 62812}, // __builtin_msa_ilvr_h
   32372       {Intrinsic::mips_ilvr_w, 62833}, // __builtin_msa_ilvr_w
   32373       {Intrinsic::mips_insert_b, 62854}, // __builtin_msa_insert_b
   32374       {Intrinsic::mips_insert_d, 62877}, // __builtin_msa_insert_d
   32375       {Intrinsic::mips_insert_h, 62900}, // __builtin_msa_insert_h
   32376       {Intrinsic::mips_insert_w, 62923}, // __builtin_msa_insert_w
   32377       {Intrinsic::mips_insve_b, 62966}, // __builtin_msa_insve_b
   32378       {Intrinsic::mips_insve_d, 62988}, // __builtin_msa_insve_d
   32379       {Intrinsic::mips_insve_h, 63010}, // __builtin_msa_insve_h
   32380       {Intrinsic::mips_insve_w, 63032}, // __builtin_msa_insve_w
   32381       {Intrinsic::mips_ld_b, 63074}, // __builtin_msa_ld_b
   32382       {Intrinsic::mips_ld_d, 63093}, // __builtin_msa_ld_d
   32383       {Intrinsic::mips_ld_h, 63112}, // __builtin_msa_ld_h
   32384       {Intrinsic::mips_ld_w, 63131}, // __builtin_msa_ld_w
   32385       {Intrinsic::mips_ldi_b, 63150}, // __builtin_msa_ldi_b
   32386       {Intrinsic::mips_ldi_d, 63170}, // __builtin_msa_ldi_d
   32387       {Intrinsic::mips_ldi_h, 63190}, // __builtin_msa_ldi_h
   32388       {Intrinsic::mips_ldi_w, 63210}, // __builtin_msa_ldi_w
   32389       {Intrinsic::mips_madd_q_h, 63307}, // __builtin_msa_madd_q_h
   32390       {Intrinsic::mips_madd_q_w, 63330}, // __builtin_msa_madd_q_w
   32391       {Intrinsic::mips_maddr_q_h, 63353}, // __builtin_msa_maddr_q_h
   32392       {Intrinsic::mips_maddr_q_w, 63377}, // __builtin_msa_maddr_q_w
   32393       {Intrinsic::mips_maddv_b, 63422}, // __builtin_msa_maddv_b
   32394       {Intrinsic::mips_maddv_d, 63444}, // __builtin_msa_maddv_d
   32395       {Intrinsic::mips_maddv_h, 63466}, // __builtin_msa_maddv_h
   32396       {Intrinsic::mips_maddv_w, 63488}, // __builtin_msa_maddv_w
   32397       {Intrinsic::mips_max_a_b, 63620}, // __builtin_msa_max_a_b
   32398       {Intrinsic::mips_max_a_d, 63642}, // __builtin_msa_max_a_d
   32399       {Intrinsic::mips_max_a_h, 63664}, // __builtin_msa_max_a_h
   32400       {Intrinsic::mips_max_a_w, 63686}, // __builtin_msa_max_a_w
   32401       {Intrinsic::mips_max_s_b, 63708}, // __builtin_msa_max_s_b
   32402       {Intrinsic::mips_max_s_d, 63730}, // __builtin_msa_max_s_d
   32403       {Intrinsic::mips_max_s_h, 63752}, // __builtin_msa_max_s_h
   32404       {Intrinsic::mips_max_s_w, 63774}, // __builtin_msa_max_s_w
   32405       {Intrinsic::mips_max_u_b, 63796}, // __builtin_msa_max_u_b
   32406       {Intrinsic::mips_max_u_d, 63818}, // __builtin_msa_max_u_d
   32407       {Intrinsic::mips_max_u_h, 63840}, // __builtin_msa_max_u_h
   32408       {Intrinsic::mips_max_u_w, 63862}, // __builtin_msa_max_u_w
   32409       {Intrinsic::mips_maxi_s_b, 63884}, // __builtin_msa_maxi_s_b
   32410       {Intrinsic::mips_maxi_s_d, 63907}, // __builtin_msa_maxi_s_d
   32411       {Intrinsic::mips_maxi_s_h, 63930}, // __builtin_msa_maxi_s_h
   32412       {Intrinsic::mips_maxi_s_w, 63953}, // __builtin_msa_maxi_s_w
   32413       {Intrinsic::mips_maxi_u_b, 63976}, // __builtin_msa_maxi_u_b
   32414       {Intrinsic::mips_maxi_u_d, 63999}, // __builtin_msa_maxi_u_d
   32415       {Intrinsic::mips_maxi_u_h, 64022}, // __builtin_msa_maxi_u_h
   32416       {Intrinsic::mips_maxi_u_w, 64045}, // __builtin_msa_maxi_u_w
   32417       {Intrinsic::mips_min_a_b, 64068}, // __builtin_msa_min_a_b
   32418       {Intrinsic::mips_min_a_d, 64090}, // __builtin_msa_min_a_d
   32419       {Intrinsic::mips_min_a_h, 64112}, // __builtin_msa_min_a_h
   32420       {Intrinsic::mips_min_a_w, 64134}, // __builtin_msa_min_a_w
   32421       {Intrinsic::mips_min_s_b, 64156}, // __builtin_msa_min_s_b
   32422       {Intrinsic::mips_min_s_d, 64178}, // __builtin_msa_min_s_d
   32423       {Intrinsic::mips_min_s_h, 64200}, // __builtin_msa_min_s_h
   32424       {Intrinsic::mips_min_s_w, 64222}, // __builtin_msa_min_s_w
   32425       {Intrinsic::mips_min_u_b, 64244}, // __builtin_msa_min_u_b
   32426       {Intrinsic::mips_min_u_d, 64266}, // __builtin_msa_min_u_d
   32427       {Intrinsic::mips_min_u_h, 64288}, // __builtin_msa_min_u_h
   32428       {Intrinsic::mips_min_u_w, 64310}, // __builtin_msa_min_u_w
   32429       {Intrinsic::mips_mini_s_b, 64332}, // __builtin_msa_mini_s_b
   32430       {Intrinsic::mips_mini_s_d, 64355}, // __builtin_msa_mini_s_d
   32431       {Intrinsic::mips_mini_s_h, 64378}, // __builtin_msa_mini_s_h
   32432       {Intrinsic::mips_mini_s_w, 64401}, // __builtin_msa_mini_s_w
   32433       {Intrinsic::mips_mini_u_b, 64424}, // __builtin_msa_mini_u_b
   32434       {Intrinsic::mips_mini_u_d, 64447}, // __builtin_msa_mini_u_d
   32435       {Intrinsic::mips_mini_u_h, 64470}, // __builtin_msa_mini_u_h
   32436       {Intrinsic::mips_mini_u_w, 64493}, // __builtin_msa_mini_u_w
   32437       {Intrinsic::mips_mod_s_b, 64516}, // __builtin_msa_mod_s_b
   32438       {Intrinsic::mips_mod_s_d, 64538}, // __builtin_msa_mod_s_d
   32439       {Intrinsic::mips_mod_s_h, 64560}, // __builtin_msa_mod_s_h
   32440       {Intrinsic::mips_mod_s_w, 64582}, // __builtin_msa_mod_s_w
   32441       {Intrinsic::mips_mod_u_b, 64604}, // __builtin_msa_mod_u_b
   32442       {Intrinsic::mips_mod_u_d, 64626}, // __builtin_msa_mod_u_d
   32443       {Intrinsic::mips_mod_u_h, 64648}, // __builtin_msa_mod_u_h
   32444       {Intrinsic::mips_mod_u_w, 64670}, // __builtin_msa_mod_u_w
   32445       {Intrinsic::mips_move_v, 64714}, // __builtin_msa_move_v
   32446       {Intrinsic::mips_msub_q_h, 64755}, // __builtin_msa_msub_q_h
   32447       {Intrinsic::mips_msub_q_w, 64778}, // __builtin_msa_msub_q_w
   32448       {Intrinsic::mips_msubr_q_h, 64801}, // __builtin_msa_msubr_q_h
   32449       {Intrinsic::mips_msubr_q_w, 64825}, // __builtin_msa_msubr_q_w
   32450       {Intrinsic::mips_msubv_b, 64870}, // __builtin_msa_msubv_b
   32451       {Intrinsic::mips_msubv_d, 64892}, // __builtin_msa_msubv_d
   32452       {Intrinsic::mips_msubv_h, 64914}, // __builtin_msa_msubv_h
   32453       {Intrinsic::mips_msubv_w, 64936}, // __builtin_msa_msubv_w
   32454       {Intrinsic::mips_mul_q_h, 65002}, // __builtin_msa_mul_q_h
   32455       {Intrinsic::mips_mul_q_w, 65024}, // __builtin_msa_mul_q_w
   32456       {Intrinsic::mips_mulr_q_h, 65288}, // __builtin_msa_mulr_q_h
   32457       {Intrinsic::mips_mulr_q_w, 65311}, // __builtin_msa_mulr_q_w
   32458       {Intrinsic::mips_mulv_b, 65430}, // __builtin_msa_mulv_b
   32459       {Intrinsic::mips_mulv_d, 65451}, // __builtin_msa_mulv_d
   32460       {Intrinsic::mips_mulv_h, 65472}, // __builtin_msa_mulv_h
   32461       {Intrinsic::mips_mulv_w, 65493}, // __builtin_msa_mulv_w
   32462       {Intrinsic::mips_nloc_b, 65514}, // __builtin_msa_nloc_b
   32463       {Intrinsic::mips_nloc_d, 65535}, // __builtin_msa_nloc_d
   32464       {Intrinsic::mips_nloc_h, 65556}, // __builtin_msa_nloc_h
   32465       {Intrinsic::mips_nloc_w, 65577}, // __builtin_msa_nloc_w
   32466       {Intrinsic::mips_nlzc_b, 65598}, // __builtin_msa_nlzc_b
   32467       {Intrinsic::mips_nlzc_d, 65619}, // __builtin_msa_nlzc_d
   32468       {Intrinsic::mips_nlzc_h, 65640}, // __builtin_msa_nlzc_h
   32469       {Intrinsic::mips_nlzc_w, 65661}, // __builtin_msa_nlzc_w
   32470       {Intrinsic::mips_nor_v, 65682}, // __builtin_msa_nor_v
   32471       {Intrinsic::mips_nori_b, 65702}, // __builtin_msa_nori_b
   32472       {Intrinsic::mips_or_v, 65723}, // __builtin_msa_or_v
   32473       {Intrinsic::mips_ori_b, 65742}, // __builtin_msa_ori_b
   32474       {Intrinsic::mips_pckev_b, 65787}, // __builtin_msa_pckev_b
   32475       {Intrinsic::mips_pckev_d, 65809}, // __builtin_msa_pckev_d
   32476       {Intrinsic::mips_pckev_h, 65831}, // __builtin_msa_pckev_h
   32477       {Intrinsic::mips_pckev_w, 65853}, // __builtin_msa_pckev_w
   32478       {Intrinsic::mips_pckod_b, 65875}, // __builtin_msa_pckod_b
   32479       {Intrinsic::mips_pckod_d, 65897}, // __builtin_msa_pckod_d
   32480       {Intrinsic::mips_pckod_h, 65919}, // __builtin_msa_pckod_h
   32481       {Intrinsic::mips_pckod_w, 65941}, // __builtin_msa_pckod_w
   32482       {Intrinsic::mips_pcnt_b, 65963}, // __builtin_msa_pcnt_b
   32483       {Intrinsic::mips_pcnt_d, 65984}, // __builtin_msa_pcnt_d
   32484       {Intrinsic::mips_pcnt_h, 66005}, // __builtin_msa_pcnt_h
   32485       {Intrinsic::mips_pcnt_w, 66026}, // __builtin_msa_pcnt_w
   32486       {Intrinsic::mips_sat_s_b, 66710}, // __builtin_msa_sat_s_b
   32487       {Intrinsic::mips_sat_s_d, 66732}, // __builtin_msa_sat_s_d
   32488       {Intrinsic::mips_sat_s_h, 66754}, // __builtin_msa_sat_s_h
   32489       {Intrinsic::mips_sat_s_w, 66776}, // __builtin_msa_sat_s_w
   32490       {Intrinsic::mips_sat_u_b, 66798}, // __builtin_msa_sat_u_b
   32491       {Intrinsic::mips_sat_u_d, 66820}, // __builtin_msa_sat_u_d
   32492       {Intrinsic::mips_sat_u_h, 66842}, // __builtin_msa_sat_u_h
   32493       {Intrinsic::mips_sat_u_w, 66864}, // __builtin_msa_sat_u_w
   32494       {Intrinsic::mips_shf_b, 66886}, // __builtin_msa_shf_b
   32495       {Intrinsic::mips_shf_h, 66906}, // __builtin_msa_shf_h
   32496       {Intrinsic::mips_shf_w, 66926}, // __builtin_msa_shf_w
   32497       {Intrinsic::mips_sld_b, 67228}, // __builtin_msa_sld_b
   32498       {Intrinsic::mips_sld_d, 67248}, // __builtin_msa_sld_d
   32499       {Intrinsic::mips_sld_h, 67268}, // __builtin_msa_sld_h
   32500       {Intrinsic::mips_sld_w, 67288}, // __builtin_msa_sld_w
   32501       {Intrinsic::mips_sldi_b, 67308}, // __builtin_msa_sldi_b
   32502       {Intrinsic::mips_sldi_d, 67329}, // __builtin_msa_sldi_d
   32503       {Intrinsic::mips_sldi_h, 67350}, // __builtin_msa_sldi_h
   32504       {Intrinsic::mips_sldi_w, 67371}, // __builtin_msa_sldi_w
   32505       {Intrinsic::mips_sll_b, 67392}, // __builtin_msa_sll_b
   32506       {Intrinsic::mips_sll_d, 67412}, // __builtin_msa_sll_d
   32507       {Intrinsic::mips_sll_h, 67432}, // __builtin_msa_sll_h
   32508       {Intrinsic::mips_sll_w, 67452}, // __builtin_msa_sll_w
   32509       {Intrinsic::mips_slli_b, 67472}, // __builtin_msa_slli_b
   32510       {Intrinsic::mips_slli_d, 67493}, // __builtin_msa_slli_d
   32511       {Intrinsic::mips_slli_h, 67514}, // __builtin_msa_slli_h
   32512       {Intrinsic::mips_slli_w, 67535}, // __builtin_msa_slli_w
   32513       {Intrinsic::mips_splat_b, 67556}, // __builtin_msa_splat_b
   32514       {Intrinsic::mips_splat_d, 67578}, // __builtin_msa_splat_d
   32515       {Intrinsic::mips_splat_h, 67600}, // __builtin_msa_splat_h
   32516       {Intrinsic::mips_splat_w, 67622}, // __builtin_msa_splat_w
   32517       {Intrinsic::mips_splati_b, 67644}, // __builtin_msa_splati_b
   32518       {Intrinsic::mips_splati_d, 67667}, // __builtin_msa_splati_d
   32519       {Intrinsic::mips_splati_h, 67690}, // __builtin_msa_splati_h
   32520       {Intrinsic::mips_splati_w, 67713}, // __builtin_msa_splati_w
   32521       {Intrinsic::mips_sra_b, 67736}, // __builtin_msa_sra_b
   32522       {Intrinsic::mips_sra_d, 67756}, // __builtin_msa_sra_d
   32523       {Intrinsic::mips_sra_h, 67776}, // __builtin_msa_sra_h
   32524       {Intrinsic::mips_sra_w, 67796}, // __builtin_msa_sra_w
   32525       {Intrinsic::mips_srai_b, 67816}, // __builtin_msa_srai_b
   32526       {Intrinsic::mips_srai_d, 67837}, // __builtin_msa_srai_d
   32527       {Intrinsic::mips_srai_h, 67858}, // __builtin_msa_srai_h
   32528       {Intrinsic::mips_srai_w, 67879}, // __builtin_msa_srai_w
   32529       {Intrinsic::mips_srar_b, 67900}, // __builtin_msa_srar_b
   32530       {Intrinsic::mips_srar_d, 67921}, // __builtin_msa_srar_d
   32531       {Intrinsic::mips_srar_h, 67942}, // __builtin_msa_srar_h
   32532       {Intrinsic::mips_srar_w, 67963}, // __builtin_msa_srar_w
   32533       {Intrinsic::mips_srari_b, 67984}, // __builtin_msa_srari_b
   32534       {Intrinsic::mips_srari_d, 68006}, // __builtin_msa_srari_d
   32535       {Intrinsic::mips_srari_h, 68028}, // __builtin_msa_srari_h
   32536       {Intrinsic::mips_srari_w, 68050}, // __builtin_msa_srari_w
   32537       {Intrinsic::mips_srl_b, 68072}, // __builtin_msa_srl_b
   32538       {Intrinsic::mips_srl_d, 68092}, // __builtin_msa_srl_d
   32539       {Intrinsic::mips_srl_h, 68112}, // __builtin_msa_srl_h
   32540       {Intrinsic::mips_srl_w, 68132}, // __builtin_msa_srl_w
   32541       {Intrinsic::mips_srli_b, 68152}, // __builtin_msa_srli_b
   32542       {Intrinsic::mips_srli_d, 68173}, // __builtin_msa_srli_d
   32543       {Intrinsic::mips_srli_h, 68194}, // __builtin_msa_srli_h
   32544       {Intrinsic::mips_srli_w, 68215}, // __builtin_msa_srli_w
   32545       {Intrinsic::mips_srlr_b, 68236}, // __builtin_msa_srlr_b
   32546       {Intrinsic::mips_srlr_d, 68257}, // __builtin_msa_srlr_d
   32547       {Intrinsic::mips_srlr_h, 68278}, // __builtin_msa_srlr_h
   32548       {Intrinsic::mips_srlr_w, 68299}, // __builtin_msa_srlr_w
   32549       {Intrinsic::mips_srlri_b, 68320}, // __builtin_msa_srlri_b
   32550       {Intrinsic::mips_srlri_d, 68342}, // __builtin_msa_srlri_d
   32551       {Intrinsic::mips_srlri_h, 68364}, // __builtin_msa_srlri_h
   32552       {Intrinsic::mips_srlri_w, 68386}, // __builtin_msa_srlri_w
   32553       {Intrinsic::mips_st_b, 68408}, // __builtin_msa_st_b
   32554       {Intrinsic::mips_st_d, 68427}, // __builtin_msa_st_d
   32555       {Intrinsic::mips_st_h, 68446}, // __builtin_msa_st_h
   32556       {Intrinsic::mips_st_w, 68465}, // __builtin_msa_st_w
   32557       {Intrinsic::mips_subs_s_b, 68654}, // __builtin_msa_subs_s_b
   32558       {Intrinsic::mips_subs_s_d, 68677}, // __builtin_msa_subs_s_d
   32559       {Intrinsic::mips_subs_s_h, 68700}, // __builtin_msa_subs_s_h
   32560       {Intrinsic::mips_subs_s_w, 68723}, // __builtin_msa_subs_s_w
   32561       {Intrinsic::mips_subs_u_b, 68746}, // __builtin_msa_subs_u_b
   32562       {Intrinsic::mips_subs_u_d, 68769}, // __builtin_msa_subs_u_d
   32563       {Intrinsic::mips_subs_u_h, 68792}, // __builtin_msa_subs_u_h
   32564       {Intrinsic::mips_subs_u_w, 68815}, // __builtin_msa_subs_u_w
   32565       {Intrinsic::mips_subsus_u_b, 68838}, // __builtin_msa_subsus_u_b
   32566       {Intrinsic::mips_subsus_u_d, 68863}, // __builtin_msa_subsus_u_d
   32567       {Intrinsic::mips_subsus_u_h, 68888}, // __builtin_msa_subsus_u_h
   32568       {Intrinsic::mips_subsus_u_w, 68913}, // __builtin_msa_subsus_u_w
   32569       {Intrinsic::mips_subsuu_s_b, 68938}, // __builtin_msa_subsuu_s_b
   32570       {Intrinsic::mips_subsuu_s_d, 68963}, // __builtin_msa_subsuu_s_d
   32571       {Intrinsic::mips_subsuu_s_h, 68988}, // __builtin_msa_subsuu_s_h
   32572       {Intrinsic::mips_subsuu_s_w, 69013}, // __builtin_msa_subsuu_s_w
   32573       {Intrinsic::mips_subv_b, 69184}, // __builtin_msa_subv_b
   32574       {Intrinsic::mips_subv_d, 69205}, // __builtin_msa_subv_d
   32575       {Intrinsic::mips_subv_h, 69226}, // __builtin_msa_subv_h
   32576       {Intrinsic::mips_subv_w, 69247}, // __builtin_msa_subv_w
   32577       {Intrinsic::mips_subvi_b, 69268}, // __builtin_msa_subvi_b
   32578       {Intrinsic::mips_subvi_d, 69290}, // __builtin_msa_subvi_d
   32579       {Intrinsic::mips_subvi_h, 69312}, // __builtin_msa_subvi_h
   32580       {Intrinsic::mips_subvi_w, 69334}, // __builtin_msa_subvi_w
   32581       {Intrinsic::mips_vshf_b, 69356}, // __builtin_msa_vshf_b
   32582       {Intrinsic::mips_vshf_d, 69377}, // __builtin_msa_vshf_d
   32583       {Intrinsic::mips_vshf_h, 69398}, // __builtin_msa_vshf_h
   32584       {Intrinsic::mips_vshf_w, 69419}, // __builtin_msa_vshf_w
   32585       {Intrinsic::mips_xor_v, 69461}, // __builtin_msa_xor_v
   32586       {Intrinsic::mips_xori_b, 69481}, // __builtin_msa_xori_b
   32587     };
   32588     auto I = std::lower_bound(std::begin(mipsNames),
   32589                               std::end(mipsNames),
   32590                               BuiltinNameStr);
   32591     if (I != std::end(mipsNames) &&
   32592         I->getName() == BuiltinNameStr)
   32593       return I->IntrinID;
   32594   }
   32595   if (TargetPrefix == "nvvm") {
   32596     static const BuiltinEntry nvvmNames[] = {
   32597       {Intrinsic::nvvm_add_rm_d, 69502}, // __nvvm_add_rm_d
   32598       {Intrinsic::nvvm_add_rm_f, 69518}, // __nvvm_add_rm_f
   32599       {Intrinsic::nvvm_add_rm_ftz_f, 69534}, // __nvvm_add_rm_ftz_f
   32600       {Intrinsic::nvvm_add_rn_d, 69554}, // __nvvm_add_rn_d
   32601       {Intrinsic::nvvm_add_rn_f, 69570}, // __nvvm_add_rn_f
   32602       {Intrinsic::nvvm_add_rn_ftz_f, 69586}, // __nvvm_add_rn_ftz_f
   32603       {Intrinsic::nvvm_add_rp_d, 69606}, // __nvvm_add_rp_d
   32604       {Intrinsic::nvvm_add_rp_f, 69622}, // __nvvm_add_rp_f
   32605       {Intrinsic::nvvm_add_rp_ftz_f, 69638}, // __nvvm_add_rp_ftz_f
   32606       {Intrinsic::nvvm_add_rz_d, 69658}, // __nvvm_add_rz_d
   32607       {Intrinsic::nvvm_add_rz_f, 69674}, // __nvvm_add_rz_f
   32608       {Intrinsic::nvvm_add_rz_ftz_f, 69690}, // __nvvm_add_rz_ftz_f
   32609       {Intrinsic::nvvm_barrier, 69747}, // __nvvm_bar
   32610       {Intrinsic::nvvm_barrier0_and, 69829}, // __nvvm_bar0_and
   32611       {Intrinsic::nvvm_barrier0_or, 69845}, // __nvvm_bar0_or
   32612       {Intrinsic::nvvm_barrier0_popc, 69860}, // __nvvm_bar0_popc
   32613       {Intrinsic::nvvm_barrier_n, 69758}, // __nvvm_bar_n
   32614       {Intrinsic::nvvm_bar_sync, 69710}, // __nvvm_bar_sync
   32615       {Intrinsic::nvvm_bar_warp_sync, 69726}, // __nvvm_bar_warp_sync
   32616       {Intrinsic::nvvm_barrier_sync, 69771}, // __nvvm_barrier_sync
   32617       {Intrinsic::nvvm_barrier_sync_cnt, 69791}, // __nvvm_barrier_sync_cnt
   32618       {Intrinsic::nvvm_bitcast_d2ll, 69877}, // __nvvm_bitcast_d2ll
   32619       {Intrinsic::nvvm_bitcast_f2i, 69897}, // __nvvm_bitcast_f2i
   32620       {Intrinsic::nvvm_bitcast_i2f, 69916}, // __nvvm_bitcast_i2f
   32621       {Intrinsic::nvvm_bitcast_ll2d, 69935}, // __nvvm_bitcast_ll2d
   32622       {Intrinsic::nvvm_ceil_d, 69955}, // __nvvm_ceil_d
   32623       {Intrinsic::nvvm_ceil_f, 69969}, // __nvvm_ceil_f
   32624       {Intrinsic::nvvm_ceil_ftz_f, 69983}, // __nvvm_ceil_ftz_f
   32625       {Intrinsic::nvvm_cos_approx_f, 70001}, // __nvvm_cos_approx_f
   32626       {Intrinsic::nvvm_cos_approx_ftz_f, 70021}, // __nvvm_cos_approx_ftz_f
   32627       {Intrinsic::nvvm_d2f_rm, 70045}, // __nvvm_d2f_rm
   32628       {Intrinsic::nvvm_d2f_rm_ftz, 70059}, // __nvvm_d2f_rm_ftz
   32629       {Intrinsic::nvvm_d2f_rn, 70077}, // __nvvm_d2f_rn
   32630       {Intrinsic::nvvm_d2f_rn_ftz, 70091}, // __nvvm_d2f_rn_ftz
   32631       {Intrinsic::nvvm_d2f_rp, 70109}, // __nvvm_d2f_rp
   32632       {Intrinsic::nvvm_d2f_rp_ftz, 70123}, // __nvvm_d2f_rp_ftz
   32633       {Intrinsic::nvvm_d2f_rz, 70141}, // __nvvm_d2f_rz
   32634       {Intrinsic::nvvm_d2f_rz_ftz, 70155}, // __nvvm_d2f_rz_ftz
   32635       {Intrinsic::nvvm_d2i_hi, 70173}, // __nvvm_d2i_hi
   32636       {Intrinsic::nvvm_d2i_lo, 70187}, // __nvvm_d2i_lo
   32637       {Intrinsic::nvvm_d2i_rm, 70201}, // __nvvm_d2i_rm
   32638       {Intrinsic::nvvm_d2i_rn, 70215}, // __nvvm_d2i_rn
   32639       {Intrinsic::nvvm_d2i_rp, 70229}, // __nvvm_d2i_rp
   32640       {Intrinsic::nvvm_d2i_rz, 70243}, // __nvvm_d2i_rz
   32641       {Intrinsic::nvvm_d2ll_rm, 70257}, // __nvvm_d2ll_rm
   32642       {Intrinsic::nvvm_d2ll_rn, 70272}, // __nvvm_d2ll_rn
   32643       {Intrinsic::nvvm_d2ll_rp, 70287}, // __nvvm_d2ll_rp
   32644       {Intrinsic::nvvm_d2ll_rz, 70302}, // __nvvm_d2ll_rz
   32645       {Intrinsic::nvvm_d2ui_rm, 70317}, // __nvvm_d2ui_rm
   32646       {Intrinsic::nvvm_d2ui_rn, 70332}, // __nvvm_d2ui_rn
   32647       {Intrinsic::nvvm_d2ui_rp, 70347}, // __nvvm_d2ui_rp
   32648       {Intrinsic::nvvm_d2ui_rz, 70362}, // __nvvm_d2ui_rz
   32649       {Intrinsic::nvvm_d2ull_rm, 70377}, // __nvvm_d2ull_rm
   32650       {Intrinsic::nvvm_d2ull_rn, 70393}, // __nvvm_d2ull_rn
   32651       {Intrinsic::nvvm_d2ull_rp, 70409}, // __nvvm_d2ull_rp
   32652       {Intrinsic::nvvm_d2ull_rz, 70425}, // __nvvm_d2ull_rz
   32653       {Intrinsic::nvvm_div_approx_f, 70441}, // __nvvm_div_approx_f
   32654       {Intrinsic::nvvm_div_approx_ftz_f, 70461}, // __nvvm_div_approx_ftz_f
   32655       {Intrinsic::nvvm_div_rm_d, 70485}, // __nvvm_div_rm_d
   32656       {Intrinsic::nvvm_div_rm_f, 70501}, // __nvvm_div_rm_f
   32657       {Intrinsic::nvvm_div_rm_ftz_f, 70517}, // __nvvm_div_rm_ftz_f
   32658       {Intrinsic::nvvm_div_rn_d, 70537}, // __nvvm_div_rn_d
   32659       {Intrinsic::nvvm_div_rn_f, 70553}, // __nvvm_div_rn_f
   32660       {Intrinsic::nvvm_div_rn_ftz_f, 70569}, // __nvvm_div_rn_ftz_f
   32661       {Intrinsic::nvvm_div_rp_d, 70589}, // __nvvm_div_rp_d
   32662       {Intrinsic::nvvm_div_rp_f, 70605}, // __nvvm_div_rp_f
   32663       {Intrinsic::nvvm_div_rp_ftz_f, 70621}, // __nvvm_div_rp_ftz_f
   32664       {Intrinsic::nvvm_div_rz_d, 70641}, // __nvvm_div_rz_d
   32665       {Intrinsic::nvvm_div_rz_f, 70657}, // __nvvm_div_rz_f
   32666       {Intrinsic::nvvm_div_rz_ftz_f, 70673}, // __nvvm_div_rz_ftz_f
   32667       {Intrinsic::nvvm_ex2_approx_d, 70693}, // __nvvm_ex2_approx_d
   32668       {Intrinsic::nvvm_ex2_approx_f, 70713}, // __nvvm_ex2_approx_f
   32669       {Intrinsic::nvvm_ex2_approx_ftz_f, 70733}, // __nvvm_ex2_approx_ftz_f
   32670       {Intrinsic::nvvm_f2h_rn, 70757}, // __nvvm_f2h_rn
   32671       {Intrinsic::nvvm_f2h_rn_ftz, 70771}, // __nvvm_f2h_rn_ftz
   32672       {Intrinsic::nvvm_f2i_rm, 70789}, // __nvvm_f2i_rm
   32673       {Intrinsic::nvvm_f2i_rm_ftz, 70803}, // __nvvm_f2i_rm_ftz
   32674       {Intrinsic::nvvm_f2i_rn, 70821}, // __nvvm_f2i_rn
   32675       {Intrinsic::nvvm_f2i_rn_ftz, 70835}, // __nvvm_f2i_rn_ftz
   32676       {Intrinsic::nvvm_f2i_rp, 70853}, // __nvvm_f2i_rp
   32677       {Intrinsic::nvvm_f2i_rp_ftz, 70867}, // __nvvm_f2i_rp_ftz
   32678       {Intrinsic::nvvm_f2i_rz, 70885}, // __nvvm_f2i_rz
   32679       {Intrinsic::nvvm_f2i_rz_ftz, 70899}, // __nvvm_f2i_rz_ftz
   32680       {Intrinsic::nvvm_f2ll_rm, 70917}, // __nvvm_f2ll_rm
   32681       {Intrinsic::nvvm_f2ll_rm_ftz, 70932}, // __nvvm_f2ll_rm_ftz
   32682       {Intrinsic::nvvm_f2ll_rn, 70951}, // __nvvm_f2ll_rn
   32683       {Intrinsic::nvvm_f2ll_rn_ftz, 70966}, // __nvvm_f2ll_rn_ftz
   32684       {Intrinsic::nvvm_f2ll_rp, 70985}, // __nvvm_f2ll_rp
   32685       {Intrinsic::nvvm_f2ll_rp_ftz, 71000}, // __nvvm_f2ll_rp_ftz
   32686       {Intrinsic::nvvm_f2ll_rz, 71019}, // __nvvm_f2ll_rz
   32687       {Intrinsic::nvvm_f2ll_rz_ftz, 71034}, // __nvvm_f2ll_rz_ftz
   32688       {Intrinsic::nvvm_f2ui_rm, 71053}, // __nvvm_f2ui_rm
   32689       {Intrinsic::nvvm_f2ui_rm_ftz, 71068}, // __nvvm_f2ui_rm_ftz
   32690       {Intrinsic::nvvm_f2ui_rn, 71087}, // __nvvm_f2ui_rn
   32691       {Intrinsic::nvvm_f2ui_rn_ftz, 71102}, // __nvvm_f2ui_rn_ftz
   32692       {Intrinsic::nvvm_f2ui_rp, 71121}, // __nvvm_f2ui_rp
   32693       {Intrinsic::nvvm_f2ui_rp_ftz, 71136}, // __nvvm_f2ui_rp_ftz
   32694       {Intrinsic::nvvm_f2ui_rz, 71155}, // __nvvm_f2ui_rz
   32695       {Intrinsic::nvvm_f2ui_rz_ftz, 71170}, // __nvvm_f2ui_rz_ftz
   32696       {Intrinsic::nvvm_f2ull_rm, 71189}, // __nvvm_f2ull_rm
   32697       {Intrinsic::nvvm_f2ull_rm_ftz, 71205}, // __nvvm_f2ull_rm_ftz
   32698       {Intrinsic::nvvm_f2ull_rn, 71225}, // __nvvm_f2ull_rn
   32699       {Intrinsic::nvvm_f2ull_rn_ftz, 71241}, // __nvvm_f2ull_rn_ftz
   32700       {Intrinsic::nvvm_f2ull_rp, 71261}, // __nvvm_f2ull_rp
   32701       {Intrinsic::nvvm_f2ull_rp_ftz, 71277}, // __nvvm_f2ull_rp_ftz
   32702       {Intrinsic::nvvm_f2ull_rz, 71297}, // __nvvm_f2ull_rz
   32703       {Intrinsic::nvvm_f2ull_rz_ftz, 71313}, // __nvvm_f2ull_rz_ftz
   32704       {Intrinsic::nvvm_fabs_d, 71333}, // __nvvm_fabs_d
   32705       {Intrinsic::nvvm_fabs_f, 71347}, // __nvvm_fabs_f
   32706       {Intrinsic::nvvm_fabs_ftz_f, 71361}, // __nvvm_fabs_ftz_f
   32707       {Intrinsic::nvvm_floor_d, 71379}, // __nvvm_floor_d
   32708       {Intrinsic::nvvm_floor_f, 71394}, // __nvvm_floor_f
   32709       {Intrinsic::nvvm_floor_ftz_f, 71409}, // __nvvm_floor_ftz_f
   32710       {Intrinsic::nvvm_fma_rm_d, 71428}, // __nvvm_fma_rm_d
   32711       {Intrinsic::nvvm_fma_rm_f, 71444}, // __nvvm_fma_rm_f
   32712       {Intrinsic::nvvm_fma_rm_ftz_f, 71460}, // __nvvm_fma_rm_ftz_f
   32713       {Intrinsic::nvvm_fma_rn_d, 71480}, // __nvvm_fma_rn_d
   32714       {Intrinsic::nvvm_fma_rn_f, 71496}, // __nvvm_fma_rn_f
   32715       {Intrinsic::nvvm_fma_rn_ftz_f, 71512}, // __nvvm_fma_rn_ftz_f
   32716       {Intrinsic::nvvm_fma_rp_d, 71532}, // __nvvm_fma_rp_d
   32717       {Intrinsic::nvvm_fma_rp_f, 71548}, // __nvvm_fma_rp_f
   32718       {Intrinsic::nvvm_fma_rp_ftz_f, 71564}, // __nvvm_fma_rp_ftz_f
   32719       {Intrinsic::nvvm_fma_rz_d, 71584}, // __nvvm_fma_rz_d
   32720       {Intrinsic::nvvm_fma_rz_f, 71600}, // __nvvm_fma_rz_f
   32721       {Intrinsic::nvvm_fma_rz_ftz_f, 71616}, // __nvvm_fma_rz_ftz_f
   32722       {Intrinsic::nvvm_fmax_d, 71636}, // __nvvm_fmax_d
   32723       {Intrinsic::nvvm_fmax_f, 71650}, // __nvvm_fmax_f
   32724       {Intrinsic::nvvm_fmax_ftz_f, 71664}, // __nvvm_fmax_ftz_f
   32725       {Intrinsic::nvvm_fmin_d, 71682}, // __nvvm_fmin_d
   32726       {Intrinsic::nvvm_fmin_f, 71696}, // __nvvm_fmin_f
   32727       {Intrinsic::nvvm_fmin_ftz_f, 71710}, // __nvvm_fmin_ftz_f
   32728       {Intrinsic::nvvm_i2d_rm, 71728}, // __nvvm_i2d_rm
   32729       {Intrinsic::nvvm_i2d_rn, 71742}, // __nvvm_i2d_rn
   32730       {Intrinsic::nvvm_i2d_rp, 71756}, // __nvvm_i2d_rp
   32731       {Intrinsic::nvvm_i2d_rz, 71770}, // __nvvm_i2d_rz
   32732       {Intrinsic::nvvm_i2f_rm, 71784}, // __nvvm_i2f_rm
   32733       {Intrinsic::nvvm_i2f_rn, 71798}, // __nvvm_i2f_rn
   32734       {Intrinsic::nvvm_i2f_rp, 71812}, // __nvvm_i2f_rp
   32735       {Intrinsic::nvvm_i2f_rz, 71826}, // __nvvm_i2f_rz
   32736       {Intrinsic::nvvm_isspacep_const, 71840}, // __nvvm_isspacep_const
   32737       {Intrinsic::nvvm_isspacep_global, 71862}, // __nvvm_isspacep_global
   32738       {Intrinsic::nvvm_isspacep_local, 71885}, // __nvvm_isspacep_local
   32739       {Intrinsic::nvvm_isspacep_shared, 71907}, // __nvvm_isspacep_shared
   32740       {Intrinsic::nvvm_istypep_sampler, 71930}, // __nvvm_istypep_sampler
   32741       {Intrinsic::nvvm_istypep_surface, 71953}, // __nvvm_istypep_surface
   32742       {Intrinsic::nvvm_istypep_texture, 71976}, // __nvvm_istypep_texture
   32743       {Intrinsic::nvvm_lg2_approx_d, 71999}, // __nvvm_lg2_approx_d
   32744       {Intrinsic::nvvm_lg2_approx_f, 72019}, // __nvvm_lg2_approx_f
   32745       {Intrinsic::nvvm_lg2_approx_ftz_f, 72039}, // __nvvm_lg2_approx_ftz_f
   32746       {Intrinsic::nvvm_ll2d_rm, 72063}, // __nvvm_ll2d_rm
   32747       {Intrinsic::nvvm_ll2d_rn, 72078}, // __nvvm_ll2d_rn
   32748       {Intrinsic::nvvm_ll2d_rp, 72093}, // __nvvm_ll2d_rp
   32749       {Intrinsic::nvvm_ll2d_rz, 72108}, // __nvvm_ll2d_rz
   32750       {Intrinsic::nvvm_ll2f_rm, 72123}, // __nvvm_ll2f_rm
   32751       {Intrinsic::nvvm_ll2f_rn, 72138}, // __nvvm_ll2f_rn
   32752       {Intrinsic::nvvm_ll2f_rp, 72153}, // __nvvm_ll2f_rp
   32753       {Intrinsic::nvvm_ll2f_rz, 72168}, // __nvvm_ll2f_rz
   32754       {Intrinsic::nvvm_lohi_i2d, 72183}, // __nvvm_lohi_i2d
   32755       {Intrinsic::nvvm_match_any_sync_i32, 72199}, // __nvvm_match_any_sync_i32
   32756       {Intrinsic::nvvm_match_any_sync_i64, 72225}, // __nvvm_match_any_sync_i64
   32757       {Intrinsic::nvvm_membar_cta, 72251}, // __nvvm_membar_cta
   32758       {Intrinsic::nvvm_membar_gl, 72269}, // __nvvm_membar_gl
   32759       {Intrinsic::nvvm_membar_sys, 72286}, // __nvvm_membar_sys
   32760       {Intrinsic::nvvm_mul24_i, 72512}, // __nvvm_mul24_i
   32761       {Intrinsic::nvvm_mul24_ui, 72527}, // __nvvm_mul24_ui
   32762       {Intrinsic::nvvm_mul_rm_d, 72304}, // __nvvm_mul_rm_d
   32763       {Intrinsic::nvvm_mul_rm_f, 72320}, // __nvvm_mul_rm_f
   32764       {Intrinsic::nvvm_mul_rm_ftz_f, 72336}, // __nvvm_mul_rm_ftz_f
   32765       {Intrinsic::nvvm_mul_rn_d, 72356}, // __nvvm_mul_rn_d
   32766       {Intrinsic::nvvm_mul_rn_f, 72372}, // __nvvm_mul_rn_f
   32767       {Intrinsic::nvvm_mul_rn_ftz_f, 72388}, // __nvvm_mul_rn_ftz_f
   32768       {Intrinsic::nvvm_mul_rp_d, 72408}, // __nvvm_mul_rp_d
   32769       {Intrinsic::nvvm_mul_rp_f, 72424}, // __nvvm_mul_rp_f
   32770       {Intrinsic::nvvm_mul_rp_ftz_f, 72440}, // __nvvm_mul_rp_ftz_f
   32771       {Intrinsic::nvvm_mul_rz_d, 72460}, // __nvvm_mul_rz_d
   32772       {Intrinsic::nvvm_mul_rz_f, 72476}, // __nvvm_mul_rz_f
   32773       {Intrinsic::nvvm_mul_rz_ftz_f, 72492}, // __nvvm_mul_rz_ftz_f
   32774       {Intrinsic::nvvm_mulhi_i, 72543}, // __nvvm_mulhi_i
   32775       {Intrinsic::nvvm_mulhi_ll, 72558}, // __nvvm_mulhi_ll
   32776       {Intrinsic::nvvm_mulhi_ui, 72574}, // __nvvm_mulhi_ui
   32777       {Intrinsic::nvvm_mulhi_ull, 72590}, // __nvvm_mulhi_ull
   32778       {Intrinsic::nvvm_prmt, 72607}, // __nvvm_prmt
   32779       {Intrinsic::nvvm_rcp_approx_ftz_d, 72619}, // __nvvm_rcp_approx_ftz_d
   32780       {Intrinsic::nvvm_rcp_rm_d, 72643}, // __nvvm_rcp_rm_d
   32781       {Intrinsic::nvvm_rcp_rm_f, 72659}, // __nvvm_rcp_rm_f
   32782       {Intrinsic::nvvm_rcp_rm_ftz_f, 72675}, // __nvvm_rcp_rm_ftz_f
   32783       {Intrinsic::nvvm_rcp_rn_d, 72695}, // __nvvm_rcp_rn_d
   32784       {Intrinsic::nvvm_rcp_rn_f, 72711}, // __nvvm_rcp_rn_f
   32785       {Intrinsic::nvvm_rcp_rn_ftz_f, 72727}, // __nvvm_rcp_rn_ftz_f
   32786       {Intrinsic::nvvm_rcp_rp_d, 72747}, // __nvvm_rcp_rp_d
   32787       {Intrinsic::nvvm_rcp_rp_f, 72763}, // __nvvm_rcp_rp_f
   32788       {Intrinsic::nvvm_rcp_rp_ftz_f, 72779}, // __nvvm_rcp_rp_ftz_f
   32789       {Intrinsic::nvvm_rcp_rz_d, 72799}, // __nvvm_rcp_rz_d
   32790       {Intrinsic::nvvm_rcp_rz_f, 72815}, // __nvvm_rcp_rz_f
   32791       {Intrinsic::nvvm_rcp_rz_ftz_f, 72831}, // __nvvm_rcp_rz_ftz_f
   32792       {Intrinsic::nvvm_read_ptx_sreg_clock, 72851}, // __nvvm_read_ptx_sreg_clock
   32793       {Intrinsic::nvvm_read_ptx_sreg_clock64, 72878}, // __nvvm_read_ptx_sreg_clock64
   32794       {Intrinsic::nvvm_read_ptx_sreg_ctaid_w, 72907}, // __nvvm_read_ptx_sreg_ctaid_w
   32795       {Intrinsic::nvvm_read_ptx_sreg_ctaid_x, 72936}, // __nvvm_read_ptx_sreg_ctaid_x
   32796       {Intrinsic::nvvm_read_ptx_sreg_ctaid_y, 72965}, // __nvvm_read_ptx_sreg_ctaid_y
   32797       {Intrinsic::nvvm_read_ptx_sreg_ctaid_z, 72994}, // __nvvm_read_ptx_sreg_ctaid_z
   32798       {Intrinsic::nvvm_read_ptx_sreg_envreg0, 73023}, // __nvvm_read_ptx_sreg_envreg0
   32799       {Intrinsic::nvvm_read_ptx_sreg_envreg1, 73052}, // __nvvm_read_ptx_sreg_envreg1
   32800       {Intrinsic::nvvm_read_ptx_sreg_envreg10, 73081}, // __nvvm_read_ptx_sreg_envreg10
   32801       {Intrinsic::nvvm_read_ptx_sreg_envreg11, 73111}, // __nvvm_read_ptx_sreg_envreg11
   32802       {Intrinsic::nvvm_read_ptx_sreg_envreg12, 73141}, // __nvvm_read_ptx_sreg_envreg12
   32803       {Intrinsic::nvvm_read_ptx_sreg_envreg13, 73171}, // __nvvm_read_ptx_sreg_envreg13
   32804       {Intrinsic::nvvm_read_ptx_sreg_envreg14, 73201}, // __nvvm_read_ptx_sreg_envreg14
   32805       {Intrinsic::nvvm_read_ptx_sreg_envreg15, 73231}, // __nvvm_read_ptx_sreg_envreg15
   32806       {Intrinsic::nvvm_read_ptx_sreg_envreg16, 73261}, // __nvvm_read_ptx_sreg_envreg16
   32807       {Intrinsic::nvvm_read_ptx_sreg_envreg17, 73291}, // __nvvm_read_ptx_sreg_envreg17
   32808       {Intrinsic::nvvm_read_ptx_sreg_envreg18, 73321}, // __nvvm_read_ptx_sreg_envreg18
   32809       {Intrinsic::nvvm_read_ptx_sreg_envreg19, 73351}, // __nvvm_read_ptx_sreg_envreg19
   32810       {Intrinsic::nvvm_read_ptx_sreg_envreg2, 73381}, // __nvvm_read_ptx_sreg_envreg2
   32811       {Intrinsic::nvvm_read_ptx_sreg_envreg20, 73410}, // __nvvm_read_ptx_sreg_envreg20
   32812       {Intrinsic::nvvm_read_ptx_sreg_envreg21, 73440}, // __nvvm_read_ptx_sreg_envreg21
   32813       {Intrinsic::nvvm_read_ptx_sreg_envreg22, 73470}, // __nvvm_read_ptx_sreg_envreg22
   32814       {Intrinsic::nvvm_read_ptx_sreg_envreg23, 73500}, // __nvvm_read_ptx_sreg_envreg23
   32815       {Intrinsic::nvvm_read_ptx_sreg_envreg24, 73530}, // __nvvm_read_ptx_sreg_envreg24
   32816       {Intrinsic::nvvm_read_ptx_sreg_envreg25, 73560}, // __nvvm_read_ptx_sreg_envreg25
   32817       {Intrinsic::nvvm_read_ptx_sreg_envreg26, 73590}, // __nvvm_read_ptx_sreg_envreg26
   32818       {Intrinsic::nvvm_read_ptx_sreg_envreg27, 73620}, // __nvvm_read_ptx_sreg_envreg27
   32819       {Intrinsic::nvvm_read_ptx_sreg_envreg28, 73650}, // __nvvm_read_ptx_sreg_envreg28
   32820       {Intrinsic::nvvm_read_ptx_sreg_envreg29, 73680}, // __nvvm_read_ptx_sreg_envreg29
   32821       {Intrinsic::nvvm_read_ptx_sreg_envreg3, 73710}, // __nvvm_read_ptx_sreg_envreg3
   32822       {Intrinsic::nvvm_read_ptx_sreg_envreg30, 73739}, // __nvvm_read_ptx_sreg_envreg30
   32823       {Intrinsic::nvvm_read_ptx_sreg_envreg31, 73769}, // __nvvm_read_ptx_sreg_envreg31
   32824       {Intrinsic::nvvm_read_ptx_sreg_envreg4, 73799}, // __nvvm_read_ptx_sreg_envreg4
   32825       {Intrinsic::nvvm_read_ptx_sreg_envreg5, 73828}, // __nvvm_read_ptx_sreg_envreg5
   32826       {Intrinsic::nvvm_read_ptx_sreg_envreg6, 73857}, // __nvvm_read_ptx_sreg_envreg6
   32827       {Intrinsic::nvvm_read_ptx_sreg_envreg7, 73886}, // __nvvm_read_ptx_sreg_envreg7
   32828       {Intrinsic::nvvm_read_ptx_sreg_envreg8, 73915}, // __nvvm_read_ptx_sreg_envreg8
   32829       {Intrinsic::nvvm_read_ptx_sreg_envreg9, 73944}, // __nvvm_read_ptx_sreg_envreg9
   32830       {Intrinsic::nvvm_read_ptx_sreg_gridid, 73973}, // __nvvm_read_ptx_sreg_gridid
   32831       {Intrinsic::nvvm_read_ptx_sreg_laneid, 74001}, // __nvvm_read_ptx_sreg_laneid
   32832       {Intrinsic::nvvm_read_ptx_sreg_lanemask_eq, 74029}, // __nvvm_read_ptx_sreg_lanemask_eq
   32833       {Intrinsic::nvvm_read_ptx_sreg_lanemask_ge, 74062}, // __nvvm_read_ptx_sreg_lanemask_ge
   32834       {Intrinsic::nvvm_read_ptx_sreg_lanemask_gt, 74095}, // __nvvm_read_ptx_sreg_lanemask_gt
   32835       {Intrinsic::nvvm_read_ptx_sreg_lanemask_le, 74128}, // __nvvm_read_ptx_sreg_lanemask_le
   32836       {Intrinsic::nvvm_read_ptx_sreg_lanemask_lt, 74161}, // __nvvm_read_ptx_sreg_lanemask_lt
   32837       {Intrinsic::nvvm_read_ptx_sreg_nctaid_w, 74194}, // __nvvm_read_ptx_sreg_nctaid_w
   32838       {Intrinsic::nvvm_read_ptx_sreg_nctaid_x, 74224}, // __nvvm_read_ptx_sreg_nctaid_x
   32839       {Intrinsic::nvvm_read_ptx_sreg_nctaid_y, 74254}, // __nvvm_read_ptx_sreg_nctaid_y
   32840       {Intrinsic::nvvm_read_ptx_sreg_nctaid_z, 74284}, // __nvvm_read_ptx_sreg_nctaid_z
   32841       {Intrinsic::nvvm_read_ptx_sreg_nsmid, 74314}, // __nvvm_read_ptx_sreg_nsmid
   32842       {Intrinsic::nvvm_read_ptx_sreg_ntid_w, 74341}, // __nvvm_read_ptx_sreg_ntid_w
   32843       {Intrinsic::nvvm_read_ptx_sreg_ntid_x, 74369}, // __nvvm_read_ptx_sreg_ntid_x
   32844       {Intrinsic::nvvm_read_ptx_sreg_ntid_y, 74397}, // __nvvm_read_ptx_sreg_ntid_y
   32845       {Intrinsic::nvvm_read_ptx_sreg_ntid_z, 74425}, // __nvvm_read_ptx_sreg_ntid_z
   32846       {Intrinsic::nvvm_read_ptx_sreg_nwarpid, 74453}, // __nvvm_read_ptx_sreg_nwarpid
   32847       {Intrinsic::nvvm_read_ptx_sreg_pm0, 74482}, // __nvvm_read_ptx_sreg_pm0
   32848       {Intrinsic::nvvm_read_ptx_sreg_pm1, 74507}, // __nvvm_read_ptx_sreg_pm1
   32849       {Intrinsic::nvvm_read_ptx_sreg_pm2, 74532}, // __nvvm_read_ptx_sreg_pm2
   32850       {Intrinsic::nvvm_read_ptx_sreg_pm3, 74557}, // __nvvm_read_ptx_sreg_pm3
   32851       {Intrinsic::nvvm_read_ptx_sreg_smid, 74582}, // __nvvm_read_ptx_sreg_smid
   32852       {Intrinsic::nvvm_read_ptx_sreg_tid_w, 74608}, // __nvvm_read_ptx_sreg_tid_w
   32853       {Intrinsic::nvvm_read_ptx_sreg_tid_x, 74635}, // __nvvm_read_ptx_sreg_tid_x
   32854       {Intrinsic::nvvm_read_ptx_sreg_tid_y, 74662}, // __nvvm_read_ptx_sreg_tid_y
   32855       {Intrinsic::nvvm_read_ptx_sreg_tid_z, 74689}, // __nvvm_read_ptx_sreg_tid_z
   32856       {Intrinsic::nvvm_read_ptx_sreg_warpid, 74716}, // __nvvm_read_ptx_sreg_warpid
   32857       {Intrinsic::nvvm_read_ptx_sreg_warpsize, 74744}, // __nvvm_read_ptx_sreg_warpsize
   32858       {Intrinsic::nvvm_rotate_b32, 74774}, // __nvvm_rotate_b32
   32859       {Intrinsic::nvvm_rotate_b64, 74792}, // __nvvm_rotate_b64
   32860       {Intrinsic::nvvm_rotate_right_b64, 74810}, // __nvvm_rotate_right_b64
   32861       {Intrinsic::nvvm_round_d, 74834}, // __nvvm_round_d
   32862       {Intrinsic::nvvm_round_f, 74849}, // __nvvm_round_f
   32863       {Intrinsic::nvvm_round_ftz_f, 74864}, // __nvvm_round_ftz_f
   32864       {Intrinsic::nvvm_rsqrt_approx_d, 74883}, // __nvvm_rsqrt_approx_d
   32865       {Intrinsic::nvvm_rsqrt_approx_f, 74905}, // __nvvm_rsqrt_approx_f
   32866       {Intrinsic::nvvm_rsqrt_approx_ftz_f, 74927}, // __nvvm_rsqrt_approx_ftz_f
   32867       {Intrinsic::nvvm_sad_i, 74953}, // __nvvm_sad_i
   32868       {Intrinsic::nvvm_sad_ui, 74966}, // __nvvm_sad_ui
   32869       {Intrinsic::nvvm_saturate_d, 74980}, // __nvvm_saturate_d
   32870       {Intrinsic::nvvm_saturate_f, 74998}, // __nvvm_saturate_f
   32871       {Intrinsic::nvvm_saturate_ftz_f, 75016}, // __nvvm_saturate_ftz_f
   32872       {Intrinsic::nvvm_shfl_bfly_f32, 75038}, // __nvvm_shfl_bfly_f32
   32873       {Intrinsic::nvvm_shfl_bfly_i32, 75059}, // __nvvm_shfl_bfly_i32
   32874       {Intrinsic::nvvm_shfl_down_f32, 75080}, // __nvvm_shfl_down_f32
   32875       {Intrinsic::nvvm_shfl_down_i32, 75101}, // __nvvm_shfl_down_i32
   32876       {Intrinsic::nvvm_shfl_idx_f32, 75122}, // __nvvm_shfl_idx_f32
   32877       {Intrinsic::nvvm_shfl_idx_i32, 75142}, // __nvvm_shfl_idx_i32
   32878       {Intrinsic::nvvm_shfl_sync_bfly_f32, 75162}, // __nvvm_shfl_sync_bfly_f32
   32879       {Intrinsic::nvvm_shfl_sync_bfly_i32, 75188}, // __nvvm_shfl_sync_bfly_i32
   32880       {Intrinsic::nvvm_shfl_sync_down_f32, 75214}, // __nvvm_shfl_sync_down_f32
   32881       {Intrinsic::nvvm_shfl_sync_down_i32, 75240}, // __nvvm_shfl_sync_down_i32
   32882       {Intrinsic::nvvm_shfl_sync_idx_f32, 75266}, // __nvvm_shfl_sync_idx_f32
   32883       {Intrinsic::nvvm_shfl_sync_idx_i32, 75291}, // __nvvm_shfl_sync_idx_i32
   32884       {Intrinsic::nvvm_shfl_sync_up_f32, 75316}, // __nvvm_shfl_sync_up_f32
   32885       {Intrinsic::nvvm_shfl_sync_up_i32, 75340}, // __nvvm_shfl_sync_up_i32
   32886       {Intrinsic::nvvm_shfl_up_f32, 75364}, // __nvvm_shfl_up_f32
   32887       {Intrinsic::nvvm_shfl_up_i32, 75383}, // __nvvm_shfl_up_i32
   32888       {Intrinsic::nvvm_sin_approx_f, 75402}, // __nvvm_sin_approx_f
   32889       {Intrinsic::nvvm_sin_approx_ftz_f, 75422}, // __nvvm_sin_approx_ftz_f
   32890       {Intrinsic::nvvm_sqrt_approx_f, 75446}, // __nvvm_sqrt_approx_f
   32891       {Intrinsic::nvvm_sqrt_approx_ftz_f, 75467}, // __nvvm_sqrt_approx_ftz_f
   32892       {Intrinsic::nvvm_sqrt_f, 75492}, // __nvvm_sqrt_f
   32893       {Intrinsic::nvvm_sqrt_rm_d, 75506}, // __nvvm_sqrt_rm_d
   32894       {Intrinsic::nvvm_sqrt_rm_f, 75523}, // __nvvm_sqrt_rm_f
   32895       {Intrinsic::nvvm_sqrt_rm_ftz_f, 75540}, // __nvvm_sqrt_rm_ftz_f
   32896       {Intrinsic::nvvm_sqrt_rn_d, 75561}, // __nvvm_sqrt_rn_d
   32897       {Intrinsic::nvvm_sqrt_rn_f, 75578}, // __nvvm_sqrt_rn_f
   32898       {Intrinsic::nvvm_sqrt_rn_ftz_f, 75595}, // __nvvm_sqrt_rn_ftz_f
   32899       {Intrinsic::nvvm_sqrt_rp_d, 75616}, // __nvvm_sqrt_rp_d
   32900       {Intrinsic::nvvm_sqrt_rp_f, 75633}, // __nvvm_sqrt_rp_f
   32901       {Intrinsic::nvvm_sqrt_rp_ftz_f, 75650}, // __nvvm_sqrt_rp_ftz_f
   32902       {Intrinsic::nvvm_sqrt_rz_d, 75671}, // __nvvm_sqrt_rz_d
   32903       {Intrinsic::nvvm_sqrt_rz_f, 75688}, // __nvvm_sqrt_rz_f
   32904       {Intrinsic::nvvm_sqrt_rz_ftz_f, 75705}, // __nvvm_sqrt_rz_ftz_f
   32905       {Intrinsic::nvvm_suq_array_size, 75726}, // __nvvm_suq_array_size
   32906       {Intrinsic::nvvm_suq_channel_data_type, 75748}, // __nvvm_suq_channel_data_type
   32907       {Intrinsic::nvvm_suq_channel_order, 75777}, // __nvvm_suq_channel_order
   32908       {Intrinsic::nvvm_suq_depth, 75802}, // __nvvm_suq_depth
   32909       {Intrinsic::nvvm_suq_height, 75819}, // __nvvm_suq_height
   32910       {Intrinsic::nvvm_suq_width, 75837}, // __nvvm_suq_width
   32911       {Intrinsic::nvvm_sust_b_1d_array_i16_clamp, 75854}, // __nvvm_sust_b_1d_array_i16_clamp
   32912       {Intrinsic::nvvm_sust_b_1d_array_i16_trap, 75887}, // __nvvm_sust_b_1d_array_i16_trap
   32913       {Intrinsic::nvvm_sust_b_1d_array_i16_zero, 75919}, // __nvvm_sust_b_1d_array_i16_zero
   32914       {Intrinsic::nvvm_sust_b_1d_array_i32_clamp, 75951}, // __nvvm_sust_b_1d_array_i32_clamp
   32915       {Intrinsic::nvvm_sust_b_1d_array_i32_trap, 75984}, // __nvvm_sust_b_1d_array_i32_trap
   32916       {Intrinsic::nvvm_sust_b_1d_array_i32_zero, 76016}, // __nvvm_sust_b_1d_array_i32_zero
   32917       {Intrinsic::nvvm_sust_b_1d_array_i64_clamp, 76048}, // __nvvm_sust_b_1d_array_i64_clamp
   32918       {Intrinsic::nvvm_sust_b_1d_array_i64_trap, 76081}, // __nvvm_sust_b_1d_array_i64_trap
   32919       {Intrinsic::nvvm_sust_b_1d_array_i64_zero, 76113}, // __nvvm_sust_b_1d_array_i64_zero
   32920       {Intrinsic::nvvm_sust_b_1d_array_i8_clamp, 76145}, // __nvvm_sust_b_1d_array_i8_clamp
   32921       {Intrinsic::nvvm_sust_b_1d_array_i8_trap, 76177}, // __nvvm_sust_b_1d_array_i8_trap
   32922       {Intrinsic::nvvm_sust_b_1d_array_i8_zero, 76208}, // __nvvm_sust_b_1d_array_i8_zero
   32923       {Intrinsic::nvvm_sust_b_1d_array_v2i16_clamp, 76239}, // __nvvm_sust_b_1d_array_v2i16_clamp
   32924       {Intrinsic::nvvm_sust_b_1d_array_v2i16_trap, 76274}, // __nvvm_sust_b_1d_array_v2i16_trap
   32925       {Intrinsic::nvvm_sust_b_1d_array_v2i16_zero, 76308}, // __nvvm_sust_b_1d_array_v2i16_zero
   32926       {Intrinsic::nvvm_sust_b_1d_array_v2i32_clamp, 76342}, // __nvvm_sust_b_1d_array_v2i32_clamp
   32927       {Intrinsic::nvvm_sust_b_1d_array_v2i32_trap, 76377}, // __nvvm_sust_b_1d_array_v2i32_trap
   32928       {Intrinsic::nvvm_sust_b_1d_array_v2i32_zero, 76411}, // __nvvm_sust_b_1d_array_v2i32_zero
   32929       {Intrinsic::nvvm_sust_b_1d_array_v2i64_clamp, 76445}, // __nvvm_sust_b_1d_array_v2i64_clamp
   32930       {Intrinsic::nvvm_sust_b_1d_array_v2i64_trap, 76480}, // __nvvm_sust_b_1d_array_v2i64_trap
   32931       {Intrinsic::nvvm_sust_b_1d_array_v2i64_zero, 76514}, // __nvvm_sust_b_1d_array_v2i64_zero
   32932       {Intrinsic::nvvm_sust_b_1d_array_v2i8_clamp, 76548}, // __nvvm_sust_b_1d_array_v2i8_clamp
   32933       {Intrinsic::nvvm_sust_b_1d_array_v2i8_trap, 76582}, // __nvvm_sust_b_1d_array_v2i8_trap
   32934       {Intrinsic::nvvm_sust_b_1d_array_v2i8_zero, 76615}, // __nvvm_sust_b_1d_array_v2i8_zero
   32935       {Intrinsic::nvvm_sust_b_1d_array_v4i16_clamp, 76648}, // __nvvm_sust_b_1d_array_v4i16_clamp
   32936       {Intrinsic::nvvm_sust_b_1d_array_v4i16_trap, 76683}, // __nvvm_sust_b_1d_array_v4i16_trap
   32937       {Intrinsic::nvvm_sust_b_1d_array_v4i16_zero, 76717}, // __nvvm_sust_b_1d_array_v4i16_zero
   32938       {Intrinsic::nvvm_sust_b_1d_array_v4i32_clamp, 76751}, // __nvvm_sust_b_1d_array_v4i32_clamp
   32939       {Intrinsic::nvvm_sust_b_1d_array_v4i32_trap, 76786}, // __nvvm_sust_b_1d_array_v4i32_trap
   32940       {Intrinsic::nvvm_sust_b_1d_array_v4i32_zero, 76820}, // __nvvm_sust_b_1d_array_v4i32_zero
   32941       {Intrinsic::nvvm_sust_b_1d_array_v4i8_clamp, 76854}, // __nvvm_sust_b_1d_array_v4i8_clamp
   32942       {Intrinsic::nvvm_sust_b_1d_array_v4i8_trap, 76888}, // __nvvm_sust_b_1d_array_v4i8_trap
   32943       {Intrinsic::nvvm_sust_b_1d_array_v4i8_zero, 76921}, // __nvvm_sust_b_1d_array_v4i8_zero
   32944       {Intrinsic::nvvm_sust_b_1d_i16_clamp, 76954}, // __nvvm_sust_b_1d_i16_clamp
   32945       {Intrinsic::nvvm_sust_b_1d_i16_trap, 76981}, // __nvvm_sust_b_1d_i16_trap
   32946       {Intrinsic::nvvm_sust_b_1d_i16_zero, 77007}, // __nvvm_sust_b_1d_i16_zero
   32947       {Intrinsic::nvvm_sust_b_1d_i32_clamp, 77033}, // __nvvm_sust_b_1d_i32_clamp
   32948       {Intrinsic::nvvm_sust_b_1d_i32_trap, 77060}, // __nvvm_sust_b_1d_i32_trap
   32949       {Intrinsic::nvvm_sust_b_1d_i32_zero, 77086}, // __nvvm_sust_b_1d_i32_zero
   32950       {Intrinsic::nvvm_sust_b_1d_i64_clamp, 77112}, // __nvvm_sust_b_1d_i64_clamp
   32951       {Intrinsic::nvvm_sust_b_1d_i64_trap, 77139}, // __nvvm_sust_b_1d_i64_trap
   32952       {Intrinsic::nvvm_sust_b_1d_i64_zero, 77165}, // __nvvm_sust_b_1d_i64_zero
   32953       {Intrinsic::nvvm_sust_b_1d_i8_clamp, 77191}, // __nvvm_sust_b_1d_i8_clamp
   32954       {Intrinsic::nvvm_sust_b_1d_i8_trap, 77217}, // __nvvm_sust_b_1d_i8_trap
   32955       {Intrinsic::nvvm_sust_b_1d_i8_zero, 77242}, // __nvvm_sust_b_1d_i8_zero
   32956       {Intrinsic::nvvm_sust_b_1d_v2i16_clamp, 77267}, // __nvvm_sust_b_1d_v2i16_clamp
   32957       {Intrinsic::nvvm_sust_b_1d_v2i16_trap, 77296}, // __nvvm_sust_b_1d_v2i16_trap
   32958       {Intrinsic::nvvm_sust_b_1d_v2i16_zero, 77324}, // __nvvm_sust_b_1d_v2i16_zero
   32959       {Intrinsic::nvvm_sust_b_1d_v2i32_clamp, 77352}, // __nvvm_sust_b_1d_v2i32_clamp
   32960       {Intrinsic::nvvm_sust_b_1d_v2i32_trap, 77381}, // __nvvm_sust_b_1d_v2i32_trap
   32961       {Intrinsic::nvvm_sust_b_1d_v2i32_zero, 77409}, // __nvvm_sust_b_1d_v2i32_zero
   32962       {Intrinsic::nvvm_sust_b_1d_v2i64_clamp, 77437}, // __nvvm_sust_b_1d_v2i64_clamp
   32963       {Intrinsic::nvvm_sust_b_1d_v2i64_trap, 77466}, // __nvvm_sust_b_1d_v2i64_trap
   32964       {Intrinsic::nvvm_sust_b_1d_v2i64_zero, 77494}, // __nvvm_sust_b_1d_v2i64_zero
   32965       {Intrinsic::nvvm_sust_b_1d_v2i8_clamp, 77522}, // __nvvm_sust_b_1d_v2i8_clamp
   32966       {Intrinsic::nvvm_sust_b_1d_v2i8_trap, 77550}, // __nvvm_sust_b_1d_v2i8_trap
   32967       {Intrinsic::nvvm_sust_b_1d_v2i8_zero, 77577}, // __nvvm_sust_b_1d_v2i8_zero
   32968       {Intrinsic::nvvm_sust_b_1d_v4i16_clamp, 77604}, // __nvvm_sust_b_1d_v4i16_clamp
   32969       {Intrinsic::nvvm_sust_b_1d_v4i16_trap, 77633}, // __nvvm_sust_b_1d_v4i16_trap
   32970       {Intrinsic::nvvm_sust_b_1d_v4i16_zero, 77661}, // __nvvm_sust_b_1d_v4i16_zero
   32971       {Intrinsic::nvvm_sust_b_1d_v4i32_clamp, 77689}, // __nvvm_sust_b_1d_v4i32_clamp
   32972       {Intrinsic::nvvm_sust_b_1d_v4i32_trap, 77718}, // __nvvm_sust_b_1d_v4i32_trap
   32973       {Intrinsic::nvvm_sust_b_1d_v4i32_zero, 77746}, // __nvvm_sust_b_1d_v4i32_zero
   32974       {Intrinsic::nvvm_sust_b_1d_v4i8_clamp, 77774}, // __nvvm_sust_b_1d_v4i8_clamp
   32975       {Intrinsic::nvvm_sust_b_1d_v4i8_trap, 77802}, // __nvvm_sust_b_1d_v4i8_trap
   32976       {Intrinsic::nvvm_sust_b_1d_v4i8_zero, 77829}, // __nvvm_sust_b_1d_v4i8_zero
   32977       {Intrinsic::nvvm_sust_b_2d_array_i16_clamp, 77856}, // __nvvm_sust_b_2d_array_i16_clamp
   32978       {Intrinsic::nvvm_sust_b_2d_array_i16_trap, 77889}, // __nvvm_sust_b_2d_array_i16_trap
   32979       {Intrinsic::nvvm_sust_b_2d_array_i16_zero, 77921}, // __nvvm_sust_b_2d_array_i16_zero
   32980       {Intrinsic::nvvm_sust_b_2d_array_i32_clamp, 77953}, // __nvvm_sust_b_2d_array_i32_clamp
   32981       {Intrinsic::nvvm_sust_b_2d_array_i32_trap, 77986}, // __nvvm_sust_b_2d_array_i32_trap
   32982       {Intrinsic::nvvm_sust_b_2d_array_i32_zero, 78018}, // __nvvm_sust_b_2d_array_i32_zero
   32983       {Intrinsic::nvvm_sust_b_2d_array_i64_clamp, 78050}, // __nvvm_sust_b_2d_array_i64_clamp
   32984       {Intrinsic::nvvm_sust_b_2d_array_i64_trap, 78083}, // __nvvm_sust_b_2d_array_i64_trap
   32985       {Intrinsic::nvvm_sust_b_2d_array_i64_zero, 78115}, // __nvvm_sust_b_2d_array_i64_zero
   32986       {Intrinsic::nvvm_sust_b_2d_array_i8_clamp, 78147}, // __nvvm_sust_b_2d_array_i8_clamp
   32987       {Intrinsic::nvvm_sust_b_2d_array_i8_trap, 78179}, // __nvvm_sust_b_2d_array_i8_trap
   32988       {Intrinsic::nvvm_sust_b_2d_array_i8_zero, 78210}, // __nvvm_sust_b_2d_array_i8_zero
   32989       {Intrinsic::nvvm_sust_b_2d_array_v2i16_clamp, 78241}, // __nvvm_sust_b_2d_array_v2i16_clamp
   32990       {Intrinsic::nvvm_sust_b_2d_array_v2i16_trap, 78276}, // __nvvm_sust_b_2d_array_v2i16_trap
   32991       {Intrinsic::nvvm_sust_b_2d_array_v2i16_zero, 78310}, // __nvvm_sust_b_2d_array_v2i16_zero
   32992       {Intrinsic::nvvm_sust_b_2d_array_v2i32_clamp, 78344}, // __nvvm_sust_b_2d_array_v2i32_clamp
   32993       {Intrinsic::nvvm_sust_b_2d_array_v2i32_trap, 78379}, // __nvvm_sust_b_2d_array_v2i32_trap
   32994       {Intrinsic::nvvm_sust_b_2d_array_v2i32_zero, 78413}, // __nvvm_sust_b_2d_array_v2i32_zero
   32995       {Intrinsic::nvvm_sust_b_2d_array_v2i64_clamp, 78447}, // __nvvm_sust_b_2d_array_v2i64_clamp
   32996       {Intrinsic::nvvm_sust_b_2d_array_v2i64_trap, 78482}, // __nvvm_sust_b_2d_array_v2i64_trap
   32997       {Intrinsic::nvvm_sust_b_2d_array_v2i64_zero, 78516}, // __nvvm_sust_b_2d_array_v2i64_zero
   32998       {Intrinsic::nvvm_sust_b_2d_array_v2i8_clamp, 78550}, // __nvvm_sust_b_2d_array_v2i8_clamp
   32999       {Intrinsic::nvvm_sust_b_2d_array_v2i8_trap, 78584}, // __nvvm_sust_b_2d_array_v2i8_trap
   33000       {Intrinsic::nvvm_sust_b_2d_array_v2i8_zero, 78617}, // __nvvm_sust_b_2d_array_v2i8_zero
   33001       {Intrinsic::nvvm_sust_b_2d_array_v4i16_clamp, 78650}, // __nvvm_sust_b_2d_array_v4i16_clamp
   33002       {Intrinsic::nvvm_sust_b_2d_array_v4i16_trap, 78685}, // __nvvm_sust_b_2d_array_v4i16_trap
   33003       {Intrinsic::nvvm_sust_b_2d_array_v4i16_zero, 78719}, // __nvvm_sust_b_2d_array_v4i16_zero
   33004       {Intrinsic::nvvm_sust_b_2d_array_v4i32_clamp, 78753}, // __nvvm_sust_b_2d_array_v4i32_clamp
   33005       {Intrinsic::nvvm_sust_b_2d_array_v4i32_trap, 78788}, // __nvvm_sust_b_2d_array_v4i32_trap
   33006       {Intrinsic::nvvm_sust_b_2d_array_v4i32_zero, 78822}, // __nvvm_sust_b_2d_array_v4i32_zero
   33007       {Intrinsic::nvvm_sust_b_2d_array_v4i8_clamp, 78856}, // __nvvm_sust_b_2d_array_v4i8_clamp
   33008       {Intrinsic::nvvm_sust_b_2d_array_v4i8_trap, 78890}, // __nvvm_sust_b_2d_array_v4i8_trap
   33009       {Intrinsic::nvvm_sust_b_2d_array_v4i8_zero, 78923}, // __nvvm_sust_b_2d_array_v4i8_zero
   33010       {Intrinsic::nvvm_sust_b_2d_i16_clamp, 78956}, // __nvvm_sust_b_2d_i16_clamp
   33011       {Intrinsic::nvvm_sust_b_2d_i16_trap, 78983}, // __nvvm_sust_b_2d_i16_trap
   33012       {Intrinsic::nvvm_sust_b_2d_i16_zero, 79009}, // __nvvm_sust_b_2d_i16_zero
   33013       {Intrinsic::nvvm_sust_b_2d_i32_clamp, 79035}, // __nvvm_sust_b_2d_i32_clamp
   33014       {Intrinsic::nvvm_sust_b_2d_i32_trap, 79062}, // __nvvm_sust_b_2d_i32_trap
   33015       {Intrinsic::nvvm_sust_b_2d_i32_zero, 79088}, // __nvvm_sust_b_2d_i32_zero
   33016       {Intrinsic::nvvm_sust_b_2d_i64_clamp, 79114}, // __nvvm_sust_b_2d_i64_clamp
   33017       {Intrinsic::nvvm_sust_b_2d_i64_trap, 79141}, // __nvvm_sust_b_2d_i64_trap
   33018       {Intrinsic::nvvm_sust_b_2d_i64_zero, 79167}, // __nvvm_sust_b_2d_i64_zero
   33019       {Intrinsic::nvvm_sust_b_2d_i8_clamp, 79193}, // __nvvm_sust_b_2d_i8_clamp
   33020       {Intrinsic::nvvm_sust_b_2d_i8_trap, 79219}, // __nvvm_sust_b_2d_i8_trap
   33021       {Intrinsic::nvvm_sust_b_2d_i8_zero, 79244}, // __nvvm_sust_b_2d_i8_zero
   33022       {Intrinsic::nvvm_sust_b_2d_v2i16_clamp, 79269}, // __nvvm_sust_b_2d_v2i16_clamp
   33023       {Intrinsic::nvvm_sust_b_2d_v2i16_trap, 79298}, // __nvvm_sust_b_2d_v2i16_trap
   33024       {Intrinsic::nvvm_sust_b_2d_v2i16_zero, 79326}, // __nvvm_sust_b_2d_v2i16_zero
   33025       {Intrinsic::nvvm_sust_b_2d_v2i32_clamp, 79354}, // __nvvm_sust_b_2d_v2i32_clamp
   33026       {Intrinsic::nvvm_sust_b_2d_v2i32_trap, 79383}, // __nvvm_sust_b_2d_v2i32_trap
   33027       {Intrinsic::nvvm_sust_b_2d_v2i32_zero, 79411}, // __nvvm_sust_b_2d_v2i32_zero
   33028       {Intrinsic::nvvm_sust_b_2d_v2i64_clamp, 79439}, // __nvvm_sust_b_2d_v2i64_clamp
   33029       {Intrinsic::nvvm_sust_b_2d_v2i64_trap, 79468}, // __nvvm_sust_b_2d_v2i64_trap
   33030       {Intrinsic::nvvm_sust_b_2d_v2i64_zero, 79496}, // __nvvm_sust_b_2d_v2i64_zero
   33031       {Intrinsic::nvvm_sust_b_2d_v2i8_clamp, 79524}, // __nvvm_sust_b_2d_v2i8_clamp
   33032       {Intrinsic::nvvm_sust_b_2d_v2i8_trap, 79552}, // __nvvm_sust_b_2d_v2i8_trap
   33033       {Intrinsic::nvvm_sust_b_2d_v2i8_zero, 79579}, // __nvvm_sust_b_2d_v2i8_zero
   33034       {Intrinsic::nvvm_sust_b_2d_v4i16_clamp, 79606}, // __nvvm_sust_b_2d_v4i16_clamp
   33035       {Intrinsic::nvvm_sust_b_2d_v4i16_trap, 79635}, // __nvvm_sust_b_2d_v4i16_trap
   33036       {Intrinsic::nvvm_sust_b_2d_v4i16_zero, 79663}, // __nvvm_sust_b_2d_v4i16_zero
   33037       {Intrinsic::nvvm_sust_b_2d_v4i32_clamp, 79691}, // __nvvm_sust_b_2d_v4i32_clamp
   33038       {Intrinsic::nvvm_sust_b_2d_v4i32_trap, 79720}, // __nvvm_sust_b_2d_v4i32_trap
   33039       {Intrinsic::nvvm_sust_b_2d_v4i32_zero, 79748}, // __nvvm_sust_b_2d_v4i32_zero
   33040       {Intrinsic::nvvm_sust_b_2d_v4i8_clamp, 79776}, // __nvvm_sust_b_2d_v4i8_clamp
   33041       {Intrinsic::nvvm_sust_b_2d_v4i8_trap, 79804}, // __nvvm_sust_b_2d_v4i8_trap
   33042       {Intrinsic::nvvm_sust_b_2d_v4i8_zero, 79831}, // __nvvm_sust_b_2d_v4i8_zero
   33043       {Intrinsic::nvvm_sust_b_3d_i16_clamp, 79858}, // __nvvm_sust_b_3d_i16_clamp
   33044       {Intrinsic::nvvm_sust_b_3d_i16_trap, 79885}, // __nvvm_sust_b_3d_i16_trap
   33045       {Intrinsic::nvvm_sust_b_3d_i16_zero, 79911}, // __nvvm_sust_b_3d_i16_zero
   33046       {Intrinsic::nvvm_sust_b_3d_i32_clamp, 79937}, // __nvvm_sust_b_3d_i32_clamp
   33047       {Intrinsic::nvvm_sust_b_3d_i32_trap, 79964}, // __nvvm_sust_b_3d_i32_trap
   33048       {Intrinsic::nvvm_sust_b_3d_i32_zero, 79990}, // __nvvm_sust_b_3d_i32_zero
   33049       {Intrinsic::nvvm_sust_b_3d_i64_clamp, 80016}, // __nvvm_sust_b_3d_i64_clamp
   33050       {Intrinsic::nvvm_sust_b_3d_i64_trap, 80043}, // __nvvm_sust_b_3d_i64_trap
   33051       {Intrinsic::nvvm_sust_b_3d_i64_zero, 80069}, // __nvvm_sust_b_3d_i64_zero
   33052       {Intrinsic::nvvm_sust_b_3d_i8_clamp, 80095}, // __nvvm_sust_b_3d_i8_clamp
   33053       {Intrinsic::nvvm_sust_b_3d_i8_trap, 80121}, // __nvvm_sust_b_3d_i8_trap
   33054       {Intrinsic::nvvm_sust_b_3d_i8_zero, 80146}, // __nvvm_sust_b_3d_i8_zero
   33055       {Intrinsic::nvvm_sust_b_3d_v2i16_clamp, 80171}, // __nvvm_sust_b_3d_v2i16_clamp
   33056       {Intrinsic::nvvm_sust_b_3d_v2i16_trap, 80200}, // __nvvm_sust_b_3d_v2i16_trap
   33057       {Intrinsic::nvvm_sust_b_3d_v2i16_zero, 80228}, // __nvvm_sust_b_3d_v2i16_zero
   33058       {Intrinsic::nvvm_sust_b_3d_v2i32_clamp, 80256}, // __nvvm_sust_b_3d_v2i32_clamp
   33059       {Intrinsic::nvvm_sust_b_3d_v2i32_trap, 80285}, // __nvvm_sust_b_3d_v2i32_trap
   33060       {Intrinsic::nvvm_sust_b_3d_v2i32_zero, 80313}, // __nvvm_sust_b_3d_v2i32_zero
   33061       {Intrinsic::nvvm_sust_b_3d_v2i64_clamp, 80341}, // __nvvm_sust_b_3d_v2i64_clamp
   33062       {Intrinsic::nvvm_sust_b_3d_v2i64_trap, 80370}, // __nvvm_sust_b_3d_v2i64_trap
   33063       {Intrinsic::nvvm_sust_b_3d_v2i64_zero, 80398}, // __nvvm_sust_b_3d_v2i64_zero
   33064       {Intrinsic::nvvm_sust_b_3d_v2i8_clamp, 80426}, // __nvvm_sust_b_3d_v2i8_clamp
   33065       {Intrinsic::nvvm_sust_b_3d_v2i8_trap, 80454}, // __nvvm_sust_b_3d_v2i8_trap
   33066       {Intrinsic::nvvm_sust_b_3d_v2i8_zero, 80481}, // __nvvm_sust_b_3d_v2i8_zero
   33067       {Intrinsic::nvvm_sust_b_3d_v4i16_clamp, 80508}, // __nvvm_sust_b_3d_v4i16_clamp
   33068       {Intrinsic::nvvm_sust_b_3d_v4i16_trap, 80537}, // __nvvm_sust_b_3d_v4i16_trap
   33069       {Intrinsic::nvvm_sust_b_3d_v4i16_zero, 80565}, // __nvvm_sust_b_3d_v4i16_zero
   33070       {Intrinsic::nvvm_sust_b_3d_v4i32_clamp, 80593}, // __nvvm_sust_b_3d_v4i32_clamp
   33071       {Intrinsic::nvvm_sust_b_3d_v4i32_trap, 80622}, // __nvvm_sust_b_3d_v4i32_trap
   33072       {Intrinsic::nvvm_sust_b_3d_v4i32_zero, 80650}, // __nvvm_sust_b_3d_v4i32_zero
   33073       {Intrinsic::nvvm_sust_b_3d_v4i8_clamp, 80678}, // __nvvm_sust_b_3d_v4i8_clamp
   33074       {Intrinsic::nvvm_sust_b_3d_v4i8_trap, 80706}, // __nvvm_sust_b_3d_v4i8_trap
   33075       {Intrinsic::nvvm_sust_b_3d_v4i8_zero, 80733}, // __nvvm_sust_b_3d_v4i8_zero
   33076       {Intrinsic::nvvm_sust_p_1d_array_i16_trap, 80760}, // __nvvm_sust_p_1d_array_i16_trap
   33077       {Intrinsic::nvvm_sust_p_1d_array_i32_trap, 80792}, // __nvvm_sust_p_1d_array_i32_trap
   33078       {Intrinsic::nvvm_sust_p_1d_array_i8_trap, 80824}, // __nvvm_sust_p_1d_array_i8_trap
   33079       {Intrinsic::nvvm_sust_p_1d_array_v2i16_trap, 80855}, // __nvvm_sust_p_1d_array_v2i16_trap
   33080       {Intrinsic::nvvm_sust_p_1d_array_v2i32_trap, 80889}, // __nvvm_sust_p_1d_array_v2i32_trap
   33081       {Intrinsic::nvvm_sust_p_1d_array_v2i8_trap, 80923}, // __nvvm_sust_p_1d_array_v2i8_trap
   33082       {Intrinsic::nvvm_sust_p_1d_array_v4i16_trap, 80956}, // __nvvm_sust_p_1d_array_v4i16_trap
   33083       {Intrinsic::nvvm_sust_p_1d_array_v4i32_trap, 80990}, // __nvvm_sust_p_1d_array_v4i32_trap
   33084       {Intrinsic::nvvm_sust_p_1d_array_v4i8_trap, 81024}, // __nvvm_sust_p_1d_array_v4i8_trap
   33085       {Intrinsic::nvvm_sust_p_1d_i16_trap, 81057}, // __nvvm_sust_p_1d_i16_trap
   33086       {Intrinsic::nvvm_sust_p_1d_i32_trap, 81083}, // __nvvm_sust_p_1d_i32_trap
   33087       {Intrinsic::nvvm_sust_p_1d_i8_trap, 81109}, // __nvvm_sust_p_1d_i8_trap
   33088       {Intrinsic::nvvm_sust_p_1d_v2i16_trap, 81134}, // __nvvm_sust_p_1d_v2i16_trap
   33089       {Intrinsic::nvvm_sust_p_1d_v2i32_trap, 81162}, // __nvvm_sust_p_1d_v2i32_trap
   33090       {Intrinsic::nvvm_sust_p_1d_v2i8_trap, 81190}, // __nvvm_sust_p_1d_v2i8_trap
   33091       {Intrinsic::nvvm_sust_p_1d_v4i16_trap, 81217}, // __nvvm_sust_p_1d_v4i16_trap
   33092       {Intrinsic::nvvm_sust_p_1d_v4i32_trap, 81245}, // __nvvm_sust_p_1d_v4i32_trap
   33093       {Intrinsic::nvvm_sust_p_1d_v4i8_trap, 81273}, // __nvvm_sust_p_1d_v4i8_trap
   33094       {Intrinsic::nvvm_sust_p_2d_array_i16_trap, 81300}, // __nvvm_sust_p_2d_array_i16_trap
   33095       {Intrinsic::nvvm_sust_p_2d_array_i32_trap, 81332}, // __nvvm_sust_p_2d_array_i32_trap
   33096       {Intrinsic::nvvm_sust_p_2d_array_i8_trap, 81364}, // __nvvm_sust_p_2d_array_i8_trap
   33097       {Intrinsic::nvvm_sust_p_2d_array_v2i16_trap, 81395}, // __nvvm_sust_p_2d_array_v2i16_trap
   33098       {Intrinsic::nvvm_sust_p_2d_array_v2i32_trap, 81429}, // __nvvm_sust_p_2d_array_v2i32_trap
   33099       {Intrinsic::nvvm_sust_p_2d_array_v2i8_trap, 81463}, // __nvvm_sust_p_2d_array_v2i8_trap
   33100       {Intrinsic::nvvm_sust_p_2d_array_v4i16_trap, 81496}, // __nvvm_sust_p_2d_array_v4i16_trap
   33101       {Intrinsic::nvvm_sust_p_2d_array_v4i32_trap, 81530}, // __nvvm_sust_p_2d_array_v4i32_trap
   33102       {Intrinsic::nvvm_sust_p_2d_array_v4i8_trap, 81564}, // __nvvm_sust_p_2d_array_v4i8_trap
   33103       {Intrinsic::nvvm_sust_p_2d_i16_trap, 81597}, // __nvvm_sust_p_2d_i16_trap
   33104       {Intrinsic::nvvm_sust_p_2d_i32_trap, 81623}, // __nvvm_sust_p_2d_i32_trap
   33105       {Intrinsic::nvvm_sust_p_2d_i8_trap, 81649}, // __nvvm_sust_p_2d_i8_trap
   33106       {Intrinsic::nvvm_sust_p_2d_v2i16_trap, 81674}, // __nvvm_sust_p_2d_v2i16_trap
   33107       {Intrinsic::nvvm_sust_p_2d_v2i32_trap, 81702}, // __nvvm_sust_p_2d_v2i32_trap
   33108       {Intrinsic::nvvm_sust_p_2d_v2i8_trap, 81730}, // __nvvm_sust_p_2d_v2i8_trap
   33109       {Intrinsic::nvvm_sust_p_2d_v4i16_trap, 81757}, // __nvvm_sust_p_2d_v4i16_trap
   33110       {Intrinsic::nvvm_sust_p_2d_v4i32_trap, 81785}, // __nvvm_sust_p_2d_v4i32_trap
   33111       {Intrinsic::nvvm_sust_p_2d_v4i8_trap, 81813}, // __nvvm_sust_p_2d_v4i8_trap
   33112       {Intrinsic::nvvm_sust_p_3d_i16_trap, 81840}, // __nvvm_sust_p_3d_i16_trap
   33113       {Intrinsic::nvvm_sust_p_3d_i32_trap, 81866}, // __nvvm_sust_p_3d_i32_trap
   33114       {Intrinsic::nvvm_sust_p_3d_i8_trap, 81892}, // __nvvm_sust_p_3d_i8_trap
   33115       {Intrinsic::nvvm_sust_p_3d_v2i16_trap, 81917}, // __nvvm_sust_p_3d_v2i16_trap
   33116       {Intrinsic::nvvm_sust_p_3d_v2i32_trap, 81945}, // __nvvm_sust_p_3d_v2i32_trap
   33117       {Intrinsic::nvvm_sust_p_3d_v2i8_trap, 81973}, // __nvvm_sust_p_3d_v2i8_trap
   33118       {Intrinsic::nvvm_sust_p_3d_v4i16_trap, 82000}, // __nvvm_sust_p_3d_v4i16_trap
   33119       {Intrinsic::nvvm_sust_p_3d_v4i32_trap, 82028}, // __nvvm_sust_p_3d_v4i32_trap
   33120       {Intrinsic::nvvm_sust_p_3d_v4i8_trap, 82056}, // __nvvm_sust_p_3d_v4i8_trap
   33121       {Intrinsic::nvvm_swap_lo_hi_b64, 82083}, // __nvvm_swap_lo_hi_b64
   33122       {Intrinsic::nvvm_trunc_d, 82105}, // __nvvm_trunc_d
   33123       {Intrinsic::nvvm_trunc_f, 82120}, // __nvvm_trunc_f
   33124       {Intrinsic::nvvm_trunc_ftz_f, 82135}, // __nvvm_trunc_ftz_f
   33125       {Intrinsic::nvvm_txq_array_size, 82154}, // __nvvm_txq_array_size
   33126       {Intrinsic::nvvm_txq_channel_data_type, 82176}, // __nvvm_txq_channel_data_type
   33127       {Intrinsic::nvvm_txq_channel_order, 82205}, // __nvvm_txq_channel_order
   33128       {Intrinsic::nvvm_txq_depth, 82230}, // __nvvm_txq_depth
   33129       {Intrinsic::nvvm_txq_height, 82247}, // __nvvm_txq_height
   33130       {Intrinsic::nvvm_txq_num_mipmap_levels, 82265}, // __nvvm_txq_num_mipmap_levels
   33131       {Intrinsic::nvvm_txq_num_samples, 82294}, // __nvvm_txq_num_samples
   33132       {Intrinsic::nvvm_txq_width, 82317}, // __nvvm_txq_width
   33133       {Intrinsic::nvvm_ui2d_rm, 82334}, // __nvvm_ui2d_rm
   33134       {Intrinsic::nvvm_ui2d_rn, 82349}, // __nvvm_ui2d_rn
   33135       {Intrinsic::nvvm_ui2d_rp, 82364}, // __nvvm_ui2d_rp
   33136       {Intrinsic::nvvm_ui2d_rz, 82379}, // __nvvm_ui2d_rz
   33137       {Intrinsic::nvvm_ui2f_rm, 82394}, // __nvvm_ui2f_rm
   33138       {Intrinsic::nvvm_ui2f_rn, 82409}, // __nvvm_ui2f_rn
   33139       {Intrinsic::nvvm_ui2f_rp, 82424}, // __nvvm_ui2f_rp
   33140       {Intrinsic::nvvm_ui2f_rz, 82439}, // __nvvm_ui2f_rz
   33141       {Intrinsic::nvvm_ull2d_rm, 82454}, // __nvvm_ull2d_rm
   33142       {Intrinsic::nvvm_ull2d_rn, 82470}, // __nvvm_ull2d_rn
   33143       {Intrinsic::nvvm_ull2d_rp, 82486}, // __nvvm_ull2d_rp
   33144       {Intrinsic::nvvm_ull2d_rz, 82502}, // __nvvm_ull2d_rz
   33145       {Intrinsic::nvvm_ull2f_rm, 82518}, // __nvvm_ull2f_rm
   33146       {Intrinsic::nvvm_ull2f_rn, 82534}, // __nvvm_ull2f_rn
   33147       {Intrinsic::nvvm_ull2f_rp, 82550}, // __nvvm_ull2f_rp
   33148       {Intrinsic::nvvm_ull2f_rz, 82566}, // __nvvm_ull2f_rz
   33149       {Intrinsic::nvvm_vote_all, 82582}, // __nvvm_vote_all
   33150       {Intrinsic::nvvm_vote_all_sync, 82598}, // __nvvm_vote_all_sync
   33151       {Intrinsic::nvvm_vote_any, 82619}, // __nvvm_vote_any
   33152       {Intrinsic::nvvm_vote_any_sync, 82635}, // __nvvm_vote_any_sync
   33153       {Intrinsic::nvvm_vote_ballot, 82656}, // __nvvm_vote_ballot
   33154       {Intrinsic::nvvm_vote_ballot_sync, 82675}, // __nvvm_vote_ballot_sync
   33155       {Intrinsic::nvvm_vote_uni, 82699}, // __nvvm_vote_uni
   33156       {Intrinsic::nvvm_vote_uni_sync, 82715}, // __nvvm_vote_uni_sync
   33157       {Intrinsic::nvvm_barrier0, 69815}, // __syncthreads
   33158     };
   33159     auto I = std::lower_bound(std::begin(nvvmNames),
   33160                               std::end(nvvmNames),
   33161                               BuiltinNameStr);
   33162     if (I != std::end(nvvmNames) &&
   33163         I->getName() == BuiltinNameStr)
   33164       return I->IntrinID;
   33165   }
   33166   if (TargetPrefix == "ppc") {
   33167     static const BuiltinEntry ppcNames[] = {
   33168       {Intrinsic::ppc_altivec_crypto_vcipher, 82736}, // __builtin_altivec_crypto_vcipher
   33169       {Intrinsic::ppc_altivec_crypto_vcipherlast, 82769}, // __builtin_altivec_crypto_vcipherlast
   33170       {Intrinsic::ppc_altivec_crypto_vncipher, 82806}, // __builtin_altivec_crypto_vncipher
   33171       {Intrinsic::ppc_altivec_crypto_vncipherlast, 82840}, // __builtin_altivec_crypto_vncipherlast
   33172       {Intrinsic::ppc_altivec_crypto_vpermxor, 82878}, // __builtin_altivec_crypto_vpermxor
   33173       {Intrinsic::ppc_altivec_crypto_vpmsumb, 82912}, // __builtin_altivec_crypto_vpmsumb
   33174       {Intrinsic::ppc_altivec_crypto_vpmsumd, 82945}, // __builtin_altivec_crypto_vpmsumd
   33175       {Intrinsic::ppc_altivec_crypto_vpmsumh, 82978}, // __builtin_altivec_crypto_vpmsumh
   33176       {Intrinsic::ppc_altivec_crypto_vpmsumw, 83011}, // __builtin_altivec_crypto_vpmsumw
   33177       {Intrinsic::ppc_altivec_crypto_vsbox, 83044}, // __builtin_altivec_crypto_vsbox
   33178       {Intrinsic::ppc_altivec_crypto_vshasigmad, 83075}, // __builtin_altivec_crypto_vshasigmad
   33179       {Intrinsic::ppc_altivec_crypto_vshasigmaw, 83111}, // __builtin_altivec_crypto_vshasigmaw
   33180       {Intrinsic::ppc_altivec_dss, 83147}, // __builtin_altivec_dss
   33181       {Intrinsic::ppc_altivec_dssall, 83169}, // __builtin_altivec_dssall
   33182       {Intrinsic::ppc_altivec_dst, 83194}, // __builtin_altivec_dst
   33183       {Intrinsic::ppc_altivec_dstst, 83216}, // __builtin_altivec_dstst
   33184       {Intrinsic::ppc_altivec_dststt, 83240}, // __builtin_altivec_dststt
   33185       {Intrinsic::ppc_altivec_dstt, 83265}, // __builtin_altivec_dstt
   33186       {Intrinsic::ppc_altivec_mfvscr, 83288}, // __builtin_altivec_mfvscr
   33187       {Intrinsic::ppc_altivec_mtvscr, 83313}, // __builtin_altivec_mtvscr
   33188       {Intrinsic::ppc_altivec_vabsdub, 83338}, // __builtin_altivec_vabsdub
   33189       {Intrinsic::ppc_altivec_vabsduh, 83364}, // __builtin_altivec_vabsduh
   33190       {Intrinsic::ppc_altivec_vabsduw, 83390}, // __builtin_altivec_vabsduw
   33191       {Intrinsic::ppc_altivec_vaddcuq, 83416}, // __builtin_altivec_vaddcuq
   33192       {Intrinsic::ppc_altivec_vaddcuw, 83442}, // __builtin_altivec_vaddcuw
   33193       {Intrinsic::ppc_altivec_vaddecuq, 83468}, // __builtin_altivec_vaddecuq
   33194       {Intrinsic::ppc_altivec_vaddeuqm, 83495}, // __builtin_altivec_vaddeuqm
   33195       {Intrinsic::ppc_altivec_vaddsbs, 83522}, // __builtin_altivec_vaddsbs
   33196       {Intrinsic::ppc_altivec_vaddshs, 83548}, // __builtin_altivec_vaddshs
   33197       {Intrinsic::ppc_altivec_vaddsws, 83574}, // __builtin_altivec_vaddsws
   33198       {Intrinsic::ppc_altivec_vaddubs, 83600}, // __builtin_altivec_vaddubs
   33199       {Intrinsic::ppc_altivec_vadduhs, 83626}, // __builtin_altivec_vadduhs
   33200       {Intrinsic::ppc_altivec_vadduws, 83652}, // __builtin_altivec_vadduws
   33201       {Intrinsic::ppc_altivec_vavgsb, 83678}, // __builtin_altivec_vavgsb
   33202       {Intrinsic::ppc_altivec_vavgsh, 83703}, // __builtin_altivec_vavgsh
   33203       {Intrinsic::ppc_altivec_vavgsw, 83728}, // __builtin_altivec_vavgsw
   33204       {Intrinsic::ppc_altivec_vavgub, 83753}, // __builtin_altivec_vavgub
   33205       {Intrinsic::ppc_altivec_vavguh, 83778}, // __builtin_altivec_vavguh
   33206       {Intrinsic::ppc_altivec_vavguw, 83803}, // __builtin_altivec_vavguw
   33207       {Intrinsic::ppc_altivec_vbpermq, 83828}, // __builtin_altivec_vbpermq
   33208       {Intrinsic::ppc_altivec_vcfsx, 83854}, // __builtin_altivec_vcfsx
   33209       {Intrinsic::ppc_altivec_vcfux, 83878}, // __builtin_altivec_vcfux
   33210       {Intrinsic::ppc_altivec_vclzlsbb, 83902}, // __builtin_altivec_vclzlsbb
   33211       {Intrinsic::ppc_altivec_vcmpbfp, 83929}, // __builtin_altivec_vcmpbfp
   33212       {Intrinsic::ppc_altivec_vcmpbfp_p, 83955}, // __builtin_altivec_vcmpbfp_p
   33213       {Intrinsic::ppc_altivec_vcmpeqfp, 83983}, // __builtin_altivec_vcmpeqfp
   33214       {Intrinsic::ppc_altivec_vcmpeqfp_p, 84010}, // __builtin_altivec_vcmpeqfp_p
   33215       {Intrinsic::ppc_altivec_vcmpequb, 84039}, // __builtin_altivec_vcmpequb
   33216       {Intrinsic::ppc_altivec_vcmpequb_p, 84066}, // __builtin_altivec_vcmpequb_p
   33217       {Intrinsic::ppc_altivec_vcmpequd, 84095}, // __builtin_altivec_vcmpequd
   33218       {Intrinsic::ppc_altivec_vcmpequd_p, 84122}, // __builtin_altivec_vcmpequd_p
   33219       {Intrinsic::ppc_altivec_vcmpequh, 84151}, // __builtin_altivec_vcmpequh
   33220       {Intrinsic::ppc_altivec_vcmpequh_p, 84178}, // __builtin_altivec_vcmpequh_p
   33221       {Intrinsic::ppc_altivec_vcmpequw, 84207}, // __builtin_altivec_vcmpequw
   33222       {Intrinsic::ppc_altivec_vcmpequw_p, 84234}, // __builtin_altivec_vcmpequw_p
   33223       {Intrinsic::ppc_altivec_vcmpgefp, 84263}, // __builtin_altivec_vcmpgefp
   33224       {Intrinsic::ppc_altivec_vcmpgefp_p, 84290}, // __builtin_altivec_vcmpgefp_p
   33225       {Intrinsic::ppc_altivec_vcmpgtfp, 84319}, // __builtin_altivec_vcmpgtfp
   33226       {Intrinsic::ppc_altivec_vcmpgtfp_p, 84346}, // __builtin_altivec_vcmpgtfp_p
   33227       {Intrinsic::ppc_altivec_vcmpgtsb, 84375}, // __builtin_altivec_vcmpgtsb
   33228       {Intrinsic::ppc_altivec_vcmpgtsb_p, 84402}, // __builtin_altivec_vcmpgtsb_p
   33229       {Intrinsic::ppc_altivec_vcmpgtsd, 84431}, // __builtin_altivec_vcmpgtsd
   33230       {Intrinsic::ppc_altivec_vcmpgtsd_p, 84458}, // __builtin_altivec_vcmpgtsd_p
   33231       {Intrinsic::ppc_altivec_vcmpgtsh, 84487}, // __builtin_altivec_vcmpgtsh
   33232       {Intrinsic::ppc_altivec_vcmpgtsh_p, 84514}, // __builtin_altivec_vcmpgtsh_p
   33233       {Intrinsic::ppc_altivec_vcmpgtsw, 84543}, // __builtin_altivec_vcmpgtsw
   33234       {Intrinsic::ppc_altivec_vcmpgtsw_p, 84570}, // __builtin_altivec_vcmpgtsw_p
   33235       {Intrinsic::ppc_altivec_vcmpgtub, 84599}, // __builtin_altivec_vcmpgtub
   33236       {Intrinsic::ppc_altivec_vcmpgtub_p, 84626}, // __builtin_altivec_vcmpgtub_p
   33237       {Intrinsic::ppc_altivec_vcmpgtud, 84655}, // __builtin_altivec_vcmpgtud
   33238       {Intrinsic::ppc_altivec_vcmpgtud_p, 84682}, // __builtin_altivec_vcmpgtud_p
   33239       {Intrinsic::ppc_altivec_vcmpgtuh, 84711}, // __builtin_altivec_vcmpgtuh
   33240       {Intrinsic::ppc_altivec_vcmpgtuh_p, 84738}, // __builtin_altivec_vcmpgtuh_p
   33241       {Intrinsic::ppc_altivec_vcmpgtuw, 84767}, // __builtin_altivec_vcmpgtuw
   33242       {Intrinsic::ppc_altivec_vcmpgtuw_p, 84794}, // __builtin_altivec_vcmpgtuw_p
   33243       {Intrinsic::ppc_altivec_vcmpneb, 84823}, // __builtin_altivec_vcmpneb
   33244       {Intrinsic::ppc_altivec_vcmpneb_p, 84849}, // __builtin_altivec_vcmpneb_p
   33245       {Intrinsic::ppc_altivec_vcmpneh, 84877}, // __builtin_altivec_vcmpneh
   33246       {Intrinsic::ppc_altivec_vcmpneh_p, 84903}, // __builtin_altivec_vcmpneh_p
   33247       {Intrinsic::ppc_altivec_vcmpnew, 84931}, // __builtin_altivec_vcmpnew
   33248       {Intrinsic::ppc_altivec_vcmpnew_p, 84957}, // __builtin_altivec_vcmpnew_p
   33249       {Intrinsic::ppc_altivec_vcmpnezb, 84985}, // __builtin_altivec_vcmpnezb
   33250       {Intrinsic::ppc_altivec_vcmpnezb_p, 85012}, // __builtin_altivec_vcmpnezb_p
   33251       {Intrinsic::ppc_altivec_vcmpnezh, 85041}, // __builtin_altivec_vcmpnezh
   33252       {Intrinsic::ppc_altivec_vcmpnezh_p, 85068}, // __builtin_altivec_vcmpnezh_p
   33253       {Intrinsic::ppc_altivec_vcmpnezw, 85097}, // __builtin_altivec_vcmpnezw
   33254       {Intrinsic::ppc_altivec_vcmpnezw_p, 85124}, // __builtin_altivec_vcmpnezw_p
   33255       {Intrinsic::ppc_altivec_vctsxs, 85153}, // __builtin_altivec_vctsxs
   33256       {Intrinsic::ppc_altivec_vctuxs, 85178}, // __builtin_altivec_vctuxs
   33257       {Intrinsic::ppc_altivec_vctzlsbb, 85203}, // __builtin_altivec_vctzlsbb
   33258       {Intrinsic::ppc_altivec_vexptefp, 85230}, // __builtin_altivec_vexptefp
   33259       {Intrinsic::ppc_altivec_vgbbd, 85257}, // __builtin_altivec_vgbbd
   33260       {Intrinsic::ppc_altivec_vlogefp, 85281}, // __builtin_altivec_vlogefp
   33261       {Intrinsic::ppc_altivec_vmaddfp, 85307}, // __builtin_altivec_vmaddfp
   33262       {Intrinsic::ppc_altivec_vmaxfp, 85333}, // __builtin_altivec_vmaxfp
   33263       {Intrinsic::ppc_altivec_vmaxsb, 85358}, // __builtin_altivec_vmaxsb
   33264       {Intrinsic::ppc_altivec_vmaxsd, 85383}, // __builtin_altivec_vmaxsd
   33265       {Intrinsic::ppc_altivec_vmaxsh, 85408}, // __builtin_altivec_vmaxsh
   33266       {Intrinsic::ppc_altivec_vmaxsw, 85433}, // __builtin_altivec_vmaxsw
   33267       {Intrinsic::ppc_altivec_vmaxub, 85458}, // __builtin_altivec_vmaxub
   33268       {Intrinsic::ppc_altivec_vmaxud, 85483}, // __builtin_altivec_vmaxud
   33269       {Intrinsic::ppc_altivec_vmaxuh, 85508}, // __builtin_altivec_vmaxuh
   33270       {Intrinsic::ppc_altivec_vmaxuw, 85533}, // __builtin_altivec_vmaxuw
   33271       {Intrinsic::ppc_altivec_vmhaddshs, 85558}, // __builtin_altivec_vmhaddshs
   33272       {Intrinsic::ppc_altivec_vmhraddshs, 85586}, // __builtin_altivec_vmhraddshs
   33273       {Intrinsic::ppc_altivec_vminfp, 85615}, // __builtin_altivec_vminfp
   33274       {Intrinsic::ppc_altivec_vminsb, 85640}, // __builtin_altivec_vminsb
   33275       {Intrinsic::ppc_altivec_vminsd, 85665}, // __builtin_altivec_vminsd
   33276       {Intrinsic::ppc_altivec_vminsh, 85690}, // __builtin_altivec_vminsh
   33277       {Intrinsic::ppc_altivec_vminsw, 85715}, // __builtin_altivec_vminsw
   33278       {Intrinsic::ppc_altivec_vminub, 85740}, // __builtin_altivec_vminub
   33279       {Intrinsic::ppc_altivec_vminud, 85765}, // __builtin_altivec_vminud
   33280       {Intrinsic::ppc_altivec_vminuh, 85790}, // __builtin_altivec_vminuh
   33281       {Intrinsic::ppc_altivec_vminuw, 85815}, // __builtin_altivec_vminuw
   33282       {Intrinsic::ppc_altivec_vmladduhm, 85840}, // __builtin_altivec_vmladduhm
   33283       {Intrinsic::ppc_altivec_vmsummbm, 85868}, // __builtin_altivec_vmsummbm
   33284       {Intrinsic::ppc_altivec_vmsumshm, 85895}, // __builtin_altivec_vmsumshm
   33285       {Intrinsic::ppc_altivec_vmsumshs, 85922}, // __builtin_altivec_vmsumshs
   33286       {Intrinsic::ppc_altivec_vmsumubm, 85949}, // __builtin_altivec_vmsumubm
   33287       {Intrinsic::ppc_altivec_vmsumuhm, 85976}, // __builtin_altivec_vmsumuhm
   33288       {Intrinsic::ppc_altivec_vmsumuhs, 86003}, // __builtin_altivec_vmsumuhs
   33289       {Intrinsic::ppc_altivec_vmulesb, 86030}, // __builtin_altivec_vmulesb
   33290       {Intrinsic::ppc_altivec_vmulesh, 86056}, // __builtin_altivec_vmulesh
   33291       {Intrinsic::ppc_altivec_vmulesw, 86082}, // __builtin_altivec_vmulesw
   33292       {Intrinsic::ppc_altivec_vmuleub, 86108}, // __builtin_altivec_vmuleub
   33293       {Intrinsic::ppc_altivec_vmuleuh, 86134}, // __builtin_altivec_vmuleuh
   33294       {Intrinsic::ppc_altivec_vmuleuw, 86160}, // __builtin_altivec_vmuleuw
   33295       {Intrinsic::ppc_altivec_vmulosb, 86186}, // __builtin_altivec_vmulosb
   33296       {Intrinsic::ppc_altivec_vmulosh, 86212}, // __builtin_altivec_vmulosh
   33297       {Intrinsic::ppc_altivec_vmulosw, 86238}, // __builtin_altivec_vmulosw
   33298       {Intrinsic::ppc_altivec_vmuloub, 86264}, // __builtin_altivec_vmuloub
   33299       {Intrinsic::ppc_altivec_vmulouh, 86290}, // __builtin_altivec_vmulouh
   33300       {Intrinsic::ppc_altivec_vmulouw, 86316}, // __builtin_altivec_vmulouw
   33301       {Intrinsic::ppc_altivec_vnmsubfp, 86342}, // __builtin_altivec_vnmsubfp
   33302       {Intrinsic::ppc_altivec_vperm, 86369}, // __builtin_altivec_vperm_4si
   33303       {Intrinsic::ppc_altivec_vpkpx, 86397}, // __builtin_altivec_vpkpx
   33304       {Intrinsic::ppc_altivec_vpksdss, 86421}, // __builtin_altivec_vpksdss
   33305       {Intrinsic::ppc_altivec_vpksdus, 86447}, // __builtin_altivec_vpksdus
   33306       {Intrinsic::ppc_altivec_vpkshss, 86473}, // __builtin_altivec_vpkshss
   33307       {Intrinsic::ppc_altivec_vpkshus, 86499}, // __builtin_altivec_vpkshus
   33308       {Intrinsic::ppc_altivec_vpkswss, 86525}, // __builtin_altivec_vpkswss
   33309       {Intrinsic::ppc_altivec_vpkswus, 86551}, // __builtin_altivec_vpkswus
   33310       {Intrinsic::ppc_altivec_vpkudus, 86577}, // __builtin_altivec_vpkudus
   33311       {Intrinsic::ppc_altivec_vpkuhus, 86603}, // __builtin_altivec_vpkuhus
   33312       {Intrinsic::ppc_altivec_vpkuwus, 86629}, // __builtin_altivec_vpkuwus
   33313       {Intrinsic::ppc_altivec_vprtybd, 86655}, // __builtin_altivec_vprtybd
   33314       {Intrinsic::ppc_altivec_vprtybq, 86681}, // __builtin_altivec_vprtybq
   33315       {Intrinsic::ppc_altivec_vprtybw, 86707}, // __builtin_altivec_vprtybw
   33316       {Intrinsic::ppc_altivec_vrefp, 86733}, // __builtin_altivec_vrefp
   33317       {Intrinsic::ppc_altivec_vrfim, 86757}, // __builtin_altivec_vrfim
   33318       {Intrinsic::ppc_altivec_vrfin, 86781}, // __builtin_altivec_vrfin
   33319       {Intrinsic::ppc_altivec_vrfip, 86805}, // __builtin_altivec_vrfip
   33320       {Intrinsic::ppc_altivec_vrfiz, 86829}, // __builtin_altivec_vrfiz
   33321       {Intrinsic::ppc_altivec_vrlb, 86853}, // __builtin_altivec_vrlb
   33322       {Intrinsic::ppc_altivec_vrld, 86876}, // __builtin_altivec_vrld
   33323       {Intrinsic::ppc_altivec_vrldmi, 86899}, // __builtin_altivec_vrldmi
   33324       {Intrinsic::ppc_altivec_vrldnm, 86924}, // __builtin_altivec_vrldnm
   33325       {Intrinsic::ppc_altivec_vrlh, 86949}, // __builtin_altivec_vrlh
   33326       {Intrinsic::ppc_altivec_vrlw, 86972}, // __builtin_altivec_vrlw
   33327       {Intrinsic::ppc_altivec_vrlwmi, 86995}, // __builtin_altivec_vrlwmi
   33328       {Intrinsic::ppc_altivec_vrlwnm, 87020}, // __builtin_altivec_vrlwnm
   33329       {Intrinsic::ppc_altivec_vrsqrtefp, 87045}, // __builtin_altivec_vrsqrtefp
   33330       {Intrinsic::ppc_altivec_vsel, 87073}, // __builtin_altivec_vsel_4si
   33331       {Intrinsic::ppc_altivec_vsl, 87100}, // __builtin_altivec_vsl
   33332       {Intrinsic::ppc_altivec_vslb, 87122}, // __builtin_altivec_vslb
   33333       {Intrinsic::ppc_altivec_vslh, 87145}, // __builtin_altivec_vslh
   33334       {Intrinsic::ppc_altivec_vslo, 87168}, // __builtin_altivec_vslo
   33335       {Intrinsic::ppc_altivec_vslv, 87191}, // __builtin_altivec_vslv
   33336       {Intrinsic::ppc_altivec_vslw, 87214}, // __builtin_altivec_vslw
   33337       {Intrinsic::ppc_altivec_vsr, 87237}, // __builtin_altivec_vsr
   33338       {Intrinsic::ppc_altivec_vsrab, 87259}, // __builtin_altivec_vsrab
   33339       {Intrinsic::ppc_altivec_vsrah, 87283}, // __builtin_altivec_vsrah
   33340       {Intrinsic::ppc_altivec_vsraw, 87307}, // __builtin_altivec_vsraw
   33341       {Intrinsic::ppc_altivec_vsrb, 87331}, // __builtin_altivec_vsrb
   33342       {Intrinsic::ppc_altivec_vsrh, 87354}, // __builtin_altivec_vsrh
   33343       {Intrinsic::ppc_altivec_vsro, 87377}, // __builtin_altivec_vsro
   33344       {Intrinsic::ppc_altivec_vsrv, 87400}, // __builtin_altivec_vsrv
   33345       {Intrinsic::ppc_altivec_vsrw, 87423}, // __builtin_altivec_vsrw
   33346       {Intrinsic::ppc_altivec_vsubcuq, 87446}, // __builtin_altivec_vsubcuq
   33347       {Intrinsic::ppc_altivec_vsubcuw, 87472}, // __builtin_altivec_vsubcuw
   33348       {Intrinsic::ppc_altivec_vsubecuq, 87498}, // __builtin_altivec_vsubecuq
   33349       {Intrinsic::ppc_altivec_vsubeuqm, 87525}, // __builtin_altivec_vsubeuqm
   33350       {Intrinsic::ppc_altivec_vsubsbs, 87552}, // __builtin_altivec_vsubsbs
   33351       {Intrinsic::ppc_altivec_vsubshs, 87578}, // __builtin_altivec_vsubshs
   33352       {Intrinsic::ppc_altivec_vsubsws, 87604}, // __builtin_altivec_vsubsws
   33353       {Intrinsic::ppc_altivec_vsububs, 87630}, // __builtin_altivec_vsububs
   33354       {Intrinsic::ppc_altivec_vsubuhs, 87656}, // __builtin_altivec_vsubuhs
   33355       {Intrinsic::ppc_altivec_vsubuws, 87682}, // __builtin_altivec_vsubuws
   33356       {Intrinsic::ppc_altivec_vsum2sws, 87708}, // __builtin_altivec_vsum2sws
   33357       {Intrinsic::ppc_altivec_vsum4sbs, 87735}, // __builtin_altivec_vsum4sbs
   33358       {Intrinsic::ppc_altivec_vsum4shs, 87762}, // __builtin_altivec_vsum4shs
   33359       {Intrinsic::ppc_altivec_vsum4ubs, 87789}, // __builtin_altivec_vsum4ubs
   33360       {Intrinsic::ppc_altivec_vsumsws, 87816}, // __builtin_altivec_vsumsws
   33361       {Intrinsic::ppc_altivec_vupkhpx, 87842}, // __builtin_altivec_vupkhpx
   33362       {Intrinsic::ppc_altivec_vupkhsb, 87868}, // __builtin_altivec_vupkhsb
   33363       {Intrinsic::ppc_altivec_vupkhsh, 87894}, // __builtin_altivec_vupkhsh
   33364       {Intrinsic::ppc_altivec_vupkhsw, 87920}, // __builtin_altivec_vupkhsw
   33365       {Intrinsic::ppc_altivec_vupklpx, 87946}, // __builtin_altivec_vupklpx
   33366       {Intrinsic::ppc_altivec_vupklsb, 87972}, // __builtin_altivec_vupklsb
   33367       {Intrinsic::ppc_altivec_vupklsh, 87998}, // __builtin_altivec_vupklsh
   33368       {Intrinsic::ppc_altivec_vupklsw, 88024}, // __builtin_altivec_vupklsw
   33369       {Intrinsic::ppc_bpermd, 88050}, // __builtin_bpermd
   33370       {Intrinsic::ppc_divde, 88067}, // __builtin_divde
   33371       {Intrinsic::ppc_divdeu, 88083}, // __builtin_divdeu
   33372       {Intrinsic::ppc_divwe, 88100}, // __builtin_divwe
   33373       {Intrinsic::ppc_divweu, 88116}, // __builtin_divweu
   33374       {Intrinsic::ppc_get_texasr, 88133}, // __builtin_get_texasr
   33375       {Intrinsic::ppc_get_texasru, 88154}, // __builtin_get_texasru
   33376       {Intrinsic::ppc_get_tfhar, 88176}, // __builtin_get_tfhar
   33377       {Intrinsic::ppc_get_tfiar, 88196}, // __builtin_get_tfiar
   33378       {Intrinsic::ppc_qpx_qvfabs, 88216}, // __builtin_qpx_qvfabs
   33379       {Intrinsic::ppc_qpx_qvfadd, 88237}, // __builtin_qpx_qvfadd
   33380       {Intrinsic::ppc_qpx_qvfadds, 88258}, // __builtin_qpx_qvfadds
   33381       {Intrinsic::ppc_qpx_qvfcfid, 88280}, // __builtin_qpx_qvfcfid
   33382       {Intrinsic::ppc_qpx_qvfcfids, 88302}, // __builtin_qpx_qvfcfids
   33383       {Intrinsic::ppc_qpx_qvfcfidu, 88325}, // __builtin_qpx_qvfcfidu
   33384       {Intrinsic::ppc_qpx_qvfcfidus, 88348}, // __builtin_qpx_qvfcfidus
   33385       {Intrinsic::ppc_qpx_qvfcmpeq, 88372}, // __builtin_qpx_qvfcmpeq
   33386       {Intrinsic::ppc_qpx_qvfcmpgt, 88395}, // __builtin_qpx_qvfcmpgt
   33387       {Intrinsic::ppc_qpx_qvfcmplt, 88418}, // __builtin_qpx_qvfcmplt
   33388       {Intrinsic::ppc_qpx_qvfcpsgn, 88441}, // __builtin_qpx_qvfcpsgn
   33389       {Intrinsic::ppc_qpx_qvfctid, 88464}, // __builtin_qpx_qvfctid
   33390       {Intrinsic::ppc_qpx_qvfctidu, 88486}, // __builtin_qpx_qvfctidu
   33391       {Intrinsic::ppc_qpx_qvfctiduz, 88509}, // __builtin_qpx_qvfctiduz
   33392       {Intrinsic::ppc_qpx_qvfctidz, 88533}, // __builtin_qpx_qvfctidz
   33393       {Intrinsic::ppc_qpx_qvfctiw, 88556}, // __builtin_qpx_qvfctiw
   33394       {Intrinsic::ppc_qpx_qvfctiwu, 88578}, // __builtin_qpx_qvfctiwu
   33395       {Intrinsic::ppc_qpx_qvfctiwuz, 88601}, // __builtin_qpx_qvfctiwuz
   33396       {Intrinsic::ppc_qpx_qvfctiwz, 88625}, // __builtin_qpx_qvfctiwz
   33397       {Intrinsic::ppc_qpx_qvflogical, 88648}, // __builtin_qpx_qvflogical
   33398       {Intrinsic::ppc_qpx_qvfmadd, 88673}, // __builtin_qpx_qvfmadd
   33399       {Intrinsic::ppc_qpx_qvfmadds, 88695}, // __builtin_qpx_qvfmadds
   33400       {Intrinsic::ppc_qpx_qvfmsub, 88718}, // __builtin_qpx_qvfmsub
   33401       {Intrinsic::ppc_qpx_qvfmsubs, 88740}, // __builtin_qpx_qvfmsubs
   33402       {Intrinsic::ppc_qpx_qvfmul, 88763}, // __builtin_qpx_qvfmul
   33403       {Intrinsic::ppc_qpx_qvfmuls, 88784}, // __builtin_qpx_qvfmuls
   33404       {Intrinsic::ppc_qpx_qvfnabs, 88806}, // __builtin_qpx_qvfnabs
   33405       {Intrinsic::ppc_qpx_qvfneg, 88828}, // __builtin_qpx_qvfneg
   33406       {Intrinsic::ppc_qpx_qvfnmadd, 88849}, // __builtin_qpx_qvfnmadd
   33407       {Intrinsic::ppc_qpx_qvfnmadds, 88872}, // __builtin_qpx_qvfnmadds
   33408       {Intrinsic::ppc_qpx_qvfnmsub, 88896}, // __builtin_qpx_qvfnmsub
   33409       {Intrinsic::ppc_qpx_qvfnmsubs, 88919}, // __builtin_qpx_qvfnmsubs
   33410       {Intrinsic::ppc_qpx_qvfperm, 88943}, // __builtin_qpx_qvfperm
   33411       {Intrinsic::ppc_qpx_qvfre, 88965}, // __builtin_qpx_qvfre
   33412       {Intrinsic::ppc_qpx_qvfres, 88985}, // __builtin_qpx_qvfres
   33413       {Intrinsic::ppc_qpx_qvfrim, 89006}, // __builtin_qpx_qvfrim
   33414       {Intrinsic::ppc_qpx_qvfrin, 89027}, // __builtin_qpx_qvfrin
   33415       {Intrinsic::ppc_qpx_qvfrip, 89048}, // __builtin_qpx_qvfrip
   33416       {Intrinsic::ppc_qpx_qvfriz, 89069}, // __builtin_qpx_qvfriz
   33417       {Intrinsic::ppc_qpx_qvfrsp, 89090}, // __builtin_qpx_qvfrsp
   33418       {Intrinsic::ppc_qpx_qvfrsqrte, 89111}, // __builtin_qpx_qvfrsqrte
   33419       {Intrinsic::ppc_qpx_qvfrsqrtes, 89135}, // __builtin_qpx_qvfrsqrtes
   33420       {Intrinsic::ppc_qpx_qvfsel, 89160}, // __builtin_qpx_qvfsel
   33421       {Intrinsic::ppc_qpx_qvfsub, 89181}, // __builtin_qpx_qvfsub
   33422       {Intrinsic::ppc_qpx_qvfsubs, 89202}, // __builtin_qpx_qvfsubs
   33423       {Intrinsic::ppc_qpx_qvftstnan, 89224}, // __builtin_qpx_qvftstnan
   33424       {Intrinsic::ppc_qpx_qvfxmadd, 89248}, // __builtin_qpx_qvfxmadd
   33425       {Intrinsic::ppc_qpx_qvfxmadds, 89271}, // __builtin_qpx_qvfxmadds
   33426       {Intrinsic::ppc_qpx_qvfxmul, 89295}, // __builtin_qpx_qvfxmul
   33427       {Intrinsic::ppc_qpx_qvfxmuls, 89317}, // __builtin_qpx_qvfxmuls
   33428       {Intrinsic::ppc_qpx_qvfxxcpnmadd, 89340}, // __builtin_qpx_qvfxxcpnmadd
   33429       {Intrinsic::ppc_qpx_qvfxxcpnmadds, 89367}, // __builtin_qpx_qvfxxcpnmadds
   33430       {Intrinsic::ppc_qpx_qvfxxmadd, 89395}, // __builtin_qpx_qvfxxmadd
   33431       {Intrinsic::ppc_qpx_qvfxxmadds, 89419}, // __builtin_qpx_qvfxxmadds
   33432       {Intrinsic::ppc_qpx_qvfxxnpmadd, 89444}, // __builtin_qpx_qvfxxnpmadd
   33433       {Intrinsic::ppc_qpx_qvfxxnpmadds, 89470}, // __builtin_qpx_qvfxxnpmadds
   33434       {Intrinsic::ppc_qpx_qvgpci, 89497}, // __builtin_qpx_qvgpci
   33435       {Intrinsic::ppc_qpx_qvlfcd, 89518}, // __builtin_qpx_qvlfcd
   33436       {Intrinsic::ppc_qpx_qvlfcda, 89539}, // __builtin_qpx_qvlfcda
   33437       {Intrinsic::ppc_qpx_qvlfcs, 89561}, // __builtin_qpx_qvlfcs
   33438       {Intrinsic::ppc_qpx_qvlfcsa, 89582}, // __builtin_qpx_qvlfcsa
   33439       {Intrinsic::ppc_qpx_qvlfd, 89604}, // __builtin_qpx_qvlfd
   33440       {Intrinsic::ppc_qpx_qvlfda, 89624}, // __builtin_qpx_qvlfda
   33441       {Intrinsic::ppc_qpx_qvlfiwa, 89645}, // __builtin_qpx_qvlfiwa
   33442       {Intrinsic::ppc_qpx_qvlfiwaa, 89667}, // __builtin_qpx_qvlfiwaa
   33443       {Intrinsic::ppc_qpx_qvlfiwz, 89690}, // __builtin_qpx_qvlfiwz
   33444       {Intrinsic::ppc_qpx_qvlfiwza, 89712}, // __builtin_qpx_qvlfiwza
   33445       {Intrinsic::ppc_qpx_qvlfs, 89735}, // __builtin_qpx_qvlfs
   33446       {Intrinsic::ppc_qpx_qvlfsa, 89755}, // __builtin_qpx_qvlfsa
   33447       {Intrinsic::ppc_qpx_qvlpcld, 89776}, // __builtin_qpx_qvlpcld
   33448       {Intrinsic::ppc_qpx_qvlpcls, 89798}, // __builtin_qpx_qvlpcls
   33449       {Intrinsic::ppc_qpx_qvlpcrd, 89820}, // __builtin_qpx_qvlpcrd
   33450       {Intrinsic::ppc_qpx_qvlpcrs, 89842}, // __builtin_qpx_qvlpcrs
   33451       {Intrinsic::ppc_qpx_qvstfcd, 89864}, // __builtin_qpx_qvstfcd
   33452       {Intrinsic::ppc_qpx_qvstfcda, 89886}, // __builtin_qpx_qvstfcda
   33453       {Intrinsic::ppc_qpx_qvstfcs, 89909}, // __builtin_qpx_qvstfcs
   33454       {Intrinsic::ppc_qpx_qvstfcsa, 89931}, // __builtin_qpx_qvstfcsa
   33455       {Intrinsic::ppc_qpx_qvstfd, 89954}, // __builtin_qpx_qvstfd
   33456       {Intrinsic::ppc_qpx_qvstfda, 89975}, // __builtin_qpx_qvstfda
   33457       {Intrinsic::ppc_qpx_qvstfiw, 89997}, // __builtin_qpx_qvstfiw
   33458       {Intrinsic::ppc_qpx_qvstfiwa, 90019}, // __builtin_qpx_qvstfiwa
   33459       {Intrinsic::ppc_qpx_qvstfs, 90042}, // __builtin_qpx_qvstfs
   33460       {Intrinsic::ppc_qpx_qvstfsa, 90063}, // __builtin_qpx_qvstfsa
   33461       {Intrinsic::ppc_set_texasr, 90085}, // __builtin_set_texasr
   33462       {Intrinsic::ppc_set_texasru, 90106}, // __builtin_set_texasru
   33463       {Intrinsic::ppc_set_tfhar, 90128}, // __builtin_set_tfhar
   33464       {Intrinsic::ppc_set_tfiar, 90148}, // __builtin_set_tfiar
   33465       {Intrinsic::ppc_tabort, 90168}, // __builtin_tabort
   33466       {Intrinsic::ppc_tabortdc, 90185}, // __builtin_tabortdc
   33467       {Intrinsic::ppc_tabortdci, 90204}, // __builtin_tabortdci
   33468       {Intrinsic::ppc_tabortwc, 90224}, // __builtin_tabortwc
   33469       {Intrinsic::ppc_tabortwci, 90243}, // __builtin_tabortwci
   33470       {Intrinsic::ppc_tbegin, 90263}, // __builtin_tbegin
   33471       {Intrinsic::ppc_tcheck, 90280}, // __builtin_tcheck
   33472       {Intrinsic::ppc_tend, 90297}, // __builtin_tend
   33473       {Intrinsic::ppc_tendall, 90312}, // __builtin_tendall
   33474       {Intrinsic::ppc_trechkpt, 90330}, // __builtin_trechkpt
   33475       {Intrinsic::ppc_treclaim, 90349}, // __builtin_treclaim
   33476       {Intrinsic::ppc_tresume, 90368}, // __builtin_tresume
   33477       {Intrinsic::ppc_tsr, 90386}, // __builtin_tsr
   33478       {Intrinsic::ppc_tsuspend, 90400}, // __builtin_tsuspend
   33479       {Intrinsic::ppc_ttest, 90419}, // __builtin_ttest
   33480       {Intrinsic::ppc_vsx_xsmaxdp, 90435}, // __builtin_vsx_xsmaxdp
   33481       {Intrinsic::ppc_vsx_xsmindp, 90457}, // __builtin_vsx_xsmindp
   33482       {Intrinsic::ppc_vsx_xvcmpeqdp, 90479}, // __builtin_vsx_xvcmpeqdp
   33483       {Intrinsic::ppc_vsx_xvcmpeqdp_p, 90503}, // __builtin_vsx_xvcmpeqdp_p
   33484       {Intrinsic::ppc_vsx_xvcmpeqsp, 90529}, // __builtin_vsx_xvcmpeqsp
   33485       {Intrinsic::ppc_vsx_xvcmpeqsp_p, 90553}, // __builtin_vsx_xvcmpeqsp_p
   33486       {Intrinsic::ppc_vsx_xvcmpgedp, 90579}, // __builtin_vsx_xvcmpgedp
   33487       {Intrinsic::ppc_vsx_xvcmpgedp_p, 90603}, // __builtin_vsx_xvcmpgedp_p
   33488       {Intrinsic::ppc_vsx_xvcmpgesp, 90629}, // __builtin_vsx_xvcmpgesp
   33489       {Intrinsic::ppc_vsx_xvcmpgesp_p, 90653}, // __builtin_vsx_xvcmpgesp_p
   33490       {Intrinsic::ppc_vsx_xvcmpgtdp, 90679}, // __builtin_vsx_xvcmpgtdp
   33491       {Intrinsic::ppc_vsx_xvcmpgtdp_p, 90703}, // __builtin_vsx_xvcmpgtdp_p
   33492       {Intrinsic::ppc_vsx_xvcmpgtsp, 90729}, // __builtin_vsx_xvcmpgtsp
   33493       {Intrinsic::ppc_vsx_xvcmpgtsp_p, 90753}, // __builtin_vsx_xvcmpgtsp_p
   33494       {Intrinsic::ppc_vsx_xvcvdpsp, 90779}, // __builtin_vsx_xvcvdpsp
   33495       {Intrinsic::ppc_vsx_xvcvdpsxws, 90802}, // __builtin_vsx_xvcvdpsxws
   33496       {Intrinsic::ppc_vsx_xvcvdpuxws, 90827}, // __builtin_vsx_xvcvdpuxws
   33497       {Intrinsic::ppc_vsx_xvcvhpsp, 90852}, // __builtin_vsx_xvcvhpsp
   33498       {Intrinsic::ppc_vsx_xvcvspdp, 90875}, // __builtin_vsx_xvcvspdp
   33499       {Intrinsic::ppc_vsx_xvcvsphp, 90898}, // __builtin_vsx_xvcvsphp
   33500       {Intrinsic::ppc_vsx_xvcvsxdsp, 90921}, // __builtin_vsx_xvcvsxdsp
   33501       {Intrinsic::ppc_vsx_xvcvsxwdp, 90945}, // __builtin_vsx_xvcvsxwdp
   33502       {Intrinsic::ppc_vsx_xvcvuxdsp, 90969}, // __builtin_vsx_xvcvuxdsp
   33503       {Intrinsic::ppc_vsx_xvcvuxwdp, 90993}, // __builtin_vsx_xvcvuxwdp
   33504       {Intrinsic::ppc_vsx_xvdivdp, 91017}, // __builtin_vsx_xvdivdp
   33505       {Intrinsic::ppc_vsx_xvdivsp, 91039}, // __builtin_vsx_xvdivsp
   33506       {Intrinsic::ppc_vsx_xviexpdp, 91061}, // __builtin_vsx_xviexpdp
   33507       {Intrinsic::ppc_vsx_xviexpsp, 91084}, // __builtin_vsx_xviexpsp
   33508       {Intrinsic::ppc_vsx_xvmaxdp, 91107}, // __builtin_vsx_xvmaxdp
   33509       {Intrinsic::ppc_vsx_xvmaxsp, 91129}, // __builtin_vsx_xvmaxsp
   33510       {Intrinsic::ppc_vsx_xvmindp, 91151}, // __builtin_vsx_xvmindp
   33511       {Intrinsic::ppc_vsx_xvminsp, 91173}, // __builtin_vsx_xvminsp
   33512       {Intrinsic::ppc_vsx_xvredp, 91195}, // __builtin_vsx_xvredp
   33513       {Intrinsic::ppc_vsx_xvresp, 91216}, // __builtin_vsx_xvresp
   33514       {Intrinsic::ppc_vsx_xvrsqrtedp, 91237}, // __builtin_vsx_xvrsqrtedp
   33515       {Intrinsic::ppc_vsx_xvrsqrtesp, 91262}, // __builtin_vsx_xvrsqrtesp
   33516       {Intrinsic::ppc_vsx_xvtstdcdp, 91287}, // __builtin_vsx_xvtstdcdp
   33517       {Intrinsic::ppc_vsx_xvtstdcsp, 91311}, // __builtin_vsx_xvtstdcsp
   33518       {Intrinsic::ppc_vsx_xvxexpdp, 91335}, // __builtin_vsx_xvxexpdp
   33519       {Intrinsic::ppc_vsx_xvxexpsp, 91358}, // __builtin_vsx_xvxexpsp
   33520       {Intrinsic::ppc_vsx_xvxsigdp, 91381}, // __builtin_vsx_xvxsigdp
   33521       {Intrinsic::ppc_vsx_xvxsigsp, 91404}, // __builtin_vsx_xvxsigsp
   33522       {Intrinsic::ppc_vsx_xxextractuw, 91427}, // __builtin_vsx_xxextractuw
   33523       {Intrinsic::ppc_vsx_xxinsertw, 91453}, // __builtin_vsx_xxinsertw
   33524       {Intrinsic::ppc_vsx_xxleqv, 91477}, // __builtin_vsx_xxleqv
   33525     };
   33526     auto I = std::lower_bound(std::begin(ppcNames),
   33527                               std::end(ppcNames),
   33528                               BuiltinNameStr);
   33529     if (I != std::end(ppcNames) &&
   33530         I->getName() == BuiltinNameStr)
   33531       return I->IntrinID;
   33532   }
   33533   if (TargetPrefix == "r600") {
   33534     static const BuiltinEntry r600Names[] = {
   33535       {Intrinsic::r600_group_barrier, 91498}, // __builtin_r600_group_barrier
   33536       {Intrinsic::r600_implicitarg_ptr, 91527}, // __builtin_r600_implicitarg_ptr
   33537       {Intrinsic::r600_rat_store_typed, 91558}, // __builtin_r600_rat_store_typed
   33538       {Intrinsic::r600_read_global_size_x, 91589}, // __builtin_r600_read_global_size_x
   33539       {Intrinsic::r600_read_global_size_y, 91623}, // __builtin_r600_read_global_size_y
   33540       {Intrinsic::r600_read_global_size_z, 91657}, // __builtin_r600_read_global_size_z
   33541       {Intrinsic::r600_read_ngroups_x, 91691}, // __builtin_r600_read_ngroups_x
   33542       {Intrinsic::r600_read_ngroups_y, 91721}, // __builtin_r600_read_ngroups_y
   33543       {Intrinsic::r600_read_ngroups_z, 91751}, // __builtin_r600_read_ngroups_z
   33544       {Intrinsic::r600_read_tgid_x, 91781}, // __builtin_r600_read_tgid_x
   33545       {Intrinsic::r600_read_tgid_y, 91808}, // __builtin_r600_read_tgid_y
   33546       {Intrinsic::r600_read_tgid_z, 91835}, // __builtin_r600_read_tgid_z
   33547     };
   33548     auto I = std::lower_bound(std::begin(r600Names),
   33549                               std::end(r600Names),
   33550                               BuiltinNameStr);
   33551     if (I != std::end(r600Names) &&
   33552         I->getName() == BuiltinNameStr)
   33553       return I->IntrinID;
   33554   }
   33555   if (TargetPrefix == "s390") {
   33556     static const BuiltinEntry s390Names[] = {
   33557       {Intrinsic::s390_efpc, 91862}, // __builtin_s390_efpc
   33558       {Intrinsic::s390_lcbb, 91909}, // __builtin_s390_lcbb
   33559       {Intrinsic::s390_sfpc, 91949}, // __builtin_s390_sfpc
   33560       {Intrinsic::s390_vaccb, 91969}, // __builtin_s390_vaccb
   33561       {Intrinsic::s390_vacccq, 91990}, // __builtin_s390_vacccq
   33562       {Intrinsic::s390_vaccf, 92012}, // __builtin_s390_vaccf
   33563       {Intrinsic::s390_vaccg, 92033}, // __builtin_s390_vaccg
   33564       {Intrinsic::s390_vacch, 92054}, // __builtin_s390_vacch
   33565       {Intrinsic::s390_vaccq, 92075}, // __builtin_s390_vaccq
   33566       {Intrinsic::s390_vacq, 92096}, // __builtin_s390_vacq
   33567       {Intrinsic::s390_vaq, 92116}, // __builtin_s390_vaq
   33568       {Intrinsic::s390_vavgb, 92135}, // __builtin_s390_vavgb
   33569       {Intrinsic::s390_vavgf, 92156}, // __builtin_s390_vavgf
   33570       {Intrinsic::s390_vavgg, 92177}, // __builtin_s390_vavgg
   33571       {Intrinsic::s390_vavgh, 92198}, // __builtin_s390_vavgh
   33572       {Intrinsic::s390_vavglb, 92219}, // __builtin_s390_vavglb
   33573       {Intrinsic::s390_vavglf, 92241}, // __builtin_s390_vavglf
   33574       {Intrinsic::s390_vavglg, 92263}, // __builtin_s390_vavglg
   33575       {Intrinsic::s390_vavglh, 92285}, // __builtin_s390_vavglh
   33576       {Intrinsic::s390_vbperm, 92307}, // __builtin_s390_vbperm
   33577       {Intrinsic::s390_vcksm, 92329}, // __builtin_s390_vcksm
   33578       {Intrinsic::s390_verimb, 92350}, // __builtin_s390_verimb
   33579       {Intrinsic::s390_verimf, 92372}, // __builtin_s390_verimf
   33580       {Intrinsic::s390_verimg, 92394}, // __builtin_s390_verimg
   33581       {Intrinsic::s390_verimh, 92416}, // __builtin_s390_verimh
   33582       {Intrinsic::s390_verllb, 92438}, // __builtin_s390_verllb
   33583       {Intrinsic::s390_verllf, 92460}, // __builtin_s390_verllf
   33584       {Intrinsic::s390_verllg, 92482}, // __builtin_s390_verllg
   33585       {Intrinsic::s390_verllh, 92504}, // __builtin_s390_verllh
   33586       {Intrinsic::s390_verllvb, 92526}, // __builtin_s390_verllvb
   33587       {Intrinsic::s390_verllvf, 92549}, // __builtin_s390_verllvf
   33588       {Intrinsic::s390_verllvg, 92572}, // __builtin_s390_verllvg
   33589       {Intrinsic::s390_verllvh, 92595}, // __builtin_s390_verllvh
   33590       {Intrinsic::s390_vfaeb, 92618}, // __builtin_s390_vfaeb
   33591       {Intrinsic::s390_vfaef, 92639}, // __builtin_s390_vfaef
   33592       {Intrinsic::s390_vfaeh, 92660}, // __builtin_s390_vfaeh
   33593       {Intrinsic::s390_vfaezb, 92681}, // __builtin_s390_vfaezb
   33594       {Intrinsic::s390_vfaezf, 92703}, // __builtin_s390_vfaezf
   33595       {Intrinsic::s390_vfaezh, 92725}, // __builtin_s390_vfaezh
   33596       {Intrinsic::s390_vfeeb, 92747}, // __builtin_s390_vfeeb
   33597       {Intrinsic::s390_vfeef, 92768}, // __builtin_s390_vfeef
   33598       {Intrinsic::s390_vfeeh, 92789}, // __builtin_s390_vfeeh
   33599       {Intrinsic::s390_vfeezb, 92810}, // __builtin_s390_vfeezb
   33600       {Intrinsic::s390_vfeezf, 92832}, // __builtin_s390_vfeezf
   33601       {Intrinsic::s390_vfeezh, 92854}, // __builtin_s390_vfeezh
   33602       {Intrinsic::s390_vfeneb, 92876}, // __builtin_s390_vfeneb
   33603       {Intrinsic::s390_vfenef, 92898}, // __builtin_s390_vfenef
   33604       {Intrinsic::s390_vfeneh, 92920}, // __builtin_s390_vfeneh
   33605       {Intrinsic::s390_vfenezb, 92942}, // __builtin_s390_vfenezb
   33606       {Intrinsic::s390_vfenezf, 92965}, // __builtin_s390_vfenezf
   33607       {Intrinsic::s390_vfenezh, 92988}, // __builtin_s390_vfenezh
   33608       {Intrinsic::s390_vgfmab, 93011}, // __builtin_s390_vgfmab
   33609       {Intrinsic::s390_vgfmaf, 93033}, // __builtin_s390_vgfmaf
   33610       {Intrinsic::s390_vgfmag, 93055}, // __builtin_s390_vgfmag
   33611       {Intrinsic::s390_vgfmah, 93077}, // __builtin_s390_vgfmah
   33612       {Intrinsic::s390_vgfmb, 93099}, // __builtin_s390_vgfmb
   33613       {Intrinsic::s390_vgfmf, 93120}, // __builtin_s390_vgfmf
   33614       {Intrinsic::s390_vgfmg, 93141}, // __builtin_s390_vgfmg
   33615       {Intrinsic::s390_vgfmh, 93162}, // __builtin_s390_vgfmh
   33616       {Intrinsic::s390_vistrb, 93183}, // __builtin_s390_vistrb
   33617       {Intrinsic::s390_vistrf, 93205}, // __builtin_s390_vistrf
   33618       {Intrinsic::s390_vistrh, 93227}, // __builtin_s390_vistrh
   33619       {Intrinsic::s390_vlbb, 93249}, // __builtin_s390_vlbb
   33620       {Intrinsic::s390_vll, 93269}, // __builtin_s390_vll
   33621       {Intrinsic::s390_vlrl, 93288}, // __builtin_s390_vlrl
   33622       {Intrinsic::s390_vmaeb, 93308}, // __builtin_s390_vmaeb
   33623       {Intrinsic::s390_vmaef, 93329}, // __builtin_s390_vmaef
   33624       {Intrinsic::s390_vmaeh, 93350}, // __builtin_s390_vmaeh
   33625       {Intrinsic::s390_vmahb, 93371}, // __builtin_s390_vmahb
   33626       {Intrinsic::s390_vmahf, 93392}, // __builtin_s390_vmahf
   33627       {Intrinsic::s390_vmahh, 93413}, // __builtin_s390_vmahh
   33628       {Intrinsic::s390_vmaleb, 93434}, // __builtin_s390_vmaleb
   33629       {Intrinsic::s390_vmalef, 93456}, // __builtin_s390_vmalef
   33630       {Intrinsic::s390_vmaleh, 93478}, // __builtin_s390_vmaleh
   33631       {Intrinsic::s390_vmalhb, 93500}, // __builtin_s390_vmalhb
   33632       {Intrinsic::s390_vmalhf, 93522}, // __builtin_s390_vmalhf
   33633       {Intrinsic::s390_vmalhh, 93544}, // __builtin_s390_vmalhh
   33634       {Intrinsic::s390_vmalob, 93566}, // __builtin_s390_vmalob
   33635       {Intrinsic::s390_vmalof, 93588}, // __builtin_s390_vmalof
   33636       {Intrinsic::s390_vmaloh, 93610}, // __builtin_s390_vmaloh
   33637       {Intrinsic::s390_vmaob, 93632}, // __builtin_s390_vmaob
   33638       {Intrinsic::s390_vmaof, 93653}, // __builtin_s390_vmaof
   33639       {Intrinsic::s390_vmaoh, 93674}, // __builtin_s390_vmaoh
   33640       {Intrinsic::s390_vmeb, 93695}, // __builtin_s390_vmeb
   33641       {Intrinsic::s390_vmef, 93715}, // __builtin_s390_vmef
   33642       {Intrinsic::s390_vmeh, 93735}, // __builtin_s390_vmeh
   33643       {Intrinsic::s390_vmhb, 93755}, // __builtin_s390_vmhb
   33644       {Intrinsic::s390_vmhf, 93775}, // __builtin_s390_vmhf
   33645       {Intrinsic::s390_vmhh, 93795}, // __builtin_s390_vmhh
   33646       {Intrinsic::s390_vmleb, 93815}, // __builtin_s390_vmleb
   33647       {Intrinsic::s390_vmlef, 93836}, // __builtin_s390_vmlef
   33648       {Intrinsic::s390_vmleh, 93857}, // __builtin_s390_vmleh
   33649       {Intrinsic::s390_vmlhb, 93878}, // __builtin_s390_vmlhb
   33650       {Intrinsic::s390_vmlhf, 93899}, // __builtin_s390_vmlhf
   33651       {Intrinsic::s390_vmlhh, 93920}, // __builtin_s390_vmlhh
   33652       {Intrinsic::s390_vmlob, 93941}, // __builtin_s390_vmlob
   33653       {Intrinsic::s390_vmlof, 93962}, // __builtin_s390_vmlof
   33654       {Intrinsic::s390_vmloh, 93983}, // __builtin_s390_vmloh
   33655       {Intrinsic::s390_vmob, 94004}, // __builtin_s390_vmob
   33656       {Intrinsic::s390_vmof, 94024}, // __builtin_s390_vmof
   33657       {Intrinsic::s390_vmoh, 94044}, // __builtin_s390_vmoh
   33658       {Intrinsic::s390_vmslg, 94064}, // __builtin_s390_vmslg
   33659       {Intrinsic::s390_vpdi, 94085}, // __builtin_s390_vpdi
   33660       {Intrinsic::s390_vperm, 94105}, // __builtin_s390_vperm
   33661       {Intrinsic::s390_vpklsf, 94126}, // __builtin_s390_vpklsf
   33662       {Intrinsic::s390_vpklsg, 94148}, // __builtin_s390_vpklsg
   33663       {Intrinsic::s390_vpklsh, 94170}, // __builtin_s390_vpklsh
   33664       {Intrinsic::s390_vpksf, 94192}, // __builtin_s390_vpksf
   33665       {Intrinsic::s390_vpksg, 94213}, // __builtin_s390_vpksg
   33666       {Intrinsic::s390_vpksh, 94234}, // __builtin_s390_vpksh
   33667       {Intrinsic::s390_vsbcbiq, 94255}, // __builtin_s390_vsbcbiq
   33668       {Intrinsic::s390_vsbiq, 94278}, // __builtin_s390_vsbiq
   33669       {Intrinsic::s390_vscbib, 94299}, // __builtin_s390_vscbib
   33670       {Intrinsic::s390_vscbif, 94321}, // __builtin_s390_vscbif
   33671       {Intrinsic::s390_vscbig, 94343}, // __builtin_s390_vscbig
   33672       {Intrinsic::s390_vscbih, 94365}, // __builtin_s390_vscbih
   33673       {Intrinsic::s390_vscbiq, 94387}, // __builtin_s390_vscbiq
   33674       {Intrinsic::s390_vsl, 94409}, // __builtin_s390_vsl
   33675       {Intrinsic::s390_vslb, 94428}, // __builtin_s390_vslb
   33676       {Intrinsic::s390_vsldb, 94448}, // __builtin_s390_vsldb
   33677       {Intrinsic::s390_vsq, 94469}, // __builtin_s390_vsq
   33678       {Intrinsic::s390_vsra, 94488}, // __builtin_s390_vsra
   33679       {Intrinsic::s390_vsrab, 94508}, // __builtin_s390_vsrab
   33680       {Intrinsic::s390_vsrl, 94529}, // __builtin_s390_vsrl
   33681       {Intrinsic::s390_vsrlb, 94549}, // __builtin_s390_vsrlb
   33682       {Intrinsic::s390_vstl, 94570}, // __builtin_s390_vstl
   33683       {Intrinsic::s390_vstrcb, 94590}, // __builtin_s390_vstrcb
   33684       {Intrinsic::s390_vstrcf, 94612}, // __builtin_s390_vstrcf
   33685       {Intrinsic::s390_vstrch, 94634}, // __builtin_s390_vstrch
   33686       {Intrinsic::s390_vstrczb, 94656}, // __builtin_s390_vstrczb
   33687       {Intrinsic::s390_vstrczf, 94679}, // __builtin_s390_vstrczf
   33688       {Intrinsic::s390_vstrczh, 94702}, // __builtin_s390_vstrczh
   33689       {Intrinsic::s390_vstrl, 94725}, // __builtin_s390_vstrl
   33690       {Intrinsic::s390_vsumb, 94746}, // __builtin_s390_vsumb
   33691       {Intrinsic::s390_vsumgf, 94767}, // __builtin_s390_vsumgf
   33692       {Intrinsic::s390_vsumgh, 94789}, // __builtin_s390_vsumgh
   33693       {Intrinsic::s390_vsumh, 94811}, // __builtin_s390_vsumh
   33694       {Intrinsic::s390_vsumqf, 94832}, // __builtin_s390_vsumqf
   33695       {Intrinsic::s390_vsumqg, 94854}, // __builtin_s390_vsumqg
   33696       {Intrinsic::s390_vtm, 94876}, // __builtin_s390_vtm
   33697       {Intrinsic::s390_vuphb, 94895}, // __builtin_s390_vuphb
   33698       {Intrinsic::s390_vuphf, 94916}, // __builtin_s390_vuphf
   33699       {Intrinsic::s390_vuphh, 94937}, // __builtin_s390_vuphh
   33700       {Intrinsic::s390_vuplb, 94958}, // __builtin_s390_vuplb
   33701       {Intrinsic::s390_vuplf, 94979}, // __builtin_s390_vuplf
   33702       {Intrinsic::s390_vuplhb, 95000}, // __builtin_s390_vuplhb
   33703       {Intrinsic::s390_vuplhf, 95022}, // __builtin_s390_vuplhf
   33704       {Intrinsic::s390_vuplhh, 95044}, // __builtin_s390_vuplhh
   33705       {Intrinsic::s390_vuplhw, 95066}, // __builtin_s390_vuplhw
   33706       {Intrinsic::s390_vupllb, 95088}, // __builtin_s390_vupllb
   33707       {Intrinsic::s390_vupllf, 95110}, // __builtin_s390_vupllf
   33708       {Intrinsic::s390_vupllh, 95132}, // __builtin_s390_vupllh
   33709       {Intrinsic::s390_tend, 90297}, // __builtin_tend
   33710       {Intrinsic::s390_ppa_txassist, 91929}, // __builtin_tx_assist
   33711       {Intrinsic::s390_etnd, 91882}, // __builtin_tx_nesting_depth
   33712     };
   33713     auto I = std::lower_bound(std::begin(s390Names),
   33714                               std::end(s390Names),
   33715                               BuiltinNameStr);
   33716     if (I != std::end(s390Names) &&
   33717         I->getName() == BuiltinNameStr)
   33718       return I->IntrinID;
   33719   }
   33720   if (TargetPrefix == "x86") {
   33721     static const BuiltinEntry x86Names[] = {
   33722       {Intrinsic::x86_addcarry_u32, 95662}, // __builtin_ia32_addcarry_u32
   33723       {Intrinsic::x86_addcarry_u64, 95690}, // __builtin_ia32_addcarry_u64
   33724       {Intrinsic::x86_addcarryx_u32, 95718}, // __builtin_ia32_addcarryx_u32
   33725       {Intrinsic::x86_addcarryx_u64, 95747}, // __builtin_ia32_addcarryx_u64
   33726       {Intrinsic::x86_avx512_mask_add_pd_512, 101676}, // __builtin_ia32_addpd512_mask
   33727       {Intrinsic::x86_avx512_mask_add_ps_512, 101705}, // __builtin_ia32_addps512_mask
   33728       {Intrinsic::x86_avx512_mask_add_sd_round, 101734}, // __builtin_ia32_addsd_round_mask
   33729       {Intrinsic::x86_avx512_mask_add_ss_round, 101766}, // __builtin_ia32_addss_round_mask
   33730       {Intrinsic::x86_sse3_addsub_pd, 131200}, // __builtin_ia32_addsubpd
   33731       {Intrinsic::x86_avx_addsub_pd_256, 95943}, // __builtin_ia32_addsubpd256
   33732       {Intrinsic::x86_sse3_addsub_ps, 131224}, // __builtin_ia32_addsubps
   33733       {Intrinsic::x86_avx_addsub_ps_256, 95970}, // __builtin_ia32_addsubps256
   33734       {Intrinsic::x86_aesni_aesdec, 95776}, // __builtin_ia32_aesdec128
   33735       {Intrinsic::x86_aesni_aesdeclast, 95801}, // __builtin_ia32_aesdeclast128
   33736       {Intrinsic::x86_aesni_aesenc, 95830}, // __builtin_ia32_aesenc128
   33737       {Intrinsic::x86_aesni_aesenclast, 95855}, // __builtin_ia32_aesenclast128
   33738       {Intrinsic::x86_aesni_aesimc, 95884}, // __builtin_ia32_aesimc128
   33739       {Intrinsic::x86_aesni_aeskeygenassist, 95909}, // __builtin_ia32_aeskeygenassist128
   33740       {Intrinsic::x86_bmi_bextr_32, 125208}, // __builtin_ia32_bextr_u32
   33741       {Intrinsic::x86_bmi_bextr_64, 125233}, // __builtin_ia32_bextr_u64
   33742       {Intrinsic::x86_tbm_bextri_u32, 133102}, // __builtin_ia32_bextri_u32
   33743       {Intrinsic::x86_tbm_bextri_u64, 133128}, // __builtin_ia32_bextri_u64
   33744       {Intrinsic::x86_sse41_blendvpd, 131401}, // __builtin_ia32_blendvpd
   33745       {Intrinsic::x86_avx_blendv_pd_256, 95997}, // __builtin_ia32_blendvpd256
   33746       {Intrinsic::x86_sse41_blendvps, 131425}, // __builtin_ia32_blendvps
   33747       {Intrinsic::x86_avx_blendv_ps_256, 96024}, // __builtin_ia32_blendvps256
   33748       {Intrinsic::x86_avx512_broadcastmb_128, 99635}, // __builtin_ia32_broadcastmb128
   33749       {Intrinsic::x86_avx512_broadcastmb_256, 99665}, // __builtin_ia32_broadcastmb256
   33750       {Intrinsic::x86_avx512_broadcastmb_512, 99695}, // __builtin_ia32_broadcastmb512
   33751       {Intrinsic::x86_avx512_broadcastmw_128, 99725}, // __builtin_ia32_broadcastmw128
   33752       {Intrinsic::x86_avx512_broadcastmw_256, 99755}, // __builtin_ia32_broadcastmw256
   33753       {Intrinsic::x86_avx512_broadcastmw_512, 99785}, // __builtin_ia32_broadcastmw512
   33754       {Intrinsic::x86_bmi_bzhi_64, 125281}, // __builtin_ia32_bzhi_di
   33755       {Intrinsic::x86_bmi_bzhi_32, 125258}, // __builtin_ia32_bzhi_si
   33756       {Intrinsic::x86_sse2_clflush, 129513}, // __builtin_ia32_clflush
   33757       {Intrinsic::x86_clflushopt, 125396}, // __builtin_ia32_clflushopt
   33758       {Intrinsic::x86_clwb, 125422}, // __builtin_ia32_clwb
   33759       {Intrinsic::x86_clzero, 125442}, // __builtin_ia32_clzero
   33760       {Intrinsic::x86_avx512_mask_cmp_pd_128, 101798}, // __builtin_ia32_cmppd128_mask
   33761       {Intrinsic::x86_avx512_mask_cmp_pd_256, 101827}, // __builtin_ia32_cmppd256_mask
   33762       {Intrinsic::x86_avx512_mask_cmp_pd_512, 101856}, // __builtin_ia32_cmppd512_mask
   33763       {Intrinsic::x86_avx512_mask_cmp_ps_128, 101885}, // __builtin_ia32_cmpps128_mask
   33764       {Intrinsic::x86_avx512_mask_cmp_ps_256, 101914}, // __builtin_ia32_cmpps256_mask
   33765       {Intrinsic::x86_avx512_mask_cmp_ps_512, 101943}, // __builtin_ia32_cmpps512_mask
   33766       {Intrinsic::x86_sse2_cmp_sd, 129536}, // __builtin_ia32_cmpsd
   33767       {Intrinsic::x86_avx512_mask_cmp_sd, 101972}, // __builtin_ia32_cmpsd_mask
   33768       {Intrinsic::x86_sse_cmp_ss, 128688}, // __builtin_ia32_cmpss
   33769       {Intrinsic::x86_avx512_mask_cmp_ss, 101998}, // __builtin_ia32_cmpss_mask
   33770       {Intrinsic::x86_sse_comieq_ss, 128709}, // __builtin_ia32_comieq
   33771       {Intrinsic::x86_sse_comige_ss, 128731}, // __builtin_ia32_comige
   33772       {Intrinsic::x86_sse_comigt_ss, 128753}, // __builtin_ia32_comigt
   33773       {Intrinsic::x86_sse_comile_ss, 128775}, // __builtin_ia32_comile
   33774       {Intrinsic::x86_sse_comilt_ss, 128797}, // __builtin_ia32_comilt
   33775       {Intrinsic::x86_sse_comineq_ss, 128819}, // __builtin_ia32_comineq
   33776       {Intrinsic::x86_sse2_comieq_sd, 129557}, // __builtin_ia32_comisdeq
   33777       {Intrinsic::x86_sse2_comige_sd, 129581}, // __builtin_ia32_comisdge
   33778       {Intrinsic::x86_sse2_comigt_sd, 129605}, // __builtin_ia32_comisdgt
   33779       {Intrinsic::x86_sse2_comile_sd, 129629}, // __builtin_ia32_comisdle
   33780       {Intrinsic::x86_sse2_comilt_sd, 129653}, // __builtin_ia32_comisdlt
   33781       {Intrinsic::x86_sse2_comineq_sd, 129677}, // __builtin_ia32_comisdneq
   33782       {Intrinsic::x86_avx512_mask_compress_pd_128, 102126}, // __builtin_ia32_compressdf128_mask
   33783       {Intrinsic::x86_avx512_mask_compress_pd_256, 102160}, // __builtin_ia32_compressdf256_mask
   33784       {Intrinsic::x86_avx512_mask_compress_pd_512, 102194}, // __builtin_ia32_compressdf512_mask
   33785       {Intrinsic::x86_avx512_mask_compress_q_128, 102330}, // __builtin_ia32_compressdi128_mask
   33786       {Intrinsic::x86_avx512_mask_compress_q_256, 102364}, // __builtin_ia32_compressdi256_mask
   33787       {Intrinsic::x86_avx512_mask_compress_q_512, 102398}, // __builtin_ia32_compressdi512_mask
   33788       {Intrinsic::x86_avx512_mask_compress_ps_128, 102228}, // __builtin_ia32_compresssf128_mask
   33789       {Intrinsic::x86_avx512_mask_compress_ps_256, 102262}, // __builtin_ia32_compresssf256_mask
   33790       {Intrinsic::x86_avx512_mask_compress_ps_512, 102296}, // __builtin_ia32_compresssf512_mask
   33791       {Intrinsic::x86_avx512_mask_compress_d_128, 102024}, // __builtin_ia32_compresssi128_mask
   33792       {Intrinsic::x86_avx512_mask_compress_d_256, 102058}, // __builtin_ia32_compresssi256_mask
   33793       {Intrinsic::x86_avx512_mask_compress_d_512, 102092}, // __builtin_ia32_compresssi512_mask
   33794       {Intrinsic::x86_avx512_mask_compress_store_pd_128, 102549}, // __builtin_ia32_compressstoredf128_mask
   33795       {Intrinsic::x86_avx512_mask_compress_store_pd_256, 102588}, // __builtin_ia32_compressstoredf256_mask
   33796       {Intrinsic::x86_avx512_mask_compress_store_pd_512, 102627}, // __builtin_ia32_compressstoredf512_mask
   33797       {Intrinsic::x86_avx512_mask_compress_store_q_128, 102783}, // __builtin_ia32_compressstoredi128_mask
   33798       {Intrinsic::x86_avx512_mask_compress_store_q_256, 102822}, // __builtin_ia32_compressstoredi256_mask
   33799       {Intrinsic::x86_avx512_mask_compress_store_q_512, 102861}, // __builtin_ia32_compressstoredi512_mask
   33800       {Intrinsic::x86_avx512_mask_compress_store_ps_128, 102666}, // __builtin_ia32_compressstoresf128_mask
   33801       {Intrinsic::x86_avx512_mask_compress_store_ps_256, 102705}, // __builtin_ia32_compressstoresf256_mask
   33802       {Intrinsic::x86_avx512_mask_compress_store_ps_512, 102744}, // __builtin_ia32_compressstoresf512_mask
   33803       {Intrinsic::x86_avx512_mask_compress_store_d_128, 102432}, // __builtin_ia32_compressstoresi128_mask
   33804       {Intrinsic::x86_avx512_mask_compress_store_d_256, 102471}, // __builtin_ia32_compressstoresi256_mask
   33805       {Intrinsic::x86_avx512_mask_compress_store_d_512, 102510}, // __builtin_ia32_compressstoresi512_mask
   33806       {Intrinsic::x86_sse42_crc32_64_64, 131888}, // __builtin_ia32_crc32di
   33807       {Intrinsic::x86_sse42_crc32_32_16, 131819}, // __builtin_ia32_crc32hi
   33808       {Intrinsic::x86_sse42_crc32_32_8, 131865}, // __builtin_ia32_crc32qi
   33809       {Intrinsic::x86_sse42_crc32_32_32, 131842}, // __builtin_ia32_crc32si
   33810       {Intrinsic::x86_avx512_cvtb2mask_128, 99815}, // __builtin_ia32_cvtb2mask128
   33811       {Intrinsic::x86_avx512_cvtb2mask_256, 99843}, // __builtin_ia32_cvtb2mask256
   33812       {Intrinsic::x86_avx512_cvtb2mask_512, 99871}, // __builtin_ia32_cvtb2mask512
   33813       {Intrinsic::x86_avx512_cvtd2mask_128, 99899}, // __builtin_ia32_cvtd2mask128
   33814       {Intrinsic::x86_avx512_cvtd2mask_256, 99927}, // __builtin_ia32_cvtd2mask256
   33815       {Intrinsic::x86_avx512_cvtd2mask_512, 99955}, // __builtin_ia32_cvtd2mask512
   33816       {Intrinsic::x86_sse2_cvtdq2ps, 129702}, // __builtin_ia32_cvtdq2ps
   33817       {Intrinsic::x86_avx512_mask_cvtdq2ps_128, 103122}, // __builtin_ia32_cvtdq2ps128_mask
   33818       {Intrinsic::x86_avx_cvtdq2_ps_256, 96132}, // __builtin_ia32_cvtdq2ps256
   33819       {Intrinsic::x86_avx512_mask_cvtdq2ps_256, 103154}, // __builtin_ia32_cvtdq2ps256_mask
   33820       {Intrinsic::x86_avx512_mask_cvtdq2ps_512, 103186}, // __builtin_ia32_cvtdq2ps512_mask
   33821       {Intrinsic::x86_sse2_cvtpd2dq, 129726}, // __builtin_ia32_cvtpd2dq
   33822       {Intrinsic::x86_avx512_mask_cvtpd2dq_128, 103218}, // __builtin_ia32_cvtpd2dq128_mask
   33823       {Intrinsic::x86_avx_cvt_pd2dq_256, 96078}, // __builtin_ia32_cvtpd2dq256
   33824       {Intrinsic::x86_avx512_mask_cvtpd2dq_256, 103250}, // __builtin_ia32_cvtpd2dq256_mask
   33825       {Intrinsic::x86_avx512_mask_cvtpd2dq_512, 103282}, // __builtin_ia32_cvtpd2dq512_mask
   33826       {Intrinsic::x86_sse_cvtpd2pi, 128842}, // __builtin_ia32_cvtpd2pi
   33827       {Intrinsic::x86_sse2_cvtpd2ps, 129750}, // __builtin_ia32_cvtpd2ps
   33828       {Intrinsic::x86_avx_cvt_pd2_ps_256, 96051}, // __builtin_ia32_cvtpd2ps256
   33829       {Intrinsic::x86_avx512_mask_cvtpd2ps_256, 103343}, // __builtin_ia32_cvtpd2ps256_mask
   33830       {Intrinsic::x86_avx512_mask_cvtpd2ps_512, 103375}, // __builtin_ia32_cvtpd2ps512_mask
   33831       {Intrinsic::x86_avx512_mask_cvtpd2ps, 103314}, // __builtin_ia32_cvtpd2ps_mask
   33832       {Intrinsic::x86_avx512_mask_cvtpd2qq_128, 103407}, // __builtin_ia32_cvtpd2qq128_mask
   33833       {Intrinsic::x86_avx512_mask_cvtpd2qq_256, 103439}, // __builtin_ia32_cvtpd2qq256_mask
   33834       {Intrinsic::x86_avx512_mask_cvtpd2qq_512, 103471}, // __builtin_ia32_cvtpd2qq512_mask
   33835       {Intrinsic::x86_avx512_mask_cvtpd2udq_128, 103503}, // __builtin_ia32_cvtpd2udq128_mask
   33836       {Intrinsic::x86_avx512_mask_cvtpd2udq_256, 103536}, // __builtin_ia32_cvtpd2udq256_mask
   33837       {Intrinsic::x86_avx512_mask_cvtpd2udq_512, 103569}, // __builtin_ia32_cvtpd2udq512_mask
   33838       {Intrinsic::x86_avx512_mask_cvtpd2uqq_128, 103602}, // __builtin_ia32_cvtpd2uqq128_mask
   33839       {Intrinsic::x86_avx512_mask_cvtpd2uqq_256, 103635}, // __builtin_ia32_cvtpd2uqq256_mask
   33840       {Intrinsic::x86_avx512_mask_cvtpd2uqq_512, 103668}, // __builtin_ia32_cvtpd2uqq512_mask
   33841       {Intrinsic::x86_sse_cvtpi2pd, 128866}, // __builtin_ia32_cvtpi2pd
   33842       {Intrinsic::x86_sse_cvtpi2ps, 128890}, // __builtin_ia32_cvtpi2ps
   33843       {Intrinsic::x86_sse2_cvtps2dq, 129774}, // __builtin_ia32_cvtps2dq
   33844       {Intrinsic::x86_avx512_mask_cvtps2dq_128, 103701}, // __builtin_ia32_cvtps2dq128_mask
   33845       {Intrinsic::x86_avx_cvt_ps2dq_256, 96105}, // __builtin_ia32_cvtps2dq256
   33846       {Intrinsic::x86_avx512_mask_cvtps2dq_256, 103733}, // __builtin_ia32_cvtps2dq256_mask
   33847       {Intrinsic::x86_avx512_mask_cvtps2dq_512, 103765}, // __builtin_ia32_cvtps2dq512_mask
   33848       {Intrinsic::x86_avx512_mask_cvtps2pd_128, 103797}, // __builtin_ia32_cvtps2pd128_mask
   33849       {Intrinsic::x86_avx512_mask_cvtps2pd_256, 103829}, // __builtin_ia32_cvtps2pd256_mask
   33850       {Intrinsic::x86_avx512_mask_cvtps2pd_512, 103861}, // __builtin_ia32_cvtps2pd512_mask
   33851       {Intrinsic::x86_sse_cvtps2pi, 128914}, // __builtin_ia32_cvtps2pi
   33852       {Intrinsic::x86_avx512_mask_cvtps2qq_128, 103893}, // __builtin_ia32_cvtps2qq128_mask
   33853       {Intrinsic::x86_avx512_mask_cvtps2qq_256, 103925}, // __builtin_ia32_cvtps2qq256_mask
   33854       {Intrinsic::x86_avx512_mask_cvtps2qq_512, 103957}, // __builtin_ia32_cvtps2qq512_mask
   33855       {Intrinsic::x86_avx512_mask_cvtps2udq_128, 103989}, // __builtin_ia32_cvtps2udq128_mask
   33856       {Intrinsic::x86_avx512_mask_cvtps2udq_256, 104022}, // __builtin_ia32_cvtps2udq256_mask
   33857       {Intrinsic::x86_avx512_mask_cvtps2udq_512, 104055}, // __builtin_ia32_cvtps2udq512_mask
   33858       {Intrinsic::x86_avx512_mask_cvtps2uqq_128, 104088}, // __builtin_ia32_cvtps2uqq128_mask
   33859       {Intrinsic::x86_avx512_mask_cvtps2uqq_256, 104121}, // __builtin_ia32_cvtps2uqq256_mask
   33860       {Intrinsic::x86_avx512_mask_cvtps2uqq_512, 104154}, // __builtin_ia32_cvtps2uqq512_mask
   33861       {Intrinsic::x86_avx512_cvtq2mask_128, 99983}, // __builtin_ia32_cvtq2mask128
   33862       {Intrinsic::x86_avx512_cvtq2mask_256, 100011}, // __builtin_ia32_cvtq2mask256
   33863       {Intrinsic::x86_avx512_cvtq2mask_512, 100039}, // __builtin_ia32_cvtq2mask512
   33864       {Intrinsic::x86_avx512_mask_cvtqq2pd_128, 104187}, // __builtin_ia32_cvtqq2pd128_mask
   33865       {Intrinsic::x86_avx512_mask_cvtqq2pd_256, 104219}, // __builtin_ia32_cvtqq2pd256_mask
   33866       {Intrinsic::x86_avx512_mask_cvtqq2pd_512, 104251}, // __builtin_ia32_cvtqq2pd512_mask
   33867       {Intrinsic::x86_avx512_mask_cvtqq2ps_128, 104283}, // __builtin_ia32_cvtqq2ps128_mask
   33868       {Intrinsic::x86_avx512_mask_cvtqq2ps_256, 104315}, // __builtin_ia32_cvtqq2ps256_mask
   33869       {Intrinsic::x86_avx512_mask_cvtqq2ps_512, 104347}, // __builtin_ia32_cvtqq2ps512_mask
   33870       {Intrinsic::x86_sse2_cvtsd2si, 129798}, // __builtin_ia32_cvtsd2si
   33871       {Intrinsic::x86_sse2_cvtsd2si64, 129822}, // __builtin_ia32_cvtsd2si64
   33872       {Intrinsic::x86_sse2_cvtsd2ss, 129848}, // __builtin_ia32_cvtsd2ss
   33873       {Intrinsic::x86_avx512_mask_cvtsd2ss_round, 104379}, // __builtin_ia32_cvtsd2ss_round_mask
   33874       {Intrinsic::x86_avx512_cvtsi2sd64, 100067}, // __builtin_ia32_cvtsi2sd64
   33875       {Intrinsic::x86_avx512_cvtsi2ss32, 100093}, // __builtin_ia32_cvtsi2ss32
   33876       {Intrinsic::x86_avx512_cvtsi2ss64, 100119}, // __builtin_ia32_cvtsi2ss64
   33877       {Intrinsic::x86_avx512_mask_cvtss2sd_round, 104414}, // __builtin_ia32_cvtss2sd_round_mask
   33878       {Intrinsic::x86_sse_cvtss2si, 128938}, // __builtin_ia32_cvtss2si
   33879       {Intrinsic::x86_sse_cvtss2si64, 128962}, // __builtin_ia32_cvtss2si64
   33880       {Intrinsic::x86_sse2_cvttpd2dq, 129872}, // __builtin_ia32_cvttpd2dq
   33881       {Intrinsic::x86_avx512_mask_cvttpd2dq_128, 104449}, // __builtin_ia32_cvttpd2dq128_mask
   33882       {Intrinsic::x86_avx_cvtt_pd2dq_256, 96159}, // __builtin_ia32_cvttpd2dq256
   33883       {Intrinsic::x86_avx512_mask_cvttpd2dq_256, 104482}, // __builtin_ia32_cvttpd2dq256_mask
   33884       {Intrinsic::x86_avx512_mask_cvttpd2dq_512, 104515}, // __builtin_ia32_cvttpd2dq512_mask
   33885       {Intrinsic::x86_sse_cvttpd2pi, 128988}, // __builtin_ia32_cvttpd2pi
   33886       {Intrinsic::x86_avx512_mask_cvttpd2qq_128, 104548}, // __builtin_ia32_cvttpd2qq128_mask
   33887       {Intrinsic::x86_avx512_mask_cvttpd2qq_256, 104581}, // __builtin_ia32_cvttpd2qq256_mask
   33888       {Intrinsic::x86_avx512_mask_cvttpd2qq_512, 104614}, // __builtin_ia32_cvttpd2qq512_mask
   33889       {Intrinsic::x86_avx512_mask_cvttpd2udq_128, 104647}, // __builtin_ia32_cvttpd2udq128_mask
   33890       {Intrinsic::x86_avx512_mask_cvttpd2udq_256, 104681}, // __builtin_ia32_cvttpd2udq256_mask
   33891       {Intrinsic::x86_avx512_mask_cvttpd2udq_512, 104715}, // __builtin_ia32_cvttpd2udq512_mask
   33892       {Intrinsic::x86_avx512_mask_cvttpd2uqq_128, 104749}, // __builtin_ia32_cvttpd2uqq128_mask
   33893       {Intrinsic::x86_avx512_mask_cvttpd2uqq_256, 104783}, // __builtin_ia32_cvttpd2uqq256_mask
   33894       {Intrinsic::x86_avx512_mask_cvttpd2uqq_512, 104817}, // __builtin_ia32_cvttpd2uqq512_mask
   33895       {Intrinsic::x86_sse2_cvttps2dq, 129897}, // __builtin_ia32_cvttps2dq
   33896       {Intrinsic::x86_avx512_mask_cvttps2dq_128, 104851}, // __builtin_ia32_cvttps2dq128_mask
   33897       {Intrinsic::x86_avx_cvtt_ps2dq_256, 96187}, // __builtin_ia32_cvttps2dq256
   33898       {Intrinsic::x86_avx512_mask_cvttps2dq_256, 104884}, // __builtin_ia32_cvttps2dq256_mask
   33899       {Intrinsic::x86_avx512_mask_cvttps2dq_512, 104917}, // __builtin_ia32_cvttps2dq512_mask
   33900       {Intrinsic::x86_sse_cvttps2pi, 129013}, // __builtin_ia32_cvttps2pi
   33901       {Intrinsic::x86_avx512_mask_cvttps2qq_128, 104950}, // __builtin_ia32_cvttps2qq128_mask
   33902       {Intrinsic::x86_avx512_mask_cvttps2qq_256, 104983}, // __builtin_ia32_cvttps2qq256_mask
   33903       {Intrinsic::x86_avx512_mask_cvttps2qq_512, 105016}, // __builtin_ia32_cvttps2qq512_mask
   33904       {Intrinsic::x86_avx512_mask_cvttps2udq_128, 105049}, // __builtin_ia32_cvttps2udq128_mask
   33905       {Intrinsic::x86_avx512_mask_cvttps2udq_256, 105083}, // __builtin_ia32_cvttps2udq256_mask
   33906       {Intrinsic::x86_avx512_mask_cvttps2udq_512, 105117}, // __builtin_ia32_cvttps2udq512_mask
   33907       {Intrinsic::x86_avx512_mask_cvttps2uqq_128, 105151}, // __builtin_ia32_cvttps2uqq128_mask
   33908       {Intrinsic::x86_avx512_mask_cvttps2uqq_256, 105185}, // __builtin_ia32_cvttps2uqq256_mask
   33909       {Intrinsic::x86_avx512_mask_cvttps2uqq_512, 105219}, // __builtin_ia32_cvttps2uqq512_mask
   33910       {Intrinsic::x86_sse2_cvttsd2si, 129922}, // __builtin_ia32_cvttsd2si
   33911       {Intrinsic::x86_sse2_cvttsd2si64, 129947}, // __builtin_ia32_cvttsd2si64
   33912       {Intrinsic::x86_sse_cvttss2si, 129038}, // __builtin_ia32_cvttss2si
   33913       {Intrinsic::x86_sse_cvttss2si64, 129063}, // __builtin_ia32_cvttss2si64
   33914       {Intrinsic::x86_avx512_mask_cvtudq2ps_128, 105253}, // __builtin_ia32_cvtudq2ps128_mask
   33915       {Intrinsic::x86_avx512_mask_cvtudq2ps_256, 105286}, // __builtin_ia32_cvtudq2ps256_mask
   33916       {Intrinsic::x86_avx512_mask_cvtudq2ps_512, 105319}, // __builtin_ia32_cvtudq2ps512_mask
   33917       {Intrinsic::x86_avx512_mask_cvtuqq2pd_128, 105352}, // __builtin_ia32_cvtuqq2pd128_mask
   33918       {Intrinsic::x86_avx512_mask_cvtuqq2pd_256, 105385}, // __builtin_ia32_cvtuqq2pd256_mask
   33919       {Intrinsic::x86_avx512_mask_cvtuqq2pd_512, 105418}, // __builtin_ia32_cvtuqq2pd512_mask
   33920       {Intrinsic::x86_avx512_mask_cvtuqq2ps_128, 105451}, // __builtin_ia32_cvtuqq2ps128_mask
   33921       {Intrinsic::x86_avx512_mask_cvtuqq2ps_256, 105484}, // __builtin_ia32_cvtuqq2ps256_mask
   33922       {Intrinsic::x86_avx512_mask_cvtuqq2ps_512, 105517}, // __builtin_ia32_cvtuqq2ps512_mask
   33923       {Intrinsic::x86_avx512_cvtusi2sd, 100373}, // __builtin_ia32_cvtusi2sd32
   33924       {Intrinsic::x86_avx512_cvtusi642sd, 100427}, // __builtin_ia32_cvtusi2sd64
   33925       {Intrinsic::x86_avx512_cvtusi2ss, 100400}, // __builtin_ia32_cvtusi2ss32
   33926       {Intrinsic::x86_avx512_cvtusi642ss, 100454}, // __builtin_ia32_cvtusi2ss64
   33927       {Intrinsic::x86_avx512_cvtw2mask_128, 100481}, // __builtin_ia32_cvtw2mask128
   33928       {Intrinsic::x86_avx512_cvtw2mask_256, 100509}, // __builtin_ia32_cvtw2mask256
   33929       {Intrinsic::x86_avx512_cvtw2mask_512, 100537}, // __builtin_ia32_cvtw2mask512
   33930       {Intrinsic::x86_avx512_mask_dbpsadbw_128, 105550}, // __builtin_ia32_dbpsadbw128_mask
   33931       {Intrinsic::x86_avx512_mask_dbpsadbw_256, 105582}, // __builtin_ia32_dbpsadbw256_mask
   33932       {Intrinsic::x86_avx512_mask_dbpsadbw_512, 105614}, // __builtin_ia32_dbpsadbw512_mask
   33933       {Intrinsic::x86_avx512_mask_div_pd_512, 105646}, // __builtin_ia32_divpd512_mask
   33934       {Intrinsic::x86_avx512_mask_div_ps_512, 105675}, // __builtin_ia32_divps512_mask
   33935       {Intrinsic::x86_avx512_mask_div_sd_round, 105704}, // __builtin_ia32_divsd_round_mask
   33936       {Intrinsic::x86_avx512_mask_div_ss_round, 105736}, // __builtin_ia32_divss_round_mask
   33937       {Intrinsic::x86_sse41_dppd, 131449}, // __builtin_ia32_dppd
   33938       {Intrinsic::x86_sse41_dpps, 131469}, // __builtin_ia32_dpps
   33939       {Intrinsic::x86_avx_dp_ps_256, 96215}, // __builtin_ia32_dpps256
   33940       {Intrinsic::x86_mmx_emms, 126638}, // __builtin_ia32_emms
   33941       {Intrinsic::x86_avx512_exp2_pd, 100565}, // __builtin_ia32_exp2pd_mask
   33942       {Intrinsic::x86_avx512_exp2_ps, 100592}, // __builtin_ia32_exp2ps_mask
   33943       {Intrinsic::x86_avx512_mask_expand_pd_128, 106296}, // __builtin_ia32_expanddf128_mask
   33944       {Intrinsic::x86_avx512_mask_expand_pd_256, 106328}, // __builtin_ia32_expanddf256_mask
   33945       {Intrinsic::x86_avx512_mask_expand_pd_512, 106360}, // __builtin_ia32_expanddf512_mask
   33946       {Intrinsic::x86_avx512_mask_expand_q_128, 106488}, // __builtin_ia32_expanddi128_mask
   33947       {Intrinsic::x86_avx512_mask_expand_q_256, 106520}, // __builtin_ia32_expanddi256_mask
   33948       {Intrinsic::x86_avx512_mask_expand_q_512, 106552}, // __builtin_ia32_expanddi512_mask
   33949       {Intrinsic::x86_avx512_mask_expand_load_pd_128, 105972}, // __builtin_ia32_expandloaddf128_mask
   33950       {Intrinsic::x86_avx512_mask_expand_load_pd_256, 106008}, // __builtin_ia32_expandloaddf256_mask
   33951       {Intrinsic::x86_avx512_mask_expand_load_pd_512, 106044}, // __builtin_ia32_expandloaddf512_mask
   33952       {Intrinsic::x86_avx512_mask_expand_load_q_128, 106188}, // __builtin_ia32_expandloaddi128_mask
   33953       {Intrinsic::x86_avx512_mask_expand_load_q_256, 106224}, // __builtin_ia32_expandloaddi256_mask
   33954       {Intrinsic::x86_avx512_mask_expand_load_q_512, 106260}, // __builtin_ia32_expandloaddi512_mask
   33955       {Intrinsic::x86_avx512_mask_expand_load_ps_128, 106080}, // __builtin_ia32_expandloadsf128_mask
   33956       {Intrinsic::x86_avx512_mask_expand_load_ps_256, 106116}, // __builtin_ia32_expandloadsf256_mask
   33957       {Intrinsic::x86_avx512_mask_expand_load_ps_512, 106152}, // __builtin_ia32_expandloadsf512_mask
   33958       {Intrinsic::x86_avx512_mask_expand_load_d_128, 105864}, // __builtin_ia32_expandloadsi128_mask
   33959       {Intrinsic::x86_avx512_mask_expand_load_d_256, 105900}, // __builtin_ia32_expandloadsi256_mask
   33960       {Intrinsic::x86_avx512_mask_expand_load_d_512, 105936}, // __builtin_ia32_expandloadsi512_mask
   33961       {Intrinsic::x86_avx512_mask_expand_ps_128, 106392}, // __builtin_ia32_expandsf128_mask
   33962       {Intrinsic::x86_avx512_mask_expand_ps_256, 106424}, // __builtin_ia32_expandsf256_mask
   33963       {Intrinsic::x86_avx512_mask_expand_ps_512, 106456}, // __builtin_ia32_expandsf512_mask
   33964       {Intrinsic::x86_avx512_mask_expand_d_128, 105768}, // __builtin_ia32_expandsi128_mask
   33965       {Intrinsic::x86_avx512_mask_expand_d_256, 105800}, // __builtin_ia32_expandsi256_mask
   33966       {Intrinsic::x86_avx512_mask_expand_d_512, 105832}, // __builtin_ia32_expandsi512_mask
   33967       {Intrinsic::x86_sse4a_extrq, 132313}, // __builtin_ia32_extrq
   33968       {Intrinsic::x86_sse4a_extrqi, 132334}, // __builtin_ia32_extrqi
   33969       {Intrinsic::x86_mmx_femms, 126658}, // __builtin_ia32_femms
   33970       {Intrinsic::x86_avx512_mask_fixupimm_pd_128, 106584}, // __builtin_ia32_fixupimmpd128_mask
   33971       {Intrinsic::x86_avx512_maskz_fixupimm_pd_128, 119679}, // __builtin_ia32_fixupimmpd128_maskz
   33972       {Intrinsic::x86_avx512_mask_fixupimm_pd_256, 106618}, // __builtin_ia32_fixupimmpd256_mask
   33973       {Intrinsic::x86_avx512_maskz_fixupimm_pd_256, 119714}, // __builtin_ia32_fixupimmpd256_maskz
   33974       {Intrinsic::x86_avx512_mask_fixupimm_pd_512, 106652}, // __builtin_ia32_fixupimmpd512_mask
   33975       {Intrinsic::x86_avx512_maskz_fixupimm_pd_512, 119749}, // __builtin_ia32_fixupimmpd512_maskz
   33976       {Intrinsic::x86_avx512_mask_fixupimm_ps_128, 106686}, // __builtin_ia32_fixupimmps128_mask
   33977       {Intrinsic::x86_avx512_maskz_fixupimm_ps_128, 119784}, // __builtin_ia32_fixupimmps128_maskz
   33978       {Intrinsic::x86_avx512_mask_fixupimm_ps_256, 106720}, // __builtin_ia32_fixupimmps256_mask
   33979       {Intrinsic::x86_avx512_maskz_fixupimm_ps_256, 119819}, // __builtin_ia32_fixupimmps256_maskz
   33980       {Intrinsic::x86_avx512_mask_fixupimm_ps_512, 106754}, // __builtin_ia32_fixupimmps512_mask
   33981       {Intrinsic::x86_avx512_maskz_fixupimm_ps_512, 119854}, // __builtin_ia32_fixupimmps512_maskz
   33982       {Intrinsic::x86_avx512_mask_fixupimm_sd, 106788}, // __builtin_ia32_fixupimmsd_mask
   33983       {Intrinsic::x86_avx512_maskz_fixupimm_sd, 119889}, // __builtin_ia32_fixupimmsd_maskz
   33984       {Intrinsic::x86_avx512_mask_fixupimm_ss, 106819}, // __builtin_ia32_fixupimmss_mask
   33985       {Intrinsic::x86_avx512_maskz_fixupimm_ss, 119921}, // __builtin_ia32_fixupimmss_maskz
   33986       {Intrinsic::x86_avx512_mask_fpclass_pd_128, 106850}, // __builtin_ia32_fpclasspd128_mask
   33987       {Intrinsic::x86_avx512_mask_fpclass_pd_256, 106883}, // __builtin_ia32_fpclasspd256_mask
   33988       {Intrinsic::x86_avx512_mask_fpclass_pd_512, 106916}, // __builtin_ia32_fpclasspd512_mask
   33989       {Intrinsic::x86_avx512_mask_fpclass_ps_128, 106949}, // __builtin_ia32_fpclassps128_mask
   33990       {Intrinsic::x86_avx512_mask_fpclass_ps_256, 106982}, // __builtin_ia32_fpclassps256_mask
   33991       {Intrinsic::x86_avx512_mask_fpclass_ps_512, 107015}, // __builtin_ia32_fpclassps512_mask
   33992       {Intrinsic::x86_avx512_mask_fpclass_sd, 107048}, // __builtin_ia32_fpclasssd_mask
   33993       {Intrinsic::x86_avx512_mask_fpclass_ss, 107078}, // __builtin_ia32_fpclassss_mask
   33994       {Intrinsic::x86_fxrstor, 126426}, // __builtin_ia32_fxrstor
   33995       {Intrinsic::x86_fxrstor64, 126449}, // __builtin_ia32_fxrstor64
   33996       {Intrinsic::x86_fxsave, 126474}, // __builtin_ia32_fxsave
   33997       {Intrinsic::x86_fxsave64, 126496}, // __builtin_ia32_fxsave64
   33998       {Intrinsic::x86_avx512_gather3div2_df, 100847}, // __builtin_ia32_gather3div2df
   33999       {Intrinsic::x86_avx512_gather3div2_di, 100876}, // __builtin_ia32_gather3div2di
   34000       {Intrinsic::x86_avx512_gather3div4_df, 100905}, // __builtin_ia32_gather3div4df
   34001       {Intrinsic::x86_avx512_gather3div4_di, 100934}, // __builtin_ia32_gather3div4di
   34002       {Intrinsic::x86_avx512_gather3div4_sf, 100963}, // __builtin_ia32_gather3div4sf
   34003       {Intrinsic::x86_avx512_gather3div4_si, 100992}, // __builtin_ia32_gather3div4si
   34004       {Intrinsic::x86_avx512_gather3div8_sf, 101021}, // __builtin_ia32_gather3div8sf
   34005       {Intrinsic::x86_avx512_gather3div8_si, 101050}, // __builtin_ia32_gather3div8si
   34006       {Intrinsic::x86_avx512_gather3siv2_df, 101079}, // __builtin_ia32_gather3siv2df
   34007       {Intrinsic::x86_avx512_gather3siv2_di, 101108}, // __builtin_ia32_gather3siv2di
   34008       {Intrinsic::x86_avx512_gather3siv4_df, 101137}, // __builtin_ia32_gather3siv4df
   34009       {Intrinsic::x86_avx512_gather3siv4_di, 101166}, // __builtin_ia32_gather3siv4di
   34010       {Intrinsic::x86_avx512_gather3siv4_sf, 101195}, // __builtin_ia32_gather3siv4sf
   34011       {Intrinsic::x86_avx512_gather3siv4_si, 101224}, // __builtin_ia32_gather3siv4si
   34012       {Intrinsic::x86_avx512_gather3siv8_sf, 101253}, // __builtin_ia32_gather3siv8sf
   34013       {Intrinsic::x86_avx512_gather3siv8_si, 101282}, // __builtin_ia32_gather3siv8si
   34014       {Intrinsic::x86_avx2_gather_d_d, 97447}, // __builtin_ia32_gatherd_d
   34015       {Intrinsic::x86_avx2_gather_d_d_256, 97472}, // __builtin_ia32_gatherd_d256
   34016       {Intrinsic::x86_avx2_gather_d_pd, 97500}, // __builtin_ia32_gatherd_pd
   34017       {Intrinsic::x86_avx2_gather_d_pd_256, 97526}, // __builtin_ia32_gatherd_pd256
   34018       {Intrinsic::x86_avx2_gather_d_ps, 97555}, // __builtin_ia32_gatherd_ps
   34019       {Intrinsic::x86_avx2_gather_d_ps_256, 97581}, // __builtin_ia32_gatherd_ps256
   34020       {Intrinsic::x86_avx2_gather_d_q, 97610}, // __builtin_ia32_gatherd_q
   34021       {Intrinsic::x86_avx2_gather_d_q_256, 97635}, // __builtin_ia32_gatherd_q256
   34022       {Intrinsic::x86_avx512_gather_qps_512, 100818}, // __builtin_ia32_gatherdiv16sf
   34023       {Intrinsic::x86_avx512_gather_qpi_512, 100761}, // __builtin_ia32_gatherdiv16si
   34024       {Intrinsic::x86_avx512_gather_qpd_512, 100733}, // __builtin_ia32_gatherdiv8df
   34025       {Intrinsic::x86_avx512_gather_qpq_512, 100790}, // __builtin_ia32_gatherdiv8di
   34026       {Intrinsic::x86_avx512_gatherpf_dpd_512, 101311}, // __builtin_ia32_gatherpfdpd
   34027       {Intrinsic::x86_avx512_gatherpf_dps_512, 101338}, // __builtin_ia32_gatherpfdps
   34028       {Intrinsic::x86_avx512_gatherpf_qpd_512, 101365}, // __builtin_ia32_gatherpfqpd
   34029       {Intrinsic::x86_avx512_gatherpf_qps_512, 101392}, // __builtin_ia32_gatherpfqps
   34030       {Intrinsic::x86_avx2_gather_q_d, 97663}, // __builtin_ia32_gatherq_d
   34031       {Intrinsic::x86_avx2_gather_q_d_256, 97688}, // __builtin_ia32_gatherq_d256
   34032       {Intrinsic::x86_avx2_gather_q_pd, 97716}, // __builtin_ia32_gatherq_pd
   34033       {Intrinsic::x86_avx2_gather_q_pd_256, 97742}, // __builtin_ia32_gatherq_pd256
   34034       {Intrinsic::x86_avx2_gather_q_ps, 97771}, // __builtin_ia32_gatherq_ps
   34035       {Intrinsic::x86_avx2_gather_q_ps_256, 97797}, // __builtin_ia32_gatherq_ps256
   34036       {Intrinsic::x86_avx2_gather_q_q, 97826}, // __builtin_ia32_gatherq_q
   34037       {Intrinsic::x86_avx2_gather_q_q_256, 97851}, // __builtin_ia32_gatherq_q256
   34038       {Intrinsic::x86_avx512_gather_dps_512, 100704}, // __builtin_ia32_gathersiv16sf
   34039       {Intrinsic::x86_avx512_gather_dpi_512, 100647}, // __builtin_ia32_gathersiv16si
   34040       {Intrinsic::x86_avx512_gather_dpd_512, 100619}, // __builtin_ia32_gathersiv8df
   34041       {Intrinsic::x86_avx512_gather_dpq_512, 100676}, // __builtin_ia32_gathersiv8di
   34042       {Intrinsic::x86_avx512_mask_getexp_pd_128, 107108}, // __builtin_ia32_getexppd128_mask
   34043       {Intrinsic::x86_avx512_mask_getexp_pd_256, 107140}, // __builtin_ia32_getexppd256_mask
   34044       {Intrinsic::x86_avx512_mask_getexp_pd_512, 107172}, // __builtin_ia32_getexppd512_mask
   34045       {Intrinsic::x86_avx512_mask_getexp_ps_128, 107204}, // __builtin_ia32_getexpps128_mask
   34046       {Intrinsic::x86_avx512_mask_getexp_ps_256, 107236}, // __builtin_ia32_getexpps256_mask
   34047       {Intrinsic::x86_avx512_mask_getexp_ps_512, 107268}, // __builtin_ia32_getexpps512_mask
   34048       {Intrinsic::x86_avx512_mask_getexp_sd, 107300}, // __builtin_ia32_getexpsd128_round_mask
   34049       {Intrinsic::x86_avx512_mask_getexp_ss, 107338}, // __builtin_ia32_getexpss128_round_mask
   34050       {Intrinsic::x86_avx512_mask_getmant_pd_128, 107376}, // __builtin_ia32_getmantpd128_mask
   34051       {Intrinsic::x86_avx512_mask_getmant_pd_256, 107409}, // __builtin_ia32_getmantpd256_mask
   34052       {Intrinsic::x86_avx512_mask_getmant_pd_512, 107442}, // __builtin_ia32_getmantpd512_mask
   34053       {Intrinsic::x86_avx512_mask_getmant_ps_128, 107475}, // __builtin_ia32_getmantps128_mask
   34054       {Intrinsic::x86_avx512_mask_getmant_ps_256, 107508}, // __builtin_ia32_getmantps256_mask
   34055       {Intrinsic::x86_avx512_mask_getmant_ps_512, 107541}, // __builtin_ia32_getmantps512_mask
   34056       {Intrinsic::x86_avx512_mask_getmant_sd, 107574}, // __builtin_ia32_getmantsd_round_mask
   34057       {Intrinsic::x86_avx512_mask_getmant_ss, 107610}, // __builtin_ia32_getmantss_round_mask
   34058       {Intrinsic::x86_sse3_hadd_pd, 131248}, // __builtin_ia32_haddpd
   34059       {Intrinsic::x86_avx_hadd_pd_256, 96238}, // __builtin_ia32_haddpd256
   34060       {Intrinsic::x86_sse3_hadd_ps, 131270}, // __builtin_ia32_haddps
   34061       {Intrinsic::x86_avx_hadd_ps_256, 96263}, // __builtin_ia32_haddps256
   34062       {Intrinsic::x86_sse3_hsub_pd, 131292}, // __builtin_ia32_hsubpd
   34063       {Intrinsic::x86_avx_hsub_pd_256, 96288}, // __builtin_ia32_hsubpd256
   34064       {Intrinsic::x86_sse3_hsub_ps, 131314}, // __builtin_ia32_hsubps
   34065       {Intrinsic::x86_avx_hsub_ps_256, 96313}, // __builtin_ia32_hsubps256
   34066       {Intrinsic::x86_sse41_insertps, 131489}, // __builtin_ia32_insertps128
   34067       {Intrinsic::x86_sse4a_insertq, 132356}, // __builtin_ia32_insertq
   34068       {Intrinsic::x86_sse4a_insertqi, 132379}, // __builtin_ia32_insertqi
   34069       {Intrinsic::x86_avx512_kand_w, 101419}, // __builtin_ia32_kandhi
   34070       {Intrinsic::x86_avx512_kandn_w, 101441}, // __builtin_ia32_kandnhi
   34071       {Intrinsic::x86_avx512_knot_w, 101464}, // __builtin_ia32_knothi
   34072       {Intrinsic::x86_avx512_kor_w, 101486}, // __builtin_ia32_korhi
   34073       {Intrinsic::x86_avx512_kortestc_w, 101507}, // __builtin_ia32_kortestchi
   34074       {Intrinsic::x86_avx512_kortestz_w, 101533}, // __builtin_ia32_kortestzhi
   34075       {Intrinsic::x86_avx512_kunpck_dq, 101583}, // __builtin_ia32_kunpckdi
   34076       {Intrinsic::x86_avx512_kunpck_bw, 101559}, // __builtin_ia32_kunpckhi
   34077       {Intrinsic::x86_avx512_kunpck_wd, 101607}, // __builtin_ia32_kunpcksi
   34078       {Intrinsic::x86_avx512_kxnor_w, 101631}, // __builtin_ia32_kxnorhi
   34079       {Intrinsic::x86_avx512_kxor_w, 101654}, // __builtin_ia32_kxorhi
   34080       {Intrinsic::x86_sse3_ldu_dq, 131336}, // __builtin_ia32_lddqu
   34081       {Intrinsic::x86_avx_ldu_dq_256, 96338}, // __builtin_ia32_lddqu256
   34082       {Intrinsic::x86_sse2_lfence, 129974}, // __builtin_ia32_lfence
   34083       {Intrinsic::x86_llwpcb, 126520}, // __builtin_ia32_llwpcb
   34084       {Intrinsic::x86_lwpins32, 126542}, // __builtin_ia32_lwpins32
   34085       {Intrinsic::x86_lwpins64, 126566}, // __builtin_ia32_lwpins64
   34086       {Intrinsic::x86_lwpval32, 126590}, // __builtin_ia32_lwpval32
   34087       {Intrinsic::x86_lwpval64, 126614}, // __builtin_ia32_lwpval64
   34088       {Intrinsic::x86_avx2_maskload_d, 97879}, // __builtin_ia32_maskloadd
   34089       {Intrinsic::x86_avx2_maskload_d_256, 97904}, // __builtin_ia32_maskloadd256
   34090       {Intrinsic::x86_avx_maskload_pd, 96362}, // __builtin_ia32_maskloadpd
   34091       {Intrinsic::x86_avx_maskload_pd_256, 96388}, // __builtin_ia32_maskloadpd256
   34092       {Intrinsic::x86_avx_maskload_ps, 96417}, // __builtin_ia32_maskloadps
   34093       {Intrinsic::x86_avx_maskload_ps_256, 96443}, // __builtin_ia32_maskloadps256
   34094       {Intrinsic::x86_avx2_maskload_q, 97932}, // __builtin_ia32_maskloadq
   34095       {Intrinsic::x86_avx2_maskload_q_256, 97957}, // __builtin_ia32_maskloadq256
   34096       {Intrinsic::x86_sse2_maskmov_dqu, 129996}, // __builtin_ia32_maskmovdqu
   34097       {Intrinsic::x86_mmx_maskmovq, 126679}, // __builtin_ia32_maskmovq
   34098       {Intrinsic::x86_avx2_maskstore_d, 97985}, // __builtin_ia32_maskstored
   34099       {Intrinsic::x86_avx2_maskstore_d_256, 98011}, // __builtin_ia32_maskstored256
   34100       {Intrinsic::x86_avx_maskstore_pd, 96472}, // __builtin_ia32_maskstorepd
   34101       {Intrinsic::x86_avx_maskstore_pd_256, 96499}, // __builtin_ia32_maskstorepd256
   34102       {Intrinsic::x86_avx_maskstore_ps, 96529}, // __builtin_ia32_maskstoreps
   34103       {Intrinsic::x86_avx_maskstore_ps_256, 96556}, // __builtin_ia32_maskstoreps256
   34104       {Intrinsic::x86_avx2_maskstore_q, 98040}, // __builtin_ia32_maskstoreq
   34105       {Intrinsic::x86_avx2_maskstore_q_256, 98066}, // __builtin_ia32_maskstoreq256
   34106       {Intrinsic::x86_sse2_max_pd, 130022}, // __builtin_ia32_maxpd
   34107       {Intrinsic::x86_avx_max_pd_256, 96586}, // __builtin_ia32_maxpd256
   34108       {Intrinsic::x86_avx512_mask_max_pd_512, 107646}, // __builtin_ia32_maxpd512_mask
   34109       {Intrinsic::x86_sse_max_ps, 129090}, // __builtin_ia32_maxps
   34110       {Intrinsic::x86_avx_max_ps_256, 96610}, // __builtin_ia32_maxps256
   34111       {Intrinsic::x86_avx512_mask_max_ps_512, 107675}, // __builtin_ia32_maxps512_mask
   34112       {Intrinsic::x86_sse2_max_sd, 130043}, // __builtin_ia32_maxsd
   34113       {Intrinsic::x86_avx512_mask_max_sd_round, 107704}, // __builtin_ia32_maxsd_round_mask
   34114       {Intrinsic::x86_sse_max_ss, 129111}, // __builtin_ia32_maxss
   34115       {Intrinsic::x86_avx512_mask_max_ss_round, 107736}, // __builtin_ia32_maxss_round_mask
   34116       {Intrinsic::x86_sse2_mfence, 130064}, // __builtin_ia32_mfence
   34117       {Intrinsic::x86_sse2_min_pd, 130086}, // __builtin_ia32_minpd
   34118       {Intrinsic::x86_avx_min_pd_256, 96634}, // __builtin_ia32_minpd256
   34119       {Intrinsic::x86_avx512_mask_min_pd_512, 107768}, // __builtin_ia32_minpd512_mask
   34120       {Intrinsic::x86_sse_min_ps, 129132}, // __builtin_ia32_minps
   34121       {Intrinsic::x86_avx_min_ps_256, 96658}, // __builtin_ia32_minps256
   34122       {Intrinsic::x86_avx512_mask_min_ps_512, 107797}, // __builtin_ia32_minps512_mask
   34123       {Intrinsic::x86_sse2_min_sd, 130107}, // __builtin_ia32_minsd
   34124       {Intrinsic::x86_avx512_mask_min_sd_round, 107826}, // __builtin_ia32_minsd_round_mask
   34125       {Intrinsic::x86_sse_min_ss, 129153}, // __builtin_ia32_minss
   34126       {Intrinsic::x86_avx512_mask_min_ss_round, 107858}, // __builtin_ia32_minss_round_mask
   34127       {Intrinsic::x86_sse3_monitor, 131357}, // __builtin_ia32_monitor
   34128       {Intrinsic::x86_monitorx, 128225}, // __builtin_ia32_monitorx
   34129       {Intrinsic::x86_sse2_movmsk_pd, 130128}, // __builtin_ia32_movmskpd
   34130       {Intrinsic::x86_avx_movmsk_pd_256, 96682}, // __builtin_ia32_movmskpd256
   34131       {Intrinsic::x86_sse_movmsk_ps, 129174}, // __builtin_ia32_movmskps
   34132       {Intrinsic::x86_avx_movmsk_ps_256, 96709}, // __builtin_ia32_movmskps256
   34133       {Intrinsic::x86_mmx_movnt_dq, 126703}, // __builtin_ia32_movntq
   34134       {Intrinsic::x86_sse41_mpsadbw, 131516}, // __builtin_ia32_mpsadbw128
   34135       {Intrinsic::x86_avx2_mpsadbw, 98095}, // __builtin_ia32_mpsadbw256
   34136       {Intrinsic::x86_avx512_mask_mul_pd_512, 107890}, // __builtin_ia32_mulpd512_mask
   34137       {Intrinsic::x86_avx512_mask_mul_ps_512, 107919}, // __builtin_ia32_mulps512_mask
   34138       {Intrinsic::x86_avx512_mask_mul_sd_round, 107948}, // __builtin_ia32_mulsd_round_mask
   34139       {Intrinsic::x86_avx512_mask_mul_ss_round, 107980}, // __builtin_ia32_mulss_round_mask
   34140       {Intrinsic::x86_sse3_mwait, 131380}, // __builtin_ia32_mwait
   34141       {Intrinsic::x86_mwaitx, 128249}, // __builtin_ia32_mwaitx
   34142       {Intrinsic::x86_ssse3_pabs_b, 132403}, // __builtin_ia32_pabsb
   34143       {Intrinsic::x86_ssse3_pabs_d, 132424}, // __builtin_ia32_pabsd
   34144       {Intrinsic::x86_ssse3_pabs_w, 132445}, // __builtin_ia32_pabsw
   34145       {Intrinsic::x86_mmx_packssdw, 126725}, // __builtin_ia32_packssdw
   34146       {Intrinsic::x86_sse2_packssdw_128, 130152}, // __builtin_ia32_packssdw128
   34147       {Intrinsic::x86_avx2_packssdw, 98121}, // __builtin_ia32_packssdw256
   34148       {Intrinsic::x86_avx512_packssdw_512, 121509}, // __builtin_ia32_packssdw512
   34149       {Intrinsic::x86_mmx_packsswb, 126749}, // __builtin_ia32_packsswb
   34150       {Intrinsic::x86_sse2_packsswb_128, 130179}, // __builtin_ia32_packsswb128
   34151       {Intrinsic::x86_avx2_packsswb, 98148}, // __builtin_ia32_packsswb256
   34152       {Intrinsic::x86_avx512_packsswb_512, 121536}, // __builtin_ia32_packsswb512
   34153       {Intrinsic::x86_sse41_packusdw, 131542}, // __builtin_ia32_packusdw128
   34154       {Intrinsic::x86_avx2_packusdw, 98175}, // __builtin_ia32_packusdw256
   34155       {Intrinsic::x86_avx512_packusdw_512, 121563}, // __builtin_ia32_packusdw512
   34156       {Intrinsic::x86_mmx_packuswb, 126773}, // __builtin_ia32_packuswb
   34157       {Intrinsic::x86_sse2_packuswb_128, 130206}, // __builtin_ia32_packuswb128
   34158       {Intrinsic::x86_avx2_packuswb, 98202}, // __builtin_ia32_packuswb256
   34159       {Intrinsic::x86_avx512_packuswb_512, 121590}, // __builtin_ia32_packuswb512
   34160       {Intrinsic::x86_mmx_padd_b, 126797}, // __builtin_ia32_paddb
   34161       {Intrinsic::x86_mmx_padd_d, 126818}, // __builtin_ia32_paddd
   34162       {Intrinsic::x86_mmx_padd_q, 126839}, // __builtin_ia32_paddq
   34163       {Intrinsic::x86_mmx_padds_b, 126881}, // __builtin_ia32_paddsb
   34164       {Intrinsic::x86_sse2_padds_b, 130233}, // __builtin_ia32_paddsb128
   34165       {Intrinsic::x86_avx512_mask_padds_b_128, 108012}, // __builtin_ia32_paddsb128_mask
   34166       {Intrinsic::x86_avx2_padds_b, 98229}, // __builtin_ia32_paddsb256
   34167       {Intrinsic::x86_avx512_mask_padds_b_256, 108042}, // __builtin_ia32_paddsb256_mask
   34168       {Intrinsic::x86_avx512_mask_padds_b_512, 108072}, // __builtin_ia32_paddsb512_mask
   34169       {Intrinsic::x86_mmx_padds_w, 126903}, // __builtin_ia32_paddsw
   34170       {Intrinsic::x86_sse2_padds_w, 130258}, // __builtin_ia32_paddsw128
   34171       {Intrinsic::x86_avx512_mask_padds_w_128, 108102}, // __builtin_ia32_paddsw128_mask
   34172       {Intrinsic::x86_avx2_padds_w, 98254}, // __builtin_ia32_paddsw256
   34173       {Intrinsic::x86_avx512_mask_padds_w_256, 108132}, // __builtin_ia32_paddsw256_mask
   34174       {Intrinsic::x86_avx512_mask_padds_w_512, 108162}, // __builtin_ia32_paddsw512_mask
   34175       {Intrinsic::x86_mmx_paddus_b, 126925}, // __builtin_ia32_paddusb
   34176       {Intrinsic::x86_sse2_paddus_b, 130283}, // __builtin_ia32_paddusb128
   34177       {Intrinsic::x86_avx512_mask_paddus_b_128, 108192}, // __builtin_ia32_paddusb128_mask
   34178       {Intrinsic::x86_avx2_paddus_b, 98279}, // __builtin_ia32_paddusb256
   34179       {Intrinsic::x86_avx512_mask_paddus_b_256, 108223}, // __builtin_ia32_paddusb256_mask
   34180       {Intrinsic::x86_avx512_mask_paddus_b_512, 108254}, // __builtin_ia32_paddusb512_mask
   34181       {Intrinsic::x86_mmx_paddus_w, 126948}, // __builtin_ia32_paddusw
   34182       {Intrinsic::x86_sse2_paddus_w, 130309}, // __builtin_ia32_paddusw128
   34183       {Intrinsic::x86_avx512_mask_paddus_w_128, 108285}, // __builtin_ia32_paddusw128_mask
   34184       {Intrinsic::x86_avx2_paddus_w, 98305}, // __builtin_ia32_paddusw256
   34185       {Intrinsic::x86_avx512_mask_paddus_w_256, 108316}, // __builtin_ia32_paddusw256_mask
   34186       {Intrinsic::x86_avx512_mask_paddus_w_512, 108347}, // __builtin_ia32_paddusw512_mask
   34187       {Intrinsic::x86_mmx_padd_w, 126860}, // __builtin_ia32_paddw
   34188       {Intrinsic::x86_mmx_palignr_b, 126971}, // __builtin_ia32_palignr
   34189       {Intrinsic::x86_mmx_pand, 126994}, // __builtin_ia32_pand
   34190       {Intrinsic::x86_mmx_pandn, 127014}, // __builtin_ia32_pandn
   34191       {Intrinsic::x86_sse2_pause, 130335}, // __builtin_ia32_pause
   34192       {Intrinsic::x86_mmx_pavg_b, 127035}, // __builtin_ia32_pavgb
   34193       {Intrinsic::x86_3dnow_pavgusb, 95154}, // __builtin_ia32_pavgusb
   34194       {Intrinsic::x86_mmx_pavg_w, 127056}, // __builtin_ia32_pavgw
   34195       {Intrinsic::x86_sse41_pblendvb, 131569}, // __builtin_ia32_pblendvb128
   34196       {Intrinsic::x86_avx2_pblendvb, 98331}, // __builtin_ia32_pblendvb256
   34197       {Intrinsic::x86_pclmulqdq, 128271}, // __builtin_ia32_pclmulqdq128
   34198       {Intrinsic::x86_mmx_pcmpeq_b, 127077}, // __builtin_ia32_pcmpeqb
   34199       {Intrinsic::x86_mmx_pcmpeq_d, 127100}, // __builtin_ia32_pcmpeqd
   34200       {Intrinsic::x86_mmx_pcmpeq_w, 127123}, // __builtin_ia32_pcmpeqw
   34201       {Intrinsic::x86_sse42_pcmpestri128, 131911}, // __builtin_ia32_pcmpestri128
   34202       {Intrinsic::x86_sse42_pcmpestria128, 131939}, // __builtin_ia32_pcmpestria128
   34203       {Intrinsic::x86_sse42_pcmpestric128, 131968}, // __builtin_ia32_pcmpestric128
   34204       {Intrinsic::x86_sse42_pcmpestrio128, 131997}, // __builtin_ia32_pcmpestrio128
   34205       {Intrinsic::x86_sse42_pcmpestris128, 132026}, // __builtin_ia32_pcmpestris128
   34206       {Intrinsic::x86_sse42_pcmpestriz128, 132055}, // __builtin_ia32_pcmpestriz128
   34207       {Intrinsic::x86_sse42_pcmpestrm128, 132084}, // __builtin_ia32_pcmpestrm128
   34208       {Intrinsic::x86_mmx_pcmpgt_b, 127146}, // __builtin_ia32_pcmpgtb
   34209       {Intrinsic::x86_mmx_pcmpgt_d, 127169}, // __builtin_ia32_pcmpgtd
   34210       {Intrinsic::x86_mmx_pcmpgt_w, 127192}, // __builtin_ia32_pcmpgtw
   34211       {Intrinsic::x86_sse42_pcmpistri128, 132112}, // __builtin_ia32_pcmpistri128
   34212       {Intrinsic::x86_sse42_pcmpistria128, 132140}, // __builtin_ia32_pcmpistria128
   34213       {Intrinsic::x86_sse42_pcmpistric128, 132169}, // __builtin_ia32_pcmpistric128
   34214       {Intrinsic::x86_sse42_pcmpistrio128, 132198}, // __builtin_ia32_pcmpistrio128
   34215       {Intrinsic::x86_sse42_pcmpistris128, 132227}, // __builtin_ia32_pcmpistris128
   34216       {Intrinsic::x86_sse42_pcmpistriz128, 132256}, // __builtin_ia32_pcmpistriz128
   34217       {Intrinsic::x86_sse42_pcmpistrm128, 132285}, // __builtin_ia32_pcmpistrm128
   34218       {Intrinsic::x86_bmi_pdep_64, 125327}, // __builtin_ia32_pdep_di
   34219       {Intrinsic::x86_bmi_pdep_32, 125304}, // __builtin_ia32_pdep_si
   34220       {Intrinsic::x86_avx512_mask_permvar_df_256, 108378}, // __builtin_ia32_permvardf256_mask
   34221       {Intrinsic::x86_avx512_mask_permvar_df_512, 108411}, // __builtin_ia32_permvardf512_mask
   34222       {Intrinsic::x86_avx512_mask_permvar_di_256, 108444}, // __builtin_ia32_permvardi256_mask
   34223       {Intrinsic::x86_avx512_mask_permvar_di_512, 108477}, // __builtin_ia32_permvardi512_mask
   34224       {Intrinsic::x86_avx512_mask_permvar_hi_128, 108510}, // __builtin_ia32_permvarhi128_mask
   34225       {Intrinsic::x86_avx512_mask_permvar_hi_256, 108543}, // __builtin_ia32_permvarhi256_mask
   34226       {Intrinsic::x86_avx512_mask_permvar_hi_512, 108576}, // __builtin_ia32_permvarhi512_mask
   34227       {Intrinsic::x86_avx512_mask_permvar_qi_128, 108609}, // __builtin_ia32_permvarqi128_mask
   34228       {Intrinsic::x86_avx512_mask_permvar_qi_256, 108642}, // __builtin_ia32_permvarqi256_mask
   34229       {Intrinsic::x86_avx512_mask_permvar_qi_512, 108675}, // __builtin_ia32_permvarqi512_mask
   34230       {Intrinsic::x86_avx2_permps, 98386}, // __builtin_ia32_permvarsf256
   34231       {Intrinsic::x86_avx512_mask_permvar_sf_256, 108708}, // __builtin_ia32_permvarsf256_mask
   34232       {Intrinsic::x86_avx512_mask_permvar_sf_512, 108741}, // __builtin_ia32_permvarsf512_mask
   34233       {Intrinsic::x86_avx2_permd, 98358}, // __builtin_ia32_permvarsi256
   34234       {Intrinsic::x86_avx512_mask_permvar_si_256, 108774}, // __builtin_ia32_permvarsi256_mask
   34235       {Intrinsic::x86_avx512_mask_permvar_si_512, 108807}, // __builtin_ia32_permvarsi512_mask
   34236       {Intrinsic::x86_bmi_pext_64, 125373}, // __builtin_ia32_pext_di
   34237       {Intrinsic::x86_bmi_pext_32, 125350}, // __builtin_ia32_pext_si
   34238       {Intrinsic::x86_3dnow_pf2id, 95177}, // __builtin_ia32_pf2id
   34239       {Intrinsic::x86_3dnowa_pf2iw, 95575}, // __builtin_ia32_pf2iw
   34240       {Intrinsic::x86_3dnow_pfacc, 95198}, // __builtin_ia32_pfacc
   34241       {Intrinsic::x86_3dnow_pfadd, 95219}, // __builtin_ia32_pfadd
   34242       {Intrinsic::x86_3dnow_pfcmpeq, 95240}, // __builtin_ia32_pfcmpeq
   34243       {Intrinsic::x86_3dnow_pfcmpge, 95263}, // __builtin_ia32_pfcmpge
   34244       {Intrinsic::x86_3dnow_pfcmpgt, 95286}, // __builtin_ia32_pfcmpgt
   34245       {Intrinsic::x86_3dnow_pfmax, 95309}, // __builtin_ia32_pfmax
   34246       {Intrinsic::x86_3dnow_pfmin, 95330}, // __builtin_ia32_pfmin
   34247       {Intrinsic::x86_3dnow_pfmul, 95351}, // __builtin_ia32_pfmul
   34248       {Intrinsic::x86_3dnowa_pfnacc, 95596}, // __builtin_ia32_pfnacc
   34249       {Intrinsic::x86_3dnowa_pfpnacc, 95618}, // __builtin_ia32_pfpnacc
   34250       {Intrinsic::x86_3dnow_pfrcp, 95372}, // __builtin_ia32_pfrcp
   34251       {Intrinsic::x86_3dnow_pfrcpit1, 95393}, // __builtin_ia32_pfrcpit1
   34252       {Intrinsic::x86_3dnow_pfrcpit2, 95417}, // __builtin_ia32_pfrcpit2
   34253       {Intrinsic::x86_3dnow_pfrsqit1, 95441}, // __builtin_ia32_pfrsqit1
   34254       {Intrinsic::x86_3dnow_pfrsqrt, 95465}, // __builtin_ia32_pfrsqrt
   34255       {Intrinsic::x86_3dnow_pfsub, 95488}, // __builtin_ia32_pfsub
   34256       {Intrinsic::x86_3dnow_pfsubr, 95509}, // __builtin_ia32_pfsubr
   34257       {Intrinsic::x86_ssse3_phadd_d, 132466}, // __builtin_ia32_phaddd
   34258       {Intrinsic::x86_ssse3_phadd_d_128, 132488}, // __builtin_ia32_phaddd128
   34259       {Intrinsic::x86_avx2_phadd_d, 98414}, // __builtin_ia32_phaddd256
   34260       {Intrinsic::x86_ssse3_phadd_sw, 132513}, // __builtin_ia32_phaddsw
   34261       {Intrinsic::x86_ssse3_phadd_sw_128, 132536}, // __builtin_ia32_phaddsw128
   34262       {Intrinsic::x86_avx2_phadd_sw, 98439}, // __builtin_ia32_phaddsw256
   34263       {Intrinsic::x86_ssse3_phadd_w, 132562}, // __builtin_ia32_phaddw
   34264       {Intrinsic::x86_ssse3_phadd_w_128, 132584}, // __builtin_ia32_phaddw128
   34265       {Intrinsic::x86_avx2_phadd_w, 98465}, // __builtin_ia32_phaddw256
   34266       {Intrinsic::x86_sse41_phminposuw, 131596}, // __builtin_ia32_phminposuw128
   34267       {Intrinsic::x86_ssse3_phsub_d, 132609}, // __builtin_ia32_phsubd
   34268       {Intrinsic::x86_ssse3_phsub_d_128, 132631}, // __builtin_ia32_phsubd128
   34269       {Intrinsic::x86_avx2_phsub_d, 98490}, // __builtin_ia32_phsubd256
   34270       {Intrinsic::x86_ssse3_phsub_sw, 132656}, // __builtin_ia32_phsubsw
   34271       {Intrinsic::x86_ssse3_phsub_sw_128, 132679}, // __builtin_ia32_phsubsw128
   34272       {Intrinsic::x86_avx2_phsub_sw, 98515}, // __builtin_ia32_phsubsw256
   34273       {Intrinsic::x86_ssse3_phsub_w, 132705}, // __builtin_ia32_phsubw
   34274       {Intrinsic::x86_ssse3_phsub_w_128, 132727}, // __builtin_ia32_phsubw128
   34275       {Intrinsic::x86_avx2_phsub_w, 98541}, // __builtin_ia32_phsubw256
   34276       {Intrinsic::x86_3dnow_pi2fd, 95531}, // __builtin_ia32_pi2fd
   34277       {Intrinsic::x86_3dnowa_pi2fw, 95641}, // __builtin_ia32_pi2fw
   34278       {Intrinsic::x86_ssse3_pmadd_ub_sw, 132752}, // __builtin_ia32_pmaddubsw
   34279       {Intrinsic::x86_ssse3_pmadd_ub_sw_128, 132777}, // __builtin_ia32_pmaddubsw128
   34280       {Intrinsic::x86_avx512_mask_pmaddubs_w_128, 108840}, // __builtin_ia32_pmaddubsw128_mask
   34281       {Intrinsic::x86_avx2_pmadd_ub_sw, 98566}, // __builtin_ia32_pmaddubsw256
   34282       {Intrinsic::x86_avx512_mask_pmaddubs_w_256, 108873}, // __builtin_ia32_pmaddubsw256_mask
   34283       {Intrinsic::x86_avx512_mask_pmaddubs_w_512, 108906}, // __builtin_ia32_pmaddubsw512_mask
   34284       {Intrinsic::x86_mmx_pmadd_wd, 127271}, // __builtin_ia32_pmaddwd
   34285       {Intrinsic::x86_sse2_pmadd_wd, 130356}, // __builtin_ia32_pmaddwd128
   34286       {Intrinsic::x86_avx512_mask_pmaddw_d_128, 108939}, // __builtin_ia32_pmaddwd128_mask
   34287       {Intrinsic::x86_avx2_pmadd_wd, 98594}, // __builtin_ia32_pmaddwd256
   34288       {Intrinsic::x86_avx512_mask_pmaddw_d_256, 108970}, // __builtin_ia32_pmaddwd256_mask
   34289       {Intrinsic::x86_avx512_mask_pmaddw_d_512, 109001}, // __builtin_ia32_pmaddwd512_mask
   34290       {Intrinsic::x86_mmx_pmaxs_w, 127294}, // __builtin_ia32_pmaxsw
   34291       {Intrinsic::x86_mmx_pmaxu_b, 127316}, // __builtin_ia32_pmaxub
   34292       {Intrinsic::x86_mmx_pmins_w, 127338}, // __builtin_ia32_pminsw
   34293       {Intrinsic::x86_mmx_pminu_b, 127360}, // __builtin_ia32_pminub
   34294       {Intrinsic::x86_avx512_mask_pmov_db_128, 109032}, // __builtin_ia32_pmovdb128_mask
   34295       {Intrinsic::x86_avx512_mask_pmov_db_mem_128, 109122}, // __builtin_ia32_pmovdb128mem_mask
   34296       {Intrinsic::x86_avx512_mask_pmov_db_256, 109062}, // __builtin_ia32_pmovdb256_mask
   34297       {Intrinsic::x86_avx512_mask_pmov_db_mem_256, 109155}, // __builtin_ia32_pmovdb256mem_mask
   34298       {Intrinsic::x86_avx512_mask_pmov_db_512, 109092}, // __builtin_ia32_pmovdb512_mask
   34299       {Intrinsic::x86_avx512_mask_pmov_db_mem_512, 109188}, // __builtin_ia32_pmovdb512mem_mask
   34300       {Intrinsic::x86_avx512_mask_pmov_dw_128, 109221}, // __builtin_ia32_pmovdw128_mask
   34301       {Intrinsic::x86_avx512_mask_pmov_dw_mem_128, 109311}, // __builtin_ia32_pmovdw128mem_mask
   34302       {Intrinsic::x86_avx512_mask_pmov_dw_256, 109251}, // __builtin_ia32_pmovdw256_mask
   34303       {Intrinsic::x86_avx512_mask_pmov_dw_mem_256, 109344}, // __builtin_ia32_pmovdw256mem_mask
   34304       {Intrinsic::x86_avx512_mask_pmov_dw_512, 109281}, // __builtin_ia32_pmovdw512_mask
   34305       {Intrinsic::x86_avx512_mask_pmov_dw_mem_512, 109377}, // __builtin_ia32_pmovdw512mem_mask
   34306       {Intrinsic::x86_mmx_pmovmskb, 127382}, // __builtin_ia32_pmovmskb
   34307       {Intrinsic::x86_sse2_pmovmskb_128, 130382}, // __builtin_ia32_pmovmskb128
   34308       {Intrinsic::x86_avx2_pmovmskb, 98620}, // __builtin_ia32_pmovmskb256
   34309       {Intrinsic::x86_avx512_mask_pmov_qb_128, 109410}, // __builtin_ia32_pmovqb128_mask
   34310       {Intrinsic::x86_avx512_mask_pmov_qb_mem_128, 109500}, // __builtin_ia32_pmovqb128mem_mask
   34311       {Intrinsic::x86_avx512_mask_pmov_qb_256, 109440}, // __builtin_ia32_pmovqb256_mask
   34312       {Intrinsic::x86_avx512_mask_pmov_qb_mem_256, 109533}, // __builtin_ia32_pmovqb256mem_mask
   34313       {Intrinsic::x86_avx512_mask_pmov_qb_512, 109470}, // __builtin_ia32_pmovqb512_mask
   34314       {Intrinsic::x86_avx512_mask_pmov_qb_mem_512, 109566}, // __builtin_ia32_pmovqb512mem_mask
   34315       {Intrinsic::x86_avx512_mask_pmov_qd_128, 109599}, // __builtin_ia32_pmovqd128_mask
   34316       {Intrinsic::x86_avx512_mask_pmov_qd_mem_128, 109689}, // __builtin_ia32_pmovqd128mem_mask
   34317       {Intrinsic::x86_avx512_mask_pmov_qd_256, 109629}, // __builtin_ia32_pmovqd256_mask
   34318       {Intrinsic::x86_avx512_mask_pmov_qd_mem_256, 109722}, // __builtin_ia32_pmovqd256mem_mask
   34319       {Intrinsic::x86_avx512_mask_pmov_qd_512, 109659}, // __builtin_ia32_pmovqd512_mask
   34320       {Intrinsic::x86_avx512_mask_pmov_qd_mem_512, 109755}, // __builtin_ia32_pmovqd512mem_mask
   34321       {Intrinsic::x86_avx512_mask_pmov_qw_128, 109788}, // __builtin_ia32_pmovqw128_mask
   34322       {Intrinsic::x86_avx512_mask_pmov_qw_mem_128, 109878}, // __builtin_ia32_pmovqw128mem_mask
   34323       {Intrinsic::x86_avx512_mask_pmov_qw_256, 109818}, // __builtin_ia32_pmovqw256_mask
   34324       {Intrinsic::x86_avx512_mask_pmov_qw_mem_256, 109911}, // __builtin_ia32_pmovqw256mem_mask
   34325       {Intrinsic::x86_avx512_mask_pmov_qw_512, 109848}, // __builtin_ia32_pmovqw512_mask
   34326       {Intrinsic::x86_avx512_mask_pmov_qw_mem_512, 109944}, // __builtin_ia32_pmovqw512mem_mask
   34327       {Intrinsic::x86_avx512_mask_pmovs_db_128, 110166}, // __builtin_ia32_pmovsdb128_mask
   34328       {Intrinsic::x86_avx512_mask_pmovs_db_mem_128, 110259}, // __builtin_ia32_pmovsdb128mem_mask
   34329       {Intrinsic::x86_avx512_mask_pmovs_db_256, 110197}, // __builtin_ia32_pmovsdb256_mask
   34330       {Intrinsic::x86_avx512_mask_pmovs_db_mem_256, 110293}, // __builtin_ia32_pmovsdb256mem_mask
   34331       {Intrinsic::x86_avx512_mask_pmovs_db_512, 110228}, // __builtin_ia32_pmovsdb512_mask
   34332       {Intrinsic::x86_avx512_mask_pmovs_db_mem_512, 110327}, // __builtin_ia32_pmovsdb512mem_mask
   34333       {Intrinsic::x86_avx512_mask_pmovs_dw_128, 110361}, // __builtin_ia32_pmovsdw128_mask
   34334       {Intrinsic::x86_avx512_mask_pmovs_dw_mem_128, 110454}, // __builtin_ia32_pmovsdw128mem_mask
   34335       {Intrinsic::x86_avx512_mask_pmovs_dw_256, 110392}, // __builtin_ia32_pmovsdw256_mask
   34336       {Intrinsic::x86_avx512_mask_pmovs_dw_mem_256, 110488}, // __builtin_ia32_pmovsdw256mem_mask
   34337       {Intrinsic::x86_avx512_mask_pmovs_dw_512, 110423}, // __builtin_ia32_pmovsdw512_mask
   34338       {Intrinsic::x86_avx512_mask_pmovs_dw_mem_512, 110522}, // __builtin_ia32_pmovsdw512mem_mask
   34339       {Intrinsic::x86_avx512_mask_pmovs_qb_128, 110556}, // __builtin_ia32_pmovsqb128_mask
   34340       {Intrinsic::x86_avx512_mask_pmovs_qb_mem_128, 110649}, // __builtin_ia32_pmovsqb128mem_mask
   34341       {Intrinsic::x86_avx512_mask_pmovs_qb_256, 110587}, // __builtin_ia32_pmovsqb256_mask
   34342       {Intrinsic::x86_avx512_mask_pmovs_qb_mem_256, 110683}, // __builtin_ia32_pmovsqb256mem_mask
   34343       {Intrinsic::x86_avx512_mask_pmovs_qb_512, 110618}, // __builtin_ia32_pmovsqb512_mask
   34344       {Intrinsic::x86_avx512_mask_pmovs_qb_mem_512, 110717}, // __builtin_ia32_pmovsqb512mem_mask
   34345       {Intrinsic::x86_avx512_mask_pmovs_qd_128, 110751}, // __builtin_ia32_pmovsqd128_mask
   34346       {Intrinsic::x86_avx512_mask_pmovs_qd_mem_128, 110844}, // __builtin_ia32_pmovsqd128mem_mask
   34347       {Intrinsic::x86_avx512_mask_pmovs_qd_256, 110782}, // __builtin_ia32_pmovsqd256_mask
   34348       {Intrinsic::x86_avx512_mask_pmovs_qd_mem_256, 110878}, // __builtin_ia32_pmovsqd256mem_mask
   34349       {Intrinsic::x86_avx512_mask_pmovs_qd_512, 110813}, // __builtin_ia32_pmovsqd512_mask
   34350       {Intrinsic::x86_avx512_mask_pmovs_qd_mem_512, 110912}, // __builtin_ia32_pmovsqd512mem_mask
   34351       {Intrinsic::x86_avx512_mask_pmovs_qw_128, 110946}, // __builtin_ia32_pmovsqw128_mask
   34352       {Intrinsic::x86_avx512_mask_pmovs_qw_mem_128, 111039}, // __builtin_ia32_pmovsqw128mem_mask
   34353       {Intrinsic::x86_avx512_mask_pmovs_qw_256, 110977}, // __builtin_ia32_pmovsqw256_mask
   34354       {Intrinsic::x86_avx512_mask_pmovs_qw_mem_256, 111073}, // __builtin_ia32_pmovsqw256mem_mask
   34355       {Intrinsic::x86_avx512_mask_pmovs_qw_512, 111008}, // __builtin_ia32_pmovsqw512_mask
   34356       {Intrinsic::x86_avx512_mask_pmovs_qw_mem_512, 111107}, // __builtin_ia32_pmovsqw512mem_mask
   34357       {Intrinsic::x86_avx512_mask_pmovs_wb_128, 111141}, // __builtin_ia32_pmovswb128_mask
   34358       {Intrinsic::x86_avx512_mask_pmovs_wb_mem_128, 111234}, // __builtin_ia32_pmovswb128mem_mask
   34359       {Intrinsic::x86_avx512_mask_pmovs_wb_256, 111172}, // __builtin_ia32_pmovswb256_mask
   34360       {Intrinsic::x86_avx512_mask_pmovs_wb_mem_256, 111268}, // __builtin_ia32_pmovswb256mem_mask
   34361       {Intrinsic::x86_avx512_mask_pmovs_wb_512, 111203}, // __builtin_ia32_pmovswb512_mask
   34362       {Intrinsic::x86_avx512_mask_pmovs_wb_mem_512, 111302}, // __builtin_ia32_pmovswb512mem_mask
   34363       {Intrinsic::x86_avx512_mask_pmovus_db_128, 111336}, // __builtin_ia32_pmovusdb128_mask
   34364       {Intrinsic::x86_avx512_mask_pmovus_db_mem_128, 111432}, // __builtin_ia32_pmovusdb128mem_mask
   34365       {Intrinsic::x86_avx512_mask_pmovus_db_256, 111368}, // __builtin_ia32_pmovusdb256_mask
   34366       {Intrinsic::x86_avx512_mask_pmovus_db_mem_256, 111467}, // __builtin_ia32_pmovusdb256mem_mask
   34367       {Intrinsic::x86_avx512_mask_pmovus_db_512, 111400}, // __builtin_ia32_pmovusdb512_mask
   34368       {Intrinsic::x86_avx512_mask_pmovus_db_mem_512, 111502}, // __builtin_ia32_pmovusdb512mem_mask
   34369       {Intrinsic::x86_avx512_mask_pmovus_dw_128, 111537}, // __builtin_ia32_pmovusdw128_mask
   34370       {Intrinsic::x86_avx512_mask_pmovus_dw_mem_128, 111633}, // __builtin_ia32_pmovusdw128mem_mask
   34371       {Intrinsic::x86_avx512_mask_pmovus_dw_256, 111569}, // __builtin_ia32_pmovusdw256_mask
   34372       {Intrinsic::x86_avx512_mask_pmovus_dw_mem_256, 111668}, // __builtin_ia32_pmovusdw256mem_mask
   34373       {Intrinsic::x86_avx512_mask_pmovus_dw_512, 111601}, // __builtin_ia32_pmovusdw512_mask
   34374       {Intrinsic::x86_avx512_mask_pmovus_dw_mem_512, 111703}, // __builtin_ia32_pmovusdw512mem_mask
   34375       {Intrinsic::x86_avx512_mask_pmovus_qb_128, 111738}, // __builtin_ia32_pmovusqb128_mask
   34376       {Intrinsic::x86_avx512_mask_pmovus_qb_mem_128, 111834}, // __builtin_ia32_pmovusqb128mem_mask
   34377       {Intrinsic::x86_avx512_mask_pmovus_qb_256, 111770}, // __builtin_ia32_pmovusqb256_mask
   34378       {Intrinsic::x86_avx512_mask_pmovus_qb_mem_256, 111869}, // __builtin_ia32_pmovusqb256mem_mask
   34379       {Intrinsic::x86_avx512_mask_pmovus_qb_512, 111802}, // __builtin_ia32_pmovusqb512_mask
   34380       {Intrinsic::x86_avx512_mask_pmovus_qb_mem_512, 111904}, // __builtin_ia32_pmovusqb512mem_mask
   34381       {Intrinsic::x86_avx512_mask_pmovus_qd_128, 111939}, // __builtin_ia32_pmovusqd128_mask
   34382       {Intrinsic::x86_avx512_mask_pmovus_qd_mem_128, 112035}, // __builtin_ia32_pmovusqd128mem_mask
   34383       {Intrinsic::x86_avx512_mask_pmovus_qd_256, 111971}, // __builtin_ia32_pmovusqd256_mask
   34384       {Intrinsic::x86_avx512_mask_pmovus_qd_mem_256, 112070}, // __builtin_ia32_pmovusqd256mem_mask
   34385       {Intrinsic::x86_avx512_mask_pmovus_qd_512, 112003}, // __builtin_ia32_pmovusqd512_mask
   34386       {Intrinsic::x86_avx512_mask_pmovus_qd_mem_512, 112105}, // __builtin_ia32_pmovusqd512mem_mask
   34387       {Intrinsic::x86_avx512_mask_pmovus_qw_128, 112140}, // __builtin_ia32_pmovusqw128_mask
   34388       {Intrinsic::x86_avx512_mask_pmovus_qw_mem_128, 112236}, // __builtin_ia32_pmovusqw128mem_mask
   34389       {Intrinsic::x86_avx512_mask_pmovus_qw_256, 112172}, // __builtin_ia32_pmovusqw256_mask
   34390       {Intrinsic::x86_avx512_mask_pmovus_qw_mem_256, 112271}, // __builtin_ia32_pmovusqw256mem_mask
   34391       {Intrinsic::x86_avx512_mask_pmovus_qw_512, 112204}, // __builtin_ia32_pmovusqw512_mask
   34392       {Intrinsic::x86_avx512_mask_pmovus_qw_mem_512, 112306}, // __builtin_ia32_pmovusqw512mem_mask
   34393       {Intrinsic::x86_avx512_mask_pmovus_wb_128, 112341}, // __builtin_ia32_pmovuswb128_mask
   34394       {Intrinsic::x86_avx512_mask_pmovus_wb_mem_128, 112437}, // __builtin_ia32_pmovuswb128mem_mask
   34395       {Intrinsic::x86_avx512_mask_pmovus_wb_256, 112373}, // __builtin_ia32_pmovuswb256_mask
   34396       {Intrinsic::x86_avx512_mask_pmovus_wb_mem_256, 112472}, // __builtin_ia32_pmovuswb256mem_mask
   34397       {Intrinsic::x86_avx512_mask_pmovus_wb_512, 112405}, // __builtin_ia32_pmovuswb512_mask
   34398       {Intrinsic::x86_avx512_mask_pmovus_wb_mem_512, 112507}, // __builtin_ia32_pmovuswb512mem_mask
   34399       {Intrinsic::x86_avx512_mask_pmov_wb_128, 109977}, // __builtin_ia32_pmovwb128_mask
   34400       {Intrinsic::x86_avx512_mask_pmov_wb_mem_128, 110067}, // __builtin_ia32_pmovwb128mem_mask
   34401       {Intrinsic::x86_avx512_mask_pmov_wb_256, 110007}, // __builtin_ia32_pmovwb256_mask
   34402       {Intrinsic::x86_avx512_mask_pmov_wb_mem_256, 110100}, // __builtin_ia32_pmovwb256mem_mask
   34403       {Intrinsic::x86_avx512_mask_pmov_wb_512, 110037}, // __builtin_ia32_pmovwb512_mask
   34404       {Intrinsic::x86_avx512_mask_pmov_wb_mem_512, 110133}, // __builtin_ia32_pmovwb512mem_mask
   34405       {Intrinsic::x86_sse41_pmuldq, 131625}, // __builtin_ia32_pmuldq128
   34406       {Intrinsic::x86_avx2_pmul_dq, 98647}, // __builtin_ia32_pmuldq256
   34407       {Intrinsic::x86_avx512_pmul_dq_512, 121617}, // __builtin_ia32_pmuldq512
   34408       {Intrinsic::x86_ssse3_pmul_hr_sw, 132805}, // __builtin_ia32_pmulhrsw
   34409       {Intrinsic::x86_ssse3_pmul_hr_sw_128, 132829}, // __builtin_ia32_pmulhrsw128
   34410       {Intrinsic::x86_avx512_mask_pmul_hr_sw_128, 112542}, // __builtin_ia32_pmulhrsw128_mask
   34411       {Intrinsic::x86_avx2_pmul_hr_sw, 98672}, // __builtin_ia32_pmulhrsw256
   34412       {Intrinsic::x86_avx512_mask_pmul_hr_sw_256, 112574}, // __builtin_ia32_pmulhrsw256_mask
   34413       {Intrinsic::x86_avx512_mask_pmul_hr_sw_512, 112606}, // __builtin_ia32_pmulhrsw512_mask
   34414       {Intrinsic::x86_3dnow_pmulhrw, 95552}, // __builtin_ia32_pmulhrw
   34415       {Intrinsic::x86_mmx_pmulhu_w, 127428}, // __builtin_ia32_pmulhuw
   34416       {Intrinsic::x86_sse2_pmulhu_w, 130434}, // __builtin_ia32_pmulhuw128
   34417       {Intrinsic::x86_avx512_mask_pmulhu_w_128, 112728}, // __builtin_ia32_pmulhuw128_mask
   34418       {Intrinsic::x86_avx2_pmulhu_w, 98724}, // __builtin_ia32_pmulhuw256
   34419       {Intrinsic::x86_avx512_mask_pmulhu_w_256, 112759}, // __builtin_ia32_pmulhuw256_mask
   34420       {Intrinsic::x86_avx512_mask_pmulhu_w_512, 112790}, // __builtin_ia32_pmulhuw512_mask
   34421       {Intrinsic::x86_mmx_pmulh_w, 127406}, // __builtin_ia32_pmulhw
   34422       {Intrinsic::x86_sse2_pmulh_w, 130409}, // __builtin_ia32_pmulhw128
   34423       {Intrinsic::x86_avx512_mask_pmulh_w_128, 112638}, // __builtin_ia32_pmulhw128_mask
   34424       {Intrinsic::x86_avx2_pmulh_w, 98699}, // __builtin_ia32_pmulhw256
   34425       {Intrinsic::x86_avx512_mask_pmulh_w_256, 112668}, // __builtin_ia32_pmulhw256_mask
   34426       {Intrinsic::x86_avx512_mask_pmulh_w_512, 112698}, // __builtin_ia32_pmulhw512_mask
   34427       {Intrinsic::x86_mmx_pmull_w, 127451}, // __builtin_ia32_pmullw
   34428       {Intrinsic::x86_mmx_pmulu_dq, 127473}, // __builtin_ia32_pmuludq
   34429       {Intrinsic::x86_sse2_pmulu_dq, 130460}, // __builtin_ia32_pmuludq128
   34430       {Intrinsic::x86_avx2_pmulu_dq, 98750}, // __builtin_ia32_pmuludq256
   34431       {Intrinsic::x86_avx512_pmulu_dq_512, 121642}, // __builtin_ia32_pmuludq512
   34432       {Intrinsic::x86_mmx_por, 127496}, // __builtin_ia32_por
   34433       {Intrinsic::x86_avx512_mask_prol_d_128, 112935}, // __builtin_ia32_prold128_mask
   34434       {Intrinsic::x86_avx512_mask_prol_d_256, 112964}, // __builtin_ia32_prold256_mask
   34435       {Intrinsic::x86_avx512_mask_prol_d_512, 112993}, // __builtin_ia32_prold512_mask
   34436       {Intrinsic::x86_avx512_mask_prol_q_128, 113022}, // __builtin_ia32_prolq128_mask
   34437       {Intrinsic::x86_avx512_mask_prol_q_256, 113051}, // __builtin_ia32_prolq256_mask
   34438       {Intrinsic::x86_avx512_mask_prol_q_512, 113080}, // __builtin_ia32_prolq512_mask
   34439       {Intrinsic::x86_avx512_mask_prolv_d_128, 113109}, // __builtin_ia32_prolvd128_mask
   34440       {Intrinsic::x86_avx512_mask_prolv_d_256, 113139}, // __builtin_ia32_prolvd256_mask
   34441       {Intrinsic::x86_avx512_mask_prolv_d_512, 113169}, // __builtin_ia32_prolvd512_mask
   34442       {Intrinsic::x86_avx512_mask_prolv_q_128, 113199}, // __builtin_ia32_prolvq128_mask
   34443       {Intrinsic::x86_avx512_mask_prolv_q_256, 113229}, // __builtin_ia32_prolvq256_mask
   34444       {Intrinsic::x86_avx512_mask_prolv_q_512, 113259}, // __builtin_ia32_prolvq512_mask
   34445       {Intrinsic::x86_avx512_mask_pror_d_128, 113289}, // __builtin_ia32_prord128_mask
   34446       {Intrinsic::x86_avx512_mask_pror_d_256, 113318}, // __builtin_ia32_prord256_mask
   34447       {Intrinsic::x86_avx512_mask_pror_d_512, 113347}, // __builtin_ia32_prord512_mask
   34448       {Intrinsic::x86_avx512_mask_pror_q_128, 113376}, // __builtin_ia32_prorq128_mask
   34449       {Intrinsic::x86_avx512_mask_pror_q_256, 113405}, // __builtin_ia32_prorq256_mask
   34450       {Intrinsic::x86_avx512_mask_pror_q_512, 113434}, // __builtin_ia32_prorq512_mask
   34451       {Intrinsic::x86_avx512_mask_prorv_d_128, 113463}, // __builtin_ia32_prorvd128_mask
   34452       {Intrinsic::x86_avx512_mask_prorv_d_256, 113493}, // __builtin_ia32_prorvd256_mask
   34453       {Intrinsic::x86_avx512_mask_prorv_d_512, 113523}, // __builtin_ia32_prorvd512_mask
   34454       {Intrinsic::x86_avx512_mask_prorv_q_128, 113553}, // __builtin_ia32_prorvq128_mask
   34455       {Intrinsic::x86_avx512_mask_prorv_q_256, 113583}, // __builtin_ia32_prorvq256_mask
   34456       {Intrinsic::x86_avx512_mask_prorv_q_512, 113613}, // __builtin_ia32_prorvq512_mask
   34457       {Intrinsic::x86_mmx_psad_bw, 127515}, // __builtin_ia32_psadbw
   34458       {Intrinsic::x86_sse2_psad_bw, 130486}, // __builtin_ia32_psadbw128
   34459       {Intrinsic::x86_avx2_psad_bw, 98776}, // __builtin_ia32_psadbw256
   34460       {Intrinsic::x86_avx512_psad_bw_512, 121668}, // __builtin_ia32_psadbw512
   34461       {Intrinsic::x86_ssse3_pshuf_b, 132856}, // __builtin_ia32_pshufb
   34462       {Intrinsic::x86_ssse3_pshuf_b_128, 132878}, // __builtin_ia32_pshufb128
   34463       {Intrinsic::x86_avx2_pshuf_b, 98801}, // __builtin_ia32_pshufb256
   34464       {Intrinsic::x86_avx512_pshuf_b_512, 121693}, // __builtin_ia32_pshufb512
   34465       {Intrinsic::x86_sse_pshuf_w, 129198}, // __builtin_ia32_pshufw
   34466       {Intrinsic::x86_ssse3_psign_b, 132903}, // __builtin_ia32_psignb
   34467       {Intrinsic::x86_ssse3_psign_b_128, 132925}, // __builtin_ia32_psignb128
   34468       {Intrinsic::x86_avx2_psign_b, 98826}, // __builtin_ia32_psignb256
   34469       {Intrinsic::x86_ssse3_psign_d, 132950}, // __builtin_ia32_psignd
   34470       {Intrinsic::x86_ssse3_psign_d_128, 132972}, // __builtin_ia32_psignd128
   34471       {Intrinsic::x86_avx2_psign_d, 98851}, // __builtin_ia32_psignd256
   34472       {Intrinsic::x86_ssse3_psign_w, 132997}, // __builtin_ia32_psignw
   34473       {Intrinsic::x86_ssse3_psign_w_128, 133019}, // __builtin_ia32_psignw128
   34474       {Intrinsic::x86_avx2_psign_w, 98876}, // __builtin_ia32_psignw256
   34475       {Intrinsic::x86_mmx_psll_d, 127537}, // __builtin_ia32_pslld
   34476       {Intrinsic::x86_sse2_psll_d, 130511}, // __builtin_ia32_pslld128
   34477       {Intrinsic::x86_avx2_psll_d, 98901}, // __builtin_ia32_pslld256
   34478       {Intrinsic::x86_avx512_psll_d_512, 121718}, // __builtin_ia32_pslld512
   34479       {Intrinsic::x86_mmx_pslli_d, 127600}, // __builtin_ia32_pslldi
   34480       {Intrinsic::x86_sse2_pslli_d, 130583}, // __builtin_ia32_pslldi128
   34481       {Intrinsic::x86_avx2_pslli_d, 98973}, // __builtin_ia32_pslldi256
   34482       {Intrinsic::x86_avx512_pslli_d_512, 121790}, // __builtin_ia32_pslldi512
   34483       {Intrinsic::x86_mmx_psll_q, 127558}, // __builtin_ia32_psllq
   34484       {Intrinsic::x86_sse2_psll_q, 130535}, // __builtin_ia32_psllq128
   34485       {Intrinsic::x86_avx2_psll_q, 98925}, // __builtin_ia32_psllq256
   34486       {Intrinsic::x86_avx512_psll_q_512, 121742}, // __builtin_ia32_psllq512
   34487       {Intrinsic::x86_mmx_pslli_q, 127622}, // __builtin_ia32_psllqi
   34488       {Intrinsic::x86_sse2_pslli_q, 130608}, // __builtin_ia32_psllqi128
   34489       {Intrinsic::x86_avx2_pslli_q, 98998}, // __builtin_ia32_psllqi256
   34490       {Intrinsic::x86_avx512_pslli_q_512, 121815}, // __builtin_ia32_psllqi512
   34491       {Intrinsic::x86_avx512_psllv_w_256, 121938}, // __builtin_ia32_psllv16hi
   34492       {Intrinsic::x86_avx512_psllv_d_512, 121865}, // __builtin_ia32_psllv16si
   34493       {Intrinsic::x86_avx2_psllv_q, 99096}, // __builtin_ia32_psllv2di
   34494       {Intrinsic::x86_avx512_psllv_w_512, 121963}, // __builtin_ia32_psllv32hi
   34495       {Intrinsic::x86_avx2_psllv_q_256, 99120}, // __builtin_ia32_psllv4di
   34496       {Intrinsic::x86_avx2_psllv_d, 99048}, // __builtin_ia32_psllv4si
   34497       {Intrinsic::x86_avx512_psllv_q_512, 121890}, // __builtin_ia32_psllv8di
   34498       {Intrinsic::x86_avx512_psllv_w_128, 121914}, // __builtin_ia32_psllv8hi
   34499       {Intrinsic::x86_avx2_psllv_d_256, 99072}, // __builtin_ia32_psllv8si
   34500       {Intrinsic::x86_mmx_psll_w, 127579}, // __builtin_ia32_psllw
   34501       {Intrinsic::x86_sse2_psll_w, 130559}, // __builtin_ia32_psllw128
   34502       {Intrinsic::x86_avx2_psll_w, 98949}, // __builtin_ia32_psllw256
   34503       {Intrinsic::x86_avx512_psll_w_512, 121766}, // __builtin_ia32_psllw512
   34504       {Intrinsic::x86_mmx_pslli_w, 127644}, // __builtin_ia32_psllwi
   34505       {Intrinsic::x86_sse2_pslli_w, 130633}, // __builtin_ia32_psllwi128
   34506       {Intrinsic::x86_avx2_pslli_w, 99023}, // __builtin_ia32_psllwi256
   34507       {Intrinsic::x86_avx512_pslli_w_512, 121840}, // __builtin_ia32_psllwi512
   34508       {Intrinsic::x86_mmx_psra_d, 127666}, // __builtin_ia32_psrad
   34509       {Intrinsic::x86_sse2_psra_d, 130658}, // __builtin_ia32_psrad128
   34510       {Intrinsic::x86_avx2_psra_d, 99144}, // __builtin_ia32_psrad256
   34511       {Intrinsic::x86_avx512_psra_d_512, 121988}, // __builtin_ia32_psrad512
   34512       {Intrinsic::x86_mmx_psrai_d, 127708}, // __builtin_ia32_psradi
   34513       {Intrinsic::x86_sse2_psrai_d, 130706}, // __builtin_ia32_psradi128
   34514       {Intrinsic::x86_avx2_psrai_d, 99192}, // __builtin_ia32_psradi256
   34515       {Intrinsic::x86_avx512_psrai_d_512, 122108}, // __builtin_ia32_psradi512
   34516       {Intrinsic::x86_avx512_psra_q_128, 122012}, // __builtin_ia32_psraq128
   34517       {Intrinsic::x86_avx512_psra_q_256, 122036}, // __builtin_ia32_psraq256
   34518       {Intrinsic::x86_avx512_psra_q_512, 122060}, // __builtin_ia32_psraq512
   34519       {Intrinsic::x86_avx512_psrai_q_128, 122133}, // __builtin_ia32_psraqi128
   34520       {Intrinsic::x86_avx512_psrai_q_256, 122158}, // __builtin_ia32_psraqi256
   34521       {Intrinsic::x86_avx512_psrai_q_512, 122183}, // __builtin_ia32_psraqi512
   34522       {Intrinsic::x86_avx512_psrav_w_256, 122356}, // __builtin_ia32_psrav16hi
   34523       {Intrinsic::x86_avx512_psrav_d_512, 122233}, // __builtin_ia32_psrav16si
   34524       {Intrinsic::x86_avx512_psrav_w_512, 122381}, // __builtin_ia32_psrav32hi
   34525       {Intrinsic::x86_avx2_psrav_d, 99242}, // __builtin_ia32_psrav4si
   34526       {Intrinsic::x86_avx512_psrav_q_512, 122308}, // __builtin_ia32_psrav8di
   34527       {Intrinsic::x86_avx512_psrav_w_128, 122332}, // __builtin_ia32_psrav8hi
   34528       {Intrinsic::x86_avx2_psrav_d_256, 99266}, // __builtin_ia32_psrav8si
   34529       {Intrinsic::x86_avx512_psrav_q_128, 122258}, // __builtin_ia32_psravq128
   34530       {Intrinsic::x86_avx512_psrav_q_256, 122283}, // __builtin_ia32_psravq256
   34531       {Intrinsic::x86_mmx_psra_w, 127687}, // __builtin_ia32_psraw
   34532       {Intrinsic::x86_sse2_psra_w, 130682}, // __builtin_ia32_psraw128
   34533       {Intrinsic::x86_avx2_psra_w, 99168}, // __builtin_ia32_psraw256
   34534       {Intrinsic::x86_avx512_psra_w_512, 122084}, // __builtin_ia32_psraw512
   34535       {Intrinsic::x86_mmx_psrai_w, 127730}, // __builtin_ia32_psrawi
   34536       {Intrinsic::x86_sse2_psrai_w, 130731}, // __builtin_ia32_psrawi128
   34537       {Intrinsic::x86_avx2_psrai_w, 99217}, // __builtin_ia32_psrawi256
   34538       {Intrinsic::x86_avx512_psrai_w_512, 122208}, // __builtin_ia32_psrawi512
   34539       {Intrinsic::x86_mmx_psrl_d, 127752}, // __builtin_ia32_psrld
   34540       {Intrinsic::x86_sse2_psrl_d, 130756}, // __builtin_ia32_psrld128
   34541       {Intrinsic::x86_avx2_psrl_d, 99290}, // __builtin_ia32_psrld256
   34542       {Intrinsic::x86_avx512_psrl_d_512, 122406}, // __builtin_ia32_psrld512
   34543       {Intrinsic::x86_mmx_psrli_d, 127815}, // __builtin_ia32_psrldi
   34544       {Intrinsic::x86_sse2_psrli_d, 130828}, // __builtin_ia32_psrldi128
   34545       {Intrinsic::x86_avx2_psrli_d, 99362}, // __builtin_ia32_psrldi256
   34546       {Intrinsic::x86_avx512_psrli_d_512, 122478}, // __builtin_ia32_psrldi512
   34547       {Intrinsic::x86_mmx_psrl_q, 127773}, // __builtin_ia32_psrlq
   34548       {Intrinsic::x86_sse2_psrl_q, 130780}, // __builtin_ia32_psrlq128
   34549       {Intrinsic::x86_avx2_psrl_q, 99314}, // __builtin_ia32_psrlq256
   34550       {Intrinsic::x86_avx512_psrl_q_512, 122430}, // __builtin_ia32_psrlq512
   34551       {Intrinsic::x86_mmx_psrli_q, 127837}, // __builtin_ia32_psrlqi
   34552       {Intrinsic::x86_sse2_psrli_q, 130853}, // __builtin_ia32_psrlqi128
   34553       {Intrinsic::x86_avx2_psrli_q, 99387}, // __builtin_ia32_psrlqi256
   34554       {Intrinsic::x86_avx512_psrli_q_512, 122503}, // __builtin_ia32_psrlqi512
   34555       {Intrinsic::x86_avx512_psrlv_w_256, 122626}, // __builtin_ia32_psrlv16hi
   34556       {Intrinsic::x86_avx512_psrlv_d_512, 122553}, // __builtin_ia32_psrlv16si
   34557       {Intrinsic::x86_avx2_psrlv_q, 99485}, // __builtin_ia32_psrlv2di
   34558       {Intrinsic::x86_avx512_psrlv_w_512, 122651}, // __builtin_ia32_psrlv32hi
   34559       {Intrinsic::x86_avx2_psrlv_q_256, 99509}, // __builtin_ia32_psrlv4di
   34560       {Intrinsic::x86_avx2_psrlv_d, 99437}, // __builtin_ia32_psrlv4si
   34561       {Intrinsic::x86_avx512_psrlv_q_512, 122578}, // __builtin_ia32_psrlv8di
   34562       {Intrinsic::x86_avx512_psrlv_w_128, 122602}, // __builtin_ia32_psrlv8hi
   34563       {Intrinsic::x86_avx2_psrlv_d_256, 99461}, // __builtin_ia32_psrlv8si
   34564       {Intrinsic::x86_mmx_psrl_w, 127794}, // __builtin_ia32_psrlw
   34565       {Intrinsic::x86_sse2_psrl_w, 130804}, // __builtin_ia32_psrlw128
   34566       {Intrinsic::x86_avx2_psrl_w, 99338}, // __builtin_ia32_psrlw256
   34567       {Intrinsic::x86_avx512_psrl_w_512, 122454}, // __builtin_ia32_psrlw512
   34568       {Intrinsic::x86_mmx_psrli_w, 127859}, // __builtin_ia32_psrlwi
   34569       {Intrinsic::x86_sse2_psrli_w, 130878}, // __builtin_ia32_psrlwi128
   34570       {Intrinsic::x86_avx2_psrli_w, 99412}, // __builtin_ia32_psrlwi256
   34571       {Intrinsic::x86_avx512_psrli_w_512, 122528}, // __builtin_ia32_psrlwi512
   34572       {Intrinsic::x86_mmx_psub_b, 127881}, // __builtin_ia32_psubb
   34573       {Intrinsic::x86_mmx_psub_d, 127902}, // __builtin_ia32_psubd
   34574       {Intrinsic::x86_mmx_psub_q, 127923}, // __builtin_ia32_psubq
   34575       {Intrinsic::x86_mmx_psubs_b, 127965}, // __builtin_ia32_psubsb
   34576       {Intrinsic::x86_sse2_psubs_b, 130903}, // __builtin_ia32_psubsb128
   34577       {Intrinsic::x86_avx512_mask_psubs_b_128, 113643}, // __builtin_ia32_psubsb128_mask
   34578       {Intrinsic::x86_avx2_psubs_b, 99533}, // __builtin_ia32_psubsb256
   34579       {Intrinsic::x86_avx512_mask_psubs_b_256, 113673}, // __builtin_ia32_psubsb256_mask
   34580       {Intrinsic::x86_avx512_mask_psubs_b_512, 113703}, // __builtin_ia32_psubsb512_mask
   34581       {Intrinsic::x86_mmx_psubs_w, 127987}, // __builtin_ia32_psubsw
   34582       {Intrinsic::x86_sse2_psubs_w, 130928}, // __builtin_ia32_psubsw128
   34583       {Intrinsic::x86_avx512_mask_psubs_w_128, 113733}, // __builtin_ia32_psubsw128_mask
   34584       {Intrinsic::x86_avx2_psubs_w, 99558}, // __builtin_ia32_psubsw256
   34585       {Intrinsic::x86_avx512_mask_psubs_w_256, 113763}, // __builtin_ia32_psubsw256_mask
   34586       {Intrinsic::x86_avx512_mask_psubs_w_512, 113793}, // __builtin_ia32_psubsw512_mask
   34587       {Intrinsic::x86_mmx_psubus_b, 128009}, // __builtin_ia32_psubusb
   34588       {Intrinsic::x86_sse2_psubus_b, 130953}, // __builtin_ia32_psubusb128
   34589       {Intrinsic::x86_avx512_mask_psubus_b_128, 113823}, // __builtin_ia32_psubusb128_mask
   34590       {Intrinsic::x86_avx2_psubus_b, 99583}, // __builtin_ia32_psubusb256
   34591       {Intrinsic::x86_avx512_mask_psubus_b_256, 113854}, // __builtin_ia32_psubusb256_mask
   34592       {Intrinsic::x86_avx512_mask_psubus_b_512, 113885}, // __builtin_ia32_psubusb512_mask
   34593       {Intrinsic::x86_mmx_psubus_w, 128032}, // __builtin_ia32_psubusw
   34594       {Intrinsic::x86_sse2_psubus_w, 130979}, // __builtin_ia32_psubusw128
   34595       {Intrinsic::x86_avx512_mask_psubus_w_128, 113916}, // __builtin_ia32_psubusw128_mask
   34596       {Intrinsic::x86_avx2_psubus_w, 99609}, // __builtin_ia32_psubusw256
   34597       {Intrinsic::x86_avx512_mask_psubus_w_256, 113947}, // __builtin_ia32_psubusw256_mask
   34598       {Intrinsic::x86_avx512_mask_psubus_w_512, 113978}, // __builtin_ia32_psubusw512_mask
   34599       {Intrinsic::x86_mmx_psub_w, 127944}, // __builtin_ia32_psubw
   34600       {Intrinsic::x86_avx512_mask_pternlog_d_128, 114009}, // __builtin_ia32_pternlogd128_mask
   34601       {Intrinsic::x86_avx512_maskz_pternlog_d_128, 119953}, // __builtin_ia32_pternlogd128_maskz
   34602       {Intrinsic::x86_avx512_mask_pternlog_d_256, 114042}, // __builtin_ia32_pternlogd256_mask
   34603       {Intrinsic::x86_avx512_maskz_pternlog_d_256, 119987}, // __builtin_ia32_pternlogd256_maskz
   34604       {Intrinsic::x86_avx512_mask_pternlog_d_512, 114075}, // __builtin_ia32_pternlogd512_mask
   34605       {Intrinsic::x86_avx512_maskz_pternlog_d_512, 120021}, // __builtin_ia32_pternlogd512_maskz
   34606       {Intrinsic::x86_avx512_mask_pternlog_q_128, 114108}, // __builtin_ia32_pternlogq128_mask
   34607       {Intrinsic::x86_avx512_maskz_pternlog_q_128, 120055}, // __builtin_ia32_pternlogq128_maskz
   34608       {Intrinsic::x86_avx512_mask_pternlog_q_256, 114141}, // __builtin_ia32_pternlogq256_mask
   34609       {Intrinsic::x86_avx512_maskz_pternlog_q_256, 120089}, // __builtin_ia32_pternlogq256_maskz
   34610       {Intrinsic::x86_avx512_mask_pternlog_q_512, 114174}, // __builtin_ia32_pternlogq512_mask
   34611       {Intrinsic::x86_avx512_maskz_pternlog_q_512, 120123}, // __builtin_ia32_pternlogq512_maskz
   34612       {Intrinsic::x86_sse41_ptestc, 131650}, // __builtin_ia32_ptestc128
   34613       {Intrinsic::x86_avx_ptestc_256, 96736}, // __builtin_ia32_ptestc256
   34614       {Intrinsic::x86_avx512_ptestm_b_128, 122676}, // __builtin_ia32_ptestmb128
   34615       {Intrinsic::x86_avx512_ptestm_b_256, 122702}, // __builtin_ia32_ptestmb256
   34616       {Intrinsic::x86_avx512_ptestm_b_512, 122728}, // __builtin_ia32_ptestmb512
   34617       {Intrinsic::x86_avx512_ptestm_d_128, 122754}, // __builtin_ia32_ptestmd128
   34618       {Intrinsic::x86_avx512_ptestm_d_256, 122780}, // __builtin_ia32_ptestmd256
   34619       {Intrinsic::x86_avx512_ptestm_d_512, 122806}, // __builtin_ia32_ptestmd512
   34620       {Intrinsic::x86_avx512_ptestm_q_128, 122832}, // __builtin_ia32_ptestmq128
   34621       {Intrinsic::x86_avx512_ptestm_q_256, 122858}, // __builtin_ia32_ptestmq256
   34622       {Intrinsic::x86_avx512_ptestm_q_512, 122884}, // __builtin_ia32_ptestmq512
   34623       {Intrinsic::x86_avx512_ptestm_w_128, 122910}, // __builtin_ia32_ptestmw128
   34624       {Intrinsic::x86_avx512_ptestm_w_256, 122936}, // __builtin_ia32_ptestmw256
   34625       {Intrinsic::x86_avx512_ptestm_w_512, 122962}, // __builtin_ia32_ptestmw512
   34626       {Intrinsic::x86_avx512_ptestnm_b_128, 122988}, // __builtin_ia32_ptestnmb128
   34627       {Intrinsic::x86_avx512_ptestnm_b_256, 123015}, // __builtin_ia32_ptestnmb256
   34628       {Intrinsic::x86_avx512_ptestnm_b_512, 123042}, // __builtin_ia32_ptestnmb512
   34629       {Intrinsic::x86_avx512_ptestnm_d_128, 123069}, // __builtin_ia32_ptestnmd128
   34630       {Intrinsic::x86_avx512_ptestnm_d_256, 123096}, // __builtin_ia32_ptestnmd256
   34631       {Intrinsic::x86_avx512_ptestnm_d_512, 123123}, // __builtin_ia32_ptestnmd512
   34632       {Intrinsic::x86_avx512_ptestnm_q_128, 123150}, // __builtin_ia32_ptestnmq128
   34633       {Intrinsic::x86_avx512_ptestnm_q_256, 123177}, // __builtin_ia32_ptestnmq256
   34634       {Intrinsic::x86_avx512_ptestnm_q_512, 123204}, // __builtin_ia32_ptestnmq512
   34635       {Intrinsic::x86_avx512_ptestnm_w_128, 123231}, // __builtin_ia32_ptestnmw128
   34636       {Intrinsic::x86_avx512_ptestnm_w_256, 123258}, // __builtin_ia32_ptestnmw256
   34637       {Intrinsic::x86_avx512_ptestnm_w_512, 123285}, // __builtin_ia32_ptestnmw512
   34638       {Intrinsic::x86_sse41_ptestnzc, 131675}, // __builtin_ia32_ptestnzc128
   34639       {Intrinsic::x86_avx_ptestnzc_256, 96761}, // __builtin_ia32_ptestnzc256
   34640       {Intrinsic::x86_sse41_ptestz, 131702}, // __builtin_ia32_ptestz128
   34641       {Intrinsic::x86_avx_ptestz_256, 96788}, // __builtin_ia32_ptestz256
   34642       {Intrinsic::x86_mmx_punpckhbw, 128055}, // __builtin_ia32_punpckhbw
   34643       {Intrinsic::x86_mmx_punpckhdq, 128080}, // __builtin_ia32_punpckhdq
   34644       {Intrinsic::x86_mmx_punpckhwd, 128105}, // __builtin_ia32_punpckhwd
   34645       {Intrinsic::x86_mmx_punpcklbw, 128130}, // __builtin_ia32_punpcklbw
   34646       {Intrinsic::x86_mmx_punpckldq, 128155}, // __builtin_ia32_punpckldq
   34647       {Intrinsic::x86_mmx_punpcklwd, 128180}, // __builtin_ia32_punpcklwd
   34648       {Intrinsic::x86_mmx_pxor, 128205}, // __builtin_ia32_pxor
   34649       {Intrinsic::x86_avx512_mask_range_pd_128, 114207}, // __builtin_ia32_rangepd128_mask
   34650       {Intrinsic::x86_avx512_mask_range_pd_256, 114238}, // __builtin_ia32_rangepd256_mask
   34651       {Intrinsic::x86_avx512_mask_range_pd_512, 114269}, // __builtin_ia32_rangepd512_mask
   34652       {Intrinsic::x86_avx512_mask_range_ps_128, 114300}, // __builtin_ia32_rangeps128_mask
   34653       {Intrinsic::x86_avx512_mask_range_ps_256, 114331}, // __builtin_ia32_rangeps256_mask
   34654       {Intrinsic::x86_avx512_mask_range_ps_512, 114362}, // __builtin_ia32_rangeps512_mask
   34655       {Intrinsic::x86_avx512_mask_range_sd, 114393}, // __builtin_ia32_rangesd128_round_mask
   34656       {Intrinsic::x86_avx512_mask_range_ss, 114430}, // __builtin_ia32_rangess128_round_mask
   34657       {Intrinsic::x86_avx512_rcp14_pd_128, 123312}, // __builtin_ia32_rcp14pd128_mask
   34658       {Intrinsic::x86_avx512_rcp14_pd_256, 123343}, // __builtin_ia32_rcp14pd256_mask
   34659       {Intrinsic::x86_avx512_rcp14_pd_512, 123374}, // __builtin_ia32_rcp14pd512_mask
   34660       {Intrinsic::x86_avx512_rcp14_ps_128, 123405}, // __builtin_ia32_rcp14ps128_mask
   34661       {Intrinsic::x86_avx512_rcp14_ps_256, 123436}, // __builtin_ia32_rcp14ps256_mask
   34662       {Intrinsic::x86_avx512_rcp14_ps_512, 123467}, // __builtin_ia32_rcp14ps512_mask
   34663       {Intrinsic::x86_avx512_rcp14_sd, 123498}, // __builtin_ia32_rcp14sd_mask
   34664       {Intrinsic::x86_avx512_rcp14_ss, 123526}, // __builtin_ia32_rcp14ss_mask
   34665       {Intrinsic::x86_avx512_rcp28_pd, 123554}, // __builtin_ia32_rcp28pd_mask
   34666       {Intrinsic::x86_avx512_rcp28_ps, 123582}, // __builtin_ia32_rcp28ps_mask
   34667       {Intrinsic::x86_avx512_rcp28_sd, 123610}, // __builtin_ia32_rcp28sd_round_mask
   34668       {Intrinsic::x86_avx512_rcp28_ss, 123644}, // __builtin_ia32_rcp28ss_round_mask
   34669       {Intrinsic::x86_sse_rcp_ps, 129220}, // __builtin_ia32_rcpps
   34670       {Intrinsic::x86_avx_rcp_ps_256, 96813}, // __builtin_ia32_rcpps256
   34671       {Intrinsic::x86_sse_rcp_ss, 129241}, // __builtin_ia32_rcpss
   34672       {Intrinsic::x86_rdfsbase_32, 128299}, // __builtin_ia32_rdfsbase32
   34673       {Intrinsic::x86_rdfsbase_64, 128325}, // __builtin_ia32_rdfsbase64
   34674       {Intrinsic::x86_rdgsbase_32, 128351}, // __builtin_ia32_rdgsbase32
   34675       {Intrinsic::x86_rdgsbase_64, 128377}, // __builtin_ia32_rdgsbase64
   34676       {Intrinsic::x86_rdpkru, 128403}, // __builtin_ia32_rdpkru
   34677       {Intrinsic::x86_rdpmc, 128425}, // __builtin_ia32_rdpmc
   34678       {Intrinsic::x86_rdtsc, 128446}, // __builtin_ia32_rdtsc
   34679       {Intrinsic::x86_rdtscp, 128467}, // __builtin_ia32_rdtscp
   34680       {Intrinsic::x86_flags_read_u32, 125464}, // __builtin_ia32_readeflags_u32
   34681       {Intrinsic::x86_flags_read_u64, 125494}, // __builtin_ia32_readeflags_u64
   34682       {Intrinsic::x86_avx512_mask_reduce_pd_128, 114467}, // __builtin_ia32_reducepd128_mask
   34683       {Intrinsic::x86_avx512_mask_reduce_pd_256, 114499}, // __builtin_ia32_reducepd256_mask
   34684       {Intrinsic::x86_avx512_mask_reduce_pd_512, 114531}, // __builtin_ia32_reducepd512_mask
   34685       {Intrinsic::x86_avx512_mask_reduce_ps_128, 114563}, // __builtin_ia32_reduceps128_mask
   34686       {Intrinsic::x86_avx512_mask_reduce_ps_256, 114595}, // __builtin_ia32_reduceps256_mask
   34687       {Intrinsic::x86_avx512_mask_reduce_ps_512, 114627}, // __builtin_ia32_reduceps512_mask
   34688       {Intrinsic::x86_avx512_mask_reduce_sd, 114659}, // __builtin_ia32_reducesd_mask
   34689       {Intrinsic::x86_avx512_mask_reduce_ss, 114688}, // __builtin_ia32_reducess_mask
   34690       {Intrinsic::x86_avx512_mask_rndscale_pd_128, 114717}, // __builtin_ia32_rndscalepd_128_mask
   34691       {Intrinsic::x86_avx512_mask_rndscale_pd_256, 114752}, // __builtin_ia32_rndscalepd_256_mask
   34692       {Intrinsic::x86_avx512_mask_rndscale_pd_512, 114787}, // __builtin_ia32_rndscalepd_mask
   34693       {Intrinsic::x86_avx512_mask_rndscale_ps_128, 114818}, // __builtin_ia32_rndscaleps_128_mask
   34694       {Intrinsic::x86_avx512_mask_rndscale_ps_256, 114853}, // __builtin_ia32_rndscaleps_256_mask
   34695       {Intrinsic::x86_avx512_mask_rndscale_ps_512, 114888}, // __builtin_ia32_rndscaleps_mask
   34696       {Intrinsic::x86_avx512_mask_rndscale_sd, 114919}, // __builtin_ia32_rndscalesd_round_mask
   34697       {Intrinsic::x86_avx512_mask_rndscale_ss, 114956}, // __builtin_ia32_rndscaless_round_mask
   34698       {Intrinsic::x86_sse41_round_pd, 131727}, // __builtin_ia32_roundpd
   34699       {Intrinsic::x86_avx_round_pd_256, 96837}, // __builtin_ia32_roundpd256
   34700       {Intrinsic::x86_sse41_round_ps, 131750}, // __builtin_ia32_roundps
   34701       {Intrinsic::x86_avx_round_ps_256, 96863}, // __builtin_ia32_roundps256
   34702       {Intrinsic::x86_sse41_round_sd, 131773}, // __builtin_ia32_roundsd
   34703       {Intrinsic::x86_sse41_round_ss, 131796}, // __builtin_ia32_roundss
   34704       {Intrinsic::x86_avx512_rsqrt14_pd_128, 123678}, // __builtin_ia32_rsqrt14pd128_mask
   34705       {Intrinsic::x86_avx512_rsqrt14_pd_256, 123711}, // __builtin_ia32_rsqrt14pd256_mask
   34706       {Intrinsic::x86_avx512_rsqrt14_pd_512, 123744}, // __builtin_ia32_rsqrt14pd512_mask
   34707       {Intrinsic::x86_avx512_rsqrt14_ps_128, 123777}, // __builtin_ia32_rsqrt14ps128_mask
   34708       {Intrinsic::x86_avx512_rsqrt14_ps_256, 123810}, // __builtin_ia32_rsqrt14ps256_mask
   34709       {Intrinsic::x86_avx512_rsqrt14_ps_512, 123843}, // __builtin_ia32_rsqrt14ps512_mask
   34710       {Intrinsic::x86_avx512_rsqrt14_sd, 123876}, // __builtin_ia32_rsqrt14sd_mask
   34711       {Intrinsic::x86_avx512_rsqrt14_ss, 123906}, // __builtin_ia32_rsqrt14ss_mask
   34712       {Intrinsic::x86_avx512_rsqrt28_pd, 123936}, // __builtin_ia32_rsqrt28pd_mask
   34713       {Intrinsic::x86_avx512_rsqrt28_ps, 123966}, // __builtin_ia32_rsqrt28ps_mask
   34714       {Intrinsic::x86_avx512_rsqrt28_sd, 123996}, // __builtin_ia32_rsqrt28sd_round_mask
   34715       {Intrinsic::x86_avx512_rsqrt28_ss, 124032}, // __builtin_ia32_rsqrt28ss_round_mask
   34716       {Intrinsic::x86_sse_rsqrt_ps, 129262}, // __builtin_ia32_rsqrtps
   34717       {Intrinsic::x86_avx_rsqrt_ps_256, 96889}, // __builtin_ia32_rsqrtps256
   34718       {Intrinsic::x86_sse_rsqrt_ss, 129285}, // __builtin_ia32_rsqrtss
   34719       {Intrinsic::x86_avx512_mask_scalef_pd_128, 114993}, // __builtin_ia32_scalefpd128_mask
   34720       {Intrinsic::x86_avx512_mask_scalef_pd_256, 115025}, // __builtin_ia32_scalefpd256_mask
   34721       {Intrinsic::x86_avx512_mask_scalef_pd_512, 115057}, // __builtin_ia32_scalefpd512_mask
   34722       {Intrinsic::x86_avx512_mask_scalef_ps_128, 115089}, // __builtin_ia32_scalefps128_mask
   34723       {Intrinsic::x86_avx512_mask_scalef_ps_256, 115121}, // __builtin_ia32_scalefps256_mask
   34724       {Intrinsic::x86_avx512_mask_scalef_ps_512, 115153}, // __builtin_ia32_scalefps512_mask
   34725       {Intrinsic::x86_avx512_mask_scalef_sd, 115185}, // __builtin_ia32_scalefsd_round_mask
   34726       {Intrinsic::x86_avx512_mask_scalef_ss, 115220}, // __builtin_ia32_scalefss_round_mask
   34727       {Intrinsic::x86_avx512_scatter_qps_512, 124274}, // __builtin_ia32_scatterdiv16sf
   34728       {Intrinsic::x86_avx512_scatter_qpi_512, 124215}, // __builtin_ia32_scatterdiv16si
   34729       {Intrinsic::x86_avx512_scatterdiv2_df, 124304}, // __builtin_ia32_scatterdiv2df
   34730       {Intrinsic::x86_avx512_scatterdiv2_di, 124333}, // __builtin_ia32_scatterdiv2di
   34731       {Intrinsic::x86_avx512_scatterdiv4_df, 124362}, // __builtin_ia32_scatterdiv4df
   34732       {Intrinsic::x86_avx512_scatterdiv4_di, 124391}, // __builtin_ia32_scatterdiv4di
   34733       {Intrinsic::x86_avx512_scatterdiv4_sf, 124420}, // __builtin_ia32_scatterdiv4sf
   34734       {Intrinsic::x86_avx512_scatterdiv4_si, 124449}, // __builtin_ia32_scatterdiv4si
   34735       {Intrinsic::x86_avx512_scatter_qpd_512, 124186}, // __builtin_ia32_scatterdiv8df
   34736       {Intrinsic::x86_avx512_scatter_qpq_512, 124245}, // __builtin_ia32_scatterdiv8di
   34737       {Intrinsic::x86_avx512_scatterdiv8_sf, 124478}, // __builtin_ia32_scatterdiv8sf
   34738       {Intrinsic::x86_avx512_scatterdiv8_si, 124507}, // __builtin_ia32_scatterdiv8si
   34739       {Intrinsic::x86_avx512_scatterpf_dpd_512, 124536}, // __builtin_ia32_scatterpfdpd
   34740       {Intrinsic::x86_avx512_scatterpf_dps_512, 124564}, // __builtin_ia32_scatterpfdps
   34741       {Intrinsic::x86_avx512_scatterpf_qpd_512, 124592}, // __builtin_ia32_scatterpfqpd
   34742       {Intrinsic::x86_avx512_scatterpf_qps_512, 124620}, // __builtin_ia32_scatterpfqps
   34743       {Intrinsic::x86_avx512_scatter_dps_512, 124156}, // __builtin_ia32_scattersiv16sf
   34744       {Intrinsic::x86_avx512_scatter_dpi_512, 124097}, // __builtin_ia32_scattersiv16si
   34745       {Intrinsic::x86_avx512_scattersiv2_df, 124648}, // __builtin_ia32_scattersiv2df
   34746       {Intrinsic::x86_avx512_scattersiv2_di, 124677}, // __builtin_ia32_scattersiv2di
   34747       {Intrinsic::x86_avx512_scattersiv4_df, 124706}, // __builtin_ia32_scattersiv4df
   34748       {Intrinsic::x86_avx512_scattersiv4_di, 124735}, // __builtin_ia32_scattersiv4di
   34749       {Intrinsic::x86_avx512_scattersiv4_sf, 124764}, // __builtin_ia32_scattersiv4sf
   34750       {Intrinsic::x86_avx512_scattersiv4_si, 124793}, // __builtin_ia32_scattersiv4si
   34751       {Intrinsic::x86_avx512_scatter_dpd_512, 124068}, // __builtin_ia32_scattersiv8df
   34752       {Intrinsic::x86_avx512_scatter_dpq_512, 124127}, // __builtin_ia32_scattersiv8di
   34753       {Intrinsic::x86_avx512_scattersiv8_sf, 124822}, // __builtin_ia32_scattersiv8sf
   34754       {Intrinsic::x86_avx512_scattersiv8_si, 124851}, // __builtin_ia32_scattersiv8si
   34755       {Intrinsic::x86_sse_sfence, 129308}, // __builtin_ia32_sfence
   34756       {Intrinsic::x86_sha1msg1, 128489}, // __builtin_ia32_sha1msg1
   34757       {Intrinsic::x86_sha1msg2, 128513}, // __builtin_ia32_sha1msg2
   34758       {Intrinsic::x86_sha1nexte, 128537}, // __builtin_ia32_sha1nexte
   34759       {Intrinsic::x86_sha1rnds4, 128562}, // __builtin_ia32_sha1rnds4
   34760       {Intrinsic::x86_sha256msg1, 128587}, // __builtin_ia32_sha256msg1
   34761       {Intrinsic::x86_sha256msg2, 128613}, // __builtin_ia32_sha256msg2
   34762       {Intrinsic::x86_sha256rnds2, 128639}, // __builtin_ia32_sha256rnds2
   34763       {Intrinsic::x86_avx512_mask_shuf_f32x4_256, 115286}, // __builtin_ia32_shuf_f32x4_256_mask
   34764       {Intrinsic::x86_avx512_mask_shuf_f32x4, 115255}, // __builtin_ia32_shuf_f32x4_mask
   34765       {Intrinsic::x86_avx512_mask_shuf_f64x2_256, 115352}, // __builtin_ia32_shuf_f64x2_256_mask
   34766       {Intrinsic::x86_avx512_mask_shuf_f64x2, 115321}, // __builtin_ia32_shuf_f64x2_mask
   34767       {Intrinsic::x86_avx512_mask_shuf_i32x4_256, 115418}, // __builtin_ia32_shuf_i32x4_256_mask
   34768       {Intrinsic::x86_avx512_mask_shuf_i32x4, 115387}, // __builtin_ia32_shuf_i32x4_mask
   34769       {Intrinsic::x86_avx512_mask_shuf_i64x2_256, 115484}, // __builtin_ia32_shuf_i64x2_256_mask
   34770       {Intrinsic::x86_avx512_mask_shuf_i64x2, 115453}, // __builtin_ia32_shuf_i64x2_mask
   34771       {Intrinsic::x86_slwpcb, 128666}, // __builtin_ia32_slwpcb
   34772       {Intrinsic::x86_sse2_sqrt_pd, 131005}, // __builtin_ia32_sqrtpd
   34773       {Intrinsic::x86_avx512_mask_sqrt_pd_128, 115519}, // __builtin_ia32_sqrtpd128_mask
   34774       {Intrinsic::x86_avx_sqrt_pd_256, 96915}, // __builtin_ia32_sqrtpd256
   34775       {Intrinsic::x86_avx512_mask_sqrt_pd_256, 115549}, // __builtin_ia32_sqrtpd256_mask
   34776       {Intrinsic::x86_avx512_mask_sqrt_pd_512, 115579}, // __builtin_ia32_sqrtpd512_mask
   34777       {Intrinsic::x86_sse_sqrt_ps, 129330}, // __builtin_ia32_sqrtps
   34778       {Intrinsic::x86_avx512_mask_sqrt_ps_128, 115609}, // __builtin_ia32_sqrtps128_mask
   34779       {Intrinsic::x86_avx_sqrt_ps_256, 96940}, // __builtin_ia32_sqrtps256
   34780       {Intrinsic::x86_avx512_mask_sqrt_ps_256, 115639}, // __builtin_ia32_sqrtps256_mask
   34781       {Intrinsic::x86_avx512_mask_sqrt_ps_512, 115669}, // __builtin_ia32_sqrtps512_mask
   34782       {Intrinsic::x86_sse2_sqrt_sd, 131027}, // __builtin_ia32_sqrtsd
   34783       {Intrinsic::x86_avx512_mask_sqrt_sd, 115699}, // __builtin_ia32_sqrtsd_round_mask
   34784       {Intrinsic::x86_sse_sqrt_ss, 129352}, // __builtin_ia32_sqrtss
   34785       {Intrinsic::x86_avx512_mask_sqrt_ss, 115732}, // __builtin_ia32_sqrtss_round_mask
   34786       {Intrinsic::x86_avx512_mask_store_ss, 115765}, // __builtin_ia32_storess_mask
   34787       {Intrinsic::x86_subborrow_u32, 133044}, // __builtin_ia32_subborrow_u32
   34788       {Intrinsic::x86_subborrow_u64, 133073}, // __builtin_ia32_subborrow_u64
   34789       {Intrinsic::x86_avx512_mask_sub_pd_512, 115793}, // __builtin_ia32_subpd512_mask
   34790       {Intrinsic::x86_avx512_mask_sub_ps_512, 115822}, // __builtin_ia32_subps512_mask
   34791       {Intrinsic::x86_avx512_mask_sub_sd_round, 115851}, // __builtin_ia32_subsd_round_mask
   34792       {Intrinsic::x86_avx512_mask_sub_ss_round, 115883}, // __builtin_ia32_subss_round_mask
   34793       {Intrinsic::x86_sse_ucomieq_ss, 129374}, // __builtin_ia32_ucomieq
   34794       {Intrinsic::x86_sse_ucomige_ss, 129397}, // __builtin_ia32_ucomige
   34795       {Intrinsic::x86_sse_ucomigt_ss, 129420}, // __builtin_ia32_ucomigt
   34796       {Intrinsic::x86_sse_ucomile_ss, 129443}, // __builtin_ia32_ucomile
   34797       {Intrinsic::x86_sse_ucomilt_ss, 129466}, // __builtin_ia32_ucomilt
   34798       {Intrinsic::x86_sse_ucomineq_ss, 129489}, // __builtin_ia32_ucomineq
   34799       {Intrinsic::x86_sse2_ucomieq_sd, 131049}, // __builtin_ia32_ucomisdeq
   34800       {Intrinsic::x86_sse2_ucomige_sd, 131074}, // __builtin_ia32_ucomisdge
   34801       {Intrinsic::x86_sse2_ucomigt_sd, 131099}, // __builtin_ia32_ucomisdgt
   34802       {Intrinsic::x86_sse2_ucomile_sd, 131124}, // __builtin_ia32_ucomisdle
   34803       {Intrinsic::x86_sse2_ucomilt_sd, 131149}, // __builtin_ia32_ucomisdlt
   34804       {Intrinsic::x86_sse2_ucomineq_sd, 131174}, // __builtin_ia32_ucomisdneq
   34805       {Intrinsic::x86_avx512_vcomi_sd, 124880}, // __builtin_ia32_vcomisd
   34806       {Intrinsic::x86_avx512_vcomi_ss, 124903}, // __builtin_ia32_vcomiss
   34807       {Intrinsic::x86_vcvtph2ps_128, 133154}, // __builtin_ia32_vcvtph2ps
   34808       {Intrinsic::x86_vcvtph2ps_256, 133179}, // __builtin_ia32_vcvtph2ps256
   34809       {Intrinsic::x86_avx512_mask_vcvtph2ps_256, 115945}, // __builtin_ia32_vcvtph2ps256_mask
   34810       {Intrinsic::x86_avx512_mask_vcvtph2ps_512, 115978}, // __builtin_ia32_vcvtph2ps512_mask
   34811       {Intrinsic::x86_avx512_mask_vcvtph2ps_128, 115915}, // __builtin_ia32_vcvtph2ps_mask
   34812       {Intrinsic::x86_vcvtps2ph_128, 133207}, // __builtin_ia32_vcvtps2ph
   34813       {Intrinsic::x86_vcvtps2ph_256, 133232}, // __builtin_ia32_vcvtps2ph256
   34814       {Intrinsic::x86_avx512_mask_vcvtps2ph_256, 116041}, // __builtin_ia32_vcvtps2ph256_mask
   34815       {Intrinsic::x86_avx512_mask_vcvtps2ph_512, 116074}, // __builtin_ia32_vcvtps2ph512_mask
   34816       {Intrinsic::x86_avx512_mask_vcvtps2ph_128, 116011}, // __builtin_ia32_vcvtps2ph_mask
   34817       {Intrinsic::x86_avx512_vcvtsd2si32, 124926}, // __builtin_ia32_vcvtsd2si32
   34818       {Intrinsic::x86_avx512_vcvtsd2si64, 124953}, // __builtin_ia32_vcvtsd2si64
   34819       {Intrinsic::x86_avx512_vcvtsd2usi32, 124980}, // __builtin_ia32_vcvtsd2usi32
   34820       {Intrinsic::x86_avx512_vcvtsd2usi64, 125008}, // __builtin_ia32_vcvtsd2usi64
   34821       {Intrinsic::x86_avx512_vcvtss2si32, 125036}, // __builtin_ia32_vcvtss2si32
   34822       {Intrinsic::x86_avx512_vcvtss2si64, 125063}, // __builtin_ia32_vcvtss2si64
   34823       {Intrinsic::x86_avx512_vcvtss2usi32, 125090}, // __builtin_ia32_vcvtss2usi32
   34824       {Intrinsic::x86_avx512_vcvtss2usi64, 125118}, // __builtin_ia32_vcvtss2usi64
   34825       {Intrinsic::x86_avx512_cvttsd2si, 100145}, // __builtin_ia32_vcvttsd2si32
   34826       {Intrinsic::x86_avx512_cvttsd2si64, 100173}, // __builtin_ia32_vcvttsd2si64
   34827       {Intrinsic::x86_avx512_cvttsd2usi, 100201}, // __builtin_ia32_vcvttsd2usi32
   34828       {Intrinsic::x86_avx512_cvttsd2usi64, 100230}, // __builtin_ia32_vcvttsd2usi64
   34829       {Intrinsic::x86_avx512_cvttss2si, 100259}, // __builtin_ia32_vcvttss2si32
   34830       {Intrinsic::x86_avx512_cvttss2si64, 100287}, // __builtin_ia32_vcvttss2si64
   34831       {Intrinsic::x86_avx512_cvttss2usi, 100315}, // __builtin_ia32_vcvttss2usi32
   34832       {Intrinsic::x86_avx512_cvttss2usi64, 100344}, // __builtin_ia32_vcvttss2usi64
   34833       {Intrinsic::x86_mmx_pextr_w, 127215}, // __builtin_ia32_vec_ext_v4hi
   34834       {Intrinsic::x86_mmx_pinsr_w, 127243}, // __builtin_ia32_vec_set_v4hi
   34835       {Intrinsic::x86_fma_vfmadd_pd, 125586}, // __builtin_ia32_vfmaddpd
   34836       {Intrinsic::x86_avx512_mask_vfmadd_pd_128, 116107}, // __builtin_ia32_vfmaddpd128_mask
   34837       {Intrinsic::x86_avx512_mask3_vfmadd_pd_128, 118459}, // __builtin_ia32_vfmaddpd128_mask3
   34838       {Intrinsic::x86_avx512_maskz_vfmadd_pd_128, 120157}, // __builtin_ia32_vfmaddpd128_maskz
   34839       {Intrinsic::x86_fma_vfmadd_pd_256, 125610}, // __builtin_ia32_vfmaddpd256
   34840       {Intrinsic::x86_avx512_mask_vfmadd_pd_256, 116139}, // __builtin_ia32_vfmaddpd256_mask
   34841       {Intrinsic::x86_avx512_mask3_vfmadd_pd_256, 118492}, // __builtin_ia32_vfmaddpd256_mask3
   34842       {Intrinsic::x86_avx512_maskz_vfmadd_pd_256, 120190}, // __builtin_ia32_vfmaddpd256_maskz
   34843       {Intrinsic::x86_avx512_mask_vfmadd_pd_512, 116171}, // __builtin_ia32_vfmaddpd512_mask
   34844       {Intrinsic::x86_avx512_mask3_vfmadd_pd_512, 118525}, // __builtin_ia32_vfmaddpd512_mask3
   34845       {Intrinsic::x86_avx512_maskz_vfmadd_pd_512, 120223}, // __builtin_ia32_vfmaddpd512_maskz
   34846       {Intrinsic::x86_fma_vfmadd_ps, 125637}, // __builtin_ia32_vfmaddps
   34847       {Intrinsic::x86_avx512_mask_vfmadd_ps_128, 116203}, // __builtin_ia32_vfmaddps128_mask
   34848       {Intrinsic::x86_avx512_mask3_vfmadd_ps_128, 118558}, // __builtin_ia32_vfmaddps128_mask3
   34849       {Intrinsic::x86_avx512_maskz_vfmadd_ps_128, 120256}, // __builtin_ia32_vfmaddps128_maskz
   34850       {Intrinsic::x86_fma_vfmadd_ps_256, 125661}, // __builtin_ia32_vfmaddps256
   34851       {Intrinsic::x86_avx512_mask_vfmadd_ps_256, 116235}, // __builtin_ia32_vfmaddps256_mask
   34852       {Intrinsic::x86_avx512_mask3_vfmadd_ps_256, 118591}, // __builtin_ia32_vfmaddps256_mask3
   34853       {Intrinsic::x86_avx512_maskz_vfmadd_ps_256, 120289}, // __builtin_ia32_vfmaddps256_maskz
   34854       {Intrinsic::x86_avx512_mask_vfmadd_ps_512, 116267}, // __builtin_ia32_vfmaddps512_mask
   34855       {Intrinsic::x86_avx512_mask3_vfmadd_ps_512, 118624}, // __builtin_ia32_vfmaddps512_mask3
   34856       {Intrinsic::x86_avx512_maskz_vfmadd_ps_512, 120322}, // __builtin_ia32_vfmaddps512_maskz
   34857       {Intrinsic::x86_fma_vfmadd_sd, 125688}, // __builtin_ia32_vfmaddsd
   34858       {Intrinsic::x86_avx512_mask_vfmadd_sd, 116299}, // __builtin_ia32_vfmaddsd3_mask
   34859       {Intrinsic::x86_avx512_mask3_vfmadd_sd, 118657}, // __builtin_ia32_vfmaddsd3_mask3
   34860       {Intrinsic::x86_avx512_maskz_vfmadd_sd, 120355}, // __builtin_ia32_vfmaddsd3_maskz
   34861       {Intrinsic::x86_fma_vfmadd_ss, 125712}, // __builtin_ia32_vfmaddss
   34862       {Intrinsic::x86_avx512_mask_vfmadd_ss, 116329}, // __builtin_ia32_vfmaddss3_mask
   34863       {Intrinsic::x86_avx512_mask3_vfmadd_ss, 118688}, // __builtin_ia32_vfmaddss3_mask3
   34864       {Intrinsic::x86_avx512_maskz_vfmadd_ss, 120386}, // __builtin_ia32_vfmaddss3_maskz
   34865       {Intrinsic::x86_fma_vfmaddsub_pd, 125736}, // __builtin_ia32_vfmaddsubpd
   34866       {Intrinsic::x86_avx512_mask_vfmaddsub_pd_128, 116359}, // __builtin_ia32_vfmaddsubpd128_mask
   34867       {Intrinsic::x86_avx512_mask3_vfmaddsub_pd_128, 118719}, // __builtin_ia32_vfmaddsubpd128_mask3
   34868       {Intrinsic::x86_avx512_maskz_vfmaddsub_pd_128, 120417}, // __builtin_ia32_vfmaddsubpd128_maskz
   34869       {Intrinsic::x86_fma_vfmaddsub_pd_256, 125763}, // __builtin_ia32_vfmaddsubpd256
   34870       {Intrinsic::x86_avx512_mask_vfmaddsub_pd_256, 116394}, // __builtin_ia32_vfmaddsubpd256_mask
   34871       {Intrinsic::x86_avx512_mask3_vfmaddsub_pd_256, 118755}, // __builtin_ia32_vfmaddsubpd256_mask3
   34872       {Intrinsic::x86_avx512_maskz_vfmaddsub_pd_256, 120453}, // __builtin_ia32_vfmaddsubpd256_maskz
   34873       {Intrinsic::x86_avx512_mask_vfmaddsub_pd_512, 116429}, // __builtin_ia32_vfmaddsubpd512_mask
   34874       {Intrinsic::x86_avx512_mask3_vfmaddsub_pd_512, 118791}, // __builtin_ia32_vfmaddsubpd512_mask3
   34875       {Intrinsic::x86_avx512_maskz_vfmaddsub_pd_512, 120489}, // __builtin_ia32_vfmaddsubpd512_maskz
   34876       {Intrinsic::x86_fma_vfmaddsub_ps, 125793}, // __builtin_ia32_vfmaddsubps
   34877       {Intrinsic::x86_avx512_mask_vfmaddsub_ps_128, 116464}, // __builtin_ia32_vfmaddsubps128_mask
   34878       {Intrinsic::x86_avx512_mask3_vfmaddsub_ps_128, 118827}, // __builtin_ia32_vfmaddsubps128_mask3
   34879       {Intrinsic::x86_avx512_maskz_vfmaddsub_ps_128, 120525}, // __builtin_ia32_vfmaddsubps128_maskz
   34880       {Intrinsic::x86_fma_vfmaddsub_ps_256, 125820}, // __builtin_ia32_vfmaddsubps256
   34881       {Intrinsic::x86_avx512_mask_vfmaddsub_ps_256, 116499}, // __builtin_ia32_vfmaddsubps256_mask
   34882       {Intrinsic::x86_avx512_mask3_vfmaddsub_ps_256, 118863}, // __builtin_ia32_vfmaddsubps256_mask3
   34883       {Intrinsic::x86_avx512_maskz_vfmaddsub_ps_256, 120561}, // __builtin_ia32_vfmaddsubps256_maskz
   34884       {Intrinsic::x86_avx512_mask_vfmaddsub_ps_512, 116534}, // __builtin_ia32_vfmaddsubps512_mask
   34885       {Intrinsic::x86_avx512_mask3_vfmaddsub_ps_512, 118899}, // __builtin_ia32_vfmaddsubps512_mask3
   34886       {Intrinsic::x86_avx512_maskz_vfmaddsub_ps_512, 120597}, // __builtin_ia32_vfmaddsubps512_maskz
   34887       {Intrinsic::x86_fma_vfmsubadd_pd, 126000}, // __builtin_ia32_vfmsubaddpd
   34888       {Intrinsic::x86_avx512_mask3_vfmsubadd_pd_128, 119195}, // __builtin_ia32_vfmsubaddpd128_mask3
   34889       {Intrinsic::x86_fma_vfmsubadd_pd_256, 126027}, // __builtin_ia32_vfmsubaddpd256
   34890       {Intrinsic::x86_avx512_mask3_vfmsubadd_pd_256, 119231}, // __builtin_ia32_vfmsubaddpd256_mask3
   34891       {Intrinsic::x86_avx512_mask3_vfmsubadd_pd_512, 119267}, // __builtin_ia32_vfmsubaddpd512_mask3
   34892       {Intrinsic::x86_fma_vfmsubadd_ps, 126057}, // __builtin_ia32_vfmsubaddps
   34893       {Intrinsic::x86_avx512_mask3_vfmsubadd_ps_128, 119303}, // __builtin_ia32_vfmsubaddps128_mask3
   34894       {Intrinsic::x86_fma_vfmsubadd_ps_256, 126084}, // __builtin_ia32_vfmsubaddps256
   34895       {Intrinsic::x86_avx512_mask3_vfmsubadd_ps_256, 119339}, // __builtin_ia32_vfmsubaddps256_mask3
   34896       {Intrinsic::x86_avx512_mask3_vfmsubadd_ps_512, 119375}, // __builtin_ia32_vfmsubaddps512_mask3
   34897       {Intrinsic::x86_fma_vfmsub_pd, 125850}, // __builtin_ia32_vfmsubpd
   34898       {Intrinsic::x86_avx512_mask3_vfmsub_pd_128, 118935}, // __builtin_ia32_vfmsubpd128_mask3
   34899       {Intrinsic::x86_fma_vfmsub_pd_256, 125874}, // __builtin_ia32_vfmsubpd256
   34900       {Intrinsic::x86_avx512_mask3_vfmsub_pd_256, 118968}, // __builtin_ia32_vfmsubpd256_mask3
   34901       {Intrinsic::x86_avx512_mask3_vfmsub_pd_512, 119001}, // __builtin_ia32_vfmsubpd512_mask3
   34902       {Intrinsic::x86_fma_vfmsub_ps, 125901}, // __builtin_ia32_vfmsubps
   34903       {Intrinsic::x86_avx512_mask3_vfmsub_ps_128, 119034}, // __builtin_ia32_vfmsubps128_mask3
   34904       {Intrinsic::x86_fma_vfmsub_ps_256, 125925}, // __builtin_ia32_vfmsubps256
   34905       {Intrinsic::x86_avx512_mask3_vfmsub_ps_256, 119067}, // __builtin_ia32_vfmsubps256_mask3
   34906       {Intrinsic::x86_avx512_mask3_vfmsub_ps_512, 119100}, // __builtin_ia32_vfmsubps512_mask3
   34907       {Intrinsic::x86_fma_vfmsub_sd, 125952}, // __builtin_ia32_vfmsubsd
   34908       {Intrinsic::x86_avx512_mask3_vfmsub_sd, 119133}, // __builtin_ia32_vfmsubsd3_mask3
   34909       {Intrinsic::x86_fma_vfmsub_ss, 125976}, // __builtin_ia32_vfmsubss
   34910       {Intrinsic::x86_avx512_mask3_vfmsub_ss, 119164}, // __builtin_ia32_vfmsubss3_mask3
   34911       {Intrinsic::x86_fma_vfnmadd_pd, 126114}, // __builtin_ia32_vfnmaddpd
   34912       {Intrinsic::x86_avx512_mask_vfnmadd_pd_128, 116569}, // __builtin_ia32_vfnmaddpd128_mask
   34913       {Intrinsic::x86_fma_vfnmadd_pd_256, 126139}, // __builtin_ia32_vfnmaddpd256
   34914       {Intrinsic::x86_avx512_mask_vfnmadd_pd_256, 116602}, // __builtin_ia32_vfnmaddpd256_mask
   34915       {Intrinsic::x86_avx512_mask_vfnmadd_pd_512, 116635}, // __builtin_ia32_vfnmaddpd512_mask
   34916       {Intrinsic::x86_fma_vfnmadd_ps, 126167}, // __builtin_ia32_vfnmaddps
   34917       {Intrinsic::x86_avx512_mask_vfnmadd_ps_128, 116668}, // __builtin_ia32_vfnmaddps128_mask
   34918       {Intrinsic::x86_fma_vfnmadd_ps_256, 126192}, // __builtin_ia32_vfnmaddps256
   34919       {Intrinsic::x86_avx512_mask_vfnmadd_ps_256, 116701}, // __builtin_ia32_vfnmaddps256_mask
   34920       {Intrinsic::x86_avx512_mask_vfnmadd_ps_512, 116734}, // __builtin_ia32_vfnmaddps512_mask
   34921       {Intrinsic::x86_fma_vfnmadd_sd, 126220}, // __builtin_ia32_vfnmaddsd
   34922       {Intrinsic::x86_fma_vfnmadd_ss, 126245}, // __builtin_ia32_vfnmaddss
   34923       {Intrinsic::x86_fma_vfnmsub_pd, 126270}, // __builtin_ia32_vfnmsubpd
   34924       {Intrinsic::x86_avx512_mask_vfnmsub_pd_128, 116767}, // __builtin_ia32_vfnmsubpd128_mask
   34925       {Intrinsic::x86_avx512_mask3_vfnmsub_pd_128, 119411}, // __builtin_ia32_vfnmsubpd128_mask3
   34926       {Intrinsic::x86_fma_vfnmsub_pd_256, 126295}, // __builtin_ia32_vfnmsubpd256
   34927       {Intrinsic::x86_avx512_mask_vfnmsub_pd_256, 116800}, // __builtin_ia32_vfnmsubpd256_mask
   34928       {Intrinsic::x86_avx512_mask3_vfnmsub_pd_256, 119445}, // __builtin_ia32_vfnmsubpd256_mask3
   34929       {Intrinsic::x86_avx512_mask_vfnmsub_pd_512, 116833}, // __builtin_ia32_vfnmsubpd512_mask
   34930       {Intrinsic::x86_avx512_mask3_vfnmsub_pd_512, 119479}, // __builtin_ia32_vfnmsubpd512_mask3
   34931       {Intrinsic::x86_fma_vfnmsub_ps, 126323}, // __builtin_ia32_vfnmsubps
   34932       {Intrinsic::x86_avx512_mask_vfnmsub_ps_128, 116866}, // __builtin_ia32_vfnmsubps128_mask
   34933       {Intrinsic::x86_avx512_mask3_vfnmsub_ps_128, 119513}, // __builtin_ia32_vfnmsubps128_mask3
   34934       {Intrinsic::x86_fma_vfnmsub_ps_256, 126348}, // __builtin_ia32_vfnmsubps256
   34935       {Intrinsic::x86_avx512_mask_vfnmsub_ps_256, 116899}, // __builtin_ia32_vfnmsubps256_mask
   34936       {Intrinsic::x86_avx512_mask3_vfnmsub_ps_256, 119547}, // __builtin_ia32_vfnmsubps256_mask3
   34937       {Intrinsic::x86_avx512_mask_vfnmsub_ps_512, 116932}, // __builtin_ia32_vfnmsubps512_mask
   34938       {Intrinsic::x86_avx512_mask3_vfnmsub_ps_512, 119581}, // __builtin_ia32_vfnmsubps512_mask3
   34939       {Intrinsic::x86_fma_vfnmsub_sd, 126376}, // __builtin_ia32_vfnmsubsd
   34940       {Intrinsic::x86_avx512_mask3_vfnmsub_sd, 119615}, // __builtin_ia32_vfnmsubsd3_mask3
   34941       {Intrinsic::x86_fma_vfnmsub_ss, 126401}, // __builtin_ia32_vfnmsubss
   34942       {Intrinsic::x86_avx512_mask3_vfnmsub_ss, 119647}, // __builtin_ia32_vfnmsubss3_mask3
   34943       {Intrinsic::x86_xop_vfrcz_pd, 133450}, // __builtin_ia32_vfrczpd
   34944       {Intrinsic::x86_xop_vfrcz_pd_256, 133473}, // __builtin_ia32_vfrczpd256
   34945       {Intrinsic::x86_xop_vfrcz_ps, 133499}, // __builtin_ia32_vfrczps
   34946       {Intrinsic::x86_xop_vfrcz_ps_256, 133522}, // __builtin_ia32_vfrczps256
   34947       {Intrinsic::x86_xop_vfrcz_sd, 133548}, // __builtin_ia32_vfrczsd
   34948       {Intrinsic::x86_xop_vfrcz_ss, 133571}, // __builtin_ia32_vfrczss
   34949       {Intrinsic::x86_xop_vpcomb, 133594}, // __builtin_ia32_vpcomb
   34950       {Intrinsic::x86_xop_vpcomd, 133616}, // __builtin_ia32_vpcomd
   34951       {Intrinsic::x86_xop_vpcomq, 133638}, // __builtin_ia32_vpcomq
   34952       {Intrinsic::x86_xop_vpcomub, 133660}, // __builtin_ia32_vpcomub
   34953       {Intrinsic::x86_xop_vpcomud, 133683}, // __builtin_ia32_vpcomud
   34954       {Intrinsic::x86_xop_vpcomuq, 133706}, // __builtin_ia32_vpcomuq
   34955       {Intrinsic::x86_xop_vpcomuw, 133729}, // __builtin_ia32_vpcomuw
   34956       {Intrinsic::x86_xop_vpcomw, 133752}, // __builtin_ia32_vpcomw
   34957       {Intrinsic::x86_avx512_mask_conflict_q_128, 103011}, // __builtin_ia32_vpconflictdi_128_mask
   34958       {Intrinsic::x86_avx512_mask_conflict_q_256, 103048}, // __builtin_ia32_vpconflictdi_256_mask
   34959       {Intrinsic::x86_avx512_mask_conflict_q_512, 103085}, // __builtin_ia32_vpconflictdi_512_mask
   34960       {Intrinsic::x86_avx512_mask_conflict_d_128, 102900}, // __builtin_ia32_vpconflictsi_128_mask
   34961       {Intrinsic::x86_avx512_mask_conflict_d_256, 102937}, // __builtin_ia32_vpconflictsi_256_mask
   34962       {Intrinsic::x86_avx512_mask_conflict_d_512, 102974}, // __builtin_ia32_vpconflictsi_512_mask
   34963       {Intrinsic::x86_avx512_mask_vpermi2var_d_128, 116965}, // __builtin_ia32_vpermi2vard128_mask
   34964       {Intrinsic::x86_avx512_mask_vpermi2var_d_256, 117000}, // __builtin_ia32_vpermi2vard256_mask
   34965       {Intrinsic::x86_avx512_mask_vpermi2var_d_512, 117035}, // __builtin_ia32_vpermi2vard512_mask
   34966       {Intrinsic::x86_avx512_mask_vpermi2var_hi_128, 117070}, // __builtin_ia32_vpermi2varhi128_mask
   34967       {Intrinsic::x86_avx512_mask_vpermi2var_hi_256, 117106}, // __builtin_ia32_vpermi2varhi256_mask
   34968       {Intrinsic::x86_avx512_mask_vpermi2var_hi_512, 117142}, // __builtin_ia32_vpermi2varhi512_mask
   34969       {Intrinsic::x86_avx512_mask_vpermi2var_pd_128, 117178}, // __builtin_ia32_vpermi2varpd128_mask
   34970       {Intrinsic::x86_avx512_mask_vpermi2var_pd_256, 117214}, // __builtin_ia32_vpermi2varpd256_mask
   34971       {Intrinsic::x86_avx512_mask_vpermi2var_pd_512, 117250}, // __builtin_ia32_vpermi2varpd512_mask
   34972       {Intrinsic::x86_avx512_mask_vpermi2var_ps_128, 117286}, // __builtin_ia32_vpermi2varps128_mask
   34973       {Intrinsic::x86_avx512_mask_vpermi2var_ps_256, 117322}, // __builtin_ia32_vpermi2varps256_mask
   34974       {Intrinsic::x86_avx512_mask_vpermi2var_ps_512, 117358}, // __builtin_ia32_vpermi2varps512_mask
   34975       {Intrinsic::x86_avx512_mask_vpermi2var_q_128, 117394}, // __builtin_ia32_vpermi2varq128_mask
   34976       {Intrinsic::x86_avx512_mask_vpermi2var_q_256, 117429}, // __builtin_ia32_vpermi2varq256_mask
   34977       {Intrinsic::x86_avx512_mask_vpermi2var_q_512, 117464}, // __builtin_ia32_vpermi2varq512_mask
   34978       {Intrinsic::x86_avx512_mask_vpermi2var_qi_128, 117499}, // __builtin_ia32_vpermi2varqi128_mask
   34979       {Intrinsic::x86_avx512_mask_vpermi2var_qi_256, 117535}, // __builtin_ia32_vpermi2varqi256_mask
   34980       {Intrinsic::x86_avx512_mask_vpermi2var_qi_512, 117571}, // __builtin_ia32_vpermi2varqi512_mask
   34981       {Intrinsic::x86_xop_vpermil2pd, 133774}, // __builtin_ia32_vpermil2pd
   34982       {Intrinsic::x86_xop_vpermil2pd_256, 133800}, // __builtin_ia32_vpermil2pd256
   34983       {Intrinsic::x86_xop_vpermil2ps, 133829}, // __builtin_ia32_vpermil2ps
   34984       {Intrinsic::x86_xop_vpermil2ps_256, 133855}, // __builtin_ia32_vpermil2ps256
   34985       {Intrinsic::x86_avx_vpermilvar_pd, 96965}, // __builtin_ia32_vpermilvarpd
   34986       {Intrinsic::x86_avx_vpermilvar_pd_256, 96993}, // __builtin_ia32_vpermilvarpd256
   34987       {Intrinsic::x86_avx512_vpermilvar_pd_512, 125146}, // __builtin_ia32_vpermilvarpd512
   34988       {Intrinsic::x86_avx_vpermilvar_ps, 97024}, // __builtin_ia32_vpermilvarps
   34989       {Intrinsic::x86_avx_vpermilvar_ps_256, 97052}, // __builtin_ia32_vpermilvarps256
   34990       {Intrinsic::x86_avx512_vpermilvar_ps_512, 125177}, // __builtin_ia32_vpermilvarps512
   34991       {Intrinsic::x86_avx512_mask_vpermt2var_d_128, 117607}, // __builtin_ia32_vpermt2vard128_mask
   34992       {Intrinsic::x86_avx512_maskz_vpermt2var_d_128, 120633}, // __builtin_ia32_vpermt2vard128_maskz
   34993       {Intrinsic::x86_avx512_mask_vpermt2var_d_256, 117642}, // __builtin_ia32_vpermt2vard256_mask
   34994       {Intrinsic::x86_avx512_maskz_vpermt2var_d_256, 120669}, // __builtin_ia32_vpermt2vard256_maskz
   34995       {Intrinsic::x86_avx512_mask_vpermt2var_d_512, 117677}, // __builtin_ia32_vpermt2vard512_mask
   34996       {Intrinsic::x86_avx512_maskz_vpermt2var_d_512, 120705}, // __builtin_ia32_vpermt2vard512_maskz
   34997       {Intrinsic::x86_avx512_mask_vpermt2var_hi_128, 117712}, // __builtin_ia32_vpermt2varhi128_mask
   34998       {Intrinsic::x86_avx512_maskz_vpermt2var_hi_128, 120741}, // __builtin_ia32_vpermt2varhi128_maskz
   34999       {Intrinsic::x86_avx512_mask_vpermt2var_hi_256, 117748}, // __builtin_ia32_vpermt2varhi256_mask
   35000       {Intrinsic::x86_avx512_maskz_vpermt2var_hi_256, 120778}, // __builtin_ia32_vpermt2varhi256_maskz
   35001       {Intrinsic::x86_avx512_mask_vpermt2var_hi_512, 117784}, // __builtin_ia32_vpermt2varhi512_mask
   35002       {Intrinsic::x86_avx512_maskz_vpermt2var_hi_512, 120815}, // __builtin_ia32_vpermt2varhi512_maskz
   35003       {Intrinsic::x86_avx512_mask_vpermt2var_pd_128, 117820}, // __builtin_ia32_vpermt2varpd128_mask
   35004       {Intrinsic::x86_avx512_maskz_vpermt2var_pd_128, 120852}, // __builtin_ia32_vpermt2varpd128_maskz
   35005       {Intrinsic::x86_avx512_mask_vpermt2var_pd_256, 117856}, // __builtin_ia32_vpermt2varpd256_mask
   35006       {Intrinsic::x86_avx512_maskz_vpermt2var_pd_256, 120889}, // __builtin_ia32_vpermt2varpd256_maskz
   35007       {Intrinsic::x86_avx512_mask_vpermt2var_pd_512, 117892}, // __builtin_ia32_vpermt2varpd512_mask
   35008       {Intrinsic::x86_avx512_maskz_vpermt2var_pd_512, 120926}, // __builtin_ia32_vpermt2varpd512_maskz
   35009       {Intrinsic::x86_avx512_mask_vpermt2var_ps_128, 117928}, // __builtin_ia32_vpermt2varps128_mask
   35010       {Intrinsic::x86_avx512_maskz_vpermt2var_ps_128, 120963}, // __builtin_ia32_vpermt2varps128_maskz
   35011       {Intrinsic::x86_avx512_mask_vpermt2var_ps_256, 117964}, // __builtin_ia32_vpermt2varps256_mask
   35012       {Intrinsic::x86_avx512_maskz_vpermt2var_ps_256, 121000}, // __builtin_ia32_vpermt2varps256_maskz
   35013       {Intrinsic::x86_avx512_mask_vpermt2var_ps_512, 118000}, // __builtin_ia32_vpermt2varps512_mask
   35014       {Intrinsic::x86_avx512_maskz_vpermt2var_ps_512, 121037}, // __builtin_ia32_vpermt2varps512_maskz
   35015       {Intrinsic::x86_avx512_mask_vpermt2var_q_128, 118036}, // __builtin_ia32_vpermt2varq128_mask
   35016       {Intrinsic::x86_avx512_maskz_vpermt2var_q_128, 121074}, // __builtin_ia32_vpermt2varq128_maskz
   35017       {Intrinsic::x86_avx512_mask_vpermt2var_q_256, 118071}, // __builtin_ia32_vpermt2varq256_mask
   35018       {Intrinsic::x86_avx512_maskz_vpermt2var_q_256, 121110}, // __builtin_ia32_vpermt2varq256_maskz
   35019       {Intrinsic::x86_avx512_mask_vpermt2var_q_512, 118106}, // __builtin_ia32_vpermt2varq512_mask
   35020       {Intrinsic::x86_avx512_maskz_vpermt2var_q_512, 121146}, // __builtin_ia32_vpermt2varq512_maskz
   35021       {Intrinsic::x86_avx512_mask_vpermt2var_qi_128, 118141}, // __builtin_ia32_vpermt2varqi128_mask
   35022       {Intrinsic::x86_avx512_maskz_vpermt2var_qi_128, 121182}, // __builtin_ia32_vpermt2varqi128_maskz
   35023       {Intrinsic::x86_avx512_mask_vpermt2var_qi_256, 118177}, // __builtin_ia32_vpermt2varqi256_mask
   35024       {Intrinsic::x86_avx512_maskz_vpermt2var_qi_256, 121219}, // __builtin_ia32_vpermt2varqi256_maskz
   35025       {Intrinsic::x86_avx512_mask_vpermt2var_qi_512, 118213}, // __builtin_ia32_vpermt2varqi512_mask
   35026       {Intrinsic::x86_avx512_maskz_vpermt2var_qi_512, 121256}, // __builtin_ia32_vpermt2varqi512_maskz
   35027       {Intrinsic::x86_xop_vphaddbd, 133884}, // __builtin_ia32_vphaddbd
   35028       {Intrinsic::x86_xop_vphaddbq, 133908}, // __builtin_ia32_vphaddbq
   35029       {Intrinsic::x86_xop_vphaddbw, 133932}, // __builtin_ia32_vphaddbw
   35030       {Intrinsic::x86_xop_vphadddq, 133956}, // __builtin_ia32_vphadddq
   35031       {Intrinsic::x86_xop_vphaddubd, 133980}, // __builtin_ia32_vphaddubd
   35032       {Intrinsic::x86_xop_vphaddubq, 134005}, // __builtin_ia32_vphaddubq
   35033       {Intrinsic::x86_xop_vphaddubw, 134030}, // __builtin_ia32_vphaddubw
   35034       {Intrinsic::x86_xop_vphaddudq, 134055}, // __builtin_ia32_vphaddudq
   35035       {Intrinsic::x86_xop_vphadduwd, 134080}, // __builtin_ia32_vphadduwd
   35036       {Intrinsic::x86_xop_vphadduwq, 134105}, // __builtin_ia32_vphadduwq
   35037       {Intrinsic::x86_xop_vphaddwd, 134130}, // __builtin_ia32_vphaddwd
   35038       {Intrinsic::x86_xop_vphaddwq, 134154}, // __builtin_ia32_vphaddwq
   35039       {Intrinsic::x86_xop_vphsubbw, 134178}, // __builtin_ia32_vphsubbw
   35040       {Intrinsic::x86_xop_vphsubdq, 134202}, // __builtin_ia32_vphsubdq
   35041       {Intrinsic::x86_xop_vphsubwd, 134226}, // __builtin_ia32_vphsubwd
   35042       {Intrinsic::x86_xop_vpmacsdd, 134250}, // __builtin_ia32_vpmacsdd
   35043       {Intrinsic::x86_xop_vpmacsdqh, 134274}, // __builtin_ia32_vpmacsdqh
   35044       {Intrinsic::x86_xop_vpmacsdql, 134299}, // __builtin_ia32_vpmacsdql
   35045       {Intrinsic::x86_xop_vpmacssdd, 134324}, // __builtin_ia32_vpmacssdd
   35046       {Intrinsic::x86_xop_vpmacssdqh, 134349}, // __builtin_ia32_vpmacssdqh
   35047       {Intrinsic::x86_xop_vpmacssdql, 134375}, // __builtin_ia32_vpmacssdql
   35048       {Intrinsic::x86_xop_vpmacsswd, 134401}, // __builtin_ia32_vpmacsswd
   35049       {Intrinsic::x86_xop_vpmacssww, 134426}, // __builtin_ia32_vpmacssww
   35050       {Intrinsic::x86_xop_vpmacswd, 134451}, // __builtin_ia32_vpmacswd
   35051       {Intrinsic::x86_xop_vpmacsww, 134475}, // __builtin_ia32_vpmacsww
   35052       {Intrinsic::x86_xop_vpmadcsswd, 134499}, // __builtin_ia32_vpmadcsswd
   35053       {Intrinsic::x86_xop_vpmadcswd, 134525}, // __builtin_ia32_vpmadcswd
   35054       {Intrinsic::x86_avx512_mask_vpmadd52h_uq_128, 118249}, // __builtin_ia32_vpmadd52huq128_mask
   35055       {Intrinsic::x86_avx512_maskz_vpmadd52h_uq_128, 121293}, // __builtin_ia32_vpmadd52huq128_maskz
   35056       {Intrinsic::x86_avx512_mask_vpmadd52h_uq_256, 118284}, // __builtin_ia32_vpmadd52huq256_mask
   35057       {Intrinsic::x86_avx512_maskz_vpmadd52h_uq_256, 121329}, // __builtin_ia32_vpmadd52huq256_maskz
   35058       {Intrinsic::x86_avx512_mask_vpmadd52h_uq_512, 118319}, // __builtin_ia32_vpmadd52huq512_mask
   35059       {Intrinsic::x86_avx512_maskz_vpmadd52h_uq_512, 121365}, // __builtin_ia32_vpmadd52huq512_maskz
   35060       {Intrinsic::x86_avx512_mask_vpmadd52l_uq_128, 118354}, // __builtin_ia32_vpmadd52luq128_mask
   35061       {Intrinsic::x86_avx512_maskz_vpmadd52l_uq_128, 121401}, // __builtin_ia32_vpmadd52luq128_maskz
   35062       {Intrinsic::x86_avx512_mask_vpmadd52l_uq_256, 118389}, // __builtin_ia32_vpmadd52luq256_mask
   35063       {Intrinsic::x86_avx512_maskz_vpmadd52l_uq_256, 121437}, // __builtin_ia32_vpmadd52luq256_maskz
   35064       {Intrinsic::x86_avx512_mask_vpmadd52l_uq_512, 118424}, // __builtin_ia32_vpmadd52luq512_mask
   35065       {Intrinsic::x86_avx512_maskz_vpmadd52l_uq_512, 121473}, // __builtin_ia32_vpmadd52luq512_maskz
   35066       {Intrinsic::x86_avx512_mask_pmultishift_qb_128, 112821}, // __builtin_ia32_vpmultishiftqb128_mask
   35067       {Intrinsic::x86_avx512_mask_pmultishift_qb_256, 112859}, // __builtin_ia32_vpmultishiftqb256_mask
   35068       {Intrinsic::x86_avx512_mask_pmultishift_qb_512, 112897}, // __builtin_ia32_vpmultishiftqb512_mask
   35069       {Intrinsic::x86_xop_vpperm, 134550}, // __builtin_ia32_vpperm
   35070       {Intrinsic::x86_xop_vprotb, 134572}, // __builtin_ia32_vprotb
   35071       {Intrinsic::x86_xop_vprotbi, 134594}, // __builtin_ia32_vprotbi
   35072       {Intrinsic::x86_xop_vprotd, 134617}, // __builtin_ia32_vprotd
   35073       {Intrinsic::x86_xop_vprotdi, 134639}, // __builtin_ia32_vprotdi
   35074       {Intrinsic::x86_xop_vprotq, 134662}, // __builtin_ia32_vprotq
   35075       {Intrinsic::x86_xop_vprotqi, 134684}, // __builtin_ia32_vprotqi
   35076       {Intrinsic::x86_xop_vprotw, 134707}, // __builtin_ia32_vprotw
   35077       {Intrinsic::x86_xop_vprotwi, 134729}, // __builtin_ia32_vprotwi
   35078       {Intrinsic::x86_xop_vpshab, 134752}, // __builtin_ia32_vpshab
   35079       {Intrinsic::x86_xop_vpshad, 134774}, // __builtin_ia32_vpshad
   35080       {Intrinsic::x86_xop_vpshaq, 134796}, // __builtin_ia32_vpshaq
   35081       {Intrinsic::x86_xop_vpshaw, 134818}, // __builtin_ia32_vpshaw
   35082       {Intrinsic::x86_xop_vpshlb, 134840}, // __builtin_ia32_vpshlb
   35083       {Intrinsic::x86_xop_vpshld, 134862}, // __builtin_ia32_vpshld
   35084       {Intrinsic::x86_xop_vpshlq, 134884}, // __builtin_ia32_vpshlq
   35085       {Intrinsic::x86_xop_vpshlw, 134906}, // __builtin_ia32_vpshlw
   35086       {Intrinsic::x86_avx_vtestc_pd, 97083}, // __builtin_ia32_vtestcpd
   35087       {Intrinsic::x86_avx_vtestc_pd_256, 97107}, // __builtin_ia32_vtestcpd256
   35088       {Intrinsic::x86_avx_vtestc_ps, 97134}, // __builtin_ia32_vtestcps
   35089       {Intrinsic::x86_avx_vtestc_ps_256, 97158}, // __builtin_ia32_vtestcps256
   35090       {Intrinsic::x86_avx_vtestnzc_pd, 97185}, // __builtin_ia32_vtestnzcpd
   35091       {Intrinsic::x86_avx_vtestnzc_pd_256, 97211}, // __builtin_ia32_vtestnzcpd256
   35092       {Intrinsic::x86_avx_vtestnzc_ps, 97240}, // __builtin_ia32_vtestnzcps
   35093       {Intrinsic::x86_avx_vtestnzc_ps_256, 97266}, // __builtin_ia32_vtestnzcps256
   35094       {Intrinsic::x86_avx_vtestz_pd, 97295}, // __builtin_ia32_vtestzpd
   35095       {Intrinsic::x86_avx_vtestz_pd_256, 97319}, // __builtin_ia32_vtestzpd256
   35096       {Intrinsic::x86_avx_vtestz_ps, 97346}, // __builtin_ia32_vtestzps
   35097       {Intrinsic::x86_avx_vtestz_ps_256, 97370}, // __builtin_ia32_vtestzps256
   35098       {Intrinsic::x86_avx_vzeroall, 97397}, // __builtin_ia32_vzeroall
   35099       {Intrinsic::x86_avx_vzeroupper, 97421}, // __builtin_ia32_vzeroupper
   35100       {Intrinsic::x86_wrfsbase_32, 133260}, // __builtin_ia32_wrfsbase32
   35101       {Intrinsic::x86_wrfsbase_64, 133286}, // __builtin_ia32_wrfsbase64
   35102       {Intrinsic::x86_wrgsbase_32, 133312}, // __builtin_ia32_wrgsbase32
   35103       {Intrinsic::x86_wrgsbase_64, 133338}, // __builtin_ia32_wrgsbase64
   35104       {Intrinsic::x86_flags_write_u32, 125524}, // __builtin_ia32_writeeflags_u32
   35105       {Intrinsic::x86_flags_write_u64, 125555}, // __builtin_ia32_writeeflags_u64
   35106       {Intrinsic::x86_wrpkru, 133364}, // __builtin_ia32_wrpkru
   35107       {Intrinsic::x86_xabort, 133386}, // __builtin_ia32_xabort
   35108       {Intrinsic::x86_xbegin, 133408}, // __builtin_ia32_xbegin
   35109       {Intrinsic::x86_xend, 133430}, // __builtin_ia32_xend
   35110       {Intrinsic::x86_xtest, 134928}, // __builtin_ia32_xtest
   35111     };
   35112     auto I = std::lower_bound(std::begin(x86Names),
   35113                               std::end(x86Names),
   35114                               BuiltinNameStr);
   35115     if (I != std::end(x86Names) &&
   35116         I->getName() == BuiltinNameStr)
   35117       return I->IntrinID;
   35118   }
   35119   if (TargetPrefix == "xcore") {
   35120     static const BuiltinEntry xcoreNames[] = {
   35121       {Intrinsic::xcore_bitrev, 134949}, // __builtin_bitrev
   35122       {Intrinsic::xcore_getid, 134966}, // __builtin_getid
   35123       {Intrinsic::xcore_getps, 134982}, // __builtin_getps
   35124       {Intrinsic::xcore_setps, 134998}, // __builtin_setps
   35125     };
   35126     auto I = std::lower_bound(std::begin(xcoreNames),
   35127                               std::end(xcoreNames),
   35128                               BuiltinNameStr);
   35129     if (I != std::end(xcoreNames) &&
   35130         I->getName() == BuiltinNameStr)
   35131       return I->IntrinID;
   35132   }
   35133   return Intrinsic::not_intrinsic;
   35134 }
   35135 #endif
   35136 
   35137 // Get the LLVM intrinsic that corresponds to a builtin.
   35138 // This is used by the C front-end.  The builtin name is passed
   35139 // in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
   35140 // in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
   35141 #ifdef GET_LLVM_INTRINSIC_FOR_MS_BUILTIN
   35142 Intrinsic::ID Intrinsic::getIntrinsicForMSBuiltin(const char *TargetPrefixStr, StringRef BuiltinNameStr) {
   35143   static const char BuiltinNames[] = {
   35144   '_', '_', 'd', 'm', 'b', '\000', '_', '_', 'd', 's', 'b', '\000', '_', '_', 'i',
   35145   's', 'b', '\000', '_', 'M', 'o', 'v', 'e', 'F', 'r', 'o', 'm', 'C', 'o', 'p',
   35146   'r', 'o', 'c', 'e', 's', 's', 'o', 'r', '\000', '_', 'M', 'o', 'v', 'e', 'F',
   35147   'r', 'o', 'm', 'C', 'o', 'p', 'r', 'o', 'c', 'e', 's', 's', 'o', 'r', '2',
   35148   '\000',
   35149   };
   35150 
   35151   struct BuiltinEntry {
   35152     Intrinsic::ID IntrinID;
   35153     unsigned StrTabOffset;
   35154     const char *getName() const {
   35155       return &BuiltinNames[StrTabOffset];
   35156     }
   35157     bool operator<(StringRef RHS) const {
   35158       return strncmp(getName(), RHS.data(), RHS.size()) < 0;
   35159     }
   35160   };
   35161   StringRef TargetPrefix(TargetPrefixStr);
   35162 
   35163   if (TargetPrefix == "aarch64") {
   35164     static const BuiltinEntry aarch64Names[] = {
   35165       {Intrinsic::aarch64_dmb, 0}, // __dmb
   35166       {Intrinsic::aarch64_dsb, 6}, // __dsb
   35167       {Intrinsic::aarch64_isb, 12}, // __isb
   35168     };
   35169     auto I = std::lower_bound(std::begin(aarch64Names),
   35170                               std::end(aarch64Names),
   35171                               BuiltinNameStr);
   35172     if (I != std::end(aarch64Names) &&
   35173         I->getName() == BuiltinNameStr)
   35174       return I->IntrinID;
   35175   }
   35176   if (TargetPrefix == "arm") {
   35177     static const BuiltinEntry armNames[] = {
   35178       {Intrinsic::arm_mrc, 18}, // _MoveFromCoprocessor
   35179       {Intrinsic::arm_mrc2, 39}, // _MoveFromCoprocessor2
   35180       {Intrinsic::arm_dmb, 0}, // __dmb
   35181       {Intrinsic::arm_dsb, 6}, // __dsb
   35182       {Intrinsic::arm_isb, 12}, // __isb
   35183     };
   35184     auto I = std::lower_bound(std::begin(armNames),
   35185                               std::end(armNames),
   35186                               BuiltinNameStr);
   35187     if (I != std::end(armNames) &&
   35188         I->getName() == BuiltinNameStr)
   35189       return I->IntrinID;
   35190   }
   35191   return Intrinsic::not_intrinsic;
   35192 }
   35193 #endif
   35194 
   35195 #if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
   35196 // let's return it to _setjmp state
   35197 #  pragma pop_macro("setjmp")
   35198 #  undef setjmp_undefined_for_msvc
   35199 #endif
   35200 
   35201