1 //===- IntrinsicsHexagon.td - Defines Hexagon intrinsics ---*- tablegen -*-===// 2 // The LLVM Compiler Infrastructure 3 // 4 // This file is distributed under the University of Illinois Open Source 5 // License. See LICENSE.TXT for details. 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines all of the Hexagon-specific intrinsics. 10 // 11 //===----------------------------------------------------------------------===// 12 13 //===----------------------------------------------------------------------===// 14 // Definitions for all Hexagon intrinsics. 15 // 16 // All Hexagon intrinsics start with "llvm.hexagon.". 17 let TargetPrefix = "hexagon" in { 18 /// Hexagon_Intrinsic - Base class for all Hexagon intrinsics. 19 class Hexagon_Intrinsic<string GCCIntSuffix, list<LLVMType> ret_types, 20 list<LLVMType> param_types, 21 list<IntrinsicProperty> properties> 22 : GCCBuiltin<!strconcat("__builtin_", GCCIntSuffix)>, 23 Intrinsic<ret_types, param_types, properties>; 24 } 25 26 //===----------------------------------------------------------------------===// 27 // 28 // DEF_FUNCTION_TYPE_1(QI_ftype_MEM,BT_BOOL,BT_PTR) -> 29 // Hexagon_qi_mem_Intrinsic<string GCCIntSuffix> 30 // 31 class Hexagon_qi_mem_Intrinsic<string GCCIntSuffix> 32 : Hexagon_Intrinsic<GCCIntSuffix, 33 [llvm_i1_ty], [llvm_ptr_ty], 34 [IntrNoMem]>; 35 // 36 // DEF_FUNCTION_TYPE_1(HI_ftype_SI,BT_I16,BT_INT) -> 37 // Hexagon_hi_si_Intrinsic<string GCCIntSuffix> 38 // 39 class Hexagon_hi_si_Intrinsic<string GCCIntSuffix> 40 : Hexagon_Intrinsic<GCCIntSuffix, 41 [llvm_i16_ty], [llvm_i32_ty], 42 [IntrNoMem]>; 43 // 44 // DEF_FUNCTION_TYPE_1(SI_ftype_SI,BT_INT,BT_INT) -> 45 // Hexagon_si_si_Intrinsic<string GCCIntSuffix> 46 // 47 class Hexagon_si_si_Intrinsic<string GCCIntSuffix> 48 : Hexagon_Intrinsic<GCCIntSuffix, 49 [llvm_i32_ty], [llvm_i32_ty], 50 [IntrNoMem]>; 51 // 52 // DEF_FUNCTION_TYPE_1(DI_ftype_SI,BT_LONGLONG,BT_INT) -> 53 // Hexagon_di_si_Intrinsic<string GCCIntSuffix> 54 // 55 class Hexagon_di_si_Intrinsic<string GCCIntSuffix> 56 : Hexagon_Intrinsic<GCCIntSuffix, 57 [llvm_i64_ty], [llvm_i32_ty], 58 [IntrNoMem]>; 59 // 60 // DEF_FUNCTION_TYPE_1(SI_ftype_DI,BT_INT,BT_LONGLONG) -> 61 // Hexagon_si_di_Intrinsic<string GCCIntSuffix> 62 // 63 class Hexagon_si_di_Intrinsic<string GCCIntSuffix> 64 : Hexagon_Intrinsic<GCCIntSuffix, 65 [llvm_i32_ty], [llvm_i64_ty], 66 [IntrNoMem]>; 67 // 68 // DEF_FUNCTION_TYPE_1(DI_ftype_DI,BT_LONGLONG,BT_LONGLONG) -> 69 // Hexagon_di_di_Intrinsic<string GCCIntSuffix> 70 // 71 class Hexagon_di_di_Intrinsic<string GCCIntSuffix> 72 : Hexagon_Intrinsic<GCCIntSuffix, 73 [llvm_i64_ty], [llvm_i64_ty], 74 [IntrNoMem]>; 75 // 76 // DEF_FUNCTION_TYPE_1(QI_ftype_QI,BT_BOOL,BT_BOOL) -> 77 // Hexagon_qi_qi_Intrinsic<string GCCIntSuffix> 78 // 79 class Hexagon_qi_qi_Intrinsic<string GCCIntSuffix> 80 : Hexagon_Intrinsic<GCCIntSuffix, 81 [llvm_i1_ty], [llvm_i32_ty], 82 [IntrNoMem]>; 83 // 84 // DEF_FUNCTION_TYPE_1(QI_ftype_SI,BT_BOOL,BT_INT) -> 85 // Hexagon_qi_si_Intrinsic<string GCCIntSuffix> 86 // 87 class Hexagon_qi_si_Intrinsic<string GCCIntSuffix> 88 : Hexagon_Intrinsic<GCCIntSuffix, 89 [llvm_i1_ty], [llvm_i32_ty], 90 [IntrNoMem]>; 91 // 92 // DEF_FUNCTION_TYPE_1(DI_ftype_QI,BT_LONGLONG,BT_BOOL) -> 93 // Hexagon_di_qi_Intrinsic<string GCCIntSuffix> 94 // 95 class Hexagon_di_qi_Intrinsic<string GCCIntSuffix> 96 : Hexagon_Intrinsic<GCCIntSuffix, 97 [llvm_i64_ty], [llvm_i32_ty], 98 [IntrNoMem]>; 99 // 100 // DEF_FUNCTION_TYPE_1(SI_ftype_QI,BT_INT,BT_BOOL) -> 101 // Hexagon_si_qi_Intrinsic<string GCCIntSuffix> 102 // 103 class Hexagon_si_qi_Intrinsic<string GCCIntSuffix> 104 : Hexagon_Intrinsic<GCCIntSuffix, 105 [llvm_i32_ty], [llvm_i32_ty], 106 [IntrNoMem]>; 107 // 108 // DEF_FUNCTION_TYPE_2(QI_ftype_SISI,BT_BOOL,BT_INT,BT_INT) -> 109 // Hexagon_qi_sisi_Intrinsic<string GCCIntSuffix> 110 // 111 class Hexagon_qi_sisi_Intrinsic<string GCCIntSuffix> 112 : Hexagon_Intrinsic<GCCIntSuffix, 113 [llvm_i1_ty], [llvm_i32_ty, llvm_i32_ty], 114 [IntrNoMem]>; 115 // 116 // DEF_FUNCTION_TYPE_2(void_ftype_SISI,BT_VOID,BT_INT,BT_INT) -> 117 // Hexagon_void_sisi_Intrinsic<string GCCIntSuffix> 118 // 119 class Hexagon_void_sisi_Intrinsic<string GCCIntSuffix> 120 : Hexagon_Intrinsic<GCCIntSuffix, 121 [llvm_void_ty], [llvm_i32_ty, llvm_i32_ty], 122 [IntrNoMem]>; 123 // 124 // DEF_FUNCTION_TYPE_2(SI_ftype_SISI,BT_INT,BT_INT,BT_INT) -> 125 // Hexagon_si_sisi_Intrinsic<string GCCIntSuffix> 126 // 127 class Hexagon_si_sisi_Intrinsic<string GCCIntSuffix> 128 : Hexagon_Intrinsic<GCCIntSuffix, 129 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 130 [IntrNoMem]>; 131 // 132 // DEF_FUNCTION_TYPE_2(USI_ftype_SISI,BT_UINT,BT_INT,BT_INT) -> 133 // Hexagon_usi_sisi_Intrinsic<string GCCIntSuffix> 134 // 135 class Hexagon_usi_sisi_Intrinsic<string GCCIntSuffix> 136 : Hexagon_Intrinsic<GCCIntSuffix, 137 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 138 [IntrNoMem]>; 139 // 140 // DEF_FUNCTION_TYPE_2(DI_ftype_SISI,BT_LONGLONG,BT_INT,BT_INT) -> 141 // Hexagon_di_sisi_Intrinsic<string GCCIntSuffix> 142 // 143 class Hexagon_di_sisi_Intrinsic<string GCCIntSuffix> 144 : Hexagon_Intrinsic<GCCIntSuffix, 145 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty], 146 [IntrNoMem]>; 147 // 148 // DEF_FUNCTION_TYPE_2(UDI_ftype_SISI,BT_ULONGLONG,BT_INT,BT_INT) -> 149 // Hexagon_udi_sisi_Intrinsic<string GCCIntSuffix> 150 // 151 class Hexagon_udi_sisi_Intrinsic<string GCCIntSuffix> 152 : Hexagon_Intrinsic<GCCIntSuffix, 153 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty], 154 [IntrNoMem]>; 155 // 156 // DEF_FUNCTION_TYPE_2(DI_ftype_SIDI,BT_LONGLONG,BT_INT,BT_LONGLONG) -> 157 // Hexagon_di_sidi_Intrinsic<string GCCIntSuffix> 158 // 159 class Hexagon_di_sidi_Intrinsic<string GCCIntSuffix> 160 : Hexagon_Intrinsic<GCCIntSuffix, 161 [llvm_i64_ty], [llvm_i32_ty, llvm_i64_ty], 162 [IntrNoMem]>; 163 // 164 // DEF_FUNCTION_TYPE_2(DI_ftype_DISI,BT_LONGLONG,BT_LONGLONG,BT_INT) -> 165 // Hexagon_di_disi_Intrinsic<string GCCIntSuffix> 166 // 167 class Hexagon_di_disi_Intrinsic<string GCCIntSuffix> 168 : Hexagon_Intrinsic<GCCIntSuffix, 169 [llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], 170 [IntrNoMem]>; 171 // 172 // DEF_FUNCTION_TYPE_2(SI_ftype_SIDI,BT_INT,BT_INT,BT_LONGLONG) -> 173 // Hexagon_si_sidi_Intrinsic<string GCCIntSuffix> 174 // 175 class Hexagon_si_sidi_Intrinsic<string GCCIntSuffix> 176 : Hexagon_Intrinsic<GCCIntSuffix, 177 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty], 178 [IntrNoMem]>; 179 // 180 // DEF_FUNCTION_TYPE_2(SI_ftype_DIDI,BT_INT,BT_LONGLONG,BT_LONGLONG) -> 181 // Hexagon_si_didi_Intrinsic<string GCCIntSuffix> 182 // 183 class Hexagon_si_didi_Intrinsic<string GCCIntSuffix> 184 : Hexagon_Intrinsic<GCCIntSuffix, 185 [llvm_i32_ty], [llvm_i64_ty, llvm_i64_ty], 186 [IntrNoMem]>; 187 // 188 // DEF_FUNCTION_TYPE_2(DI_ftype_DIDI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG) -> 189 // Hexagon_di_didi_Intrinsic<string GCCIntSuffix> 190 // 191 class Hexagon_di_didi_Intrinsic<string GCCIntSuffix> 192 : Hexagon_Intrinsic<GCCIntSuffix, 193 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], 194 [IntrNoMem]>; 195 // 196 // DEF_FUNCTION_TYPE_2(UDI_ftype_DIDI,BT_ULONGLONG,BT_LONGLONG,BT_LONGLONG) -> 197 // Hexagon_udi_didi_Intrinsic<string GCCIntSuffix> 198 // 199 class Hexagon_udi_didi_Intrinsic<string GCCIntSuffix> 200 : Hexagon_Intrinsic<GCCIntSuffix, 201 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], 202 [IntrNoMem]>; 203 // 204 // DEF_FUNCTION_TYPE_2(SI_ftype_DISI,BT_INT,BT_LONGLONG,BT_INT) -> 205 // Hexagon_si_disi_Intrinsic<string GCCIntSuffix> 206 // 207 class Hexagon_si_disi_Intrinsic<string GCCIntSuffix> 208 : Hexagon_Intrinsic<GCCIntSuffix, 209 [llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], 210 [IntrNoMem]>; 211 // 212 // DEF_FUNCTION_TYPE_2(QI_ftype_DIDI,BT_BOOL,BT_LONGLONG,BT_LONGLONG) -> 213 // Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 214 // 215 class Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 216 : Hexagon_Intrinsic<GCCIntSuffix, 217 [llvm_i1_ty], [llvm_i64_ty, llvm_i64_ty], 218 [IntrNoMem]>; 219 // 220 // DEF_FUNCTION_TYPE_2(QI_ftype_SIDI,BT_BOOL,BT_INT,BT_LONGLONG) -> 221 // Hexagon_qi_didi_Intrinsic<string GCCIntSuffix> 222 // 223 class Hexagon_qi_sidi_Intrinsic<string GCCIntSuffix> 224 : Hexagon_Intrinsic<GCCIntSuffix, 225 [llvm_i1_ty], [llvm_i32_ty, llvm_i64_ty], 226 [IntrNoMem]>; 227 // 228 // DEF_FUNCTION_TYPE_2(QI_ftype_DISI,BT_BOOL,BT_LONGLONG,BT_INT) -> 229 // Hexagon_qi_disi_Intrinsic<string GCCIntSuffix> 230 // 231 class Hexagon_qi_disi_Intrinsic<string GCCIntSuffix> 232 : Hexagon_Intrinsic<GCCIntSuffix, 233 [llvm_i1_ty], [llvm_i64_ty, llvm_i32_ty], 234 [IntrNoMem]>; 235 // 236 // DEF_FUNCTION_TYPE_2(QI_ftype_QIQI,BT_BOOL,BT_BOOL,BT_BOOL) -> 237 // Hexagon_qi_qiqi_Intrinsic<string GCCIntSuffix> 238 // 239 class Hexagon_qi_qiqi_Intrinsic<string GCCIntSuffix> 240 : Hexagon_Intrinsic<GCCIntSuffix, 241 [llvm_i1_ty], [llvm_i32_ty, llvm_i32_ty], 242 [IntrNoMem]>; 243 // 244 // DEF_FUNCTION_TYPE_2(QI_ftype_QIQIQI,BT_BOOL,BT_BOOL,BT_BOOL) -> 245 // Hexagon_qi_qiqiqi_Intrinsic<string GCCIntSuffix> 246 // 247 class Hexagon_qi_qiqiqi_Intrinsic<string GCCIntSuffix> 248 : Hexagon_Intrinsic<GCCIntSuffix, 249 [llvm_i1_ty], [llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], 250 [IntrNoMem]>; 251 // 252 // DEF_FUNCTION_TYPE_2(SI_ftype_QIQI,BT_INT,BT_BOOL,BT_BOOL) -> 253 // Hexagon_si_qiqi_Intrinsic<string GCCIntSuffix> 254 // 255 class Hexagon_si_qiqi_Intrinsic<string GCCIntSuffix> 256 : Hexagon_Intrinsic<GCCIntSuffix, 257 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], 258 [IntrNoMem]>; 259 // 260 // DEF_FUNCTION_TYPE_2(SI_ftype_QISI,BT_INT,BT_BOOL,BT_INT) -> 261 // Hexagon_si_qisi_Intrinsic<string GCCIntSuffix> 262 // 263 class Hexagon_si_qisi_Intrinsic<string GCCIntSuffix> 264 : Hexagon_Intrinsic<GCCIntSuffix, 265 [llvm_i32_ty], [llvm_i1_ty, llvm_i32_ty], 266 [IntrNoMem]>; 267 // 268 // DEF_FUNCTION_TYPE_3(void_ftype_SISISI,BT_VOID,BT_INT,BT_INT,BT_INT) -> 269 // Hexagon_void_sisisi_Intrinsic<string GCCIntSuffix> 270 // 271 class Hexagon_void_sisisi_Intrinsic<string GCCIntSuffix> 272 : Hexagon_Intrinsic<GCCIntSuffix, 273 [llvm_void_ty], [llvm_i32_ty, llvm_i32_ty, 274 llvm_i32_ty], 275 [IntrNoMem]>; 276 // 277 // DEF_FUNCTION_TYPE_3(SI_ftype_SISISI,BT_INT,BT_INT,BT_INT,BT_INT) -> 278 // Hexagon_si_sisisi_Intrinsic<string GCCIntSuffix> 279 // 280 class Hexagon_si_sisisi_Intrinsic<string GCCIntSuffix> 281 : Hexagon_Intrinsic<GCCIntSuffix, 282 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 283 llvm_i32_ty], 284 [IntrNoMem]>; 285 // 286 // DEF_FUNCTION_TYPE_3(DI_ftype_SISISI,BT_LONGLONG,BT_INT,BT_INT,BT_INT) -> 287 // Hexagon_di_sisisi_Intrinsic<string GCCIntSuffix> 288 // 289 class Hexagon_di_sisisi_Intrinsic<string GCCIntSuffix> 290 : Hexagon_Intrinsic<GCCIntSuffix, 291 [llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, 292 llvm_i32_ty], 293 [IntrNoMem]>; 294 // 295 // DEF_FUNCTION_TYPE_3(SI_ftype_DISISI,BT_INT,BT_LONGLONG,BT_INT,BT_INT) -> 296 // Hexagon_si_disisi_Intrinsic<string GCCIntSuffix> 297 // 298 class Hexagon_si_disisi_Intrinsic<string GCCIntSuffix> 299 : Hexagon_Intrinsic<GCCIntSuffix, 300 [llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty, 301 llvm_i32_ty], 302 [IntrNoMem]>; 303 // 304 // DEF_FUNCTION_TYPE_3(DI_ftype_DISISI,BT_LONGLONG,BT_LONGLONG,BT_INT,BT_INT) -> 305 // Hexagon_di_disisi_Intrinsic<string GCCIntSuffix> 306 // 307 class Hexagon_di_disisi_Intrinsic<string GCCIntSuffix> 308 : Hexagon_Intrinsic<GCCIntSuffix, 309 [llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, 310 llvm_i32_ty], 311 [IntrNoMem]>; 312 // 313 // DEF_FUNCTION_TYPE_3(SI_ftype_SIDISI,BT_INT,BT_INT,BT_LONGLONG,BT_INT) -> 314 // Hexagon_si_sidisi_Intrinsic<string GCCIntSuffix> 315 // 316 class Hexagon_si_sidisi_Intrinsic<string GCCIntSuffix> 317 : Hexagon_Intrinsic<GCCIntSuffix, 318 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty, 319 llvm_i32_ty], 320 [IntrNoMem]>; 321 // 322 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDISI,BT_LONGLONG,BT_LONGLONG, 323 // BT_LONGLONG,BT_INT) -> 324 // Hexagon_di_didisi_Intrinsic<string GCCIntSuffix> 325 // 326 class Hexagon_di_didisi_Intrinsic<string GCCIntSuffix> 327 : Hexagon_Intrinsic<GCCIntSuffix, 328 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 329 llvm_i32_ty], 330 [IntrNoMem]>; 331 // 332 // DEF_FUNCTION_TYPE_3(SI_ftype_SIDIDI,BT_INT,BT_INT,BT_LONGLONG,BT_LONGLONG) -> 333 // Hexagon_si_sididi_Intrinsic<string GCCIntSuffix> 334 // 335 class Hexagon_si_sididi_Intrinsic<string GCCIntSuffix> 336 : Hexagon_Intrinsic<GCCIntSuffix, 337 [llvm_i32_ty], [llvm_i32_ty, llvm_i64_ty, 338 llvm_i64_ty], 339 [IntrNoMem]>; 340 // 341 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDIDI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG, 342 // BT_LONGLONG) -> 343 // Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 344 // 345 class Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 346 : Hexagon_Intrinsic<GCCIntSuffix, 347 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 348 llvm_i64_ty], 349 [IntrNoMem]>; 350 // 351 // DEF_FUNCTION_TYPE_3(SI_ftype_SISIDI,BT_INT,BT_INT,BT_INT,BT_LONGLONG) -> 352 // Hexagon_si_sisidi_Intrinsic<string GCCIntSuffix> 353 // 354 class Hexagon_si_sisidi_Intrinsic<string GCCIntSuffix> 355 : Hexagon_Intrinsic<GCCIntSuffix, 356 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 357 llvm_i64_ty], 358 [IntrNoMem]>; 359 // 360 // DEF_FUNCTION_TYPE_3(SI_ftype_QISISI,BT_INT,BT_BOOL,BT_INT,BT_INT) -> 361 // Hexagon_si_qisisi_Intrinsic<string GCCIntSuffix> 362 // 363 class Hexagon_si_qisisi_Intrinsic<string GCCIntSuffix> 364 : Hexagon_Intrinsic<GCCIntSuffix, 365 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 366 llvm_i32_ty], 367 [IntrNoMem]>; 368 // 369 // DEF_FUNCTION_TYPE_3(DI_ftype_QISISI,BT_LONGLONG,BT_BOOL,BT_INT,BT_INT) -> 370 // Hexagon_di_qisisi_Intrinsic<string GCCIntSuffix> 371 // 372 class Hexagon_di_qisisi_Intrinsic<string GCCIntSuffix> 373 : Hexagon_Intrinsic<GCCIntSuffix, 374 [llvm_i64_ty], [llvm_i1_ty, llvm_i32_ty, 375 llvm_i32_ty], 376 [IntrNoMem]>; 377 // 378 // DEF_FUNCTION_TYPE_3(DI_ftype_QIDIDI,BT_LONGLONG,BT_BOOL,BT_LONGLONG, 379 // BT_LONGLONG) -> 380 // Hexagon_di_qididi_Intrinsic<string GCCIntSuffix> 381 // 382 class Hexagon_di_qididi_Intrinsic<string GCCIntSuffix> 383 : Hexagon_Intrinsic<GCCIntSuffix, 384 [llvm_i64_ty], [llvm_i32_ty, llvm_i64_ty, 385 llvm_i64_ty], 386 [IntrNoMem]>; 387 // 388 // DEF_FUNCTION_TYPE_3(DI_ftype_DIDIQI,BT_LONGLONG,BT_LONGLONG,BT_LONGLONG, 389 // BT_BOOL) -> 390 // Hexagon_di_didiqi_Intrinsic<string GCCIntSuffix> 391 // 392 class Hexagon_di_didiqi_Intrinsic<string GCCIntSuffix> 393 : Hexagon_Intrinsic<GCCIntSuffix, 394 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 395 llvm_i32_ty], 396 [IntrNoMem]>; 397 // 398 // DEF_FUNCTION_TYPE_4(SI_ftype_SISISISI,BT_INT,BT_INT,BT_INT,BT_INT,BT_INT) -> 399 // Hexagon_si_sisisisi_Intrinsic<string GCCIntSuffix> 400 // 401 class Hexagon_si_sisisisi_Intrinsic<string GCCIntSuffix> 402 : Hexagon_Intrinsic<GCCIntSuffix, 403 [llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, 404 llvm_i32_ty, llvm_i32_ty], 405 [IntrNoMem]>; 406 // 407 // DEF_FUNCTION_TYPE_4(DI_ftype_DIDISISI,BT_LONGLONG,BT_LONGLONG, 408 // BT_LONGLONG,BT_INT,BT_INT) -> 409 // Hexagon_di_didisisi_Intrinsic<string GCCIntSuffix> 410 // 411 class Hexagon_di_didisisi_Intrinsic<string GCCIntSuffix> 412 : Hexagon_Intrinsic<GCCIntSuffix, 413 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 414 llvm_i32_ty, llvm_i32_ty], 415 [IntrNoMem]>; 416 417 class Hexagon_mem_memmemsi_Intrinsic<string GCCIntSuffix> 418 : Hexagon_Intrinsic<GCCIntSuffix, 419 [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty, 420 llvm_i32_ty], 421 [IntrArgMemOnly]>; 422 423 class Hexagon_mem_memsisi_Intrinsic<string GCCIntSuffix> 424 : Hexagon_Intrinsic<GCCIntSuffix, 425 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty, 426 llvm_i32_ty], 427 [IntrArgMemOnly]>; 428 429 class Hexagon_mem_memdisi_Intrinsic<string GCCIntSuffix> 430 : Hexagon_Intrinsic<GCCIntSuffix, 431 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty, 432 llvm_i32_ty], 433 [IntrArgMemOnly]>; 434 435 class Hexagon_mem_memmemsisi_Intrinsic<string GCCIntSuffix> 436 : Hexagon_Intrinsic<GCCIntSuffix, 437 [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty, 438 llvm_i32_ty, llvm_i32_ty], 439 [IntrArgMemOnly]>; 440 441 class Hexagon_mem_memsisisi_Intrinsic<string GCCIntSuffix> 442 : Hexagon_Intrinsic<GCCIntSuffix, 443 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty, 444 llvm_i32_ty, llvm_i32_ty], 445 [IntrArgMemOnly]>; 446 447 class Hexagon_mem_memdisisi_Intrinsic<string GCCIntSuffix> 448 : Hexagon_Intrinsic<GCCIntSuffix, 449 [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty, 450 llvm_i32_ty, llvm_i32_ty], 451 [IntrArgMemOnly]>; 452 453 class Hexagon_v256_v256v256_Intrinsic<string GCCIntSuffix> 454 : Hexagon_Intrinsic<GCCIntSuffix, 455 [llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty], 456 [IntrArgMemOnly]>; 457 458 // 459 // Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 460 // 461 class Hexagon_sf_si_Intrinsic<string GCCIntSuffix> 462 : Hexagon_Intrinsic<GCCIntSuffix, 463 [llvm_float_ty], [llvm_i32_ty], 464 [IntrNoMem, Throws]>; 465 // 466 // Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 467 // 468 class Hexagon_sf_df_Intrinsic<string GCCIntSuffix> 469 : Hexagon_Intrinsic<GCCIntSuffix, 470 [llvm_float_ty], [llvm_double_ty], 471 [IntrNoMem]>; 472 // 473 // Hexagon_sf_di_Intrinsic<string GCCIntSuffix> 474 // 475 class Hexagon_sf_di_Intrinsic<string GCCIntSuffix> 476 : Hexagon_Intrinsic<GCCIntSuffix, 477 [llvm_float_ty], [llvm_i64_ty], 478 [IntrNoMem]>; 479 // 480 // Hexagon_df_sf_Intrinsic<string GCCIntSuffix> 481 // 482 class Hexagon_df_sf_Intrinsic<string GCCIntSuffix> 483 : Hexagon_Intrinsic<GCCIntSuffix, 484 [llvm_double_ty], [llvm_float_ty], 485 [IntrNoMem]>; 486 // 487 // Hexagon_di_sf_Intrinsic<string GCCIntSuffix> 488 // 489 class Hexagon_di_sf_Intrinsic<string GCCIntSuffix> 490 : Hexagon_Intrinsic<GCCIntSuffix, 491 [llvm_i64_ty], [llvm_float_ty], 492 [IntrNoMem]>; 493 // 494 // Hexagon_sf_sf_Intrinsic<string GCCIntSuffix> 495 // 496 class Hexagon_sf_sf_Intrinsic<string GCCIntSuffix> 497 : Hexagon_Intrinsic<GCCIntSuffix, 498 [llvm_float_ty], [llvm_float_ty], 499 [IntrNoMem]>; 500 // 501 // Hexagon_si_sf_Intrinsic<string GCCIntSuffix> 502 // 503 class Hexagon_si_sf_Intrinsic<string GCCIntSuffix> 504 : Hexagon_Intrinsic<GCCIntSuffix, 505 [llvm_i32_ty], [llvm_float_ty], 506 [IntrNoMem]>; 507 // 508 // Hexagon_si_df_Intrinsic<string GCCIntSuffix> 509 // 510 class Hexagon_si_df_Intrinsic<string GCCIntSuffix> 511 : Hexagon_Intrinsic<GCCIntSuffix, 512 [llvm_i32_ty], [llvm_double_ty], 513 [IntrNoMem]>; 514 // 515 // Hexagon_sf_sfsf_Intrinsic<string GCCIntSuffix> 516 // 517 class Hexagon_sf_sfsf_Intrinsic<string GCCIntSuffix> 518 : Hexagon_Intrinsic<GCCIntSuffix, 519 [llvm_float_ty], [llvm_float_ty, llvm_float_ty], 520 [IntrNoMem, Throws]>; 521 // 522 // Hexagon_si_sfsf_Intrinsic<string GCCIntSuffix> 523 // 524 class Hexagon_si_sfsf_Intrinsic<string GCCIntSuffix> 525 : Hexagon_Intrinsic<GCCIntSuffix, 526 [llvm_i32_ty], [llvm_float_ty, llvm_float_ty], 527 [IntrNoMem, Throws]>; 528 // 529 // Hexagon_si_sfsi_Intrinsic<string GCCIntSuffix> 530 // 531 class Hexagon_si_sfsi_Intrinsic<string GCCIntSuffix> 532 : Hexagon_Intrinsic<GCCIntSuffix, 533 [llvm_i32_ty], [llvm_float_ty, llvm_i32_ty], 534 [IntrNoMem, Throws]>; 535 // 536 // Hexagon_qi_sfqi_Intrinsic<string GCCIntSuffix> 537 // 538 class Hexagon_qi_sfqi_Intrinsic<string GCCIntSuffix> 539 : Hexagon_Intrinsic<GCCIntSuffix, 540 [llvm_i1_ty], [llvm_float_ty, llvm_i32_ty], 541 [IntrNoMem]>; 542 // 543 // Hexagon_sf_sfsfsf_Intrinsic<string GCCIntSuffix> 544 // 545 class Hexagon_sf_sfsfsf_Intrinsic<string GCCIntSuffix> 546 : Hexagon_Intrinsic<GCCIntSuffix, 547 [llvm_float_ty], [llvm_float_ty, llvm_float_ty, 548 llvm_float_ty], 549 [IntrNoMem, Throws]>; 550 // 551 // Hexagon_sf_sfsfsfqi_Intrinsic<string GCCIntSuffix> 552 // 553 class Hexagon_sf_sfsfsfqi_Intrinsic<string GCCIntSuffix> 554 : Hexagon_Intrinsic<GCCIntSuffix, 555 [llvm_float_ty], [llvm_float_ty, llvm_float_ty, 556 llvm_float_ty, 557 llvm_i32_ty], 558 [IntrNoMem, Throws]>; 559 // 560 // Hexagon_di_dididi_Intrinsic<string GCCIntSuffix> 561 // 562 class Hexagon_di_dididisi_Intrinsic<string GCCIntSuffix> 563 : Hexagon_Intrinsic<GCCIntSuffix, 564 [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, 565 llvm_i64_ty, llvm_i32_ty], 566 [IntrNoMem]>; 567 // 568 // Hexagon_df_si_Intrinsic<string GCCIntSuffix> 569 // 570 class Hexagon_df_si_Intrinsic<string GCCIntSuffix> 571 : Hexagon_Intrinsic<GCCIntSuffix, 572 [llvm_double_ty], [llvm_i32_ty], 573 [IntrNoMem, Throws]>; 574 // 575 // Hexagon_df_di_Intrinsic<string GCCIntSuffix> 576 // 577 class Hexagon_df_di_Intrinsic<string GCCIntSuffix> 578 : Hexagon_Intrinsic<GCCIntSuffix, 579 [llvm_double_ty], [llvm_i64_ty], 580 [IntrNoMem]>; 581 // 582 // Hexagon_di_df_Intrinsic<string GCCIntSuffix> 583 // 584 class Hexagon_di_df_Intrinsic<string GCCIntSuffix> 585 : Hexagon_Intrinsic<GCCIntSuffix, 586 [llvm_i64_ty], [llvm_double_ty], 587 [IntrNoMem]>; 588 // 589 // Hexagon_df_df_Intrinsic<string GCCIntSuffix> 590 // 591 class Hexagon_df_df_Intrinsic<string GCCIntSuffix> 592 : Hexagon_Intrinsic<GCCIntSuffix, 593 [llvm_double_ty], [llvm_double_ty], 594 [IntrNoMem]>; 595 // 596 // Hexagon_df_dfdf_Intrinsic<string GCCIntSuffix> 597 // 598 class Hexagon_df_dfdf_Intrinsic<string GCCIntSuffix> 599 : Hexagon_Intrinsic<GCCIntSuffix, 600 [llvm_double_ty], [llvm_double_ty, llvm_double_ty], 601 [IntrNoMem, Throws]>; 602 // 603 // Hexagon_si_dfdf_Intrinsic<string GCCIntSuffix> 604 // 605 class Hexagon_si_dfdf_Intrinsic<string GCCIntSuffix> 606 : Hexagon_Intrinsic<GCCIntSuffix, 607 [llvm_i32_ty], [llvm_double_ty, llvm_double_ty], 608 [IntrNoMem, Throws]>; 609 // 610 // Hexagon_si_dfsi_Intrinsic<string GCCIntSuffix> 611 // 612 class Hexagon_si_dfsi_Intrinsic<string GCCIntSuffix> 613 : Hexagon_Intrinsic<GCCIntSuffix, 614 [llvm_i32_ty], [llvm_double_ty, llvm_i32_ty], 615 [IntrNoMem, Throws]>; 616 // 617 // 618 // Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 619 // 620 class Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 621 : Hexagon_Intrinsic<GCCIntSuffix, 622 [llvm_double_ty], [llvm_double_ty, llvm_double_ty, 623 llvm_double_ty], 624 [IntrNoMem, Throws]>; 625 // 626 // Hexagon_df_dfdfdf_Intrinsic<string GCCIntSuffix> 627 // 628 class Hexagon_df_dfdfdfqi_Intrinsic<string GCCIntSuffix> 629 : Hexagon_Intrinsic<GCCIntSuffix, 630 [llvm_double_ty], [llvm_double_ty, llvm_double_ty, 631 llvm_double_ty, 632 llvm_i32_ty], 633 [IntrNoMem, Throws]>; 634 635 636 // This one below will not be auto-generated, 637 // so make sure, you don't overwrite this one. 638 // 639 // BUILTIN_INFO(SI_to_SXTHI_asrh,SI_ftype_SI,1) 640 // 641 def int_hexagon_SI_to_SXTHI_asrh : 642 Hexagon_si_si_Intrinsic<"SI_to_SXTHI_asrh">; 643 // 644 // BUILTIN_INFO_NONCONST(brev_ldd,PTR_ftype_PTRPTRSI,3) 645 // 646 def int_hexagon_brev_ldd : 647 Hexagon_mem_memmemsi_Intrinsic<"brev_ldd">; 648 // 649 // BUILTIN_INFO_NONCONST(brev_ldw,PTR_ftype_PTRPTRSI,3) 650 // 651 def int_hexagon_brev_ldw : 652 Hexagon_mem_memmemsi_Intrinsic<"brev_ldw">; 653 // 654 // BUILTIN_INFO_NONCONST(brev_ldh,PTR_ftype_PTRPTRSI,3) 655 // 656 def int_hexagon_brev_ldh : 657 Hexagon_mem_memmemsi_Intrinsic<"brev_ldh">; 658 // 659 // BUILTIN_INFO_NONCONST(brev_lduh,PTR_ftype_PTRPTRSI,3) 660 // 661 def int_hexagon_brev_lduh : 662 Hexagon_mem_memmemsi_Intrinsic<"brev_lduh">; 663 // 664 // BUILTIN_INFO_NONCONST(brev_ldb,PTR_ftype_PTRPTRSI,3) 665 // 666 def int_hexagon_brev_ldb : 667 Hexagon_mem_memmemsi_Intrinsic<"brev_ldb">; 668 // 669 // BUILTIN_INFO_NONCONST(brev_ldub,PTR_ftype_PTRPTRSI,3) 670 // 671 def int_hexagon_brev_ldub : 672 Hexagon_mem_memmemsi_Intrinsic<"brev_ldub">; 673 // 674 // BUILTIN_INFO_NONCONST(circ_ldd,PTR_ftype_PTRPTRSISI,4) 675 // 676 def int_hexagon_circ_ldd : 677 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldd">; 678 // 679 // BUILTIN_INFO_NONCONST(circ_ldw,PTR_ftype_PTRPTRSISI,4) 680 // 681 def int_hexagon_circ_ldw : 682 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldw">; 683 // 684 // BUILTIN_INFO_NONCONST(circ_ldh,PTR_ftype_PTRPTRSISI,4) 685 // 686 def int_hexagon_circ_ldh : 687 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldh">; 688 // 689 // BUILTIN_INFO_NONCONST(circ_lduh,PTR_ftype_PTRPTRSISI,4) 690 // 691 def int_hexagon_circ_lduh : 692 Hexagon_mem_memmemsisi_Intrinsic<"circ_lduh">; 693 // 694 // BUILTIN_INFO_NONCONST(circ_ldb,PTR_ftype_PTRPTRSISI,4) 695 // 696 def int_hexagon_circ_ldb : 697 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldb">; 698 // 699 // BUILTIN_INFO_NONCONST(circ_ldub,PTR_ftype_PTRPTRSISI,4) 700 // 701 def int_hexagon_circ_ldub : 702 Hexagon_mem_memmemsisi_Intrinsic<"circ_ldub">; 703 704 // 705 // BUILTIN_INFO_NONCONST(brev_stb,PTR_ftype_PTRSISI,3) 706 // 707 def int_hexagon_brev_stb : 708 Hexagon_mem_memsisi_Intrinsic<"brev_stb">; 709 // 710 // BUILTIN_INFO_NONCONST(brev_sthhi,PTR_ftype_PTRSISI,3) 711 // 712 def int_hexagon_brev_sthhi : 713 Hexagon_mem_memsisi_Intrinsic<"brev_sthhi">; 714 // 715 // BUILTIN_INFO_NONCONST(brev_sth,PTR_ftype_PTRSISI,3) 716 // 717 def int_hexagon_brev_sth : 718 Hexagon_mem_memsisi_Intrinsic<"brev_sth">; 719 // 720 // BUILTIN_INFO_NONCONST(brev_stw,PTR_ftype_PTRSISI,3) 721 // 722 def int_hexagon_brev_stw : 723 Hexagon_mem_memsisi_Intrinsic<"brev_stw">; 724 // 725 // BUILTIN_INFO_NONCONST(brev_std,PTR_ftype_PTRSISI,3) 726 // 727 def int_hexagon_brev_std : 728 Hexagon_mem_memdisi_Intrinsic<"brev_std">; 729 // 730 // BUILTIN_INFO_NONCONST(circ_std,PTR_ftype_PTRDISISI,4) 731 // 732 def int_hexagon_circ_std : 733 Hexagon_mem_memdisisi_Intrinsic<"circ_std">; 734 // 735 // BUILTIN_INFO_NONCONST(circ_stw,PTR_ftype_PTRSISISI,4) 736 // 737 def int_hexagon_circ_stw : 738 Hexagon_mem_memsisisi_Intrinsic<"circ_stw">; 739 // 740 // BUILTIN_INFO_NONCONST(circ_sth,PTR_ftype_PTRSISISI,4) 741 // 742 def int_hexagon_circ_sth : 743 Hexagon_mem_memsisisi_Intrinsic<"circ_sth">; 744 // 745 // BUILTIN_INFO_NONCONST(circ_sthhi,PTR_ftype_PTRSISISI,4) 746 // 747 def int_hexagon_circ_sthhi : 748 Hexagon_mem_memsisisi_Intrinsic<"circ_sthhi">; 749 // 750 // BUILTIN_INFO_NONCONST(circ_stb,PTR_ftype_PTRSISISI,4) 751 // 752 def int_hexagon_circ_stb : 753 Hexagon_mem_memsisisi_Intrinsic<"circ_stb">; 754 755 756 def int_hexagon_mm256i_vaddw : 757 Hexagon_v256_v256v256_Intrinsic<"_mm256i_vaddw">; 758 759 760 // This one above will not be auto-generated, 761 // so make sure, you don't overwrite this one. 762 // 763 // BUILTIN_INFO(HEXAGON.C2_cmpeq,QI_ftype_SISI,2) 764 // 765 def int_hexagon_C2_cmpeq : 766 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpeq">; 767 // 768 // BUILTIN_INFO(HEXAGON.C2_cmpgt,QI_ftype_SISI,2) 769 // 770 def int_hexagon_C2_cmpgt : 771 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgt">; 772 // 773 // BUILTIN_INFO(HEXAGON.C2_cmpgtu,QI_ftype_SISI,2) 774 // 775 def int_hexagon_C2_cmpgtu : 776 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgtu">; 777 // 778 // BUILTIN_INFO(HEXAGON.C2_cmpeqp,QI_ftype_DIDI,2) 779 // 780 def int_hexagon_C2_cmpeqp : 781 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpeqp">; 782 // 783 // BUILTIN_INFO(HEXAGON.C2_cmpgtp,QI_ftype_DIDI,2) 784 // 785 def int_hexagon_C2_cmpgtp : 786 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpgtp">; 787 // 788 // BUILTIN_INFO(HEXAGON.C2_cmpgtup,QI_ftype_DIDI,2) 789 // 790 def int_hexagon_C2_cmpgtup : 791 Hexagon_si_didi_Intrinsic<"HEXAGON_C2_cmpgtup">; 792 // 793 // BUILTIN_INFO(HEXAGON.A4_rcmpeqi,SI_ftype_SISI,2) 794 // 795 def int_hexagon_A4_rcmpeqi : 796 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpeqi">; 797 // 798 // BUILTIN_INFO(HEXAGON.A4_rcmpneqi,SI_ftype_SISI,2) 799 // 800 def int_hexagon_A4_rcmpneqi : 801 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpneqi">; 802 // 803 // BUILTIN_INFO(HEXAGON.A4_rcmpeq,SI_ftype_SISI,2) 804 // 805 def int_hexagon_A4_rcmpeq : 806 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpeq">; 807 // 808 // BUILTIN_INFO(HEXAGON.A4_rcmpneq,SI_ftype_SISI,2) 809 // 810 def int_hexagon_A4_rcmpneq : 811 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_rcmpneq">; 812 // 813 // BUILTIN_INFO(HEXAGON.C2_bitsset,QI_ftype_SISI,2) 814 // 815 def int_hexagon_C2_bitsset : 816 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsset">; 817 // 818 // BUILTIN_INFO(HEXAGON.C2_bitsclr,QI_ftype_SISI,2) 819 // 820 def int_hexagon_C2_bitsclr : 821 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsclr">; 822 // 823 // BUILTIN_INFO(HEXAGON.C4_nbitsset,QI_ftype_SISI,2) 824 // 825 def int_hexagon_C4_nbitsset : 826 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsset">; 827 // 828 // BUILTIN_INFO(HEXAGON.C4_nbitsclr,QI_ftype_SISI,2) 829 // 830 def int_hexagon_C4_nbitsclr : 831 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsclr">; 832 // 833 // BUILTIN_INFO(HEXAGON.C2_cmpeqi,QI_ftype_SISI,2) 834 // 835 def int_hexagon_C2_cmpeqi : 836 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpeqi">; 837 // 838 // BUILTIN_INFO(HEXAGON.C2_cmpgti,QI_ftype_SISI,2) 839 // 840 def int_hexagon_C2_cmpgti : 841 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgti">; 842 // 843 // BUILTIN_INFO(HEXAGON.C2_cmpgtui,QI_ftype_SISI,2) 844 // 845 def int_hexagon_C2_cmpgtui : 846 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgtui">; 847 // 848 // BUILTIN_INFO(HEXAGON.C2_cmpgei,QI_ftype_SISI,2) 849 // 850 def int_hexagon_C2_cmpgei : 851 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgei">; 852 // 853 // BUILTIN_INFO(HEXAGON.C2_cmpgeui,QI_ftype_SISI,2) 854 // 855 def int_hexagon_C2_cmpgeui : 856 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpgeui">; 857 // 858 // BUILTIN_INFO(HEXAGON.C2_cmplt,QI_ftype_SISI,2) 859 // 860 def int_hexagon_C2_cmplt : 861 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmplt">; 862 // 863 // BUILTIN_INFO(HEXAGON.C2_cmpltu,QI_ftype_SISI,2) 864 // 865 def int_hexagon_C2_cmpltu : 866 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_cmpltu">; 867 // 868 // BUILTIN_INFO(HEXAGON.C2_bitsclri,QI_ftype_SISI,2) 869 // 870 def int_hexagon_C2_bitsclri : 871 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_bitsclri">; 872 // 873 // BUILTIN_INFO(HEXAGON.C4_nbitsclri,QI_ftype_SISI,2) 874 // 875 def int_hexagon_C4_nbitsclri : 876 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_nbitsclri">; 877 // 878 // BUILTIN_INFO(HEXAGON.C4_cmpneqi,QI_ftype_SISI,2) 879 // 880 def int_hexagon_C4_cmpneqi : 881 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpneqi">; 882 // 883 // BUILTIN_INFO(HEXAGON.C4_cmpltei,QI_ftype_SISI,2) 884 // 885 def int_hexagon_C4_cmpltei : 886 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpltei">; 887 // 888 // BUILTIN_INFO(HEXAGON.C4_cmplteui,QI_ftype_SISI,2) 889 // 890 def int_hexagon_C4_cmplteui : 891 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplteui">; 892 // 893 // BUILTIN_INFO(HEXAGON.C4_cmpneq,QI_ftype_SISI,2) 894 // 895 def int_hexagon_C4_cmpneq : 896 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmpneq">; 897 // 898 // BUILTIN_INFO(HEXAGON.C4_cmplte,QI_ftype_SISI,2) 899 // 900 def int_hexagon_C4_cmplte : 901 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplte">; 902 // 903 // BUILTIN_INFO(HEXAGON.C4_cmplteu,QI_ftype_SISI,2) 904 // 905 def int_hexagon_C4_cmplteu : 906 Hexagon_si_sisi_Intrinsic<"HEXAGON_C4_cmplteu">; 907 // 908 // BUILTIN_INFO(HEXAGON.C2_and,QI_ftype_QIQI,2) 909 // 910 def int_hexagon_C2_and : 911 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_and">; 912 // 913 // BUILTIN_INFO(HEXAGON.C2_or,QI_ftype_QIQI,2) 914 // 915 def int_hexagon_C2_or : 916 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_or">; 917 // 918 // BUILTIN_INFO(HEXAGON.C2_xor,QI_ftype_QIQI,2) 919 // 920 def int_hexagon_C2_xor : 921 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_xor">; 922 // 923 // BUILTIN_INFO(HEXAGON.C2_andn,QI_ftype_QIQI,2) 924 // 925 def int_hexagon_C2_andn : 926 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_andn">; 927 // 928 // BUILTIN_INFO(HEXAGON.C2_not,QI_ftype_QI,1) 929 // 930 def int_hexagon_C2_not : 931 Hexagon_si_si_Intrinsic<"HEXAGON_C2_not">; 932 // 933 // BUILTIN_INFO(HEXAGON.C2_orn,QI_ftype_QIQI,2) 934 // 935 def int_hexagon_C2_orn : 936 Hexagon_si_sisi_Intrinsic<"HEXAGON_C2_orn">; 937 // 938 // BUILTIN_INFO(HEXAGON.C4_and_and,QI_ftype_QIQIQI,3) 939 // 940 def int_hexagon_C4_and_and : 941 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_and">; 942 // 943 // BUILTIN_INFO(HEXAGON.C4_and_or,QI_ftype_QIQIQI,3) 944 // 945 def int_hexagon_C4_and_or : 946 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_or">; 947 // 948 // BUILTIN_INFO(HEXAGON.C4_or_and,QI_ftype_QIQIQI,3) 949 // 950 def int_hexagon_C4_or_and : 951 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_and">; 952 // 953 // BUILTIN_INFO(HEXAGON.C4_or_or,QI_ftype_QIQIQI,3) 954 // 955 def int_hexagon_C4_or_or : 956 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_or">; 957 // 958 // BUILTIN_INFO(HEXAGON.C4_and_andn,QI_ftype_QIQIQI,3) 959 // 960 def int_hexagon_C4_and_andn : 961 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_andn">; 962 // 963 // BUILTIN_INFO(HEXAGON.C4_and_orn,QI_ftype_QIQIQI,3) 964 // 965 def int_hexagon_C4_and_orn : 966 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_and_orn">; 967 // 968 // BUILTIN_INFO(HEXAGON.C4_or_andn,QI_ftype_QIQIQI,3) 969 // 970 def int_hexagon_C4_or_andn : 971 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_andn">; 972 // 973 // BUILTIN_INFO(HEXAGON.C4_or_orn,QI_ftype_QIQIQI,3) 974 // 975 def int_hexagon_C4_or_orn : 976 Hexagon_si_sisisi_Intrinsic<"HEXAGON_C4_or_orn">; 977 // 978 // BUILTIN_INFO(HEXAGON.C2_pxfer_map,QI_ftype_QI,1) 979 // 980 def int_hexagon_C2_pxfer_map : 981 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_pxfer_map">; 982 // 983 // BUILTIN_INFO(HEXAGON.C2_any8,QI_ftype_QI,1) 984 // 985 def int_hexagon_C2_any8 : 986 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_any8">; 987 // 988 // BUILTIN_INFO(HEXAGON.C2_all8,QI_ftype_QI,1) 989 // 990 def int_hexagon_C2_all8 : 991 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_all8">; 992 // 993 // BUILTIN_INFO(HEXAGON.C2_vitpack,SI_ftype_QIQI,2) 994 // 995 def int_hexagon_C2_vitpack : 996 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C2_vitpack">; 997 // 998 // BUILTIN_INFO(HEXAGON.C2_mux,SI_ftype_QISISI,3) 999 // 1000 def int_hexagon_C2_mux : 1001 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_mux">; 1002 // 1003 // BUILTIN_INFO(HEXAGON.C2_muxii,SI_ftype_QISISI,3) 1004 // 1005 def int_hexagon_C2_muxii : 1006 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxii">; 1007 // 1008 // BUILTIN_INFO(HEXAGON.C2_muxir,SI_ftype_QISISI,3) 1009 // 1010 def int_hexagon_C2_muxir : 1011 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxir">; 1012 // 1013 // BUILTIN_INFO(HEXAGON.C2_muxri,SI_ftype_QISISI,3) 1014 // 1015 def int_hexagon_C2_muxri : 1016 Hexagon_si_qisisi_Intrinsic<"HEXAGON_C2_muxri">; 1017 // 1018 // BUILTIN_INFO(HEXAGON.C2_vmux,DI_ftype_QIDIDI,3) 1019 // 1020 def int_hexagon_C2_vmux : 1021 Hexagon_di_qididi_Intrinsic<"HEXAGON_C2_vmux">; 1022 // 1023 // BUILTIN_INFO(HEXAGON.C2_mask,DI_ftype_QI,1) 1024 // 1025 def int_hexagon_C2_mask : 1026 Hexagon_di_qi_Intrinsic<"HEXAGON_C2_mask">; 1027 // 1028 // BUILTIN_INFO(HEXAGON.A2_vcmpbeq,QI_ftype_DIDI,2) 1029 // 1030 def int_hexagon_A2_vcmpbeq : 1031 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpbeq">; 1032 // 1033 // BUILTIN_INFO(HEXAGON.A4_vcmpbeqi,QI_ftype_DISI,2) 1034 // 1035 def int_hexagon_A4_vcmpbeqi : 1036 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbeqi">; 1037 // 1038 // BUILTIN_INFO(HEXAGON.A4_vcmpbeq_any,QI_ftype_DIDI,2) 1039 // 1040 def int_hexagon_A4_vcmpbeq_any : 1041 Hexagon_si_didi_Intrinsic<"HEXAGON_A4_vcmpbeq_any">; 1042 // 1043 // BUILTIN_INFO(HEXAGON.A2_vcmpbgtu,QI_ftype_DIDI,2) 1044 // 1045 def int_hexagon_A2_vcmpbgtu : 1046 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpbgtu">; 1047 // 1048 // BUILTIN_INFO(HEXAGON.A4_vcmpbgtui,QI_ftype_DISI,2) 1049 // 1050 def int_hexagon_A4_vcmpbgtui : 1051 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbgtui">; 1052 // 1053 // BUILTIN_INFO(HEXAGON.A4_vcmpbgt,QI_ftype_DIDI,2) 1054 // 1055 def int_hexagon_A4_vcmpbgt : 1056 Hexagon_si_didi_Intrinsic<"HEXAGON_A4_vcmpbgt">; 1057 // 1058 // BUILTIN_INFO(HEXAGON.A4_vcmpbgti,QI_ftype_DISI,2) 1059 // 1060 def int_hexagon_A4_vcmpbgti : 1061 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpbgti">; 1062 // 1063 // BUILTIN_INFO(HEXAGON.A4_cmpbeq,QI_ftype_SISI,2) 1064 // 1065 def int_hexagon_A4_cmpbeq : 1066 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbeq">; 1067 // 1068 // BUILTIN_INFO(HEXAGON.A4_cmpbeqi,QI_ftype_SISI,2) 1069 // 1070 def int_hexagon_A4_cmpbeqi : 1071 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbeqi">; 1072 // 1073 // BUILTIN_INFO(HEXAGON.A4_cmpbgtu,QI_ftype_SISI,2) 1074 // 1075 def int_hexagon_A4_cmpbgtu : 1076 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgtu">; 1077 // 1078 // BUILTIN_INFO(HEXAGON.A4_cmpbgtui,QI_ftype_SISI,2) 1079 // 1080 def int_hexagon_A4_cmpbgtui : 1081 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgtui">; 1082 // 1083 // BUILTIN_INFO(HEXAGON.A4_cmpbgt,QI_ftype_SISI,2) 1084 // 1085 def int_hexagon_A4_cmpbgt : 1086 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgt">; 1087 // 1088 // BUILTIN_INFO(HEXAGON.A4_cmpbgti,QI_ftype_SISI,2) 1089 // 1090 def int_hexagon_A4_cmpbgti : 1091 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpbgti">; 1092 // 1093 // BUILTIN_INFO(HEXAGON.A2_vcmpheq,QI_ftype_DIDI,2) 1094 // 1095 def int_hexagon_A2_vcmpheq : 1096 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpheq">; 1097 // 1098 // BUILTIN_INFO(HEXAGON.A2_vcmphgt,QI_ftype_DIDI,2) 1099 // 1100 def int_hexagon_A2_vcmphgt : 1101 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmphgt">; 1102 // 1103 // BUILTIN_INFO(HEXAGON.A2_vcmphgtu,QI_ftype_DIDI,2) 1104 // 1105 def int_hexagon_A2_vcmphgtu : 1106 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmphgtu">; 1107 // 1108 // BUILTIN_INFO(HEXAGON.A4_vcmpheqi,QI_ftype_DISI,2) 1109 // 1110 def int_hexagon_A4_vcmpheqi : 1111 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpheqi">; 1112 // 1113 // BUILTIN_INFO(HEXAGON.A4_vcmphgti,QI_ftype_DISI,2) 1114 // 1115 def int_hexagon_A4_vcmphgti : 1116 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmphgti">; 1117 // 1118 // BUILTIN_INFO(HEXAGON.A4_vcmphgtui,QI_ftype_DISI,2) 1119 // 1120 def int_hexagon_A4_vcmphgtui : 1121 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmphgtui">; 1122 // 1123 // BUILTIN_INFO(HEXAGON.A4_cmpheq,QI_ftype_SISI,2) 1124 // 1125 def int_hexagon_A4_cmpheq : 1126 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpheq">; 1127 // 1128 // BUILTIN_INFO(HEXAGON.A4_cmphgt,QI_ftype_SISI,2) 1129 // 1130 def int_hexagon_A4_cmphgt : 1131 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgt">; 1132 // 1133 // BUILTIN_INFO(HEXAGON.A4_cmphgtu,QI_ftype_SISI,2) 1134 // 1135 def int_hexagon_A4_cmphgtu : 1136 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgtu">; 1137 // 1138 // BUILTIN_INFO(HEXAGON.A4_cmpheqi,QI_ftype_SISI,2) 1139 // 1140 def int_hexagon_A4_cmpheqi : 1141 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmpheqi">; 1142 // 1143 // BUILTIN_INFO(HEXAGON.A4_cmphgti,QI_ftype_SISI,2) 1144 // 1145 def int_hexagon_A4_cmphgti : 1146 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgti">; 1147 // 1148 // BUILTIN_INFO(HEXAGON.A4_cmphgtui,QI_ftype_SISI,2) 1149 // 1150 def int_hexagon_A4_cmphgtui : 1151 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cmphgtui">; 1152 // 1153 // BUILTIN_INFO(HEXAGON.A2_vcmpweq,QI_ftype_DIDI,2) 1154 // 1155 def int_hexagon_A2_vcmpweq : 1156 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpweq">; 1157 // 1158 // BUILTIN_INFO(HEXAGON.A2_vcmpwgt,QI_ftype_DIDI,2) 1159 // 1160 def int_hexagon_A2_vcmpwgt : 1161 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpwgt">; 1162 // 1163 // BUILTIN_INFO(HEXAGON.A2_vcmpwgtu,QI_ftype_DIDI,2) 1164 // 1165 def int_hexagon_A2_vcmpwgtu : 1166 Hexagon_si_didi_Intrinsic<"HEXAGON_A2_vcmpwgtu">; 1167 // 1168 // BUILTIN_INFO(HEXAGON.A4_vcmpweqi,QI_ftype_DISI,2) 1169 // 1170 def int_hexagon_A4_vcmpweqi : 1171 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpweqi">; 1172 // 1173 // BUILTIN_INFO(HEXAGON.A4_vcmpwgti,QI_ftype_DISI,2) 1174 // 1175 def int_hexagon_A4_vcmpwgti : 1176 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpwgti">; 1177 // 1178 // BUILTIN_INFO(HEXAGON.A4_vcmpwgtui,QI_ftype_DISI,2) 1179 // 1180 def int_hexagon_A4_vcmpwgtui : 1181 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_vcmpwgtui">; 1182 // 1183 // BUILTIN_INFO(HEXAGON.A4_boundscheck,QI_ftype_SIDI,2) 1184 // 1185 def int_hexagon_A4_boundscheck : 1186 Hexagon_si_sidi_Intrinsic<"HEXAGON_A4_boundscheck">; 1187 // 1188 // BUILTIN_INFO(HEXAGON.A4_tlbmatch,QI_ftype_DISI,2) 1189 // 1190 def int_hexagon_A4_tlbmatch : 1191 Hexagon_si_disi_Intrinsic<"HEXAGON_A4_tlbmatch">; 1192 // 1193 // BUILTIN_INFO(HEXAGON.C2_tfrpr,SI_ftype_QI,1) 1194 // 1195 def int_hexagon_C2_tfrpr : 1196 Hexagon_si_qi_Intrinsic<"HEXAGON_C2_tfrpr">; 1197 // 1198 // BUILTIN_INFO(HEXAGON.C2_tfrrp,QI_ftype_SI,1) 1199 // 1200 def int_hexagon_C2_tfrrp : 1201 Hexagon_si_si_Intrinsic<"HEXAGON_C2_tfrrp">; 1202 // 1203 // BUILTIN_INFO(HEXAGON.C4_fastcorner9,QI_ftype_QIQI,2) 1204 // 1205 def int_hexagon_C4_fastcorner9 : 1206 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C4_fastcorner9">; 1207 // 1208 // BUILTIN_INFO(HEXAGON.C4_fastcorner9_not,QI_ftype_QIQI,2) 1209 // 1210 def int_hexagon_C4_fastcorner9_not : 1211 Hexagon_si_qiqi_Intrinsic<"HEXAGON_C4_fastcorner9_not">; 1212 // 1213 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hh_s0,SI_ftype_SISISI,3) 1214 // 1215 def int_hexagon_M2_mpy_acc_hh_s0 : 1216 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hh_s0">; 1217 // 1218 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hh_s1,SI_ftype_SISISI,3) 1219 // 1220 def int_hexagon_M2_mpy_acc_hh_s1 : 1221 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hh_s1">; 1222 // 1223 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hl_s0,SI_ftype_SISISI,3) 1224 // 1225 def int_hexagon_M2_mpy_acc_hl_s0 : 1226 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hl_s0">; 1227 // 1228 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_hl_s1,SI_ftype_SISISI,3) 1229 // 1230 def int_hexagon_M2_mpy_acc_hl_s1 : 1231 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_hl_s1">; 1232 // 1233 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_lh_s0,SI_ftype_SISISI,3) 1234 // 1235 def int_hexagon_M2_mpy_acc_lh_s0 : 1236 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_lh_s0">; 1237 // 1238 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_lh_s1,SI_ftype_SISISI,3) 1239 // 1240 def int_hexagon_M2_mpy_acc_lh_s1 : 1241 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_lh_s1">; 1242 // 1243 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_ll_s0,SI_ftype_SISISI,3) 1244 // 1245 def int_hexagon_M2_mpy_acc_ll_s0 : 1246 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_ll_s0">; 1247 // 1248 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_ll_s1,SI_ftype_SISISI,3) 1249 // 1250 def int_hexagon_M2_mpy_acc_ll_s1 : 1251 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_ll_s1">; 1252 // 1253 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hh_s0,SI_ftype_SISISI,3) 1254 // 1255 def int_hexagon_M2_mpy_nac_hh_s0 : 1256 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hh_s0">; 1257 // 1258 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hh_s1,SI_ftype_SISISI,3) 1259 // 1260 def int_hexagon_M2_mpy_nac_hh_s1 : 1261 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hh_s1">; 1262 // 1263 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hl_s0,SI_ftype_SISISI,3) 1264 // 1265 def int_hexagon_M2_mpy_nac_hl_s0 : 1266 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hl_s0">; 1267 // 1268 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_hl_s1,SI_ftype_SISISI,3) 1269 // 1270 def int_hexagon_M2_mpy_nac_hl_s1 : 1271 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_hl_s1">; 1272 // 1273 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_lh_s0,SI_ftype_SISISI,3) 1274 // 1275 def int_hexagon_M2_mpy_nac_lh_s0 : 1276 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_lh_s0">; 1277 // 1278 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_lh_s1,SI_ftype_SISISI,3) 1279 // 1280 def int_hexagon_M2_mpy_nac_lh_s1 : 1281 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_lh_s1">; 1282 // 1283 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_ll_s0,SI_ftype_SISISI,3) 1284 // 1285 def int_hexagon_M2_mpy_nac_ll_s0 : 1286 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_ll_s0">; 1287 // 1288 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_ll_s1,SI_ftype_SISISI,3) 1289 // 1290 def int_hexagon_M2_mpy_nac_ll_s1 : 1291 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_ll_s1">; 1292 // 1293 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hh_s0,SI_ftype_SISISI,3) 1294 // 1295 def int_hexagon_M2_mpy_acc_sat_hh_s0 : 1296 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hh_s0">; 1297 // 1298 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hh_s1,SI_ftype_SISISI,3) 1299 // 1300 def int_hexagon_M2_mpy_acc_sat_hh_s1 : 1301 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hh_s1">; 1302 // 1303 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hl_s0,SI_ftype_SISISI,3) 1304 // 1305 def int_hexagon_M2_mpy_acc_sat_hl_s0 : 1306 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hl_s0">; 1307 // 1308 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_hl_s1,SI_ftype_SISISI,3) 1309 // 1310 def int_hexagon_M2_mpy_acc_sat_hl_s1 : 1311 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_hl_s1">; 1312 // 1313 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_lh_s0,SI_ftype_SISISI,3) 1314 // 1315 def int_hexagon_M2_mpy_acc_sat_lh_s0 : 1316 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_lh_s0">; 1317 // 1318 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_lh_s1,SI_ftype_SISISI,3) 1319 // 1320 def int_hexagon_M2_mpy_acc_sat_lh_s1 : 1321 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_lh_s1">; 1322 // 1323 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_ll_s0,SI_ftype_SISISI,3) 1324 // 1325 def int_hexagon_M2_mpy_acc_sat_ll_s0 : 1326 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_ll_s0">; 1327 // 1328 // BUILTIN_INFO(HEXAGON.M2_mpy_acc_sat_ll_s1,SI_ftype_SISISI,3) 1329 // 1330 def int_hexagon_M2_mpy_acc_sat_ll_s1 : 1331 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_acc_sat_ll_s1">; 1332 // 1333 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hh_s0,SI_ftype_SISISI,3) 1334 // 1335 def int_hexagon_M2_mpy_nac_sat_hh_s0 : 1336 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hh_s0">; 1337 // 1338 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hh_s1,SI_ftype_SISISI,3) 1339 // 1340 def int_hexagon_M2_mpy_nac_sat_hh_s1 : 1341 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hh_s1">; 1342 // 1343 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hl_s0,SI_ftype_SISISI,3) 1344 // 1345 def int_hexagon_M2_mpy_nac_sat_hl_s0 : 1346 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hl_s0">; 1347 // 1348 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_hl_s1,SI_ftype_SISISI,3) 1349 // 1350 def int_hexagon_M2_mpy_nac_sat_hl_s1 : 1351 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_hl_s1">; 1352 // 1353 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_lh_s0,SI_ftype_SISISI,3) 1354 // 1355 def int_hexagon_M2_mpy_nac_sat_lh_s0 : 1356 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_lh_s0">; 1357 // 1358 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_lh_s1,SI_ftype_SISISI,3) 1359 // 1360 def int_hexagon_M2_mpy_nac_sat_lh_s1 : 1361 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_lh_s1">; 1362 // 1363 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_ll_s0,SI_ftype_SISISI,3) 1364 // 1365 def int_hexagon_M2_mpy_nac_sat_ll_s0 : 1366 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_ll_s0">; 1367 // 1368 // BUILTIN_INFO(HEXAGON.M2_mpy_nac_sat_ll_s1,SI_ftype_SISISI,3) 1369 // 1370 def int_hexagon_M2_mpy_nac_sat_ll_s1 : 1371 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpy_nac_sat_ll_s1">; 1372 // 1373 // BUILTIN_INFO(HEXAGON.M2_mpy_hh_s0,SI_ftype_SISI,2) 1374 // 1375 def int_hexagon_M2_mpy_hh_s0 : 1376 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hh_s0">; 1377 // 1378 // BUILTIN_INFO(HEXAGON.M2_mpy_hh_s1,SI_ftype_SISI,2) 1379 // 1380 def int_hexagon_M2_mpy_hh_s1 : 1381 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hh_s1">; 1382 // 1383 // BUILTIN_INFO(HEXAGON.M2_mpy_hl_s0,SI_ftype_SISI,2) 1384 // 1385 def int_hexagon_M2_mpy_hl_s0 : 1386 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hl_s0">; 1387 // 1388 // BUILTIN_INFO(HEXAGON.M2_mpy_hl_s1,SI_ftype_SISI,2) 1389 // 1390 def int_hexagon_M2_mpy_hl_s1 : 1391 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_hl_s1">; 1392 // 1393 // BUILTIN_INFO(HEXAGON.M2_mpy_lh_s0,SI_ftype_SISI,2) 1394 // 1395 def int_hexagon_M2_mpy_lh_s0 : 1396 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_lh_s0">; 1397 // 1398 // BUILTIN_INFO(HEXAGON.M2_mpy_lh_s1,SI_ftype_SISI,2) 1399 // 1400 def int_hexagon_M2_mpy_lh_s1 : 1401 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_lh_s1">; 1402 // 1403 // BUILTIN_INFO(HEXAGON.M2_mpy_ll_s0,SI_ftype_SISI,2) 1404 // 1405 def int_hexagon_M2_mpy_ll_s0 : 1406 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_ll_s0">; 1407 // 1408 // BUILTIN_INFO(HEXAGON.M2_mpy_ll_s1,SI_ftype_SISI,2) 1409 // 1410 def int_hexagon_M2_mpy_ll_s1 : 1411 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_ll_s1">; 1412 // 1413 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hh_s0,SI_ftype_SISI,2) 1414 // 1415 def int_hexagon_M2_mpy_sat_hh_s0 : 1416 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hh_s0">; 1417 // 1418 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hh_s1,SI_ftype_SISI,2) 1419 // 1420 def int_hexagon_M2_mpy_sat_hh_s1 : 1421 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hh_s1">; 1422 // 1423 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hl_s0,SI_ftype_SISI,2) 1424 // 1425 def int_hexagon_M2_mpy_sat_hl_s0 : 1426 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hl_s0">; 1427 // 1428 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_hl_s1,SI_ftype_SISI,2) 1429 // 1430 def int_hexagon_M2_mpy_sat_hl_s1 : 1431 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_hl_s1">; 1432 // 1433 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_lh_s0,SI_ftype_SISI,2) 1434 // 1435 def int_hexagon_M2_mpy_sat_lh_s0 : 1436 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_lh_s0">; 1437 // 1438 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_lh_s1,SI_ftype_SISI,2) 1439 // 1440 def int_hexagon_M2_mpy_sat_lh_s1 : 1441 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_lh_s1">; 1442 // 1443 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_ll_s0,SI_ftype_SISI,2) 1444 // 1445 def int_hexagon_M2_mpy_sat_ll_s0 : 1446 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_ll_s0">; 1447 // 1448 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_ll_s1,SI_ftype_SISI,2) 1449 // 1450 def int_hexagon_M2_mpy_sat_ll_s1 : 1451 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_ll_s1">; 1452 // 1453 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hh_s0,SI_ftype_SISI,2) 1454 // 1455 def int_hexagon_M2_mpy_rnd_hh_s0 : 1456 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hh_s0">; 1457 // 1458 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hh_s1,SI_ftype_SISI,2) 1459 // 1460 def int_hexagon_M2_mpy_rnd_hh_s1 : 1461 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hh_s1">; 1462 // 1463 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hl_s0,SI_ftype_SISI,2) 1464 // 1465 def int_hexagon_M2_mpy_rnd_hl_s0 : 1466 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hl_s0">; 1467 // 1468 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_hl_s1,SI_ftype_SISI,2) 1469 // 1470 def int_hexagon_M2_mpy_rnd_hl_s1 : 1471 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_hl_s1">; 1472 // 1473 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_lh_s0,SI_ftype_SISI,2) 1474 // 1475 def int_hexagon_M2_mpy_rnd_lh_s0 : 1476 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_lh_s0">; 1477 // 1478 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_lh_s1,SI_ftype_SISI,2) 1479 // 1480 def int_hexagon_M2_mpy_rnd_lh_s1 : 1481 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_lh_s1">; 1482 // 1483 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_ll_s0,SI_ftype_SISI,2) 1484 // 1485 def int_hexagon_M2_mpy_rnd_ll_s0 : 1486 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_ll_s0">; 1487 // 1488 // BUILTIN_INFO(HEXAGON.M2_mpy_rnd_ll_s1,SI_ftype_SISI,2) 1489 // 1490 def int_hexagon_M2_mpy_rnd_ll_s1 : 1491 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_rnd_ll_s1">; 1492 // 1493 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hh_s0,SI_ftype_SISI,2) 1494 // 1495 def int_hexagon_M2_mpy_sat_rnd_hh_s0 : 1496 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hh_s0">; 1497 // 1498 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hh_s1,SI_ftype_SISI,2) 1499 // 1500 def int_hexagon_M2_mpy_sat_rnd_hh_s1 : 1501 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hh_s1">; 1502 // 1503 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hl_s0,SI_ftype_SISI,2) 1504 // 1505 def int_hexagon_M2_mpy_sat_rnd_hl_s0 : 1506 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hl_s0">; 1507 // 1508 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_hl_s1,SI_ftype_SISI,2) 1509 // 1510 def int_hexagon_M2_mpy_sat_rnd_hl_s1 : 1511 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_hl_s1">; 1512 // 1513 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_lh_s0,SI_ftype_SISI,2) 1514 // 1515 def int_hexagon_M2_mpy_sat_rnd_lh_s0 : 1516 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_lh_s0">; 1517 // 1518 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_lh_s1,SI_ftype_SISI,2) 1519 // 1520 def int_hexagon_M2_mpy_sat_rnd_lh_s1 : 1521 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_lh_s1">; 1522 // 1523 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_ll_s0,SI_ftype_SISI,2) 1524 // 1525 def int_hexagon_M2_mpy_sat_rnd_ll_s0 : 1526 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_ll_s0">; 1527 // 1528 // BUILTIN_INFO(HEXAGON.M2_mpy_sat_rnd_ll_s1,SI_ftype_SISI,2) 1529 // 1530 def int_hexagon_M2_mpy_sat_rnd_ll_s1 : 1531 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_sat_rnd_ll_s1">; 1532 // 1533 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hh_s0,DI_ftype_DISISI,3) 1534 // 1535 def int_hexagon_M2_mpyd_acc_hh_s0 : 1536 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hh_s0">; 1537 // 1538 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hh_s1,DI_ftype_DISISI,3) 1539 // 1540 def int_hexagon_M2_mpyd_acc_hh_s1 : 1541 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hh_s1">; 1542 // 1543 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hl_s0,DI_ftype_DISISI,3) 1544 // 1545 def int_hexagon_M2_mpyd_acc_hl_s0 : 1546 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hl_s0">; 1547 // 1548 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_hl_s1,DI_ftype_DISISI,3) 1549 // 1550 def int_hexagon_M2_mpyd_acc_hl_s1 : 1551 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_hl_s1">; 1552 // 1553 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_lh_s0,DI_ftype_DISISI,3) 1554 // 1555 def int_hexagon_M2_mpyd_acc_lh_s0 : 1556 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_lh_s0">; 1557 // 1558 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_lh_s1,DI_ftype_DISISI,3) 1559 // 1560 def int_hexagon_M2_mpyd_acc_lh_s1 : 1561 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_lh_s1">; 1562 // 1563 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_ll_s0,DI_ftype_DISISI,3) 1564 // 1565 def int_hexagon_M2_mpyd_acc_ll_s0 : 1566 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_ll_s0">; 1567 // 1568 // BUILTIN_INFO(HEXAGON.M2_mpyd_acc_ll_s1,DI_ftype_DISISI,3) 1569 // 1570 def int_hexagon_M2_mpyd_acc_ll_s1 : 1571 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_acc_ll_s1">; 1572 // 1573 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hh_s0,DI_ftype_DISISI,3) 1574 // 1575 def int_hexagon_M2_mpyd_nac_hh_s0 : 1576 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hh_s0">; 1577 // 1578 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hh_s1,DI_ftype_DISISI,3) 1579 // 1580 def int_hexagon_M2_mpyd_nac_hh_s1 : 1581 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hh_s1">; 1582 // 1583 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hl_s0,DI_ftype_DISISI,3) 1584 // 1585 def int_hexagon_M2_mpyd_nac_hl_s0 : 1586 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hl_s0">; 1587 // 1588 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_hl_s1,DI_ftype_DISISI,3) 1589 // 1590 def int_hexagon_M2_mpyd_nac_hl_s1 : 1591 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_hl_s1">; 1592 // 1593 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_lh_s0,DI_ftype_DISISI,3) 1594 // 1595 def int_hexagon_M2_mpyd_nac_lh_s0 : 1596 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_lh_s0">; 1597 // 1598 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_lh_s1,DI_ftype_DISISI,3) 1599 // 1600 def int_hexagon_M2_mpyd_nac_lh_s1 : 1601 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_lh_s1">; 1602 // 1603 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_ll_s0,DI_ftype_DISISI,3) 1604 // 1605 def int_hexagon_M2_mpyd_nac_ll_s0 : 1606 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_ll_s0">; 1607 // 1608 // BUILTIN_INFO(HEXAGON.M2_mpyd_nac_ll_s1,DI_ftype_DISISI,3) 1609 // 1610 def int_hexagon_M2_mpyd_nac_ll_s1 : 1611 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyd_nac_ll_s1">; 1612 // 1613 // BUILTIN_INFO(HEXAGON.M2_mpyd_hh_s0,DI_ftype_SISI,2) 1614 // 1615 def int_hexagon_M2_mpyd_hh_s0 : 1616 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hh_s0">; 1617 // 1618 // BUILTIN_INFO(HEXAGON.M2_mpyd_hh_s1,DI_ftype_SISI,2) 1619 // 1620 def int_hexagon_M2_mpyd_hh_s1 : 1621 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hh_s1">; 1622 // 1623 // BUILTIN_INFO(HEXAGON.M2_mpyd_hl_s0,DI_ftype_SISI,2) 1624 // 1625 def int_hexagon_M2_mpyd_hl_s0 : 1626 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hl_s0">; 1627 // 1628 // BUILTIN_INFO(HEXAGON.M2_mpyd_hl_s1,DI_ftype_SISI,2) 1629 // 1630 def int_hexagon_M2_mpyd_hl_s1 : 1631 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_hl_s1">; 1632 // 1633 // BUILTIN_INFO(HEXAGON.M2_mpyd_lh_s0,DI_ftype_SISI,2) 1634 // 1635 def int_hexagon_M2_mpyd_lh_s0 : 1636 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_lh_s0">; 1637 // 1638 // BUILTIN_INFO(HEXAGON.M2_mpyd_lh_s1,DI_ftype_SISI,2) 1639 // 1640 def int_hexagon_M2_mpyd_lh_s1 : 1641 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_lh_s1">; 1642 // 1643 // BUILTIN_INFO(HEXAGON.M2_mpyd_ll_s0,DI_ftype_SISI,2) 1644 // 1645 def int_hexagon_M2_mpyd_ll_s0 : 1646 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_ll_s0">; 1647 // 1648 // BUILTIN_INFO(HEXAGON.M2_mpyd_ll_s1,DI_ftype_SISI,2) 1649 // 1650 def int_hexagon_M2_mpyd_ll_s1 : 1651 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_ll_s1">; 1652 // 1653 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hh_s0,DI_ftype_SISI,2) 1654 // 1655 def int_hexagon_M2_mpyd_rnd_hh_s0 : 1656 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hh_s0">; 1657 // 1658 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hh_s1,DI_ftype_SISI,2) 1659 // 1660 def int_hexagon_M2_mpyd_rnd_hh_s1 : 1661 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hh_s1">; 1662 // 1663 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hl_s0,DI_ftype_SISI,2) 1664 // 1665 def int_hexagon_M2_mpyd_rnd_hl_s0 : 1666 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hl_s0">; 1667 // 1668 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_hl_s1,DI_ftype_SISI,2) 1669 // 1670 def int_hexagon_M2_mpyd_rnd_hl_s1 : 1671 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_hl_s1">; 1672 // 1673 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_lh_s0,DI_ftype_SISI,2) 1674 // 1675 def int_hexagon_M2_mpyd_rnd_lh_s0 : 1676 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_lh_s0">; 1677 // 1678 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_lh_s1,DI_ftype_SISI,2) 1679 // 1680 def int_hexagon_M2_mpyd_rnd_lh_s1 : 1681 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_lh_s1">; 1682 // 1683 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_ll_s0,DI_ftype_SISI,2) 1684 // 1685 def int_hexagon_M2_mpyd_rnd_ll_s0 : 1686 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_ll_s0">; 1687 // 1688 // BUILTIN_INFO(HEXAGON.M2_mpyd_rnd_ll_s1,DI_ftype_SISI,2) 1689 // 1690 def int_hexagon_M2_mpyd_rnd_ll_s1 : 1691 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyd_rnd_ll_s1">; 1692 // 1693 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hh_s0,SI_ftype_SISISI,3) 1694 // 1695 def int_hexagon_M2_mpyu_acc_hh_s0 : 1696 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hh_s0">; 1697 // 1698 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hh_s1,SI_ftype_SISISI,3) 1699 // 1700 def int_hexagon_M2_mpyu_acc_hh_s1 : 1701 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hh_s1">; 1702 // 1703 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hl_s0,SI_ftype_SISISI,3) 1704 // 1705 def int_hexagon_M2_mpyu_acc_hl_s0 : 1706 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hl_s0">; 1707 // 1708 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_hl_s1,SI_ftype_SISISI,3) 1709 // 1710 def int_hexagon_M2_mpyu_acc_hl_s1 : 1711 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_hl_s1">; 1712 // 1713 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_lh_s0,SI_ftype_SISISI,3) 1714 // 1715 def int_hexagon_M2_mpyu_acc_lh_s0 : 1716 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_lh_s0">; 1717 // 1718 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_lh_s1,SI_ftype_SISISI,3) 1719 // 1720 def int_hexagon_M2_mpyu_acc_lh_s1 : 1721 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_lh_s1">; 1722 // 1723 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_ll_s0,SI_ftype_SISISI,3) 1724 // 1725 def int_hexagon_M2_mpyu_acc_ll_s0 : 1726 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_ll_s0">; 1727 // 1728 // BUILTIN_INFO(HEXAGON.M2_mpyu_acc_ll_s1,SI_ftype_SISISI,3) 1729 // 1730 def int_hexagon_M2_mpyu_acc_ll_s1 : 1731 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_acc_ll_s1">; 1732 // 1733 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hh_s0,SI_ftype_SISISI,3) 1734 // 1735 def int_hexagon_M2_mpyu_nac_hh_s0 : 1736 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hh_s0">; 1737 // 1738 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hh_s1,SI_ftype_SISISI,3) 1739 // 1740 def int_hexagon_M2_mpyu_nac_hh_s1 : 1741 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hh_s1">; 1742 // 1743 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hl_s0,SI_ftype_SISISI,3) 1744 // 1745 def int_hexagon_M2_mpyu_nac_hl_s0 : 1746 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hl_s0">; 1747 // 1748 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_hl_s1,SI_ftype_SISISI,3) 1749 // 1750 def int_hexagon_M2_mpyu_nac_hl_s1 : 1751 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_hl_s1">; 1752 // 1753 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_lh_s0,SI_ftype_SISISI,3) 1754 // 1755 def int_hexagon_M2_mpyu_nac_lh_s0 : 1756 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_lh_s0">; 1757 // 1758 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_lh_s1,SI_ftype_SISISI,3) 1759 // 1760 def int_hexagon_M2_mpyu_nac_lh_s1 : 1761 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_lh_s1">; 1762 // 1763 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_ll_s0,SI_ftype_SISISI,3) 1764 // 1765 def int_hexagon_M2_mpyu_nac_ll_s0 : 1766 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_ll_s0">; 1767 // 1768 // BUILTIN_INFO(HEXAGON.M2_mpyu_nac_ll_s1,SI_ftype_SISISI,3) 1769 // 1770 def int_hexagon_M2_mpyu_nac_ll_s1 : 1771 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_mpyu_nac_ll_s1">; 1772 // 1773 // BUILTIN_INFO(HEXAGON.M2_mpyu_hh_s0,USI_ftype_SISI,2) 1774 // 1775 def int_hexagon_M2_mpyu_hh_s0 : 1776 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hh_s0">; 1777 // 1778 // BUILTIN_INFO(HEXAGON.M2_mpyu_hh_s1,USI_ftype_SISI,2) 1779 // 1780 def int_hexagon_M2_mpyu_hh_s1 : 1781 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hh_s1">; 1782 // 1783 // BUILTIN_INFO(HEXAGON.M2_mpyu_hl_s0,USI_ftype_SISI,2) 1784 // 1785 def int_hexagon_M2_mpyu_hl_s0 : 1786 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hl_s0">; 1787 // 1788 // BUILTIN_INFO(HEXAGON.M2_mpyu_hl_s1,USI_ftype_SISI,2) 1789 // 1790 def int_hexagon_M2_mpyu_hl_s1 : 1791 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_hl_s1">; 1792 // 1793 // BUILTIN_INFO(HEXAGON.M2_mpyu_lh_s0,USI_ftype_SISI,2) 1794 // 1795 def int_hexagon_M2_mpyu_lh_s0 : 1796 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_lh_s0">; 1797 // 1798 // BUILTIN_INFO(HEXAGON.M2_mpyu_lh_s1,USI_ftype_SISI,2) 1799 // 1800 def int_hexagon_M2_mpyu_lh_s1 : 1801 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_lh_s1">; 1802 // 1803 // BUILTIN_INFO(HEXAGON.M2_mpyu_ll_s0,USI_ftype_SISI,2) 1804 // 1805 def int_hexagon_M2_mpyu_ll_s0 : 1806 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_ll_s0">; 1807 // 1808 // BUILTIN_INFO(HEXAGON.M2_mpyu_ll_s1,USI_ftype_SISI,2) 1809 // 1810 def int_hexagon_M2_mpyu_ll_s1 : 1811 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_ll_s1">; 1812 // 1813 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hh_s0,DI_ftype_DISISI,3) 1814 // 1815 def int_hexagon_M2_mpyud_acc_hh_s0 : 1816 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hh_s0">; 1817 // 1818 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hh_s1,DI_ftype_DISISI,3) 1819 // 1820 def int_hexagon_M2_mpyud_acc_hh_s1 : 1821 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hh_s1">; 1822 // 1823 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hl_s0,DI_ftype_DISISI,3) 1824 // 1825 def int_hexagon_M2_mpyud_acc_hl_s0 : 1826 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hl_s0">; 1827 // 1828 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_hl_s1,DI_ftype_DISISI,3) 1829 // 1830 def int_hexagon_M2_mpyud_acc_hl_s1 : 1831 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_hl_s1">; 1832 // 1833 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_lh_s0,DI_ftype_DISISI,3) 1834 // 1835 def int_hexagon_M2_mpyud_acc_lh_s0 : 1836 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_lh_s0">; 1837 // 1838 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_lh_s1,DI_ftype_DISISI,3) 1839 // 1840 def int_hexagon_M2_mpyud_acc_lh_s1 : 1841 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_lh_s1">; 1842 // 1843 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_ll_s0,DI_ftype_DISISI,3) 1844 // 1845 def int_hexagon_M2_mpyud_acc_ll_s0 : 1846 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_ll_s0">; 1847 // 1848 // BUILTIN_INFO(HEXAGON.M2_mpyud_acc_ll_s1,DI_ftype_DISISI,3) 1849 // 1850 def int_hexagon_M2_mpyud_acc_ll_s1 : 1851 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_acc_ll_s1">; 1852 // 1853 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hh_s0,DI_ftype_DISISI,3) 1854 // 1855 def int_hexagon_M2_mpyud_nac_hh_s0 : 1856 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hh_s0">; 1857 // 1858 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hh_s1,DI_ftype_DISISI,3) 1859 // 1860 def int_hexagon_M2_mpyud_nac_hh_s1 : 1861 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hh_s1">; 1862 // 1863 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hl_s0,DI_ftype_DISISI,3) 1864 // 1865 def int_hexagon_M2_mpyud_nac_hl_s0 : 1866 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hl_s0">; 1867 // 1868 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_hl_s1,DI_ftype_DISISI,3) 1869 // 1870 def int_hexagon_M2_mpyud_nac_hl_s1 : 1871 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_hl_s1">; 1872 // 1873 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_lh_s0,DI_ftype_DISISI,3) 1874 // 1875 def int_hexagon_M2_mpyud_nac_lh_s0 : 1876 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_lh_s0">; 1877 // 1878 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_lh_s1,DI_ftype_DISISI,3) 1879 // 1880 def int_hexagon_M2_mpyud_nac_lh_s1 : 1881 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_lh_s1">; 1882 // 1883 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_ll_s0,DI_ftype_DISISI,3) 1884 // 1885 def int_hexagon_M2_mpyud_nac_ll_s0 : 1886 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_ll_s0">; 1887 // 1888 // BUILTIN_INFO(HEXAGON.M2_mpyud_nac_ll_s1,DI_ftype_DISISI,3) 1889 // 1890 def int_hexagon_M2_mpyud_nac_ll_s1 : 1891 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_mpyud_nac_ll_s1">; 1892 // 1893 // BUILTIN_INFO(HEXAGON.M2_mpyud_hh_s0,UDI_ftype_SISI,2) 1894 // 1895 def int_hexagon_M2_mpyud_hh_s0 : 1896 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hh_s0">; 1897 // 1898 // BUILTIN_INFO(HEXAGON.M2_mpyud_hh_s1,UDI_ftype_SISI,2) 1899 // 1900 def int_hexagon_M2_mpyud_hh_s1 : 1901 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hh_s1">; 1902 // 1903 // BUILTIN_INFO(HEXAGON.M2_mpyud_hl_s0,UDI_ftype_SISI,2) 1904 // 1905 def int_hexagon_M2_mpyud_hl_s0 : 1906 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hl_s0">; 1907 // 1908 // BUILTIN_INFO(HEXAGON.M2_mpyud_hl_s1,UDI_ftype_SISI,2) 1909 // 1910 def int_hexagon_M2_mpyud_hl_s1 : 1911 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_hl_s1">; 1912 // 1913 // BUILTIN_INFO(HEXAGON.M2_mpyud_lh_s0,UDI_ftype_SISI,2) 1914 // 1915 def int_hexagon_M2_mpyud_lh_s0 : 1916 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_lh_s0">; 1917 // 1918 // BUILTIN_INFO(HEXAGON.M2_mpyud_lh_s1,UDI_ftype_SISI,2) 1919 // 1920 def int_hexagon_M2_mpyud_lh_s1 : 1921 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_lh_s1">; 1922 // 1923 // BUILTIN_INFO(HEXAGON.M2_mpyud_ll_s0,UDI_ftype_SISI,2) 1924 // 1925 def int_hexagon_M2_mpyud_ll_s0 : 1926 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_ll_s0">; 1927 // 1928 // BUILTIN_INFO(HEXAGON.M2_mpyud_ll_s1,UDI_ftype_SISI,2) 1929 // 1930 def int_hexagon_M2_mpyud_ll_s1 : 1931 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_mpyud_ll_s1">; 1932 // 1933 // BUILTIN_INFO(HEXAGON.M2_mpysmi,SI_ftype_SISI,2) 1934 // 1935 def int_hexagon_M2_mpysmi : 1936 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpysmi">; 1937 // 1938 // BUILTIN_INFO(HEXAGON.M2_macsip,SI_ftype_SISISI,3) 1939 // 1940 def int_hexagon_M2_macsip : 1941 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_macsip">; 1942 // 1943 // BUILTIN_INFO(HEXAGON.M2_macsin,SI_ftype_SISISI,3) 1944 // 1945 def int_hexagon_M2_macsin : 1946 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_macsin">; 1947 // 1948 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_s0,DI_ftype_SISI,2) 1949 // 1950 def int_hexagon_M2_dpmpyss_s0 : 1951 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_dpmpyss_s0">; 1952 // 1953 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_acc_s0,DI_ftype_DISISI,3) 1954 // 1955 def int_hexagon_M2_dpmpyss_acc_s0 : 1956 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyss_acc_s0">; 1957 // 1958 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_nac_s0,DI_ftype_DISISI,3) 1959 // 1960 def int_hexagon_M2_dpmpyss_nac_s0 : 1961 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyss_nac_s0">; 1962 // 1963 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_s0,UDI_ftype_SISI,2) 1964 // 1965 def int_hexagon_M2_dpmpyuu_s0 : 1966 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_dpmpyuu_s0">; 1967 // 1968 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_acc_s0,DI_ftype_DISISI,3) 1969 // 1970 def int_hexagon_M2_dpmpyuu_acc_s0 : 1971 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyuu_acc_s0">; 1972 // 1973 // BUILTIN_INFO(HEXAGON.M2_dpmpyuu_nac_s0,DI_ftype_DISISI,3) 1974 // 1975 def int_hexagon_M2_dpmpyuu_nac_s0 : 1976 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_dpmpyuu_nac_s0">; 1977 // 1978 // BUILTIN_INFO(HEXAGON.M2_mpy_up,SI_ftype_SISI,2) 1979 // 1980 def int_hexagon_M2_mpy_up : 1981 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up">; 1982 // 1983 // BUILTIN_INFO(HEXAGON.M2_mpy_up_s1,SI_ftype_SISI,2) 1984 // 1985 def int_hexagon_M2_mpy_up_s1 : 1986 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up_s1">; 1987 // 1988 // BUILTIN_INFO(HEXAGON.M2_mpy_up_s1_sat,SI_ftype_SISI,2) 1989 // 1990 def int_hexagon_M2_mpy_up_s1_sat : 1991 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpy_up_s1_sat">; 1992 // 1993 // BUILTIN_INFO(HEXAGON.M2_mpyu_up,USI_ftype_SISI,2) 1994 // 1995 def int_hexagon_M2_mpyu_up : 1996 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyu_up">; 1997 // 1998 // BUILTIN_INFO(HEXAGON.M2_mpysu_up,SI_ftype_SISI,2) 1999 // 2000 def int_hexagon_M2_mpysu_up : 2001 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpysu_up">; 2002 // 2003 // BUILTIN_INFO(HEXAGON.M2_dpmpyss_rnd_s0,SI_ftype_SISI,2) 2004 // 2005 def int_hexagon_M2_dpmpyss_rnd_s0 : 2006 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_dpmpyss_rnd_s0">; 2007 // 2008 // BUILTIN_INFO(HEXAGON.M4_mac_up_s1_sat,SI_ftype_SISISI,3) 2009 // 2010 def int_hexagon_M4_mac_up_s1_sat : 2011 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mac_up_s1_sat">; 2012 // 2013 // BUILTIN_INFO(HEXAGON.M4_nac_up_s1_sat,SI_ftype_SISISI,3) 2014 // 2015 def int_hexagon_M4_nac_up_s1_sat : 2016 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_nac_up_s1_sat">; 2017 // 2018 // BUILTIN_INFO(HEXAGON.M2_mpyi,SI_ftype_SISI,2) 2019 // 2020 def int_hexagon_M2_mpyi : 2021 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyi">; 2022 // 2023 // BUILTIN_INFO(HEXAGON.M2_mpyui,SI_ftype_SISI,2) 2024 // 2025 def int_hexagon_M2_mpyui : 2026 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_mpyui">; 2027 // 2028 // BUILTIN_INFO(HEXAGON.M2_maci,SI_ftype_SISISI,3) 2029 // 2030 def int_hexagon_M2_maci : 2031 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_maci">; 2032 // 2033 // BUILTIN_INFO(HEXAGON.M2_acci,SI_ftype_SISISI,3) 2034 // 2035 def int_hexagon_M2_acci : 2036 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_acci">; 2037 // 2038 // BUILTIN_INFO(HEXAGON.M2_accii,SI_ftype_SISISI,3) 2039 // 2040 def int_hexagon_M2_accii : 2041 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_accii">; 2042 // 2043 // BUILTIN_INFO(HEXAGON.M2_nacci,SI_ftype_SISISI,3) 2044 // 2045 def int_hexagon_M2_nacci : 2046 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_nacci">; 2047 // 2048 // BUILTIN_INFO(HEXAGON.M2_naccii,SI_ftype_SISISI,3) 2049 // 2050 def int_hexagon_M2_naccii : 2051 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_naccii">; 2052 // 2053 // BUILTIN_INFO(HEXAGON.M2_subacc,SI_ftype_SISISI,3) 2054 // 2055 def int_hexagon_M2_subacc : 2056 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_subacc">; 2057 // 2058 // BUILTIN_INFO(HEXAGON.M4_mpyrr_addr,SI_ftype_SISISI,3) 2059 // 2060 def int_hexagon_M4_mpyrr_addr : 2061 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyrr_addr">; 2062 // 2063 // BUILTIN_INFO(HEXAGON.M4_mpyri_addr_u2,SI_ftype_SISISI,3) 2064 // 2065 def int_hexagon_M4_mpyri_addr_u2 : 2066 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addr_u2">; 2067 // 2068 // BUILTIN_INFO(HEXAGON.M4_mpyri_addr,SI_ftype_SISISI,3) 2069 // 2070 def int_hexagon_M4_mpyri_addr : 2071 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addr">; 2072 // 2073 // BUILTIN_INFO(HEXAGON.M4_mpyri_addi,SI_ftype_SISISI,3) 2074 // 2075 def int_hexagon_M4_mpyri_addi : 2076 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyri_addi">; 2077 // 2078 // BUILTIN_INFO(HEXAGON.M4_mpyrr_addi,SI_ftype_SISISI,3) 2079 // 2080 def int_hexagon_M4_mpyrr_addi : 2081 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_mpyrr_addi">; 2082 // 2083 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s0,DI_ftype_SISI,2) 2084 // 2085 def int_hexagon_M2_vmpy2s_s0 : 2086 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s0">; 2087 // 2088 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s1,DI_ftype_SISI,2) 2089 // 2090 def int_hexagon_M2_vmpy2s_s1 : 2091 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s1">; 2092 // 2093 // BUILTIN_INFO(HEXAGON.M2_vmac2s_s0,DI_ftype_DISISI,3) 2094 // 2095 def int_hexagon_M2_vmac2s_s0 : 2096 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2s_s0">; 2097 // 2098 // BUILTIN_INFO(HEXAGON.M2_vmac2s_s1,DI_ftype_DISISI,3) 2099 // 2100 def int_hexagon_M2_vmac2s_s1 : 2101 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2s_s1">; 2102 // 2103 // BUILTIN_INFO(HEXAGON.M2_vmpy2su_s0,DI_ftype_SISI,2) 2104 // 2105 def int_hexagon_M2_vmpy2su_s0 : 2106 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2su_s0">; 2107 // 2108 // BUILTIN_INFO(HEXAGON.M2_vmpy2su_s1,DI_ftype_SISI,2) 2109 // 2110 def int_hexagon_M2_vmpy2su_s1 : 2111 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_vmpy2su_s1">; 2112 // 2113 // BUILTIN_INFO(HEXAGON.M2_vmac2su_s0,DI_ftype_DISISI,3) 2114 // 2115 def int_hexagon_M2_vmac2su_s0 : 2116 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2su_s0">; 2117 // 2118 // BUILTIN_INFO(HEXAGON.M2_vmac2su_s1,DI_ftype_DISISI,3) 2119 // 2120 def int_hexagon_M2_vmac2su_s1 : 2121 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2su_s1">; 2122 // 2123 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s0pack,SI_ftype_SISI,2) 2124 // 2125 def int_hexagon_M2_vmpy2s_s0pack : 2126 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s0pack">; 2127 // 2128 // BUILTIN_INFO(HEXAGON.M2_vmpy2s_s1pack,SI_ftype_SISI,2) 2129 // 2130 def int_hexagon_M2_vmpy2s_s1pack : 2131 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_vmpy2s_s1pack">; 2132 // 2133 // BUILTIN_INFO(HEXAGON.M2_vmac2,DI_ftype_DISISI,3) 2134 // 2135 def int_hexagon_M2_vmac2 : 2136 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_vmac2">; 2137 // 2138 // BUILTIN_INFO(HEXAGON.M2_vmpy2es_s0,DI_ftype_DIDI,2) 2139 // 2140 def int_hexagon_M2_vmpy2es_s0 : 2141 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vmpy2es_s0">; 2142 // 2143 // BUILTIN_INFO(HEXAGON.M2_vmpy2es_s1,DI_ftype_DIDI,2) 2144 // 2145 def int_hexagon_M2_vmpy2es_s1 : 2146 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vmpy2es_s1">; 2147 // 2148 // BUILTIN_INFO(HEXAGON.M2_vmac2es_s0,DI_ftype_DIDIDI,3) 2149 // 2150 def int_hexagon_M2_vmac2es_s0 : 2151 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es_s0">; 2152 // 2153 // BUILTIN_INFO(HEXAGON.M2_vmac2es_s1,DI_ftype_DIDIDI,3) 2154 // 2155 def int_hexagon_M2_vmac2es_s1 : 2156 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es_s1">; 2157 // 2158 // BUILTIN_INFO(HEXAGON.M2_vmac2es,DI_ftype_DIDIDI,3) 2159 // 2160 def int_hexagon_M2_vmac2es : 2161 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vmac2es">; 2162 // 2163 // BUILTIN_INFO(HEXAGON.M2_vrmac_s0,DI_ftype_DIDIDI,3) 2164 // 2165 def int_hexagon_M2_vrmac_s0 : 2166 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrmac_s0">; 2167 // 2168 // BUILTIN_INFO(HEXAGON.M2_vrmpy_s0,DI_ftype_DIDI,2) 2169 // 2170 def int_hexagon_M2_vrmpy_s0 : 2171 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrmpy_s0">; 2172 // 2173 // BUILTIN_INFO(HEXAGON.M2_vdmpyrs_s0,SI_ftype_DIDI,2) 2174 // 2175 def int_hexagon_M2_vdmpyrs_s0 : 2176 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vdmpyrs_s0">; 2177 // 2178 // BUILTIN_INFO(HEXAGON.M2_vdmpyrs_s1,SI_ftype_DIDI,2) 2179 // 2180 def int_hexagon_M2_vdmpyrs_s1 : 2181 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vdmpyrs_s1">; 2182 // 2183 // BUILTIN_INFO(HEXAGON.M5_vrmpybuu,DI_ftype_DIDI,2) 2184 // 2185 def int_hexagon_M5_vrmpybuu : 2186 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vrmpybuu">; 2187 // 2188 // BUILTIN_INFO(HEXAGON.M5_vrmacbuu,DI_ftype_DIDIDI,3) 2189 // 2190 def int_hexagon_M5_vrmacbuu : 2191 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vrmacbuu">; 2192 // 2193 // BUILTIN_INFO(HEXAGON.M5_vrmpybsu,DI_ftype_DIDI,2) 2194 // 2195 def int_hexagon_M5_vrmpybsu : 2196 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vrmpybsu">; 2197 // 2198 // BUILTIN_INFO(HEXAGON.M5_vrmacbsu,DI_ftype_DIDIDI,3) 2199 // 2200 def int_hexagon_M5_vrmacbsu : 2201 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vrmacbsu">; 2202 // 2203 // BUILTIN_INFO(HEXAGON.M5_vmpybuu,DI_ftype_SISI,2) 2204 // 2205 def int_hexagon_M5_vmpybuu : 2206 Hexagon_di_sisi_Intrinsic<"HEXAGON_M5_vmpybuu">; 2207 // 2208 // BUILTIN_INFO(HEXAGON.M5_vmpybsu,DI_ftype_SISI,2) 2209 // 2210 def int_hexagon_M5_vmpybsu : 2211 Hexagon_di_sisi_Intrinsic<"HEXAGON_M5_vmpybsu">; 2212 // 2213 // BUILTIN_INFO(HEXAGON.M5_vmacbuu,DI_ftype_DISISI,3) 2214 // 2215 def int_hexagon_M5_vmacbuu : 2216 Hexagon_di_disisi_Intrinsic<"HEXAGON_M5_vmacbuu">; 2217 // 2218 // BUILTIN_INFO(HEXAGON.M5_vmacbsu,DI_ftype_DISISI,3) 2219 // 2220 def int_hexagon_M5_vmacbsu : 2221 Hexagon_di_disisi_Intrinsic<"HEXAGON_M5_vmacbsu">; 2222 // 2223 // BUILTIN_INFO(HEXAGON.M5_vdmpybsu,DI_ftype_DIDI,2) 2224 // 2225 def int_hexagon_M5_vdmpybsu : 2226 Hexagon_di_didi_Intrinsic<"HEXAGON_M5_vdmpybsu">; 2227 // 2228 // BUILTIN_INFO(HEXAGON.M5_vdmacbsu,DI_ftype_DIDIDI,3) 2229 // 2230 def int_hexagon_M5_vdmacbsu : 2231 Hexagon_di_dididi_Intrinsic<"HEXAGON_M5_vdmacbsu">; 2232 // 2233 // BUILTIN_INFO(HEXAGON.M2_vdmacs_s0,DI_ftype_DIDIDI,3) 2234 // 2235 def int_hexagon_M2_vdmacs_s0 : 2236 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vdmacs_s0">; 2237 // 2238 // BUILTIN_INFO(HEXAGON.M2_vdmacs_s1,DI_ftype_DIDIDI,3) 2239 // 2240 def int_hexagon_M2_vdmacs_s1 : 2241 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vdmacs_s1">; 2242 // 2243 // BUILTIN_INFO(HEXAGON.M2_vdmpys_s0,DI_ftype_DIDI,2) 2244 // 2245 def int_hexagon_M2_vdmpys_s0 : 2246 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vdmpys_s0">; 2247 // 2248 // BUILTIN_INFO(HEXAGON.M2_vdmpys_s1,DI_ftype_DIDI,2) 2249 // 2250 def int_hexagon_M2_vdmpys_s1 : 2251 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vdmpys_s1">; 2252 // 2253 // BUILTIN_INFO(HEXAGON.M2_cmpyrs_s0,SI_ftype_SISI,2) 2254 // 2255 def int_hexagon_M2_cmpyrs_s0 : 2256 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrs_s0">; 2257 // 2258 // BUILTIN_INFO(HEXAGON.M2_cmpyrs_s1,SI_ftype_SISI,2) 2259 // 2260 def int_hexagon_M2_cmpyrs_s1 : 2261 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrs_s1">; 2262 // 2263 // BUILTIN_INFO(HEXAGON.M2_cmpyrsc_s0,SI_ftype_SISI,2) 2264 // 2265 def int_hexagon_M2_cmpyrsc_s0 : 2266 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrsc_s0">; 2267 // 2268 // BUILTIN_INFO(HEXAGON.M2_cmpyrsc_s1,SI_ftype_SISI,2) 2269 // 2270 def int_hexagon_M2_cmpyrsc_s1 : 2271 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_cmpyrsc_s1">; 2272 // 2273 // BUILTIN_INFO(HEXAGON.M2_cmacs_s0,DI_ftype_DISISI,3) 2274 // 2275 def int_hexagon_M2_cmacs_s0 : 2276 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacs_s0">; 2277 // 2278 // BUILTIN_INFO(HEXAGON.M2_cmacs_s1,DI_ftype_DISISI,3) 2279 // 2280 def int_hexagon_M2_cmacs_s1 : 2281 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacs_s1">; 2282 // 2283 // BUILTIN_INFO(HEXAGON.M2_cmacsc_s0,DI_ftype_DISISI,3) 2284 // 2285 def int_hexagon_M2_cmacsc_s0 : 2286 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacsc_s0">; 2287 // 2288 // BUILTIN_INFO(HEXAGON.M2_cmacsc_s1,DI_ftype_DISISI,3) 2289 // 2290 def int_hexagon_M2_cmacsc_s1 : 2291 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacsc_s1">; 2292 // 2293 // BUILTIN_INFO(HEXAGON.M2_cmpys_s0,DI_ftype_SISI,2) 2294 // 2295 def int_hexagon_M2_cmpys_s0 : 2296 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpys_s0">; 2297 // 2298 // BUILTIN_INFO(HEXAGON.M2_cmpys_s1,DI_ftype_SISI,2) 2299 // 2300 def int_hexagon_M2_cmpys_s1 : 2301 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpys_s1">; 2302 // 2303 // BUILTIN_INFO(HEXAGON.M2_cmpysc_s0,DI_ftype_SISI,2) 2304 // 2305 def int_hexagon_M2_cmpysc_s0 : 2306 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpysc_s0">; 2307 // 2308 // BUILTIN_INFO(HEXAGON.M2_cmpysc_s1,DI_ftype_SISI,2) 2309 // 2310 def int_hexagon_M2_cmpysc_s1 : 2311 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpysc_s1">; 2312 // 2313 // BUILTIN_INFO(HEXAGON.M2_cnacs_s0,DI_ftype_DISISI,3) 2314 // 2315 def int_hexagon_M2_cnacs_s0 : 2316 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacs_s0">; 2317 // 2318 // BUILTIN_INFO(HEXAGON.M2_cnacs_s1,DI_ftype_DISISI,3) 2319 // 2320 def int_hexagon_M2_cnacs_s1 : 2321 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacs_s1">; 2322 // 2323 // BUILTIN_INFO(HEXAGON.M2_cnacsc_s0,DI_ftype_DISISI,3) 2324 // 2325 def int_hexagon_M2_cnacsc_s0 : 2326 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacsc_s0">; 2327 // 2328 // BUILTIN_INFO(HEXAGON.M2_cnacsc_s1,DI_ftype_DISISI,3) 2329 // 2330 def int_hexagon_M2_cnacsc_s1 : 2331 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cnacsc_s1">; 2332 // 2333 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_s1,DI_ftype_DISI,2) 2334 // 2335 def int_hexagon_M2_vrcmpys_s1 : 2336 Hexagon_di_disi_Intrinsic<"HEXAGON_M2_vrcmpys_s1">; 2337 // 2338 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_acc_s1,DI_ftype_DIDISI,3) 2339 // 2340 def int_hexagon_M2_vrcmpys_acc_s1 : 2341 Hexagon_di_didisi_Intrinsic<"HEXAGON_M2_vrcmpys_acc_s1">; 2342 // 2343 // BUILTIN_INFO(HEXAGON.M2_vrcmpys_s1rp,SI_ftype_DISI,2) 2344 // 2345 def int_hexagon_M2_vrcmpys_s1rp : 2346 Hexagon_si_disi_Intrinsic<"HEXAGON_M2_vrcmpys_s1rp">; 2347 // 2348 // BUILTIN_INFO(HEXAGON.M2_mmacls_s0,DI_ftype_DIDIDI,3) 2349 // 2350 def int_hexagon_M2_mmacls_s0 : 2351 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_s0">; 2352 // 2353 // BUILTIN_INFO(HEXAGON.M2_mmacls_s1,DI_ftype_DIDIDI,3) 2354 // 2355 def int_hexagon_M2_mmacls_s1 : 2356 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_s1">; 2357 // 2358 // BUILTIN_INFO(HEXAGON.M2_mmachs_s0,DI_ftype_DIDIDI,3) 2359 // 2360 def int_hexagon_M2_mmachs_s0 : 2361 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_s0">; 2362 // 2363 // BUILTIN_INFO(HEXAGON.M2_mmachs_s1,DI_ftype_DIDIDI,3) 2364 // 2365 def int_hexagon_M2_mmachs_s1 : 2366 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_s1">; 2367 // 2368 // BUILTIN_INFO(HEXAGON.M2_mmpyl_s0,DI_ftype_DIDI,2) 2369 // 2370 def int_hexagon_M2_mmpyl_s0 : 2371 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_s0">; 2372 // 2373 // BUILTIN_INFO(HEXAGON.M2_mmpyl_s1,DI_ftype_DIDI,2) 2374 // 2375 def int_hexagon_M2_mmpyl_s1 : 2376 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_s1">; 2377 // 2378 // BUILTIN_INFO(HEXAGON.M2_mmpyh_s0,DI_ftype_DIDI,2) 2379 // 2380 def int_hexagon_M2_mmpyh_s0 : 2381 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_s0">; 2382 // 2383 // BUILTIN_INFO(HEXAGON.M2_mmpyh_s1,DI_ftype_DIDI,2) 2384 // 2385 def int_hexagon_M2_mmpyh_s1 : 2386 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_s1">; 2387 // 2388 // BUILTIN_INFO(HEXAGON.M2_mmacls_rs0,DI_ftype_DIDIDI,3) 2389 // 2390 def int_hexagon_M2_mmacls_rs0 : 2391 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_rs0">; 2392 // 2393 // BUILTIN_INFO(HEXAGON.M2_mmacls_rs1,DI_ftype_DIDIDI,3) 2394 // 2395 def int_hexagon_M2_mmacls_rs1 : 2396 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacls_rs1">; 2397 // 2398 // BUILTIN_INFO(HEXAGON.M2_mmachs_rs0,DI_ftype_DIDIDI,3) 2399 // 2400 def int_hexagon_M2_mmachs_rs0 : 2401 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_rs0">; 2402 // 2403 // BUILTIN_INFO(HEXAGON.M2_mmachs_rs1,DI_ftype_DIDIDI,3) 2404 // 2405 def int_hexagon_M2_mmachs_rs1 : 2406 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmachs_rs1">; 2407 // 2408 // BUILTIN_INFO(HEXAGON.M2_mmpyl_rs0,DI_ftype_DIDI,2) 2409 // 2410 def int_hexagon_M2_mmpyl_rs0 : 2411 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_rs0">; 2412 // 2413 // BUILTIN_INFO(HEXAGON.M2_mmpyl_rs1,DI_ftype_DIDI,2) 2414 // 2415 def int_hexagon_M2_mmpyl_rs1 : 2416 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyl_rs1">; 2417 // 2418 // BUILTIN_INFO(HEXAGON.M2_mmpyh_rs0,DI_ftype_DIDI,2) 2419 // 2420 def int_hexagon_M2_mmpyh_rs0 : 2421 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_rs0">; 2422 // 2423 // BUILTIN_INFO(HEXAGON.M2_mmpyh_rs1,DI_ftype_DIDI,2) 2424 // 2425 def int_hexagon_M2_mmpyh_rs1 : 2426 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyh_rs1">; 2427 // 2428 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_s0,DI_ftype_DIDI,2) 2429 // 2430 def int_hexagon_M4_vrmpyeh_s0 : 2431 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyeh_s0">; 2432 // 2433 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_s1,DI_ftype_DIDI,2) 2434 // 2435 def int_hexagon_M4_vrmpyeh_s1 : 2436 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyeh_s1">; 2437 // 2438 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_acc_s0,DI_ftype_DIDIDI,3) 2439 // 2440 def int_hexagon_M4_vrmpyeh_acc_s0 : 2441 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyeh_acc_s0">; 2442 // 2443 // BUILTIN_INFO(HEXAGON.M4_vrmpyeh_acc_s1,DI_ftype_DIDIDI,3) 2444 // 2445 def int_hexagon_M4_vrmpyeh_acc_s1 : 2446 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyeh_acc_s1">; 2447 // 2448 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_s0,DI_ftype_DIDI,2) 2449 // 2450 def int_hexagon_M4_vrmpyoh_s0 : 2451 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyoh_s0">; 2452 // 2453 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_s1,DI_ftype_DIDI,2) 2454 // 2455 def int_hexagon_M4_vrmpyoh_s1 : 2456 Hexagon_di_didi_Intrinsic<"HEXAGON_M4_vrmpyoh_s1">; 2457 // 2458 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_acc_s0,DI_ftype_DIDIDI,3) 2459 // 2460 def int_hexagon_M4_vrmpyoh_acc_s0 : 2461 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyoh_acc_s0">; 2462 // 2463 // BUILTIN_INFO(HEXAGON.M4_vrmpyoh_acc_s1,DI_ftype_DIDIDI,3) 2464 // 2465 def int_hexagon_M4_vrmpyoh_acc_s1 : 2466 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_vrmpyoh_acc_s1">; 2467 // 2468 // BUILTIN_INFO(HEXAGON.M2_hmmpyl_rs1,SI_ftype_SISI,2) 2469 // 2470 def int_hexagon_M2_hmmpyl_rs1 : 2471 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyl_rs1">; 2472 // 2473 // BUILTIN_INFO(HEXAGON.M2_hmmpyh_rs1,SI_ftype_SISI,2) 2474 // 2475 def int_hexagon_M2_hmmpyh_rs1 : 2476 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyh_rs1">; 2477 // 2478 // BUILTIN_INFO(HEXAGON.M2_hmmpyl_s1,SI_ftype_SISI,2) 2479 // 2480 def int_hexagon_M2_hmmpyl_s1 : 2481 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyl_s1">; 2482 // 2483 // BUILTIN_INFO(HEXAGON.M2_hmmpyh_s1,SI_ftype_SISI,2) 2484 // 2485 def int_hexagon_M2_hmmpyh_s1 : 2486 Hexagon_si_sisi_Intrinsic<"HEXAGON_M2_hmmpyh_s1">; 2487 // 2488 // BUILTIN_INFO(HEXAGON.M2_mmaculs_s0,DI_ftype_DIDIDI,3) 2489 // 2490 def int_hexagon_M2_mmaculs_s0 : 2491 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_s0">; 2492 // 2493 // BUILTIN_INFO(HEXAGON.M2_mmaculs_s1,DI_ftype_DIDIDI,3) 2494 // 2495 def int_hexagon_M2_mmaculs_s1 : 2496 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_s1">; 2497 // 2498 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_s0,DI_ftype_DIDIDI,3) 2499 // 2500 def int_hexagon_M2_mmacuhs_s0 : 2501 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_s0">; 2502 // 2503 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_s1,DI_ftype_DIDIDI,3) 2504 // 2505 def int_hexagon_M2_mmacuhs_s1 : 2506 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_s1">; 2507 // 2508 // BUILTIN_INFO(HEXAGON.M2_mmpyul_s0,DI_ftype_DIDI,2) 2509 // 2510 def int_hexagon_M2_mmpyul_s0 : 2511 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_s0">; 2512 // 2513 // BUILTIN_INFO(HEXAGON.M2_mmpyul_s1,DI_ftype_DIDI,2) 2514 // 2515 def int_hexagon_M2_mmpyul_s1 : 2516 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_s1">; 2517 // 2518 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_s0,DI_ftype_DIDI,2) 2519 // 2520 def int_hexagon_M2_mmpyuh_s0 : 2521 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_s0">; 2522 // 2523 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_s1,DI_ftype_DIDI,2) 2524 // 2525 def int_hexagon_M2_mmpyuh_s1 : 2526 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_s1">; 2527 // 2528 // BUILTIN_INFO(HEXAGON.M2_mmaculs_rs0,DI_ftype_DIDIDI,3) 2529 // 2530 def int_hexagon_M2_mmaculs_rs0 : 2531 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_rs0">; 2532 // 2533 // BUILTIN_INFO(HEXAGON.M2_mmaculs_rs1,DI_ftype_DIDIDI,3) 2534 // 2535 def int_hexagon_M2_mmaculs_rs1 : 2536 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmaculs_rs1">; 2537 // 2538 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_rs0,DI_ftype_DIDIDI,3) 2539 // 2540 def int_hexagon_M2_mmacuhs_rs0 : 2541 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_rs0">; 2542 // 2543 // BUILTIN_INFO(HEXAGON.M2_mmacuhs_rs1,DI_ftype_DIDIDI,3) 2544 // 2545 def int_hexagon_M2_mmacuhs_rs1 : 2546 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_mmacuhs_rs1">; 2547 // 2548 // BUILTIN_INFO(HEXAGON.M2_mmpyul_rs0,DI_ftype_DIDI,2) 2549 // 2550 def int_hexagon_M2_mmpyul_rs0 : 2551 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_rs0">; 2552 // 2553 // BUILTIN_INFO(HEXAGON.M2_mmpyul_rs1,DI_ftype_DIDI,2) 2554 // 2555 def int_hexagon_M2_mmpyul_rs1 : 2556 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyul_rs1">; 2557 // 2558 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_rs0,DI_ftype_DIDI,2) 2559 // 2560 def int_hexagon_M2_mmpyuh_rs0 : 2561 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_rs0">; 2562 // 2563 // BUILTIN_INFO(HEXAGON.M2_mmpyuh_rs1,DI_ftype_DIDI,2) 2564 // 2565 def int_hexagon_M2_mmpyuh_rs1 : 2566 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_mmpyuh_rs1">; 2567 // 2568 // BUILTIN_INFO(HEXAGON.M2_vrcmaci_s0,DI_ftype_DIDIDI,3) 2569 // 2570 def int_hexagon_M2_vrcmaci_s0 : 2571 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmaci_s0">; 2572 // 2573 // BUILTIN_INFO(HEXAGON.M2_vrcmacr_s0,DI_ftype_DIDIDI,3) 2574 // 2575 def int_hexagon_M2_vrcmacr_s0 : 2576 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmacr_s0">; 2577 // 2578 // BUILTIN_INFO(HEXAGON.M2_vrcmaci_s0c,DI_ftype_DIDIDI,3) 2579 // 2580 def int_hexagon_M2_vrcmaci_s0c : 2581 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmaci_s0c">; 2582 // 2583 // BUILTIN_INFO(HEXAGON.M2_vrcmacr_s0c,DI_ftype_DIDIDI,3) 2584 // 2585 def int_hexagon_M2_vrcmacr_s0c : 2586 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vrcmacr_s0c">; 2587 // 2588 // BUILTIN_INFO(HEXAGON.M2_cmaci_s0,DI_ftype_DISISI,3) 2589 // 2590 def int_hexagon_M2_cmaci_s0 : 2591 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmaci_s0">; 2592 // 2593 // BUILTIN_INFO(HEXAGON.M2_cmacr_s0,DI_ftype_DISISI,3) 2594 // 2595 def int_hexagon_M2_cmacr_s0 : 2596 Hexagon_di_disisi_Intrinsic<"HEXAGON_M2_cmacr_s0">; 2597 // 2598 // BUILTIN_INFO(HEXAGON.M2_vrcmpyi_s0,DI_ftype_DIDI,2) 2599 // 2600 def int_hexagon_M2_vrcmpyi_s0 : 2601 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyi_s0">; 2602 // 2603 // BUILTIN_INFO(HEXAGON.M2_vrcmpyr_s0,DI_ftype_DIDI,2) 2604 // 2605 def int_hexagon_M2_vrcmpyr_s0 : 2606 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyr_s0">; 2607 // 2608 // BUILTIN_INFO(HEXAGON.M2_vrcmpyi_s0c,DI_ftype_DIDI,2) 2609 // 2610 def int_hexagon_M2_vrcmpyi_s0c : 2611 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyi_s0c">; 2612 // 2613 // BUILTIN_INFO(HEXAGON.M2_vrcmpyr_s0c,DI_ftype_DIDI,2) 2614 // 2615 def int_hexagon_M2_vrcmpyr_s0c : 2616 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vrcmpyr_s0c">; 2617 // 2618 // BUILTIN_INFO(HEXAGON.M2_cmpyi_s0,DI_ftype_SISI,2) 2619 // 2620 def int_hexagon_M2_cmpyi_s0 : 2621 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpyi_s0">; 2622 // 2623 // BUILTIN_INFO(HEXAGON.M2_cmpyr_s0,DI_ftype_SISI,2) 2624 // 2625 def int_hexagon_M2_cmpyr_s0 : 2626 Hexagon_di_sisi_Intrinsic<"HEXAGON_M2_cmpyr_s0">; 2627 // 2628 // BUILTIN_INFO(HEXAGON.M4_cmpyi_wh,SI_ftype_DISI,2) 2629 // 2630 def int_hexagon_M4_cmpyi_wh : 2631 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyi_wh">; 2632 // 2633 // BUILTIN_INFO(HEXAGON.M4_cmpyr_wh,SI_ftype_DISI,2) 2634 // 2635 def int_hexagon_M4_cmpyr_wh : 2636 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyr_wh">; 2637 // 2638 // BUILTIN_INFO(HEXAGON.M4_cmpyi_whc,SI_ftype_DISI,2) 2639 // 2640 def int_hexagon_M4_cmpyi_whc : 2641 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyi_whc">; 2642 // 2643 // BUILTIN_INFO(HEXAGON.M4_cmpyr_whc,SI_ftype_DISI,2) 2644 // 2645 def int_hexagon_M4_cmpyr_whc : 2646 Hexagon_si_disi_Intrinsic<"HEXAGON_M4_cmpyr_whc">; 2647 // 2648 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s0_sat_i,DI_ftype_DIDI,2) 2649 // 2650 def int_hexagon_M2_vcmpy_s0_sat_i : 2651 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s0_sat_i">; 2652 // 2653 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s0_sat_r,DI_ftype_DIDI,2) 2654 // 2655 def int_hexagon_M2_vcmpy_s0_sat_r : 2656 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s0_sat_r">; 2657 // 2658 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s1_sat_i,DI_ftype_DIDI,2) 2659 // 2660 def int_hexagon_M2_vcmpy_s1_sat_i : 2661 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s1_sat_i">; 2662 // 2663 // BUILTIN_INFO(HEXAGON.M2_vcmpy_s1_sat_r,DI_ftype_DIDI,2) 2664 // 2665 def int_hexagon_M2_vcmpy_s1_sat_r : 2666 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vcmpy_s1_sat_r">; 2667 // 2668 // BUILTIN_INFO(HEXAGON.M2_vcmac_s0_sat_i,DI_ftype_DIDIDI,3) 2669 // 2670 def int_hexagon_M2_vcmac_s0_sat_i : 2671 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vcmac_s0_sat_i">; 2672 // 2673 // BUILTIN_INFO(HEXAGON.M2_vcmac_s0_sat_r,DI_ftype_DIDIDI,3) 2674 // 2675 def int_hexagon_M2_vcmac_s0_sat_r : 2676 Hexagon_di_dididi_Intrinsic<"HEXAGON_M2_vcmac_s0_sat_r">; 2677 // 2678 // BUILTIN_INFO(HEXAGON.S2_vcrotate,DI_ftype_DISI,2) 2679 // 2680 def int_hexagon_S2_vcrotate : 2681 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_vcrotate">; 2682 // 2683 // BUILTIN_INFO(HEXAGON.S4_vrcrotate_acc,DI_ftype_DIDISISI,4) 2684 // 2685 def int_hexagon_S4_vrcrotate_acc : 2686 Hexagon_di_didisisi_Intrinsic<"HEXAGON_S4_vrcrotate_acc">; 2687 // 2688 // BUILTIN_INFO(HEXAGON.S4_vrcrotate,DI_ftype_DISISI,3) 2689 // 2690 def int_hexagon_S4_vrcrotate : 2691 Hexagon_di_disisi_Intrinsic<"HEXAGON_S4_vrcrotate">; 2692 // 2693 // BUILTIN_INFO(HEXAGON.S2_vcnegh,DI_ftype_DISI,2) 2694 // 2695 def int_hexagon_S2_vcnegh : 2696 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_vcnegh">; 2697 // 2698 // BUILTIN_INFO(HEXAGON.S2_vrcnegh,DI_ftype_DIDISI,3) 2699 // 2700 def int_hexagon_S2_vrcnegh : 2701 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_vrcnegh">; 2702 // 2703 // BUILTIN_INFO(HEXAGON.M4_pmpyw,DI_ftype_SISI,2) 2704 // 2705 def int_hexagon_M4_pmpyw : 2706 Hexagon_di_sisi_Intrinsic<"HEXAGON_M4_pmpyw">; 2707 // 2708 // BUILTIN_INFO(HEXAGON.M4_vpmpyh,DI_ftype_SISI,2) 2709 // 2710 def int_hexagon_M4_vpmpyh : 2711 Hexagon_di_sisi_Intrinsic<"HEXAGON_M4_vpmpyh">; 2712 // 2713 // BUILTIN_INFO(HEXAGON.M4_pmpyw_acc,DI_ftype_DISISI,3) 2714 // 2715 def int_hexagon_M4_pmpyw_acc : 2716 Hexagon_di_disisi_Intrinsic<"HEXAGON_M4_pmpyw_acc">; 2717 // 2718 // BUILTIN_INFO(HEXAGON.M4_vpmpyh_acc,DI_ftype_DISISI,3) 2719 // 2720 def int_hexagon_M4_vpmpyh_acc : 2721 Hexagon_di_disisi_Intrinsic<"HEXAGON_M4_vpmpyh_acc">; 2722 // 2723 // BUILTIN_INFO(HEXAGON.A2_add,SI_ftype_SISI,2) 2724 // 2725 def int_hexagon_A2_add : 2726 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_add">; 2727 // 2728 // BUILTIN_INFO(HEXAGON.A2_sub,SI_ftype_SISI,2) 2729 // 2730 def int_hexagon_A2_sub : 2731 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_sub">; 2732 // 2733 // BUILTIN_INFO(HEXAGON.A2_addsat,SI_ftype_SISI,2) 2734 // 2735 def int_hexagon_A2_addsat : 2736 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addsat">; 2737 // 2738 // BUILTIN_INFO(HEXAGON.A2_subsat,SI_ftype_SISI,2) 2739 // 2740 def int_hexagon_A2_subsat : 2741 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subsat">; 2742 // 2743 // BUILTIN_INFO(HEXAGON.A2_addi,SI_ftype_SISI,2) 2744 // 2745 def int_hexagon_A2_addi : 2746 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addi">; 2747 // 2748 // BUILTIN_INFO(HEXAGON.A2_addh_l16_ll,SI_ftype_SISI,2) 2749 // 2750 def int_hexagon_A2_addh_l16_ll : 2751 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_ll">; 2752 // 2753 // BUILTIN_INFO(HEXAGON.A2_addh_l16_hl,SI_ftype_SISI,2) 2754 // 2755 def int_hexagon_A2_addh_l16_hl : 2756 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_hl">; 2757 // 2758 // BUILTIN_INFO(HEXAGON.A2_addh_l16_sat_ll,SI_ftype_SISI,2) 2759 // 2760 def int_hexagon_A2_addh_l16_sat_ll : 2761 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_sat_ll">; 2762 // 2763 // BUILTIN_INFO(HEXAGON.A2_addh_l16_sat_hl,SI_ftype_SISI,2) 2764 // 2765 def int_hexagon_A2_addh_l16_sat_hl : 2766 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_l16_sat_hl">; 2767 // 2768 // BUILTIN_INFO(HEXAGON.A2_subh_l16_ll,SI_ftype_SISI,2) 2769 // 2770 def int_hexagon_A2_subh_l16_ll : 2771 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_ll">; 2772 // 2773 // BUILTIN_INFO(HEXAGON.A2_subh_l16_hl,SI_ftype_SISI,2) 2774 // 2775 def int_hexagon_A2_subh_l16_hl : 2776 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_hl">; 2777 // 2778 // BUILTIN_INFO(HEXAGON.A2_subh_l16_sat_ll,SI_ftype_SISI,2) 2779 // 2780 def int_hexagon_A2_subh_l16_sat_ll : 2781 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_sat_ll">; 2782 // 2783 // BUILTIN_INFO(HEXAGON.A2_subh_l16_sat_hl,SI_ftype_SISI,2) 2784 // 2785 def int_hexagon_A2_subh_l16_sat_hl : 2786 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_l16_sat_hl">; 2787 // 2788 // BUILTIN_INFO(HEXAGON.A2_addh_h16_ll,SI_ftype_SISI,2) 2789 // 2790 def int_hexagon_A2_addh_h16_ll : 2791 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_ll">; 2792 // 2793 // BUILTIN_INFO(HEXAGON.A2_addh_h16_lh,SI_ftype_SISI,2) 2794 // 2795 def int_hexagon_A2_addh_h16_lh : 2796 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_lh">; 2797 // 2798 // BUILTIN_INFO(HEXAGON.A2_addh_h16_hl,SI_ftype_SISI,2) 2799 // 2800 def int_hexagon_A2_addh_h16_hl : 2801 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_hl">; 2802 // 2803 // BUILTIN_INFO(HEXAGON.A2_addh_h16_hh,SI_ftype_SISI,2) 2804 // 2805 def int_hexagon_A2_addh_h16_hh : 2806 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_hh">; 2807 // 2808 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_ll,SI_ftype_SISI,2) 2809 // 2810 def int_hexagon_A2_addh_h16_sat_ll : 2811 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_ll">; 2812 // 2813 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_lh,SI_ftype_SISI,2) 2814 // 2815 def int_hexagon_A2_addh_h16_sat_lh : 2816 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_lh">; 2817 // 2818 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_hl,SI_ftype_SISI,2) 2819 // 2820 def int_hexagon_A2_addh_h16_sat_hl : 2821 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_hl">; 2822 // 2823 // BUILTIN_INFO(HEXAGON.A2_addh_h16_sat_hh,SI_ftype_SISI,2) 2824 // 2825 def int_hexagon_A2_addh_h16_sat_hh : 2826 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_addh_h16_sat_hh">; 2827 // 2828 // BUILTIN_INFO(HEXAGON.A2_subh_h16_ll,SI_ftype_SISI,2) 2829 // 2830 def int_hexagon_A2_subh_h16_ll : 2831 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_ll">; 2832 // 2833 // BUILTIN_INFO(HEXAGON.A2_subh_h16_lh,SI_ftype_SISI,2) 2834 // 2835 def int_hexagon_A2_subh_h16_lh : 2836 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_lh">; 2837 // 2838 // BUILTIN_INFO(HEXAGON.A2_subh_h16_hl,SI_ftype_SISI,2) 2839 // 2840 def int_hexagon_A2_subh_h16_hl : 2841 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_hl">; 2842 // 2843 // BUILTIN_INFO(HEXAGON.A2_subh_h16_hh,SI_ftype_SISI,2) 2844 // 2845 def int_hexagon_A2_subh_h16_hh : 2846 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_hh">; 2847 // 2848 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_ll,SI_ftype_SISI,2) 2849 // 2850 def int_hexagon_A2_subh_h16_sat_ll : 2851 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_ll">; 2852 // 2853 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_lh,SI_ftype_SISI,2) 2854 // 2855 def int_hexagon_A2_subh_h16_sat_lh : 2856 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_lh">; 2857 // 2858 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_hl,SI_ftype_SISI,2) 2859 // 2860 def int_hexagon_A2_subh_h16_sat_hl : 2861 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_hl">; 2862 // 2863 // BUILTIN_INFO(HEXAGON.A2_subh_h16_sat_hh,SI_ftype_SISI,2) 2864 // 2865 def int_hexagon_A2_subh_h16_sat_hh : 2866 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subh_h16_sat_hh">; 2867 // 2868 // BUILTIN_INFO(HEXAGON.A2_aslh,SI_ftype_SI,1) 2869 // 2870 def int_hexagon_A2_aslh : 2871 Hexagon_si_si_Intrinsic<"HEXAGON_A2_aslh">; 2872 // 2873 // BUILTIN_INFO(HEXAGON.A2_asrh,SI_ftype_SI,1) 2874 // 2875 def int_hexagon_A2_asrh : 2876 Hexagon_si_si_Intrinsic<"HEXAGON_A2_asrh">; 2877 // 2878 // BUILTIN_INFO(HEXAGON.A2_addp,DI_ftype_DIDI,2) 2879 // 2880 def int_hexagon_A2_addp : 2881 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_addp">; 2882 // 2883 // BUILTIN_INFO(HEXAGON.A2_addpsat,DI_ftype_DIDI,2) 2884 // 2885 def int_hexagon_A2_addpsat : 2886 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_addpsat">; 2887 // 2888 // BUILTIN_INFO(HEXAGON.A2_addsp,DI_ftype_SIDI,2) 2889 // 2890 def int_hexagon_A2_addsp : 2891 Hexagon_di_sidi_Intrinsic<"HEXAGON_A2_addsp">; 2892 // 2893 // BUILTIN_INFO(HEXAGON.A2_subp,DI_ftype_DIDI,2) 2894 // 2895 def int_hexagon_A2_subp : 2896 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_subp">; 2897 // 2898 // BUILTIN_INFO(HEXAGON.A2_neg,SI_ftype_SI,1) 2899 // 2900 def int_hexagon_A2_neg : 2901 Hexagon_si_si_Intrinsic<"HEXAGON_A2_neg">; 2902 // 2903 // BUILTIN_INFO(HEXAGON.A2_negsat,SI_ftype_SI,1) 2904 // 2905 def int_hexagon_A2_negsat : 2906 Hexagon_si_si_Intrinsic<"HEXAGON_A2_negsat">; 2907 // 2908 // BUILTIN_INFO(HEXAGON.A2_abs,SI_ftype_SI,1) 2909 // 2910 def int_hexagon_A2_abs : 2911 Hexagon_si_si_Intrinsic<"HEXAGON_A2_abs">; 2912 // 2913 // BUILTIN_INFO(HEXAGON.A2_abssat,SI_ftype_SI,1) 2914 // 2915 def int_hexagon_A2_abssat : 2916 Hexagon_si_si_Intrinsic<"HEXAGON_A2_abssat">; 2917 // 2918 // BUILTIN_INFO(HEXAGON.A2_vconj,DI_ftype_DI,1) 2919 // 2920 def int_hexagon_A2_vconj : 2921 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vconj">; 2922 // 2923 // BUILTIN_INFO(HEXAGON.A2_negp,DI_ftype_DI,1) 2924 // 2925 def int_hexagon_A2_negp : 2926 Hexagon_di_di_Intrinsic<"HEXAGON_A2_negp">; 2927 // 2928 // BUILTIN_INFO(HEXAGON.A2_absp,DI_ftype_DI,1) 2929 // 2930 def int_hexagon_A2_absp : 2931 Hexagon_di_di_Intrinsic<"HEXAGON_A2_absp">; 2932 // 2933 // BUILTIN_INFO(HEXAGON.A2_max,SI_ftype_SISI,2) 2934 // 2935 def int_hexagon_A2_max : 2936 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_max">; 2937 // 2938 // BUILTIN_INFO(HEXAGON.A2_maxu,USI_ftype_SISI,2) 2939 // 2940 def int_hexagon_A2_maxu : 2941 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_maxu">; 2942 // 2943 // BUILTIN_INFO(HEXAGON.A2_min,SI_ftype_SISI,2) 2944 // 2945 def int_hexagon_A2_min : 2946 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_min">; 2947 // 2948 // BUILTIN_INFO(HEXAGON.A2_minu,USI_ftype_SISI,2) 2949 // 2950 def int_hexagon_A2_minu : 2951 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_minu">; 2952 // 2953 // BUILTIN_INFO(HEXAGON.A2_maxp,DI_ftype_DIDI,2) 2954 // 2955 def int_hexagon_A2_maxp : 2956 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_maxp">; 2957 // 2958 // BUILTIN_INFO(HEXAGON.A2_maxup,UDI_ftype_DIDI,2) 2959 // 2960 def int_hexagon_A2_maxup : 2961 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_maxup">; 2962 // 2963 // BUILTIN_INFO(HEXAGON.A2_minp,DI_ftype_DIDI,2) 2964 // 2965 def int_hexagon_A2_minp : 2966 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_minp">; 2967 // 2968 // BUILTIN_INFO(HEXAGON.A2_minup,UDI_ftype_DIDI,2) 2969 // 2970 def int_hexagon_A2_minup : 2971 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_minup">; 2972 // 2973 // BUILTIN_INFO(HEXAGON.A2_tfr,SI_ftype_SI,1) 2974 // 2975 def int_hexagon_A2_tfr : 2976 Hexagon_si_si_Intrinsic<"HEXAGON_A2_tfr">; 2977 // 2978 // BUILTIN_INFO(HEXAGON.A2_tfrsi,SI_ftype_SI,1) 2979 // 2980 def int_hexagon_A2_tfrsi : 2981 Hexagon_si_si_Intrinsic<"HEXAGON_A2_tfrsi">; 2982 // 2983 // BUILTIN_INFO(HEXAGON.A2_tfrp,DI_ftype_DI,1) 2984 // 2985 def int_hexagon_A2_tfrp : 2986 Hexagon_di_di_Intrinsic<"HEXAGON_A2_tfrp">; 2987 // 2988 // BUILTIN_INFO(HEXAGON.A2_tfrpi,DI_ftype_SI,1) 2989 // 2990 def int_hexagon_A2_tfrpi : 2991 Hexagon_di_si_Intrinsic<"HEXAGON_A2_tfrpi">; 2992 // 2993 // BUILTIN_INFO(HEXAGON.A2_zxtb,SI_ftype_SI,1) 2994 // 2995 def int_hexagon_A2_zxtb : 2996 Hexagon_si_si_Intrinsic<"HEXAGON_A2_zxtb">; 2997 // 2998 // BUILTIN_INFO(HEXAGON.A2_sxtb,SI_ftype_SI,1) 2999 // 3000 def int_hexagon_A2_sxtb : 3001 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sxtb">; 3002 // 3003 // BUILTIN_INFO(HEXAGON.A2_zxth,SI_ftype_SI,1) 3004 // 3005 def int_hexagon_A2_zxth : 3006 Hexagon_si_si_Intrinsic<"HEXAGON_A2_zxth">; 3007 // 3008 // BUILTIN_INFO(HEXAGON.A2_sxth,SI_ftype_SI,1) 3009 // 3010 def int_hexagon_A2_sxth : 3011 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sxth">; 3012 // 3013 // BUILTIN_INFO(HEXAGON.A2_combinew,DI_ftype_SISI,2) 3014 // 3015 def int_hexagon_A2_combinew : 3016 Hexagon_di_sisi_Intrinsic<"HEXAGON_A2_combinew">; 3017 // 3018 // BUILTIN_INFO(HEXAGON.A4_combineri,DI_ftype_SISI,2) 3019 // 3020 def int_hexagon_A4_combineri : 3021 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_combineri">; 3022 // 3023 // BUILTIN_INFO(HEXAGON.A4_combineir,DI_ftype_SISI,2) 3024 // 3025 def int_hexagon_A4_combineir : 3026 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_combineir">; 3027 // 3028 // BUILTIN_INFO(HEXAGON.A2_combineii,DI_ftype_SISI,2) 3029 // 3030 def int_hexagon_A2_combineii : 3031 Hexagon_di_sisi_Intrinsic<"HEXAGON_A2_combineii">; 3032 // 3033 // BUILTIN_INFO(HEXAGON.A2_combine_hh,SI_ftype_SISI,2) 3034 // 3035 def int_hexagon_A2_combine_hh : 3036 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_hh">; 3037 // 3038 // BUILTIN_INFO(HEXAGON.A2_combine_hl,SI_ftype_SISI,2) 3039 // 3040 def int_hexagon_A2_combine_hl : 3041 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_hl">; 3042 // 3043 // BUILTIN_INFO(HEXAGON.A2_combine_lh,SI_ftype_SISI,2) 3044 // 3045 def int_hexagon_A2_combine_lh : 3046 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_lh">; 3047 // 3048 // BUILTIN_INFO(HEXAGON.A2_combine_ll,SI_ftype_SISI,2) 3049 // 3050 def int_hexagon_A2_combine_ll : 3051 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_combine_ll">; 3052 // 3053 // BUILTIN_INFO(HEXAGON.A2_tfril,SI_ftype_SISI,2) 3054 // 3055 def int_hexagon_A2_tfril : 3056 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_tfril">; 3057 // 3058 // BUILTIN_INFO(HEXAGON.A2_tfrih,SI_ftype_SISI,2) 3059 // 3060 def int_hexagon_A2_tfrih : 3061 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_tfrih">; 3062 // 3063 // BUILTIN_INFO(HEXAGON.A2_and,SI_ftype_SISI,2) 3064 // 3065 def int_hexagon_A2_and : 3066 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_and">; 3067 // 3068 // BUILTIN_INFO(HEXAGON.A2_or,SI_ftype_SISI,2) 3069 // 3070 def int_hexagon_A2_or : 3071 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_or">; 3072 // 3073 // BUILTIN_INFO(HEXAGON.A2_xor,SI_ftype_SISI,2) 3074 // 3075 def int_hexagon_A2_xor : 3076 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_xor">; 3077 // 3078 // BUILTIN_INFO(HEXAGON.A2_not,SI_ftype_SI,1) 3079 // 3080 def int_hexagon_A2_not : 3081 Hexagon_si_si_Intrinsic<"HEXAGON_A2_not">; 3082 // 3083 // BUILTIN_INFO(HEXAGON.M2_xor_xacc,SI_ftype_SISISI,3) 3084 // 3085 def int_hexagon_M2_xor_xacc : 3086 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M2_xor_xacc">; 3087 // 3088 // BUILTIN_INFO(HEXAGON.M4_xor_xacc,DI_ftype_DIDIDI,3) 3089 // 3090 def int_hexagon_M4_xor_xacc : 3091 Hexagon_di_dididi_Intrinsic<"HEXAGON_M4_xor_xacc">; 3092 // 3093 // BUILTIN_INFO(HEXAGON.A4_andn,SI_ftype_SISI,2) 3094 // 3095 def int_hexagon_A4_andn : 3096 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_andn">; 3097 // 3098 // BUILTIN_INFO(HEXAGON.A4_orn,SI_ftype_SISI,2) 3099 // 3100 def int_hexagon_A4_orn : 3101 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_orn">; 3102 // 3103 // BUILTIN_INFO(HEXAGON.A4_andnp,DI_ftype_DIDI,2) 3104 // 3105 def int_hexagon_A4_andnp : 3106 Hexagon_di_didi_Intrinsic<"HEXAGON_A4_andnp">; 3107 // 3108 // BUILTIN_INFO(HEXAGON.A4_ornp,DI_ftype_DIDI,2) 3109 // 3110 def int_hexagon_A4_ornp : 3111 Hexagon_di_didi_Intrinsic<"HEXAGON_A4_ornp">; 3112 // 3113 // BUILTIN_INFO(HEXAGON.S4_addaddi,SI_ftype_SISISI,3) 3114 // 3115 def int_hexagon_S4_addaddi : 3116 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addaddi">; 3117 // 3118 // BUILTIN_INFO(HEXAGON.S4_subaddi,SI_ftype_SISISI,3) 3119 // 3120 def int_hexagon_S4_subaddi : 3121 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subaddi">; 3122 // 3123 // BUILTIN_INFO(HEXAGON.M4_and_and,SI_ftype_SISISI,3) 3124 // 3125 def int_hexagon_M4_and_and : 3126 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_and">; 3127 // 3128 // BUILTIN_INFO(HEXAGON.M4_and_andn,SI_ftype_SISISI,3) 3129 // 3130 def int_hexagon_M4_and_andn : 3131 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_andn">; 3132 // 3133 // BUILTIN_INFO(HEXAGON.M4_and_or,SI_ftype_SISISI,3) 3134 // 3135 def int_hexagon_M4_and_or : 3136 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_or">; 3137 // 3138 // BUILTIN_INFO(HEXAGON.M4_and_xor,SI_ftype_SISISI,3) 3139 // 3140 def int_hexagon_M4_and_xor : 3141 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_and_xor">; 3142 // 3143 // BUILTIN_INFO(HEXAGON.M4_or_and,SI_ftype_SISISI,3) 3144 // 3145 def int_hexagon_M4_or_and : 3146 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_and">; 3147 // 3148 // BUILTIN_INFO(HEXAGON.M4_or_andn,SI_ftype_SISISI,3) 3149 // 3150 def int_hexagon_M4_or_andn : 3151 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_andn">; 3152 // 3153 // BUILTIN_INFO(HEXAGON.M4_or_or,SI_ftype_SISISI,3) 3154 // 3155 def int_hexagon_M4_or_or : 3156 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_or">; 3157 // 3158 // BUILTIN_INFO(HEXAGON.M4_or_xor,SI_ftype_SISISI,3) 3159 // 3160 def int_hexagon_M4_or_xor : 3161 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_or_xor">; 3162 // 3163 // BUILTIN_INFO(HEXAGON.S4_or_andix,SI_ftype_SISISI,3) 3164 // 3165 def int_hexagon_S4_or_andix : 3166 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_andix">; 3167 // 3168 // BUILTIN_INFO(HEXAGON.S4_or_andi,SI_ftype_SISISI,3) 3169 // 3170 def int_hexagon_S4_or_andi : 3171 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_andi">; 3172 // 3173 // BUILTIN_INFO(HEXAGON.S4_or_ori,SI_ftype_SISISI,3) 3174 // 3175 def int_hexagon_S4_or_ori : 3176 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_or_ori">; 3177 // 3178 // BUILTIN_INFO(HEXAGON.M4_xor_and,SI_ftype_SISISI,3) 3179 // 3180 def int_hexagon_M4_xor_and : 3181 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_and">; 3182 // 3183 // BUILTIN_INFO(HEXAGON.M4_xor_or,SI_ftype_SISISI,3) 3184 // 3185 def int_hexagon_M4_xor_or : 3186 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_or">; 3187 // 3188 // BUILTIN_INFO(HEXAGON.M4_xor_andn,SI_ftype_SISISI,3) 3189 // 3190 def int_hexagon_M4_xor_andn : 3191 Hexagon_si_sisisi_Intrinsic<"HEXAGON_M4_xor_andn">; 3192 // 3193 // BUILTIN_INFO(HEXAGON.A2_subri,SI_ftype_SISI,2) 3194 // 3195 def int_hexagon_A2_subri : 3196 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_subri">; 3197 // 3198 // BUILTIN_INFO(HEXAGON.A2_andir,SI_ftype_SISI,2) 3199 // 3200 def int_hexagon_A2_andir : 3201 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_andir">; 3202 // 3203 // BUILTIN_INFO(HEXAGON.A2_orir,SI_ftype_SISI,2) 3204 // 3205 def int_hexagon_A2_orir : 3206 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_orir">; 3207 // 3208 // BUILTIN_INFO(HEXAGON.A2_andp,DI_ftype_DIDI,2) 3209 // 3210 def int_hexagon_A2_andp : 3211 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_andp">; 3212 // 3213 // BUILTIN_INFO(HEXAGON.A2_orp,DI_ftype_DIDI,2) 3214 // 3215 def int_hexagon_A2_orp : 3216 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_orp">; 3217 // 3218 // BUILTIN_INFO(HEXAGON.A2_xorp,DI_ftype_DIDI,2) 3219 // 3220 def int_hexagon_A2_xorp : 3221 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_xorp">; 3222 // 3223 // BUILTIN_INFO(HEXAGON.A2_notp,DI_ftype_DI,1) 3224 // 3225 def int_hexagon_A2_notp : 3226 Hexagon_di_di_Intrinsic<"HEXAGON_A2_notp">; 3227 // 3228 // BUILTIN_INFO(HEXAGON.A2_sxtw,DI_ftype_SI,1) 3229 // 3230 def int_hexagon_A2_sxtw : 3231 Hexagon_di_si_Intrinsic<"HEXAGON_A2_sxtw">; 3232 // 3233 // BUILTIN_INFO(HEXAGON.A2_sat,SI_ftype_DI,1) 3234 // 3235 def int_hexagon_A2_sat : 3236 Hexagon_si_di_Intrinsic<"HEXAGON_A2_sat">; 3237 // 3238 // BUILTIN_INFO(HEXAGON.A2_roundsat,SI_ftype_DI,1) 3239 // 3240 def int_hexagon_A2_roundsat : 3241 Hexagon_si_di_Intrinsic<"HEXAGON_A2_roundsat">; 3242 // 3243 // BUILTIN_INFO(HEXAGON.A2_sath,SI_ftype_SI,1) 3244 // 3245 def int_hexagon_A2_sath : 3246 Hexagon_si_si_Intrinsic<"HEXAGON_A2_sath">; 3247 // 3248 // BUILTIN_INFO(HEXAGON.A2_satuh,SI_ftype_SI,1) 3249 // 3250 def int_hexagon_A2_satuh : 3251 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satuh">; 3252 // 3253 // BUILTIN_INFO(HEXAGON.A2_satub,SI_ftype_SI,1) 3254 // 3255 def int_hexagon_A2_satub : 3256 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satub">; 3257 // 3258 // BUILTIN_INFO(HEXAGON.A2_satb,SI_ftype_SI,1) 3259 // 3260 def int_hexagon_A2_satb : 3261 Hexagon_si_si_Intrinsic<"HEXAGON_A2_satb">; 3262 // 3263 // BUILTIN_INFO(HEXAGON.A2_vaddub,DI_ftype_DIDI,2) 3264 // 3265 def int_hexagon_A2_vaddub : 3266 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddub">; 3267 // 3268 // BUILTIN_INFO(HEXAGON.A2_vaddb_map,DI_ftype_DIDI,2) 3269 // 3270 def int_hexagon_A2_vaddb_map : 3271 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddb_map">; 3272 // 3273 // BUILTIN_INFO(HEXAGON.A2_vaddubs,DI_ftype_DIDI,2) 3274 // 3275 def int_hexagon_A2_vaddubs : 3276 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddubs">; 3277 // 3278 // BUILTIN_INFO(HEXAGON.A2_vaddh,DI_ftype_DIDI,2) 3279 // 3280 def int_hexagon_A2_vaddh : 3281 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddh">; 3282 // 3283 // BUILTIN_INFO(HEXAGON.A2_vaddhs,DI_ftype_DIDI,2) 3284 // 3285 def int_hexagon_A2_vaddhs : 3286 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddhs">; 3287 // 3288 // BUILTIN_INFO(HEXAGON.A2_vadduhs,DI_ftype_DIDI,2) 3289 // 3290 def int_hexagon_A2_vadduhs : 3291 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vadduhs">; 3292 // 3293 // BUILTIN_INFO(HEXAGON.A5_vaddhubs,SI_ftype_DIDI,2) 3294 // 3295 def int_hexagon_A5_vaddhubs : 3296 Hexagon_si_didi_Intrinsic<"HEXAGON_A5_vaddhubs">; 3297 // 3298 // BUILTIN_INFO(HEXAGON.A2_vaddw,DI_ftype_DIDI,2) 3299 // 3300 def int_hexagon_A2_vaddw : 3301 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddw">; 3302 // 3303 // BUILTIN_INFO(HEXAGON.A2_vaddws,DI_ftype_DIDI,2) 3304 // 3305 def int_hexagon_A2_vaddws : 3306 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vaddws">; 3307 // 3308 // BUILTIN_INFO(HEXAGON.S4_vxaddsubw,DI_ftype_DIDI,2) 3309 // 3310 def int_hexagon_S4_vxaddsubw : 3311 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubw">; 3312 // 3313 // BUILTIN_INFO(HEXAGON.S4_vxsubaddw,DI_ftype_DIDI,2) 3314 // 3315 def int_hexagon_S4_vxsubaddw : 3316 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddw">; 3317 // 3318 // BUILTIN_INFO(HEXAGON.S4_vxaddsubh,DI_ftype_DIDI,2) 3319 // 3320 def int_hexagon_S4_vxaddsubh : 3321 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubh">; 3322 // 3323 // BUILTIN_INFO(HEXAGON.S4_vxsubaddh,DI_ftype_DIDI,2) 3324 // 3325 def int_hexagon_S4_vxsubaddh : 3326 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddh">; 3327 // 3328 // BUILTIN_INFO(HEXAGON.S4_vxaddsubhr,DI_ftype_DIDI,2) 3329 // 3330 def int_hexagon_S4_vxaddsubhr : 3331 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxaddsubhr">; 3332 // 3333 // BUILTIN_INFO(HEXAGON.S4_vxsubaddhr,DI_ftype_DIDI,2) 3334 // 3335 def int_hexagon_S4_vxsubaddhr : 3336 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_vxsubaddhr">; 3337 // 3338 // BUILTIN_INFO(HEXAGON.A2_svavgh,SI_ftype_SISI,2) 3339 // 3340 def int_hexagon_A2_svavgh : 3341 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svavgh">; 3342 // 3343 // BUILTIN_INFO(HEXAGON.A2_svavghs,SI_ftype_SISI,2) 3344 // 3345 def int_hexagon_A2_svavghs : 3346 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svavghs">; 3347 // 3348 // BUILTIN_INFO(HEXAGON.A2_svnavgh,SI_ftype_SISI,2) 3349 // 3350 def int_hexagon_A2_svnavgh : 3351 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svnavgh">; 3352 // 3353 // BUILTIN_INFO(HEXAGON.A2_svaddh,SI_ftype_SISI,2) 3354 // 3355 def int_hexagon_A2_svaddh : 3356 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svaddh">; 3357 // 3358 // BUILTIN_INFO(HEXAGON.A2_svaddhs,SI_ftype_SISI,2) 3359 // 3360 def int_hexagon_A2_svaddhs : 3361 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svaddhs">; 3362 // 3363 // BUILTIN_INFO(HEXAGON.A2_svadduhs,SI_ftype_SISI,2) 3364 // 3365 def int_hexagon_A2_svadduhs : 3366 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svadduhs">; 3367 // 3368 // BUILTIN_INFO(HEXAGON.A2_svsubh,SI_ftype_SISI,2) 3369 // 3370 def int_hexagon_A2_svsubh : 3371 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubh">; 3372 // 3373 // BUILTIN_INFO(HEXAGON.A2_svsubhs,SI_ftype_SISI,2) 3374 // 3375 def int_hexagon_A2_svsubhs : 3376 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubhs">; 3377 // 3378 // BUILTIN_INFO(HEXAGON.A2_svsubuhs,SI_ftype_SISI,2) 3379 // 3380 def int_hexagon_A2_svsubuhs : 3381 Hexagon_si_sisi_Intrinsic<"HEXAGON_A2_svsubuhs">; 3382 // 3383 // BUILTIN_INFO(HEXAGON.A2_vraddub,DI_ftype_DIDI,2) 3384 // 3385 def int_hexagon_A2_vraddub : 3386 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vraddub">; 3387 // 3388 // BUILTIN_INFO(HEXAGON.A2_vraddub_acc,DI_ftype_DIDIDI,3) 3389 // 3390 def int_hexagon_A2_vraddub_acc : 3391 Hexagon_di_dididi_Intrinsic<"HEXAGON_A2_vraddub_acc">; 3392 // 3393 // BUILTIN_INFO(HEXAGON.M2_vraddh,SI_ftype_DIDI,2) 3394 // 3395 def int_hexagon_M2_vraddh : 3396 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vraddh">; 3397 // 3398 // BUILTIN_INFO(HEXAGON.M2_vradduh,SI_ftype_DIDI,2) 3399 // 3400 def int_hexagon_M2_vradduh : 3401 Hexagon_si_didi_Intrinsic<"HEXAGON_M2_vradduh">; 3402 // 3403 // BUILTIN_INFO(HEXAGON.A2_vsubub,DI_ftype_DIDI,2) 3404 // 3405 def int_hexagon_A2_vsubub : 3406 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubub">; 3407 // 3408 // BUILTIN_INFO(HEXAGON.A2_vsubb_map,DI_ftype_DIDI,2) 3409 // 3410 def int_hexagon_A2_vsubb_map : 3411 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubb_map">; 3412 // 3413 // BUILTIN_INFO(HEXAGON.A2_vsububs,DI_ftype_DIDI,2) 3414 // 3415 def int_hexagon_A2_vsububs : 3416 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsububs">; 3417 // 3418 // BUILTIN_INFO(HEXAGON.A2_vsubh,DI_ftype_DIDI,2) 3419 // 3420 def int_hexagon_A2_vsubh : 3421 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubh">; 3422 // 3423 // BUILTIN_INFO(HEXAGON.A2_vsubhs,DI_ftype_DIDI,2) 3424 // 3425 def int_hexagon_A2_vsubhs : 3426 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubhs">; 3427 // 3428 // BUILTIN_INFO(HEXAGON.A2_vsubuhs,DI_ftype_DIDI,2) 3429 // 3430 def int_hexagon_A2_vsubuhs : 3431 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubuhs">; 3432 // 3433 // BUILTIN_INFO(HEXAGON.A2_vsubw,DI_ftype_DIDI,2) 3434 // 3435 def int_hexagon_A2_vsubw : 3436 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubw">; 3437 // 3438 // BUILTIN_INFO(HEXAGON.A2_vsubws,DI_ftype_DIDI,2) 3439 // 3440 def int_hexagon_A2_vsubws : 3441 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vsubws">; 3442 // 3443 // BUILTIN_INFO(HEXAGON.A2_vabsh,DI_ftype_DI,1) 3444 // 3445 def int_hexagon_A2_vabsh : 3446 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabsh">; 3447 // 3448 // BUILTIN_INFO(HEXAGON.A2_vabshsat,DI_ftype_DI,1) 3449 // 3450 def int_hexagon_A2_vabshsat : 3451 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabshsat">; 3452 // 3453 // BUILTIN_INFO(HEXAGON.A2_vabsw,DI_ftype_DI,1) 3454 // 3455 def int_hexagon_A2_vabsw : 3456 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabsw">; 3457 // 3458 // BUILTIN_INFO(HEXAGON.A2_vabswsat,DI_ftype_DI,1) 3459 // 3460 def int_hexagon_A2_vabswsat : 3461 Hexagon_di_di_Intrinsic<"HEXAGON_A2_vabswsat">; 3462 // 3463 // BUILTIN_INFO(HEXAGON.M2_vabsdiffw,DI_ftype_DIDI,2) 3464 // 3465 def int_hexagon_M2_vabsdiffw : 3466 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vabsdiffw">; 3467 // 3468 // BUILTIN_INFO(HEXAGON.M2_vabsdiffh,DI_ftype_DIDI,2) 3469 // 3470 def int_hexagon_M2_vabsdiffh : 3471 Hexagon_di_didi_Intrinsic<"HEXAGON_M2_vabsdiffh">; 3472 // 3473 // BUILTIN_INFO(HEXAGON.A2_vrsadub,DI_ftype_DIDI,2) 3474 // 3475 def int_hexagon_A2_vrsadub : 3476 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vrsadub">; 3477 // 3478 // BUILTIN_INFO(HEXAGON.A2_vrsadub_acc,DI_ftype_DIDIDI,3) 3479 // 3480 def int_hexagon_A2_vrsadub_acc : 3481 Hexagon_di_dididi_Intrinsic<"HEXAGON_A2_vrsadub_acc">; 3482 // 3483 // BUILTIN_INFO(HEXAGON.A2_vavgub,DI_ftype_DIDI,2) 3484 // 3485 def int_hexagon_A2_vavgub : 3486 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgub">; 3487 // 3488 // BUILTIN_INFO(HEXAGON.A2_vavguh,DI_ftype_DIDI,2) 3489 // 3490 def int_hexagon_A2_vavguh : 3491 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguh">; 3492 // 3493 // BUILTIN_INFO(HEXAGON.A2_vavgh,DI_ftype_DIDI,2) 3494 // 3495 def int_hexagon_A2_vavgh : 3496 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgh">; 3497 // 3498 // BUILTIN_INFO(HEXAGON.A2_vnavgh,DI_ftype_DIDI,2) 3499 // 3500 def int_hexagon_A2_vnavgh : 3501 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgh">; 3502 // 3503 // BUILTIN_INFO(HEXAGON.A2_vavgw,DI_ftype_DIDI,2) 3504 // 3505 def int_hexagon_A2_vavgw : 3506 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgw">; 3507 // 3508 // BUILTIN_INFO(HEXAGON.A2_vnavgw,DI_ftype_DIDI,2) 3509 // 3510 def int_hexagon_A2_vnavgw : 3511 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgw">; 3512 // 3513 // BUILTIN_INFO(HEXAGON.A2_vavgwr,DI_ftype_DIDI,2) 3514 // 3515 def int_hexagon_A2_vavgwr : 3516 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgwr">; 3517 // 3518 // BUILTIN_INFO(HEXAGON.A2_vnavgwr,DI_ftype_DIDI,2) 3519 // 3520 def int_hexagon_A2_vnavgwr : 3521 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgwr">; 3522 // 3523 // BUILTIN_INFO(HEXAGON.A2_vavgwcr,DI_ftype_DIDI,2) 3524 // 3525 def int_hexagon_A2_vavgwcr : 3526 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgwcr">; 3527 // 3528 // BUILTIN_INFO(HEXAGON.A2_vnavgwcr,DI_ftype_DIDI,2) 3529 // 3530 def int_hexagon_A2_vnavgwcr : 3531 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavgwcr">; 3532 // 3533 // BUILTIN_INFO(HEXAGON.A2_vavghcr,DI_ftype_DIDI,2) 3534 // 3535 def int_hexagon_A2_vavghcr : 3536 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavghcr">; 3537 // 3538 // BUILTIN_INFO(HEXAGON.A2_vnavghcr,DI_ftype_DIDI,2) 3539 // 3540 def int_hexagon_A2_vnavghcr : 3541 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavghcr">; 3542 // 3543 // BUILTIN_INFO(HEXAGON.A2_vavguw,DI_ftype_DIDI,2) 3544 // 3545 def int_hexagon_A2_vavguw : 3546 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguw">; 3547 // 3548 // BUILTIN_INFO(HEXAGON.A2_vavguwr,DI_ftype_DIDI,2) 3549 // 3550 def int_hexagon_A2_vavguwr : 3551 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguwr">; 3552 // 3553 // BUILTIN_INFO(HEXAGON.A2_vavgubr,DI_ftype_DIDI,2) 3554 // 3555 def int_hexagon_A2_vavgubr : 3556 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavgubr">; 3557 // 3558 // BUILTIN_INFO(HEXAGON.A2_vavguhr,DI_ftype_DIDI,2) 3559 // 3560 def int_hexagon_A2_vavguhr : 3561 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavguhr">; 3562 // 3563 // BUILTIN_INFO(HEXAGON.A2_vavghr,DI_ftype_DIDI,2) 3564 // 3565 def int_hexagon_A2_vavghr : 3566 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vavghr">; 3567 // 3568 // BUILTIN_INFO(HEXAGON.A2_vnavghr,DI_ftype_DIDI,2) 3569 // 3570 def int_hexagon_A2_vnavghr : 3571 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vnavghr">; 3572 // 3573 // BUILTIN_INFO(HEXAGON.A4_round_ri,SI_ftype_SISI,2) 3574 // 3575 def int_hexagon_A4_round_ri : 3576 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_ri">; 3577 // 3578 // BUILTIN_INFO(HEXAGON.A4_round_rr,SI_ftype_SISI,2) 3579 // 3580 def int_hexagon_A4_round_rr : 3581 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_rr">; 3582 // 3583 // BUILTIN_INFO(HEXAGON.A4_round_ri_sat,SI_ftype_SISI,2) 3584 // 3585 def int_hexagon_A4_round_ri_sat : 3586 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_ri_sat">; 3587 // 3588 // BUILTIN_INFO(HEXAGON.A4_round_rr_sat,SI_ftype_SISI,2) 3589 // 3590 def int_hexagon_A4_round_rr_sat : 3591 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_round_rr_sat">; 3592 // 3593 // BUILTIN_INFO(HEXAGON.A4_cround_ri,SI_ftype_SISI,2) 3594 // 3595 def int_hexagon_A4_cround_ri : 3596 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cround_ri">; 3597 // 3598 // BUILTIN_INFO(HEXAGON.A4_cround_rr,SI_ftype_SISI,2) 3599 // 3600 def int_hexagon_A4_cround_rr : 3601 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_cround_rr">; 3602 // 3603 // BUILTIN_INFO(HEXAGON.A4_vrminh,DI_ftype_DIDISI,3) 3604 // 3605 def int_hexagon_A4_vrminh : 3606 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminh">; 3607 // 3608 // BUILTIN_INFO(HEXAGON.A4_vrmaxh,DI_ftype_DIDISI,3) 3609 // 3610 def int_hexagon_A4_vrmaxh : 3611 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxh">; 3612 // 3613 // BUILTIN_INFO(HEXAGON.A4_vrminuh,DI_ftype_DIDISI,3) 3614 // 3615 def int_hexagon_A4_vrminuh : 3616 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminuh">; 3617 // 3618 // BUILTIN_INFO(HEXAGON.A4_vrmaxuh,DI_ftype_DIDISI,3) 3619 // 3620 def int_hexagon_A4_vrmaxuh : 3621 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxuh">; 3622 // 3623 // BUILTIN_INFO(HEXAGON.A4_vrminw,DI_ftype_DIDISI,3) 3624 // 3625 def int_hexagon_A4_vrminw : 3626 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminw">; 3627 // 3628 // BUILTIN_INFO(HEXAGON.A4_vrmaxw,DI_ftype_DIDISI,3) 3629 // 3630 def int_hexagon_A4_vrmaxw : 3631 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxw">; 3632 // 3633 // BUILTIN_INFO(HEXAGON.A4_vrminuw,DI_ftype_DIDISI,3) 3634 // 3635 def int_hexagon_A4_vrminuw : 3636 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrminuw">; 3637 // 3638 // BUILTIN_INFO(HEXAGON.A4_vrmaxuw,DI_ftype_DIDISI,3) 3639 // 3640 def int_hexagon_A4_vrmaxuw : 3641 Hexagon_di_didisi_Intrinsic<"HEXAGON_A4_vrmaxuw">; 3642 // 3643 // BUILTIN_INFO(HEXAGON.A2_vminb,DI_ftype_DIDI,2) 3644 // 3645 def int_hexagon_A2_vminb : 3646 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminb">; 3647 // 3648 // BUILTIN_INFO(HEXAGON.A2_vmaxb,DI_ftype_DIDI,2) 3649 // 3650 def int_hexagon_A2_vmaxb : 3651 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxb">; 3652 // 3653 // BUILTIN_INFO(HEXAGON.A2_vminub,DI_ftype_DIDI,2) 3654 // 3655 def int_hexagon_A2_vminub : 3656 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminub">; 3657 // 3658 // BUILTIN_INFO(HEXAGON.A2_vmaxub,DI_ftype_DIDI,2) 3659 // 3660 def int_hexagon_A2_vmaxub : 3661 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxub">; 3662 // 3663 // BUILTIN_INFO(HEXAGON.A2_vminh,DI_ftype_DIDI,2) 3664 // 3665 def int_hexagon_A2_vminh : 3666 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminh">; 3667 // 3668 // BUILTIN_INFO(HEXAGON.A2_vmaxh,DI_ftype_DIDI,2) 3669 // 3670 def int_hexagon_A2_vmaxh : 3671 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxh">; 3672 // 3673 // BUILTIN_INFO(HEXAGON.A2_vminuh,DI_ftype_DIDI,2) 3674 // 3675 def int_hexagon_A2_vminuh : 3676 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminuh">; 3677 // 3678 // BUILTIN_INFO(HEXAGON.A2_vmaxuh,DI_ftype_DIDI,2) 3679 // 3680 def int_hexagon_A2_vmaxuh : 3681 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxuh">; 3682 // 3683 // BUILTIN_INFO(HEXAGON.A2_vminw,DI_ftype_DIDI,2) 3684 // 3685 def int_hexagon_A2_vminw : 3686 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminw">; 3687 // 3688 // BUILTIN_INFO(HEXAGON.A2_vmaxw,DI_ftype_DIDI,2) 3689 // 3690 def int_hexagon_A2_vmaxw : 3691 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxw">; 3692 // 3693 // BUILTIN_INFO(HEXAGON.A2_vminuw,DI_ftype_DIDI,2) 3694 // 3695 def int_hexagon_A2_vminuw : 3696 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vminuw">; 3697 // 3698 // BUILTIN_INFO(HEXAGON.A2_vmaxuw,DI_ftype_DIDI,2) 3699 // 3700 def int_hexagon_A2_vmaxuw : 3701 Hexagon_di_didi_Intrinsic<"HEXAGON_A2_vmaxuw">; 3702 // 3703 // BUILTIN_INFO(HEXAGON.A4_modwrapu,SI_ftype_SISI,2) 3704 // 3705 def int_hexagon_A4_modwrapu : 3706 Hexagon_si_sisi_Intrinsic<"HEXAGON_A4_modwrapu">; 3707 // 3708 // BUILTIN_INFO(HEXAGON.F2_sfadd,SF_ftype_SFSF,2) 3709 // 3710 def int_hexagon_F2_sfadd : 3711 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfadd">; 3712 // 3713 // BUILTIN_INFO(HEXAGON.F2_sfsub,SF_ftype_SFSF,2) 3714 // 3715 def int_hexagon_F2_sfsub : 3716 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfsub">; 3717 // 3718 // BUILTIN_INFO(HEXAGON.F2_sfmpy,SF_ftype_SFSF,2) 3719 // 3720 def int_hexagon_F2_sfmpy : 3721 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmpy">; 3722 // 3723 // BUILTIN_INFO(HEXAGON.F2_sffma,SF_ftype_SFSFSF,3) 3724 // 3725 def int_hexagon_F2_sffma : 3726 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffma">; 3727 // 3728 // BUILTIN_INFO(HEXAGON.F2_sffma_sc,SF_ftype_SFSFSFQI,4) 3729 // 3730 def int_hexagon_F2_sffma_sc : 3731 Hexagon_sf_sfsfsfqi_Intrinsic<"HEXAGON_F2_sffma_sc">; 3732 // 3733 // BUILTIN_INFO(HEXAGON.F2_sffms,SF_ftype_SFSFSF,3) 3734 // 3735 def int_hexagon_F2_sffms : 3736 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffms">; 3737 // 3738 // BUILTIN_INFO(HEXAGON.F2_sffma_lib,SF_ftype_SFSFSF,3) 3739 // 3740 def int_hexagon_F2_sffma_lib : 3741 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffma_lib">; 3742 // 3743 // BUILTIN_INFO(HEXAGON.F2_sffms_lib,SF_ftype_SFSFSF,3) 3744 // 3745 def int_hexagon_F2_sffms_lib : 3746 Hexagon_sf_sfsfsf_Intrinsic<"HEXAGON_F2_sffms_lib">; 3747 // 3748 // BUILTIN_INFO(HEXAGON.F2_sfcmpeq,QI_ftype_SFSF,2) 3749 // 3750 def int_hexagon_F2_sfcmpeq : 3751 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpeq">; 3752 // 3753 // BUILTIN_INFO(HEXAGON.F2_sfcmpgt,QI_ftype_SFSF,2) 3754 // 3755 def int_hexagon_F2_sfcmpgt : 3756 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpgt">; 3757 // 3758 // BUILTIN_INFO(HEXAGON.F2_sfcmpge,QI_ftype_SFSF,2) 3759 // 3760 def int_hexagon_F2_sfcmpge : 3761 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpge">; 3762 // 3763 // BUILTIN_INFO(HEXAGON.F2_sfcmpuo,QI_ftype_SFSF,2) 3764 // 3765 def int_hexagon_F2_sfcmpuo : 3766 Hexagon_si_sfsf_Intrinsic<"HEXAGON_F2_sfcmpuo">; 3767 // 3768 // BUILTIN_INFO(HEXAGON.F2_sfmax,SF_ftype_SFSF,2) 3769 // 3770 def int_hexagon_F2_sfmax : 3771 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmax">; 3772 // 3773 // BUILTIN_INFO(HEXAGON.F2_sfmin,SF_ftype_SFSF,2) 3774 // 3775 def int_hexagon_F2_sfmin : 3776 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sfmin">; 3777 // 3778 // BUILTIN_INFO(HEXAGON.F2_sfclass,QI_ftype_SFSI,2) 3779 // 3780 def int_hexagon_F2_sfclass : 3781 Hexagon_si_sfsi_Intrinsic<"HEXAGON_F2_sfclass">; 3782 // 3783 // BUILTIN_INFO(HEXAGON.F2_sfimm_p,SF_ftype_SI,1) 3784 // 3785 def int_hexagon_F2_sfimm_p : 3786 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_sfimm_p">; 3787 // 3788 // BUILTIN_INFO(HEXAGON.F2_sfimm_n,SF_ftype_SI,1) 3789 // 3790 def int_hexagon_F2_sfimm_n : 3791 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_sfimm_n">; 3792 // 3793 // BUILTIN_INFO(HEXAGON.F2_sffixupn,SF_ftype_SFSF,2) 3794 // 3795 def int_hexagon_F2_sffixupn : 3796 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sffixupn">; 3797 // 3798 // BUILTIN_INFO(HEXAGON.F2_sffixupd,SF_ftype_SFSF,2) 3799 // 3800 def int_hexagon_F2_sffixupd : 3801 Hexagon_sf_sfsf_Intrinsic<"HEXAGON_F2_sffixupd">; 3802 // 3803 // BUILTIN_INFO(HEXAGON.F2_sffixupr,SF_ftype_SF,1) 3804 // 3805 def int_hexagon_F2_sffixupr : 3806 Hexagon_sf_sf_Intrinsic<"HEXAGON_F2_sffixupr">; 3807 // 3808 // BUILTIN_INFO(HEXAGON.F2_dfcmpeq,QI_ftype_DFDF,2) 3809 // 3810 def int_hexagon_F2_dfcmpeq : 3811 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpeq">; 3812 // 3813 // BUILTIN_INFO(HEXAGON.F2_dfcmpgt,QI_ftype_DFDF,2) 3814 // 3815 def int_hexagon_F2_dfcmpgt : 3816 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpgt">; 3817 // 3818 // BUILTIN_INFO(HEXAGON.F2_dfcmpge,QI_ftype_DFDF,2) 3819 // 3820 def int_hexagon_F2_dfcmpge : 3821 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpge">; 3822 // 3823 // BUILTIN_INFO(HEXAGON.F2_dfcmpuo,QI_ftype_DFDF,2) 3824 // 3825 def int_hexagon_F2_dfcmpuo : 3826 Hexagon_si_dfdf_Intrinsic<"HEXAGON_F2_dfcmpuo">; 3827 // 3828 // BUILTIN_INFO(HEXAGON.F2_dfclass,QI_ftype_DFSI,2) 3829 // 3830 def int_hexagon_F2_dfclass : 3831 Hexagon_si_dfsi_Intrinsic<"HEXAGON_F2_dfclass">; 3832 // 3833 // BUILTIN_INFO(HEXAGON.F2_dfimm_p,DF_ftype_SI,1) 3834 // 3835 def int_hexagon_F2_dfimm_p : 3836 Hexagon_df_si_Intrinsic<"HEXAGON_F2_dfimm_p">; 3837 // 3838 // BUILTIN_INFO(HEXAGON.F2_dfimm_n,DF_ftype_SI,1) 3839 // 3840 def int_hexagon_F2_dfimm_n : 3841 Hexagon_df_si_Intrinsic<"HEXAGON_F2_dfimm_n">; 3842 // 3843 // BUILTIN_INFO(HEXAGON.F2_conv_sf2df,DF_ftype_SF,1) 3844 // 3845 def int_hexagon_F2_conv_sf2df : 3846 Hexagon_df_sf_Intrinsic<"HEXAGON_F2_conv_sf2df">; 3847 // 3848 // BUILTIN_INFO(HEXAGON.F2_conv_df2sf,SF_ftype_DF,1) 3849 // 3850 def int_hexagon_F2_conv_df2sf : 3851 Hexagon_sf_df_Intrinsic<"HEXAGON_F2_conv_df2sf">; 3852 // 3853 // BUILTIN_INFO(HEXAGON.F2_conv_uw2sf,SF_ftype_SI,1) 3854 // 3855 def int_hexagon_F2_conv_uw2sf : 3856 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_conv_uw2sf">; 3857 // 3858 // BUILTIN_INFO(HEXAGON.F2_conv_uw2df,DF_ftype_SI,1) 3859 // 3860 def int_hexagon_F2_conv_uw2df : 3861 Hexagon_df_si_Intrinsic<"HEXAGON_F2_conv_uw2df">; 3862 // 3863 // BUILTIN_INFO(HEXAGON.F2_conv_w2sf,SF_ftype_SI,1) 3864 // 3865 def int_hexagon_F2_conv_w2sf : 3866 Hexagon_sf_si_Intrinsic<"HEXAGON_F2_conv_w2sf">; 3867 // 3868 // BUILTIN_INFO(HEXAGON.F2_conv_w2df,DF_ftype_SI,1) 3869 // 3870 def int_hexagon_F2_conv_w2df : 3871 Hexagon_df_si_Intrinsic<"HEXAGON_F2_conv_w2df">; 3872 // 3873 // BUILTIN_INFO(HEXAGON.F2_conv_ud2sf,SF_ftype_DI,1) 3874 // 3875 def int_hexagon_F2_conv_ud2sf : 3876 Hexagon_sf_di_Intrinsic<"HEXAGON_F2_conv_ud2sf">; 3877 // 3878 // BUILTIN_INFO(HEXAGON.F2_conv_ud2df,DF_ftype_DI,1) 3879 // 3880 def int_hexagon_F2_conv_ud2df : 3881 Hexagon_df_di_Intrinsic<"HEXAGON_F2_conv_ud2df">; 3882 // 3883 // BUILTIN_INFO(HEXAGON.F2_conv_d2sf,SF_ftype_DI,1) 3884 // 3885 def int_hexagon_F2_conv_d2sf : 3886 Hexagon_sf_di_Intrinsic<"HEXAGON_F2_conv_d2sf">; 3887 // 3888 // BUILTIN_INFO(HEXAGON.F2_conv_d2df,DF_ftype_DI,1) 3889 // 3890 def int_hexagon_F2_conv_d2df : 3891 Hexagon_df_di_Intrinsic<"HEXAGON_F2_conv_d2df">; 3892 // 3893 // BUILTIN_INFO(HEXAGON.F2_conv_sf2uw,SI_ftype_SF,1) 3894 // 3895 def int_hexagon_F2_conv_sf2uw : 3896 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2uw">; 3897 // 3898 // BUILTIN_INFO(HEXAGON.F2_conv_sf2w,SI_ftype_SF,1) 3899 // 3900 def int_hexagon_F2_conv_sf2w : 3901 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2w">; 3902 // 3903 // BUILTIN_INFO(HEXAGON.F2_conv_sf2ud,DI_ftype_SF,1) 3904 // 3905 def int_hexagon_F2_conv_sf2ud : 3906 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2ud">; 3907 // 3908 // BUILTIN_INFO(HEXAGON.F2_conv_sf2d,DI_ftype_SF,1) 3909 // 3910 def int_hexagon_F2_conv_sf2d : 3911 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2d">; 3912 // 3913 // BUILTIN_INFO(HEXAGON.F2_conv_df2uw,SI_ftype_DF,1) 3914 // 3915 def int_hexagon_F2_conv_df2uw : 3916 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2uw">; 3917 // 3918 // BUILTIN_INFO(HEXAGON.F2_conv_df2w,SI_ftype_DF,1) 3919 // 3920 def int_hexagon_F2_conv_df2w : 3921 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2w">; 3922 // 3923 // BUILTIN_INFO(HEXAGON.F2_conv_df2ud,DI_ftype_DF,1) 3924 // 3925 def int_hexagon_F2_conv_df2ud : 3926 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2ud">; 3927 // 3928 // BUILTIN_INFO(HEXAGON.F2_conv_df2d,DI_ftype_DF,1) 3929 // 3930 def int_hexagon_F2_conv_df2d : 3931 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2d">; 3932 // 3933 // BUILTIN_INFO(HEXAGON.F2_conv_sf2uw_chop,SI_ftype_SF,1) 3934 // 3935 def int_hexagon_F2_conv_sf2uw_chop : 3936 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2uw_chop">; 3937 // 3938 // BUILTIN_INFO(HEXAGON.F2_conv_sf2w_chop,SI_ftype_SF,1) 3939 // 3940 def int_hexagon_F2_conv_sf2w_chop : 3941 Hexagon_si_sf_Intrinsic<"HEXAGON_F2_conv_sf2w_chop">; 3942 // 3943 // BUILTIN_INFO(HEXAGON.F2_conv_sf2ud_chop,DI_ftype_SF,1) 3944 // 3945 def int_hexagon_F2_conv_sf2ud_chop : 3946 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2ud_chop">; 3947 // 3948 // BUILTIN_INFO(HEXAGON.F2_conv_sf2d_chop,DI_ftype_SF,1) 3949 // 3950 def int_hexagon_F2_conv_sf2d_chop : 3951 Hexagon_di_sf_Intrinsic<"HEXAGON_F2_conv_sf2d_chop">; 3952 // 3953 // BUILTIN_INFO(HEXAGON.F2_conv_df2uw_chop,SI_ftype_DF,1) 3954 // 3955 def int_hexagon_F2_conv_df2uw_chop : 3956 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2uw_chop">; 3957 // 3958 // BUILTIN_INFO(HEXAGON.F2_conv_df2w_chop,SI_ftype_DF,1) 3959 // 3960 def int_hexagon_F2_conv_df2w_chop : 3961 Hexagon_si_df_Intrinsic<"HEXAGON_F2_conv_df2w_chop">; 3962 // 3963 // BUILTIN_INFO(HEXAGON.F2_conv_df2ud_chop,DI_ftype_DF,1) 3964 // 3965 def int_hexagon_F2_conv_df2ud_chop : 3966 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2ud_chop">; 3967 // 3968 // BUILTIN_INFO(HEXAGON.F2_conv_df2d_chop,DI_ftype_DF,1) 3969 // 3970 def int_hexagon_F2_conv_df2d_chop : 3971 Hexagon_di_df_Intrinsic<"HEXAGON_F2_conv_df2d_chop">; 3972 // 3973 // BUILTIN_INFO(HEXAGON.S2_asr_r_r,SI_ftype_SISI,2) 3974 // 3975 def int_hexagon_S2_asr_r_r : 3976 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_r_r">; 3977 // 3978 // BUILTIN_INFO(HEXAGON.S2_asl_r_r,SI_ftype_SISI,2) 3979 // 3980 def int_hexagon_S2_asl_r_r : 3981 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_r_r">; 3982 // 3983 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r,SI_ftype_SISI,2) 3984 // 3985 def int_hexagon_S2_lsr_r_r : 3986 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsr_r_r">; 3987 // 3988 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r,SI_ftype_SISI,2) 3989 // 3990 def int_hexagon_S2_lsl_r_r : 3991 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsl_r_r">; 3992 // 3993 // BUILTIN_INFO(HEXAGON.S2_asr_r_p,DI_ftype_DISI,2) 3994 // 3995 def int_hexagon_S2_asr_r_p : 3996 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_p">; 3997 // 3998 // BUILTIN_INFO(HEXAGON.S2_asl_r_p,DI_ftype_DISI,2) 3999 // 4000 def int_hexagon_S2_asl_r_p : 4001 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_p">; 4002 // 4003 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p,DI_ftype_DISI,2) 4004 // 4005 def int_hexagon_S2_lsr_r_p : 4006 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_p">; 4007 // 4008 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p,DI_ftype_DISI,2) 4009 // 4010 def int_hexagon_S2_lsl_r_p : 4011 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_p">; 4012 // 4013 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_acc,SI_ftype_SISISI,3) 4014 // 4015 def int_hexagon_S2_asr_r_r_acc : 4016 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_acc">; 4017 // 4018 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_acc,SI_ftype_SISISI,3) 4019 // 4020 def int_hexagon_S2_asl_r_r_acc : 4021 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_acc">; 4022 // 4023 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_acc,SI_ftype_SISISI,3) 4024 // 4025 def int_hexagon_S2_lsr_r_r_acc : 4026 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_acc">; 4027 // 4028 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_acc,SI_ftype_SISISI,3) 4029 // 4030 def int_hexagon_S2_lsl_r_r_acc : 4031 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_acc">; 4032 // 4033 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_acc,DI_ftype_DIDISI,3) 4034 // 4035 def int_hexagon_S2_asr_r_p_acc : 4036 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_acc">; 4037 // 4038 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_acc,DI_ftype_DIDISI,3) 4039 // 4040 def int_hexagon_S2_asl_r_p_acc : 4041 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_acc">; 4042 // 4043 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_acc,DI_ftype_DIDISI,3) 4044 // 4045 def int_hexagon_S2_lsr_r_p_acc : 4046 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_acc">; 4047 // 4048 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_acc,DI_ftype_DIDISI,3) 4049 // 4050 def int_hexagon_S2_lsl_r_p_acc : 4051 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_acc">; 4052 // 4053 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_nac,SI_ftype_SISISI,3) 4054 // 4055 def int_hexagon_S2_asr_r_r_nac : 4056 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_nac">; 4057 // 4058 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_nac,SI_ftype_SISISI,3) 4059 // 4060 def int_hexagon_S2_asl_r_r_nac : 4061 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_nac">; 4062 // 4063 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_nac,SI_ftype_SISISI,3) 4064 // 4065 def int_hexagon_S2_lsr_r_r_nac : 4066 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_nac">; 4067 // 4068 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_nac,SI_ftype_SISISI,3) 4069 // 4070 def int_hexagon_S2_lsl_r_r_nac : 4071 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_nac">; 4072 // 4073 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_nac,DI_ftype_DIDISI,3) 4074 // 4075 def int_hexagon_S2_asr_r_p_nac : 4076 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_nac">; 4077 // 4078 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_nac,DI_ftype_DIDISI,3) 4079 // 4080 def int_hexagon_S2_asl_r_p_nac : 4081 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_nac">; 4082 // 4083 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_nac,DI_ftype_DIDISI,3) 4084 // 4085 def int_hexagon_S2_lsr_r_p_nac : 4086 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_nac">; 4087 // 4088 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_nac,DI_ftype_DIDISI,3) 4089 // 4090 def int_hexagon_S2_lsl_r_p_nac : 4091 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_nac">; 4092 // 4093 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_and,SI_ftype_SISISI,3) 4094 // 4095 def int_hexagon_S2_asr_r_r_and : 4096 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_and">; 4097 // 4098 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_and,SI_ftype_SISISI,3) 4099 // 4100 def int_hexagon_S2_asl_r_r_and : 4101 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_and">; 4102 // 4103 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_and,SI_ftype_SISISI,3) 4104 // 4105 def int_hexagon_S2_lsr_r_r_and : 4106 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_and">; 4107 // 4108 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_and,SI_ftype_SISISI,3) 4109 // 4110 def int_hexagon_S2_lsl_r_r_and : 4111 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_and">; 4112 // 4113 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_or,SI_ftype_SISISI,3) 4114 // 4115 def int_hexagon_S2_asr_r_r_or : 4116 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_r_r_or">; 4117 // 4118 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_or,SI_ftype_SISISI,3) 4119 // 4120 def int_hexagon_S2_asl_r_r_or : 4121 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_r_r_or">; 4122 // 4123 // BUILTIN_INFO(HEXAGON.S2_lsr_r_r_or,SI_ftype_SISISI,3) 4124 // 4125 def int_hexagon_S2_lsr_r_r_or : 4126 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_r_r_or">; 4127 // 4128 // BUILTIN_INFO(HEXAGON.S2_lsl_r_r_or,SI_ftype_SISISI,3) 4129 // 4130 def int_hexagon_S2_lsl_r_r_or : 4131 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsl_r_r_or">; 4132 // 4133 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_and,DI_ftype_DIDISI,3) 4134 // 4135 def int_hexagon_S2_asr_r_p_and : 4136 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_and">; 4137 // 4138 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_and,DI_ftype_DIDISI,3) 4139 // 4140 def int_hexagon_S2_asl_r_p_and : 4141 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_and">; 4142 // 4143 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_and,DI_ftype_DIDISI,3) 4144 // 4145 def int_hexagon_S2_lsr_r_p_and : 4146 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_and">; 4147 // 4148 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_and,DI_ftype_DIDISI,3) 4149 // 4150 def int_hexagon_S2_lsl_r_p_and : 4151 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_and">; 4152 // 4153 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_or,DI_ftype_DIDISI,3) 4154 // 4155 def int_hexagon_S2_asr_r_p_or : 4156 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_or">; 4157 // 4158 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_or,DI_ftype_DIDISI,3) 4159 // 4160 def int_hexagon_S2_asl_r_p_or : 4161 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_or">; 4162 // 4163 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_or,DI_ftype_DIDISI,3) 4164 // 4165 def int_hexagon_S2_lsr_r_p_or : 4166 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_or">; 4167 // 4168 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_or,DI_ftype_DIDISI,3) 4169 // 4170 def int_hexagon_S2_lsl_r_p_or : 4171 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_or">; 4172 // 4173 // BUILTIN_INFO(HEXAGON.S2_asr_r_p_xor,DI_ftype_DIDISI,3) 4174 // 4175 def int_hexagon_S2_asr_r_p_xor : 4176 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_r_p_xor">; 4177 // 4178 // BUILTIN_INFO(HEXAGON.S2_asl_r_p_xor,DI_ftype_DIDISI,3) 4179 // 4180 def int_hexagon_S2_asl_r_p_xor : 4181 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_r_p_xor">; 4182 // 4183 // BUILTIN_INFO(HEXAGON.S2_lsr_r_p_xor,DI_ftype_DIDISI,3) 4184 // 4185 def int_hexagon_S2_lsr_r_p_xor : 4186 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_r_p_xor">; 4187 // 4188 // BUILTIN_INFO(HEXAGON.S2_lsl_r_p_xor,DI_ftype_DIDISI,3) 4189 // 4190 def int_hexagon_S2_lsl_r_p_xor : 4191 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsl_r_p_xor">; 4192 // 4193 // BUILTIN_INFO(HEXAGON.S2_asr_r_r_sat,SI_ftype_SISI,2) 4194 // 4195 def int_hexagon_S2_asr_r_r_sat : 4196 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_r_r_sat">; 4197 // 4198 // BUILTIN_INFO(HEXAGON.S2_asl_r_r_sat,SI_ftype_SISI,2) 4199 // 4200 def int_hexagon_S2_asl_r_r_sat : 4201 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_r_r_sat">; 4202 // 4203 // BUILTIN_INFO(HEXAGON.S2_asr_i_r,SI_ftype_SISI,2) 4204 // 4205 def int_hexagon_S2_asr_i_r : 4206 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r">; 4207 // 4208 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r,SI_ftype_SISI,2) 4209 // 4210 def int_hexagon_S2_lsr_i_r : 4211 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_lsr_i_r">; 4212 // 4213 // BUILTIN_INFO(HEXAGON.S2_asl_i_r,SI_ftype_SISI,2) 4214 // 4215 def int_hexagon_S2_asl_i_r : 4216 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_i_r">; 4217 // 4218 // BUILTIN_INFO(HEXAGON.S2_asr_i_p,DI_ftype_DISI,2) 4219 // 4220 def int_hexagon_S2_asr_i_p : 4221 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p">; 4222 // 4223 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p,DI_ftype_DISI,2) 4224 // 4225 def int_hexagon_S2_lsr_i_p : 4226 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_p">; 4227 // 4228 // BUILTIN_INFO(HEXAGON.S2_asl_i_p,DI_ftype_DISI,2) 4229 // 4230 def int_hexagon_S2_asl_i_p : 4231 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_p">; 4232 // 4233 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_acc,SI_ftype_SISISI,3) 4234 // 4235 def int_hexagon_S2_asr_i_r_acc : 4236 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_acc">; 4237 // 4238 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_acc,SI_ftype_SISISI,3) 4239 // 4240 def int_hexagon_S2_lsr_i_r_acc : 4241 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_acc">; 4242 // 4243 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_acc,SI_ftype_SISISI,3) 4244 // 4245 def int_hexagon_S2_asl_i_r_acc : 4246 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_acc">; 4247 // 4248 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_acc,DI_ftype_DIDISI,3) 4249 // 4250 def int_hexagon_S2_asr_i_p_acc : 4251 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_acc">; 4252 // 4253 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_acc,DI_ftype_DIDISI,3) 4254 // 4255 def int_hexagon_S2_lsr_i_p_acc : 4256 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_acc">; 4257 // 4258 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_acc,DI_ftype_DIDISI,3) 4259 // 4260 def int_hexagon_S2_asl_i_p_acc : 4261 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_acc">; 4262 // 4263 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_nac,SI_ftype_SISISI,3) 4264 // 4265 def int_hexagon_S2_asr_i_r_nac : 4266 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_nac">; 4267 // 4268 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_nac,SI_ftype_SISISI,3) 4269 // 4270 def int_hexagon_S2_lsr_i_r_nac : 4271 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_nac">; 4272 // 4273 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_nac,SI_ftype_SISISI,3) 4274 // 4275 def int_hexagon_S2_asl_i_r_nac : 4276 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_nac">; 4277 // 4278 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_nac,DI_ftype_DIDISI,3) 4279 // 4280 def int_hexagon_S2_asr_i_p_nac : 4281 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_nac">; 4282 // 4283 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_nac,DI_ftype_DIDISI,3) 4284 // 4285 def int_hexagon_S2_lsr_i_p_nac : 4286 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_nac">; 4287 // 4288 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_nac,DI_ftype_DIDISI,3) 4289 // 4290 def int_hexagon_S2_asl_i_p_nac : 4291 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_nac">; 4292 // 4293 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_xacc,SI_ftype_SISISI,3) 4294 // 4295 def int_hexagon_S2_lsr_i_r_xacc : 4296 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_xacc">; 4297 // 4298 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_xacc,SI_ftype_SISISI,3) 4299 // 4300 def int_hexagon_S2_asl_i_r_xacc : 4301 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_xacc">; 4302 // 4303 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_xacc,DI_ftype_DIDISI,3) 4304 // 4305 def int_hexagon_S2_lsr_i_p_xacc : 4306 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_xacc">; 4307 // 4308 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_xacc,DI_ftype_DIDISI,3) 4309 // 4310 def int_hexagon_S2_asl_i_p_xacc : 4311 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_xacc">; 4312 // 4313 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_and,SI_ftype_SISISI,3) 4314 // 4315 def int_hexagon_S2_asr_i_r_and : 4316 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_and">; 4317 // 4318 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_and,SI_ftype_SISISI,3) 4319 // 4320 def int_hexagon_S2_lsr_i_r_and : 4321 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_and">; 4322 // 4323 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_and,SI_ftype_SISISI,3) 4324 // 4325 def int_hexagon_S2_asl_i_r_and : 4326 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_and">; 4327 // 4328 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_or,SI_ftype_SISISI,3) 4329 // 4330 def int_hexagon_S2_asr_i_r_or : 4331 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asr_i_r_or">; 4332 // 4333 // BUILTIN_INFO(HEXAGON.S2_lsr_i_r_or,SI_ftype_SISISI,3) 4334 // 4335 def int_hexagon_S2_lsr_i_r_or : 4336 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_lsr_i_r_or">; 4337 // 4338 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_or,SI_ftype_SISISI,3) 4339 // 4340 def int_hexagon_S2_asl_i_r_or : 4341 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_asl_i_r_or">; 4342 // 4343 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_and,DI_ftype_DIDISI,3) 4344 // 4345 def int_hexagon_S2_asr_i_p_and : 4346 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_and">; 4347 // 4348 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_and,DI_ftype_DIDISI,3) 4349 // 4350 def int_hexagon_S2_lsr_i_p_and : 4351 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_and">; 4352 // 4353 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_and,DI_ftype_DIDISI,3) 4354 // 4355 def int_hexagon_S2_asl_i_p_and : 4356 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_and">; 4357 // 4358 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_or,DI_ftype_DIDISI,3) 4359 // 4360 def int_hexagon_S2_asr_i_p_or : 4361 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asr_i_p_or">; 4362 // 4363 // BUILTIN_INFO(HEXAGON.S2_lsr_i_p_or,DI_ftype_DIDISI,3) 4364 // 4365 def int_hexagon_S2_lsr_i_p_or : 4366 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_lsr_i_p_or">; 4367 // 4368 // BUILTIN_INFO(HEXAGON.S2_asl_i_p_or,DI_ftype_DIDISI,3) 4369 // 4370 def int_hexagon_S2_asl_i_p_or : 4371 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_asl_i_p_or">; 4372 // 4373 // BUILTIN_INFO(HEXAGON.S2_asl_i_r_sat,SI_ftype_SISI,2) 4374 // 4375 def int_hexagon_S2_asl_i_r_sat : 4376 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asl_i_r_sat">; 4377 // 4378 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_rnd,SI_ftype_SISI,2) 4379 // 4380 def int_hexagon_S2_asr_i_r_rnd : 4381 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r_rnd">; 4382 // 4383 // BUILTIN_INFO(HEXAGON.S2_asr_i_r_rnd_goodsyntax,SI_ftype_SISI,2) 4384 // 4385 def int_hexagon_S2_asr_i_r_rnd_goodsyntax : 4386 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_asr_i_r_rnd_goodsyntax">; 4387 // 4388 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_rnd,DI_ftype_DISI,2) 4389 // 4390 def int_hexagon_S2_asr_i_p_rnd : 4391 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p_rnd">; 4392 // 4393 // BUILTIN_INFO(HEXAGON.S2_asr_i_p_rnd_goodsyntax,DI_ftype_DISI,2) 4394 // 4395 def int_hexagon_S2_asr_i_p_rnd_goodsyntax : 4396 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_p_rnd_goodsyntax">; 4397 // 4398 // BUILTIN_INFO(HEXAGON.S4_lsli,SI_ftype_SISI,2) 4399 // 4400 def int_hexagon_S4_lsli : 4401 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_lsli">; 4402 // 4403 // BUILTIN_INFO(HEXAGON.S2_addasl_rrri,SI_ftype_SISISI,3) 4404 // 4405 def int_hexagon_S2_addasl_rrri : 4406 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_addasl_rrri">; 4407 // 4408 // BUILTIN_INFO(HEXAGON.S4_andi_asl_ri,SI_ftype_SISISI,3) 4409 // 4410 def int_hexagon_S4_andi_asl_ri : 4411 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_andi_asl_ri">; 4412 // 4413 // BUILTIN_INFO(HEXAGON.S4_ori_asl_ri,SI_ftype_SISISI,3) 4414 // 4415 def int_hexagon_S4_ori_asl_ri : 4416 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_ori_asl_ri">; 4417 // 4418 // BUILTIN_INFO(HEXAGON.S4_addi_asl_ri,SI_ftype_SISISI,3) 4419 // 4420 def int_hexagon_S4_addi_asl_ri : 4421 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addi_asl_ri">; 4422 // 4423 // BUILTIN_INFO(HEXAGON.S4_subi_asl_ri,SI_ftype_SISISI,3) 4424 // 4425 def int_hexagon_S4_subi_asl_ri : 4426 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subi_asl_ri">; 4427 // 4428 // BUILTIN_INFO(HEXAGON.S4_andi_lsr_ri,SI_ftype_SISISI,3) 4429 // 4430 def int_hexagon_S4_andi_lsr_ri : 4431 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_andi_lsr_ri">; 4432 // 4433 // BUILTIN_INFO(HEXAGON.S4_ori_lsr_ri,SI_ftype_SISISI,3) 4434 // 4435 def int_hexagon_S4_ori_lsr_ri : 4436 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_ori_lsr_ri">; 4437 // 4438 // BUILTIN_INFO(HEXAGON.S4_addi_lsr_ri,SI_ftype_SISISI,3) 4439 // 4440 def int_hexagon_S4_addi_lsr_ri : 4441 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_addi_lsr_ri">; 4442 // 4443 // BUILTIN_INFO(HEXAGON.S4_subi_lsr_ri,SI_ftype_SISISI,3) 4444 // 4445 def int_hexagon_S4_subi_lsr_ri : 4446 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_subi_lsr_ri">; 4447 // 4448 // BUILTIN_INFO(HEXAGON.S2_valignib,DI_ftype_DIDISI,3) 4449 // 4450 def int_hexagon_S2_valignib : 4451 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_valignib">; 4452 // 4453 // BUILTIN_INFO(HEXAGON.S2_valignrb,DI_ftype_DIDIQI,3) 4454 // 4455 def int_hexagon_S2_valignrb : 4456 Hexagon_di_didiqi_Intrinsic<"HEXAGON_S2_valignrb">; 4457 // 4458 // BUILTIN_INFO(HEXAGON.S2_vspliceib,DI_ftype_DIDISI,3) 4459 // 4460 def int_hexagon_S2_vspliceib : 4461 Hexagon_di_didisi_Intrinsic<"HEXAGON_S2_vspliceib">; 4462 // 4463 // BUILTIN_INFO(HEXAGON.S2_vsplicerb,DI_ftype_DIDIQI,3) 4464 // 4465 def int_hexagon_S2_vsplicerb : 4466 Hexagon_di_didiqi_Intrinsic<"HEXAGON_S2_vsplicerb">; 4467 // 4468 // BUILTIN_INFO(HEXAGON.S2_vsplatrh,DI_ftype_SI,1) 4469 // 4470 def int_hexagon_S2_vsplatrh : 4471 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsplatrh">; 4472 // 4473 // BUILTIN_INFO(HEXAGON.S2_vsplatrb,SI_ftype_SI,1) 4474 // 4475 def int_hexagon_S2_vsplatrb : 4476 Hexagon_si_si_Intrinsic<"HEXAGON_S2_vsplatrb">; 4477 // 4478 // BUILTIN_INFO(HEXAGON.S2_insert,SI_ftype_SISISISI,4) 4479 // 4480 def int_hexagon_S2_insert : 4481 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_insert">; 4482 // 4483 // BUILTIN_INFO(HEXAGON.S2_tableidxb_goodsyntax,SI_ftype_SISISISI,4) 4484 // 4485 def int_hexagon_S2_tableidxb_goodsyntax : 4486 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxb_goodsyntax">; 4487 // 4488 // BUILTIN_INFO(HEXAGON.S2_tableidxh_goodsyntax,SI_ftype_SISISISI,4) 4489 // 4490 def int_hexagon_S2_tableidxh_goodsyntax : 4491 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxh_goodsyntax">; 4492 // 4493 // BUILTIN_INFO(HEXAGON.S2_tableidxw_goodsyntax,SI_ftype_SISISISI,4) 4494 // 4495 def int_hexagon_S2_tableidxw_goodsyntax : 4496 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxw_goodsyntax">; 4497 // 4498 // BUILTIN_INFO(HEXAGON.S2_tableidxd_goodsyntax,SI_ftype_SISISISI,4) 4499 // 4500 def int_hexagon_S2_tableidxd_goodsyntax : 4501 Hexagon_si_sisisisi_Intrinsic<"HEXAGON_S2_tableidxd_goodsyntax">; 4502 // 4503 // BUILTIN_INFO(HEXAGON.A4_bitspliti,DI_ftype_SISI,2) 4504 // 4505 def int_hexagon_A4_bitspliti : 4506 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_bitspliti">; 4507 // 4508 // BUILTIN_INFO(HEXAGON.A4_bitsplit,DI_ftype_SISI,2) 4509 // 4510 def int_hexagon_A4_bitsplit : 4511 Hexagon_di_sisi_Intrinsic<"HEXAGON_A4_bitsplit">; 4512 // 4513 // BUILTIN_INFO(HEXAGON.S4_extract,SI_ftype_SISISI,3) 4514 // 4515 def int_hexagon_S4_extract : 4516 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S4_extract">; 4517 // 4518 // BUILTIN_INFO(HEXAGON.S2_extractu,SI_ftype_SISISI,3) 4519 // 4520 def int_hexagon_S2_extractu : 4521 Hexagon_si_sisisi_Intrinsic<"HEXAGON_S2_extractu">; 4522 // 4523 // BUILTIN_INFO(HEXAGON.S2_insertp,DI_ftype_DIDISISI,4) 4524 // 4525 def int_hexagon_S2_insertp : 4526 Hexagon_di_didisisi_Intrinsic<"HEXAGON_S2_insertp">; 4527 // 4528 // BUILTIN_INFO(HEXAGON.S4_extractp,DI_ftype_DISISI,3) 4529 // 4530 def int_hexagon_S4_extractp : 4531 Hexagon_di_disisi_Intrinsic<"HEXAGON_S4_extractp">; 4532 // 4533 // BUILTIN_INFO(HEXAGON.S2_extractup,DI_ftype_DISISI,3) 4534 // 4535 def int_hexagon_S2_extractup : 4536 Hexagon_di_disisi_Intrinsic<"HEXAGON_S2_extractup">; 4537 // 4538 // BUILTIN_INFO(HEXAGON.S2_insert_rp,SI_ftype_SISIDI,3) 4539 // 4540 def int_hexagon_S2_insert_rp : 4541 Hexagon_si_sisidi_Intrinsic<"HEXAGON_S2_insert_rp">; 4542 // 4543 // BUILTIN_INFO(HEXAGON.S4_extract_rp,SI_ftype_SIDI,2) 4544 // 4545 def int_hexagon_S4_extract_rp : 4546 Hexagon_si_sidi_Intrinsic<"HEXAGON_S4_extract_rp">; 4547 // 4548 // BUILTIN_INFO(HEXAGON.S2_extractu_rp,SI_ftype_SIDI,2) 4549 // 4550 def int_hexagon_S2_extractu_rp : 4551 Hexagon_si_sidi_Intrinsic<"HEXAGON_S2_extractu_rp">; 4552 // 4553 // BUILTIN_INFO(HEXAGON.S2_insertp_rp,DI_ftype_DIDIDI,3) 4554 // 4555 def int_hexagon_S2_insertp_rp : 4556 Hexagon_di_dididi_Intrinsic<"HEXAGON_S2_insertp_rp">; 4557 // 4558 // BUILTIN_INFO(HEXAGON.S4_extractp_rp,DI_ftype_DIDI,2) 4559 // 4560 def int_hexagon_S4_extractp_rp : 4561 Hexagon_di_didi_Intrinsic<"HEXAGON_S4_extractp_rp">; 4562 // 4563 // BUILTIN_INFO(HEXAGON.S2_extractup_rp,DI_ftype_DIDI,2) 4564 // 4565 def int_hexagon_S2_extractup_rp : 4566 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_extractup_rp">; 4567 // 4568 // BUILTIN_INFO(HEXAGON.S2_tstbit_i,QI_ftype_SISI,2) 4569 // 4570 def int_hexagon_S2_tstbit_i : 4571 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_tstbit_i">; 4572 // 4573 // BUILTIN_INFO(HEXAGON.S4_ntstbit_i,QI_ftype_SISI,2) 4574 // 4575 def int_hexagon_S4_ntstbit_i : 4576 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_ntstbit_i">; 4577 // 4578 // BUILTIN_INFO(HEXAGON.S2_setbit_i,SI_ftype_SISI,2) 4579 // 4580 def int_hexagon_S2_setbit_i : 4581 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_setbit_i">; 4582 // 4583 // BUILTIN_INFO(HEXAGON.S2_togglebit_i,SI_ftype_SISI,2) 4584 // 4585 def int_hexagon_S2_togglebit_i : 4586 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_togglebit_i">; 4587 // 4588 // BUILTIN_INFO(HEXAGON.S2_clrbit_i,SI_ftype_SISI,2) 4589 // 4590 def int_hexagon_S2_clrbit_i : 4591 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_clrbit_i">; 4592 // 4593 // BUILTIN_INFO(HEXAGON.S2_tstbit_r,QI_ftype_SISI,2) 4594 // 4595 def int_hexagon_S2_tstbit_r : 4596 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_tstbit_r">; 4597 // 4598 // BUILTIN_INFO(HEXAGON.S4_ntstbit_r,QI_ftype_SISI,2) 4599 // 4600 def int_hexagon_S4_ntstbit_r : 4601 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_ntstbit_r">; 4602 // 4603 // BUILTIN_INFO(HEXAGON.S2_setbit_r,SI_ftype_SISI,2) 4604 // 4605 def int_hexagon_S2_setbit_r : 4606 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_setbit_r">; 4607 // 4608 // BUILTIN_INFO(HEXAGON.S2_togglebit_r,SI_ftype_SISI,2) 4609 // 4610 def int_hexagon_S2_togglebit_r : 4611 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_togglebit_r">; 4612 // 4613 // BUILTIN_INFO(HEXAGON.S2_clrbit_r,SI_ftype_SISI,2) 4614 // 4615 def int_hexagon_S2_clrbit_r : 4616 Hexagon_si_sisi_Intrinsic<"HEXAGON_S2_clrbit_r">; 4617 // 4618 // BUILTIN_INFO(HEXAGON.S2_asr_i_vh,DI_ftype_DISI,2) 4619 // 4620 def int_hexagon_S2_asr_i_vh : 4621 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_vh">; 4622 // 4623 // BUILTIN_INFO(HEXAGON.S2_lsr_i_vh,DI_ftype_DISI,2) 4624 // 4625 def int_hexagon_S2_lsr_i_vh : 4626 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_vh">; 4627 // 4628 // BUILTIN_INFO(HEXAGON.S2_asl_i_vh,DI_ftype_DISI,2) 4629 // 4630 def int_hexagon_S2_asl_i_vh : 4631 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_vh">; 4632 // 4633 // BUILTIN_INFO(HEXAGON.S2_asr_r_vh,DI_ftype_DISI,2) 4634 // 4635 def int_hexagon_S2_asr_r_vh : 4636 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_vh">; 4637 // 4638 // BUILTIN_INFO(HEXAGON.S5_asrhub_rnd_sat_goodsyntax,SI_ftype_DISI,2) 4639 // 4640 def int_hexagon_S5_asrhub_rnd_sat_goodsyntax : 4641 Hexagon_si_disi_Intrinsic<"HEXAGON_S5_asrhub_rnd_sat_goodsyntax">; 4642 // 4643 // BUILTIN_INFO(HEXAGON.S5_asrhub_sat,SI_ftype_DISI,2) 4644 // 4645 def int_hexagon_S5_asrhub_sat : 4646 Hexagon_si_disi_Intrinsic<"HEXAGON_S5_asrhub_sat">; 4647 // 4648 // BUILTIN_INFO(HEXAGON.S5_vasrhrnd_goodsyntax,DI_ftype_DISI,2) 4649 // 4650 def int_hexagon_S5_vasrhrnd_goodsyntax : 4651 Hexagon_di_disi_Intrinsic<"HEXAGON_S5_vasrhrnd_goodsyntax">; 4652 // 4653 // BUILTIN_INFO(HEXAGON.S2_asl_r_vh,DI_ftype_DISI,2) 4654 // 4655 def int_hexagon_S2_asl_r_vh : 4656 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_vh">; 4657 // 4658 // BUILTIN_INFO(HEXAGON.S2_lsr_r_vh,DI_ftype_DISI,2) 4659 // 4660 def int_hexagon_S2_lsr_r_vh : 4661 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_vh">; 4662 // 4663 // BUILTIN_INFO(HEXAGON.S2_lsl_r_vh,DI_ftype_DISI,2) 4664 // 4665 def int_hexagon_S2_lsl_r_vh : 4666 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_vh">; 4667 // 4668 // BUILTIN_INFO(HEXAGON.S2_asr_i_vw,DI_ftype_DISI,2) 4669 // 4670 def int_hexagon_S2_asr_i_vw : 4671 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_i_vw">; 4672 // 4673 // BUILTIN_INFO(HEXAGON.S2_asr_i_svw_trun,SI_ftype_DISI,2) 4674 // 4675 def int_hexagon_S2_asr_i_svw_trun : 4676 Hexagon_si_disi_Intrinsic<"HEXAGON_S2_asr_i_svw_trun">; 4677 // 4678 // BUILTIN_INFO(HEXAGON.S2_asr_r_svw_trun,SI_ftype_DISI,2) 4679 // 4680 def int_hexagon_S2_asr_r_svw_trun : 4681 Hexagon_si_disi_Intrinsic<"HEXAGON_S2_asr_r_svw_trun">; 4682 // 4683 // BUILTIN_INFO(HEXAGON.S2_lsr_i_vw,DI_ftype_DISI,2) 4684 // 4685 def int_hexagon_S2_lsr_i_vw : 4686 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_i_vw">; 4687 // 4688 // BUILTIN_INFO(HEXAGON.S2_asl_i_vw,DI_ftype_DISI,2) 4689 // 4690 def int_hexagon_S2_asl_i_vw : 4691 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_i_vw">; 4692 // 4693 // BUILTIN_INFO(HEXAGON.S2_asr_r_vw,DI_ftype_DISI,2) 4694 // 4695 def int_hexagon_S2_asr_r_vw : 4696 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asr_r_vw">; 4697 // 4698 // BUILTIN_INFO(HEXAGON.S2_asl_r_vw,DI_ftype_DISI,2) 4699 // 4700 def int_hexagon_S2_asl_r_vw : 4701 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_asl_r_vw">; 4702 // 4703 // BUILTIN_INFO(HEXAGON.S2_lsr_r_vw,DI_ftype_DISI,2) 4704 // 4705 def int_hexagon_S2_lsr_r_vw : 4706 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsr_r_vw">; 4707 // 4708 // BUILTIN_INFO(HEXAGON.S2_lsl_r_vw,DI_ftype_DISI,2) 4709 // 4710 def int_hexagon_S2_lsl_r_vw : 4711 Hexagon_di_disi_Intrinsic<"HEXAGON_S2_lsl_r_vw">; 4712 // 4713 // BUILTIN_INFO(HEXAGON.S2_vrndpackwh,SI_ftype_DI,1) 4714 // 4715 def int_hexagon_S2_vrndpackwh : 4716 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vrndpackwh">; 4717 // 4718 // BUILTIN_INFO(HEXAGON.S2_vrndpackwhs,SI_ftype_DI,1) 4719 // 4720 def int_hexagon_S2_vrndpackwhs : 4721 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vrndpackwhs">; 4722 // 4723 // BUILTIN_INFO(HEXAGON.S2_vsxtbh,DI_ftype_SI,1) 4724 // 4725 def int_hexagon_S2_vsxtbh : 4726 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsxtbh">; 4727 // 4728 // BUILTIN_INFO(HEXAGON.S2_vzxtbh,DI_ftype_SI,1) 4729 // 4730 def int_hexagon_S2_vzxtbh : 4731 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vzxtbh">; 4732 // 4733 // BUILTIN_INFO(HEXAGON.S2_vsathub,SI_ftype_DI,1) 4734 // 4735 def int_hexagon_S2_vsathub : 4736 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsathub">; 4737 // 4738 // BUILTIN_INFO(HEXAGON.S2_svsathub,SI_ftype_SI,1) 4739 // 4740 def int_hexagon_S2_svsathub : 4741 Hexagon_si_si_Intrinsic<"HEXAGON_S2_svsathub">; 4742 // 4743 // BUILTIN_INFO(HEXAGON.S2_svsathb,SI_ftype_SI,1) 4744 // 4745 def int_hexagon_S2_svsathb : 4746 Hexagon_si_si_Intrinsic<"HEXAGON_S2_svsathb">; 4747 // 4748 // BUILTIN_INFO(HEXAGON.S2_vsathb,SI_ftype_DI,1) 4749 // 4750 def int_hexagon_S2_vsathb : 4751 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsathb">; 4752 // 4753 // BUILTIN_INFO(HEXAGON.S2_vtrunohb,SI_ftype_DI,1) 4754 // 4755 def int_hexagon_S2_vtrunohb : 4756 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vtrunohb">; 4757 // 4758 // BUILTIN_INFO(HEXAGON.S2_vtrunewh,DI_ftype_DIDI,2) 4759 // 4760 def int_hexagon_S2_vtrunewh : 4761 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_vtrunewh">; 4762 // 4763 // BUILTIN_INFO(HEXAGON.S2_vtrunowh,DI_ftype_DIDI,2) 4764 // 4765 def int_hexagon_S2_vtrunowh : 4766 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_vtrunowh">; 4767 // 4768 // BUILTIN_INFO(HEXAGON.S2_vtrunehb,SI_ftype_DI,1) 4769 // 4770 def int_hexagon_S2_vtrunehb : 4771 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vtrunehb">; 4772 // 4773 // BUILTIN_INFO(HEXAGON.S2_vsxthw,DI_ftype_SI,1) 4774 // 4775 def int_hexagon_S2_vsxthw : 4776 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vsxthw">; 4777 // 4778 // BUILTIN_INFO(HEXAGON.S2_vzxthw,DI_ftype_SI,1) 4779 // 4780 def int_hexagon_S2_vzxthw : 4781 Hexagon_di_si_Intrinsic<"HEXAGON_S2_vzxthw">; 4782 // 4783 // BUILTIN_INFO(HEXAGON.S2_vsatwh,SI_ftype_DI,1) 4784 // 4785 def int_hexagon_S2_vsatwh : 4786 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsatwh">; 4787 // 4788 // BUILTIN_INFO(HEXAGON.S2_vsatwuh,SI_ftype_DI,1) 4789 // 4790 def int_hexagon_S2_vsatwuh : 4791 Hexagon_si_di_Intrinsic<"HEXAGON_S2_vsatwuh">; 4792 // 4793 // BUILTIN_INFO(HEXAGON.S2_packhl,DI_ftype_SISI,2) 4794 // 4795 def int_hexagon_S2_packhl : 4796 Hexagon_di_sisi_Intrinsic<"HEXAGON_S2_packhl">; 4797 // 4798 // BUILTIN_INFO(HEXAGON.A2_swiz,SI_ftype_SI,1) 4799 // 4800 def int_hexagon_A2_swiz : 4801 Hexagon_si_si_Intrinsic<"HEXAGON_A2_swiz">; 4802 // 4803 // BUILTIN_INFO(HEXAGON.S2_vsathub_nopack,DI_ftype_DI,1) 4804 // 4805 def int_hexagon_S2_vsathub_nopack : 4806 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsathub_nopack">; 4807 // 4808 // BUILTIN_INFO(HEXAGON.S2_vsathb_nopack,DI_ftype_DI,1) 4809 // 4810 def int_hexagon_S2_vsathb_nopack : 4811 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsathb_nopack">; 4812 // 4813 // BUILTIN_INFO(HEXAGON.S2_vsatwh_nopack,DI_ftype_DI,1) 4814 // 4815 def int_hexagon_S2_vsatwh_nopack : 4816 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsatwh_nopack">; 4817 // 4818 // BUILTIN_INFO(HEXAGON.S2_vsatwuh_nopack,DI_ftype_DI,1) 4819 // 4820 def int_hexagon_S2_vsatwuh_nopack : 4821 Hexagon_di_di_Intrinsic<"HEXAGON_S2_vsatwuh_nopack">; 4822 // 4823 // BUILTIN_INFO(HEXAGON.S2_shuffob,DI_ftype_DIDI,2) 4824 // 4825 def int_hexagon_S2_shuffob : 4826 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffob">; 4827 // 4828 // BUILTIN_INFO(HEXAGON.S2_shuffeb,DI_ftype_DIDI,2) 4829 // 4830 def int_hexagon_S2_shuffeb : 4831 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffeb">; 4832 // 4833 // BUILTIN_INFO(HEXAGON.S2_shuffoh,DI_ftype_DIDI,2) 4834 // 4835 def int_hexagon_S2_shuffoh : 4836 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffoh">; 4837 // 4838 // BUILTIN_INFO(HEXAGON.S2_shuffeh,DI_ftype_DIDI,2) 4839 // 4840 def int_hexagon_S2_shuffeh : 4841 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_shuffeh">; 4842 // 4843 // BUILTIN_INFO(HEXAGON.S5_popcountp,SI_ftype_DI,1) 4844 // 4845 def int_hexagon_S5_popcountp : 4846 Hexagon_si_di_Intrinsic<"HEXAGON_S5_popcountp">; 4847 // 4848 // BUILTIN_INFO(HEXAGON.S4_parity,SI_ftype_SISI,2) 4849 // 4850 def int_hexagon_S4_parity : 4851 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_parity">; 4852 // 4853 // BUILTIN_INFO(HEXAGON.S2_parityp,SI_ftype_DIDI,2) 4854 // 4855 def int_hexagon_S2_parityp : 4856 Hexagon_si_didi_Intrinsic<"HEXAGON_S2_parityp">; 4857 // 4858 // BUILTIN_INFO(HEXAGON.S2_lfsp,DI_ftype_DIDI,2) 4859 // 4860 def int_hexagon_S2_lfsp : 4861 Hexagon_di_didi_Intrinsic<"HEXAGON_S2_lfsp">; 4862 // 4863 // BUILTIN_INFO(HEXAGON.S2_clbnorm,SI_ftype_SI,1) 4864 // 4865 def int_hexagon_S2_clbnorm : 4866 Hexagon_si_si_Intrinsic<"HEXAGON_S2_clbnorm">; 4867 // 4868 // BUILTIN_INFO(HEXAGON.S4_clbaddi,SI_ftype_SISI,2) 4869 // 4870 def int_hexagon_S4_clbaddi : 4871 Hexagon_si_sisi_Intrinsic<"HEXAGON_S4_clbaddi">; 4872 // 4873 // BUILTIN_INFO(HEXAGON.S4_clbpnorm,SI_ftype_DI,1) 4874 // 4875 def int_hexagon_S4_clbpnorm : 4876 Hexagon_si_di_Intrinsic<"HEXAGON_S4_clbpnorm">; 4877 // 4878 // BUILTIN_INFO(HEXAGON.S4_clbpaddi,SI_ftype_DISI,2) 4879 // 4880 def int_hexagon_S4_clbpaddi : 4881 Hexagon_si_disi_Intrinsic<"HEXAGON_S4_clbpaddi">; 4882 // 4883 // BUILTIN_INFO(HEXAGON.S2_clb,SI_ftype_SI,1) 4884 // 4885 def int_hexagon_S2_clb : 4886 Hexagon_si_si_Intrinsic<"HEXAGON_S2_clb">; 4887 // 4888 // BUILTIN_INFO(HEXAGON.S2_cl0,SI_ftype_SI,1) 4889 // 4890 def int_hexagon_S2_cl0 : 4891 Hexagon_si_si_Intrinsic<"HEXAGON_S2_cl0">; 4892 // 4893 // BUILTIN_INFO(HEXAGON.S2_cl1,SI_ftype_SI,1) 4894 // 4895 def int_hexagon_S2_cl1 : 4896 Hexagon_si_si_Intrinsic<"HEXAGON_S2_cl1">; 4897 // 4898 // BUILTIN_INFO(HEXAGON.S2_clbp,SI_ftype_DI,1) 4899 // 4900 def int_hexagon_S2_clbp : 4901 Hexagon_si_di_Intrinsic<"HEXAGON_S2_clbp">; 4902 // 4903 // BUILTIN_INFO(HEXAGON.S2_cl0p,SI_ftype_DI,1) 4904 // 4905 def int_hexagon_S2_cl0p : 4906 Hexagon_si_di_Intrinsic<"HEXAGON_S2_cl0p">; 4907 // 4908 // BUILTIN_INFO(HEXAGON.S2_cl1p,SI_ftype_DI,1) 4909 // 4910 def int_hexagon_S2_cl1p : 4911 Hexagon_si_di_Intrinsic<"HEXAGON_S2_cl1p">; 4912 // 4913 // BUILTIN_INFO(HEXAGON.S2_brev,SI_ftype_SI,1) 4914 // 4915 def int_hexagon_S2_brev : 4916 Hexagon_si_si_Intrinsic<"HEXAGON_S2_brev">; 4917 // 4918 // BUILTIN_INFO(HEXAGON.S2_brevp,DI_ftype_DI,1) 4919 // 4920 def int_hexagon_S2_brevp : 4921 Hexagon_di_di_Intrinsic<"HEXAGON_S2_brevp">; 4922 // 4923 // BUILTIN_INFO(HEXAGON.S2_ct0,SI_ftype_SI,1) 4924 // 4925 def int_hexagon_S2_ct0 : 4926 Hexagon_si_si_Intrinsic<"HEXAGON_S2_ct0">; 4927 // 4928 // BUILTIN_INFO(HEXAGON.S2_ct1,SI_ftype_SI,1) 4929 // 4930 def int_hexagon_S2_ct1 : 4931 Hexagon_si_si_Intrinsic<"HEXAGON_S2_ct1">; 4932 // 4933 // BUILTIN_INFO(HEXAGON.S2_ct0p,SI_ftype_DI,1) 4934 // 4935 def int_hexagon_S2_ct0p : 4936 Hexagon_si_di_Intrinsic<"HEXAGON_S2_ct0p">; 4937 // 4938 // BUILTIN_INFO(HEXAGON.S2_ct1p,SI_ftype_DI,1) 4939 // 4940 def int_hexagon_S2_ct1p : 4941 Hexagon_si_di_Intrinsic<"HEXAGON_S2_ct1p">; 4942 // 4943 // BUILTIN_INFO(HEXAGON.S2_interleave,DI_ftype_DI,1) 4944 // 4945 def int_hexagon_S2_interleave : 4946 Hexagon_di_di_Intrinsic<"HEXAGON_S2_interleave">; 4947 // 4948 // BUILTIN_INFO(HEXAGON.S2_deinterleave,DI_ftype_DI,1) 4949 // 4950 def int_hexagon_S2_deinterleave : 4951 Hexagon_di_di_Intrinsic<"HEXAGON_S2_deinterleave">; 4952 4953 // 4954 // BUILTIN_INFO(HEXAGON.dcfetch_A,v_ftype_DI*,1) 4955 // 4956 def int_hexagon_prefetch : 4957 Hexagon_Intrinsic<"HEXAGON_prefetch", [], [llvm_ptr_ty], []>; 4958 def int_hexagon_Y2_dccleana : 4959 Hexagon_Intrinsic<"HEXAGON_Y2_dccleana", [], [llvm_ptr_ty], []>; 4960 def int_hexagon_Y2_dccleaninva : 4961 Hexagon_Intrinsic<"HEXAGON_Y2_dccleaninva", [], [llvm_ptr_ty], []>; 4962 def int_hexagon_Y2_dcinva : 4963 Hexagon_Intrinsic<"HEXAGON_Y2_dcinva", [], [llvm_ptr_ty], []>; 4964 def int_hexagon_Y2_dczeroa : 4965 Hexagon_Intrinsic<"HEXAGON_Y2_dczeroa", [], [llvm_ptr_ty], 4966 [IntrWriteMem, IntrArgMemOnly, IntrHasSideEffects]>; 4967 def int_hexagon_Y4_l2fetch : 4968 Hexagon_Intrinsic<"HEXAGON_Y4_l2fetch", [], [llvm_ptr_ty, llvm_i32_ty], []>; 4969 def int_hexagon_Y5_l2fetch : 4970 Hexagon_Intrinsic<"HEXAGON_Y5_l2fetch", [], [llvm_ptr_ty, llvm_i64_ty], []>; 4971 4972 def llvm_ptr32_ty : LLVMPointerType<llvm_i32_ty>; 4973 def llvm_ptr64_ty : LLVMPointerType<llvm_i64_ty>; 4974 4975 // Mark locked loads as read/write to prevent any accidental reordering. 4976 def int_hexagon_L2_loadw_locked : 4977 Hexagon_Intrinsic<"HEXAGON_L2_loadw_locked", [llvm_i32_ty], [llvm_ptr32_ty], 4978 [IntrArgMemOnly, NoCapture<0>]>; 4979 def int_hexagon_L4_loadd_locked : 4980 Hexagon_Intrinsic<"HEXAGON_L4_loadd_locked", [llvm_i64_ty], [llvm_ptr64_ty], 4981 [IntrArgMemOnly, NoCapture<0>]>; 4982 4983 def int_hexagon_S2_storew_locked : 4984 Hexagon_Intrinsic<"HEXAGON_S2_storew_locked", [llvm_i32_ty], 4985 [llvm_ptr32_ty, llvm_i32_ty], [IntrArgMemOnly, NoCapture<0>]>; 4986 def int_hexagon_S4_stored_locked : 4987 Hexagon_Intrinsic<"HEXAGON_S4_stored_locked", [llvm_i32_ty], 4988 [llvm_ptr64_ty, llvm_i64_ty], [IntrArgMemOnly, NoCapture<0>]>; 4989 4990 // V60 4991 4992 class Hexagon_v2048v2048_Intrinsic_T<string GCCIntSuffix> 4993 : Hexagon_Intrinsic<GCCIntSuffix, 4994 [llvm_v64i32_ty], [llvm_v64i32_ty], 4995 [IntrNoMem]>; 4996 4997 // tag : V6_hi_W 4998 // tag : V6_lo_W 4999 class Hexagon_v512v1024_Intrinsic_T<string GCCIntSuffix> 5000 : Hexagon_Intrinsic<GCCIntSuffix, 5001 [llvm_v16i32_ty], [llvm_v32i32_ty], 5002 [IntrNoMem]>; 5003 5004 // tag : V6_hi_W_128B 5005 // tag : V6_lo_W_128B 5006 class Hexagon_v1024v2048_Intrinsic_T<string GCCIntSuffix> 5007 : Hexagon_Intrinsic<GCCIntSuffix, 5008 [llvm_v32i32_ty], [llvm_v64i32_ty], 5009 [IntrNoMem]>; 5010 5011 class Hexagon_v1024v1024_Intrinsic_T<string GCCIntSuffix> 5012 : Hexagon_Intrinsic<GCCIntSuffix, 5013 [llvm_v32i32_ty], [llvm_v32i32_ty], 5014 [IntrNoMem]>; 5015 5016 // BUILTIN_INFO(HEXAGON.V6_hi_W,VI_ftype_VI,1) 5017 // tag : V6_hi 5018 def int_hexagon_V6_hi : 5019 Hexagon_v512v1024_Intrinsic_T<"HEXAGON_V6_hi">; 5020 5021 // BUILTIN_INFO(HEXAGON.V6_lo_W,VI_ftype_VI,1) 5022 // tag : V6_lo 5023 def int_hexagon_V6_lo : 5024 Hexagon_v512v1024_Intrinsic_T<"HEXAGON_V6_lo">; 5025 5026 // BUILTIN_INFO(HEXAGON.V6_hi_W,VI_ftype_VI,1) 5027 // tag : V6_hi_128B 5028 def int_hexagon_V6_hi_128B : 5029 Hexagon_v1024v2048_Intrinsic_T<"HEXAGON_V6_hi_128B">; 5030 5031 // BUILTIN_INFO(HEXAGON.V6_lo_W,VI_ftype_VI,1) 5032 // tag : V6_lo_128B 5033 def int_hexagon_V6_lo_128B : 5034 Hexagon_v1024v2048_Intrinsic_T<"HEXAGON_V6_lo_128B">; 5035 5036 // BUILTIN_INFO(HEXAGON.V6_vassignp,VI_ftype_VI,1) 5037 // tag : V6_vassignp 5038 def int_hexagon_V6_vassignp : 5039 Hexagon_v1024v1024_Intrinsic_T<"HEXAGON_V6_vassignp">; 5040 5041 // BUILTIN_INFO(HEXAGON.V6_vassignp,VI_ftype_VI,1) 5042 // tag : V6_vassignp_128B 5043 def int_hexagon_V6_vassignp_128B : 5044 Hexagon_v2048v2048_Intrinsic_T<"HEXAGON_V6_vassignp_128B">; 5045 5046 5047 5048 // 5049 // Hexagon_iii_Intrinsic<string GCCIntSuffix> 5050 // tag : S6_rol_i_r 5051 class Hexagon_iii_Intrinsic<string GCCIntSuffix> 5052 : Hexagon_Intrinsic<GCCIntSuffix, 5053 [llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty], 5054 [IntrNoMem]>; 5055 5056 // 5057 // Hexagon_LLiLLii_Intrinsic<string GCCIntSuffix> 5058 // tag : S6_rol_i_p 5059 class Hexagon_LLiLLii_Intrinsic<string GCCIntSuffix> 5060 : Hexagon_Intrinsic<GCCIntSuffix, 5061 [llvm_i64_ty], [llvm_i64_ty,llvm_i32_ty], 5062 [IntrNoMem]>; 5063 5064 // 5065 // Hexagon_iiii_Intrinsic<string GCCIntSuffix> 5066 // tag : S6_rol_i_r_acc 5067 class Hexagon_iiii_Intrinsic<string GCCIntSuffix> 5068 : Hexagon_Intrinsic<GCCIntSuffix, 5069 [llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty], 5070 [IntrNoMem]>; 5071 5072 // 5073 // Hexagon_LLiLLiLLii_Intrinsic<string GCCIntSuffix> 5074 // tag : S6_rol_i_p_acc 5075 class Hexagon_LLiLLiLLii_Intrinsic<string GCCIntSuffix> 5076 : Hexagon_Intrinsic<GCCIntSuffix, 5077 [llvm_i64_ty], [llvm_i64_ty,llvm_i64_ty,llvm_i32_ty], 5078 [IntrNoMem]>; 5079 5080 // 5081 // Hexagon_v512v512v512i_Intrinsic<string GCCIntSuffix> 5082 // tag : V6_valignb 5083 class Hexagon_v512v512v512i_Intrinsic<string GCCIntSuffix> 5084 : Hexagon_Intrinsic<GCCIntSuffix, 5085 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5086 [IntrNoMem]>; 5087 5088 // 5089 // Hexagon_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5090 // tag : V6_valignb_128B 5091 class Hexagon_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5092 : Hexagon_Intrinsic<GCCIntSuffix, 5093 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5094 [IntrNoMem]>; 5095 5096 // 5097 // Hexagon_v512v512i_Intrinsic<string GCCIntSuffix> 5098 // tag : V6_vror 5099 class Hexagon_v512v512i_Intrinsic<string GCCIntSuffix> 5100 : Hexagon_Intrinsic<GCCIntSuffix, 5101 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5102 [IntrNoMem]>; 5103 5104 // 5105 // Hexagon_v1024v1024i_Intrinsic<string GCCIntSuffix> 5106 // tag : V6_vror_128B 5107 class Hexagon_v1024v1024i_Intrinsic<string GCCIntSuffix> 5108 : Hexagon_Intrinsic<GCCIntSuffix, 5109 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5110 [IntrNoMem]>; 5111 5112 // 5113 // Hexagon_v1024v512_Intrinsic<string GCCIntSuffix> 5114 // tag : V6_vunpackub 5115 class Hexagon_v1024v512_Intrinsic<string GCCIntSuffix> 5116 : Hexagon_Intrinsic<GCCIntSuffix, 5117 [llvm_v32i32_ty], [llvm_v16i32_ty], 5118 [IntrNoMem]>; 5119 5120 // 5121 // Hexagon_v2048v1024_Intrinsic<string GCCIntSuffix> 5122 // tag : V6_vunpackub_128B 5123 class Hexagon_v2048v1024_Intrinsic<string GCCIntSuffix> 5124 : Hexagon_Intrinsic<GCCIntSuffix, 5125 [llvm_v64i32_ty], [llvm_v32i32_ty], 5126 [IntrNoMem]>; 5127 5128 // 5129 // Hexagon_v1024v1024v512_Intrinsic<string GCCIntSuffix> 5130 // tag : V6_vunpackob 5131 class Hexagon_v1024v1024v512_Intrinsic<string GCCIntSuffix> 5132 : Hexagon_Intrinsic<GCCIntSuffix, 5133 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty], 5134 [IntrNoMem]>; 5135 5136 // 5137 // Hexagon_v2048v2048v1024_Intrinsic<string GCCIntSuffix> 5138 // tag : V6_vunpackob_128B 5139 class Hexagon_v2048v2048v1024_Intrinsic<string GCCIntSuffix> 5140 : Hexagon_Intrinsic<GCCIntSuffix, 5141 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty], 5142 [IntrNoMem]>; 5143 5144 // 5145 // Hexagon_v512v512v512_Intrinsic<string GCCIntSuffix> 5146 // tag : V6_vpackeb 5147 class Hexagon_v512v512v512_Intrinsic<string GCCIntSuffix> 5148 : Hexagon_Intrinsic<GCCIntSuffix, 5149 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5150 [IntrNoMem]>; 5151 5152 // 5153 // Hexagon_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5154 // tag : V6_vpackeb_128B 5155 class Hexagon_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5156 : Hexagon_Intrinsic<GCCIntSuffix, 5157 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5158 [IntrNoMem]>; 5159 5160 // 5161 // Hexagon_v2048v2048i_Intrinsic<string GCCIntSuffix> 5162 // tag : V6_vdmpybus_dv_128B 5163 class Hexagon_v2048v2048i_Intrinsic<string GCCIntSuffix> 5164 : Hexagon_Intrinsic<GCCIntSuffix, 5165 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 5166 [IntrNoMem]>; 5167 5168 // 5169 // Hexagon_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 5170 // tag : V6_vdmpybus_dv_acc_128B 5171 class Hexagon_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 5172 : Hexagon_Intrinsic<GCCIntSuffix, 5173 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty], 5174 [IntrNoMem]>; 5175 5176 // 5177 // Hexagon_v512v512v512v512_Intrinsic<string GCCIntSuffix> 5178 // tag : V6_vdmpyhvsat_acc 5179 class Hexagon_v512v512v512v512_Intrinsic<string GCCIntSuffix> 5180 : Hexagon_Intrinsic<GCCIntSuffix, 5181 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5182 [IntrNoMem]>; 5183 5184 // 5185 // Hexagon_v1024v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5186 // tag : V6_vdmpyhvsat_acc_128B 5187 class Hexagon_v1024v1024v1024v1024_Intrinsic<string GCCIntSuffix> 5188 : Hexagon_Intrinsic<GCCIntSuffix, 5189 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5190 [IntrNoMem]>; 5191 5192 // 5193 // Hexagon_v512v1024i_Intrinsic<string GCCIntSuffix> 5194 // tag : V6_vdmpyhisat 5195 class Hexagon_v512v1024i_Intrinsic<string GCCIntSuffix> 5196 : Hexagon_Intrinsic<GCCIntSuffix, 5197 [llvm_v16i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5198 [IntrNoMem]>; 5199 5200 // 5201 // Hexagon_v1024v2048i_Intrinsic<string GCCIntSuffix> 5202 // tag : V6_vdmpyhisat_128B 5203 class Hexagon_v1024v2048i_Intrinsic<string GCCIntSuffix> 5204 : Hexagon_Intrinsic<GCCIntSuffix, 5205 [llvm_v32i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 5206 [IntrNoMem]>; 5207 5208 // 5209 // Hexagon_v512v512v1024i_Intrinsic<string GCCIntSuffix> 5210 // tag : V6_vdmpyhisat_acc 5211 class Hexagon_v512v512v1024i_Intrinsic<string GCCIntSuffix> 5212 : Hexagon_Intrinsic<GCCIntSuffix, 5213 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5214 [IntrNoMem]>; 5215 5216 // 5217 // Hexagon_v1024v1024v2048i_Intrinsic<string GCCIntSuffix> 5218 // tag : V6_vdmpyhisat_acc_128B 5219 class Hexagon_v1024v1024v2048i_Intrinsic<string GCCIntSuffix> 5220 : Hexagon_Intrinsic<GCCIntSuffix, 5221 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v64i32_ty,llvm_i32_ty], 5222 [IntrNoMem]>; 5223 5224 // 5225 // Hexagon_v1024v1024ii_Intrinsic<string GCCIntSuffix> 5226 // tag : V6_vrmpyubi 5227 class Hexagon_v1024v1024ii_Intrinsic<string GCCIntSuffix> 5228 : Hexagon_Intrinsic<GCCIntSuffix, 5229 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty,llvm_i32_ty], 5230 [IntrNoMem]>; 5231 5232 // 5233 // Hexagon_v2048v2048ii_Intrinsic<string GCCIntSuffix> 5234 // tag : V6_vrmpyubi_128B 5235 class Hexagon_v2048v2048ii_Intrinsic<string GCCIntSuffix> 5236 : Hexagon_Intrinsic<GCCIntSuffix, 5237 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty,llvm_i32_ty], 5238 [IntrNoMem]>; 5239 5240 // 5241 // Hexagon_v1024v1024v1024ii_Intrinsic<string GCCIntSuffix> 5242 // tag : V6_vrmpyubi_acc 5243 class Hexagon_v1024v1024v1024ii_Intrinsic<string GCCIntSuffix> 5244 : Hexagon_Intrinsic<GCCIntSuffix, 5245 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty,llvm_i32_ty], 5246 [IntrNoMem]>; 5247 5248 // 5249 // Hexagon_v2048v2048v2048ii_Intrinsic<string GCCIntSuffix> 5250 // tag : V6_vrmpyubi_acc_128B 5251 class Hexagon_v2048v2048v2048ii_Intrinsic<string GCCIntSuffix> 5252 : Hexagon_Intrinsic<GCCIntSuffix, 5253 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty,llvm_i32_ty], 5254 [IntrNoMem]>; 5255 5256 // 5257 // Hexagon_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 5258 // tag : V6_vaddb_dv_128B 5259 class Hexagon_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 5260 : Hexagon_Intrinsic<GCCIntSuffix, 5261 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty], 5262 [IntrNoMem]>; 5263 5264 // 5265 // Hexagon_v1024v512v512_Intrinsic<string GCCIntSuffix> 5266 // tag : V6_vaddubh 5267 class Hexagon_v1024v512v512_Intrinsic<string GCCIntSuffix> 5268 : Hexagon_Intrinsic<GCCIntSuffix, 5269 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5270 [IntrNoMem]>; 5271 5272 // 5273 // Hexagon_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5274 // tag : V6_vaddubh_128B 5275 class Hexagon_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5276 : Hexagon_Intrinsic<GCCIntSuffix, 5277 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5278 [IntrNoMem]>; 5279 5280 // 5281 // Hexagon_v512_Intrinsic<string GCCIntSuffix> 5282 // tag : V6_vd0 5283 class Hexagon_v512_Intrinsic<string GCCIntSuffix> 5284 : Hexagon_Intrinsic<GCCIntSuffix, 5285 [llvm_v16i32_ty], [], 5286 [IntrNoMem]>; 5287 5288 // 5289 // Hexagon_v1024_Intrinsic<string GCCIntSuffix> 5290 // tag : V6_vd0_128B 5291 class Hexagon_v1024_Intrinsic<string GCCIntSuffix> 5292 : Hexagon_Intrinsic<GCCIntSuffix, 5293 [llvm_v32i32_ty], [], 5294 [IntrNoMem]>; 5295 5296 // 5297 // Hexagon_v512v64iv512v512_Intrinsic<string GCCIntSuffix> 5298 // tag : V6_vaddbq 5299 class Hexagon_v512v64iv512v512_Intrinsic<string GCCIntSuffix> 5300 : Hexagon_Intrinsic<GCCIntSuffix, 5301 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5302 [IntrNoMem]>; 5303 5304 // 5305 // Hexagon_v1024v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5306 // tag : V6_vaddbq_128B 5307 class Hexagon_v1024v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5308 : Hexagon_Intrinsic<GCCIntSuffix, 5309 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5310 [IntrNoMem]>; 5311 5312 // 5313 // Hexagon_v512v512_Intrinsic<string GCCIntSuffix> 5314 // tag : V6_vabsh 5315 class Hexagon_v512v512_Intrinsic<string GCCIntSuffix> 5316 : Hexagon_Intrinsic<GCCIntSuffix, 5317 [llvm_v16i32_ty], [llvm_v16i32_ty], 5318 [IntrNoMem]>; 5319 5320 // 5321 // Hexagon_v1024v1024_Intrinsic<string GCCIntSuffix> 5322 // tag : V6_vabsh_128B 5323 class Hexagon_v1024v1024_Intrinsic<string GCCIntSuffix> 5324 : Hexagon_Intrinsic<GCCIntSuffix, 5325 [llvm_v32i32_ty], [llvm_v32i32_ty], 5326 [IntrNoMem]>; 5327 5328 // 5329 // Hexagon_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 5330 // tag : V6_vmpybv_acc 5331 class Hexagon_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 5332 : Hexagon_Intrinsic<GCCIntSuffix, 5333 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5334 [IntrNoMem]>; 5335 5336 // 5337 // Hexagon_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5338 // tag : V6_vmpybv_acc_128B 5339 class Hexagon_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 5340 : Hexagon_Intrinsic<GCCIntSuffix, 5341 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5342 [IntrNoMem]>; 5343 5344 // 5345 // Hexagon_v1024v512i_Intrinsic<string GCCIntSuffix> 5346 // tag : V6_vmpyub 5347 class Hexagon_v1024v512i_Intrinsic<string GCCIntSuffix> 5348 : Hexagon_Intrinsic<GCCIntSuffix, 5349 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5350 [IntrNoMem]>; 5351 5352 // 5353 // Hexagon_v2048v1024i_Intrinsic<string GCCIntSuffix> 5354 // tag : V6_vmpyub_128B 5355 class Hexagon_v2048v1024i_Intrinsic<string GCCIntSuffix> 5356 : Hexagon_Intrinsic<GCCIntSuffix, 5357 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5358 [IntrNoMem]>; 5359 5360 // 5361 // Hexagon_v1024v1024v512i_Intrinsic<string GCCIntSuffix> 5362 // tag : V6_vmpyub_acc 5363 class Hexagon_v1024v1024v512i_Intrinsic<string GCCIntSuffix> 5364 : Hexagon_Intrinsic<GCCIntSuffix, 5365 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5366 [IntrNoMem]>; 5367 5368 // 5369 // Hexagon_v2048v2048v1024i_Intrinsic<string GCCIntSuffix> 5370 // tag : V6_vmpyub_acc_128B 5371 class Hexagon_v2048v2048v1024i_Intrinsic<string GCCIntSuffix> 5372 : Hexagon_Intrinsic<GCCIntSuffix, 5373 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5374 [IntrNoMem]>; 5375 5376 // 5377 // Hexagon_v512v64ii_Intrinsic<string GCCIntSuffix> 5378 // tag : V6_vandqrt 5379 class Hexagon_v512v64ii_Intrinsic<string GCCIntSuffix> 5380 : Hexagon_Intrinsic<GCCIntSuffix, 5381 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_i32_ty], 5382 [IntrNoMem]>; 5383 5384 // 5385 // Hexagon_v1024v128ii_Intrinsic<string GCCIntSuffix> 5386 // tag : V6_vandqrt_128B 5387 class Hexagon_v1024v128ii_Intrinsic<string GCCIntSuffix> 5388 : Hexagon_Intrinsic<GCCIntSuffix, 5389 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_i32_ty], 5390 [IntrNoMem]>; 5391 5392 // 5393 // Hexagon_v512v512v64ii_Intrinsic<string GCCIntSuffix> 5394 // tag : V6_vandqrt_acc 5395 class Hexagon_v512v512v64ii_Intrinsic<string GCCIntSuffix> 5396 : Hexagon_Intrinsic<GCCIntSuffix, 5397 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v512i1_ty,llvm_i32_ty], 5398 [IntrNoMem]>; 5399 5400 // 5401 // Hexagon_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 5402 // tag : V6_vandqrt_acc_128B 5403 class Hexagon_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 5404 : Hexagon_Intrinsic<GCCIntSuffix, 5405 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v1024i1_ty,llvm_i32_ty], 5406 [IntrNoMem]>; 5407 5408 // 5409 // Hexagon_v64iv512i_Intrinsic<string GCCIntSuffix> 5410 // tag : V6_vandvrt 5411 class Hexagon_v64iv512i_Intrinsic<string GCCIntSuffix> 5412 : Hexagon_Intrinsic<GCCIntSuffix, 5413 [llvm_v512i1_ty], [llvm_v16i32_ty,llvm_i32_ty], 5414 [IntrNoMem]>; 5415 5416 // 5417 // Hexagon_v128iv1024i_Intrinsic<string GCCIntSuffix> 5418 // tag : V6_vandvrt_128B 5419 class Hexagon_v128iv1024i_Intrinsic<string GCCIntSuffix> 5420 : Hexagon_Intrinsic<GCCIntSuffix, 5421 [llvm_v1024i1_ty], [llvm_v32i32_ty,llvm_i32_ty], 5422 [IntrNoMem]>; 5423 5424 // 5425 // Hexagon_v64iv64iv512i_Intrinsic<string GCCIntSuffix> 5426 // tag : V6_vandvrt_acc 5427 class Hexagon_v64iv64iv512i_Intrinsic<string GCCIntSuffix> 5428 : Hexagon_Intrinsic<GCCIntSuffix, 5429 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_i32_ty], 5430 [IntrNoMem]>; 5431 5432 // 5433 // Hexagon_v128iv128iv1024i_Intrinsic<string GCCIntSuffix> 5434 // tag : V6_vandvrt_acc_128B 5435 class Hexagon_v128iv128iv1024i_Intrinsic<string GCCIntSuffix> 5436 : Hexagon_Intrinsic<GCCIntSuffix, 5437 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_i32_ty], 5438 [IntrNoMem]>; 5439 5440 // 5441 // Hexagon_v64iv512v512_Intrinsic<string GCCIntSuffix> 5442 // tag : V6_vgtw 5443 class Hexagon_v64iv512v512_Intrinsic<string GCCIntSuffix> 5444 : Hexagon_Intrinsic<GCCIntSuffix, 5445 [llvm_v512i1_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 5446 [IntrNoMem]>; 5447 5448 // 5449 // Hexagon_v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5450 // tag : V6_vgtw_128B 5451 class Hexagon_v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5452 : Hexagon_Intrinsic<GCCIntSuffix, 5453 [llvm_v1024i1_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 5454 [IntrNoMem]>; 5455 5456 // 5457 // Hexagon_v64iv64iv512v512_Intrinsic<string GCCIntSuffix> 5458 // tag : V6_vgtw_and 5459 class Hexagon_v64iv64iv512v512_Intrinsic<string GCCIntSuffix> 5460 : Hexagon_Intrinsic<GCCIntSuffix, 5461 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5462 [IntrNoMem]>; 5463 5464 // 5465 // Hexagon_v128iv128iv1024v1024_Intrinsic<string GCCIntSuffix> 5466 // tag : V6_vgtw_and_128B 5467 class Hexagon_v128iv128iv1024v1024_Intrinsic<string GCCIntSuffix> 5468 : Hexagon_Intrinsic<GCCIntSuffix, 5469 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5470 [IntrNoMem]>; 5471 5472 // 5473 // Hexagon_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 5474 // tag : V6_pred_or 5475 class Hexagon_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 5476 : Hexagon_Intrinsic<GCCIntSuffix, 5477 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v512i1_ty], 5478 [IntrNoMem]>; 5479 5480 // 5481 // Hexagon_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 5482 // tag : V6_pred_or_128B 5483 class Hexagon_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 5484 : Hexagon_Intrinsic<GCCIntSuffix, 5485 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v1024i1_ty], 5486 [IntrNoMem]>; 5487 5488 // 5489 // Hexagon_v64iv64i_Intrinsic<string GCCIntSuffix> 5490 // tag : V6_pred_not 5491 class Hexagon_v64iv64i_Intrinsic<string GCCIntSuffix> 5492 : Hexagon_Intrinsic<GCCIntSuffix, 5493 [llvm_v512i1_ty], [llvm_v512i1_ty], 5494 [IntrNoMem]>; 5495 5496 // 5497 // Hexagon_v128iv128i_Intrinsic<string GCCIntSuffix> 5498 // tag : V6_pred_not_128B 5499 class Hexagon_v128iv128i_Intrinsic<string GCCIntSuffix> 5500 : Hexagon_Intrinsic<GCCIntSuffix, 5501 [llvm_v1024i1_ty], [llvm_v1024i1_ty], 5502 [IntrNoMem]>; 5503 5504 // 5505 // Hexagon_v64ii_Intrinsic<string GCCIntSuffix> 5506 // tag : V6_pred_scalar2 5507 class Hexagon_v64ii_Intrinsic<string GCCIntSuffix> 5508 : Hexagon_Intrinsic<GCCIntSuffix, 5509 [llvm_v512i1_ty], [llvm_i32_ty], 5510 [IntrNoMem]>; 5511 5512 // 5513 // Hexagon_v128ii_Intrinsic<string GCCIntSuffix> 5514 // tag : V6_pred_scalar2_128B 5515 class Hexagon_v128ii_Intrinsic<string GCCIntSuffix> 5516 : Hexagon_Intrinsic<GCCIntSuffix, 5517 [llvm_v1024i1_ty], [llvm_i32_ty], 5518 [IntrNoMem]>; 5519 5520 // 5521 // Hexagon_v1024v64iv512v512_Intrinsic<string GCCIntSuffix> 5522 // tag : V6_vswap 5523 class Hexagon_v1024v64iv512v512_Intrinsic<string GCCIntSuffix> 5524 : Hexagon_Intrinsic<GCCIntSuffix, 5525 [llvm_v32i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty,llvm_v16i32_ty], 5526 [IntrNoMem]>; 5527 5528 // 5529 // Hexagon_v2048v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5530 // tag : V6_vswap_128B 5531 class Hexagon_v2048v128iv1024v1024_Intrinsic<string GCCIntSuffix> 5532 : Hexagon_Intrinsic<GCCIntSuffix, 5533 [llvm_v64i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty,llvm_v32i32_ty], 5534 [IntrNoMem]>; 5535 5536 // 5537 // Hexagon_v1024v512v512i_Intrinsic<string GCCIntSuffix> 5538 // tag : V6_vshuffvdd 5539 class Hexagon_v1024v512v512i_Intrinsic<string GCCIntSuffix> 5540 : Hexagon_Intrinsic<GCCIntSuffix, 5541 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5542 [IntrNoMem]>; 5543 5544 // 5545 // Hexagon_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5546 // tag : V6_vshuffvdd_128B 5547 class Hexagon_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5548 : Hexagon_Intrinsic<GCCIntSuffix, 5549 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5550 [IntrNoMem]>; 5551 5552 5553 // 5554 // Hexagon_iv512i_Intrinsic<string GCCIntSuffix> 5555 // tag : V6_extractw 5556 class Hexagon_iv512i_Intrinsic<string GCCIntSuffix> 5557 : Hexagon_Intrinsic<GCCIntSuffix, 5558 [llvm_i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 5559 [IntrNoMem]>; 5560 5561 // 5562 // Hexagon_iv1024i_Intrinsic<string GCCIntSuffix> 5563 // tag : V6_extractw_128B 5564 class Hexagon_iv1024i_Intrinsic<string GCCIntSuffix> 5565 : Hexagon_Intrinsic<GCCIntSuffix, 5566 [llvm_i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 5567 [IntrNoMem]>; 5568 5569 // 5570 // Hexagon_v512i_Intrinsic<string GCCIntSuffix> 5571 // tag : V6_lvsplatw 5572 class Hexagon_v512i_Intrinsic<string GCCIntSuffix> 5573 : Hexagon_Intrinsic<GCCIntSuffix, 5574 [llvm_v16i32_ty], [llvm_i32_ty], 5575 [IntrNoMem]>; 5576 5577 // 5578 // Hexagon_v1024i_Intrinsic<string GCCIntSuffix> 5579 // tag : V6_lvsplatw_128B 5580 class Hexagon_v1024i_Intrinsic<string GCCIntSuffix> 5581 : Hexagon_Intrinsic<GCCIntSuffix, 5582 [llvm_v32i32_ty], [llvm_i32_ty], 5583 [IntrNoMem]>; 5584 5585 // 5586 // Hexagon_v512v512LLii_Intrinsic<string GCCIntSuffix> 5587 // tag : V6_vlutb 5588 class Hexagon_v512v512LLii_Intrinsic<string GCCIntSuffix> 5589 : Hexagon_Intrinsic<GCCIntSuffix, 5590 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i64_ty,llvm_i32_ty], 5591 [IntrNoMem]>; 5592 5593 // 5594 // Hexagon_v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5595 // tag : V6_vlutb_128B 5596 class Hexagon_v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5597 : Hexagon_Intrinsic<GCCIntSuffix, 5598 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i64_ty,llvm_i32_ty], 5599 [IntrNoMem]>; 5600 5601 // 5602 // Hexagon_v512v512v512LLii_Intrinsic<string GCCIntSuffix> 5603 // tag : V6_vlutb_acc 5604 class Hexagon_v512v512v512LLii_Intrinsic<string GCCIntSuffix> 5605 : Hexagon_Intrinsic<GCCIntSuffix, 5606 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i64_ty,llvm_i32_ty], 5607 [IntrNoMem]>; 5608 5609 // 5610 // Hexagon_v1024v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5611 // tag : V6_vlutb_acc_128B 5612 class Hexagon_v1024v1024v1024LLii_Intrinsic<string GCCIntSuffix> 5613 : Hexagon_Intrinsic<GCCIntSuffix, 5614 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i64_ty,llvm_i32_ty], 5615 [IntrNoMem]>; 5616 5617 // 5618 // Hexagon_v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5619 // tag : V6_vlutb_dv_128B 5620 class Hexagon_v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5621 : Hexagon_Intrinsic<GCCIntSuffix, 5622 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i64_ty,llvm_i32_ty], 5623 [IntrNoMem]>; 5624 5625 // 5626 // Hexagon_v2048v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5627 // tag : V6_vlutb_dv_acc_128B 5628 class Hexagon_v2048v2048v2048LLii_Intrinsic<string GCCIntSuffix> 5629 : Hexagon_Intrinsic<GCCIntSuffix, 5630 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i64_ty,llvm_i32_ty], 5631 [IntrNoMem]>; 5632 5633 // 5634 // Hexagon_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 5635 // tag : V6_vlutvvb_oracc 5636 class Hexagon_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 5637 : Hexagon_Intrinsic<GCCIntSuffix, 5638 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5639 [IntrNoMem]>; 5640 5641 // 5642 // Hexagon_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5643 // tag : V6_vlutvvb_oracc_128B 5644 class Hexagon_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 5645 : Hexagon_Intrinsic<GCCIntSuffix, 5646 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5647 [IntrNoMem]>; 5648 5649 // 5650 // Hexagon_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 5651 // tag : V6_vlutvwh_oracc 5652 class Hexagon_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 5653 : Hexagon_Intrinsic<GCCIntSuffix, 5654 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 5655 [IntrNoMem]>; 5656 5657 // 5658 // Hexagon_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5659 // tag : V6_vlutvwh_oracc_128B 5660 class Hexagon_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 5661 : Hexagon_Intrinsic<GCCIntSuffix, 5662 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 5663 [IntrNoMem]>; 5664 5665 // 5666 // Hexagon_vv64ivmemv512_Intrinsic<string GCCIntSuffix> 5667 // tag: V6_vS32b_qpred_ai 5668 class Hexagon_vv64ivmemv512_Intrinsic<string GCCIntSuffix> 5669 : Hexagon_Intrinsic<GCCIntSuffix, 5670 [], [llvm_v512i1_ty,llvm_ptr_ty,llvm_v16i32_ty], 5671 [IntrArgMemOnly]>; 5672 5673 // 5674 // Hexagon_vv128ivmemv1024_Intrinsic<string GCCIntSuffix> 5675 // tag: V6_vS32b_qpred_ai_128B 5676 class Hexagon_vv128ivmemv1024_Intrinsic<string GCCIntSuffix> 5677 : Hexagon_Intrinsic<GCCIntSuffix, 5678 [], [llvm_v1024i1_ty,llvm_ptr_ty,llvm_v32i32_ty], 5679 [IntrArgMemOnly]>; 5680 5681 // 5682 // BUILTIN_INFO(HEXAGON.S6_rol_i_r,SI_ftype_SISI,2) 5683 // tag : S6_rol_i_r 5684 def int_hexagon_S6_rol_i_r : 5685 Hexagon_iii_Intrinsic<"HEXAGON_S6_rol_i_r">; 5686 5687 // 5688 // BUILTIN_INFO(HEXAGON.S6_rol_i_p,DI_ftype_DISI,2) 5689 // tag : S6_rol_i_p 5690 def int_hexagon_S6_rol_i_p : 5691 Hexagon_LLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p">; 5692 5693 // 5694 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_acc,SI_ftype_SISISI,3) 5695 // tag : S6_rol_i_r_acc 5696 def int_hexagon_S6_rol_i_r_acc : 5697 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_acc">; 5698 5699 // 5700 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_acc,DI_ftype_DIDISI,3) 5701 // tag : S6_rol_i_p_acc 5702 def int_hexagon_S6_rol_i_p_acc : 5703 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_acc">; 5704 5705 // 5706 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_nac,SI_ftype_SISISI,3) 5707 // tag : S6_rol_i_r_nac 5708 def int_hexagon_S6_rol_i_r_nac : 5709 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_nac">; 5710 5711 // 5712 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_nac,DI_ftype_DIDISI,3) 5713 // tag : S6_rol_i_p_nac 5714 def int_hexagon_S6_rol_i_p_nac : 5715 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_nac">; 5716 5717 // 5718 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_xacc,SI_ftype_SISISI,3) 5719 // tag : S6_rol_i_r_xacc 5720 def int_hexagon_S6_rol_i_r_xacc : 5721 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_xacc">; 5722 5723 // 5724 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_xacc,DI_ftype_DIDISI,3) 5725 // tag : S6_rol_i_p_xacc 5726 def int_hexagon_S6_rol_i_p_xacc : 5727 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_xacc">; 5728 5729 // 5730 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_and,SI_ftype_SISISI,3) 5731 // tag : S6_rol_i_r_and 5732 def int_hexagon_S6_rol_i_r_and : 5733 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_and">; 5734 5735 // 5736 // BUILTIN_INFO(HEXAGON.S6_rol_i_r_or,SI_ftype_SISISI,3) 5737 // tag : S6_rol_i_r_or 5738 def int_hexagon_S6_rol_i_r_or : 5739 Hexagon_iiii_Intrinsic<"HEXAGON_S6_rol_i_r_or">; 5740 5741 // 5742 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_and,DI_ftype_DIDISI,3) 5743 // tag : S6_rol_i_p_and 5744 def int_hexagon_S6_rol_i_p_and : 5745 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_and">; 5746 5747 // 5748 // BUILTIN_INFO(HEXAGON.S6_rol_i_p_or,DI_ftype_DIDISI,3) 5749 // tag : S6_rol_i_p_or 5750 def int_hexagon_S6_rol_i_p_or : 5751 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S6_rol_i_p_or">; 5752 5753 // 5754 // BUILTIN_INFO(HEXAGON.S2_cabacencbin,DI_ftype_DIDIQI,3) 5755 // tag : S2_cabacencbin 5756 def int_hexagon_S2_cabacencbin : 5757 Hexagon_LLiLLiLLii_Intrinsic<"HEXAGON_S2_cabacencbin">; 5758 5759 // 5760 // BUILTIN_INFO(HEXAGON.V6_valignb,VI_ftype_VIVISI,3) 5761 // tag : V6_valignb 5762 def int_hexagon_V6_valignb : 5763 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_valignb">; 5764 5765 // 5766 // BUILTIN_INFO(HEXAGON.V6_valignb_128B,VI_ftype_VIVISI,3) 5767 // tag : V6_valignb_128B 5768 def int_hexagon_V6_valignb_128B : 5769 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_valignb_128B">; 5770 5771 // 5772 // BUILTIN_INFO(HEXAGON.V6_vlalignb,VI_ftype_VIVISI,3) 5773 // tag : V6_vlalignb 5774 def int_hexagon_V6_vlalignb : 5775 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlalignb">; 5776 5777 // 5778 // BUILTIN_INFO(HEXAGON.V6_vlalignb_128B,VI_ftype_VIVISI,3) 5779 // tag : V6_vlalignb_128B 5780 def int_hexagon_V6_vlalignb_128B : 5781 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlalignb_128B">; 5782 5783 // 5784 // BUILTIN_INFO(HEXAGON.V6_valignbi,VI_ftype_VIVISI,3) 5785 // tag : V6_valignbi 5786 def int_hexagon_V6_valignbi : 5787 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_valignbi">; 5788 5789 // 5790 // BUILTIN_INFO(HEXAGON.V6_valignbi_128B,VI_ftype_VIVISI,3) 5791 // tag : V6_valignbi_128B 5792 def int_hexagon_V6_valignbi_128B : 5793 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_valignbi_128B">; 5794 5795 // 5796 // BUILTIN_INFO(HEXAGON.V6_vlalignbi,VI_ftype_VIVISI,3) 5797 // tag : V6_vlalignbi 5798 def int_hexagon_V6_vlalignbi : 5799 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlalignbi">; 5800 5801 // 5802 // BUILTIN_INFO(HEXAGON.V6_vlalignbi_128B,VI_ftype_VIVISI,3) 5803 // tag : V6_vlalignbi_128B 5804 def int_hexagon_V6_vlalignbi_128B : 5805 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlalignbi_128B">; 5806 5807 // 5808 // BUILTIN_INFO(HEXAGON.V6_vror,VI_ftype_VISI,2) 5809 // tag : V6_vror 5810 def int_hexagon_V6_vror : 5811 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vror">; 5812 5813 // 5814 // BUILTIN_INFO(HEXAGON.V6_vror_128B,VI_ftype_VISI,2) 5815 // tag : V6_vror_128B 5816 def int_hexagon_V6_vror_128B : 5817 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vror_128B">; 5818 5819 // 5820 // BUILTIN_INFO(HEXAGON.V6_vunpackub,VD_ftype_VI,1) 5821 // tag : V6_vunpackub 5822 def int_hexagon_V6_vunpackub : 5823 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackub">; 5824 5825 // 5826 // BUILTIN_INFO(HEXAGON.V6_vunpackub_128B,VD_ftype_VI,1) 5827 // tag : V6_vunpackub_128B 5828 def int_hexagon_V6_vunpackub_128B : 5829 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackub_128B">; 5830 5831 // 5832 // BUILTIN_INFO(HEXAGON.V6_vunpackb,VD_ftype_VI,1) 5833 // tag : V6_vunpackb 5834 def int_hexagon_V6_vunpackb : 5835 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackb">; 5836 5837 // 5838 // BUILTIN_INFO(HEXAGON.V6_vunpackb_128B,VD_ftype_VI,1) 5839 // tag : V6_vunpackb_128B 5840 def int_hexagon_V6_vunpackb_128B : 5841 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackb_128B">; 5842 5843 // 5844 // BUILTIN_INFO(HEXAGON.V6_vunpackuh,VD_ftype_VI,1) 5845 // tag : V6_vunpackuh 5846 def int_hexagon_V6_vunpackuh : 5847 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackuh">; 5848 5849 // 5850 // BUILTIN_INFO(HEXAGON.V6_vunpackuh_128B,VD_ftype_VI,1) 5851 // tag : V6_vunpackuh_128B 5852 def int_hexagon_V6_vunpackuh_128B : 5853 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackuh_128B">; 5854 5855 // 5856 // BUILTIN_INFO(HEXAGON.V6_vunpackh,VD_ftype_VI,1) 5857 // tag : V6_vunpackh 5858 def int_hexagon_V6_vunpackh : 5859 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vunpackh">; 5860 5861 // 5862 // BUILTIN_INFO(HEXAGON.V6_vunpackh_128B,VD_ftype_VI,1) 5863 // tag : V6_vunpackh_128B 5864 def int_hexagon_V6_vunpackh_128B : 5865 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vunpackh_128B">; 5866 5867 // 5868 // BUILTIN_INFO(HEXAGON.V6_vunpackob,VD_ftype_VDVI,2) 5869 // tag : V6_vunpackob 5870 def int_hexagon_V6_vunpackob : 5871 Hexagon_v1024v1024v512_Intrinsic<"HEXAGON_V6_vunpackob">; 5872 5873 // 5874 // BUILTIN_INFO(HEXAGON.V6_vunpackob_128B,VD_ftype_VDVI,2) 5875 // tag : V6_vunpackob_128B 5876 def int_hexagon_V6_vunpackob_128B : 5877 Hexagon_v2048v2048v1024_Intrinsic<"HEXAGON_V6_vunpackob_128B">; 5878 5879 // 5880 // BUILTIN_INFO(HEXAGON.V6_vunpackoh,VD_ftype_VDVI,2) 5881 // tag : V6_vunpackoh 5882 def int_hexagon_V6_vunpackoh : 5883 Hexagon_v1024v1024v512_Intrinsic<"HEXAGON_V6_vunpackoh">; 5884 5885 // 5886 // BUILTIN_INFO(HEXAGON.V6_vunpackoh_128B,VD_ftype_VDVI,2) 5887 // tag : V6_vunpackoh_128B 5888 def int_hexagon_V6_vunpackoh_128B : 5889 Hexagon_v2048v2048v1024_Intrinsic<"HEXAGON_V6_vunpackoh_128B">; 5890 5891 // 5892 // BUILTIN_INFO(HEXAGON.V6_vpackeb,VI_ftype_VIVI,2) 5893 // tag : V6_vpackeb 5894 def int_hexagon_V6_vpackeb : 5895 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackeb">; 5896 5897 // 5898 // BUILTIN_INFO(HEXAGON.V6_vpackeb_128B,VI_ftype_VIVI,2) 5899 // tag : V6_vpackeb_128B 5900 def int_hexagon_V6_vpackeb_128B : 5901 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackeb_128B">; 5902 5903 // 5904 // BUILTIN_INFO(HEXAGON.V6_vpackeh,VI_ftype_VIVI,2) 5905 // tag : V6_vpackeh 5906 def int_hexagon_V6_vpackeh : 5907 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackeh">; 5908 5909 // 5910 // BUILTIN_INFO(HEXAGON.V6_vpackeh_128B,VI_ftype_VIVI,2) 5911 // tag : V6_vpackeh_128B 5912 def int_hexagon_V6_vpackeh_128B : 5913 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackeh_128B">; 5914 5915 // 5916 // BUILTIN_INFO(HEXAGON.V6_vpackob,VI_ftype_VIVI,2) 5917 // tag : V6_vpackob 5918 def int_hexagon_V6_vpackob : 5919 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackob">; 5920 5921 // 5922 // BUILTIN_INFO(HEXAGON.V6_vpackob_128B,VI_ftype_VIVI,2) 5923 // tag : V6_vpackob_128B 5924 def int_hexagon_V6_vpackob_128B : 5925 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackob_128B">; 5926 5927 // 5928 // BUILTIN_INFO(HEXAGON.V6_vpackoh,VI_ftype_VIVI,2) 5929 // tag : V6_vpackoh 5930 def int_hexagon_V6_vpackoh : 5931 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackoh">; 5932 5933 // 5934 // BUILTIN_INFO(HEXAGON.V6_vpackoh_128B,VI_ftype_VIVI,2) 5935 // tag : V6_vpackoh_128B 5936 def int_hexagon_V6_vpackoh_128B : 5937 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackoh_128B">; 5938 5939 // 5940 // BUILTIN_INFO(HEXAGON.V6_vpackhub_sat,VI_ftype_VIVI,2) 5941 // tag : V6_vpackhub_sat 5942 def int_hexagon_V6_vpackhub_sat : 5943 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackhub_sat">; 5944 5945 // 5946 // BUILTIN_INFO(HEXAGON.V6_vpackhub_sat_128B,VI_ftype_VIVI,2) 5947 // tag : V6_vpackhub_sat_128B 5948 def int_hexagon_V6_vpackhub_sat_128B : 5949 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackhub_sat_128B">; 5950 5951 // 5952 // BUILTIN_INFO(HEXAGON.V6_vpackhb_sat,VI_ftype_VIVI,2) 5953 // tag : V6_vpackhb_sat 5954 def int_hexagon_V6_vpackhb_sat : 5955 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackhb_sat">; 5956 5957 // 5958 // BUILTIN_INFO(HEXAGON.V6_vpackhb_sat_128B,VI_ftype_VIVI,2) 5959 // tag : V6_vpackhb_sat_128B 5960 def int_hexagon_V6_vpackhb_sat_128B : 5961 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackhb_sat_128B">; 5962 5963 // 5964 // BUILTIN_INFO(HEXAGON.V6_vpackwuh_sat,VI_ftype_VIVI,2) 5965 // tag : V6_vpackwuh_sat 5966 def int_hexagon_V6_vpackwuh_sat : 5967 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackwuh_sat">; 5968 5969 // 5970 // BUILTIN_INFO(HEXAGON.V6_vpackwuh_sat_128B,VI_ftype_VIVI,2) 5971 // tag : V6_vpackwuh_sat_128B 5972 def int_hexagon_V6_vpackwuh_sat_128B : 5973 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackwuh_sat_128B">; 5974 5975 // 5976 // BUILTIN_INFO(HEXAGON.V6_vpackwh_sat,VI_ftype_VIVI,2) 5977 // tag : V6_vpackwh_sat 5978 def int_hexagon_V6_vpackwh_sat : 5979 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vpackwh_sat">; 5980 5981 // 5982 // BUILTIN_INFO(HEXAGON.V6_vpackwh_sat_128B,VI_ftype_VIVI,2) 5983 // tag : V6_vpackwh_sat_128B 5984 def int_hexagon_V6_vpackwh_sat_128B : 5985 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vpackwh_sat_128B">; 5986 5987 // 5988 // BUILTIN_INFO(HEXAGON.V6_vzb,VD_ftype_VI,1) 5989 // tag : V6_vzb 5990 def int_hexagon_V6_vzb : 5991 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vzb">; 5992 5993 // 5994 // BUILTIN_INFO(HEXAGON.V6_vzb_128B,VD_ftype_VI,1) 5995 // tag : V6_vzb_128B 5996 def int_hexagon_V6_vzb_128B : 5997 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vzb_128B">; 5998 5999 // 6000 // BUILTIN_INFO(HEXAGON.V6_vsb,VD_ftype_VI,1) 6001 // tag : V6_vsb 6002 def int_hexagon_V6_vsb : 6003 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vsb">; 6004 6005 // 6006 // BUILTIN_INFO(HEXAGON.V6_vsb_128B,VD_ftype_VI,1) 6007 // tag : V6_vsb_128B 6008 def int_hexagon_V6_vsb_128B : 6009 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vsb_128B">; 6010 6011 // 6012 // BUILTIN_INFO(HEXAGON.V6_vzh,VD_ftype_VI,1) 6013 // tag : V6_vzh 6014 def int_hexagon_V6_vzh : 6015 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vzh">; 6016 6017 // 6018 // BUILTIN_INFO(HEXAGON.V6_vzh_128B,VD_ftype_VI,1) 6019 // tag : V6_vzh_128B 6020 def int_hexagon_V6_vzh_128B : 6021 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vzh_128B">; 6022 6023 // 6024 // BUILTIN_INFO(HEXAGON.V6_vsh,VD_ftype_VI,1) 6025 // tag : V6_vsh 6026 def int_hexagon_V6_vsh : 6027 Hexagon_v1024v512_Intrinsic<"HEXAGON_V6_vsh">; 6028 6029 // 6030 // BUILTIN_INFO(HEXAGON.V6_vsh_128B,VD_ftype_VI,1) 6031 // tag : V6_vsh_128B 6032 def int_hexagon_V6_vsh_128B : 6033 Hexagon_v2048v1024_Intrinsic<"HEXAGON_V6_vsh_128B">; 6034 6035 // 6036 // BUILTIN_INFO(HEXAGON.V6_vdmpybus,VI_ftype_VISI,2) 6037 // tag : V6_vdmpybus 6038 def int_hexagon_V6_vdmpybus : 6039 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpybus">; 6040 6041 // 6042 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_128B,VI_ftype_VISI,2) 6043 // tag : V6_vdmpybus_128B 6044 def int_hexagon_V6_vdmpybus_128B : 6045 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_128B">; 6046 6047 // 6048 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_acc,VI_ftype_VIVISI,3) 6049 // tag : V6_vdmpybus_acc 6050 def int_hexagon_V6_vdmpybus_acc : 6051 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpybus_acc">; 6052 6053 // 6054 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_acc_128B,VI_ftype_VIVISI,3) 6055 // tag : V6_vdmpybus_acc_128B 6056 def int_hexagon_V6_vdmpybus_acc_128B : 6057 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_acc_128B">; 6058 6059 // 6060 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv,VD_ftype_VDSI,2) 6061 // tag : V6_vdmpybus_dv 6062 def int_hexagon_V6_vdmpybus_dv : 6063 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_dv">; 6064 6065 // 6066 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_128B,VD_ftype_VDSI,2) 6067 // tag : V6_vdmpybus_dv_128B 6068 def int_hexagon_V6_vdmpybus_dv_128B : 6069 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_128B">; 6070 6071 // 6072 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_acc,VD_ftype_VDVDSI,3) 6073 // tag : V6_vdmpybus_dv_acc 6074 def int_hexagon_V6_vdmpybus_dv_acc : 6075 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_acc">; 6076 6077 // 6078 // BUILTIN_INFO(HEXAGON.V6_vdmpybus_dv_acc_128B,VD_ftype_VDVDSI,3) 6079 // tag : V6_vdmpybus_dv_acc_128B 6080 def int_hexagon_V6_vdmpybus_dv_acc_128B : 6081 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpybus_dv_acc_128B">; 6082 6083 // 6084 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb,VI_ftype_VISI,2) 6085 // tag : V6_vdmpyhb 6086 def int_hexagon_V6_vdmpyhb : 6087 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhb">; 6088 6089 // 6090 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_128B,VI_ftype_VISI,2) 6091 // tag : V6_vdmpyhb_128B 6092 def int_hexagon_V6_vdmpyhb_128B : 6093 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_128B">; 6094 6095 // 6096 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_acc,VI_ftype_VIVISI,3) 6097 // tag : V6_vdmpyhb_acc 6098 def int_hexagon_V6_vdmpyhb_acc : 6099 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhb_acc">; 6100 6101 // 6102 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_acc_128B,VI_ftype_VIVISI,3) 6103 // tag : V6_vdmpyhb_acc_128B 6104 def int_hexagon_V6_vdmpyhb_acc_128B : 6105 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_acc_128B">; 6106 6107 // 6108 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv,VD_ftype_VDSI,2) 6109 // tag : V6_vdmpyhb_dv 6110 def int_hexagon_V6_vdmpyhb_dv : 6111 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv">; 6112 6113 // 6114 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_128B,VD_ftype_VDSI,2) 6115 // tag : V6_vdmpyhb_dv_128B 6116 def int_hexagon_V6_vdmpyhb_dv_128B : 6117 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_128B">; 6118 6119 // 6120 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_acc,VD_ftype_VDVDSI,3) 6121 // tag : V6_vdmpyhb_dv_acc 6122 def int_hexagon_V6_vdmpyhb_dv_acc : 6123 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_acc">; 6124 6125 // 6126 // BUILTIN_INFO(HEXAGON.V6_vdmpyhb_dv_acc_128B,VD_ftype_VDVDSI,3) 6127 // tag : V6_vdmpyhb_dv_acc_128B 6128 def int_hexagon_V6_vdmpyhb_dv_acc_128B : 6129 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdmpyhb_dv_acc_128B">; 6130 6131 // 6132 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat,VI_ftype_VIVI,2) 6133 // tag : V6_vdmpyhvsat 6134 def int_hexagon_V6_vdmpyhvsat : 6135 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdmpyhvsat">; 6136 6137 // 6138 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_128B,VI_ftype_VIVI,2) 6139 // tag : V6_vdmpyhvsat_128B 6140 def int_hexagon_V6_vdmpyhvsat_128B : 6141 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdmpyhvsat_128B">; 6142 6143 // 6144 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_acc,VI_ftype_VIVIVI,3) 6145 // tag : V6_vdmpyhvsat_acc 6146 def int_hexagon_V6_vdmpyhvsat_acc : 6147 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vdmpyhvsat_acc">; 6148 6149 // 6150 // BUILTIN_INFO(HEXAGON.V6_vdmpyhvsat_acc_128B,VI_ftype_VIVIVI,3) 6151 // tag : V6_vdmpyhvsat_acc_128B 6152 def int_hexagon_V6_vdmpyhvsat_acc_128B : 6153 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdmpyhvsat_acc_128B">; 6154 6155 // 6156 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat,VI_ftype_VISI,2) 6157 // tag : V6_vdmpyhsat 6158 def int_hexagon_V6_vdmpyhsat : 6159 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsat">; 6160 6161 // 6162 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_128B,VI_ftype_VISI,2) 6163 // tag : V6_vdmpyhsat_128B 6164 def int_hexagon_V6_vdmpyhsat_128B : 6165 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsat_128B">; 6166 6167 // 6168 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_acc,VI_ftype_VIVISI,3) 6169 // tag : V6_vdmpyhsat_acc 6170 def int_hexagon_V6_vdmpyhsat_acc : 6171 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsat_acc">; 6172 6173 // 6174 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsat_acc_128B,VI_ftype_VIVISI,3) 6175 // tag : V6_vdmpyhsat_acc_128B 6176 def int_hexagon_V6_vdmpyhsat_acc_128B : 6177 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsat_acc_128B">; 6178 6179 // 6180 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat,VI_ftype_VDSI,2) 6181 // tag : V6_vdmpyhisat 6182 def int_hexagon_V6_vdmpyhisat : 6183 Hexagon_v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhisat">; 6184 6185 // 6186 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_128B,VI_ftype_VDSI,2) 6187 // tag : V6_vdmpyhisat_128B 6188 def int_hexagon_V6_vdmpyhisat_128B : 6189 Hexagon_v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhisat_128B">; 6190 6191 // 6192 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_acc,VI_ftype_VIVDSI,3) 6193 // tag : V6_vdmpyhisat_acc 6194 def int_hexagon_V6_vdmpyhisat_acc : 6195 Hexagon_v512v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhisat_acc">; 6196 6197 // 6198 // BUILTIN_INFO(HEXAGON.V6_vdmpyhisat_acc_128B,VI_ftype_VIVDSI,3) 6199 // tag : V6_vdmpyhisat_acc_128B 6200 def int_hexagon_V6_vdmpyhisat_acc_128B : 6201 Hexagon_v1024v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhisat_acc_128B">; 6202 6203 // 6204 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat,VI_ftype_VISI,2) 6205 // tag : V6_vdmpyhsusat 6206 def int_hexagon_V6_vdmpyhsusat : 6207 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsusat">; 6208 6209 // 6210 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_128B,VI_ftype_VISI,2) 6211 // tag : V6_vdmpyhsusat_128B 6212 def int_hexagon_V6_vdmpyhsusat_128B : 6213 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_128B">; 6214 6215 // 6216 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_acc,VI_ftype_VIVISI,3) 6217 // tag : V6_vdmpyhsusat_acc 6218 def int_hexagon_V6_vdmpyhsusat_acc : 6219 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_acc">; 6220 6221 // 6222 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsusat_acc_128B,VI_ftype_VIVISI,3) 6223 // tag : V6_vdmpyhsusat_acc_128B 6224 def int_hexagon_V6_vdmpyhsusat_acc_128B : 6225 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsusat_acc_128B">; 6226 6227 // 6228 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat,VI_ftype_VDSI,2) 6229 // tag : V6_vdmpyhsuisat 6230 def int_hexagon_V6_vdmpyhsuisat : 6231 Hexagon_v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat">; 6232 6233 // 6234 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_128B,VI_ftype_VDSI,2) 6235 // tag : V6_vdmpyhsuisat_128B 6236 def int_hexagon_V6_vdmpyhsuisat_128B : 6237 Hexagon_v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_128B">; 6238 6239 // 6240 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_acc,VI_ftype_VIVDSI,3) 6241 // tag : V6_vdmpyhsuisat_acc 6242 def int_hexagon_V6_vdmpyhsuisat_acc : 6243 Hexagon_v512v512v1024i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_acc">; 6244 6245 // 6246 // BUILTIN_INFO(HEXAGON.V6_vdmpyhsuisat_acc_128B,VI_ftype_VIVDSI,3) 6247 // tag : V6_vdmpyhsuisat_acc_128B 6248 def int_hexagon_V6_vdmpyhsuisat_acc_128B : 6249 Hexagon_v1024v1024v2048i_Intrinsic<"HEXAGON_V6_vdmpyhsuisat_acc_128B">; 6250 6251 // 6252 // BUILTIN_INFO(HEXAGON.V6_vtmpyb,VD_ftype_VDSI,2) 6253 // tag : V6_vtmpyb 6254 def int_hexagon_V6_vtmpyb : 6255 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyb">; 6256 6257 // 6258 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_128B,VD_ftype_VDSI,2) 6259 // tag : V6_vtmpyb_128B 6260 def int_hexagon_V6_vtmpyb_128B : 6261 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyb_128B">; 6262 6263 // 6264 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_acc,VD_ftype_VDVDSI,3) 6265 // tag : V6_vtmpyb_acc 6266 def int_hexagon_V6_vtmpyb_acc : 6267 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyb_acc">; 6268 6269 // 6270 // BUILTIN_INFO(HEXAGON.V6_vtmpyb_acc_128B,VD_ftype_VDVDSI,3) 6271 // tag : V6_vtmpyb_acc_128B 6272 def int_hexagon_V6_vtmpyb_acc_128B : 6273 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyb_acc_128B">; 6274 6275 // 6276 // BUILTIN_INFO(HEXAGON.V6_vtmpybus,VD_ftype_VDSI,2) 6277 // tag : V6_vtmpybus 6278 def int_hexagon_V6_vtmpybus : 6279 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpybus">; 6280 6281 // 6282 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_128B,VD_ftype_VDSI,2) 6283 // tag : V6_vtmpybus_128B 6284 def int_hexagon_V6_vtmpybus_128B : 6285 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpybus_128B">; 6286 6287 // 6288 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_acc,VD_ftype_VDVDSI,3) 6289 // tag : V6_vtmpybus_acc 6290 def int_hexagon_V6_vtmpybus_acc : 6291 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpybus_acc">; 6292 6293 // 6294 // BUILTIN_INFO(HEXAGON.V6_vtmpybus_acc_128B,VD_ftype_VDVDSI,3) 6295 // tag : V6_vtmpybus_acc_128B 6296 def int_hexagon_V6_vtmpybus_acc_128B : 6297 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpybus_acc_128B">; 6298 6299 // 6300 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb,VD_ftype_VDSI,2) 6301 // tag : V6_vtmpyhb 6302 def int_hexagon_V6_vtmpyhb : 6303 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyhb">; 6304 6305 // 6306 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_128B,VD_ftype_VDSI,2) 6307 // tag : V6_vtmpyhb_128B 6308 def int_hexagon_V6_vtmpyhb_128B : 6309 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyhb_128B">; 6310 6311 // 6312 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_acc,VD_ftype_VDVDSI,3) 6313 // tag : V6_vtmpyhb_acc 6314 def int_hexagon_V6_vtmpyhb_acc : 6315 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vtmpyhb_acc">; 6316 6317 // 6318 // BUILTIN_INFO(HEXAGON.V6_vtmpyhb_acc_128B,VD_ftype_VDVDSI,3) 6319 // tag : V6_vtmpyhb_acc_128B 6320 def int_hexagon_V6_vtmpyhb_acc_128B : 6321 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vtmpyhb_acc_128B">; 6322 6323 // 6324 // BUILTIN_INFO(HEXAGON.V6_vrmpyub,VI_ftype_VISI,2) 6325 // tag : V6_vrmpyub 6326 def int_hexagon_V6_vrmpyub : 6327 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vrmpyub">; 6328 6329 // 6330 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_128B,VI_ftype_VISI,2) 6331 // tag : V6_vrmpyub_128B 6332 def int_hexagon_V6_vrmpyub_128B : 6333 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpyub_128B">; 6334 6335 // 6336 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_acc,VI_ftype_VIVISI,3) 6337 // tag : V6_vrmpyub_acc 6338 def int_hexagon_V6_vrmpyub_acc : 6339 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vrmpyub_acc">; 6340 6341 // 6342 // BUILTIN_INFO(HEXAGON.V6_vrmpyub_acc_128B,VI_ftype_VIVISI,3) 6343 // tag : V6_vrmpyub_acc_128B 6344 def int_hexagon_V6_vrmpyub_acc_128B : 6345 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpyub_acc_128B">; 6346 6347 // 6348 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv,VI_ftype_VIVI,2) 6349 // tag : V6_vrmpyubv 6350 def int_hexagon_V6_vrmpyubv : 6351 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpyubv">; 6352 6353 // 6354 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_128B,VI_ftype_VIVI,2) 6355 // tag : V6_vrmpyubv_128B 6356 def int_hexagon_V6_vrmpyubv_128B : 6357 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpyubv_128B">; 6358 6359 // 6360 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_acc,VI_ftype_VIVIVI,3) 6361 // tag : V6_vrmpyubv_acc 6362 def int_hexagon_V6_vrmpyubv_acc : 6363 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpyubv_acc">; 6364 6365 // 6366 // BUILTIN_INFO(HEXAGON.V6_vrmpyubv_acc_128B,VI_ftype_VIVIVI,3) 6367 // tag : V6_vrmpyubv_acc_128B 6368 def int_hexagon_V6_vrmpyubv_acc_128B : 6369 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpyubv_acc_128B">; 6370 6371 // 6372 // BUILTIN_INFO(HEXAGON.V6_vrmpybv,VI_ftype_VIVI,2) 6373 // tag : V6_vrmpybv 6374 def int_hexagon_V6_vrmpybv : 6375 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybv">; 6376 6377 // 6378 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_128B,VI_ftype_VIVI,2) 6379 // tag : V6_vrmpybv_128B 6380 def int_hexagon_V6_vrmpybv_128B : 6381 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybv_128B">; 6382 6383 // 6384 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_acc,VI_ftype_VIVIVI,3) 6385 // tag : V6_vrmpybv_acc 6386 def int_hexagon_V6_vrmpybv_acc : 6387 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybv_acc">; 6388 6389 // 6390 // BUILTIN_INFO(HEXAGON.V6_vrmpybv_acc_128B,VI_ftype_VIVIVI,3) 6391 // tag : V6_vrmpybv_acc_128B 6392 def int_hexagon_V6_vrmpybv_acc_128B : 6393 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybv_acc_128B">; 6394 6395 // 6396 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi,VD_ftype_VDSISI,3) 6397 // tag : V6_vrmpyubi 6398 def int_hexagon_V6_vrmpyubi : 6399 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpyubi">; 6400 6401 // 6402 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_128B,VD_ftype_VDSISI,3) 6403 // tag : V6_vrmpyubi_128B 6404 def int_hexagon_V6_vrmpyubi_128B : 6405 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpyubi_128B">; 6406 6407 // 6408 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_acc,VD_ftype_VDVDSISI,4) 6409 // tag : V6_vrmpyubi_acc 6410 def int_hexagon_V6_vrmpyubi_acc : 6411 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpyubi_acc">; 6412 6413 // 6414 // BUILTIN_INFO(HEXAGON.V6_vrmpyubi_acc_128B,VD_ftype_VDVDSISI,4) 6415 // tag : V6_vrmpyubi_acc_128B 6416 def int_hexagon_V6_vrmpyubi_acc_128B : 6417 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpyubi_acc_128B">; 6418 6419 // 6420 // BUILTIN_INFO(HEXAGON.V6_vrmpybus,VI_ftype_VISI,2) 6421 // tag : V6_vrmpybus 6422 def int_hexagon_V6_vrmpybus : 6423 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vrmpybus">; 6424 6425 // 6426 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_128B,VI_ftype_VISI,2) 6427 // tag : V6_vrmpybus_128B 6428 def int_hexagon_V6_vrmpybus_128B : 6429 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpybus_128B">; 6430 6431 // 6432 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_acc,VI_ftype_VIVISI,3) 6433 // tag : V6_vrmpybus_acc 6434 def int_hexagon_V6_vrmpybus_acc : 6435 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vrmpybus_acc">; 6436 6437 // 6438 // BUILTIN_INFO(HEXAGON.V6_vrmpybus_acc_128B,VI_ftype_VIVISI,3) 6439 // tag : V6_vrmpybus_acc_128B 6440 def int_hexagon_V6_vrmpybus_acc_128B : 6441 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vrmpybus_acc_128B">; 6442 6443 // 6444 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi,VD_ftype_VDSISI,3) 6445 // tag : V6_vrmpybusi 6446 def int_hexagon_V6_vrmpybusi : 6447 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpybusi">; 6448 6449 // 6450 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_128B,VD_ftype_VDSISI,3) 6451 // tag : V6_vrmpybusi_128B 6452 def int_hexagon_V6_vrmpybusi_128B : 6453 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpybusi_128B">; 6454 6455 // 6456 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_acc,VD_ftype_VDVDSISI,4) 6457 // tag : V6_vrmpybusi_acc 6458 def int_hexagon_V6_vrmpybusi_acc : 6459 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrmpybusi_acc">; 6460 6461 // 6462 // BUILTIN_INFO(HEXAGON.V6_vrmpybusi_acc_128B,VD_ftype_VDVDSISI,4) 6463 // tag : V6_vrmpybusi_acc_128B 6464 def int_hexagon_V6_vrmpybusi_acc_128B : 6465 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrmpybusi_acc_128B">; 6466 6467 // 6468 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv,VI_ftype_VIVI,2) 6469 // tag : V6_vrmpybusv 6470 def int_hexagon_V6_vrmpybusv : 6471 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybusv">; 6472 6473 // 6474 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_128B,VI_ftype_VIVI,2) 6475 // tag : V6_vrmpybusv_128B 6476 def int_hexagon_V6_vrmpybusv_128B : 6477 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybusv_128B">; 6478 6479 // 6480 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_acc,VI_ftype_VIVIVI,3) 6481 // tag : V6_vrmpybusv_acc 6482 def int_hexagon_V6_vrmpybusv_acc : 6483 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vrmpybusv_acc">; 6484 6485 // 6486 // BUILTIN_INFO(HEXAGON.V6_vrmpybusv_acc_128B,VI_ftype_VIVIVI,3) 6487 // tag : V6_vrmpybusv_acc_128B 6488 def int_hexagon_V6_vrmpybusv_acc_128B : 6489 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrmpybusv_acc_128B">; 6490 6491 // 6492 // BUILTIN_INFO(HEXAGON.V6_vdsaduh,VD_ftype_VDSI,2) 6493 // tag : V6_vdsaduh 6494 def int_hexagon_V6_vdsaduh : 6495 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vdsaduh">; 6496 6497 // 6498 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_128B,VD_ftype_VDSI,2) 6499 // tag : V6_vdsaduh_128B 6500 def int_hexagon_V6_vdsaduh_128B : 6501 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vdsaduh_128B">; 6502 6503 // 6504 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_acc,VD_ftype_VDVDSI,3) 6505 // tag : V6_vdsaduh_acc 6506 def int_hexagon_V6_vdsaduh_acc : 6507 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vdsaduh_acc">; 6508 6509 // 6510 // BUILTIN_INFO(HEXAGON.V6_vdsaduh_acc_128B,VD_ftype_VDVDSI,3) 6511 // tag : V6_vdsaduh_acc_128B 6512 def int_hexagon_V6_vdsaduh_acc_128B : 6513 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vdsaduh_acc_128B">; 6514 6515 // 6516 // BUILTIN_INFO(HEXAGON.V6_vrsadubi,VD_ftype_VDSISI,3) 6517 // tag : V6_vrsadubi 6518 def int_hexagon_V6_vrsadubi : 6519 Hexagon_v1024v1024ii_Intrinsic<"HEXAGON_V6_vrsadubi">; 6520 6521 // 6522 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_128B,VD_ftype_VDSISI,3) 6523 // tag : V6_vrsadubi_128B 6524 def int_hexagon_V6_vrsadubi_128B : 6525 Hexagon_v2048v2048ii_Intrinsic<"HEXAGON_V6_vrsadubi_128B">; 6526 6527 // 6528 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_acc,VD_ftype_VDVDSISI,4) 6529 // tag : V6_vrsadubi_acc 6530 def int_hexagon_V6_vrsadubi_acc : 6531 Hexagon_v1024v1024v1024ii_Intrinsic<"HEXAGON_V6_vrsadubi_acc">; 6532 6533 // 6534 // BUILTIN_INFO(HEXAGON.V6_vrsadubi_acc_128B,VD_ftype_VDVDSISI,4) 6535 // tag : V6_vrsadubi_acc_128B 6536 def int_hexagon_V6_vrsadubi_acc_128B : 6537 Hexagon_v2048v2048v2048ii_Intrinsic<"HEXAGON_V6_vrsadubi_acc_128B">; 6538 6539 // 6540 // BUILTIN_INFO(HEXAGON.V6_vasrw,VI_ftype_VISI,2) 6541 // tag : V6_vasrw 6542 def int_hexagon_V6_vasrw : 6543 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vasrw">; 6544 6545 // 6546 // BUILTIN_INFO(HEXAGON.V6_vasrw_128B,VI_ftype_VISI,2) 6547 // tag : V6_vasrw_128B 6548 def int_hexagon_V6_vasrw_128B : 6549 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vasrw_128B">; 6550 6551 6552 // 6553 // BUILTIN_INFO(HEXAGON.V6_vaslw,VI_ftype_VISI,2) 6554 // tag : V6_vaslw 6555 def int_hexagon_V6_vaslw : 6556 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vaslw">; 6557 6558 // 6559 // BUILTIN_INFO(HEXAGON.V6_vaslw_128B,VI_ftype_VISI,2) 6560 // tag : V6_vaslw_128B 6561 def int_hexagon_V6_vaslw_128B : 6562 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vaslw_128B">; 6563 6564 // 6565 // BUILTIN_INFO(HEXAGON.V6_vlsrw,VI_ftype_VISI,2) 6566 // tag : V6_vlsrw 6567 def int_hexagon_V6_vlsrw : 6568 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vlsrw">; 6569 6570 // 6571 // BUILTIN_INFO(HEXAGON.V6_vlsrw_128B,VI_ftype_VISI,2) 6572 // tag : V6_vlsrw_128B 6573 def int_hexagon_V6_vlsrw_128B : 6574 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrw_128B">; 6575 6576 // 6577 // BUILTIN_INFO(HEXAGON.V6_vasrwv,VI_ftype_VIVI,2) 6578 // tag : V6_vasrwv 6579 def int_hexagon_V6_vasrwv : 6580 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vasrwv">; 6581 6582 // 6583 // BUILTIN_INFO(HEXAGON.V6_vasrwv_128B,VI_ftype_VIVI,2) 6584 // tag : V6_vasrwv_128B 6585 def int_hexagon_V6_vasrwv_128B : 6586 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vasrwv_128B">; 6587 6588 // 6589 // BUILTIN_INFO(HEXAGON.V6_vaslwv,VI_ftype_VIVI,2) 6590 // tag : V6_vaslwv 6591 def int_hexagon_V6_vaslwv : 6592 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaslwv">; 6593 6594 // 6595 // BUILTIN_INFO(HEXAGON.V6_vaslwv_128B,VI_ftype_VIVI,2) 6596 // tag : V6_vaslwv_128B 6597 def int_hexagon_V6_vaslwv_128B : 6598 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaslwv_128B">; 6599 6600 // 6601 // BUILTIN_INFO(HEXAGON.V6_vlsrwv,VI_ftype_VIVI,2) 6602 // tag : V6_vlsrwv 6603 def int_hexagon_V6_vlsrwv : 6604 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vlsrwv">; 6605 6606 // 6607 // BUILTIN_INFO(HEXAGON.V6_vlsrwv_128B,VI_ftype_VIVI,2) 6608 // tag : V6_vlsrwv_128B 6609 def int_hexagon_V6_vlsrwv_128B : 6610 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vlsrwv_128B">; 6611 6612 // 6613 // BUILTIN_INFO(HEXAGON.V6_vasrh,VI_ftype_VISI,2) 6614 // tag : V6_vasrh 6615 def int_hexagon_V6_vasrh : 6616 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vasrh">; 6617 6618 // 6619 // BUILTIN_INFO(HEXAGON.V6_vasrh_128B,VI_ftype_VISI,2) 6620 // tag : V6_vasrh_128B 6621 def int_hexagon_V6_vasrh_128B : 6622 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vasrh_128B">; 6623 6624 // 6625 // BUILTIN_INFO(HEXAGON.V6_vaslh,VI_ftype_VISI,2) 6626 // tag : V6_vaslh 6627 def int_hexagon_V6_vaslh : 6628 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vaslh">; 6629 6630 // 6631 // BUILTIN_INFO(HEXAGON.V6_vaslh_128B,VI_ftype_VISI,2) 6632 // tag : V6_vaslh_128B 6633 def int_hexagon_V6_vaslh_128B : 6634 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vaslh_128B">; 6635 6636 // 6637 // BUILTIN_INFO(HEXAGON.V6_vlsrh,VI_ftype_VISI,2) 6638 // tag : V6_vlsrh 6639 def int_hexagon_V6_vlsrh : 6640 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vlsrh">; 6641 6642 // 6643 // BUILTIN_INFO(HEXAGON.V6_vlsrh_128B,VI_ftype_VISI,2) 6644 // tag : V6_vlsrh_128B 6645 def int_hexagon_V6_vlsrh_128B : 6646 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrh_128B">; 6647 6648 // 6649 // BUILTIN_INFO(HEXAGON.V6_vasrhv,VI_ftype_VIVI,2) 6650 // tag : V6_vasrhv 6651 def int_hexagon_V6_vasrhv : 6652 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vasrhv">; 6653 6654 // 6655 // BUILTIN_INFO(HEXAGON.V6_vasrhv_128B,VI_ftype_VIVI,2) 6656 // tag : V6_vasrhv_128B 6657 def int_hexagon_V6_vasrhv_128B : 6658 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vasrhv_128B">; 6659 6660 // 6661 // BUILTIN_INFO(HEXAGON.V6_vaslhv,VI_ftype_VIVI,2) 6662 // tag : V6_vaslhv 6663 def int_hexagon_V6_vaslhv : 6664 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaslhv">; 6665 6666 // 6667 // BUILTIN_INFO(HEXAGON.V6_vaslhv_128B,VI_ftype_VIVI,2) 6668 // tag : V6_vaslhv_128B 6669 def int_hexagon_V6_vaslhv_128B : 6670 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaslhv_128B">; 6671 6672 // 6673 // BUILTIN_INFO(HEXAGON.V6_vlsrhv,VI_ftype_VIVI,2) 6674 // tag : V6_vlsrhv 6675 def int_hexagon_V6_vlsrhv : 6676 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vlsrhv">; 6677 6678 // 6679 // BUILTIN_INFO(HEXAGON.V6_vlsrhv_128B,VI_ftype_VIVI,2) 6680 // tag : V6_vlsrhv_128B 6681 def int_hexagon_V6_vlsrhv_128B : 6682 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vlsrhv_128B">; 6683 6684 // 6685 // BUILTIN_INFO(HEXAGON.V6_vasrwh,VI_ftype_VIVISI,3) 6686 // tag : V6_vasrwh 6687 def int_hexagon_V6_vasrwh : 6688 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwh">; 6689 6690 // 6691 // BUILTIN_INFO(HEXAGON.V6_vasrwh_128B,VI_ftype_VIVISI,3) 6692 // tag : V6_vasrwh_128B 6693 def int_hexagon_V6_vasrwh_128B : 6694 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwh_128B">; 6695 6696 // 6697 // BUILTIN_INFO(HEXAGON.V6_vasrwhsat,VI_ftype_VIVISI,3) 6698 // tag : V6_vasrwhsat 6699 def int_hexagon_V6_vasrwhsat : 6700 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwhsat">; 6701 6702 // 6703 // BUILTIN_INFO(HEXAGON.V6_vasrwhsat_128B,VI_ftype_VIVISI,3) 6704 // tag : V6_vasrwhsat_128B 6705 def int_hexagon_V6_vasrwhsat_128B : 6706 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwhsat_128B">; 6707 6708 // 6709 // BUILTIN_INFO(HEXAGON.V6_vasrwhrndsat,VI_ftype_VIVISI,3) 6710 // tag : V6_vasrwhrndsat 6711 def int_hexagon_V6_vasrwhrndsat : 6712 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwhrndsat">; 6713 6714 // 6715 // BUILTIN_INFO(HEXAGON.V6_vasrwhrndsat_128B,VI_ftype_VIVISI,3) 6716 // tag : V6_vasrwhrndsat_128B 6717 def int_hexagon_V6_vasrwhrndsat_128B : 6718 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwhrndsat_128B">; 6719 6720 // 6721 // BUILTIN_INFO(HEXAGON.V6_vasrwuhsat,VI_ftype_VIVISI,3) 6722 // tag : V6_vasrwuhsat 6723 def int_hexagon_V6_vasrwuhsat : 6724 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwuhsat">; 6725 6726 // 6727 // BUILTIN_INFO(HEXAGON.V6_vasrwuhsat_128B,VI_ftype_VIVISI,3) 6728 // tag : V6_vasrwuhsat_128B 6729 def int_hexagon_V6_vasrwuhsat_128B : 6730 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwuhsat_128B">; 6731 6732 // 6733 // BUILTIN_INFO(HEXAGON.V6_vroundwh,VI_ftype_VIVI,2) 6734 // tag : V6_vroundwh 6735 def int_hexagon_V6_vroundwh : 6736 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundwh">; 6737 6738 // 6739 // BUILTIN_INFO(HEXAGON.V6_vroundwh_128B,VI_ftype_VIVI,2) 6740 // tag : V6_vroundwh_128B 6741 def int_hexagon_V6_vroundwh_128B : 6742 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundwh_128B">; 6743 6744 // 6745 // BUILTIN_INFO(HEXAGON.V6_vroundwuh,VI_ftype_VIVI,2) 6746 // tag : V6_vroundwuh 6747 def int_hexagon_V6_vroundwuh : 6748 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundwuh">; 6749 6750 // 6751 // BUILTIN_INFO(HEXAGON.V6_vroundwuh_128B,VI_ftype_VIVI,2) 6752 // tag : V6_vroundwuh_128B 6753 def int_hexagon_V6_vroundwuh_128B : 6754 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundwuh_128B">; 6755 6756 // 6757 // BUILTIN_INFO(HEXAGON.V6_vasrhubsat,VI_ftype_VIVISI,3) 6758 // tag : V6_vasrhubsat 6759 def int_hexagon_V6_vasrhubsat : 6760 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhubsat">; 6761 6762 // 6763 // BUILTIN_INFO(HEXAGON.V6_vasrhubsat_128B,VI_ftype_VIVISI,3) 6764 // tag : V6_vasrhubsat_128B 6765 def int_hexagon_V6_vasrhubsat_128B : 6766 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhubsat_128B">; 6767 6768 // 6769 // BUILTIN_INFO(HEXAGON.V6_vasrhubrndsat,VI_ftype_VIVISI,3) 6770 // tag : V6_vasrhubrndsat 6771 def int_hexagon_V6_vasrhubrndsat : 6772 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhubrndsat">; 6773 6774 // 6775 // BUILTIN_INFO(HEXAGON.V6_vasrhubrndsat_128B,VI_ftype_VIVISI,3) 6776 // tag : V6_vasrhubrndsat_128B 6777 def int_hexagon_V6_vasrhubrndsat_128B : 6778 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhubrndsat_128B">; 6779 6780 // 6781 // BUILTIN_INFO(HEXAGON.V6_vasrhbrndsat,VI_ftype_VIVISI,3) 6782 // tag : V6_vasrhbrndsat 6783 def int_hexagon_V6_vasrhbrndsat : 6784 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhbrndsat">; 6785 6786 // 6787 // BUILTIN_INFO(HEXAGON.V6_vasrhbrndsat_128B,VI_ftype_VIVISI,3) 6788 // tag : V6_vasrhbrndsat_128B 6789 def int_hexagon_V6_vasrhbrndsat_128B : 6790 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhbrndsat_128B">; 6791 6792 // 6793 // BUILTIN_INFO(HEXAGON.V6_vroundhb,VI_ftype_VIVI,2) 6794 // tag : V6_vroundhb 6795 def int_hexagon_V6_vroundhb : 6796 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundhb">; 6797 6798 // 6799 // BUILTIN_INFO(HEXAGON.V6_vroundhb_128B,VI_ftype_VIVI,2) 6800 // tag : V6_vroundhb_128B 6801 def int_hexagon_V6_vroundhb_128B : 6802 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundhb_128B">; 6803 6804 // 6805 // BUILTIN_INFO(HEXAGON.V6_vroundhub,VI_ftype_VIVI,2) 6806 // tag : V6_vroundhub 6807 def int_hexagon_V6_vroundhub : 6808 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vroundhub">; 6809 6810 // 6811 // BUILTIN_INFO(HEXAGON.V6_vroundhub_128B,VI_ftype_VIVI,2) 6812 // tag : V6_vroundhub_128B 6813 def int_hexagon_V6_vroundhub_128B : 6814 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vroundhub_128B">; 6815 6816 // 6817 // BUILTIN_INFO(HEXAGON.V6_vaslw_acc,VI_ftype_VIVISI,3) 6818 // tag : V6_vaslw_acc 6819 def int_hexagon_V6_vaslw_acc : 6820 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vaslw_acc">; 6821 6822 // 6823 // BUILTIN_INFO(HEXAGON.V6_vaslw_acc_128B,VI_ftype_VIVISI,3) 6824 // tag : V6_vaslw_acc_128B 6825 def int_hexagon_V6_vaslw_acc_128B : 6826 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vaslw_acc_128B">; 6827 6828 // 6829 // BUILTIN_INFO(HEXAGON.V6_vasrw_acc,VI_ftype_VIVISI,3) 6830 // tag : V6_vasrw_acc 6831 def int_hexagon_V6_vasrw_acc : 6832 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrw_acc">; 6833 6834 // 6835 // BUILTIN_INFO(HEXAGON.V6_vasrw_acc_128B,VI_ftype_VIVISI,3) 6836 // tag : V6_vasrw_acc_128B 6837 def int_hexagon_V6_vasrw_acc_128B : 6838 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrw_acc_128B">; 6839 6840 // 6841 // BUILTIN_INFO(HEXAGON.V6_vaddb,VI_ftype_VIVI,2) 6842 // tag : V6_vaddb 6843 def int_hexagon_V6_vaddb : 6844 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddb">; 6845 6846 // 6847 // BUILTIN_INFO(HEXAGON.V6_vaddb_128B,VI_ftype_VIVI,2) 6848 // tag : V6_vaddb_128B 6849 def int_hexagon_V6_vaddb_128B : 6850 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddb_128B">; 6851 6852 // 6853 // BUILTIN_INFO(HEXAGON.V6_vsubb,VI_ftype_VIVI,2) 6854 // tag : V6_vsubb 6855 def int_hexagon_V6_vsubb : 6856 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubb">; 6857 6858 // 6859 // BUILTIN_INFO(HEXAGON.V6_vsubb_128B,VI_ftype_VIVI,2) 6860 // tag : V6_vsubb_128B 6861 def int_hexagon_V6_vsubb_128B : 6862 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubb_128B">; 6863 6864 // 6865 // BUILTIN_INFO(HEXAGON.V6_vaddb_dv,VD_ftype_VDVD,2) 6866 // tag : V6_vaddb_dv 6867 def int_hexagon_V6_vaddb_dv : 6868 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddb_dv">; 6869 6870 // 6871 // BUILTIN_INFO(HEXAGON.V6_vaddb_dv_128B,VD_ftype_VDVD,2) 6872 // tag : V6_vaddb_dv_128B 6873 def int_hexagon_V6_vaddb_dv_128B : 6874 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddb_dv_128B">; 6875 6876 // 6877 // BUILTIN_INFO(HEXAGON.V6_vsubb_dv,VD_ftype_VDVD,2) 6878 // tag : V6_vsubb_dv 6879 def int_hexagon_V6_vsubb_dv : 6880 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubb_dv">; 6881 6882 // 6883 // BUILTIN_INFO(HEXAGON.V6_vsubb_dv_128B,VD_ftype_VDVD,2) 6884 // tag : V6_vsubb_dv_128B 6885 def int_hexagon_V6_vsubb_dv_128B : 6886 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubb_dv_128B">; 6887 6888 // 6889 // BUILTIN_INFO(HEXAGON.V6_vaddh,VI_ftype_VIVI,2) 6890 // tag : V6_vaddh 6891 def int_hexagon_V6_vaddh : 6892 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddh">; 6893 6894 // 6895 // BUILTIN_INFO(HEXAGON.V6_vaddh_128B,VI_ftype_VIVI,2) 6896 // tag : V6_vaddh_128B 6897 def int_hexagon_V6_vaddh_128B : 6898 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddh_128B">; 6899 6900 // 6901 // BUILTIN_INFO(HEXAGON.V6_vsubh,VI_ftype_VIVI,2) 6902 // tag : V6_vsubh 6903 def int_hexagon_V6_vsubh : 6904 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubh">; 6905 6906 // 6907 // BUILTIN_INFO(HEXAGON.V6_vsubh_128B,VI_ftype_VIVI,2) 6908 // tag : V6_vsubh_128B 6909 def int_hexagon_V6_vsubh_128B : 6910 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubh_128B">; 6911 6912 // 6913 // BUILTIN_INFO(HEXAGON.V6_vaddh_dv,VD_ftype_VDVD,2) 6914 // tag : V6_vaddh_dv 6915 def int_hexagon_V6_vaddh_dv : 6916 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddh_dv">; 6917 6918 // 6919 // BUILTIN_INFO(HEXAGON.V6_vaddh_dv_128B,VD_ftype_VDVD,2) 6920 // tag : V6_vaddh_dv_128B 6921 def int_hexagon_V6_vaddh_dv_128B : 6922 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddh_dv_128B">; 6923 6924 // 6925 // BUILTIN_INFO(HEXAGON.V6_vsubh_dv,VD_ftype_VDVD,2) 6926 // tag : V6_vsubh_dv 6927 def int_hexagon_V6_vsubh_dv : 6928 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubh_dv">; 6929 6930 // 6931 // BUILTIN_INFO(HEXAGON.V6_vsubh_dv_128B,VD_ftype_VDVD,2) 6932 // tag : V6_vsubh_dv_128B 6933 def int_hexagon_V6_vsubh_dv_128B : 6934 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubh_dv_128B">; 6935 6936 // 6937 // BUILTIN_INFO(HEXAGON.V6_vaddw,VI_ftype_VIVI,2) 6938 // tag : V6_vaddw 6939 def int_hexagon_V6_vaddw : 6940 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddw">; 6941 6942 // 6943 // BUILTIN_INFO(HEXAGON.V6_vaddw_128B,VI_ftype_VIVI,2) 6944 // tag : V6_vaddw_128B 6945 def int_hexagon_V6_vaddw_128B : 6946 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddw_128B">; 6947 6948 // 6949 // BUILTIN_INFO(HEXAGON.V6_vsubw,VI_ftype_VIVI,2) 6950 // tag : V6_vsubw 6951 def int_hexagon_V6_vsubw : 6952 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubw">; 6953 6954 // 6955 // BUILTIN_INFO(HEXAGON.V6_vsubw_128B,VI_ftype_VIVI,2) 6956 // tag : V6_vsubw_128B 6957 def int_hexagon_V6_vsubw_128B : 6958 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubw_128B">; 6959 6960 // 6961 // BUILTIN_INFO(HEXAGON.V6_vaddw_dv,VD_ftype_VDVD,2) 6962 // tag : V6_vaddw_dv 6963 def int_hexagon_V6_vaddw_dv : 6964 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddw_dv">; 6965 6966 // 6967 // BUILTIN_INFO(HEXAGON.V6_vaddw_dv_128B,VD_ftype_VDVD,2) 6968 // tag : V6_vaddw_dv_128B 6969 def int_hexagon_V6_vaddw_dv_128B : 6970 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddw_dv_128B">; 6971 6972 // 6973 // BUILTIN_INFO(HEXAGON.V6_vsubw_dv,VD_ftype_VDVD,2) 6974 // tag : V6_vsubw_dv 6975 def int_hexagon_V6_vsubw_dv : 6976 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubw_dv">; 6977 6978 // 6979 // BUILTIN_INFO(HEXAGON.V6_vsubw_dv_128B,VD_ftype_VDVD,2) 6980 // tag : V6_vsubw_dv_128B 6981 def int_hexagon_V6_vsubw_dv_128B : 6982 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubw_dv_128B">; 6983 6984 // 6985 // BUILTIN_INFO(HEXAGON.V6_vaddubsat,VI_ftype_VIVI,2) 6986 // tag : V6_vaddubsat 6987 def int_hexagon_V6_vaddubsat : 6988 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddubsat">; 6989 6990 // 6991 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_128B,VI_ftype_VIVI,2) 6992 // tag : V6_vaddubsat_128B 6993 def int_hexagon_V6_vaddubsat_128B : 6994 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddubsat_128B">; 6995 6996 // 6997 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_dv,VD_ftype_VDVD,2) 6998 // tag : V6_vaddubsat_dv 6999 def int_hexagon_V6_vaddubsat_dv : 7000 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddubsat_dv">; 7001 7002 // 7003 // BUILTIN_INFO(HEXAGON.V6_vaddubsat_dv_128B,VD_ftype_VDVD,2) 7004 // tag : V6_vaddubsat_dv_128B 7005 def int_hexagon_V6_vaddubsat_dv_128B : 7006 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddubsat_dv_128B">; 7007 7008 // 7009 // BUILTIN_INFO(HEXAGON.V6_vsububsat,VI_ftype_VIVI,2) 7010 // tag : V6_vsububsat 7011 def int_hexagon_V6_vsububsat : 7012 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsububsat">; 7013 7014 // 7015 // BUILTIN_INFO(HEXAGON.V6_vsububsat_128B,VI_ftype_VIVI,2) 7016 // tag : V6_vsububsat_128B 7017 def int_hexagon_V6_vsububsat_128B : 7018 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsububsat_128B">; 7019 7020 // 7021 // BUILTIN_INFO(HEXAGON.V6_vsububsat_dv,VD_ftype_VDVD,2) 7022 // tag : V6_vsububsat_dv 7023 def int_hexagon_V6_vsububsat_dv : 7024 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsububsat_dv">; 7025 7026 // 7027 // BUILTIN_INFO(HEXAGON.V6_vsububsat_dv_128B,VD_ftype_VDVD,2) 7028 // tag : V6_vsububsat_dv_128B 7029 def int_hexagon_V6_vsububsat_dv_128B : 7030 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsububsat_dv_128B">; 7031 7032 // 7033 // BUILTIN_INFO(HEXAGON.V6_vadduhsat,VI_ftype_VIVI,2) 7034 // tag : V6_vadduhsat 7035 def int_hexagon_V6_vadduhsat : 7036 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vadduhsat">; 7037 7038 // 7039 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_128B,VI_ftype_VIVI,2) 7040 // tag : V6_vadduhsat_128B 7041 def int_hexagon_V6_vadduhsat_128B : 7042 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduhsat_128B">; 7043 7044 // 7045 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_dv,VD_ftype_VDVD,2) 7046 // tag : V6_vadduhsat_dv 7047 def int_hexagon_V6_vadduhsat_dv : 7048 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduhsat_dv">; 7049 7050 // 7051 // BUILTIN_INFO(HEXAGON.V6_vadduhsat_dv_128B,VD_ftype_VDVD,2) 7052 // tag : V6_vadduhsat_dv_128B 7053 def int_hexagon_V6_vadduhsat_dv_128B : 7054 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vadduhsat_dv_128B">; 7055 7056 // 7057 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat,VI_ftype_VIVI,2) 7058 // tag : V6_vsubuhsat 7059 def int_hexagon_V6_vsubuhsat : 7060 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubuhsat">; 7061 7062 // 7063 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_128B,VI_ftype_VIVI,2) 7064 // tag : V6_vsubuhsat_128B 7065 def int_hexagon_V6_vsubuhsat_128B : 7066 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhsat_128B">; 7067 7068 // 7069 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_dv,VD_ftype_VDVD,2) 7070 // tag : V6_vsubuhsat_dv 7071 def int_hexagon_V6_vsubuhsat_dv : 7072 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhsat_dv">; 7073 7074 // 7075 // BUILTIN_INFO(HEXAGON.V6_vsubuhsat_dv_128B,VD_ftype_VDVD,2) 7076 // tag : V6_vsubuhsat_dv_128B 7077 def int_hexagon_V6_vsubuhsat_dv_128B : 7078 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubuhsat_dv_128B">; 7079 7080 // 7081 // BUILTIN_INFO(HEXAGON.V6_vaddhsat,VI_ftype_VIVI,2) 7082 // tag : V6_vaddhsat 7083 def int_hexagon_V6_vaddhsat : 7084 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddhsat">; 7085 7086 // 7087 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_128B,VI_ftype_VIVI,2) 7088 // tag : V6_vaddhsat_128B 7089 def int_hexagon_V6_vaddhsat_128B : 7090 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddhsat_128B">; 7091 7092 // 7093 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_dv,VD_ftype_VDVD,2) 7094 // tag : V6_vaddhsat_dv 7095 def int_hexagon_V6_vaddhsat_dv : 7096 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddhsat_dv">; 7097 7098 // 7099 // BUILTIN_INFO(HEXAGON.V6_vaddhsat_dv_128B,VD_ftype_VDVD,2) 7100 // tag : V6_vaddhsat_dv_128B 7101 def int_hexagon_V6_vaddhsat_dv_128B : 7102 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddhsat_dv_128B">; 7103 7104 // 7105 // BUILTIN_INFO(HEXAGON.V6_vsubhsat,VI_ftype_VIVI,2) 7106 // tag : V6_vsubhsat 7107 def int_hexagon_V6_vsubhsat : 7108 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubhsat">; 7109 7110 // 7111 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_128B,VI_ftype_VIVI,2) 7112 // tag : V6_vsubhsat_128B 7113 def int_hexagon_V6_vsubhsat_128B : 7114 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubhsat_128B">; 7115 7116 // 7117 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_dv,VD_ftype_VDVD,2) 7118 // tag : V6_vsubhsat_dv 7119 def int_hexagon_V6_vsubhsat_dv : 7120 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubhsat_dv">; 7121 7122 // 7123 // BUILTIN_INFO(HEXAGON.V6_vsubhsat_dv_128B,VD_ftype_VDVD,2) 7124 // tag : V6_vsubhsat_dv_128B 7125 def int_hexagon_V6_vsubhsat_dv_128B : 7126 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubhsat_dv_128B">; 7127 7128 // 7129 // BUILTIN_INFO(HEXAGON.V6_vaddwsat,VI_ftype_VIVI,2) 7130 // tag : V6_vaddwsat 7131 def int_hexagon_V6_vaddwsat : 7132 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vaddwsat">; 7133 7134 // 7135 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_128B,VI_ftype_VIVI,2) 7136 // tag : V6_vaddwsat_128B 7137 def int_hexagon_V6_vaddwsat_128B : 7138 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddwsat_128B">; 7139 7140 // 7141 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_dv,VD_ftype_VDVD,2) 7142 // tag : V6_vaddwsat_dv 7143 def int_hexagon_V6_vaddwsat_dv : 7144 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddwsat_dv">; 7145 7146 // 7147 // BUILTIN_INFO(HEXAGON.V6_vaddwsat_dv_128B,VD_ftype_VDVD,2) 7148 // tag : V6_vaddwsat_dv_128B 7149 def int_hexagon_V6_vaddwsat_dv_128B : 7150 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddwsat_dv_128B">; 7151 7152 // 7153 // BUILTIN_INFO(HEXAGON.V6_vsubwsat,VI_ftype_VIVI,2) 7154 // tag : V6_vsubwsat 7155 def int_hexagon_V6_vsubwsat : 7156 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsubwsat">; 7157 7158 // 7159 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_128B,VI_ftype_VIVI,2) 7160 // tag : V6_vsubwsat_128B 7161 def int_hexagon_V6_vsubwsat_128B : 7162 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubwsat_128B">; 7163 7164 // 7165 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_dv,VD_ftype_VDVD,2) 7166 // tag : V6_vsubwsat_dv 7167 def int_hexagon_V6_vsubwsat_dv : 7168 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubwsat_dv">; 7169 7170 // 7171 // BUILTIN_INFO(HEXAGON.V6_vsubwsat_dv_128B,VD_ftype_VDVD,2) 7172 // tag : V6_vsubwsat_dv_128B 7173 def int_hexagon_V6_vsubwsat_dv_128B : 7174 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubwsat_dv_128B">; 7175 7176 // 7177 // BUILTIN_INFO(HEXAGON.V6_vavgub,VI_ftype_VIVI,2) 7178 // tag : V6_vavgub 7179 def int_hexagon_V6_vavgub : 7180 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgub">; 7181 7182 // 7183 // BUILTIN_INFO(HEXAGON.V6_vavgub_128B,VI_ftype_VIVI,2) 7184 // tag : V6_vavgub_128B 7185 def int_hexagon_V6_vavgub_128B : 7186 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgub_128B">; 7187 7188 // 7189 // BUILTIN_INFO(HEXAGON.V6_vavgubrnd,VI_ftype_VIVI,2) 7190 // tag : V6_vavgubrnd 7191 def int_hexagon_V6_vavgubrnd : 7192 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgubrnd">; 7193 7194 // 7195 // BUILTIN_INFO(HEXAGON.V6_vavgubrnd_128B,VI_ftype_VIVI,2) 7196 // tag : V6_vavgubrnd_128B 7197 def int_hexagon_V6_vavgubrnd_128B : 7198 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgubrnd_128B">; 7199 7200 // 7201 // BUILTIN_INFO(HEXAGON.V6_vavguh,VI_ftype_VIVI,2) 7202 // tag : V6_vavguh 7203 def int_hexagon_V6_vavguh : 7204 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavguh">; 7205 7206 // 7207 // BUILTIN_INFO(HEXAGON.V6_vavguh_128B,VI_ftype_VIVI,2) 7208 // tag : V6_vavguh_128B 7209 def int_hexagon_V6_vavguh_128B : 7210 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavguh_128B">; 7211 7212 // 7213 // BUILTIN_INFO(HEXAGON.V6_vavguhrnd,VI_ftype_VIVI,2) 7214 // tag : V6_vavguhrnd 7215 def int_hexagon_V6_vavguhrnd : 7216 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavguhrnd">; 7217 7218 // 7219 // BUILTIN_INFO(HEXAGON.V6_vavguhrnd_128B,VI_ftype_VIVI,2) 7220 // tag : V6_vavguhrnd_128B 7221 def int_hexagon_V6_vavguhrnd_128B : 7222 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavguhrnd_128B">; 7223 7224 // 7225 // BUILTIN_INFO(HEXAGON.V6_vavgh,VI_ftype_VIVI,2) 7226 // tag : V6_vavgh 7227 def int_hexagon_V6_vavgh : 7228 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgh">; 7229 7230 // 7231 // BUILTIN_INFO(HEXAGON.V6_vavgh_128B,VI_ftype_VIVI,2) 7232 // tag : V6_vavgh_128B 7233 def int_hexagon_V6_vavgh_128B : 7234 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgh_128B">; 7235 7236 // 7237 // BUILTIN_INFO(HEXAGON.V6_vavghrnd,VI_ftype_VIVI,2) 7238 // tag : V6_vavghrnd 7239 def int_hexagon_V6_vavghrnd : 7240 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavghrnd">; 7241 7242 // 7243 // BUILTIN_INFO(HEXAGON.V6_vavghrnd_128B,VI_ftype_VIVI,2) 7244 // tag : V6_vavghrnd_128B 7245 def int_hexagon_V6_vavghrnd_128B : 7246 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavghrnd_128B">; 7247 7248 // 7249 // BUILTIN_INFO(HEXAGON.V6_vnavgh,VI_ftype_VIVI,2) 7250 // tag : V6_vnavgh 7251 def int_hexagon_V6_vnavgh : 7252 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgh">; 7253 7254 // 7255 // BUILTIN_INFO(HEXAGON.V6_vnavgh_128B,VI_ftype_VIVI,2) 7256 // tag : V6_vnavgh_128B 7257 def int_hexagon_V6_vnavgh_128B : 7258 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgh_128B">; 7259 7260 // 7261 // BUILTIN_INFO(HEXAGON.V6_vavgw,VI_ftype_VIVI,2) 7262 // tag : V6_vavgw 7263 def int_hexagon_V6_vavgw : 7264 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgw">; 7265 7266 // 7267 // BUILTIN_INFO(HEXAGON.V6_vavgw_128B,VI_ftype_VIVI,2) 7268 // tag : V6_vavgw_128B 7269 def int_hexagon_V6_vavgw_128B : 7270 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgw_128B">; 7271 7272 // 7273 // BUILTIN_INFO(HEXAGON.V6_vavgwrnd,VI_ftype_VIVI,2) 7274 // tag : V6_vavgwrnd 7275 def int_hexagon_V6_vavgwrnd : 7276 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vavgwrnd">; 7277 7278 // 7279 // BUILTIN_INFO(HEXAGON.V6_vavgwrnd_128B,VI_ftype_VIVI,2) 7280 // tag : V6_vavgwrnd_128B 7281 def int_hexagon_V6_vavgwrnd_128B : 7282 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vavgwrnd_128B">; 7283 7284 // 7285 // BUILTIN_INFO(HEXAGON.V6_vnavgw,VI_ftype_VIVI,2) 7286 // tag : V6_vnavgw 7287 def int_hexagon_V6_vnavgw : 7288 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgw">; 7289 7290 // 7291 // BUILTIN_INFO(HEXAGON.V6_vnavgw_128B,VI_ftype_VIVI,2) 7292 // tag : V6_vnavgw_128B 7293 def int_hexagon_V6_vnavgw_128B : 7294 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgw_128B">; 7295 7296 // 7297 // BUILTIN_INFO(HEXAGON.V6_vabsdiffub,VI_ftype_VIVI,2) 7298 // tag : V6_vabsdiffub 7299 def int_hexagon_V6_vabsdiffub : 7300 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffub">; 7301 7302 // 7303 // BUILTIN_INFO(HEXAGON.V6_vabsdiffub_128B,VI_ftype_VIVI,2) 7304 // tag : V6_vabsdiffub_128B 7305 def int_hexagon_V6_vabsdiffub_128B : 7306 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffub_128B">; 7307 7308 // 7309 // BUILTIN_INFO(HEXAGON.V6_vabsdiffuh,VI_ftype_VIVI,2) 7310 // tag : V6_vabsdiffuh 7311 def int_hexagon_V6_vabsdiffuh : 7312 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffuh">; 7313 7314 // 7315 // BUILTIN_INFO(HEXAGON.V6_vabsdiffuh_128B,VI_ftype_VIVI,2) 7316 // tag : V6_vabsdiffuh_128B 7317 def int_hexagon_V6_vabsdiffuh_128B : 7318 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffuh_128B">; 7319 7320 // 7321 // BUILTIN_INFO(HEXAGON.V6_vabsdiffh,VI_ftype_VIVI,2) 7322 // tag : V6_vabsdiffh 7323 def int_hexagon_V6_vabsdiffh : 7324 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffh">; 7325 7326 // 7327 // BUILTIN_INFO(HEXAGON.V6_vabsdiffh_128B,VI_ftype_VIVI,2) 7328 // tag : V6_vabsdiffh_128B 7329 def int_hexagon_V6_vabsdiffh_128B : 7330 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffh_128B">; 7331 7332 // 7333 // BUILTIN_INFO(HEXAGON.V6_vabsdiffw,VI_ftype_VIVI,2) 7334 // tag : V6_vabsdiffw 7335 def int_hexagon_V6_vabsdiffw : 7336 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vabsdiffw">; 7337 7338 // 7339 // BUILTIN_INFO(HEXAGON.V6_vabsdiffw_128B,VI_ftype_VIVI,2) 7340 // tag : V6_vabsdiffw_128B 7341 def int_hexagon_V6_vabsdiffw_128B : 7342 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vabsdiffw_128B">; 7343 7344 // 7345 // BUILTIN_INFO(HEXAGON.V6_vnavgub,VI_ftype_VIVI,2) 7346 // tag : V6_vnavgub 7347 def int_hexagon_V6_vnavgub : 7348 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vnavgub">; 7349 7350 // 7351 // BUILTIN_INFO(HEXAGON.V6_vnavgub_128B,VI_ftype_VIVI,2) 7352 // tag : V6_vnavgub_128B 7353 def int_hexagon_V6_vnavgub_128B : 7354 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vnavgub_128B">; 7355 7356 // 7357 // BUILTIN_INFO(HEXAGON.V6_vaddubh,VD_ftype_VIVI,2) 7358 // tag : V6_vaddubh 7359 def int_hexagon_V6_vaddubh : 7360 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vaddubh">; 7361 7362 // 7363 // BUILTIN_INFO(HEXAGON.V6_vaddubh_128B,VD_ftype_VIVI,2) 7364 // tag : V6_vaddubh_128B 7365 def int_hexagon_V6_vaddubh_128B : 7366 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddubh_128B">; 7367 7368 // 7369 // BUILTIN_INFO(HEXAGON.V6_vsububh,VD_ftype_VIVI,2) 7370 // tag : V6_vsububh 7371 def int_hexagon_V6_vsububh : 7372 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsububh">; 7373 7374 // 7375 // BUILTIN_INFO(HEXAGON.V6_vsububh_128B,VD_ftype_VIVI,2) 7376 // tag : V6_vsububh_128B 7377 def int_hexagon_V6_vsububh_128B : 7378 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsububh_128B">; 7379 7380 // 7381 // BUILTIN_INFO(HEXAGON.V6_vaddhw,VD_ftype_VIVI,2) 7382 // tag : V6_vaddhw 7383 def int_hexagon_V6_vaddhw : 7384 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vaddhw">; 7385 7386 // 7387 // BUILTIN_INFO(HEXAGON.V6_vaddhw_128B,VD_ftype_VIVI,2) 7388 // tag : V6_vaddhw_128B 7389 def int_hexagon_V6_vaddhw_128B : 7390 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddhw_128B">; 7391 7392 // 7393 // BUILTIN_INFO(HEXAGON.V6_vsubhw,VD_ftype_VIVI,2) 7394 // tag : V6_vsubhw 7395 def int_hexagon_V6_vsubhw : 7396 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsubhw">; 7397 7398 // 7399 // BUILTIN_INFO(HEXAGON.V6_vsubhw_128B,VD_ftype_VIVI,2) 7400 // tag : V6_vsubhw_128B 7401 def int_hexagon_V6_vsubhw_128B : 7402 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsubhw_128B">; 7403 7404 // 7405 // BUILTIN_INFO(HEXAGON.V6_vadduhw,VD_ftype_VIVI,2) 7406 // tag : V6_vadduhw 7407 def int_hexagon_V6_vadduhw : 7408 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vadduhw">; 7409 7410 // 7411 // BUILTIN_INFO(HEXAGON.V6_vadduhw_128B,VD_ftype_VIVI,2) 7412 // tag : V6_vadduhw_128B 7413 def int_hexagon_V6_vadduhw_128B : 7414 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vadduhw_128B">; 7415 7416 // 7417 // BUILTIN_INFO(HEXAGON.V6_vsubuhw,VD_ftype_VIVI,2) 7418 // tag : V6_vsubuhw 7419 def int_hexagon_V6_vsubuhw : 7420 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vsubuhw">; 7421 7422 // 7423 // BUILTIN_INFO(HEXAGON.V6_vsubuhw_128B,VD_ftype_VIVI,2) 7424 // tag : V6_vsubuhw_128B 7425 def int_hexagon_V6_vsubuhw_128B : 7426 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vsubuhw_128B">; 7427 7428 // 7429 // BUILTIN_INFO(HEXAGON.V6_vd0,VI_ftype_,0) 7430 // tag : V6_vd0 7431 def int_hexagon_V6_vd0 : 7432 Hexagon_v512_Intrinsic<"HEXAGON_V6_vd0">; 7433 7434 // 7435 // BUILTIN_INFO(HEXAGON.V6_vd0_128B,VI_ftype_,0) 7436 // tag : V6_vd0_128B 7437 def int_hexagon_V6_vd0_128B : 7438 Hexagon_v1024_Intrinsic<"HEXAGON_V6_vd0_128B">; 7439 7440 // 7441 // BUILTIN_INFO(HEXAGON.V6_vaddbq,VI_ftype_QVVIVI,3) 7442 // tag : V6_vaddbq 7443 def int_hexagon_V6_vaddbq : 7444 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddbq">; 7445 7446 // 7447 // BUILTIN_INFO(HEXAGON.V6_vaddbq_128B,VI_ftype_QVVIVI,3) 7448 // tag : V6_vaddbq_128B 7449 def int_hexagon_V6_vaddbq_128B : 7450 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddbq_128B">; 7451 7452 7453 // 7454 // BUILTIN_INFO(HEXAGON.V6_vsubbq,VI_ftype_QVVIVI,3) 7455 // tag : V6_vsubbq 7456 def int_hexagon_V6_vsubbq : 7457 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubbq">; 7458 7459 // 7460 // BUILTIN_INFO(HEXAGON.V6_vsubbq_128B,VI_ftype_QVVIVI,3) 7461 // tag : V6_vsubbq_128B 7462 def int_hexagon_V6_vsubbq_128B : 7463 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubbq_128B">; 7464 7465 // 7466 // BUILTIN_INFO(HEXAGON.V6_vaddbnq,VI_ftype_QVVIVI,3) 7467 // tag : V6_vaddbnq 7468 def int_hexagon_V6_vaddbnq : 7469 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddbnq">; 7470 7471 // 7472 // BUILTIN_INFO(HEXAGON.V6_vaddbnq_128B,VI_ftype_QVVIVI,3) 7473 // tag : V6_vaddbnq_128B 7474 def int_hexagon_V6_vaddbnq_128B : 7475 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddbnq_128B">; 7476 7477 // 7478 // BUILTIN_INFO(HEXAGON.V6_vsubbnq,VI_ftype_QVVIVI,3) 7479 // tag : V6_vsubbnq 7480 def int_hexagon_V6_vsubbnq : 7481 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubbnq">; 7482 7483 // 7484 // BUILTIN_INFO(HEXAGON.V6_vsubbnq_128B,VI_ftype_QVVIVI,3) 7485 // tag : V6_vsubbnq_128B 7486 def int_hexagon_V6_vsubbnq_128B : 7487 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubbnq_128B">; 7488 7489 // 7490 // BUILTIN_INFO(HEXAGON.V6_vaddhq,VI_ftype_QVVIVI,3) 7491 // tag : V6_vaddhq 7492 def int_hexagon_V6_vaddhq : 7493 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddhq">; 7494 7495 // 7496 // BUILTIN_INFO(HEXAGON.V6_vaddhq_128B,VI_ftype_QVVIVI,3) 7497 // tag : V6_vaddhq_128B 7498 def int_hexagon_V6_vaddhq_128B : 7499 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddhq_128B">; 7500 7501 // 7502 // BUILTIN_INFO(HEXAGON.V6_vsubhq,VI_ftype_QVVIVI,3) 7503 // tag : V6_vsubhq 7504 def int_hexagon_V6_vsubhq : 7505 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubhq">; 7506 7507 // 7508 // BUILTIN_INFO(HEXAGON.V6_vsubhq_128B,VI_ftype_QVVIVI,3) 7509 // tag : V6_vsubhq_128B 7510 def int_hexagon_V6_vsubhq_128B : 7511 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubhq_128B">; 7512 7513 // 7514 // BUILTIN_INFO(HEXAGON.V6_vaddhnq,VI_ftype_QVVIVI,3) 7515 // tag : V6_vaddhnq 7516 def int_hexagon_V6_vaddhnq : 7517 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddhnq">; 7518 7519 // 7520 // BUILTIN_INFO(HEXAGON.V6_vaddhnq_128B,VI_ftype_QVVIVI,3) 7521 // tag : V6_vaddhnq_128B 7522 def int_hexagon_V6_vaddhnq_128B : 7523 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddhnq_128B">; 7524 7525 // 7526 // BUILTIN_INFO(HEXAGON.V6_vsubhnq,VI_ftype_QVVIVI,3) 7527 // tag : V6_vsubhnq 7528 def int_hexagon_V6_vsubhnq : 7529 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubhnq">; 7530 7531 // 7532 // BUILTIN_INFO(HEXAGON.V6_vsubhnq_128B,VI_ftype_QVVIVI,3) 7533 // tag : V6_vsubhnq_128B 7534 def int_hexagon_V6_vsubhnq_128B : 7535 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubhnq_128B">; 7536 7537 // 7538 // BUILTIN_INFO(HEXAGON.V6_vaddwq,VI_ftype_QVVIVI,3) 7539 // tag : V6_vaddwq 7540 def int_hexagon_V6_vaddwq : 7541 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddwq">; 7542 7543 // 7544 // BUILTIN_INFO(HEXAGON.V6_vaddwq_128B,VI_ftype_QVVIVI,3) 7545 // tag : V6_vaddwq_128B 7546 def int_hexagon_V6_vaddwq_128B : 7547 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddwq_128B">; 7548 7549 // 7550 // BUILTIN_INFO(HEXAGON.V6_vsubwq,VI_ftype_QVVIVI,3) 7551 // tag : V6_vsubwq 7552 def int_hexagon_V6_vsubwq : 7553 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubwq">; 7554 7555 // 7556 // BUILTIN_INFO(HEXAGON.V6_vsubwq_128B,VI_ftype_QVVIVI,3) 7557 // tag : V6_vsubwq_128B 7558 def int_hexagon_V6_vsubwq_128B : 7559 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubwq_128B">; 7560 7561 // 7562 // BUILTIN_INFO(HEXAGON.V6_vaddwnq,VI_ftype_QVVIVI,3) 7563 // tag : V6_vaddwnq 7564 def int_hexagon_V6_vaddwnq : 7565 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vaddwnq">; 7566 7567 // 7568 // BUILTIN_INFO(HEXAGON.V6_vaddwnq_128B,VI_ftype_QVVIVI,3) 7569 // tag : V6_vaddwnq_128B 7570 def int_hexagon_V6_vaddwnq_128B : 7571 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vaddwnq_128B">; 7572 7573 // 7574 // BUILTIN_INFO(HEXAGON.V6_vsubwnq,VI_ftype_QVVIVI,3) 7575 // tag : V6_vsubwnq 7576 def int_hexagon_V6_vsubwnq : 7577 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vsubwnq">; 7578 7579 // 7580 // BUILTIN_INFO(HEXAGON.V6_vsubwnq_128B,VI_ftype_QVVIVI,3) 7581 // tag : V6_vsubwnq_128B 7582 def int_hexagon_V6_vsubwnq_128B : 7583 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vsubwnq_128B">; 7584 7585 // 7586 // BUILTIN_INFO(HEXAGON.V6_vabsh,VI_ftype_VI,1) 7587 // tag : V6_vabsh 7588 def int_hexagon_V6_vabsh : 7589 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsh">; 7590 7591 // 7592 // BUILTIN_INFO(HEXAGON.V6_vabsh_128B,VI_ftype_VI,1) 7593 // tag : V6_vabsh_128B 7594 def int_hexagon_V6_vabsh_128B : 7595 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsh_128B">; 7596 7597 // 7598 // BUILTIN_INFO(HEXAGON.V6_vabsh_sat,VI_ftype_VI,1) 7599 // tag : V6_vabsh_sat 7600 def int_hexagon_V6_vabsh_sat : 7601 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsh_sat">; 7602 7603 // 7604 // BUILTIN_INFO(HEXAGON.V6_vabsh_sat_128B,VI_ftype_VI,1) 7605 // tag : V6_vabsh_sat_128B 7606 def int_hexagon_V6_vabsh_sat_128B : 7607 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsh_sat_128B">; 7608 7609 // 7610 // BUILTIN_INFO(HEXAGON.V6_vabsw,VI_ftype_VI,1) 7611 // tag : V6_vabsw 7612 def int_hexagon_V6_vabsw : 7613 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsw">; 7614 7615 // 7616 // BUILTIN_INFO(HEXAGON.V6_vabsw_128B,VI_ftype_VI,1) 7617 // tag : V6_vabsw_128B 7618 def int_hexagon_V6_vabsw_128B : 7619 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsw_128B">; 7620 7621 // 7622 // BUILTIN_INFO(HEXAGON.V6_vabsw_sat,VI_ftype_VI,1) 7623 // tag : V6_vabsw_sat 7624 def int_hexagon_V6_vabsw_sat : 7625 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vabsw_sat">; 7626 7627 // 7628 // BUILTIN_INFO(HEXAGON.V6_vabsw_sat_128B,VI_ftype_VI,1) 7629 // tag : V6_vabsw_sat_128B 7630 def int_hexagon_V6_vabsw_sat_128B : 7631 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vabsw_sat_128B">; 7632 7633 // 7634 // BUILTIN_INFO(HEXAGON.V6_vmpybv,VD_ftype_VIVI,2) 7635 // tag : V6_vmpybv 7636 def int_hexagon_V6_vmpybv : 7637 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybv">; 7638 7639 // 7640 // BUILTIN_INFO(HEXAGON.V6_vmpybv_128B,VD_ftype_VIVI,2) 7641 // tag : V6_vmpybv_128B 7642 def int_hexagon_V6_vmpybv_128B : 7643 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybv_128B">; 7644 7645 // 7646 // BUILTIN_INFO(HEXAGON.V6_vmpybv_acc,VD_ftype_VDVIVI,3) 7647 // tag : V6_vmpybv_acc 7648 def int_hexagon_V6_vmpybv_acc : 7649 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybv_acc">; 7650 7651 // 7652 // BUILTIN_INFO(HEXAGON.V6_vmpybv_acc_128B,VD_ftype_VDVIVI,3) 7653 // tag : V6_vmpybv_acc_128B 7654 def int_hexagon_V6_vmpybv_acc_128B : 7655 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybv_acc_128B">; 7656 7657 // 7658 // BUILTIN_INFO(HEXAGON.V6_vmpyubv,VD_ftype_VIVI,2) 7659 // tag : V6_vmpyubv 7660 def int_hexagon_V6_vmpyubv : 7661 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyubv">; 7662 7663 // 7664 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_128B,VD_ftype_VIVI,2) 7665 // tag : V6_vmpyubv_128B 7666 def int_hexagon_V6_vmpyubv_128B : 7667 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyubv_128B">; 7668 7669 // 7670 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_acc,VD_ftype_VDVIVI,3) 7671 // tag : V6_vmpyubv_acc 7672 def int_hexagon_V6_vmpyubv_acc : 7673 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyubv_acc">; 7674 7675 // 7676 // BUILTIN_INFO(HEXAGON.V6_vmpyubv_acc_128B,VD_ftype_VDVIVI,3) 7677 // tag : V6_vmpyubv_acc_128B 7678 def int_hexagon_V6_vmpyubv_acc_128B : 7679 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyubv_acc_128B">; 7680 7681 // 7682 // BUILTIN_INFO(HEXAGON.V6_vmpybusv,VD_ftype_VIVI,2) 7683 // tag : V6_vmpybusv 7684 def int_hexagon_V6_vmpybusv : 7685 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybusv">; 7686 7687 // 7688 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_128B,VD_ftype_VIVI,2) 7689 // tag : V6_vmpybusv_128B 7690 def int_hexagon_V6_vmpybusv_128B : 7691 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybusv_128B">; 7692 7693 // 7694 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_acc,VD_ftype_VDVIVI,3) 7695 // tag : V6_vmpybusv_acc 7696 def int_hexagon_V6_vmpybusv_acc : 7697 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpybusv_acc">; 7698 7699 // 7700 // BUILTIN_INFO(HEXAGON.V6_vmpybusv_acc_128B,VD_ftype_VDVIVI,3) 7701 // tag : V6_vmpybusv_acc_128B 7702 def int_hexagon_V6_vmpybusv_acc_128B : 7703 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpybusv_acc_128B">; 7704 7705 // 7706 // BUILTIN_INFO(HEXAGON.V6_vmpabusv,VD_ftype_VDVD,2) 7707 // tag : V6_vmpabusv 7708 def int_hexagon_V6_vmpabusv : 7709 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpabusv">; 7710 7711 // 7712 // BUILTIN_INFO(HEXAGON.V6_vmpabusv_128B,VD_ftype_VDVD,2) 7713 // tag : V6_vmpabusv_128B 7714 def int_hexagon_V6_vmpabusv_128B : 7715 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vmpabusv_128B">; 7716 7717 // 7718 // BUILTIN_INFO(HEXAGON.V6_vmpabuuv,VD_ftype_VDVD,2) 7719 // tag : V6_vmpabuuv 7720 def int_hexagon_V6_vmpabuuv : 7721 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpabuuv">; 7722 7723 // 7724 // BUILTIN_INFO(HEXAGON.V6_vmpabuuv_128B,VD_ftype_VDVD,2) 7725 // tag : V6_vmpabuuv_128B 7726 def int_hexagon_V6_vmpabuuv_128B : 7727 Hexagon_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vmpabuuv_128B">; 7728 7729 // 7730 // BUILTIN_INFO(HEXAGON.V6_vmpyhv,VD_ftype_VIVI,2) 7731 // tag : V6_vmpyhv 7732 def int_hexagon_V6_vmpyhv : 7733 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhv">; 7734 7735 // 7736 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_128B,VD_ftype_VIVI,2) 7737 // tag : V6_vmpyhv_128B 7738 def int_hexagon_V6_vmpyhv_128B : 7739 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhv_128B">; 7740 7741 // 7742 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_acc,VD_ftype_VDVIVI,3) 7743 // tag : V6_vmpyhv_acc 7744 def int_hexagon_V6_vmpyhv_acc : 7745 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhv_acc">; 7746 7747 // 7748 // BUILTIN_INFO(HEXAGON.V6_vmpyhv_acc_128B,VD_ftype_VDVIVI,3) 7749 // tag : V6_vmpyhv_acc_128B 7750 def int_hexagon_V6_vmpyhv_acc_128B : 7751 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhv_acc_128B">; 7752 7753 // 7754 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv,VD_ftype_VIVI,2) 7755 // tag : V6_vmpyuhv 7756 def int_hexagon_V6_vmpyuhv : 7757 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyuhv">; 7758 7759 // 7760 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_128B,VD_ftype_VIVI,2) 7761 // tag : V6_vmpyuhv_128B 7762 def int_hexagon_V6_vmpyuhv_128B : 7763 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyuhv_128B">; 7764 7765 // 7766 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_acc,VD_ftype_VDVIVI,3) 7767 // tag : V6_vmpyuhv_acc 7768 def int_hexagon_V6_vmpyuhv_acc : 7769 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyuhv_acc">; 7770 7771 // 7772 // BUILTIN_INFO(HEXAGON.V6_vmpyuhv_acc_128B,VD_ftype_VDVIVI,3) 7773 // tag : V6_vmpyuhv_acc_128B 7774 def int_hexagon_V6_vmpyuhv_acc_128B : 7775 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyuhv_acc_128B">; 7776 7777 // 7778 // BUILTIN_INFO(HEXAGON.V6_vmpyhvsrs,VI_ftype_VIVI,2) 7779 // tag : V6_vmpyhvsrs 7780 def int_hexagon_V6_vmpyhvsrs : 7781 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyhvsrs">; 7782 7783 // 7784 // BUILTIN_INFO(HEXAGON.V6_vmpyhvsrs_128B,VI_ftype_VIVI,2) 7785 // tag : V6_vmpyhvsrs_128B 7786 def int_hexagon_V6_vmpyhvsrs_128B : 7787 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhvsrs_128B">; 7788 7789 // 7790 // BUILTIN_INFO(HEXAGON.V6_vmpyhus,VD_ftype_VIVI,2) 7791 // tag : V6_vmpyhus 7792 def int_hexagon_V6_vmpyhus : 7793 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhus">; 7794 7795 // 7796 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_128B,VD_ftype_VIVI,2) 7797 // tag : V6_vmpyhus_128B 7798 def int_hexagon_V6_vmpyhus_128B : 7799 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhus_128B">; 7800 7801 // 7802 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_acc,VD_ftype_VDVIVI,3) 7803 // tag : V6_vmpyhus_acc 7804 def int_hexagon_V6_vmpyhus_acc : 7805 Hexagon_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyhus_acc">; 7806 7807 // 7808 // BUILTIN_INFO(HEXAGON.V6_vmpyhus_acc_128B,VD_ftype_VDVIVI,3) 7809 // tag : V6_vmpyhus_acc_128B 7810 def int_hexagon_V6_vmpyhus_acc_128B : 7811 Hexagon_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyhus_acc_128B">; 7812 7813 // 7814 // BUILTIN_INFO(HEXAGON.V6_vmpyih,VI_ftype_VIVI,2) 7815 // tag : V6_vmpyih 7816 def int_hexagon_V6_vmpyih : 7817 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyih">; 7818 7819 // 7820 // BUILTIN_INFO(HEXAGON.V6_vmpyih_128B,VI_ftype_VIVI,2) 7821 // tag : V6_vmpyih_128B 7822 def int_hexagon_V6_vmpyih_128B : 7823 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyih_128B">; 7824 7825 // 7826 // BUILTIN_INFO(HEXAGON.V6_vmpyih_acc,VI_ftype_VIVIVI,3) 7827 // tag : V6_vmpyih_acc 7828 def int_hexagon_V6_vmpyih_acc : 7829 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyih_acc">; 7830 7831 // 7832 // BUILTIN_INFO(HEXAGON.V6_vmpyih_acc_128B,VI_ftype_VIVIVI,3) 7833 // tag : V6_vmpyih_acc_128B 7834 def int_hexagon_V6_vmpyih_acc_128B : 7835 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyih_acc_128B">; 7836 7837 // 7838 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh,VI_ftype_VIVI,2) 7839 // tag : V6_vmpyewuh 7840 def int_hexagon_V6_vmpyewuh : 7841 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyewuh">; 7842 7843 // 7844 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_128B,VI_ftype_VIVI,2) 7845 // tag : V6_vmpyewuh_128B 7846 def int_hexagon_V6_vmpyewuh_128B : 7847 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyewuh_128B">; 7848 7849 // 7850 // BUILTIN_INFO(HEXAGON.V6_vmpyowh,VI_ftype_VIVI,2) 7851 // tag : V6_vmpyowh 7852 def int_hexagon_V6_vmpyowh : 7853 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh">; 7854 7855 // 7856 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_128B,VI_ftype_VIVI,2) 7857 // tag : V6_vmpyowh_128B 7858 def int_hexagon_V6_vmpyowh_128B : 7859 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_128B">; 7860 7861 // 7862 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd,VI_ftype_VIVI,2) 7863 // tag : V6_vmpyowh_rnd 7864 def int_hexagon_V6_vmpyowh_rnd : 7865 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_rnd">; 7866 7867 // 7868 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_128B,VI_ftype_VIVI,2) 7869 // tag : V6_vmpyowh_rnd_128B 7870 def int_hexagon_V6_vmpyowh_rnd_128B : 7871 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_128B">; 7872 7873 // 7874 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_sacc,VI_ftype_VIVIVI,3) 7875 // tag : V6_vmpyowh_sacc 7876 def int_hexagon_V6_vmpyowh_sacc : 7877 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_sacc">; 7878 7879 // 7880 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_sacc_128B,VI_ftype_VIVIVI,3) 7881 // tag : V6_vmpyowh_sacc_128B 7882 def int_hexagon_V6_vmpyowh_sacc_128B : 7883 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_sacc_128B">; 7884 7885 // 7886 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_sacc,VI_ftype_VIVIVI,3) 7887 // tag : V6_vmpyowh_rnd_sacc 7888 def int_hexagon_V6_vmpyowh_rnd_sacc : 7889 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_sacc">; 7890 7891 // 7892 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_rnd_sacc_128B,VI_ftype_VIVIVI,3) 7893 // tag : V6_vmpyowh_rnd_sacc_128B 7894 def int_hexagon_V6_vmpyowh_rnd_sacc_128B : 7895 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_rnd_sacc_128B">; 7896 7897 // 7898 // BUILTIN_INFO(HEXAGON.V6_vmpyieoh,VI_ftype_VIVI,2) 7899 // tag : V6_vmpyieoh 7900 def int_hexagon_V6_vmpyieoh : 7901 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyieoh">; 7902 7903 // 7904 // BUILTIN_INFO(HEXAGON.V6_vmpyieoh_128B,VI_ftype_VIVI,2) 7905 // tag : V6_vmpyieoh_128B 7906 def int_hexagon_V6_vmpyieoh_128B : 7907 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyieoh_128B">; 7908 7909 // 7910 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh,VI_ftype_VIVI,2) 7911 // tag : V6_vmpyiewuh 7912 def int_hexagon_V6_vmpyiewuh : 7913 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewuh">; 7914 7915 // 7916 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_128B,VI_ftype_VIVI,2) 7917 // tag : V6_vmpyiewuh_128B 7918 def int_hexagon_V6_vmpyiewuh_128B : 7919 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewuh_128B">; 7920 7921 // 7922 // BUILTIN_INFO(HEXAGON.V6_vmpyiowh,VI_ftype_VIVI,2) 7923 // tag : V6_vmpyiowh 7924 def int_hexagon_V6_vmpyiowh : 7925 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiowh">; 7926 7927 // 7928 // BUILTIN_INFO(HEXAGON.V6_vmpyiowh_128B,VI_ftype_VIVI,2) 7929 // tag : V6_vmpyiowh_128B 7930 def int_hexagon_V6_vmpyiowh_128B : 7931 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiowh_128B">; 7932 7933 // 7934 // BUILTIN_INFO(HEXAGON.V6_vmpyiewh_acc,VI_ftype_VIVIVI,3) 7935 // tag : V6_vmpyiewh_acc 7936 def int_hexagon_V6_vmpyiewh_acc : 7937 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewh_acc">; 7938 7939 // 7940 // BUILTIN_INFO(HEXAGON.V6_vmpyiewh_acc_128B,VI_ftype_VIVIVI,3) 7941 // tag : V6_vmpyiewh_acc_128B 7942 def int_hexagon_V6_vmpyiewh_acc_128B : 7943 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewh_acc_128B">; 7944 7945 // 7946 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_acc,VI_ftype_VIVIVI,3) 7947 // tag : V6_vmpyiewuh_acc 7948 def int_hexagon_V6_vmpyiewuh_acc : 7949 Hexagon_v512v512v512v512_Intrinsic<"HEXAGON_V6_vmpyiewuh_acc">; 7950 7951 // 7952 // BUILTIN_INFO(HEXAGON.V6_vmpyiewuh_acc_128B,VI_ftype_VIVIVI,3) 7953 // tag : V6_vmpyiewuh_acc_128B 7954 def int_hexagon_V6_vmpyiewuh_acc_128B : 7955 Hexagon_v1024v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmpyiewuh_acc_128B">; 7956 7957 // 7958 // BUILTIN_INFO(HEXAGON.V6_vmpyub,VD_ftype_VISI,2) 7959 // tag : V6_vmpyub 7960 def int_hexagon_V6_vmpyub : 7961 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyub">; 7962 7963 // 7964 // BUILTIN_INFO(HEXAGON.V6_vmpyub_128B,VD_ftype_VISI,2) 7965 // tag : V6_vmpyub_128B 7966 def int_hexagon_V6_vmpyub_128B : 7967 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyub_128B">; 7968 7969 // 7970 // BUILTIN_INFO(HEXAGON.V6_vmpyub_acc,VD_ftype_VDVISI,3) 7971 // tag : V6_vmpyub_acc 7972 def int_hexagon_V6_vmpyub_acc : 7973 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyub_acc">; 7974 7975 // 7976 // BUILTIN_INFO(HEXAGON.V6_vmpyub_acc_128B,VD_ftype_VDVISI,3) 7977 // tag : V6_vmpyub_acc_128B 7978 def int_hexagon_V6_vmpyub_acc_128B : 7979 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyub_acc_128B">; 7980 7981 // 7982 // BUILTIN_INFO(HEXAGON.V6_vmpybus,VD_ftype_VISI,2) 7983 // tag : V6_vmpybus 7984 def int_hexagon_V6_vmpybus : 7985 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpybus">; 7986 7987 // 7988 // BUILTIN_INFO(HEXAGON.V6_vmpybus_128B,VD_ftype_VISI,2) 7989 // tag : V6_vmpybus_128B 7990 def int_hexagon_V6_vmpybus_128B : 7991 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpybus_128B">; 7992 7993 // 7994 // BUILTIN_INFO(HEXAGON.V6_vmpybus_acc,VD_ftype_VDVISI,3) 7995 // tag : V6_vmpybus_acc 7996 def int_hexagon_V6_vmpybus_acc : 7997 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpybus_acc">; 7998 7999 // 8000 // BUILTIN_INFO(HEXAGON.V6_vmpybus_acc_128B,VD_ftype_VDVISI,3) 8001 // tag : V6_vmpybus_acc_128B 8002 def int_hexagon_V6_vmpybus_acc_128B : 8003 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpybus_acc_128B">; 8004 8005 // 8006 // BUILTIN_INFO(HEXAGON.V6_vmpabus,VD_ftype_VDSI,2) 8007 // tag : V6_vmpabus 8008 def int_hexagon_V6_vmpabus : 8009 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpabus">; 8010 8011 // 8012 // BUILTIN_INFO(HEXAGON.V6_vmpabus_128B,VD_ftype_VDSI,2) 8013 // tag : V6_vmpabus_128B 8014 def int_hexagon_V6_vmpabus_128B : 8015 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpabus_128B">; 8016 8017 // 8018 // BUILTIN_INFO(HEXAGON.V6_vmpabus_acc,VD_ftype_VDVDSI,3) 8019 // tag : V6_vmpabus_acc 8020 def int_hexagon_V6_vmpabus_acc : 8021 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpabus_acc">; 8022 8023 // 8024 // BUILTIN_INFO(HEXAGON.V6_vmpabus_acc_128B,VD_ftype_VDVDSI,3) 8025 // tag : V6_vmpabus_acc_128B 8026 def int_hexagon_V6_vmpabus_acc_128B : 8027 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpabus_acc_128B">; 8028 8029 // 8030 // BUILTIN_INFO(HEXAGON.V6_vmpahb,VD_ftype_VDSI,2) 8031 // tag : V6_vmpahb 8032 def int_hexagon_V6_vmpahb : 8033 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpahb">; 8034 8035 // 8036 // BUILTIN_INFO(HEXAGON.V6_vmpahb_128B,VD_ftype_VDSI,2) 8037 // tag : V6_vmpahb_128B 8038 def int_hexagon_V6_vmpahb_128B : 8039 Hexagon_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpahb_128B">; 8040 8041 // 8042 // BUILTIN_INFO(HEXAGON.V6_vmpahb_acc,VD_ftype_VDVDSI,3) 8043 // tag : V6_vmpahb_acc 8044 def int_hexagon_V6_vmpahb_acc : 8045 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpahb_acc">; 8046 8047 // 8048 // BUILTIN_INFO(HEXAGON.V6_vmpahb_acc_128B,VD_ftype_VDVDSI,3) 8049 // tag : V6_vmpahb_acc_128B 8050 def int_hexagon_V6_vmpahb_acc_128B : 8051 Hexagon_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpahb_acc_128B">; 8052 8053 // 8054 // BUILTIN_INFO(HEXAGON.V6_vmpyh,VD_ftype_VISI,2) 8055 // tag : V6_vmpyh 8056 def int_hexagon_V6_vmpyh : 8057 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyh">; 8058 8059 // 8060 // BUILTIN_INFO(HEXAGON.V6_vmpyh_128B,VD_ftype_VISI,2) 8061 // tag : V6_vmpyh_128B 8062 def int_hexagon_V6_vmpyh_128B : 8063 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyh_128B">; 8064 8065 // 8066 // BUILTIN_INFO(HEXAGON.V6_vmpyhsat_acc,VD_ftype_VDVISI,3) 8067 // tag : V6_vmpyhsat_acc 8068 def int_hexagon_V6_vmpyhsat_acc : 8069 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyhsat_acc">; 8070 8071 // 8072 // BUILTIN_INFO(HEXAGON.V6_vmpyhsat_acc_128B,VD_ftype_VDVISI,3) 8073 // tag : V6_vmpyhsat_acc_128B 8074 def int_hexagon_V6_vmpyhsat_acc_128B : 8075 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyhsat_acc_128B">; 8076 8077 // 8078 // BUILTIN_INFO(HEXAGON.V6_vmpyhss,VI_ftype_VISI,2) 8079 // tag : V6_vmpyhss 8080 def int_hexagon_V6_vmpyhss : 8081 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyhss">; 8082 8083 // 8084 // BUILTIN_INFO(HEXAGON.V6_vmpyhss_128B,VI_ftype_VISI,2) 8085 // tag : V6_vmpyhss_128B 8086 def int_hexagon_V6_vmpyhss_128B : 8087 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyhss_128B">; 8088 8089 // 8090 // BUILTIN_INFO(HEXAGON.V6_vmpyhsrs,VI_ftype_VISI,2) 8091 // tag : V6_vmpyhsrs 8092 def int_hexagon_V6_vmpyhsrs : 8093 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyhsrs">; 8094 8095 // 8096 // BUILTIN_INFO(HEXAGON.V6_vmpyhsrs_128B,VI_ftype_VISI,2) 8097 // tag : V6_vmpyhsrs_128B 8098 def int_hexagon_V6_vmpyhsrs_128B : 8099 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyhsrs_128B">; 8100 8101 // 8102 // BUILTIN_INFO(HEXAGON.V6_vmpyuh,VD_ftype_VISI,2) 8103 // tag : V6_vmpyuh 8104 def int_hexagon_V6_vmpyuh : 8105 Hexagon_v1024v512i_Intrinsic<"HEXAGON_V6_vmpyuh">; 8106 8107 // 8108 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_128B,VD_ftype_VISI,2) 8109 // tag : V6_vmpyuh_128B 8110 def int_hexagon_V6_vmpyuh_128B : 8111 Hexagon_v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyuh_128B">; 8112 8113 // 8114 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_acc,VD_ftype_VDVISI,3) 8115 // tag : V6_vmpyuh_acc 8116 def int_hexagon_V6_vmpyuh_acc : 8117 Hexagon_v1024v1024v512i_Intrinsic<"HEXAGON_V6_vmpyuh_acc">; 8118 8119 // 8120 // BUILTIN_INFO(HEXAGON.V6_vmpyuh_acc_128B,VD_ftype_VDVISI,3) 8121 // tag : V6_vmpyuh_acc_128B 8122 def int_hexagon_V6_vmpyuh_acc_128B : 8123 Hexagon_v2048v2048v1024i_Intrinsic<"HEXAGON_V6_vmpyuh_acc_128B">; 8124 8125 // 8126 // BUILTIN_INFO(HEXAGON.V6_vmpyihb,VI_ftype_VISI,2) 8127 // tag : V6_vmpyihb 8128 def int_hexagon_V6_vmpyihb : 8129 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyihb">; 8130 8131 // 8132 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_128B,VI_ftype_VISI,2) 8133 // tag : V6_vmpyihb_128B 8134 def int_hexagon_V6_vmpyihb_128B : 8135 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyihb_128B">; 8136 8137 // 8138 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_acc,VI_ftype_VIVISI,3) 8139 // tag : V6_vmpyihb_acc 8140 def int_hexagon_V6_vmpyihb_acc : 8141 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyihb_acc">; 8142 8143 // 8144 // BUILTIN_INFO(HEXAGON.V6_vmpyihb_acc_128B,VI_ftype_VIVISI,3) 8145 // tag : V6_vmpyihb_acc_128B 8146 def int_hexagon_V6_vmpyihb_acc_128B : 8147 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyihb_acc_128B">; 8148 8149 // 8150 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb,VI_ftype_VISI,2) 8151 // tag : V6_vmpyiwb 8152 def int_hexagon_V6_vmpyiwb : 8153 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwb">; 8154 8155 // 8156 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_128B,VI_ftype_VISI,2) 8157 // tag : V6_vmpyiwb_128B 8158 def int_hexagon_V6_vmpyiwb_128B : 8159 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwb_128B">; 8160 8161 // 8162 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_acc,VI_ftype_VIVISI,3) 8163 // tag : V6_vmpyiwb_acc 8164 def int_hexagon_V6_vmpyiwb_acc : 8165 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwb_acc">; 8166 8167 // 8168 // BUILTIN_INFO(HEXAGON.V6_vmpyiwb_acc_128B,VI_ftype_VIVISI,3) 8169 // tag : V6_vmpyiwb_acc_128B 8170 def int_hexagon_V6_vmpyiwb_acc_128B : 8171 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwb_acc_128B">; 8172 8173 // 8174 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh,VI_ftype_VISI,2) 8175 // tag : V6_vmpyiwh 8176 def int_hexagon_V6_vmpyiwh : 8177 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwh">; 8178 8179 // 8180 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_128B,VI_ftype_VISI,2) 8181 // tag : V6_vmpyiwh_128B 8182 def int_hexagon_V6_vmpyiwh_128B : 8183 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwh_128B">; 8184 8185 // 8186 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_acc,VI_ftype_VIVISI,3) 8187 // tag : V6_vmpyiwh_acc 8188 def int_hexagon_V6_vmpyiwh_acc : 8189 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwh_acc">; 8190 8191 // 8192 // BUILTIN_INFO(HEXAGON.V6_vmpyiwh_acc_128B,VI_ftype_VIVISI,3) 8193 // tag : V6_vmpyiwh_acc_128B 8194 def int_hexagon_V6_vmpyiwh_acc_128B : 8195 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwh_acc_128B">; 8196 8197 // 8198 // BUILTIN_INFO(HEXAGON.V6_vand,VI_ftype_VIVI,2) 8199 // tag : V6_vand 8200 def int_hexagon_V6_vand : 8201 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vand">; 8202 8203 // 8204 // BUILTIN_INFO(HEXAGON.V6_vand_128B,VI_ftype_VIVI,2) 8205 // tag : V6_vand_128B 8206 def int_hexagon_V6_vand_128B : 8207 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vand_128B">; 8208 8209 // 8210 // BUILTIN_INFO(HEXAGON.V6_vor,VI_ftype_VIVI,2) 8211 // tag : V6_vor 8212 def int_hexagon_V6_vor : 8213 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vor">; 8214 8215 // 8216 // BUILTIN_INFO(HEXAGON.V6_vor_128B,VI_ftype_VIVI,2) 8217 // tag : V6_vor_128B 8218 def int_hexagon_V6_vor_128B : 8219 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vor_128B">; 8220 8221 // 8222 // BUILTIN_INFO(HEXAGON.V6_vxor,VI_ftype_VIVI,2) 8223 // tag : V6_vxor 8224 def int_hexagon_V6_vxor : 8225 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vxor">; 8226 8227 // 8228 // BUILTIN_INFO(HEXAGON.V6_vxor_128B,VI_ftype_VIVI,2) 8229 // tag : V6_vxor_128B 8230 def int_hexagon_V6_vxor_128B : 8231 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vxor_128B">; 8232 8233 // 8234 // BUILTIN_INFO(HEXAGON.V6_vnot,VI_ftype_VI,1) 8235 // tag : V6_vnot 8236 def int_hexagon_V6_vnot : 8237 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnot">; 8238 8239 // 8240 // BUILTIN_INFO(HEXAGON.V6_vnot_128B,VI_ftype_VI,1) 8241 // tag : V6_vnot_128B 8242 def int_hexagon_V6_vnot_128B : 8243 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnot_128B">; 8244 8245 // 8246 // BUILTIN_INFO(HEXAGON.V6_vandqrt,VI_ftype_QVSI,2) 8247 // tag : V6_vandqrt 8248 def int_hexagon_V6_vandqrt : 8249 Hexagon_v512v64ii_Intrinsic<"HEXAGON_V6_vandqrt">; 8250 8251 // 8252 // BUILTIN_INFO(HEXAGON.V6_vandqrt_128B,VI_ftype_QVSI,2) 8253 // tag : V6_vandqrt_128B 8254 def int_hexagon_V6_vandqrt_128B : 8255 Hexagon_v1024v128ii_Intrinsic<"HEXAGON_V6_vandqrt_128B">; 8256 8257 // 8258 // BUILTIN_INFO(HEXAGON.V6_vandqrt_acc,VI_ftype_VIQVSI,3) 8259 // tag : V6_vandqrt_acc 8260 def int_hexagon_V6_vandqrt_acc : 8261 Hexagon_v512v512v64ii_Intrinsic<"HEXAGON_V6_vandqrt_acc">; 8262 8263 // 8264 // BUILTIN_INFO(HEXAGON.V6_vandqrt_acc_128B,VI_ftype_VIQVSI,3) 8265 // tag : V6_vandqrt_acc_128B 8266 def int_hexagon_V6_vandqrt_acc_128B : 8267 Hexagon_v1024v1024v128ii_Intrinsic<"HEXAGON_V6_vandqrt_acc_128B">; 8268 8269 // 8270 // BUILTIN_INFO(HEXAGON.V6_vandvrt,QV_ftype_VISI,2) 8271 // tag : V6_vandvrt 8272 def int_hexagon_V6_vandvrt : 8273 Hexagon_v64iv512i_Intrinsic<"HEXAGON_V6_vandvrt">; 8274 8275 // 8276 // BUILTIN_INFO(HEXAGON.V6_vandvrt_128B,QV_ftype_VISI,2) 8277 // tag : V6_vandvrt_128B 8278 def int_hexagon_V6_vandvrt_128B : 8279 Hexagon_v128iv1024i_Intrinsic<"HEXAGON_V6_vandvrt_128B">; 8280 8281 // 8282 // BUILTIN_INFO(HEXAGON.V6_vandvrt_acc,QV_ftype_QVVISI,3) 8283 // tag : V6_vandvrt_acc 8284 def int_hexagon_V6_vandvrt_acc : 8285 Hexagon_v64iv64iv512i_Intrinsic<"HEXAGON_V6_vandvrt_acc">; 8286 8287 // 8288 // BUILTIN_INFO(HEXAGON.V6_vandvrt_acc_128B,QV_ftype_QVVISI,3) 8289 // tag : V6_vandvrt_acc_128B 8290 def int_hexagon_V6_vandvrt_acc_128B : 8291 Hexagon_v128iv128iv1024i_Intrinsic<"HEXAGON_V6_vandvrt_acc_128B">; 8292 8293 // 8294 // BUILTIN_INFO(HEXAGON.V6_vgtw,QV_ftype_VIVI,2) 8295 // tag : V6_vgtw 8296 def int_hexagon_V6_vgtw : 8297 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtw">; 8298 8299 // 8300 // BUILTIN_INFO(HEXAGON.V6_vgtw_128B,QV_ftype_VIVI,2) 8301 // tag : V6_vgtw_128B 8302 def int_hexagon_V6_vgtw_128B : 8303 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_128B">; 8304 8305 // 8306 // BUILTIN_INFO(HEXAGON.V6_vgtw_and,QV_ftype_QVVIVI,3) 8307 // tag : V6_vgtw_and 8308 def int_hexagon_V6_vgtw_and : 8309 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_and">; 8310 8311 // 8312 // BUILTIN_INFO(HEXAGON.V6_vgtw_and_128B,QV_ftype_QVVIVI,3) 8313 // tag : V6_vgtw_and_128B 8314 def int_hexagon_V6_vgtw_and_128B : 8315 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_and_128B">; 8316 8317 // 8318 // BUILTIN_INFO(HEXAGON.V6_vgtw_or,QV_ftype_QVVIVI,3) 8319 // tag : V6_vgtw_or 8320 def int_hexagon_V6_vgtw_or : 8321 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_or">; 8322 8323 // 8324 // BUILTIN_INFO(HEXAGON.V6_vgtw_or_128B,QV_ftype_QVVIVI,3) 8325 // tag : V6_vgtw_or_128B 8326 def int_hexagon_V6_vgtw_or_128B : 8327 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_or_128B">; 8328 8329 // 8330 // BUILTIN_INFO(HEXAGON.V6_vgtw_xor,QV_ftype_QVVIVI,3) 8331 // tag : V6_vgtw_xor 8332 def int_hexagon_V6_vgtw_xor : 8333 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtw_xor">; 8334 8335 // 8336 // BUILTIN_INFO(HEXAGON.V6_vgtw_xor_128B,QV_ftype_QVVIVI,3) 8337 // tag : V6_vgtw_xor_128B 8338 def int_hexagon_V6_vgtw_xor_128B : 8339 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtw_xor_128B">; 8340 8341 // 8342 // BUILTIN_INFO(HEXAGON.V6_veqw,QV_ftype_VIVI,2) 8343 // tag : V6_veqw 8344 def int_hexagon_V6_veqw : 8345 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqw">; 8346 8347 // 8348 // BUILTIN_INFO(HEXAGON.V6_veqw_128B,QV_ftype_VIVI,2) 8349 // tag : V6_veqw_128B 8350 def int_hexagon_V6_veqw_128B : 8351 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_128B">; 8352 8353 // 8354 // BUILTIN_INFO(HEXAGON.V6_veqw_and,QV_ftype_QVVIVI,3) 8355 // tag : V6_veqw_and 8356 def int_hexagon_V6_veqw_and : 8357 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_and">; 8358 8359 // 8360 // BUILTIN_INFO(HEXAGON.V6_veqw_and_128B,QV_ftype_QVVIVI,3) 8361 // tag : V6_veqw_and_128B 8362 def int_hexagon_V6_veqw_and_128B : 8363 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_and_128B">; 8364 8365 // 8366 // BUILTIN_INFO(HEXAGON.V6_veqw_or,QV_ftype_QVVIVI,3) 8367 // tag : V6_veqw_or 8368 def int_hexagon_V6_veqw_or : 8369 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_or">; 8370 8371 // 8372 // BUILTIN_INFO(HEXAGON.V6_veqw_or_128B,QV_ftype_QVVIVI,3) 8373 // tag : V6_veqw_or_128B 8374 def int_hexagon_V6_veqw_or_128B : 8375 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_or_128B">; 8376 8377 // 8378 // BUILTIN_INFO(HEXAGON.V6_veqw_xor,QV_ftype_QVVIVI,3) 8379 // tag : V6_veqw_xor 8380 def int_hexagon_V6_veqw_xor : 8381 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqw_xor">; 8382 8383 // 8384 // BUILTIN_INFO(HEXAGON.V6_veqw_xor_128B,QV_ftype_QVVIVI,3) 8385 // tag : V6_veqw_xor_128B 8386 def int_hexagon_V6_veqw_xor_128B : 8387 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqw_xor_128B">; 8388 8389 // 8390 // BUILTIN_INFO(HEXAGON.V6_vgth,QV_ftype_VIVI,2) 8391 // tag : V6_vgth 8392 def int_hexagon_V6_vgth : 8393 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgth">; 8394 8395 // 8396 // BUILTIN_INFO(HEXAGON.V6_vgth_128B,QV_ftype_VIVI,2) 8397 // tag : V6_vgth_128B 8398 def int_hexagon_V6_vgth_128B : 8399 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_128B">; 8400 8401 // 8402 // BUILTIN_INFO(HEXAGON.V6_vgth_and,QV_ftype_QVVIVI,3) 8403 // tag : V6_vgth_and 8404 def int_hexagon_V6_vgth_and : 8405 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_and">; 8406 8407 // 8408 // BUILTIN_INFO(HEXAGON.V6_vgth_and_128B,QV_ftype_QVVIVI,3) 8409 // tag : V6_vgth_and_128B 8410 def int_hexagon_V6_vgth_and_128B : 8411 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_and_128B">; 8412 8413 // 8414 // BUILTIN_INFO(HEXAGON.V6_vgth_or,QV_ftype_QVVIVI,3) 8415 // tag : V6_vgth_or 8416 def int_hexagon_V6_vgth_or : 8417 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_or">; 8418 8419 // 8420 // BUILTIN_INFO(HEXAGON.V6_vgth_or_128B,QV_ftype_QVVIVI,3) 8421 // tag : V6_vgth_or_128B 8422 def int_hexagon_V6_vgth_or_128B : 8423 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_or_128B">; 8424 8425 // 8426 // BUILTIN_INFO(HEXAGON.V6_vgth_xor,QV_ftype_QVVIVI,3) 8427 // tag : V6_vgth_xor 8428 def int_hexagon_V6_vgth_xor : 8429 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgth_xor">; 8430 8431 // 8432 // BUILTIN_INFO(HEXAGON.V6_vgth_xor_128B,QV_ftype_QVVIVI,3) 8433 // tag : V6_vgth_xor_128B 8434 def int_hexagon_V6_vgth_xor_128B : 8435 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgth_xor_128B">; 8436 8437 // 8438 // BUILTIN_INFO(HEXAGON.V6_veqh,QV_ftype_VIVI,2) 8439 // tag : V6_veqh 8440 def int_hexagon_V6_veqh : 8441 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqh">; 8442 8443 // 8444 // BUILTIN_INFO(HEXAGON.V6_veqh_128B,QV_ftype_VIVI,2) 8445 // tag : V6_veqh_128B 8446 def int_hexagon_V6_veqh_128B : 8447 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_128B">; 8448 8449 // 8450 // BUILTIN_INFO(HEXAGON.V6_veqh_and,QV_ftype_QVVIVI,3) 8451 // tag : V6_veqh_and 8452 def int_hexagon_V6_veqh_and : 8453 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_and">; 8454 8455 // 8456 // BUILTIN_INFO(HEXAGON.V6_veqh_and_128B,QV_ftype_QVVIVI,3) 8457 // tag : V6_veqh_and_128B 8458 def int_hexagon_V6_veqh_and_128B : 8459 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_and_128B">; 8460 8461 // 8462 // BUILTIN_INFO(HEXAGON.V6_veqh_or,QV_ftype_QVVIVI,3) 8463 // tag : V6_veqh_or 8464 def int_hexagon_V6_veqh_or : 8465 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_or">; 8466 8467 // 8468 // BUILTIN_INFO(HEXAGON.V6_veqh_or_128B,QV_ftype_QVVIVI,3) 8469 // tag : V6_veqh_or_128B 8470 def int_hexagon_V6_veqh_or_128B : 8471 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_or_128B">; 8472 8473 // 8474 // BUILTIN_INFO(HEXAGON.V6_veqh_xor,QV_ftype_QVVIVI,3) 8475 // tag : V6_veqh_xor 8476 def int_hexagon_V6_veqh_xor : 8477 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqh_xor">; 8478 8479 // 8480 // BUILTIN_INFO(HEXAGON.V6_veqh_xor_128B,QV_ftype_QVVIVI,3) 8481 // tag : V6_veqh_xor_128B 8482 def int_hexagon_V6_veqh_xor_128B : 8483 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqh_xor_128B">; 8484 8485 // 8486 // BUILTIN_INFO(HEXAGON.V6_vgtb,QV_ftype_VIVI,2) 8487 // tag : V6_vgtb 8488 def int_hexagon_V6_vgtb : 8489 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtb">; 8490 8491 // 8492 // BUILTIN_INFO(HEXAGON.V6_vgtb_128B,QV_ftype_VIVI,2) 8493 // tag : V6_vgtb_128B 8494 def int_hexagon_V6_vgtb_128B : 8495 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_128B">; 8496 8497 // 8498 // BUILTIN_INFO(HEXAGON.V6_vgtb_and,QV_ftype_QVVIVI,3) 8499 // tag : V6_vgtb_and 8500 def int_hexagon_V6_vgtb_and : 8501 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_and">; 8502 8503 // 8504 // BUILTIN_INFO(HEXAGON.V6_vgtb_and_128B,QV_ftype_QVVIVI,3) 8505 // tag : V6_vgtb_and_128B 8506 def int_hexagon_V6_vgtb_and_128B : 8507 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_and_128B">; 8508 8509 // 8510 // BUILTIN_INFO(HEXAGON.V6_vgtb_or,QV_ftype_QVVIVI,3) 8511 // tag : V6_vgtb_or 8512 def int_hexagon_V6_vgtb_or : 8513 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_or">; 8514 8515 // 8516 // BUILTIN_INFO(HEXAGON.V6_vgtb_or_128B,QV_ftype_QVVIVI,3) 8517 // tag : V6_vgtb_or_128B 8518 def int_hexagon_V6_vgtb_or_128B : 8519 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_or_128B">; 8520 8521 // 8522 // BUILTIN_INFO(HEXAGON.V6_vgtb_xor,QV_ftype_QVVIVI,3) 8523 // tag : V6_vgtb_xor 8524 def int_hexagon_V6_vgtb_xor : 8525 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtb_xor">; 8526 8527 // 8528 // BUILTIN_INFO(HEXAGON.V6_vgtb_xor_128B,QV_ftype_QVVIVI,3) 8529 // tag : V6_vgtb_xor_128B 8530 def int_hexagon_V6_vgtb_xor_128B : 8531 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtb_xor_128B">; 8532 8533 // 8534 // BUILTIN_INFO(HEXAGON.V6_veqb,QV_ftype_VIVI,2) 8535 // tag : V6_veqb 8536 def int_hexagon_V6_veqb : 8537 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_veqb">; 8538 8539 // 8540 // BUILTIN_INFO(HEXAGON.V6_veqb_128B,QV_ftype_VIVI,2) 8541 // tag : V6_veqb_128B 8542 def int_hexagon_V6_veqb_128B : 8543 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_128B">; 8544 8545 // 8546 // BUILTIN_INFO(HEXAGON.V6_veqb_and,QV_ftype_QVVIVI,3) 8547 // tag : V6_veqb_and 8548 def int_hexagon_V6_veqb_and : 8549 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_and">; 8550 8551 // 8552 // BUILTIN_INFO(HEXAGON.V6_veqb_and_128B,QV_ftype_QVVIVI,3) 8553 // tag : V6_veqb_and_128B 8554 def int_hexagon_V6_veqb_and_128B : 8555 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_and_128B">; 8556 8557 // 8558 // BUILTIN_INFO(HEXAGON.V6_veqb_or,QV_ftype_QVVIVI,3) 8559 // tag : V6_veqb_or 8560 def int_hexagon_V6_veqb_or : 8561 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_or">; 8562 8563 // 8564 // BUILTIN_INFO(HEXAGON.V6_veqb_or_128B,QV_ftype_QVVIVI,3) 8565 // tag : V6_veqb_or_128B 8566 def int_hexagon_V6_veqb_or_128B : 8567 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_or_128B">; 8568 8569 // 8570 // BUILTIN_INFO(HEXAGON.V6_veqb_xor,QV_ftype_QVVIVI,3) 8571 // tag : V6_veqb_xor 8572 def int_hexagon_V6_veqb_xor : 8573 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_veqb_xor">; 8574 8575 // 8576 // BUILTIN_INFO(HEXAGON.V6_veqb_xor_128B,QV_ftype_QVVIVI,3) 8577 // tag : V6_veqb_xor_128B 8578 def int_hexagon_V6_veqb_xor_128B : 8579 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_veqb_xor_128B">; 8580 8581 // 8582 // BUILTIN_INFO(HEXAGON.V6_vgtuw,QV_ftype_VIVI,2) 8583 // tag : V6_vgtuw 8584 def int_hexagon_V6_vgtuw : 8585 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw">; 8586 8587 // 8588 // BUILTIN_INFO(HEXAGON.V6_vgtuw_128B,QV_ftype_VIVI,2) 8589 // tag : V6_vgtuw_128B 8590 def int_hexagon_V6_vgtuw_128B : 8591 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_128B">; 8592 8593 // 8594 // BUILTIN_INFO(HEXAGON.V6_vgtuw_and,QV_ftype_QVVIVI,3) 8595 // tag : V6_vgtuw_and 8596 def int_hexagon_V6_vgtuw_and : 8597 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_and">; 8598 8599 // 8600 // BUILTIN_INFO(HEXAGON.V6_vgtuw_and_128B,QV_ftype_QVVIVI,3) 8601 // tag : V6_vgtuw_and_128B 8602 def int_hexagon_V6_vgtuw_and_128B : 8603 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_and_128B">; 8604 8605 // 8606 // BUILTIN_INFO(HEXAGON.V6_vgtuw_or,QV_ftype_QVVIVI,3) 8607 // tag : V6_vgtuw_or 8608 def int_hexagon_V6_vgtuw_or : 8609 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_or">; 8610 8611 // 8612 // BUILTIN_INFO(HEXAGON.V6_vgtuw_or_128B,QV_ftype_QVVIVI,3) 8613 // tag : V6_vgtuw_or_128B 8614 def int_hexagon_V6_vgtuw_or_128B : 8615 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_or_128B">; 8616 8617 // 8618 // BUILTIN_INFO(HEXAGON.V6_vgtuw_xor,QV_ftype_QVVIVI,3) 8619 // tag : V6_vgtuw_xor 8620 def int_hexagon_V6_vgtuw_xor : 8621 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuw_xor">; 8622 8623 // 8624 // BUILTIN_INFO(HEXAGON.V6_vgtuw_xor_128B,QV_ftype_QVVIVI,3) 8625 // tag : V6_vgtuw_xor_128B 8626 def int_hexagon_V6_vgtuw_xor_128B : 8627 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuw_xor_128B">; 8628 8629 // 8630 // BUILTIN_INFO(HEXAGON.V6_vgtuh,QV_ftype_VIVI,2) 8631 // tag : V6_vgtuh 8632 def int_hexagon_V6_vgtuh : 8633 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh">; 8634 8635 // 8636 // BUILTIN_INFO(HEXAGON.V6_vgtuh_128B,QV_ftype_VIVI,2) 8637 // tag : V6_vgtuh_128B 8638 def int_hexagon_V6_vgtuh_128B : 8639 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_128B">; 8640 8641 // 8642 // BUILTIN_INFO(HEXAGON.V6_vgtuh_and,QV_ftype_QVVIVI,3) 8643 // tag : V6_vgtuh_and 8644 def int_hexagon_V6_vgtuh_and : 8645 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_and">; 8646 8647 // 8648 // BUILTIN_INFO(HEXAGON.V6_vgtuh_and_128B,QV_ftype_QVVIVI,3) 8649 // tag : V6_vgtuh_and_128B 8650 def int_hexagon_V6_vgtuh_and_128B : 8651 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_and_128B">; 8652 8653 // 8654 // BUILTIN_INFO(HEXAGON.V6_vgtuh_or,QV_ftype_QVVIVI,3) 8655 // tag : V6_vgtuh_or 8656 def int_hexagon_V6_vgtuh_or : 8657 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_or">; 8658 8659 // 8660 // BUILTIN_INFO(HEXAGON.V6_vgtuh_or_128B,QV_ftype_QVVIVI,3) 8661 // tag : V6_vgtuh_or_128B 8662 def int_hexagon_V6_vgtuh_or_128B : 8663 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_or_128B">; 8664 8665 // 8666 // BUILTIN_INFO(HEXAGON.V6_vgtuh_xor,QV_ftype_QVVIVI,3) 8667 // tag : V6_vgtuh_xor 8668 def int_hexagon_V6_vgtuh_xor : 8669 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtuh_xor">; 8670 8671 // 8672 // BUILTIN_INFO(HEXAGON.V6_vgtuh_xor_128B,QV_ftype_QVVIVI,3) 8673 // tag : V6_vgtuh_xor_128B 8674 def int_hexagon_V6_vgtuh_xor_128B : 8675 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtuh_xor_128B">; 8676 8677 // 8678 // BUILTIN_INFO(HEXAGON.V6_vgtub,QV_ftype_VIVI,2) 8679 // tag : V6_vgtub 8680 def int_hexagon_V6_vgtub : 8681 Hexagon_v64iv512v512_Intrinsic<"HEXAGON_V6_vgtub">; 8682 8683 // 8684 // BUILTIN_INFO(HEXAGON.V6_vgtub_128B,QV_ftype_VIVI,2) 8685 // tag : V6_vgtub_128B 8686 def int_hexagon_V6_vgtub_128B : 8687 Hexagon_v128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_128B">; 8688 8689 // 8690 // BUILTIN_INFO(HEXAGON.V6_vgtub_and,QV_ftype_QVVIVI,3) 8691 // tag : V6_vgtub_and 8692 def int_hexagon_V6_vgtub_and : 8693 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_and">; 8694 8695 // 8696 // BUILTIN_INFO(HEXAGON.V6_vgtub_and_128B,QV_ftype_QVVIVI,3) 8697 // tag : V6_vgtub_and_128B 8698 def int_hexagon_V6_vgtub_and_128B : 8699 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_and_128B">; 8700 8701 // 8702 // BUILTIN_INFO(HEXAGON.V6_vgtub_or,QV_ftype_QVVIVI,3) 8703 // tag : V6_vgtub_or 8704 def int_hexagon_V6_vgtub_or : 8705 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_or">; 8706 8707 // 8708 // BUILTIN_INFO(HEXAGON.V6_vgtub_or_128B,QV_ftype_QVVIVI,3) 8709 // tag : V6_vgtub_or_128B 8710 def int_hexagon_V6_vgtub_or_128B : 8711 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_or_128B">; 8712 8713 // 8714 // BUILTIN_INFO(HEXAGON.V6_vgtub_xor,QV_ftype_QVVIVI,3) 8715 // tag : V6_vgtub_xor 8716 def int_hexagon_V6_vgtub_xor : 8717 Hexagon_v64iv64iv512v512_Intrinsic<"HEXAGON_V6_vgtub_xor">; 8718 8719 // 8720 // BUILTIN_INFO(HEXAGON.V6_vgtub_xor_128B,QV_ftype_QVVIVI,3) 8721 // tag : V6_vgtub_xor_128B 8722 def int_hexagon_V6_vgtub_xor_128B : 8723 Hexagon_v128iv128iv1024v1024_Intrinsic<"HEXAGON_V6_vgtub_xor_128B">; 8724 8725 // 8726 // BUILTIN_INFO(HEXAGON.V6_pred_or,QV_ftype_QVQV,2) 8727 // tag : V6_pred_or 8728 def int_hexagon_V6_pred_or : 8729 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_or">; 8730 8731 // 8732 // BUILTIN_INFO(HEXAGON.V6_pred_or_128B,QV_ftype_QVQV,2) 8733 // tag : V6_pred_or_128B 8734 def int_hexagon_V6_pred_or_128B : 8735 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_or_128B">; 8736 8737 // 8738 // BUILTIN_INFO(HEXAGON.V6_pred_and,QV_ftype_QVQV,2) 8739 // tag : V6_pred_and 8740 def int_hexagon_V6_pred_and : 8741 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_and">; 8742 8743 // 8744 // BUILTIN_INFO(HEXAGON.V6_pred_and_128B,QV_ftype_QVQV,2) 8745 // tag : V6_pred_and_128B 8746 def int_hexagon_V6_pred_and_128B : 8747 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_and_128B">; 8748 8749 // 8750 // BUILTIN_INFO(HEXAGON.V6_pred_not,QV_ftype_QV,1) 8751 // tag : V6_pred_not 8752 def int_hexagon_V6_pred_not : 8753 Hexagon_v64iv64i_Intrinsic<"HEXAGON_V6_pred_not">; 8754 8755 // 8756 // BUILTIN_INFO(HEXAGON.V6_pred_not_128B,QV_ftype_QV,1) 8757 // tag : V6_pred_not_128B 8758 def int_hexagon_V6_pred_not_128B : 8759 Hexagon_v128iv128i_Intrinsic<"HEXAGON_V6_pred_not_128B">; 8760 8761 // 8762 // BUILTIN_INFO(HEXAGON.V6_pred_xor,QV_ftype_QVQV,2) 8763 // tag : V6_pred_xor 8764 def int_hexagon_V6_pred_xor : 8765 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_xor">; 8766 8767 // 8768 // BUILTIN_INFO(HEXAGON.V6_pred_xor_128B,QV_ftype_QVQV,2) 8769 // tag : V6_pred_xor_128B 8770 def int_hexagon_V6_pred_xor_128B : 8771 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_xor_128B">; 8772 8773 // 8774 // BUILTIN_INFO(HEXAGON.V6_pred_and_n,QV_ftype_QVQV,2) 8775 // tag : V6_pred_and_n 8776 def int_hexagon_V6_pred_and_n : 8777 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_and_n">; 8778 8779 // 8780 // BUILTIN_INFO(HEXAGON.V6_pred_and_n_128B,QV_ftype_QVQV,2) 8781 // tag : V6_pred_and_n_128B 8782 def int_hexagon_V6_pred_and_n_128B : 8783 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_and_n_128B">; 8784 8785 // 8786 // BUILTIN_INFO(HEXAGON.V6_pred_or_n,QV_ftype_QVQV,2) 8787 // tag : V6_pred_or_n 8788 def int_hexagon_V6_pred_or_n : 8789 Hexagon_v64iv64iv64i_Intrinsic<"HEXAGON_V6_pred_or_n">; 8790 8791 // 8792 // BUILTIN_INFO(HEXAGON.V6_pred_or_n_128B,QV_ftype_QVQV,2) 8793 // tag : V6_pred_or_n_128B 8794 def int_hexagon_V6_pred_or_n_128B : 8795 Hexagon_v128iv128iv128i_Intrinsic<"HEXAGON_V6_pred_or_n_128B">; 8796 8797 // 8798 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2,QV_ftype_SI,1) 8799 // tag : V6_pred_scalar2 8800 def int_hexagon_V6_pred_scalar2 : 8801 Hexagon_v64ii_Intrinsic<"HEXAGON_V6_pred_scalar2">; 8802 8803 // 8804 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2_128B,QV_ftype_SI,1) 8805 // tag : V6_pred_scalar2_128B 8806 def int_hexagon_V6_pred_scalar2_128B : 8807 Hexagon_v128ii_Intrinsic<"HEXAGON_V6_pred_scalar2_128B">; 8808 8809 // 8810 // BUILTIN_INFO(HEXAGON.V6_vmux,VI_ftype_QVVIVI,3) 8811 // tag : V6_vmux 8812 def int_hexagon_V6_vmux : 8813 Hexagon_v512v64iv512v512_Intrinsic<"HEXAGON_V6_vmux">; 8814 8815 // 8816 // BUILTIN_INFO(HEXAGON.V6_vmux_128B,VI_ftype_QVVIVI,3) 8817 // tag : V6_vmux_128B 8818 def int_hexagon_V6_vmux_128B : 8819 Hexagon_v1024v128iv1024v1024_Intrinsic<"HEXAGON_V6_vmux_128B">; 8820 8821 // 8822 // BUILTIN_INFO(HEXAGON.V6_vswap,VD_ftype_QVVIVI,3) 8823 // tag : V6_vswap 8824 def int_hexagon_V6_vswap : 8825 Hexagon_v1024v64iv512v512_Intrinsic<"HEXAGON_V6_vswap">; 8826 8827 // 8828 // BUILTIN_INFO(HEXAGON.V6_vswap_128B,VD_ftype_QVVIVI,3) 8829 // tag : V6_vswap_128B 8830 def int_hexagon_V6_vswap_128B : 8831 Hexagon_v2048v128iv1024v1024_Intrinsic<"HEXAGON_V6_vswap_128B">; 8832 8833 // 8834 // BUILTIN_INFO(HEXAGON.V6_vmaxub,VI_ftype_VIVI,2) 8835 // tag : V6_vmaxub 8836 def int_hexagon_V6_vmaxub : 8837 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxub">; 8838 8839 // 8840 // BUILTIN_INFO(HEXAGON.V6_vmaxub_128B,VI_ftype_VIVI,2) 8841 // tag : V6_vmaxub_128B 8842 def int_hexagon_V6_vmaxub_128B : 8843 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxub_128B">; 8844 8845 // 8846 // BUILTIN_INFO(HEXAGON.V6_vminub,VI_ftype_VIVI,2) 8847 // tag : V6_vminub 8848 def int_hexagon_V6_vminub : 8849 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminub">; 8850 8851 // 8852 // BUILTIN_INFO(HEXAGON.V6_vminub_128B,VI_ftype_VIVI,2) 8853 // tag : V6_vminub_128B 8854 def int_hexagon_V6_vminub_128B : 8855 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminub_128B">; 8856 8857 // 8858 // BUILTIN_INFO(HEXAGON.V6_vmaxuh,VI_ftype_VIVI,2) 8859 // tag : V6_vmaxuh 8860 def int_hexagon_V6_vmaxuh : 8861 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxuh">; 8862 8863 // 8864 // BUILTIN_INFO(HEXAGON.V6_vmaxuh_128B,VI_ftype_VIVI,2) 8865 // tag : V6_vmaxuh_128B 8866 def int_hexagon_V6_vmaxuh_128B : 8867 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxuh_128B">; 8868 8869 // 8870 // BUILTIN_INFO(HEXAGON.V6_vminuh,VI_ftype_VIVI,2) 8871 // tag : V6_vminuh 8872 def int_hexagon_V6_vminuh : 8873 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminuh">; 8874 8875 // 8876 // BUILTIN_INFO(HEXAGON.V6_vminuh_128B,VI_ftype_VIVI,2) 8877 // tag : V6_vminuh_128B 8878 def int_hexagon_V6_vminuh_128B : 8879 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminuh_128B">; 8880 8881 // 8882 // BUILTIN_INFO(HEXAGON.V6_vmaxh,VI_ftype_VIVI,2) 8883 // tag : V6_vmaxh 8884 def int_hexagon_V6_vmaxh : 8885 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxh">; 8886 8887 // 8888 // BUILTIN_INFO(HEXAGON.V6_vmaxh_128B,VI_ftype_VIVI,2) 8889 // tag : V6_vmaxh_128B 8890 def int_hexagon_V6_vmaxh_128B : 8891 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxh_128B">; 8892 8893 // 8894 // BUILTIN_INFO(HEXAGON.V6_vminh,VI_ftype_VIVI,2) 8895 // tag : V6_vminh 8896 def int_hexagon_V6_vminh : 8897 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminh">; 8898 8899 // 8900 // BUILTIN_INFO(HEXAGON.V6_vminh_128B,VI_ftype_VIVI,2) 8901 // tag : V6_vminh_128B 8902 def int_hexagon_V6_vminh_128B : 8903 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminh_128B">; 8904 8905 // 8906 // BUILTIN_INFO(HEXAGON.V6_vmaxw,VI_ftype_VIVI,2) 8907 // tag : V6_vmaxw 8908 def int_hexagon_V6_vmaxw : 8909 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxw">; 8910 8911 // 8912 // BUILTIN_INFO(HEXAGON.V6_vmaxw_128B,VI_ftype_VIVI,2) 8913 // tag : V6_vmaxw_128B 8914 def int_hexagon_V6_vmaxw_128B : 8915 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxw_128B">; 8916 8917 // 8918 // BUILTIN_INFO(HEXAGON.V6_vminw,VI_ftype_VIVI,2) 8919 // tag : V6_vminw 8920 def int_hexagon_V6_vminw : 8921 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vminw">; 8922 8923 // 8924 // BUILTIN_INFO(HEXAGON.V6_vminw_128B,VI_ftype_VIVI,2) 8925 // tag : V6_vminw_128B 8926 def int_hexagon_V6_vminw_128B : 8927 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminw_128B">; 8928 8929 // 8930 // BUILTIN_INFO(HEXAGON.V6_vsathub,VI_ftype_VIVI,2) 8931 // tag : V6_vsathub 8932 def int_hexagon_V6_vsathub : 8933 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsathub">; 8934 8935 // 8936 // BUILTIN_INFO(HEXAGON.V6_vsathub_128B,VI_ftype_VIVI,2) 8937 // tag : V6_vsathub_128B 8938 def int_hexagon_V6_vsathub_128B : 8939 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsathub_128B">; 8940 8941 // 8942 // BUILTIN_INFO(HEXAGON.V6_vsatwh,VI_ftype_VIVI,2) 8943 // tag : V6_vsatwh 8944 def int_hexagon_V6_vsatwh : 8945 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vsatwh">; 8946 8947 // 8948 // BUILTIN_INFO(HEXAGON.V6_vsatwh_128B,VI_ftype_VIVI,2) 8949 // tag : V6_vsatwh_128B 8950 def int_hexagon_V6_vsatwh_128B : 8951 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsatwh_128B">; 8952 8953 // 8954 // BUILTIN_INFO(HEXAGON.V6_vshuffeb,VI_ftype_VIVI,2) 8955 // tag : V6_vshuffeb 8956 def int_hexagon_V6_vshuffeb : 8957 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshuffeb">; 8958 8959 // 8960 // BUILTIN_INFO(HEXAGON.V6_vshuffeb_128B,VI_ftype_VIVI,2) 8961 // tag : V6_vshuffeb_128B 8962 def int_hexagon_V6_vshuffeb_128B : 8963 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshuffeb_128B">; 8964 8965 // 8966 // BUILTIN_INFO(HEXAGON.V6_vshuffob,VI_ftype_VIVI,2) 8967 // tag : V6_vshuffob 8968 def int_hexagon_V6_vshuffob : 8969 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshuffob">; 8970 8971 // 8972 // BUILTIN_INFO(HEXAGON.V6_vshuffob_128B,VI_ftype_VIVI,2) 8973 // tag : V6_vshuffob_128B 8974 def int_hexagon_V6_vshuffob_128B : 8975 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshuffob_128B">; 8976 8977 // 8978 // BUILTIN_INFO(HEXAGON.V6_vshufeh,VI_ftype_VIVI,2) 8979 // tag : V6_vshufeh 8980 def int_hexagon_V6_vshufeh : 8981 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshufeh">; 8982 8983 // 8984 // BUILTIN_INFO(HEXAGON.V6_vshufeh_128B,VI_ftype_VIVI,2) 8985 // tag : V6_vshufeh_128B 8986 def int_hexagon_V6_vshufeh_128B : 8987 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshufeh_128B">; 8988 8989 // 8990 // BUILTIN_INFO(HEXAGON.V6_vshufoh,VI_ftype_VIVI,2) 8991 // tag : V6_vshufoh 8992 def int_hexagon_V6_vshufoh : 8993 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vshufoh">; 8994 8995 // 8996 // BUILTIN_INFO(HEXAGON.V6_vshufoh_128B,VI_ftype_VIVI,2) 8997 // tag : V6_vshufoh_128B 8998 def int_hexagon_V6_vshufoh_128B : 8999 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vshufoh_128B">; 9000 9001 // 9002 // BUILTIN_INFO(HEXAGON.V6_vshuffvdd,VD_ftype_VIVISI,3) 9003 // tag : V6_vshuffvdd 9004 def int_hexagon_V6_vshuffvdd : 9005 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vshuffvdd">; 9006 9007 // 9008 // BUILTIN_INFO(HEXAGON.V6_vshuffvdd_128B,VD_ftype_VIVISI,3) 9009 // tag : V6_vshuffvdd_128B 9010 def int_hexagon_V6_vshuffvdd_128B : 9011 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vshuffvdd_128B">; 9012 9013 // 9014 // BUILTIN_INFO(HEXAGON.V6_vdealvdd,VD_ftype_VIVISI,3) 9015 // tag : V6_vdealvdd 9016 def int_hexagon_V6_vdealvdd : 9017 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vdealvdd">; 9018 9019 // 9020 // BUILTIN_INFO(HEXAGON.V6_vdealvdd_128B,VD_ftype_VIVISI,3) 9021 // tag : V6_vdealvdd_128B 9022 def int_hexagon_V6_vdealvdd_128B : 9023 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vdealvdd_128B">; 9024 9025 // 9026 // BUILTIN_INFO(HEXAGON.V6_vshufoeh,VD_ftype_VIVI,2) 9027 // tag : V6_vshufoeh 9028 def int_hexagon_V6_vshufoeh : 9029 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vshufoeh">; 9030 9031 // 9032 // BUILTIN_INFO(HEXAGON.V6_vshufoeh_128B,VD_ftype_VIVI,2) 9033 // tag : V6_vshufoeh_128B 9034 def int_hexagon_V6_vshufoeh_128B : 9035 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vshufoeh_128B">; 9036 9037 // 9038 // BUILTIN_INFO(HEXAGON.V6_vshufoeb,VD_ftype_VIVI,2) 9039 // tag : V6_vshufoeb 9040 def int_hexagon_V6_vshufoeb : 9041 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vshufoeb">; 9042 9043 // 9044 // BUILTIN_INFO(HEXAGON.V6_vshufoeb_128B,VD_ftype_VIVI,2) 9045 // tag : V6_vshufoeb_128B 9046 def int_hexagon_V6_vshufoeb_128B : 9047 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vshufoeb_128B">; 9048 9049 // 9050 // BUILTIN_INFO(HEXAGON.V6_vdealh,VI_ftype_VI,1) 9051 // tag : V6_vdealh 9052 def int_hexagon_V6_vdealh : 9053 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vdealh">; 9054 9055 // 9056 // BUILTIN_INFO(HEXAGON.V6_vdealh_128B,VI_ftype_VI,1) 9057 // tag : V6_vdealh_128B 9058 def int_hexagon_V6_vdealh_128B : 9059 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vdealh_128B">; 9060 9061 // 9062 // BUILTIN_INFO(HEXAGON.V6_vdealb,VI_ftype_VI,1) 9063 // tag : V6_vdealb 9064 def int_hexagon_V6_vdealb : 9065 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vdealb">; 9066 9067 // 9068 // BUILTIN_INFO(HEXAGON.V6_vdealb_128B,VI_ftype_VI,1) 9069 // tag : V6_vdealb_128B 9070 def int_hexagon_V6_vdealb_128B : 9071 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vdealb_128B">; 9072 9073 // 9074 // BUILTIN_INFO(HEXAGON.V6_vdealb4w,VI_ftype_VIVI,2) 9075 // tag : V6_vdealb4w 9076 def int_hexagon_V6_vdealb4w : 9077 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdealb4w">; 9078 9079 // 9080 // BUILTIN_INFO(HEXAGON.V6_vdealb4w_128B,VI_ftype_VIVI,2) 9081 // tag : V6_vdealb4w_128B 9082 def int_hexagon_V6_vdealb4w_128B : 9083 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdealb4w_128B">; 9084 9085 // 9086 // BUILTIN_INFO(HEXAGON.V6_vshuffh,VI_ftype_VI,1) 9087 // tag : V6_vshuffh 9088 def int_hexagon_V6_vshuffh : 9089 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vshuffh">; 9090 9091 // 9092 // BUILTIN_INFO(HEXAGON.V6_vshuffh_128B,VI_ftype_VI,1) 9093 // tag : V6_vshuffh_128B 9094 def int_hexagon_V6_vshuffh_128B : 9095 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vshuffh_128B">; 9096 9097 // 9098 // BUILTIN_INFO(HEXAGON.V6_vshuffb,VI_ftype_VI,1) 9099 // tag : V6_vshuffb 9100 def int_hexagon_V6_vshuffb : 9101 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vshuffb">; 9102 9103 // 9104 // BUILTIN_INFO(HEXAGON.V6_vshuffb_128B,VI_ftype_VI,1) 9105 // tag : V6_vshuffb_128B 9106 def int_hexagon_V6_vshuffb_128B : 9107 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vshuffb_128B">; 9108 9109 // 9110 // BUILTIN_INFO(HEXAGON.V6_extractw,SI_ftype_VISI,2) 9111 // tag : V6_extractw 9112 def int_hexagon_V6_extractw : 9113 Hexagon_iv512i_Intrinsic<"HEXAGON_V6_extractw">; 9114 9115 // 9116 // BUILTIN_INFO(HEXAGON.V6_extractw_128B,SI_ftype_VISI,2) 9117 // tag : V6_extractw_128B 9118 def int_hexagon_V6_extractw_128B : 9119 Hexagon_iv1024i_Intrinsic<"HEXAGON_V6_extractw_128B">; 9120 9121 // 9122 // BUILTIN_INFO(HEXAGON.V6_vinsertwr,VI_ftype_VISI,2) 9123 // tag : V6_vinsertwr 9124 def int_hexagon_V6_vinsertwr : 9125 Hexagon_v512v512i_Intrinsic<"HEXAGON_V6_vinsertwr">; 9126 9127 // 9128 // BUILTIN_INFO(HEXAGON.V6_vinsertwr_128B,VI_ftype_VISI,2) 9129 // tag : V6_vinsertwr_128B 9130 def int_hexagon_V6_vinsertwr_128B : 9131 Hexagon_v1024v1024i_Intrinsic<"HEXAGON_V6_vinsertwr_128B">; 9132 9133 // 9134 // BUILTIN_INFO(HEXAGON.V6_lvsplatw,VI_ftype_SI,1) 9135 // tag : V6_lvsplatw 9136 def int_hexagon_V6_lvsplatw : 9137 Hexagon_v512i_Intrinsic<"HEXAGON_V6_lvsplatw">; 9138 9139 // 9140 // BUILTIN_INFO(HEXAGON.V6_lvsplatw_128B,VI_ftype_SI,1) 9141 // tag : V6_lvsplatw_128B 9142 def int_hexagon_V6_lvsplatw_128B : 9143 Hexagon_v1024i_Intrinsic<"HEXAGON_V6_lvsplatw_128B">; 9144 9145 // 9146 // BUILTIN_INFO(HEXAGON.V6_vassign,VI_ftype_VI,1) 9147 // tag : V6_vassign 9148 def int_hexagon_V6_vassign : 9149 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vassign">; 9150 9151 // 9152 // BUILTIN_INFO(HEXAGON.V6_vassign_128B,VI_ftype_VI,1) 9153 // tag : V6_vassign_128B 9154 def int_hexagon_V6_vassign_128B : 9155 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vassign_128B">; 9156 9157 // 9158 // BUILTIN_INFO(HEXAGON.V6_vcombine,VD_ftype_VIVI,2) 9159 // tag : V6_vcombine 9160 def int_hexagon_V6_vcombine : 9161 Hexagon_v1024v512v512_Intrinsic<"HEXAGON_V6_vcombine">; 9162 9163 // 9164 // BUILTIN_INFO(HEXAGON.V6_vcombine_128B,VD_ftype_VIVI,2) 9165 // tag : V6_vcombine_128B 9166 def int_hexagon_V6_vcombine_128B : 9167 Hexagon_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vcombine_128B">; 9168 9169 // 9170 // BUILTIN_INFO(HEXAGON.V6_vlutb,VI_ftype_VIDISI,3) 9171 // tag : V6_vlutb 9172 def int_hexagon_V6_vlutb : 9173 Hexagon_v512v512LLii_Intrinsic<"HEXAGON_V6_vlutb">; 9174 9175 // 9176 // BUILTIN_INFO(HEXAGON.V6_vlutb_128B,VI_ftype_VIDISI,3) 9177 // tag : V6_vlutb_128B 9178 def int_hexagon_V6_vlutb_128B : 9179 Hexagon_v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_128B">; 9180 9181 // 9182 // BUILTIN_INFO(HEXAGON.V6_vlutb_acc,VI_ftype_VIVIDISI,4) 9183 // tag : V6_vlutb_acc 9184 def int_hexagon_V6_vlutb_acc : 9185 Hexagon_v512v512v512LLii_Intrinsic<"HEXAGON_V6_vlutb_acc">; 9186 9187 // 9188 // BUILTIN_INFO(HEXAGON.V6_vlutb_acc_128B,VI_ftype_VIVIDISI,4) 9189 // tag : V6_vlutb_acc_128B 9190 def int_hexagon_V6_vlutb_acc_128B : 9191 Hexagon_v1024v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_acc_128B">; 9192 9193 // 9194 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv,VD_ftype_VDDISI,3) 9195 // tag : V6_vlutb_dv 9196 def int_hexagon_V6_vlutb_dv : 9197 Hexagon_v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_dv">; 9198 9199 // 9200 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_128B,VD_ftype_VDDISI,3) 9201 // tag : V6_vlutb_dv_128B 9202 def int_hexagon_V6_vlutb_dv_128B : 9203 Hexagon_v2048v2048LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_128B">; 9204 9205 // 9206 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_acc,VD_ftype_VDVDDISI,4) 9207 // tag : V6_vlutb_dv_acc 9208 def int_hexagon_V6_vlutb_dv_acc : 9209 Hexagon_v1024v1024v1024LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_acc">; 9210 9211 // 9212 // BUILTIN_INFO(HEXAGON.V6_vlutb_dv_acc_128B,VD_ftype_VDVDDISI,4) 9213 // tag : V6_vlutb_dv_acc_128B 9214 def int_hexagon_V6_vlutb_dv_acc_128B : 9215 Hexagon_v2048v2048v2048LLii_Intrinsic<"HEXAGON_V6_vlutb_dv_acc_128B">; 9216 9217 // 9218 // BUILTIN_INFO(HEXAGON.V6_vdelta,VI_ftype_VIVI,2) 9219 // tag : V6_vdelta 9220 def int_hexagon_V6_vdelta : 9221 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vdelta">; 9222 9223 // 9224 // BUILTIN_INFO(HEXAGON.V6_vdelta_128B,VI_ftype_VIVI,2) 9225 // tag : V6_vdelta_128B 9226 def int_hexagon_V6_vdelta_128B : 9227 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vdelta_128B">; 9228 9229 // 9230 // BUILTIN_INFO(HEXAGON.V6_vrdelta,VI_ftype_VIVI,2) 9231 // tag : V6_vrdelta 9232 def int_hexagon_V6_vrdelta : 9233 Hexagon_v512v512v512_Intrinsic<"HEXAGON_V6_vrdelta">; 9234 9235 // 9236 // BUILTIN_INFO(HEXAGON.V6_vrdelta_128B,VI_ftype_VIVI,2) 9237 // tag : V6_vrdelta_128B 9238 def int_hexagon_V6_vrdelta_128B : 9239 Hexagon_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrdelta_128B">; 9240 9241 // 9242 // BUILTIN_INFO(HEXAGON.V6_vcl0w,VI_ftype_VI,1) 9243 // tag : V6_vcl0w 9244 def int_hexagon_V6_vcl0w : 9245 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vcl0w">; 9246 9247 // 9248 // BUILTIN_INFO(HEXAGON.V6_vcl0w_128B,VI_ftype_VI,1) 9249 // tag : V6_vcl0w_128B 9250 def int_hexagon_V6_vcl0w_128B : 9251 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vcl0w_128B">; 9252 9253 // 9254 // BUILTIN_INFO(HEXAGON.V6_vcl0h,VI_ftype_VI,1) 9255 // tag : V6_vcl0h 9256 def int_hexagon_V6_vcl0h : 9257 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vcl0h">; 9258 9259 // 9260 // BUILTIN_INFO(HEXAGON.V6_vcl0h_128B,VI_ftype_VI,1) 9261 // tag : V6_vcl0h_128B 9262 def int_hexagon_V6_vcl0h_128B : 9263 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vcl0h_128B">; 9264 9265 // 9266 // BUILTIN_INFO(HEXAGON.V6_vnormamtw,VI_ftype_VI,1) 9267 // tag : V6_vnormamtw 9268 def int_hexagon_V6_vnormamtw : 9269 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnormamtw">; 9270 9271 // 9272 // BUILTIN_INFO(HEXAGON.V6_vnormamtw_128B,VI_ftype_VI,1) 9273 // tag : V6_vnormamtw_128B 9274 def int_hexagon_V6_vnormamtw_128B : 9275 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnormamtw_128B">; 9276 9277 // 9278 // BUILTIN_INFO(HEXAGON.V6_vnormamth,VI_ftype_VI,1) 9279 // tag : V6_vnormamth 9280 def int_hexagon_V6_vnormamth : 9281 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vnormamth">; 9282 9283 // 9284 // BUILTIN_INFO(HEXAGON.V6_vnormamth_128B,VI_ftype_VI,1) 9285 // tag : V6_vnormamth_128B 9286 def int_hexagon_V6_vnormamth_128B : 9287 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vnormamth_128B">; 9288 9289 // 9290 // BUILTIN_INFO(HEXAGON.V6_vpopcounth,VI_ftype_VI,1) 9291 // tag : V6_vpopcounth 9292 def int_hexagon_V6_vpopcounth : 9293 Hexagon_v512v512_Intrinsic<"HEXAGON_V6_vpopcounth">; 9294 9295 // 9296 // BUILTIN_INFO(HEXAGON.V6_vpopcounth_128B,VI_ftype_VI,1) 9297 // tag : V6_vpopcounth_128B 9298 def int_hexagon_V6_vpopcounth_128B : 9299 Hexagon_v1024v1024_Intrinsic<"HEXAGON_V6_vpopcounth_128B">; 9300 9301 // 9302 // BUILTIN_INFO(HEXAGON.V6_vlutvvb,VI_ftype_VIVISI,3) 9303 // tag : V6_vlutvvb 9304 def int_hexagon_V6_vlutvvb : 9305 Hexagon_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb">; 9306 9307 // 9308 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_128B,VI_ftype_VIVISI,3) 9309 // tag : V6_vlutvvb_128B 9310 def int_hexagon_V6_vlutvvb_128B : 9311 Hexagon_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_128B">; 9312 9313 // 9314 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracc,VI_ftype_VIVIVISI,4) 9315 // tag : V6_vlutvvb_oracc 9316 def int_hexagon_V6_vlutvvb_oracc : 9317 Hexagon_v512v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_oracc">; 9318 9319 // 9320 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracc_128B,VI_ftype_VIVIVISI,4) 9321 // tag : V6_vlutvvb_oracc_128B 9322 def int_hexagon_V6_vlutvvb_oracc_128B : 9323 Hexagon_v1024v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_oracc_128B">; 9324 9325 // 9326 // BUILTIN_INFO(HEXAGON.V6_vlutvwh,VD_ftype_VIVISI,3) 9327 // tag : V6_vlutvwh 9328 def int_hexagon_V6_vlutvwh : 9329 Hexagon_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh">; 9330 9331 // 9332 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_128B,VD_ftype_VIVISI,3) 9333 // tag : V6_vlutvwh_128B 9334 def int_hexagon_V6_vlutvwh_128B : 9335 Hexagon_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_128B">; 9336 9337 // 9338 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracc,VD_ftype_VDVIVISI,4) 9339 // tag : V6_vlutvwh_oracc 9340 def int_hexagon_V6_vlutvwh_oracc : 9341 Hexagon_v1024v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_oracc">; 9342 9343 // 9344 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracc_128B,VD_ftype_VDVIVISI,4) 9345 // tag : V6_vlutvwh_oracc_128B 9346 def int_hexagon_V6_vlutvwh_oracc_128B : 9347 Hexagon_v2048v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_oracc_128B">; 9348 9349 // 9350 // Masked vector stores 9351 // 9352 def int_hexagon_V6_vmaskedstoreq : 9353 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstoreq">; 9354 9355 def int_hexagon_V6_vmaskedstorenq : 9356 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorenq">; 9357 9358 def int_hexagon_V6_vmaskedstorentq : 9359 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorentq">; 9360 9361 def int_hexagon_V6_vmaskedstorentnq : 9362 Hexagon_vv64ivmemv512_Intrinsic<"HEXAGON_V6_vmaskedstorentnq">; 9363 9364 def int_hexagon_V6_vmaskedstoreq_128B : 9365 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstoreq_128B">; 9366 9367 def int_hexagon_V6_vmaskedstorenq_128B : 9368 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorenq_128B">; 9369 9370 def int_hexagon_V6_vmaskedstorentq_128B : 9371 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorentq_128B">; 9372 9373 def int_hexagon_V6_vmaskedstorentnq_128B : 9374 Hexagon_vv128ivmemv1024_Intrinsic<"HEXAGON_V6_vmaskedstorentnq_128B">; 9375 9376 9377 /// 9378 /// HexagonV62 intrinsics 9379 /// 9380 9381 // 9382 // Hexagon_LLiLLiLLi_Intrinsic<string GCCIntSuffix> 9383 // tag : M6_vabsdiffb 9384 class Hexagon_LLiLLiLLi_Intrinsic<string GCCIntSuffix> 9385 : Hexagon_Intrinsic<GCCIntSuffix, 9386 [llvm_i64_ty], [llvm_i64_ty,llvm_i64_ty], 9387 [IntrNoMem]>; 9388 9389 // 9390 // Hexagon_LLii_Intrinsic<string GCCIntSuffix> 9391 // tag : S6_vsplatrbp 9392 class Hexagon_LLii_Intrinsic<string GCCIntSuffix> 9393 : Hexagon_Intrinsic<GCCIntSuffix, 9394 [llvm_i64_ty], [llvm_i32_ty], 9395 [IntrNoMem]>; 9396 9397 // 9398 // Hexagon_V62_v512v512i_Intrinsic<string GCCIntSuffix> 9399 // tag : V6_vlsrb 9400 class Hexagon_V62_v512v512i_Intrinsic<string GCCIntSuffix> 9401 : Hexagon_Intrinsic<GCCIntSuffix, 9402 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_i32_ty], 9403 [IntrNoMem]>; 9404 9405 // 9406 // Hexagon_V62_v1024v1024i_Intrinsic<string GCCIntSuffix> 9407 // tag : V6_vlsrb_128B 9408 class Hexagon_V62_v1024v1024i_Intrinsic<string GCCIntSuffix> 9409 : Hexagon_Intrinsic<GCCIntSuffix, 9410 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_i32_ty], 9411 [IntrNoMem]>; 9412 9413 // 9414 // Hexagon_V62_v512v512v512i_Intrinsic<string GCCIntSuffix> 9415 // tag : V6_vasrwuhrndsat 9416 class Hexagon_V62_v512v512v512i_Intrinsic<string GCCIntSuffix> 9417 : Hexagon_Intrinsic<GCCIntSuffix, 9418 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9419 [IntrNoMem]>; 9420 9421 // 9422 // Hexagon_V62_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9423 // tag : V6_vasrwuhrndsat_128B 9424 class Hexagon_V62_v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9425 : Hexagon_Intrinsic<GCCIntSuffix, 9426 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9427 [IntrNoMem]>; 9428 9429 // 9430 // Hexagon_V62_v512v512v512_Intrinsic<string GCCIntSuffix> 9431 // tag : V6_vrounduwuh 9432 class Hexagon_V62_v512v512v512_Intrinsic<string GCCIntSuffix> 9433 : Hexagon_Intrinsic<GCCIntSuffix, 9434 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 9435 [IntrNoMem]>; 9436 9437 // 9438 // Hexagon_V62_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 9439 // tag : V6_vrounduwuh_128B 9440 class Hexagon_V62_v1024v1024v1024_Intrinsic<string GCCIntSuffix> 9441 : Hexagon_Intrinsic<GCCIntSuffix, 9442 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 9443 [IntrNoMem]>; 9444 9445 // 9446 // Hexagon_V62_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 9447 // tag : V6_vadduwsat_dv_128B 9448 class Hexagon_V62_v2048v2048v2048_Intrinsic<string GCCIntSuffix> 9449 : Hexagon_Intrinsic<GCCIntSuffix, 9450 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty], 9451 [IntrNoMem]>; 9452 9453 // 9454 // Hexagon_V62_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 9455 // tag : V6_vaddhw_acc 9456 class Hexagon_V62_v1024v1024v512v512_Intrinsic<string GCCIntSuffix> 9457 : Hexagon_Intrinsic<GCCIntSuffix, 9458 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty], 9459 [IntrNoMem]>; 9460 9461 // 9462 // Hexagon_V62_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9463 // tag : V6_vaddhw_acc_128B 9464 class Hexagon_V62_v2048v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9465 : Hexagon_Intrinsic<GCCIntSuffix, 9466 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty], 9467 [IntrNoMem]>; 9468 9469 // 9470 // Hexagon_V62_v1024v512v512_Intrinsic<string GCCIntSuffix> 9471 // tag : V6_vmpyewuh_64 9472 class Hexagon_V62_v1024v512v512_Intrinsic<string GCCIntSuffix> 9473 : Hexagon_Intrinsic<GCCIntSuffix, 9474 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty], 9475 [IntrNoMem]>; 9476 9477 // 9478 // Hexagon_V62_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9479 // tag : V6_vmpyewuh_64_128B 9480 class Hexagon_V62_v2048v1024v1024_Intrinsic<string GCCIntSuffix> 9481 : Hexagon_Intrinsic<GCCIntSuffix, 9482 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty], 9483 [IntrNoMem]>; 9484 9485 // 9486 // Hexagon_V62_v2048v2048i_Intrinsic<string GCCIntSuffix> 9487 // tag : V6_vmpauhb_128B 9488 class Hexagon_V62_v2048v2048i_Intrinsic<string GCCIntSuffix> 9489 : Hexagon_Intrinsic<GCCIntSuffix, 9490 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_i32_ty], 9491 [IntrNoMem]>; 9492 9493 // 9494 // Hexagon_V62_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 9495 // tag : V6_vmpauhb_acc_128B 9496 class Hexagon_V62_v2048v2048v2048i_Intrinsic<string GCCIntSuffix> 9497 : Hexagon_Intrinsic<GCCIntSuffix, 9498 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v64i32_ty,llvm_i32_ty], 9499 [IntrNoMem]>; 9500 9501 // 9502 // Hexagon_V62_v512v64ii_Intrinsic<string GCCIntSuffix> 9503 // tag : V6_vandnqrt 9504 class Hexagon_V62_v512v64ii_Intrinsic<string GCCIntSuffix> 9505 : Hexagon_Intrinsic<GCCIntSuffix, 9506 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_i32_ty], 9507 [IntrNoMem]>; 9508 9509 // 9510 // Hexagon_V62_v1024v128ii_Intrinsic<string GCCIntSuffix> 9511 // tag : V6_vandnqrt_128B 9512 class Hexagon_V62_v1024v128ii_Intrinsic<string GCCIntSuffix> 9513 : Hexagon_Intrinsic<GCCIntSuffix, 9514 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_i32_ty], 9515 [IntrNoMem]>; 9516 9517 // 9518 // Hexagon_V62_v512v512v64ii_Intrinsic<string GCCIntSuffix> 9519 // tag : V6_vandnqrt_acc 9520 class Hexagon_V62_v512v512v64ii_Intrinsic<string GCCIntSuffix> 9521 : Hexagon_Intrinsic<GCCIntSuffix, 9522 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v512i1_ty,llvm_i32_ty], 9523 [IntrNoMem]>; 9524 9525 // 9526 // Hexagon_V62_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 9527 // tag : V6_vandnqrt_acc_128B 9528 class Hexagon_V62_v1024v1024v128ii_Intrinsic<string GCCIntSuffix> 9529 : Hexagon_Intrinsic<GCCIntSuffix, 9530 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v1024i1_ty,llvm_i32_ty], 9531 [IntrNoMem]>; 9532 9533 // 9534 // Hexagon_V62_v512v64iv512_Intrinsic<string GCCIntSuffix> 9535 // tag : V6_vandvqv 9536 class Hexagon_V62_v512v64iv512_Intrinsic<string GCCIntSuffix> 9537 : Hexagon_Intrinsic<GCCIntSuffix, 9538 [llvm_v16i32_ty], [llvm_v512i1_ty,llvm_v16i32_ty], 9539 [IntrNoMem]>; 9540 9541 // 9542 // Hexagon_V62_v1024v128iv1024_Intrinsic<string GCCIntSuffix> 9543 // tag : V6_vandvqv_128B 9544 class Hexagon_V62_v1024v128iv1024_Intrinsic<string GCCIntSuffix> 9545 : Hexagon_Intrinsic<GCCIntSuffix, 9546 [llvm_v32i32_ty], [llvm_v1024i1_ty,llvm_v32i32_ty], 9547 [IntrNoMem]>; 9548 9549 // 9550 // Hexagon_V62_v64ii_Intrinsic<string GCCIntSuffix> 9551 // tag : V6_pred_scalar2v2 9552 class Hexagon_V62_v64ii_Intrinsic<string GCCIntSuffix> 9553 : Hexagon_Intrinsic<GCCIntSuffix, 9554 [llvm_v512i1_ty], [llvm_i32_ty], 9555 [IntrNoMem]>; 9556 9557 // 9558 // Hexagon_V62_v128ii_Intrinsic<string GCCIntSuffix> 9559 // tag : V6_pred_scalar2v2_128B 9560 class Hexagon_V62_v128ii_Intrinsic<string GCCIntSuffix> 9561 : Hexagon_Intrinsic<GCCIntSuffix, 9562 [llvm_v1024i1_ty], [llvm_i32_ty], 9563 [IntrNoMem]>; 9564 9565 // 9566 // Hexagon_V62_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 9567 // tag : V6_shuffeqw 9568 class Hexagon_V62_v64iv64iv64i_Intrinsic<string GCCIntSuffix> 9569 : Hexagon_Intrinsic<GCCIntSuffix, 9570 [llvm_v512i1_ty], [llvm_v512i1_ty,llvm_v512i1_ty], 9571 [IntrNoMem]>; 9572 9573 // 9574 // Hexagon_V62_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 9575 // tag : V6_shuffeqw_128B 9576 class Hexagon_V62_v128iv128iv128i_Intrinsic<string GCCIntSuffix> 9577 : Hexagon_Intrinsic<GCCIntSuffix, 9578 [llvm_v1024i1_ty], [llvm_v1024i1_ty,llvm_v1024i1_ty], 9579 [IntrNoMem]>; 9580 9581 // 9582 // Hexagon_V62_v512i_Intrinsic<string GCCIntSuffix> 9583 // tag : V6_lvsplath 9584 class Hexagon_V62_v512i_Intrinsic<string GCCIntSuffix> 9585 : Hexagon_Intrinsic<GCCIntSuffix, 9586 [llvm_v16i32_ty], [llvm_i32_ty], 9587 [IntrNoMem]>; 9588 9589 // 9590 // Hexagon_V62_v1024i_Intrinsic<string GCCIntSuffix> 9591 // tag : V6_lvsplath_128B 9592 class Hexagon_V62_v1024i_Intrinsic<string GCCIntSuffix> 9593 : Hexagon_Intrinsic<GCCIntSuffix, 9594 [llvm_v32i32_ty], [llvm_i32_ty], 9595 [IntrNoMem]>; 9596 9597 // 9598 // Hexagon_V62_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 9599 // tag : V6_vlutvvb_oracci 9600 class Hexagon_V62_v512v512v512v512i_Intrinsic<string GCCIntSuffix> 9601 : Hexagon_Intrinsic<GCCIntSuffix, 9602 [llvm_v16i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9603 [IntrNoMem]>; 9604 9605 // 9606 // Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9607 // tag : V6_vlutvvb_oracci_128B 9608 class Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<string GCCIntSuffix> 9609 : Hexagon_Intrinsic<GCCIntSuffix, 9610 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9611 [IntrNoMem]>; 9612 9613 // 9614 // Hexagon_V62_v1024v512v512i_Intrinsic<string GCCIntSuffix> 9615 // tag : V6_vlutvwhi 9616 class Hexagon_V62_v1024v512v512i_Intrinsic<string GCCIntSuffix> 9617 : Hexagon_Intrinsic<GCCIntSuffix, 9618 [llvm_v32i32_ty], [llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9619 [IntrNoMem]>; 9620 9621 // 9622 // Hexagon_V62_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9623 // tag : V6_vlutvwhi_128B 9624 class Hexagon_V62_v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9625 : Hexagon_Intrinsic<GCCIntSuffix, 9626 [llvm_v64i32_ty], [llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9627 [IntrNoMem]>; 9628 9629 // 9630 // Hexagon_V62_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 9631 // tag : V6_vlutvwh_oracci 9632 class Hexagon_V62_v1024v1024v512v512i_Intrinsic<string GCCIntSuffix> 9633 : Hexagon_Intrinsic<GCCIntSuffix, 9634 [llvm_v32i32_ty], [llvm_v32i32_ty,llvm_v16i32_ty,llvm_v16i32_ty,llvm_i32_ty], 9635 [IntrNoMem]>; 9636 9637 // 9638 // Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9639 // tag : V6_vlutvwh_oracci_128B 9640 class Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<string GCCIntSuffix> 9641 : Hexagon_Intrinsic<GCCIntSuffix, 9642 [llvm_v64i32_ty], [llvm_v64i32_ty,llvm_v32i32_ty,llvm_v32i32_ty,llvm_i32_ty], 9643 [IntrNoMem]>; 9644 9645 9646 // 9647 // BUILTIN_INFO(HEXAGON.M6_vabsdiffb,DI_ftype_DIDI,2) 9648 // tag : M6_vabsdiffb 9649 def int_hexagon_M6_vabsdiffb : 9650 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_M6_vabsdiffb">; 9651 9652 // 9653 // BUILTIN_INFO(HEXAGON.M6_vabsdiffub,DI_ftype_DIDI,2) 9654 // tag : M6_vabsdiffub 9655 def int_hexagon_M6_vabsdiffub : 9656 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_M6_vabsdiffub">; 9657 9658 // 9659 // BUILTIN_INFO(HEXAGON.S6_vtrunehb_ppp,DI_ftype_DIDI,2) 9660 // tag : S6_vtrunehb_ppp 9661 def int_hexagon_S6_vtrunehb_ppp : 9662 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_S6_vtrunehb_ppp">; 9663 9664 // 9665 // BUILTIN_INFO(HEXAGON.S6_vtrunohb_ppp,DI_ftype_DIDI,2) 9666 // tag : S6_vtrunohb_ppp 9667 def int_hexagon_S6_vtrunohb_ppp : 9668 Hexagon_LLiLLiLLi_Intrinsic<"HEXAGON_S6_vtrunohb_ppp">; 9669 9670 // 9671 // BUILTIN_INFO(HEXAGON.S6_vsplatrbp,DI_ftype_SI,1) 9672 // tag : S6_vsplatrbp 9673 def int_hexagon_S6_vsplatrbp : 9674 Hexagon_LLii_Intrinsic<"HEXAGON_S6_vsplatrbp">; 9675 9676 // 9677 // BUILTIN_INFO(HEXAGON.V6_vlsrb,VI_ftype_VISI,2) 9678 // tag : V6_vlsrb 9679 def int_hexagon_V6_vlsrb : 9680 Hexagon_V62_v512v512i_Intrinsic<"HEXAGON_V6_vlsrb">; 9681 9682 // 9683 // BUILTIN_INFO(HEXAGON.V6_vlsrb_128B,VI_ftype_VISI,2) 9684 // tag : V6_vlsrb_128B 9685 def int_hexagon_V6_vlsrb_128B : 9686 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vlsrb_128B">; 9687 9688 // 9689 // BUILTIN_INFO(HEXAGON.V6_vasrwuhrndsat,VI_ftype_VIVISI,3) 9690 // tag : V6_vasrwuhrndsat 9691 def int_hexagon_V6_vasrwuhrndsat : 9692 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrwuhrndsat">; 9693 9694 // 9695 // BUILTIN_INFO(HEXAGON.V6_vasrwuhrndsat_128B,VI_ftype_VIVISI,3) 9696 // tag : V6_vasrwuhrndsat_128B 9697 def int_hexagon_V6_vasrwuhrndsat_128B : 9698 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrwuhrndsat_128B">; 9699 9700 // 9701 // BUILTIN_INFO(HEXAGON.V6_vasruwuhrndsat,VI_ftype_VIVISI,3) 9702 // tag : V6_vasruwuhrndsat 9703 def int_hexagon_V6_vasruwuhrndsat : 9704 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasruwuhrndsat">; 9705 9706 // 9707 // BUILTIN_INFO(HEXAGON.V6_vasruwuhrndsat_128B,VI_ftype_VIVISI,3) 9708 // tag : V6_vasruwuhrndsat_128B 9709 def int_hexagon_V6_vasruwuhrndsat_128B : 9710 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasruwuhrndsat_128B">; 9711 9712 // 9713 // BUILTIN_INFO(HEXAGON.V6_vasrhbsat,VI_ftype_VIVISI,3) 9714 // tag : V6_vasrhbsat 9715 def int_hexagon_V6_vasrhbsat : 9716 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vasrhbsat">; 9717 9718 // 9719 // BUILTIN_INFO(HEXAGON.V6_vasrhbsat_128B,VI_ftype_VIVISI,3) 9720 // tag : V6_vasrhbsat_128B 9721 def int_hexagon_V6_vasrhbsat_128B : 9722 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vasrhbsat_128B">; 9723 9724 // 9725 // BUILTIN_INFO(HEXAGON.V6_vrounduwuh,VI_ftype_VIVI,2) 9726 // tag : V6_vrounduwuh 9727 def int_hexagon_V6_vrounduwuh : 9728 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vrounduwuh">; 9729 9730 // 9731 // BUILTIN_INFO(HEXAGON.V6_vrounduwuh_128B,VI_ftype_VIVI,2) 9732 // tag : V6_vrounduwuh_128B 9733 def int_hexagon_V6_vrounduwuh_128B : 9734 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrounduwuh_128B">; 9735 9736 // 9737 // BUILTIN_INFO(HEXAGON.V6_vrounduhub,VI_ftype_VIVI,2) 9738 // tag : V6_vrounduhub 9739 def int_hexagon_V6_vrounduhub : 9740 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vrounduhub">; 9741 9742 // 9743 // BUILTIN_INFO(HEXAGON.V6_vrounduhub_128B,VI_ftype_VIVI,2) 9744 // tag : V6_vrounduhub_128B 9745 def int_hexagon_V6_vrounduhub_128B : 9746 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vrounduhub_128B">; 9747 9748 // 9749 // BUILTIN_INFO(HEXAGON.V6_vadduwsat,VI_ftype_VIVI,2) 9750 // tag : V6_vadduwsat 9751 def int_hexagon_V6_vadduwsat : 9752 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vadduwsat">; 9753 9754 // 9755 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_128B,VI_ftype_VIVI,2) 9756 // tag : V6_vadduwsat_128B 9757 def int_hexagon_V6_vadduwsat_128B : 9758 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduwsat_128B">; 9759 9760 // 9761 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_dv,VD_ftype_VDVD,2) 9762 // tag : V6_vadduwsat_dv 9763 def int_hexagon_V6_vadduwsat_dv : 9764 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vadduwsat_dv">; 9765 9766 // 9767 // BUILTIN_INFO(HEXAGON.V6_vadduwsat_dv_128B,VD_ftype_VDVD,2) 9768 // tag : V6_vadduwsat_dv_128B 9769 def int_hexagon_V6_vadduwsat_dv_128B : 9770 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vadduwsat_dv_128B">; 9771 9772 // 9773 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat,VI_ftype_VIVI,2) 9774 // tag : V6_vsubuwsat 9775 def int_hexagon_V6_vsubuwsat : 9776 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubuwsat">; 9777 9778 // 9779 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_128B,VI_ftype_VIVI,2) 9780 // tag : V6_vsubuwsat_128B 9781 def int_hexagon_V6_vsubuwsat_128B : 9782 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuwsat_128B">; 9783 9784 // 9785 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_dv,VD_ftype_VDVD,2) 9786 // tag : V6_vsubuwsat_dv 9787 def int_hexagon_V6_vsubuwsat_dv : 9788 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubuwsat_dv">; 9789 9790 // 9791 // BUILTIN_INFO(HEXAGON.V6_vsubuwsat_dv_128B,VD_ftype_VDVD,2) 9792 // tag : V6_vsubuwsat_dv_128B 9793 def int_hexagon_V6_vsubuwsat_dv_128B : 9794 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubuwsat_dv_128B">; 9795 9796 // 9797 // BUILTIN_INFO(HEXAGON.V6_vaddbsat,VI_ftype_VIVI,2) 9798 // tag : V6_vaddbsat 9799 def int_hexagon_V6_vaddbsat : 9800 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddbsat">; 9801 9802 // 9803 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_128B,VI_ftype_VIVI,2) 9804 // tag : V6_vaddbsat_128B 9805 def int_hexagon_V6_vaddbsat_128B : 9806 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddbsat_128B">; 9807 9808 // 9809 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_dv,VD_ftype_VDVD,2) 9810 // tag : V6_vaddbsat_dv 9811 def int_hexagon_V6_vaddbsat_dv : 9812 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddbsat_dv">; 9813 9814 // 9815 // BUILTIN_INFO(HEXAGON.V6_vaddbsat_dv_128B,VD_ftype_VDVD,2) 9816 // tag : V6_vaddbsat_dv_128B 9817 def int_hexagon_V6_vaddbsat_dv_128B : 9818 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vaddbsat_dv_128B">; 9819 9820 // 9821 // BUILTIN_INFO(HEXAGON.V6_vsubbsat,VI_ftype_VIVI,2) 9822 // tag : V6_vsubbsat 9823 def int_hexagon_V6_vsubbsat : 9824 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubbsat">; 9825 9826 // 9827 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_128B,VI_ftype_VIVI,2) 9828 // tag : V6_vsubbsat_128B 9829 def int_hexagon_V6_vsubbsat_128B : 9830 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubbsat_128B">; 9831 9832 // 9833 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_dv,VD_ftype_VDVD,2) 9834 // tag : V6_vsubbsat_dv 9835 def int_hexagon_V6_vsubbsat_dv : 9836 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubbsat_dv">; 9837 9838 // 9839 // BUILTIN_INFO(HEXAGON.V6_vsubbsat_dv_128B,VD_ftype_VDVD,2) 9840 // tag : V6_vsubbsat_dv_128B 9841 def int_hexagon_V6_vsubbsat_dv_128B : 9842 Hexagon_V62_v2048v2048v2048_Intrinsic<"HEXAGON_V6_vsubbsat_dv_128B">; 9843 9844 // 9845 // BUILTIN_INFO(HEXAGON.V6_vaddububb_sat,VI_ftype_VIVI,2) 9846 // tag : V6_vaddububb_sat 9847 def int_hexagon_V6_vaddububb_sat : 9848 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddububb_sat">; 9849 9850 // 9851 // BUILTIN_INFO(HEXAGON.V6_vaddububb_sat_128B,VI_ftype_VIVI,2) 9852 // tag : V6_vaddububb_sat_128B 9853 def int_hexagon_V6_vaddububb_sat_128B : 9854 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddububb_sat_128B">; 9855 9856 // 9857 // BUILTIN_INFO(HEXAGON.V6_vsubububb_sat,VI_ftype_VIVI,2) 9858 // tag : V6_vsubububb_sat 9859 def int_hexagon_V6_vsubububb_sat : 9860 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsubububb_sat">; 9861 9862 // 9863 // BUILTIN_INFO(HEXAGON.V6_vsubububb_sat_128B,VI_ftype_VIVI,2) 9864 // tag : V6_vsubububb_sat_128B 9865 def int_hexagon_V6_vsubububb_sat_128B : 9866 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsubububb_sat_128B">; 9867 9868 // 9869 // BUILTIN_INFO(HEXAGON.V6_vaddhw_acc,VD_ftype_VDVIVI,3) 9870 // tag : V6_vaddhw_acc 9871 def int_hexagon_V6_vaddhw_acc : 9872 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vaddhw_acc">; 9873 9874 // 9875 // BUILTIN_INFO(HEXAGON.V6_vaddhw_acc_128B,VD_ftype_VDVIVI,3) 9876 // tag : V6_vaddhw_acc_128B 9877 def int_hexagon_V6_vaddhw_acc_128B : 9878 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddhw_acc_128B">; 9879 9880 // 9881 // BUILTIN_INFO(HEXAGON.V6_vadduhw_acc,VD_ftype_VDVIVI,3) 9882 // tag : V6_vadduhw_acc 9883 def int_hexagon_V6_vadduhw_acc : 9884 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vadduhw_acc">; 9885 9886 // 9887 // BUILTIN_INFO(HEXAGON.V6_vadduhw_acc_128B,VD_ftype_VDVIVI,3) 9888 // tag : V6_vadduhw_acc_128B 9889 def int_hexagon_V6_vadduhw_acc_128B : 9890 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vadduhw_acc_128B">; 9891 9892 // 9893 // BUILTIN_INFO(HEXAGON.V6_vaddubh_acc,VD_ftype_VDVIVI,3) 9894 // tag : V6_vaddubh_acc 9895 def int_hexagon_V6_vaddubh_acc : 9896 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vaddubh_acc">; 9897 9898 // 9899 // BUILTIN_INFO(HEXAGON.V6_vaddubh_acc_128B,VD_ftype_VDVIVI,3) 9900 // tag : V6_vaddubh_acc_128B 9901 def int_hexagon_V6_vaddubh_acc_128B : 9902 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vaddubh_acc_128B">; 9903 9904 // 9905 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_64,VD_ftype_VIVI,2) 9906 // tag : V6_vmpyewuh_64 9907 def int_hexagon_V6_vmpyewuh_64 : 9908 Hexagon_V62_v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyewuh_64">; 9909 9910 // 9911 // BUILTIN_INFO(HEXAGON.V6_vmpyewuh_64_128B,VD_ftype_VIVI,2) 9912 // tag : V6_vmpyewuh_64_128B 9913 def int_hexagon_V6_vmpyewuh_64_128B : 9914 Hexagon_V62_v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyewuh_64_128B">; 9915 9916 // 9917 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_64_acc,VD_ftype_VDVIVI,3) 9918 // tag : V6_vmpyowh_64_acc 9919 def int_hexagon_V6_vmpyowh_64_acc : 9920 Hexagon_V62_v1024v1024v512v512_Intrinsic<"HEXAGON_V6_vmpyowh_64_acc">; 9921 9922 // 9923 // BUILTIN_INFO(HEXAGON.V6_vmpyowh_64_acc_128B,VD_ftype_VDVIVI,3) 9924 // tag : V6_vmpyowh_64_acc_128B 9925 def int_hexagon_V6_vmpyowh_64_acc_128B : 9926 Hexagon_V62_v2048v2048v1024v1024_Intrinsic<"HEXAGON_V6_vmpyowh_64_acc_128B">; 9927 9928 // 9929 // BUILTIN_INFO(HEXAGON.V6_vmpauhb,VD_ftype_VDSI,2) 9930 // tag : V6_vmpauhb 9931 def int_hexagon_V6_vmpauhb : 9932 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpauhb">; 9933 9934 // 9935 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_128B,VD_ftype_VDSI,2) 9936 // tag : V6_vmpauhb_128B 9937 def int_hexagon_V6_vmpauhb_128B : 9938 Hexagon_V62_v2048v2048i_Intrinsic<"HEXAGON_V6_vmpauhb_128B">; 9939 9940 // 9941 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_acc,VD_ftype_VDVDSI,3) 9942 // tag : V6_vmpauhb_acc 9943 def int_hexagon_V6_vmpauhb_acc : 9944 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpauhb_acc">; 9945 9946 // 9947 // BUILTIN_INFO(HEXAGON.V6_vmpauhb_acc_128B,VD_ftype_VDVDSI,3) 9948 // tag : V6_vmpauhb_acc_128B 9949 def int_hexagon_V6_vmpauhb_acc_128B : 9950 Hexagon_V62_v2048v2048v2048i_Intrinsic<"HEXAGON_V6_vmpauhb_acc_128B">; 9951 9952 // 9953 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub,VI_ftype_VISI,2) 9954 // tag : V6_vmpyiwub 9955 def int_hexagon_V6_vmpyiwub : 9956 Hexagon_V62_v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwub">; 9957 9958 // 9959 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_128B,VI_ftype_VISI,2) 9960 // tag : V6_vmpyiwub_128B 9961 def int_hexagon_V6_vmpyiwub_128B : 9962 Hexagon_V62_v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwub_128B">; 9963 9964 // 9965 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_acc,VI_ftype_VIVISI,3) 9966 // tag : V6_vmpyiwub_acc 9967 def int_hexagon_V6_vmpyiwub_acc : 9968 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vmpyiwub_acc">; 9969 9970 // 9971 // BUILTIN_INFO(HEXAGON.V6_vmpyiwub_acc_128B,VI_ftype_VIVISI,3) 9972 // tag : V6_vmpyiwub_acc_128B 9973 def int_hexagon_V6_vmpyiwub_acc_128B : 9974 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vmpyiwub_acc_128B">; 9975 9976 // 9977 // BUILTIN_INFO(HEXAGON.V6_vandnqrt,VI_ftype_QVSI,2) 9978 // tag : V6_vandnqrt 9979 def int_hexagon_V6_vandnqrt : 9980 Hexagon_V62_v512v64ii_Intrinsic<"HEXAGON_V6_vandnqrt">; 9981 9982 // 9983 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_128B,VI_ftype_QVSI,2) 9984 // tag : V6_vandnqrt_128B 9985 def int_hexagon_V6_vandnqrt_128B : 9986 Hexagon_V62_v1024v128ii_Intrinsic<"HEXAGON_V6_vandnqrt_128B">; 9987 9988 // 9989 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_acc,VI_ftype_VIQVSI,3) 9990 // tag : V6_vandnqrt_acc 9991 def int_hexagon_V6_vandnqrt_acc : 9992 Hexagon_V62_v512v512v64ii_Intrinsic<"HEXAGON_V6_vandnqrt_acc">; 9993 9994 // 9995 // BUILTIN_INFO(HEXAGON.V6_vandnqrt_acc_128B,VI_ftype_VIQVSI,3) 9996 // tag : V6_vandnqrt_acc_128B 9997 def int_hexagon_V6_vandnqrt_acc_128B : 9998 Hexagon_V62_v1024v1024v128ii_Intrinsic<"HEXAGON_V6_vandnqrt_acc_128B">; 9999 10000 // 10001 // BUILTIN_INFO(HEXAGON.V6_vandvqv,VI_ftype_QVVI,2) 10002 // tag : V6_vandvqv 10003 def int_hexagon_V6_vandvqv : 10004 Hexagon_V62_v512v64iv512_Intrinsic<"HEXAGON_V6_vandvqv">; 10005 10006 // 10007 // BUILTIN_INFO(HEXAGON.V6_vandvqv_128B,VI_ftype_QVVI,2) 10008 // tag : V6_vandvqv_128B 10009 def int_hexagon_V6_vandvqv_128B : 10010 Hexagon_V62_v1024v128iv1024_Intrinsic<"HEXAGON_V6_vandvqv_128B">; 10011 10012 // 10013 // BUILTIN_INFO(HEXAGON.V6_vandvnqv,VI_ftype_QVVI,2) 10014 // tag : V6_vandvnqv 10015 def int_hexagon_V6_vandvnqv : 10016 Hexagon_V62_v512v64iv512_Intrinsic<"HEXAGON_V6_vandvnqv">; 10017 10018 // 10019 // BUILTIN_INFO(HEXAGON.V6_vandvnqv_128B,VI_ftype_QVVI,2) 10020 // tag : V6_vandvnqv_128B 10021 def int_hexagon_V6_vandvnqv_128B : 10022 Hexagon_V62_v1024v128iv1024_Intrinsic<"HEXAGON_V6_vandvnqv_128B">; 10023 10024 // 10025 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2v2,QV_ftype_SI,1) 10026 // tag : V6_pred_scalar2v2 10027 def int_hexagon_V6_pred_scalar2v2 : 10028 Hexagon_V62_v64ii_Intrinsic<"HEXAGON_V6_pred_scalar2v2">; 10029 10030 // 10031 // BUILTIN_INFO(HEXAGON.V6_pred_scalar2v2_128B,QV_ftype_SI,1) 10032 // tag : V6_pred_scalar2v2_128B 10033 def int_hexagon_V6_pred_scalar2v2_128B : 10034 Hexagon_V62_v128ii_Intrinsic<"HEXAGON_V6_pred_scalar2v2_128B">; 10035 10036 // 10037 // BUILTIN_INFO(HEXAGON.V6_shuffeqw,QV_ftype_QVQV,2) 10038 // tag : V6_shuffeqw 10039 def int_hexagon_V6_shuffeqw : 10040 Hexagon_V62_v64iv64iv64i_Intrinsic<"HEXAGON_V6_shuffeqw">; 10041 10042 // 10043 // BUILTIN_INFO(HEXAGON.V6_shuffeqw_128B,QV_ftype_QVQV,2) 10044 // tag : V6_shuffeqw_128B 10045 def int_hexagon_V6_shuffeqw_128B : 10046 Hexagon_V62_v128iv128iv128i_Intrinsic<"HEXAGON_V6_shuffeqw_128B">; 10047 10048 // 10049 // BUILTIN_INFO(HEXAGON.V6_shuffeqh,QV_ftype_QVQV,2) 10050 // tag : V6_shuffeqh 10051 def int_hexagon_V6_shuffeqh : 10052 Hexagon_V62_v64iv64iv64i_Intrinsic<"HEXAGON_V6_shuffeqh">; 10053 10054 // 10055 // BUILTIN_INFO(HEXAGON.V6_shuffeqh_128B,QV_ftype_QVQV,2) 10056 // tag : V6_shuffeqh_128B 10057 def int_hexagon_V6_shuffeqh_128B : 10058 Hexagon_V62_v128iv128iv128i_Intrinsic<"HEXAGON_V6_shuffeqh_128B">; 10059 10060 // 10061 // BUILTIN_INFO(HEXAGON.V6_vmaxb,VI_ftype_VIVI,2) 10062 // tag : V6_vmaxb 10063 def int_hexagon_V6_vmaxb : 10064 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vmaxb">; 10065 10066 // 10067 // BUILTIN_INFO(HEXAGON.V6_vmaxb_128B,VI_ftype_VIVI,2) 10068 // tag : V6_vmaxb_128B 10069 def int_hexagon_V6_vmaxb_128B : 10070 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vmaxb_128B">; 10071 10072 // 10073 // BUILTIN_INFO(HEXAGON.V6_vminb,VI_ftype_VIVI,2) 10074 // tag : V6_vminb 10075 def int_hexagon_V6_vminb : 10076 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vminb">; 10077 10078 // 10079 // BUILTIN_INFO(HEXAGON.V6_vminb_128B,VI_ftype_VIVI,2) 10080 // tag : V6_vminb_128B 10081 def int_hexagon_V6_vminb_128B : 10082 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vminb_128B">; 10083 10084 // 10085 // BUILTIN_INFO(HEXAGON.V6_vsatuwuh,VI_ftype_VIVI,2) 10086 // tag : V6_vsatuwuh 10087 def int_hexagon_V6_vsatuwuh : 10088 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vsatuwuh">; 10089 10090 // 10091 // BUILTIN_INFO(HEXAGON.V6_vsatuwuh_128B,VI_ftype_VIVI,2) 10092 // tag : V6_vsatuwuh_128B 10093 def int_hexagon_V6_vsatuwuh_128B : 10094 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vsatuwuh_128B">; 10095 10096 // 10097 // BUILTIN_INFO(HEXAGON.V6_lvsplath,VI_ftype_SI,1) 10098 // tag : V6_lvsplath 10099 def int_hexagon_V6_lvsplath : 10100 Hexagon_V62_v512i_Intrinsic<"HEXAGON_V6_lvsplath">; 10101 10102 // 10103 // BUILTIN_INFO(HEXAGON.V6_lvsplath_128B,VI_ftype_SI,1) 10104 // tag : V6_lvsplath_128B 10105 def int_hexagon_V6_lvsplath_128B : 10106 Hexagon_V62_v1024i_Intrinsic<"HEXAGON_V6_lvsplath_128B">; 10107 10108 // 10109 // BUILTIN_INFO(HEXAGON.V6_lvsplatb,VI_ftype_SI,1) 10110 // tag : V6_lvsplatb 10111 def int_hexagon_V6_lvsplatb : 10112 Hexagon_V62_v512i_Intrinsic<"HEXAGON_V6_lvsplatb">; 10113 10114 // 10115 // BUILTIN_INFO(HEXAGON.V6_lvsplatb_128B,VI_ftype_SI,1) 10116 // tag : V6_lvsplatb_128B 10117 def int_hexagon_V6_lvsplatb_128B : 10118 Hexagon_V62_v1024i_Intrinsic<"HEXAGON_V6_lvsplatb_128B">; 10119 10120 // 10121 // BUILTIN_INFO(HEXAGON.V6_vaddclbw,VI_ftype_VIVI,2) 10122 // tag : V6_vaddclbw 10123 def int_hexagon_V6_vaddclbw : 10124 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddclbw">; 10125 10126 // 10127 // BUILTIN_INFO(HEXAGON.V6_vaddclbw_128B,VI_ftype_VIVI,2) 10128 // tag : V6_vaddclbw_128B 10129 def int_hexagon_V6_vaddclbw_128B : 10130 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddclbw_128B">; 10131 10132 // 10133 // BUILTIN_INFO(HEXAGON.V6_vaddclbh,VI_ftype_VIVI,2) 10134 // tag : V6_vaddclbh 10135 def int_hexagon_V6_vaddclbh : 10136 Hexagon_V62_v512v512v512_Intrinsic<"HEXAGON_V6_vaddclbh">; 10137 10138 // 10139 // BUILTIN_INFO(HEXAGON.V6_vaddclbh_128B,VI_ftype_VIVI,2) 10140 // tag : V6_vaddclbh_128B 10141 def int_hexagon_V6_vaddclbh_128B : 10142 Hexagon_V62_v1024v1024v1024_Intrinsic<"HEXAGON_V6_vaddclbh_128B">; 10143 10144 // 10145 // BUILTIN_INFO(HEXAGON.V6_vlutvvbi,VI_ftype_VIVISI,3) 10146 // tag : V6_vlutvvbi 10147 def int_hexagon_V6_vlutvvbi : 10148 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvbi">; 10149 10150 // 10151 // BUILTIN_INFO(HEXAGON.V6_vlutvvbi_128B,VI_ftype_VIVISI,3) 10152 // tag : V6_vlutvvbi_128B 10153 def int_hexagon_V6_vlutvvbi_128B : 10154 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvbi_128B">; 10155 10156 // 10157 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracci,VI_ftype_VIVIVISI,4) 10158 // tag : V6_vlutvvb_oracci 10159 def int_hexagon_V6_vlutvvb_oracci : 10160 Hexagon_V62_v512v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_oracci">; 10161 10162 // 10163 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_oracci_128B,VI_ftype_VIVIVISI,4) 10164 // tag : V6_vlutvvb_oracci_128B 10165 def int_hexagon_V6_vlutvvb_oracci_128B : 10166 Hexagon_V62_v1024v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_oracci_128B">; 10167 10168 // 10169 // BUILTIN_INFO(HEXAGON.V6_vlutvwhi,VD_ftype_VIVISI,3) 10170 // tag : V6_vlutvwhi 10171 def int_hexagon_V6_vlutvwhi : 10172 Hexagon_V62_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwhi">; 10173 10174 // 10175 // BUILTIN_INFO(HEXAGON.V6_vlutvwhi_128B,VD_ftype_VIVISI,3) 10176 // tag : V6_vlutvwhi_128B 10177 def int_hexagon_V6_vlutvwhi_128B : 10178 Hexagon_V62_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwhi_128B">; 10179 10180 // 10181 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracci,VD_ftype_VDVIVISI,4) 10182 // tag : V6_vlutvwh_oracci 10183 def int_hexagon_V6_vlutvwh_oracci : 10184 Hexagon_V62_v1024v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_oracci">; 10185 10186 // 10187 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_oracci_128B,VD_ftype_VDVIVISI,4) 10188 // tag : V6_vlutvwh_oracci_128B 10189 def int_hexagon_V6_vlutvwh_oracci_128B : 10190 Hexagon_V62_v2048v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_oracci_128B">; 10191 10192 // 10193 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_nm,VI_ftype_VIVISI,3) 10194 // tag : V6_vlutvvb_nm 10195 def int_hexagon_V6_vlutvvb_nm : 10196 Hexagon_V62_v512v512v512i_Intrinsic<"HEXAGON_V6_vlutvvb_nm">; 10197 10198 // 10199 // BUILTIN_INFO(HEXAGON.V6_vlutvvb_nm_128B,VI_ftype_VIVISI,3) 10200 // tag : V6_vlutvvb_nm_128B 10201 def int_hexagon_V6_vlutvvb_nm_128B : 10202 Hexagon_V62_v1024v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvvb_nm_128B">; 10203 10204 // 10205 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_nm,VD_ftype_VIVISI,3) 10206 // tag : V6_vlutvwh_nm 10207 def int_hexagon_V6_vlutvwh_nm : 10208 Hexagon_V62_v1024v512v512i_Intrinsic<"HEXAGON_V6_vlutvwh_nm">; 10209 10210 // 10211 // BUILTIN_INFO(HEXAGON.V6_vlutvwh_nm_128B,VD_ftype_VIVISI,3) 10212 // tag : V6_vlutvwh_nm_128B 10213 def int_hexagon_V6_vlutvwh_nm_128B : 10214 Hexagon_V62_v2048v1024v1024i_Intrinsic<"HEXAGON_V6_vlutvwh_nm_128B">; 10215 10216
