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      1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines interfaces to access the target independent code generation
     11 // passes provided by the LLVM backend.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_CODEGEN_PASSES_H
     16 #define LLVM_CODEGEN_PASSES_H
     17 
     18 #include <functional>
     19 #include <string>
     20 
     21 namespace llvm {
     22 
     23 class FunctionPass;
     24 class MachineFunction;
     25 class MachineFunctionPass;
     26 class ModulePass;
     27 class Pass;
     28 class TargetMachine;
     29 class TargetRegisterClass;
     30 class raw_ostream;
     31 
     32 } // End llvm namespace
     33 
     34 /// List of target independent CodeGen pass IDs.
     35 namespace llvm {
     36   FunctionPass *createAtomicExpandPass();
     37 
     38   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
     39   /// work well with unreachable basic blocks (what live ranges make sense for a
     40   /// block that cannot be reached?).  As such, a code generator should either
     41   /// not instruction select unreachable blocks, or run this pass as its
     42   /// last LLVM modifying pass to clean up blocks that are not reachable from
     43   /// the entry block.
     44   FunctionPass *createUnreachableBlockEliminationPass();
     45 
     46   /// Insert mcount-like function calls.
     47   FunctionPass *createCountingFunctionInserterPass();
     48 
     49   /// MachineFunctionPrinter pass - This pass prints out the machine function to
     50   /// the given stream as a debugging tool.
     51   MachineFunctionPass *
     52   createMachineFunctionPrinterPass(raw_ostream &OS,
     53                                    const std::string &Banner ="");
     54 
     55   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
     56   /// using the MIR serialization format.
     57   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
     58 
     59   /// This pass resets a MachineFunction when it has the FailedISel property
     60   /// as if it was just created.
     61   /// If EmitFallbackDiag is true, the pass will emit a
     62   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
     63   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
     64   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
     65                                                       bool AbortOnFailedISel);
     66 
     67   /// createCodeGenPreparePass - Transform the code to expose more pattern
     68   /// matching during instruction selection.
     69   FunctionPass *createCodeGenPreparePass();
     70 
     71   /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
     72   /// and scatter intrinsics with scalar code when target doesn't support them.
     73   FunctionPass *createScalarizeMaskedMemIntrinPass();
     74 
     75   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
     76   /// load-linked/store-conditional loops.
     77   extern char &AtomicExpandID;
     78 
     79   /// MachineLoopInfo - This pass is a loop analysis pass.
     80   extern char &MachineLoopInfoID;
     81 
     82   /// MachineDominators - This pass is a machine dominators analysis pass.
     83   extern char &MachineDominatorsID;
     84 
     85 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
     86   extern char &MachineDominanceFrontierID;
     87 
     88   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
     89   extern char &MachineRegionInfoPassID;
     90 
     91   /// EdgeBundles analysis - Bundle machine CFG edges.
     92   extern char &EdgeBundlesID;
     93 
     94   /// LiveVariables pass - This pass computes the set of blocks in which each
     95   /// variable is life and sets machine operand kill flags.
     96   extern char &LiveVariablesID;
     97 
     98   /// PHIElimination - This pass eliminates machine instruction PHI nodes
     99   /// by inserting copy instructions.  This destroys SSA information, but is the
    100   /// desired input for some register allocators.  This pass is "required" by
    101   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
    102   extern char &PHIEliminationID;
    103 
    104   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
    105   /// and physical registers.
    106   extern char &LiveIntervalsID;
    107 
    108   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
    109   extern char &LiveStacksID;
    110 
    111   /// TwoAddressInstruction - This pass reduces two-address instructions to
    112   /// use two operands. This destroys SSA information but it is desired by
    113   /// register allocators.
    114   extern char &TwoAddressInstructionPassID;
    115 
    116   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
    117   extern char &ProcessImplicitDefsID;
    118 
    119   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
    120   extern char &RegisterCoalescerID;
    121 
    122   /// MachineScheduler - This pass schedules machine instructions.
    123   extern char &MachineSchedulerID;
    124 
    125   /// PostMachineScheduler - This pass schedules machine instructions postRA.
    126   extern char &PostMachineSchedulerID;
    127 
    128   /// SpillPlacement analysis. Suggest optimal placement of spill code between
    129   /// basic blocks.
    130   extern char &SpillPlacementID;
    131 
    132   /// ShrinkWrap pass. Look for the best place to insert save and restore
    133   // instruction and update the MachineFunctionInfo with that information.
    134   extern char &ShrinkWrapID;
    135 
    136   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
    137   /// the definition's live range.
    138   extern char &LiveRangeShrinkID;
    139 
    140   /// Greedy register allocator.
    141   extern char &RAGreedyID;
    142 
    143   /// Basic register allocator.
    144   extern char &RABasicID;
    145 
    146   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
    147   /// assigned in VirtRegMap.
    148   extern char &VirtRegRewriterID;
    149 
    150   /// UnreachableMachineBlockElimination - This pass removes unreachable
    151   /// machine basic blocks.
    152   extern char &UnreachableMachineBlockElimID;
    153 
    154   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
    155   extern char &DeadMachineInstructionElimID;
    156 
    157   /// This pass adds dead/undef flags after analyzing subregister lanes.
    158   extern char &DetectDeadLanesID;
    159 
    160   /// FastRegisterAllocation Pass - This pass register allocates as fast as
    161   /// possible. It is best suited for debug code where live ranges are short.
    162   ///
    163   FunctionPass *createFastRegisterAllocator();
    164 
    165   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
    166   /// register allocator using the basic regalloc framework.
    167   ///
    168   FunctionPass *createBasicRegisterAllocator();
    169 
    170   /// Greedy register allocation pass - This pass implements a global register
    171   /// allocator for optimized builds.
    172   ///
    173   FunctionPass *createGreedyRegisterAllocator();
    174 
    175   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
    176   /// Quadratic Prograaming (PBQP) based register allocator.
    177   ///
    178   FunctionPass *createDefaultPBQPRegisterAllocator();
    179 
    180   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
    181   /// and eliminates abstract frame references.
    182   extern char &PrologEpilogCodeInserterID;
    183   MachineFunctionPass *createPrologEpilogInserterPass();
    184 
    185   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
    186   /// register allocation.
    187   extern char &ExpandPostRAPseudosID;
    188 
    189   /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
    190   /// recognizer.
    191   extern char &PostRAHazardRecognizerID;
    192 
    193   /// createPostRAScheduler - This pass performs post register allocation
    194   /// scheduling.
    195   extern char &PostRASchedulerID;
    196 
    197   /// BranchFolding - This pass performs machine code CFG based
    198   /// optimizations to delete branches to branches, eliminate branches to
    199   /// successor blocks (creating fall throughs), and eliminating branches over
    200   /// branches.
    201   extern char &BranchFolderPassID;
    202 
    203   /// BranchRelaxation - This pass replaces branches that need to jump further
    204   /// than is supported by a branch instruction.
    205   extern char &BranchRelaxationPassID;
    206 
    207   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
    208   extern char &MachineFunctionPrinterPassID;
    209 
    210   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
    211   /// serialization format.
    212   extern char &MIRPrintingPassID;
    213 
    214   /// TailDuplicate - Duplicate blocks with unconditional branches
    215   /// into tails of their predecessors.
    216   extern char &TailDuplicateID;
    217 
    218   /// MachineTraceMetrics - This pass computes critical path and CPU resource
    219   /// usage in an ensemble of traces.
    220   extern char &MachineTraceMetricsID;
    221 
    222   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
    223   /// inserting cmov instructions.
    224   extern char &EarlyIfConverterID;
    225 
    226   /// This pass performs instruction combining using trace metrics to estimate
    227   /// critical-path and resource depth.
    228   extern char &MachineCombinerID;
    229 
    230   /// StackSlotColoring - This pass performs stack coloring and merging.
    231   /// It merges disjoint allocas to reduce the stack size.
    232   extern char &StackColoringID;
    233 
    234   /// IfConverter - This pass performs machine code if conversion.
    235   extern char &IfConverterID;
    236 
    237   FunctionPass *createIfConverter(
    238       std::function<bool(const MachineFunction &)> Ftor);
    239 
    240   /// MachineBlockPlacement - This pass places basic blocks based on branch
    241   /// probabilities.
    242   extern char &MachineBlockPlacementID;
    243 
    244   /// MachineBlockPlacementStats - This pass collects statistics about the
    245   /// basic block placement using branch probabilities and block frequency
    246   /// information.
    247   extern char &MachineBlockPlacementStatsID;
    248 
    249   /// GCLowering Pass - Used by gc.root to perform its default lowering
    250   /// operations.
    251   FunctionPass *createGCLoweringPass();
    252 
    253   /// ShadowStackGCLowering - Implements the custom lowering mechanism
    254   /// used by the shadow stack GC.  Only runs on functions which opt in to
    255   /// the shadow stack collector.
    256   FunctionPass *createShadowStackGCLoweringPass();
    257 
    258   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
    259   /// in machine code. Must be added very late during code generation, just
    260   /// prior to output, and importantly after all CFG transformations (such as
    261   /// branch folding).
    262   extern char &GCMachineCodeAnalysisID;
    263 
    264   /// Creates a pass to print GC metadata.
    265   ///
    266   FunctionPass *createGCInfoPrinter(raw_ostream &OS);
    267 
    268   /// MachineCSE - This pass performs global CSE on machine instructions.
    269   extern char &MachineCSEID;
    270 
    271   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
    272   /// memory operations.
    273   extern char &ImplicitNullChecksID;
    274 
    275   /// MachineLICM - This pass performs LICM on machine instructions.
    276   extern char &MachineLICMID;
    277 
    278   /// MachineSinking - This pass performs sinking on machine instructions.
    279   extern char &MachineSinkingID;
    280 
    281   /// MachineCopyPropagation - This pass performs copy propagation on
    282   /// machine instructions.
    283   extern char &MachineCopyPropagationID;
    284 
    285   /// PeepholeOptimizer - This pass performs peephole optimizations -
    286   /// like extension and comparison eliminations.
    287   extern char &PeepholeOptimizerID;
    288 
    289   /// OptimizePHIs - This pass optimizes machine instruction PHIs
    290   /// to take advantage of opportunities created during DAG legalization.
    291   extern char &OptimizePHIsID;
    292 
    293   /// StackSlotColoring - This pass performs stack slot coloring.
    294   extern char &StackSlotColoringID;
    295 
    296   /// \brief This pass lays out funclets contiguously.
    297   extern char &FuncletLayoutID;
    298 
    299   /// This pass inserts the XRay instrumentation sleds if they are supported by
    300   /// the target platform.
    301   extern char &XRayInstrumentationID;
    302 
    303   /// This pass inserts FEntry calls
    304   extern char &FEntryInserterID;
    305 
    306   /// \brief This pass implements the "patchable-function" attribute.
    307   extern char &PatchableFunctionID;
    308 
    309   /// createStackProtectorPass - This pass adds stack protectors to functions.
    310   ///
    311   FunctionPass *createStackProtectorPass();
    312 
    313   /// createMachineVerifierPass - This pass verifies cenerated machine code
    314   /// instructions for correctness.
    315   ///
    316   FunctionPass *createMachineVerifierPass(const std::string& Banner);
    317 
    318   /// createDwarfEHPass - This pass mulches exception handling code into a form
    319   /// adapted to code generation.  Required if using dwarf exception handling.
    320   FunctionPass *createDwarfEHPass();
    321 
    322   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
    323   /// in addition to the Itanium LSDA based personalities.
    324   FunctionPass *createWinEHPass();
    325 
    326   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
    327   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
    328   ///
    329   FunctionPass *createSjLjEHPreparePass();
    330 
    331   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
    332   /// slots relative to one another and allocates base registers to access them
    333   /// when it is estimated by the target to be out of range of normal frame
    334   /// pointer or stack pointer index addressing.
    335   extern char &LocalStackSlotAllocationID;
    336 
    337   /// ExpandISelPseudos - This pass expands pseudo-instructions.
    338   extern char &ExpandISelPseudosID;
    339 
    340   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
    341   extern char &UnpackMachineBundlesID;
    342 
    343   FunctionPass *
    344   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
    345 
    346   /// FinalizeMachineBundles - This pass finalize machine instruction
    347   /// bundles (created earlier, e.g. during pre-RA scheduling).
    348   extern char &FinalizeMachineBundlesID;
    349 
    350   /// StackMapLiveness - This pass analyses the register live-out set of
    351   /// stackmap/patchpoint intrinsics and attaches the calculated information to
    352   /// the intrinsic for later emission to the StackMap.
    353   extern char &StackMapLivenessID;
    354 
    355   /// LiveDebugValues pass
    356   extern char &LiveDebugValuesID;
    357 
    358   /// createJumpInstrTables - This pass creates jump-instruction tables.
    359   ModulePass *createJumpInstrTablesPass();
    360 
    361   /// createForwardControlFlowIntegrityPass - This pass adds control-flow
    362   /// integrity.
    363   ModulePass *createForwardControlFlowIntegrityPass();
    364 
    365   /// InterleavedAccess Pass - This pass identifies and matches interleaved
    366   /// memory accesses to target specific intrinsics.
    367   ///
    368   FunctionPass *createInterleavedAccessPass();
    369 
    370   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
    371   /// TLS variables for the emulated TLS model.
    372   ///
    373   ModulePass *createLowerEmuTLSPass();
    374 
    375   /// This pass lowers the @llvm.load.relative intrinsic to instructions.
    376   /// This is unsafe to do earlier because a pass may combine the constant
    377   /// initializer into the load, which may result in an overflowing evaluation.
    378   ModulePass *createPreISelIntrinsicLoweringPass();
    379 
    380   /// GlobalMerge - This pass merges internal (by default) globals into structs
    381   /// to enable reuse of a base pointer by indexed addressing modes.
    382   /// It can also be configured to focus on size optimizations only.
    383   ///
    384   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
    385                               bool OnlyOptimizeForSize = false,
    386                               bool MergeExternalByDefault = false);
    387 
    388   /// This pass splits the stack into a safe stack and an unsafe stack to
    389   /// protect against stack-based overflow vulnerabilities.
    390   FunctionPass *createSafeStackPass();
    391 
    392   /// This pass detects subregister lanes in a virtual register that are used
    393   /// independently of other lanes and splits them into separate virtual
    394   /// registers.
    395   extern char &RenameIndependentSubregsID;
    396 
    397   /// This pass is executed POST-RA to collect which physical registers are
    398   /// preserved by given machine function.
    399   FunctionPass *createRegUsageInfoCollector();
    400 
    401   /// Return a MachineFunction pass that identifies call sites
    402   /// and propagates register usage information of callee to caller
    403   /// if available with PysicalRegisterUsageInfo pass.
    404   FunctionPass *createRegUsageInfoPropPass();
    405 
    406   /// This pass performs software pipelining on machine instructions.
    407   extern char &MachinePipelinerID;
    408 
    409   /// This pass frees the memory occupied by the MachineFunction.
    410   FunctionPass *createFreeMachineFunctionPass();
    411 
    412   /// This pass performs outlining on machine instructions directly before
    413   /// printing assembly.
    414   ModulePass *createMachineOutlinerPass(bool OutlineFromLinkOnceODRs = false);
    415 
    416   /// This pass expands the experimental reduction intrinsics into sequences of
    417   /// shuffles.
    418   FunctionPass *createExpandReductionsPass();
    419 
    420 } // End llvm namespace
    421 
    422 #endif
    423