1 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains enumerations and support routines for ARM build attributes 11 // as defined in ARM ABI addenda document (ABI release 2.08). 12 // 13 // ELF for the ARM Architecture r2.09 - November 30, 2012 14 // 15 // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf 16 // 17 //===----------------------------------------------------------------------===// 18 19 #ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 20 #define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 21 22 namespace llvm { 23 class StringRef; 24 25 namespace ARMBuildAttrs { 26 27 enum SpecialAttr { 28 // This is for the .cpu asm attr. It translates into one or more 29 // AttrType (below) entries in the .ARM.attributes section in the ELF. 30 SEL_CPU 31 }; 32 33 enum AttrType { 34 // Rest correspond to ELF/.ARM.attributes 35 File = 1, 36 CPU_raw_name = 4, 37 CPU_name = 5, 38 CPU_arch = 6, 39 CPU_arch_profile = 7, 40 ARM_ISA_use = 8, 41 THUMB_ISA_use = 9, 42 FP_arch = 10, 43 WMMX_arch = 11, 44 Advanced_SIMD_arch = 12, 45 PCS_config = 13, 46 ABI_PCS_R9_use = 14, 47 ABI_PCS_RW_data = 15, 48 ABI_PCS_RO_data = 16, 49 ABI_PCS_GOT_use = 17, 50 ABI_PCS_wchar_t = 18, 51 ABI_FP_rounding = 19, 52 ABI_FP_denormal = 20, 53 ABI_FP_exceptions = 21, 54 ABI_FP_user_exceptions = 22, 55 ABI_FP_number_model = 23, 56 ABI_align_needed = 24, 57 ABI_align_preserved = 25, 58 ABI_enum_size = 26, 59 ABI_HardFP_use = 27, 60 ABI_VFP_args = 28, 61 ABI_WMMX_args = 29, 62 ABI_optimization_goals = 30, 63 ABI_FP_optimization_goals = 31, 64 compatibility = 32, 65 CPU_unaligned_access = 34, 66 FP_HP_extension = 36, 67 ABI_FP_16bit_format = 38, 68 MPextension_use = 42, // recoded from 70 (ABI r2.08) 69 DIV_use = 44, 70 DSP_extension = 46, 71 also_compatible_with = 65, 72 conformance = 67, 73 Virtualization_use = 68, 74 75 /// Legacy Tags 76 Section = 2, // deprecated (ABI r2.09) 77 Symbol = 3, // deprecated (ABI r2.09) 78 ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09) 79 ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09) 80 nodefaults = 64, // deprecated (ABI r2.09) 81 T2EE_use = 66, // deprecated (ABI r2.09) 82 MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08) 83 }; 84 85 StringRef AttrTypeAsString(unsigned Attr, bool HasTagPrefix = true); 86 StringRef AttrTypeAsString(AttrType Attr, bool HasTagPrefix = true); 87 int AttrTypeFromString(StringRef Tag); 88 89 // Magic numbers for .ARM.attributes 90 enum AttrMagic { 91 Format_Version = 0x41 92 }; 93 94 // Legal Values for CPU_arch, (=6), uleb128 95 enum CPUArch { 96 Pre_v4 = 0, 97 v4 = 1, // e.g. SA110 98 v4T = 2, // e.g. ARM7TDMI 99 v5T = 3, // e.g. ARM9TDMI 100 v5TE = 4, // e.g. ARM946E_S 101 v5TEJ = 5, // e.g. ARM926EJ_S 102 v6 = 6, // e.g. ARM1136J_S 103 v6KZ = 7, // e.g. ARM1176JZ_S 104 v6T2 = 8, // e.g. ARM1156T2_S 105 v6K = 9, // e.g. ARM1176JZ_S 106 v7 = 10, // e.g. Cortex A8, Cortex M3 107 v6_M = 11, // e.g. Cortex M1 108 v6S_M = 12, // v6_M with the System extensions 109 v7E_M = 13, // v7_M with DSP extensions 110 v8_A = 14, // v8_A AArch32 111 v8_R = 15, // e.g. Cortex R52 112 v8_M_Base= 16, // v8_M_Base AArch32 113 v8_M_Main= 17, // v8_M_Main AArch32 114 }; 115 116 enum CPUArchProfile { // (=7), uleb128 117 Not_Applicable = 0, // pre v7, or cross-profile code 118 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) 119 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) 120 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) 121 SystemProfile = (0x53) // 'S' Application or real-time profile 122 }; 123 124 // The following have a lot of common use cases 125 enum { 126 Not_Allowed = 0, 127 Allowed = 1, 128 129 // Tag_ARM_ISA_use (=8), uleb128 130 131 // Tag_THUMB_ISA_use, (=9), uleb128 132 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) 133 AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile 134 135 // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) 136 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) 137 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) 138 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 139 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 140 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 141 AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted 142 AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only 143 // D0-D15, S0-S31 144 145 // Tag_WMMX_arch, (=11), uleb128 146 AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1 147 AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2 148 149 // Tag_Advanced_SIMD_arch, (=12), uleb128 150 AllowNeon = 1, // SIMDv1 was permitted 151 AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) 152 AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted 153 AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA) 154 155 // Tag_ABI_PCS_R9_use, (=14), uleb128 156 R9IsGPR = 0, // R9 used as v6 (just another callee-saved register) 157 R9IsSB = 1, // R9 used as a global static base rgister 158 R9IsTLSPointer = 2, // R9 used as a thread local storage pointer 159 R9Reserved = 3, // R9 not used by code associated with attributed entity 160 161 // Tag_ABI_PCS_RW_data, (=15), uleb128 162 AddressRWPCRel = 1, // Address RW static data PC-relative 163 AddressRWSBRel = 2, // Address RW static data SB-relative 164 AddressRWNone = 3, // No RW static data permitted 165 166 // Tag_ABI_PCS_RO_data, (=14), uleb128 167 AddressROPCRel = 1, // Address RO static data PC-relative 168 AddressRONone = 2, // No RO static data permitted 169 170 // Tag_ABI_PCS_GOT_use, (=17), uleb128 171 AddressDirect = 1, // Address imported data directly 172 AddressGOT = 2, // Address imported data indirectly (via GOT) 173 174 // Tag_ABI_PCS_wchar_t, (=18), uleb128 175 WCharProhibited = 0, // wchar_t is not used 176 WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2 177 WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4 178 179 // Tag_ABI_align_needed, (=24), uleb128 180 Align8Byte = 1, 181 Align4Byte = 2, 182 AlignReserved = 3, 183 184 // Tag_ABI_align_needed, (=25), uleb128 185 AlignNotPreserved = 0, 186 AlignPreserve8Byte = 1, 187 AlignPreserveAll = 2, 188 189 // Tag_ABI_FP_denormal, (=20), uleb128 190 PositiveZero = 0, 191 IEEEDenormals = 1, 192 PreserveFPSign = 2, // sign when flushed-to-zero is preserved 193 194 // Tag_ABI_FP_number_model, (=23), uleb128 195 AllowIEEENormal = 1, 196 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) 197 AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings 198 199 // Tag_ABI_enum_size, (=26), uleb128 200 EnumProhibited = 0, // The user prohibited the use of enums when building 201 // this entity. 202 EnumSmallest = 1, // Enum is smallest container big enough to hold all 203 // values. 204 Enum32Bit = 2, // Enum is at least 32 bits. 205 Enum32BitABI = 3, // Every enumeration visible across an ABI-complying 206 // interface contains a value needing 32 bits to encode 207 // it; other enums can be containerized. 208 209 // Tag_ABI_HardFP_use, (=27), uleb128 210 HardFPImplied = 0, // FP use should be implied by Tag_FP_arch 211 HardFPSinglePrecision = 1, // Single-precision only 212 213 // Tag_ABI_VFP_args, (=28), uleb128 214 BaseAAPCS = 0, 215 HardFPAAPCS = 1, 216 217 // Tag_FP_HP_extension, (=36), uleb128 218 AllowHPFP = 1, // Allow use of Half Precision FP 219 220 // Tag_FP_16bit_format, (=38), uleb128 221 FP16FormatIEEE = 1, 222 FP16VFP3 = 2, 223 224 // Tag_MPextension_use, (=42), uleb128 225 AllowMP = 1, // Allow use of MP extensions 226 227 // Tag_DIV_use, (=44), uleb128 228 // Note: AllowDIVExt must be emitted if and only if the permission to use 229 // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV 230 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no 231 // info exists. 232 DisallowDIV = 1, // Hardware divide explicitly disallowed. 233 AllowDIVExt = 2, // Allow hardware divide as optional architecture 234 // extension above the base arch specified by 235 // Tag_CPU_arch and Tag_CPU_arch_profile. 236 237 // Tag_Virtualization_use, (=68), uleb128 238 AllowTZ = 1, 239 AllowVirtualization = 2, 240 AllowTZVirtualization = 3 241 }; 242 243 } // namespace ARMBuildAttrs 244 } // namespace llvm 245 246 #endif 247
