1 //===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the constants for the ABI flags structure contained 11 // in the .MIPS.abiflags section. 12 // 13 // https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking 14 // 15 //===----------------------------------------------------------------------===// 16 17 #ifndef LLVM_SUPPORT_MIPSABIFLAGS_H 18 #define LLVM_SUPPORT_MIPSABIFLAGS_H 19 20 namespace llvm { 21 namespace Mips { 22 23 // Values for the xxx_size bytes of an ABI flags structure. 24 enum AFL_REG { 25 AFL_REG_NONE = 0x00, // No registers 26 AFL_REG_32 = 0x01, // 32-bit registers 27 AFL_REG_64 = 0x02, // 64-bit registers 28 AFL_REG_128 = 0x03 // 128-bit registers 29 }; 30 31 // Masks for the ases word of an ABI flags structure. 32 enum AFL_ASE { 33 AFL_ASE_DSP = 0x00000001, // DSP ASE 34 AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE 35 AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme 36 AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE 37 AFL_ASE_MDMX = 0x00000010, // MDMX ASE 38 AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE 39 AFL_ASE_MT = 0x00000040, // MT ASE 40 AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE 41 AFL_ASE_VIRT = 0x00000100, // VZ ASE 42 AFL_ASE_MSA = 0x00000200, // MSA ASE 43 AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE 44 AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE 45 AFL_ASE_XPA = 0x00001000 // XPA ASE 46 }; 47 48 // Values for the isa_ext word of an ABI flags structure. 49 enum AFL_EXT { 50 AFL_EXT_NONE = 0, // None 51 AFL_EXT_XLR = 1, // RMI Xlr instruction 52 AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2 53 AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP 54 AFL_EXT_LOONGSON_3A = 4, // Loongson 3A 55 AFL_EXT_OCTEON = 5, // Cavium Networks Octeon 56 AFL_EXT_5900 = 6, // MIPS R5900 instruction 57 AFL_EXT_4650 = 7, // MIPS R4650 instruction 58 AFL_EXT_4010 = 8, // LSI R4010 instruction 59 AFL_EXT_4100 = 9, // NEC VR4100 instruction 60 AFL_EXT_3900 = 10, // Toshiba R3900 instruction 61 AFL_EXT_10000 = 11, // MIPS R10000 instruction 62 AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction 63 AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction 64 AFL_EXT_4120 = 14, // NEC VR4120 instruction 65 AFL_EXT_5400 = 15, // NEC VR5400 instruction 66 AFL_EXT_5500 = 16, // NEC VR5500 instruction 67 AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E 68 AFL_EXT_LOONGSON_2F = 18, // ST Microelectronics Loongson 2F 69 AFL_EXT_OCTEON3 = 19 // Cavium Networks Octeon3 70 }; 71 72 // Values for the flags1 word of an ABI flags structure. 73 enum AFL_FLAGS1 { AFL_FLAGS1_ODDSPREG = 1 }; 74 75 // MIPS object attribute tags 76 enum { 77 Tag_GNU_MIPS_ABI_FP = 4, // Floating-point ABI used by this object file 78 Tag_GNU_MIPS_ABI_MSA = 8, // MSA ABI used by this object file 79 }; 80 81 // Values for the fp_abi word of an ABI flags structure 82 // and for the Tag_GNU_MIPS_ABI_FP attribute tag. 83 enum Val_GNU_MIPS_ABI_FP { 84 Val_GNU_MIPS_ABI_FP_ANY = 0, // not tagged 85 Val_GNU_MIPS_ABI_FP_DOUBLE = 1, // hard float / -mdouble-float 86 Val_GNU_MIPS_ABI_FP_SINGLE = 2, // hard float / -msingle-float 87 Val_GNU_MIPS_ABI_FP_SOFT = 3, // soft float 88 Val_GNU_MIPS_ABI_FP_OLD_64 = 4, // -mips32r2 -mfp64 89 Val_GNU_MIPS_ABI_FP_XX = 5, // -mfpxx 90 Val_GNU_MIPS_ABI_FP_64 = 6, // -mips32r2 -mfp64 91 Val_GNU_MIPS_ABI_FP_64A = 7 // -mips32r2 -mfp64 -mno-odd-spreg 92 }; 93 94 // Values for the Tag_GNU_MIPS_ABI_MSA attribute tag. 95 enum Val_GNU_MIPS_ABI_MSA { 96 Val_GNU_MIPS_ABI_MSA_ANY = 0, // not tagged 97 Val_GNU_MIPS_ABI_MSA_128 = 1 // 128-bit MSA 98 }; 99 } 100 } 101 102 #endif 103
