1 // Copyright 2017 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 // Package cpu implements processor feature detection 6 // used by the Go standard library. 7 package cpu 8 9 var X86 x86 10 11 // The booleans in x86 contain the correspondingly named cpuid feature bit. 12 // HasAVX and HasAVX2 are only set if the OS does support XMM and YMM registers 13 // in addition to the cpuid feature bit being set. 14 // The struct is padded to avoid false sharing. 15 type x86 struct { 16 _ [CacheLineSize]byte 17 HasAES bool 18 HasADX bool 19 HasAVX bool 20 HasAVX2 bool 21 HasBMI1 bool 22 HasBMI2 bool 23 HasERMS bool 24 HasFMA bool 25 HasOSXSAVE bool 26 HasPCLMULQDQ bool 27 HasPOPCNT bool 28 HasSSE2 bool 29 HasSSE3 bool 30 HasSSSE3 bool 31 HasSSE41 bool 32 HasSSE42 bool 33 _ [CacheLineSize]byte 34 } 35 36 var PPC64 ppc64 37 38 // For ppc64x, it is safe to check only for ISA level starting on ISA v3.00, 39 // since there are no optional categories. There are some exceptions that also 40 // require kernel support to work (darn, scv), so there are capability bits for 41 // those as well. The minimum processor requirement is POWER8 (ISA 2.07), so we 42 // maintain some of the old capability checks for optional categories for 43 // safety. 44 // The struct is padded to avoid false sharing. 45 type ppc64 struct { 46 _ [CacheLineSize]byte 47 HasVMX bool // Vector unit (Altivec) 48 HasDFP bool // Decimal Floating Point unit 49 HasVSX bool // Vector-scalar unit 50 HasHTM bool // Hardware Transactional Memory 51 HasISEL bool // Integer select 52 HasVCRYPTO bool // Vector cryptography 53 HasHTMNOSC bool // HTM: kernel-aborted transaction in syscalls 54 HasDARN bool // Hardware random number generator (requires kernel enablement) 55 HasSCV bool // Syscall vectored (requires kernel enablement) 56 IsPOWER8 bool // ISA v2.07 (POWER8) 57 IsPOWER9 bool // ISA v3.00 (POWER9) 58 _ [CacheLineSize]byte 59 } 60 61 var ARM64 arm64 62 63 // The booleans in arm64 contain the correspondingly named cpu feature bit. 64 // The struct is padded to avoid false sharing. 65 type arm64 struct { 66 _ [CacheLineSize]byte 67 HasFP bool 68 HasASIMD bool 69 HasEVTSTRM bool 70 HasAES bool 71 HasPMULL bool 72 HasSHA1 bool 73 HasSHA2 bool 74 HasCRC32 bool 75 HasATOMICS bool 76 _ [CacheLineSize]byte 77 } 78
