1 /* BFD back-end for Renesas H8/300 COFF binaries. 2 Copyright (C) 1990-2016 Free Software Foundation, Inc. 3 Written by Steve Chamberlain, <sac (at) cygnus.com>. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20 MA 02110-1301, USA. */ 21 22 #include "sysdep.h" 23 #include "bfd.h" 24 #include "libbfd.h" 25 #include "bfdlink.h" 26 #include "genlink.h" 27 #include "coff/h8300.h" 28 #include "coff/internal.h" 29 #include "libcoff.h" 30 #include "libiberty.h" 31 32 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) 33 34 /* We derive a hash table from the basic BFD hash table to 35 hold entries in the function vector. Aside from the 36 info stored by the basic hash table, we need the offset 37 of a particular entry within the hash table as well as 38 the offset where we'll add the next entry. */ 39 40 struct funcvec_hash_entry 41 { 42 /* The basic hash table entry. */ 43 struct bfd_hash_entry root; 44 45 /* The offset within the vectors section where 46 this entry lives. */ 47 bfd_vma offset; 48 }; 49 50 struct funcvec_hash_table 51 { 52 /* The basic hash table. */ 53 struct bfd_hash_table root; 54 55 bfd *abfd; 56 57 /* Offset at which we'll add the next entry. */ 58 unsigned int offset; 59 }; 60 61 62 /* To lookup a value in the function vector hash table. */ 63 #define funcvec_hash_lookup(table, string, create, copy) \ 64 ((struct funcvec_hash_entry *) \ 65 bfd_hash_lookup (&(table)->root, (string), (create), (copy))) 66 67 /* The derived h8300 COFF linker table. Note it's derived from 68 the generic linker hash table, not the COFF backend linker hash 69 table! We use this to attach additional data structures we 70 need while linking on the h8300. */ 71 struct h8300_coff_link_hash_table { 72 /* The main hash table. */ 73 struct generic_link_hash_table root; 74 75 /* Section for the vectors table. This gets attached to a 76 random input bfd, we keep it here for easy access. */ 77 asection *vectors_sec; 78 79 /* Hash table of the functions we need to enter into the function 80 vector. */ 81 struct funcvec_hash_table *funcvec_hash_table; 82 }; 83 84 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *); 85 86 /* Get the H8/300 COFF linker hash table from a link_info structure. */ 87 88 #define h8300_coff_hash_table(p) \ 89 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) 90 91 /* Initialize fields within a funcvec hash table entry. Called whenever 92 a new entry is added to the funcvec hash table. */ 93 94 static struct bfd_hash_entry * 95 funcvec_hash_newfunc (struct bfd_hash_entry *entry, 96 struct bfd_hash_table *gen_table, 97 const char *string) 98 { 99 struct funcvec_hash_entry *ret; 100 struct funcvec_hash_table *table; 101 102 ret = (struct funcvec_hash_entry *) entry; 103 table = (struct funcvec_hash_table *) gen_table; 104 105 /* Allocate the structure if it has not already been allocated by a 106 subclass. */ 107 if (ret == NULL) 108 ret = ((struct funcvec_hash_entry *) 109 bfd_hash_allocate (gen_table, 110 sizeof (struct funcvec_hash_entry))); 111 if (ret == NULL) 112 return NULL; 113 114 /* Call the allocation method of the superclass. */ 115 ret = ((struct funcvec_hash_entry *) 116 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); 117 118 if (ret == NULL) 119 return NULL; 120 121 /* Note where this entry will reside in the function vector table. */ 122 ret->offset = table->offset; 123 124 /* Bump the offset at which we store entries in the function 125 vector. We'd like to bump up the size of the vectors section, 126 but it's not easily available here. */ 127 switch (bfd_get_mach (table->abfd)) 128 { 129 case bfd_mach_h8300: 130 case bfd_mach_h8300hn: 131 case bfd_mach_h8300sn: 132 table->offset += 2; 133 break; 134 case bfd_mach_h8300h: 135 case bfd_mach_h8300s: 136 table->offset += 4; 137 break; 138 default: 139 return NULL; 140 } 141 142 /* Everything went OK. */ 143 return (struct bfd_hash_entry *) ret; 144 } 145 146 /* Initialize the function vector hash table. */ 147 148 static bfd_boolean 149 funcvec_hash_table_init (struct funcvec_hash_table *table, 150 bfd *abfd, 151 struct bfd_hash_entry *(*newfunc) 152 (struct bfd_hash_entry *, 153 struct bfd_hash_table *, 154 const char *), 155 unsigned int entsize) 156 { 157 /* Initialize our local fields, then call the generic initialization 158 routine. */ 159 table->offset = 0; 160 table->abfd = abfd; 161 return (bfd_hash_table_init (&table->root, newfunc, entsize)); 162 } 163 164 /* Create the derived linker hash table. We use a derived hash table 165 basically to hold "static" information during an H8/300 coff link 166 without using static variables. */ 167 168 static struct bfd_link_hash_table * 169 h8300_coff_link_hash_table_create (bfd *abfd) 170 { 171 struct h8300_coff_link_hash_table *ret; 172 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table); 173 174 ret = (struct h8300_coff_link_hash_table *) bfd_zmalloc (amt); 175 if (ret == NULL) 176 return NULL; 177 if (!_bfd_link_hash_table_init (&ret->root.root, abfd, 178 _bfd_generic_link_hash_newfunc, 179 sizeof (struct generic_link_hash_entry))) 180 { 181 free (ret); 182 return NULL; 183 } 184 185 return &ret->root.root; 186 } 187 188 /* Special handling for H8/300 relocs. 189 We only come here for pcrel stuff and return normally if not an -r link. 190 When doing -r, we can't do any arithmetic for the pcrel stuff, because 191 the code in reloc.c assumes that we can manipulate the targets of 192 the pcrel branches. This isn't so, since the H8/300 can do relaxing, 193 which means that the gap after the instruction may not be enough to 194 contain the offset required for the branch, so we have to use only 195 the addend until the final link. */ 196 197 static bfd_reloc_status_type 198 special (bfd * abfd ATTRIBUTE_UNUSED, 199 arelent * reloc_entry ATTRIBUTE_UNUSED, 200 asymbol * symbol ATTRIBUTE_UNUSED, 201 void * data ATTRIBUTE_UNUSED, 202 asection * input_section ATTRIBUTE_UNUSED, 203 bfd * output_bfd, 204 char ** error_message ATTRIBUTE_UNUSED) 205 { 206 if (output_bfd == (bfd *) NULL) 207 return bfd_reloc_continue; 208 209 /* Adjust the reloc address to that in the output section. */ 210 reloc_entry->address += input_section->output_offset; 211 return bfd_reloc_ok; 212 } 213 214 static reloc_howto_type howto_table[] = 215 { 216 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE), 217 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 218 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE), 219 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE), 220 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE), 221 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE), 222 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 223 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE), 224 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 225 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE), 226 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE), 227 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE), 228 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE), 229 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 230 231 /* An indirect reference to a function. This causes the function's address 232 to be added to the function vector in lo-mem and puts the address of 233 the function vector's entry in the jsr instruction. */ 234 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), 235 236 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative 237 branch is turned into an 8-bit pc-relative branch. */ 238 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), 239 240 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), 241 242 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE), 243 244 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE), 245 246 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE), 247 }; 248 249 /* Turn a howto into a reloc number. */ 250 251 #define SELECT_RELOC(x,howto) \ 252 { x.r_type = select_reloc (howto); } 253 254 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \ 255 && H8300HNBADMAG(x) && H8300SNBADMAG(x)) 256 #define H8300 1 /* Customize coffcode.h */ 257 #define __A_MAGIC_SET__ 258 259 /* Code to swap in the reloc. */ 260 #define SWAP_IN_RELOC_OFFSET H_GET_32 261 #define SWAP_OUT_RELOC_OFFSET H_PUT_32 262 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ 263 dst->r_stuff[0] = 'S'; \ 264 dst->r_stuff[1] = 'C'; 265 266 static int 267 select_reloc (reloc_howto_type *howto) 268 { 269 return howto->type; 270 } 271 272 /* Code to turn a r_type into a howto ptr, uses the above howto table. */ 273 274 static void 275 rtype2howto (arelent *internal, struct internal_reloc *dst) 276 { 277 switch (dst->r_type) 278 { 279 case R_RELBYTE: 280 internal->howto = howto_table + 0; 281 break; 282 case R_RELWORD: 283 internal->howto = howto_table + 1; 284 break; 285 case R_RELLONG: 286 internal->howto = howto_table + 2; 287 break; 288 case R_PCRBYTE: 289 internal->howto = howto_table + 3; 290 break; 291 case R_PCRWORD: 292 internal->howto = howto_table + 4; 293 break; 294 case R_PCRLONG: 295 internal->howto = howto_table + 5; 296 break; 297 case R_MOV16B1: 298 internal->howto = howto_table + 6; 299 break; 300 case R_MOV16B2: 301 internal->howto = howto_table + 7; 302 break; 303 case R_JMP1: 304 internal->howto = howto_table + 8; 305 break; 306 case R_JMP2: 307 internal->howto = howto_table + 9; 308 break; 309 case R_JMPL1: 310 internal->howto = howto_table + 10; 311 break; 312 case R_JMPL2: 313 internal->howto = howto_table + 11; 314 break; 315 case R_MOV24B1: 316 internal->howto = howto_table + 12; 317 break; 318 case R_MOV24B2: 319 internal->howto = howto_table + 13; 320 break; 321 case R_MEM_INDIRECT: 322 internal->howto = howto_table + 14; 323 break; 324 case R_PCRWORD_B: 325 internal->howto = howto_table + 15; 326 break; 327 case R_MOVL1: 328 internal->howto = howto_table + 16; 329 break; 330 case R_MOVL2: 331 internal->howto = howto_table + 17; 332 break; 333 case R_BCC_INV: 334 internal->howto = howto_table + 18; 335 break; 336 case R_JMP_DEL: 337 internal->howto = howto_table + 19; 338 break; 339 default: 340 internal->howto = NULL; 341 break; 342 } 343 } 344 345 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) 346 347 /* Perform any necessary magic to the addend in a reloc entry. */ 348 349 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ 350 cache_ptr->addend = ext_reloc.r_offset; 351 352 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ 353 reloc_processing (relent, reloc, symbols, abfd, section) 354 355 static void 356 reloc_processing (arelent *relent, struct internal_reloc *reloc, 357 asymbol **symbols, bfd *abfd, asection *section) 358 { 359 relent->address = reloc->r_vaddr; 360 rtype2howto (relent, reloc); 361 362 if (((int) reloc->r_symndx) > 0) 363 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; 364 else 365 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; 366 367 relent->addend = reloc->r_offset; 368 relent->address -= section->vma; 369 } 370 371 static bfd_boolean 372 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address) 373 { 374 asymbol **s; 375 376 s = _bfd_generic_link_get_symbols (abfd); 377 BFD_ASSERT (s != (asymbol **) NULL); 378 379 /* Search all the symbols for one in INPUT_SECTION with 380 address ADDRESS. */ 381 while (*s) 382 { 383 asymbol *p = *s; 384 385 if (p->section == input_section 386 && (input_section->output_section->vma 387 + input_section->output_offset 388 + p->value) == address) 389 return TRUE; 390 s++; 391 } 392 return FALSE; 393 } 394 395 /* If RELOC represents a relaxable instruction/reloc, change it into 396 the relaxed reloc, notify the linker that symbol addresses 397 have changed (bfd_perform_slip) and return how much the current 398 section has shrunk by. 399 400 FIXME: Much of this code has knowledge of the ordering of entries 401 in the howto table. This needs to be fixed. */ 402 403 static int 404 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc, 405 unsigned int shrink, struct bfd_link_info *link_info) 406 { 407 bfd_vma value; 408 bfd_vma dot; 409 bfd_vma gap; 410 static asection *last_input_section = NULL; 411 static arelent *last_reloc = NULL; 412 413 /* The address of the thing to be relocated will have moved back by 414 the size of the shrink - but we don't change reloc->address here, 415 since we need it to know where the relocation lives in the source 416 uncooked section. */ 417 bfd_vma address = reloc->address - shrink; 418 419 if (input_section != last_input_section) 420 last_reloc = NULL; 421 422 /* Only examine the relocs which might be relaxable. */ 423 switch (reloc->howto->type) 424 { 425 /* This is the 16-/24-bit absolute branch which could become an 426 8-bit pc-relative branch. */ 427 case R_JMP1: 428 case R_JMPL1: 429 /* Get the address of the target of this branch. */ 430 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 431 432 /* Get the address of the next instruction (not the reloc). */ 433 dot = (input_section->output_section->vma 434 + input_section->output_offset + address); 435 436 /* Adjust for R_JMP1 vs R_JMPL1. */ 437 dot += (reloc->howto->type == R_JMP1 ? 1 : 2); 438 439 /* Compute the distance from this insn to the branch target. */ 440 gap = value - dot; 441 442 /* If the distance is within -128..+128 inclusive, then we can relax 443 this jump. +128 is valid since the target will move two bytes 444 closer if we do relax this branch. */ 445 if ((int) gap >= -128 && (int) gap <= 128) 446 { 447 bfd_byte code; 448 449 if (!bfd_get_section_contents (abfd, input_section, & code, 450 reloc->address, 1)) 451 break; 452 code = bfd_get_8 (abfd, & code); 453 454 /* It's possible we may be able to eliminate this branch entirely; 455 if the previous instruction is a branch around this instruction, 456 and there's no label at this instruction, then we can reverse 457 the condition on the previous branch and eliminate this jump. 458 459 original: new: 460 bCC lab1 bCC' lab2 461 jmp lab2 462 lab1: lab1: 463 464 This saves 4 bytes instead of two, and should be relatively 465 common. 466 467 Only perform this optimisation for jumps (code 0x5a) not 468 subroutine calls, as otherwise it could transform: 469 470 mov.w r0,r0 471 beq .L1 472 jsr @_bar 473 .L1: rts 474 _bar: rts 475 into: 476 mov.w r0,r0 477 bne _bar 478 rts 479 _bar: rts 480 481 which changes the call (jsr) into a branch (bne). */ 482 if (code == 0x5a 483 && gap <= 126 484 && last_reloc 485 && last_reloc->howto->type == R_PCRBYTE) 486 { 487 bfd_vma last_value; 488 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info, 489 input_section) + 1; 490 491 if (last_value == dot + 2 492 && last_reloc->address + 1 == reloc->address 493 && !h8300_symbol_address_p (abfd, input_section, dot - 2)) 494 { 495 reloc->howto = howto_table + 19; 496 last_reloc->howto = howto_table + 18; 497 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr; 498 last_reloc->addend = reloc->addend; 499 shrink += 4; 500 bfd_perform_slip (abfd, 4, input_section, address); 501 break; 502 } 503 } 504 505 /* Change the reloc type. */ 506 reloc->howto = reloc->howto + 1; 507 508 /* This shrinks this section by two bytes. */ 509 shrink += 2; 510 bfd_perform_slip (abfd, 2, input_section, address); 511 } 512 break; 513 514 /* This is the 16-bit pc-relative branch which could become an 8-bit 515 pc-relative branch. */ 516 case R_PCRWORD: 517 /* Get the address of the target of this branch, add one to the value 518 because the addend field in PCrel jumps is off by -1. */ 519 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1; 520 521 /* Get the address of the next instruction if we were to relax. */ 522 dot = input_section->output_section->vma + 523 input_section->output_offset + address; 524 525 /* Compute the distance from this insn to the branch target. */ 526 gap = value - dot; 527 528 /* If the distance is within -128..+128 inclusive, then we can relax 529 this jump. +128 is valid since the target will move two bytes 530 closer if we do relax this branch. */ 531 if ((int) gap >= -128 && (int) gap <= 128) 532 { 533 /* Change the reloc type. */ 534 reloc->howto = howto_table + 15; 535 536 /* This shrinks this section by two bytes. */ 537 shrink += 2; 538 bfd_perform_slip (abfd, 2, input_section, address); 539 } 540 break; 541 542 /* This is a 16-bit absolute address in a mov.b insn, which can 543 become an 8-bit absolute address if it's in the right range. */ 544 case R_MOV16B1: 545 /* Get the address of the data referenced by this mov.b insn. */ 546 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 547 value = bfd_h8300_pad_address (abfd, value); 548 549 /* If the address is in the top 256 bytes of the address space 550 then we can relax this instruction. */ 551 if (value >= 0xffffff00u) 552 { 553 /* Change the reloc type. */ 554 reloc->howto = reloc->howto + 1; 555 556 /* This shrinks this section by two bytes. */ 557 shrink += 2; 558 bfd_perform_slip (abfd, 2, input_section, address); 559 } 560 break; 561 562 /* Similarly for a 24-bit absolute address in a mov.b. Note that 563 if we can't relax this into an 8-bit absolute, we'll fall through 564 and try to relax it into a 16-bit absolute. */ 565 case R_MOV24B1: 566 /* Get the address of the data referenced by this mov.b insn. */ 567 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 568 value = bfd_h8300_pad_address (abfd, value); 569 570 if (value >= 0xffffff00u) 571 { 572 /* Change the reloc type. */ 573 reloc->howto = reloc->howto + 1; 574 575 /* This shrinks this section by four bytes. */ 576 shrink += 4; 577 bfd_perform_slip (abfd, 4, input_section, address); 578 579 /* Done with this reloc. */ 580 break; 581 } 582 583 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit 584 reloc. */ 585 586 /* This is a 24-/32-bit absolute address in a mov insn, which can 587 become an 16-bit absolute address if it's in the right range. */ 588 case R_MOVL1: 589 /* Get the address of the data referenced by this mov insn. */ 590 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 591 value = bfd_h8300_pad_address (abfd, value); 592 593 /* If the address is a sign-extended 16-bit value then we can 594 relax this instruction. */ 595 if (value <= 0x7fff || value >= 0xffff8000u) 596 { 597 /* Change the reloc type. */ 598 reloc->howto = howto_table + 17; 599 600 /* This shrinks this section by two bytes. */ 601 shrink += 2; 602 bfd_perform_slip (abfd, 2, input_section, address); 603 } 604 break; 605 606 /* No other reloc types represent relaxing opportunities. */ 607 default: 608 break; 609 } 610 611 last_reloc = reloc; 612 last_input_section = input_section; 613 return shrink; 614 } 615 616 /* Handle relocations for the H8/300, including relocs for relaxed 617 instructions. 618 619 FIXME: Not all relocations check for overflow! */ 620 621 static void 622 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, 623 struct bfd_link_order *link_order, arelent *reloc, 624 bfd_byte *data, unsigned int *src_ptr, 625 unsigned int *dst_ptr) 626 { 627 unsigned int src_address = *src_ptr; 628 unsigned int dst_address = *dst_ptr; 629 asection *input_section = link_order->u.indirect.section; 630 bfd_vma value; 631 bfd_vma dot; 632 int gap, tmp; 633 unsigned char temp_code; 634 635 switch (reloc->howto->type) 636 { 637 /* Generic 8-bit pc-relative relocation. */ 638 case R_PCRBYTE: 639 /* Get the address of the target of this branch. */ 640 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 641 642 dot = (input_section->output_offset 643 + dst_address 644 + link_order->u.indirect.section->output_section->vma); 645 646 gap = value - dot; 647 648 /* Sanity check. */ 649 if (gap < -128 || gap > 126) 650 (*link_info->callbacks->reloc_overflow) 651 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 652 reloc->howto->name, reloc->addend, input_section->owner, 653 input_section, reloc->address); 654 655 /* Everything looks OK. Apply the relocation and update the 656 src/dst address appropriately. */ 657 bfd_put_8 (abfd, gap, data + dst_address); 658 dst_address++; 659 src_address++; 660 661 /* All done. */ 662 break; 663 664 /* Generic 16-bit pc-relative relocation. */ 665 case R_PCRWORD: 666 /* Get the address of the target of this branch. */ 667 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 668 669 /* Get the address of the instruction (not the reloc). */ 670 dot = (input_section->output_offset 671 + dst_address 672 + link_order->u.indirect.section->output_section->vma + 1); 673 674 gap = value - dot; 675 676 /* Sanity check. */ 677 if (gap > 32766 || gap < -32768) 678 (*link_info->callbacks->reloc_overflow) 679 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 680 reloc->howto->name, reloc->addend, input_section->owner, 681 input_section, reloc->address); 682 683 /* Everything looks OK. Apply the relocation and update the 684 src/dst address appropriately. */ 685 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address); 686 dst_address += 2; 687 src_address += 2; 688 689 /* All done. */ 690 break; 691 692 /* Generic 8-bit absolute relocation. */ 693 case R_RELBYTE: 694 /* Get the address of the object referenced by this insn. */ 695 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 696 697 bfd_put_8 (abfd, value & 0xff, data + dst_address); 698 dst_address += 1; 699 src_address += 1; 700 701 /* All done. */ 702 break; 703 704 /* Various simple 16-bit absolute relocations. */ 705 case R_MOV16B1: 706 case R_JMP1: 707 case R_RELWORD: 708 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 709 bfd_put_16 (abfd, value, data + dst_address); 710 dst_address += 2; 711 src_address += 2; 712 break; 713 714 /* Various simple 24-/32-bit absolute relocations. */ 715 case R_MOV24B1: 716 case R_MOVL1: 717 case R_RELLONG: 718 /* Get the address of the target of this branch. */ 719 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 720 bfd_put_32 (abfd, value, data + dst_address); 721 dst_address += 4; 722 src_address += 4; 723 break; 724 725 /* Another 24-/32-bit absolute relocation. */ 726 case R_JMPL1: 727 /* Get the address of the target of this branch. */ 728 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 729 730 value = ((value & 0x00ffffff) 731 | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); 732 bfd_put_32 (abfd, value, data + dst_address); 733 dst_address += 4; 734 src_address += 4; 735 break; 736 737 /* This is a 24-/32-bit absolute address in one of the following 738 instructions: 739 740 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 741 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", 742 "stc.w" and "mov.[bwl]" 743 744 We may relax this into an 16-bit absolute address if it's in 745 the right range. */ 746 case R_MOVL2: 747 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 748 value = bfd_h8300_pad_address (abfd, value); 749 750 /* Sanity check. */ 751 if (value <= 0x7fff || value >= 0xffff8000u) 752 { 753 /* Insert the 16-bit value into the proper location. */ 754 bfd_put_16 (abfd, value, data + dst_address); 755 756 /* Fix the opcode. For all the instructions that belong to 757 this relaxation, we simply need to turn off bit 0x20 in 758 the previous byte. */ 759 data[dst_address - 1] &= ~0x20; 760 dst_address += 2; 761 src_address += 4; 762 } 763 else 764 (*link_info->callbacks->reloc_overflow) 765 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 766 reloc->howto->name, reloc->addend, input_section->owner, 767 input_section, reloc->address); 768 break; 769 770 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ 771 case R_JMP2: 772 /* Get the address of the target of this branch. */ 773 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 774 775 /* Get the address of the next instruction. */ 776 dot = (input_section->output_offset 777 + dst_address 778 + link_order->u.indirect.section->output_section->vma + 1); 779 780 gap = value - dot; 781 782 /* Sanity check. */ 783 if (gap < -128 || gap > 126) 784 (*link_info->callbacks->reloc_overflow) 785 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 786 reloc->howto->name, reloc->addend, input_section->owner, 787 input_section, reloc->address); 788 789 /* Now fix the instruction itself. */ 790 switch (data[dst_address - 1]) 791 { 792 case 0x5e: 793 /* jsr -> bsr */ 794 bfd_put_8 (abfd, 0x55, data + dst_address - 1); 795 break; 796 case 0x5a: 797 /* jmp -> bra */ 798 bfd_put_8 (abfd, 0x40, data + dst_address - 1); 799 break; 800 801 default: 802 abort (); 803 } 804 805 /* Write out the 8-bit value. */ 806 bfd_put_8 (abfd, gap, data + dst_address); 807 808 dst_address += 1; 809 src_address += 3; 810 811 break; 812 813 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ 814 case R_PCRWORD_B: 815 /* Get the address of the target of this branch. */ 816 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 817 818 /* Get the address of the instruction (not the reloc). */ 819 dot = (input_section->output_offset 820 + dst_address 821 + link_order->u.indirect.section->output_section->vma - 1); 822 823 gap = value - dot; 824 825 /* Sanity check. */ 826 if (gap < -128 || gap > 126) 827 (*link_info->callbacks->reloc_overflow) 828 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 829 reloc->howto->name, reloc->addend, input_section->owner, 830 input_section, reloc->address); 831 832 /* Now fix the instruction. */ 833 switch (data[dst_address - 2]) 834 { 835 case 0x58: 836 /* bCC:16 -> bCC:8 */ 837 /* Get the second byte of the original insn, which contains 838 the condition code. */ 839 tmp = data[dst_address - 1]; 840 841 /* Compute the fisrt byte of the relaxed instruction. The 842 original sequence 0x58 0xX0 is relaxed to 0x4X, where X 843 represents the condition code. */ 844 tmp &= 0xf0; 845 tmp >>= 4; 846 tmp |= 0x40; 847 848 /* Write it. */ 849 bfd_put_8 (abfd, tmp, data + dst_address - 2); 850 break; 851 852 case 0x5c: 853 /* bsr:16 -> bsr:8 */ 854 bfd_put_8 (abfd, 0x55, data + dst_address - 2); 855 break; 856 857 default: 858 abort (); 859 } 860 861 /* Output the target. */ 862 bfd_put_8 (abfd, gap, data + dst_address - 1); 863 864 /* We don't advance dst_address -- the 8-bit reloc is applied at 865 dst_address - 1, so the next insn should begin at dst_address. */ 866 src_address += 2; 867 868 break; 869 870 /* Similarly for a 24-bit absolute that is now 8 bits. */ 871 case R_JMPL2: 872 /* Get the address of the target of this branch. */ 873 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 874 875 /* Get the address of the instruction (not the reloc). */ 876 dot = (input_section->output_offset 877 + dst_address 878 + link_order->u.indirect.section->output_section->vma + 2); 879 880 gap = value - dot; 881 882 /* Fix the instruction. */ 883 switch (data[src_address]) 884 { 885 case 0x5e: 886 /* jsr -> bsr */ 887 bfd_put_8 (abfd, 0x55, data + dst_address); 888 break; 889 case 0x5a: 890 /* jmp ->bra */ 891 bfd_put_8 (abfd, 0x40, data + dst_address); 892 break; 893 default: 894 abort (); 895 } 896 897 bfd_put_8 (abfd, gap, data + dst_address + 1); 898 dst_address += 2; 899 src_address += 4; 900 901 break; 902 903 /* This is a 16-bit absolute address in one of the following 904 instructions: 905 906 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 907 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and 908 "mov.b" 909 910 We may relax this into an 8-bit absolute address if it's in 911 the right range. */ 912 case R_MOV16B2: 913 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 914 915 /* All instructions with R_H8_DIR16B2 start with 0x6a. */ 916 if (data[dst_address - 2] != 0x6a) 917 abort (); 918 919 temp_code = data[src_address - 1]; 920 921 /* If this is a mov.b instruction, clear the lower nibble, which 922 contains the source/destination register number. */ 923 if ((temp_code & 0x10) != 0x10) 924 temp_code &= 0xf0; 925 926 /* Fix up the opcode. */ 927 switch (temp_code) 928 { 929 case 0x00: 930 /* This is mov.b @aa:16,Rd. */ 931 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; 932 break; 933 case 0x80: 934 /* This is mov.b Rs,@aa:16. */ 935 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; 936 break; 937 case 0x18: 938 /* This is a bit-maniputation instruction that stores one 939 bit into memory, one of "bclr", "bist", "bnot", "bset", 940 and "bst". */ 941 data[dst_address - 2] = 0x7f; 942 break; 943 case 0x10: 944 /* This is a bit-maniputation instruction that loads one bit 945 from memory, one of "band", "biand", "bild", "bior", 946 "bixor", "bld", "bor", "btst", and "bxor". */ 947 data[dst_address - 2] = 0x7e; 948 break; 949 default: 950 abort (); 951 } 952 953 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); 954 src_address += 2; 955 break; 956 957 /* This is a 24-bit absolute address in one of the following 958 instructions: 959 960 "band", "bclr", "biand", "bild", "bior", "bist", "bixor", 961 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and 962 "mov.b" 963 964 We may relax this into an 8-bit absolute address if it's in 965 the right range. */ 966 case R_MOV24B2: 967 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 968 969 /* All instructions with R_MOV24B2 start with 0x6a. */ 970 if (data[dst_address - 2] != 0x6a) 971 abort (); 972 973 temp_code = data[src_address - 1]; 974 975 /* If this is a mov.b instruction, clear the lower nibble, which 976 contains the source/destination register number. */ 977 if ((temp_code & 0x30) != 0x30) 978 temp_code &= 0xf0; 979 980 /* Fix up the opcode. */ 981 switch (temp_code) 982 { 983 case 0x20: 984 /* This is mov.b @aa:24/32,Rd. */ 985 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; 986 break; 987 case 0xa0: 988 /* This is mov.b Rs,@aa:24/32. */ 989 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; 990 break; 991 case 0x38: 992 /* This is a bit-maniputation instruction that stores one 993 bit into memory, one of "bclr", "bist", "bnot", "bset", 994 and "bst". */ 995 data[dst_address - 2] = 0x7f; 996 break; 997 case 0x30: 998 /* This is a bit-maniputation instruction that loads one bit 999 from memory, one of "band", "biand", "bild", "bior", 1000 "bixor", "bld", "bor", "btst", and "bxor". */ 1001 data[dst_address - 2] = 0x7e; 1002 break; 1003 default: 1004 abort (); 1005 } 1006 1007 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); 1008 src_address += 4; 1009 break; 1010 1011 case R_BCC_INV: 1012 /* Get the address of the target of this branch. */ 1013 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 1014 1015 dot = (input_section->output_offset 1016 + dst_address 1017 + link_order->u.indirect.section->output_section->vma) + 1; 1018 1019 gap = value - dot; 1020 1021 /* Sanity check. */ 1022 if (gap < -128 || gap > 126) 1023 (*link_info->callbacks->reloc_overflow) 1024 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 1025 reloc->howto->name, reloc->addend, input_section->owner, 1026 input_section, reloc->address); 1027 1028 /* Everything looks OK. Fix the condition in the instruction, apply 1029 the relocation, and update the src/dst address appropriately. */ 1030 1031 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1, 1032 data + dst_address - 1); 1033 bfd_put_8 (abfd, gap, data + dst_address); 1034 dst_address++; 1035 src_address++; 1036 1037 /* All done. */ 1038 break; 1039 1040 case R_JMP_DEL: 1041 src_address += 4; 1042 break; 1043 1044 /* An 8-bit memory indirect instruction (jmp/jsr). 1045 1046 There's several things that need to be done to handle 1047 this relocation. 1048 1049 If this is a reloc against the absolute symbol, then 1050 we should handle it just R_RELBYTE. Likewise if it's 1051 for a symbol with a value ge 0 and le 0xff. 1052 1053 Otherwise it's a jump/call through the function vector, 1054 and the linker is expected to set up the function vector 1055 and put the right value into the jump/call instruction. */ 1056 case R_MEM_INDIRECT: 1057 { 1058 /* We need to find the symbol so we can determine it's 1059 address in the function vector table. */ 1060 asymbol *symbol; 1061 const char *name; 1062 struct funcvec_hash_table *ftab; 1063 struct funcvec_hash_entry *h; 1064 struct h8300_coff_link_hash_table *htab; 1065 asection *vectors_sec; 1066 1067 if (link_info->output_bfd->xvec != abfd->xvec) 1068 { 1069 (*_bfd_error_handler) 1070 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"), 1071 link_info->output_bfd->xvec->name); 1072 1073 /* What else can we do? This function doesn't allow return 1074 of an error, and we don't want to call abort as that 1075 indicates an internal error. */ 1076 #ifndef EXIT_FAILURE 1077 #define EXIT_FAILURE 1 1078 #endif 1079 xexit (EXIT_FAILURE); 1080 } 1081 htab = h8300_coff_hash_table (link_info); 1082 vectors_sec = htab->vectors_sec; 1083 1084 /* First see if this is a reloc against the absolute symbol 1085 or against a symbol with a nonnegative value <= 0xff. */ 1086 symbol = *(reloc->sym_ptr_ptr); 1087 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); 1088 if (symbol == bfd_abs_section_ptr->symbol 1089 || value <= 0xff) 1090 { 1091 /* This should be handled in a manner very similar to 1092 R_RELBYTES. If the value is in range, then just slam 1093 the value into the right location. Else trigger a 1094 reloc overflow callback. */ 1095 if (value <= 0xff) 1096 { 1097 bfd_put_8 (abfd, value, data + dst_address); 1098 dst_address += 1; 1099 src_address += 1; 1100 } 1101 else 1102 (*link_info->callbacks->reloc_overflow) 1103 (link_info, NULL, bfd_asymbol_name (*reloc->sym_ptr_ptr), 1104 reloc->howto->name, reloc->addend, input_section->owner, 1105 input_section, reloc->address); 1106 break; 1107 } 1108 1109 /* This is a jump/call through a function vector, and we're 1110 expected to create the function vector ourselves. 1111 1112 First look up this symbol in the linker hash table -- we need 1113 the derived linker symbol which holds this symbol's index 1114 in the function vector. */ 1115 name = symbol->name; 1116 if (symbol->flags & BSF_LOCAL) 1117 { 1118 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); 1119 1120 if (new_name == NULL) 1121 abort (); 1122 1123 sprintf (new_name, "%s_%08x", name, symbol->section->id); 1124 name = new_name; 1125 } 1126 1127 ftab = htab->funcvec_hash_table; 1128 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); 1129 1130 /* This shouldn't ever happen. If it does that means we've got 1131 data corruption of some kind. Aborting seems like a reasonable 1132 thing to do here. */ 1133 if (h == NULL || vectors_sec == NULL) 1134 abort (); 1135 1136 /* Place the address of the function vector entry into the 1137 reloc's address. */ 1138 bfd_put_8 (abfd, 1139 vectors_sec->output_offset + h->offset, 1140 data + dst_address); 1141 1142 dst_address++; 1143 src_address++; 1144 1145 /* Now create an entry in the function vector itself. */ 1146 switch (bfd_get_mach (input_section->owner)) 1147 { 1148 case bfd_mach_h8300: 1149 case bfd_mach_h8300hn: 1150 case bfd_mach_h8300sn: 1151 bfd_put_16 (abfd, 1152 bfd_coff_reloc16_get_value (reloc, 1153 link_info, 1154 input_section), 1155 vectors_sec->contents + h->offset); 1156 break; 1157 case bfd_mach_h8300h: 1158 case bfd_mach_h8300s: 1159 bfd_put_32 (abfd, 1160 bfd_coff_reloc16_get_value (reloc, 1161 link_info, 1162 input_section), 1163 vectors_sec->contents + h->offset); 1164 break; 1165 default: 1166 abort (); 1167 } 1168 1169 /* Gross. We've already written the contents of the vector section 1170 before we get here... So we write it again with the new data. */ 1171 bfd_set_section_contents (vectors_sec->output_section->owner, 1172 vectors_sec->output_section, 1173 vectors_sec->contents, 1174 (file_ptr) vectors_sec->output_offset, 1175 vectors_sec->size); 1176 break; 1177 } 1178 1179 default: 1180 abort (); 1181 break; 1182 1183 } 1184 1185 *src_ptr = src_address; 1186 *dst_ptr = dst_address; 1187 } 1188 1189 /* Routine for the h8300 linker. 1190 1191 This routine is necessary to handle the special R_MEM_INDIRECT 1192 relocs on the h8300. It's responsible for generating a vectors 1193 section and attaching it to an input bfd as well as sizing 1194 the vectors section. It also creates our vectors hash table. 1195 1196 It uses the generic linker routines to actually add the symbols. 1197 from this BFD to the bfd linker hash table. It may add a few 1198 selected static symbols to the bfd linker hash table. */ 1199 1200 static bfd_boolean 1201 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) 1202 { 1203 asection *sec; 1204 struct funcvec_hash_table *funcvec_hash_table; 1205 bfd_size_type amt; 1206 struct h8300_coff_link_hash_table *htab; 1207 1208 /* Add the symbols using the generic code. */ 1209 _bfd_generic_link_add_symbols (abfd, info); 1210 1211 if (info->output_bfd->xvec != abfd->xvec) 1212 return TRUE; 1213 1214 htab = h8300_coff_hash_table (info); 1215 1216 /* If we haven't created a vectors section, do so now. */ 1217 if (!htab->vectors_sec) 1218 { 1219 flagword flags; 1220 1221 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ 1222 flags = (SEC_ALLOC | SEC_LOAD 1223 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); 1224 htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors", 1225 flags); 1226 1227 /* If the section wasn't created, or we couldn't set the flags, 1228 quit quickly now, rather than dying a painful death later. */ 1229 if (!htab->vectors_sec) 1230 return FALSE; 1231 1232 /* Also create the vector hash table. */ 1233 amt = sizeof (struct funcvec_hash_table); 1234 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt); 1235 1236 if (!funcvec_hash_table) 1237 return FALSE; 1238 1239 /* And initialize the funcvec hash table. */ 1240 if (!funcvec_hash_table_init (funcvec_hash_table, abfd, 1241 funcvec_hash_newfunc, 1242 sizeof (struct funcvec_hash_entry))) 1243 { 1244 bfd_release (abfd, funcvec_hash_table); 1245 return FALSE; 1246 } 1247 1248 /* Store away a pointer to the funcvec hash table. */ 1249 htab->funcvec_hash_table = funcvec_hash_table; 1250 } 1251 1252 /* Load up the function vector hash table. */ 1253 funcvec_hash_table = htab->funcvec_hash_table; 1254 1255 /* Now scan the relocs for all the sections in this bfd; create 1256 additional space in the .vectors section as needed. */ 1257 for (sec = abfd->sections; sec; sec = sec->next) 1258 { 1259 long reloc_size, reloc_count, i; 1260 asymbol **symbols; 1261 arelent **relocs; 1262 1263 /* Suck in the relocs, symbols & canonicalize them. */ 1264 reloc_size = bfd_get_reloc_upper_bound (abfd, sec); 1265 if (reloc_size <= 0) 1266 continue; 1267 1268 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size); 1269 if (!relocs) 1270 return FALSE; 1271 1272 /* The symbols should have been read in by _bfd_generic link_add_symbols 1273 call abovec, so we can cheat and use the pointer to them that was 1274 saved in the above call. */ 1275 symbols = _bfd_generic_link_get_symbols(abfd); 1276 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); 1277 if (reloc_count <= 0) 1278 { 1279 free (relocs); 1280 continue; 1281 } 1282 1283 /* Now walk through all the relocations in this section. */ 1284 for (i = 0; i < reloc_count; i++) 1285 { 1286 arelent *reloc = relocs[i]; 1287 asymbol *symbol = *(reloc->sym_ptr_ptr); 1288 const char *name; 1289 1290 /* We've got an indirect reloc. See if we need to add it 1291 to the function vector table. At this point, we have 1292 to add a new entry for each unique symbol referenced 1293 by an R_MEM_INDIRECT relocation except for a reloc 1294 against the absolute section symbol. */ 1295 if (reloc->howto->type == R_MEM_INDIRECT 1296 && symbol != bfd_abs_section_ptr->symbol) 1297 1298 { 1299 struct funcvec_hash_table *ftab; 1300 struct funcvec_hash_entry *h; 1301 1302 name = symbol->name; 1303 if (symbol->flags & BSF_LOCAL) 1304 { 1305 char *new_name; 1306 1307 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); 1308 if (new_name == NULL) 1309 abort (); 1310 1311 sprintf (new_name, "%s_%08x", name, symbol->section->id); 1312 name = new_name; 1313 } 1314 1315 /* Look this symbol up in the function vector hash table. */ 1316 ftab = htab->funcvec_hash_table; 1317 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); 1318 1319 /* If this symbol isn't already in the hash table, add 1320 it and bump up the size of the hash table. */ 1321 if (h == NULL) 1322 { 1323 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE); 1324 if (h == NULL) 1325 { 1326 free (relocs); 1327 return FALSE; 1328 } 1329 1330 /* Bump the size of the vectors section. Each vector 1331 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ 1332 switch (bfd_get_mach (abfd)) 1333 { 1334 case bfd_mach_h8300: 1335 case bfd_mach_h8300hn: 1336 case bfd_mach_h8300sn: 1337 htab->vectors_sec->size += 2; 1338 break; 1339 case bfd_mach_h8300h: 1340 case bfd_mach_h8300s: 1341 htab->vectors_sec->size += 4; 1342 break; 1343 default: 1344 abort (); 1345 } 1346 } 1347 } 1348 } 1349 1350 /* We're done with the relocations, release them. */ 1351 free (relocs); 1352 } 1353 1354 /* Now actually allocate some space for the function vector. It's 1355 wasteful to do this more than once, but this is easier. */ 1356 sec = htab->vectors_sec; 1357 if (sec->size != 0) 1358 { 1359 /* Free the old contents. */ 1360 if (sec->contents) 1361 free (sec->contents); 1362 1363 /* Allocate new contents. */ 1364 sec->contents = bfd_malloc (sec->size); 1365 } 1366 1367 return TRUE; 1368 } 1369 1370 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases 1371 #define coff_reloc16_estimate h8300_reloc16_estimate 1372 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols 1373 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create 1374 1375 #define COFF_LONG_FILENAMES 1376 1377 #ifndef bfd_pe_print_pdata 1378 #define bfd_pe_print_pdata NULL 1379 #endif 1380 1381 #include "coffcode.h" 1382 1383 #undef coff_bfd_get_relocated_section_contents 1384 #undef coff_bfd_relax_section 1385 #define coff_bfd_get_relocated_section_contents \ 1386 bfd_coff_reloc16_get_relocated_section_contents 1387 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section 1388 1389 CREATE_BIG_COFF_TARGET_VEC (h8300_coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) 1390
