1 @c Copyright (C) 2011-2016 Free Software Foundation, Inc. 2 @c This is part of the GAS manual. 3 @c For copying conditions, see the file as.texinfo. 4 @ifset GENERIC 5 @page 6 @node TILEPro-Dependent 7 @chapter TILEPro Dependent Features 8 @end ifset 9 @ifclear GENERIC 10 @node Machine Dependencies 11 @chapter TILEPro Dependent Features 12 @end ifclear 13 14 @cindex TILEPro support 15 @menu 16 * TILEPro Options:: TILEPro Options 17 * TILEPro Syntax:: TILEPro Syntax 18 * TILEPro Directives:: TILEPro Directives 19 @end menu 20 21 @node TILEPro Options 22 @section Options 23 24 @code{@value{AS}} has no machine-dependent command-line options for 25 TILEPro. 26 27 @node TILEPro Syntax 28 @section Syntax 29 @cindex TILEPro syntax 30 @cindex syntax, TILEPro 31 32 Block comments are delimited by @samp{/*} and @samp{*/}. End of line 33 comments may be introduced by @samp{#}. 34 35 Instructions consist of a leading opcode or macro name followed by 36 whitespace and an optional comma-separated list of operands: 37 38 @smallexample 39 @var{opcode} [@var{operand}, @dots{}] 40 @end smallexample 41 42 Instructions must be separated by a newline or semicolon. 43 44 There are two ways to write code: either write naked instructions, 45 which the assembler is free to combine into VLIW bundles, or specify 46 the VLIW bundles explicitly. 47 48 Bundles are specified using curly braces: 49 50 @smallexample 51 @{ @var{add} r3,r4,r5 ; @var{add} r7,r8,r9 ; @var{lw} r10,r11 @} 52 @end smallexample 53 54 A bundle can span multiple lines. If you want to put multiple 55 instructions on a line, whether in a bundle or not, you need to 56 separate them with semicolons as in this example. 57 58 A bundle may contain one or more instructions, up to the limit 59 specified by the ISA (currently three). If fewer instructions are 60 specified than the hardware supports in a bundle, the assembler 61 inserts @code{fnop} instructions automatically. 62 63 The assembler will prefer to preserve the ordering of instructions 64 within the bundle, putting the first instruction in a lower-numbered 65 pipeline than the next one, etc. This fact, combined with the 66 optional use of explicit @code{fnop} or @code{nop} instructions, 67 allows precise control over which pipeline executes each instruction. 68 69 If the instructions cannot be bundled in the listed order, the 70 assembler will automatically try to find a valid pipeline 71 assignment. If there is no way to bundle the instructions together, 72 the assembler reports an error. 73 74 The assembler does not yet auto-bundle (automatically combine multiple 75 instructions into one bundle), but it reserves the right to do so in 76 the future. If you want to force an instruction to run by itself, put 77 it in a bundle explicitly with curly braces and use @code{nop} 78 instructions (not @code{fnop}) to fill the remaining pipeline slots in 79 that bundle. 80 81 @menu 82 * TILEPro Opcodes:: Opcode Naming Conventions. 83 * TILEPro Registers:: Register Naming. 84 * TILEPro Modifiers:: Symbolic Operand Modifiers. 85 @end menu 86 87 @node TILEPro Opcodes 88 @subsection Opcode Names 89 @cindex TILEPro opcode names 90 @cindex opcode names, TILEPro 91 92 For a complete list of opcodes and descriptions of their semantics, 93 see @cite{TILE Processor User Architecture Manual}, available upon 94 request at www.tilera.com. 95 96 @node TILEPro Registers 97 @subsection Register Names 98 @cindex TILEPro register names 99 @cindex register names, TILEPro 100 101 General-purpose registers are represented by predefined symbols of the 102 form @samp{r@var{N}}, where @var{N} represents a number between 103 @code{0} and @code{63}. However, the following registers have 104 canonical names that must be used instead: 105 106 @table @code 107 @item r54 108 sp 109 110 @item r55 111 lr 112 113 @item r56 114 sn 115 116 @item r57 117 idn0 118 119 @item r58 120 idn1 121 122 @item r59 123 udn0 124 125 @item r60 126 udn1 127 128 @item r61 129 udn2 130 131 @item r62 132 udn3 133 134 @item r63 135 zero 136 137 @end table 138 139 The assembler will emit a warning if a numeric name is used instead of 140 the canonical name. The @code{.no_require_canonical_reg_names} 141 assembler pseudo-op turns off this 142 warning. @code{.require_canonical_reg_names} turns it back on. 143 144 @node TILEPro Modifiers 145 @subsection Symbolic Operand Modifiers 146 @cindex TILEPro modifiers 147 @cindex symbol modifiers, TILEPro 148 149 The assembler supports several modifiers when using symbol addresses 150 in TILEPro instruction operands. The general syntax is the following: 151 152 @smallexample 153 modifier(symbol) 154 @end smallexample 155 156 The following modifiers are supported: 157 158 @table @code 159 160 @item lo16 161 162 This modifier is used to load the low 16 bits of the symbol's address, 163 sign-extended to a 32-bit value (sign-extension allows it to be 164 range-checked against signed 16 bit immediate operands without 165 complaint). 166 167 @item hi16 168 169 This modifier is used to load the high 16 bits of the symbol's 170 address, also sign-extended to a 32-bit value. 171 172 @item ha16 173 174 @code{ha16(N)} is identical to @code{hi16(N)}, except if 175 @code{lo16(N)} is negative it adds one to the @code{hi16(N)} 176 value. This way @code{lo16} and @code{ha16} can be added to create any 177 32-bit value using @code{auli}. For example, here is how you move an 178 arbitrary 32-bit address into r3: 179 180 @smallexample 181 moveli r3, lo16(sym) 182 auli r3, r3, ha16(sym) 183 @end smallexample 184 185 @item got 186 187 This modifier is used to load the offset of the GOT entry 188 corresponding to the symbol. 189 190 @item got_lo16 191 192 This modifier is used to load the sign-extended low 16 bits of the 193 offset of the GOT entry corresponding to the symbol. 194 195 @item got_hi16 196 197 This modifier is used to load the sign-extended high 16 bits of the 198 offset of the GOT entry corresponding to the symbol. 199 200 @item got_ha16 201 202 This modifier is like @code{got_hi16}, but it adds one if 203 @code{got_lo16} of the input value is negative. 204 205 @item plt 206 207 This modifier is used for function symbols. It causes a 208 @emph{procedure linkage table}, an array of code stubs, to be created 209 at the time the shared object is created or linked against, together 210 with a global offset table entry. The value is a pc-relative offset 211 to the corresponding stub code in the procedure linkage table. This 212 arrangement causes the run-time symbol resolver to be called to look 213 up and set the value of the symbol the first time the function is 214 called (at latest; depending environment variables). It is only safe 215 to leave the symbol unresolved this way if all references are function 216 calls. 217 218 @item tls_gd 219 220 This modifier is used to load the offset of the GOT entry of the 221 symbol's TLS descriptor, to be used for general-dynamic TLS accesses. 222 223 @item tls_gd_lo16 224 225 This modifier is used to load the sign-extended low 16 bits of the 226 offset of the GOT entry of the symbol's TLS descriptor, to be used for 227 general dynamic TLS accesses. 228 229 @item tls_gd_hi16 230 231 This modifier is used to load the sign-extended high 16 bits of the 232 offset of the GOT entry of the symbol's TLS descriptor, to be used for 233 general dynamic TLS accesses. 234 235 @item tls_gd_ha16 236 237 This modifier is like @code{tls_gd_hi16}, but it adds one to the value 238 if @code{tls_gd_lo16} of the input value is negative. 239 240 @item tls_ie 241 242 This modifier is used to load the offset of the GOT entry containing 243 the offset of the symbol's address from the TCB, to be used for 244 initial-exec TLS accesses. 245 246 @item tls_ie_lo16 247 248 This modifier is used to load the low 16 bits of the offset of the GOT 249 entry containing the offset of the symbol's address from the TCB, to 250 be used for initial-exec TLS accesses. 251 252 @item tls_ie_hi16 253 254 This modifier is used to load the high 16 bits of the offset of the 255 GOT entry containing the offset of the symbol's address from the TCB, 256 to be used for initial-exec TLS accesses. 257 258 @item tls_ie_ha16 259 260 This modifier is like @code{tls_ie_hi16}, but it adds one to the value 261 if @code{tls_ie_lo16} of the input value is negative. 262 263 @item tls_le 264 265 This modifier is used to load the offset of the symbol's address from 266 the TCB, to be used for local-exec TLS accesses. 267 268 @item tls_le_lo16 269 270 This modifier is used to load the low 16 bits of the offset of the 271 symbol's address from the TCB, to be used for local-exec TLS accesses. 272 273 @item tls_le_hi16 274 275 This modifier is used to load the high 16 bits of the offset of the 276 symbol's address from the TCB, to be used for local-exec TLS accesses. 277 278 @item tls_le_ha16 279 280 This modifier is like @code{tls_le_hi16}, but it adds one to the value 281 if @code{tls_le_lo16} of the input value is negative. 282 283 @item tls_gd_call 284 285 This modifier is used to tag an instrution as the ``call'' part of a 286 calling sequence for a TLS GD reference of its operand. 287 288 @item tls_gd_add 289 290 This modifier is used to tag an instruction as the ``add'' part of a 291 calling sequence for a TLS GD reference of its operand. 292 293 @item tls_ie_load 294 295 This modifier is used to tag an instruction as the ``load'' part of a 296 calling sequence for a TLS IE reference of its operand. 297 298 @end table 299 300 @node TILEPro Directives 301 @section TILEPro Directives 302 @cindex machine directives, TILEPro 303 @cindex TILEPro machine directives 304 305 @table @code 306 307 @cindex @code{.align} directive, TILEPro 308 @item .align @var{expression} [, @var{expression}] 309 This is the generic @var{.align} directive. The first argument is the 310 requested alignment in bytes. 311 312 @cindex @code{.allow_suspicious_bundles} directive, TILEPro 313 @item .allow_suspicious_bundles 314 Turns on error checking for combinations of instructions in a bundle 315 that probably indicate a programming error. This is on by default. 316 317 @item .no_allow_suspicious_bundles 318 Turns off error checking for combinations of instructions in a bundle 319 that probably indicate a programming error. 320 321 @cindex @code{.require_canonical_reg_names} directive, TILEPro 322 @item .require_canonical_reg_names 323 Require that canonical register names be used, and emit a warning if 324 the numeric names are used. This is on by default. 325 326 @item .no_require_canonical_reg_names 327 Permit the use of numeric names for registers that have canonical 328 names. 329 330 @end table 331 332
