1 #name: ARM IT automatic instruction generation 2 2 #as: -mthumb -march=armv7a -mimplicit-it=always 3 #objdump: -d --prefix-addresses --show-raw-insn 4 #skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* 5 6 .*: +file format .*arm.* 7 8 Disassembly of section .text: 9 00000000 <.text> 3a40 subs r2, #64.* 10 00000002 <.text\+0x2> bfa1 itttt ge 11 00000004 <.text\+0x4> e8a0 500a stmiage.w r0!, {r1, r3, ip, lr} 12 00000008 <.text\+0x8> e8a0 500a stmiage.w r0!, {r1, r3, ip, lr} 13 0000000c <.text\+0xc> e8a0 500a stmiage.w r0!, {r1, r3, ip, lr} 14 00000010 <.text\+0x10> e8a0 500a stmiage.w r0!, {r1, r3, ip, lr} 15 00000014 <.text\+0x14> dcf4 bgt.n 00000000 <.text> 16
