1 .syntax unified 2 .arch armv7 3 .thumb 4 main: 5 6 @These branches are to see the labels in the generated file 7 bl .L888 8 bl .L111 9 bl .L777 10 11 @No IT block here: 12 bne .L4 13 14 @The following groups should be an IT block each. 15 @it ne 16 addne.n pc, r0 17 18 @it ne 19 tbbne [r0, r1] 20 21 @it eq 22 tbheq [r1, r0] 23 24 @The following group should be left as is: 25 itet eq 26 .L111: moveq r0, #2 27 movne r0, #3 28 moveq r0, #4 29 30 @Same, reverted condition: 31 itet ne 32 movne r0, #2 33 moveq r0, #3 34 movne r0, #4 35 36 37 @Two groups shall be generated, due to the label: 38 movne r0, #1 39 @ second group, the label should be at the IT insn 40 .L777: moveq r0, #2 41 ldrne pc, [r1] 42 43 @it ne 44 blne .L4 45 46 @it lt 47 bllt .L9 48 49 @itett ne 50 .L888: movne r0, #45 51 moveq r0, #5 52 movne r0, #6 53 addne.n pc, r0 54 55 @iteet eq 56 moveq r0, #7 57 movne r0, #8 58 movne r0, #3 59 moveq r0, #4 60 61 @itete eq 62 moveq r0, #5 63 movne r0, #6 64 moveq r0, #7 65 movne r0, #8 66 67 @ite eq - this group finishes due to the mov.n pc, rn 68 moveq r0, #5 69 movne r0, #6 70 mov.n pc, r0 71 72 @itete eq 73 moveq r0, #7 74 movne r0, #8 75 moveq r0, #5 76 movne r0, #6 77 78 @this shall not generate an IT block 79 add.n pc, r0 80 81 @ite eq - testing condition change (eq -> gt) 82 moveq r0, #7 83 movne r0, #8 84 85 @ite gt (group shall finish due to another condition change) 86 movgt r0, #9 87 movle r0, #10 88 89 @it eq 90 moveq r0, #11 91 92 @it le 93 movle r0, #12 94 95 @it ne 96 movne r0, #13 97 98 bl f 99 .L4: 100 pop {r4, pc} 101 .L9: 102 bl f 103 104 @Only the movlt shall be enclosed in the IT block 105 movlt r0, #0 106 muls r0, r0, r1 107 108 @Same here: 109 movlt r0, #0 110 muls r0, r0, r1 111
