Home | History | Annotate | Download | only in arm
      1 # name: VFPv3xd vldr to vmov
      2 # as: -mfpu=vfpv3xd
      3 # objdump: -dr --prefix-addresses --show-raw-insn
      4 
      5 .*: +file format .*arm.*
      6 
      7 Disassembly of section \.text:
      8 
      9 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     10 0[0-9a-fx]+ .*ed9f0a01 	vldr	s0, \[pc, #4\].*
     11 0[0-9a-fx]+ .*(00000000|3fbe0000) 	.*
     12 0[0-9a-fx]+ .*(3fbe0000|00000000) 	.*
     13 0[0-9a-fx]+ .*3df00000 	.*
     14 .*
     15 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     16 0[0-9a-fx]+ .*eebc0a00 	(vmov\.f32|fconsts)	s0, #192.*
     17 0[0-9a-fx]+ .*(00000000|bfc00000) 	.*
     18 0[0-9a-fx]+ .*(bfc00000|00000000) 	.*
     19 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     20 0[0-9a-fx]+ .*eeb40a00 	(vmov\.f32|fconsts)	s0, #64.*
     21 0[0-9a-fx]+ .*(00000000|3fc00000) 	.*
     22 0[0-9a-fx]+ .*(3fc00000|00000000) 	.*
     23 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     24 0[0-9a-fx]+ .*ed9f0a01 	vldr	s0, \[pc, #4\].*
     25 0[0-9a-fx]+ .*(00000000|3fe08000) 	.*
     26 0[0-9a-fx]+ .*(3fe08000|00000000) 	.*
     27 0[0-9a-fx]+ .*3f040000 	.*
     28 .*
     29 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     30 0[0-9a-fx]+ .*eeb60a0f 	(vmov\.f32|fconsts)	s0, #111.*
     31 0[0-9a-fx]+ .*(00000000|3fef0000) 	.*
     32 0[0-9a-fx]+ .*(3fef0000|00000000) 	.*
     33 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     34 0[0-9a-fx]+ .*eeb30a0f 	(vmov\.f32|fconsts)	s0, #63.*
     35 0[0-9a-fx]+ .*(00000000|403f0000) 	.*
     36 0[0-9a-fx]+ .*(403f0000|00000000) 	.*
     37 0[0-9a-fx]+ .*ed9f0b00 	vldr	d0, \[pc\].*
     38 0[0-9a-fx]+ .*ed9f0a01 	vldr	s0, \[pc, #4\].*
     39 0[0-9a-fx]+ .*(00000000|40400000) 	.*
     40 0[0-9a-fx]+ .*(40400000|00000000) 	.*
     41 0[0-9a-fx]+ .*42000000 	.*
     42 #pass
     43