1 2017-03-08 Peter Bergner <bergner (a] vnet.ibm.com> 2 3 * ppc-dis.c (ppc_opts) <altivec>: Do not use PPC_OPCODE_ALTIVEC2; 4 <vsx>: Do not use PPC_OPCODE_VSX3; 5 6 2017-03-08 Peter Bergner <bergner (a] vnet.ibm.com> 7 8 Apply from master. 9 2017-03-08 Peter Bergner <bergner (a] vnet.ibm.com> 10 * ppc-opc.c (powerpc_opcodes) <lnia>: New extended mnemonic. 11 12 2017-22-28 Peter Bergner <bergner (a] vnet.ibm.com> 13 14 Apply from master. 15 2017-02-10 Nicholas Piggin <npiggin (a] gmail.com> 16 17 * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics. 18 19 2016-09-16 Peter Bergner <bergner (a] vnet.ibm.com> 20 21 Apply from master. 22 2016-09-14 Peter Bergner <bergner (a] vnet.ibm.com> 23 24 * ppc-opc.c (powerpc_opcodes) <slbiag>: New mnemonic. 25 <addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool, 26 xor3>: Delete mnemonics. 27 <cp_abort>: Rename mnemonic from ... 28 <cpabort>: ...to this. 29 <setb>: Change to a X form instruction. 30 <sync>: Change to 1 operand form. 31 <copy>: Delete mnemonic. 32 <copy_first>: Rename mnemonic from ... 33 <copy>: ...to this. 34 <paste, paste.>: Delete mnemonics. 35 <paste_last>: Rename mnemonic from ... 36 <paste.>: ...to this. 37 38 2016-08-03 Tristan Gingold <gingold (a] adacore.com> 39 40 * configure: Regenerate. 41 42 2016-08-03 Tristan Gingold <gingold (a] adacore.com> 43 44 * configure: Regenerate. 45 46 2016-07-01 Tristan Gingold <gingold (a] adacore.com> 47 48 * configure: Regenerate. 49 50 2016-07-01 Tristan Gingold <gingold (a] adacore.com> 51 52 * configure: Regenerate. 53 54 2016-07-01 Jan Beulich <jbeulich (a] suse.com> 55 56 * i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove. 57 (movzb): Adjust to cover all permitted suffixes. 58 (movzw): New. 59 * i386-tbl.h: Re-generate. 60 61 2016-07-01 Jan Beulich <jbeulich (a] suse.com> 62 63 * i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant. 64 (lgdt): Remove Tbyte from non-64-bit variant. 65 (fxsave64, fxrstor64, xsave64, xrstor64, xsaveopt64, xrstors64, 66 xsaves64, xsavec64): Remove Disp16. 67 (cvtsi2ss, cvtsi2sd, invept, invvpid, invpcid, vcvtsi2sd): 68 Remove Disp32S from non-64-bit variants. Remove Disp16 from 69 64-bit variants. 70 (vcvtsi2ss, vcvtsd2si, vcvtsd2usi, vcvtsi2sd, vcvtusi2sd, 71 vcvtusi2ss, vcvtss2si, vcvtss2usi, vcvttsd2si, vcvttsd2usi, 72 vcvttss2si, vcvttss2usi, vmovd, vmovq): Remove Disp16 from 73 64-bit variants. 74 * i386-tbl.h: Re-generate. 75 76 2016-07-01 Jan Beulich <jbeulich (a] suse.com> 77 78 * i386-opc.tbl (xlat): Remove RepPrefixOk. 79 * i386-tbl.h: Re-generate. 80 81 2016-06-30 Yao Qi <yao.qi (a] linaro.org> 82 83 * arm-dis.c (print_insn): Fix typo in comment. 84 85 2016-06-28 Richard Sandiford <richard.sandiford (a] arm.com> 86 87 * aarch64-opc.c (operand_general_constraint_met_p): Check the 88 range of ldst_elemlist operands. 89 (print_register_list): Use PRIi64 to print the index. 90 (aarch64_print_operand): Likewise. 91 92 2016-06-25 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 93 94 * mcore-opc.h: Remove sentinal. 95 * mcore-dis.c (print_insn_mcore): Adjust. 96 97 2016-06-23 Graham Markall <graham.markall (a] embecosm.com> 98 99 * arc-opc.c: Correct description of availability of NPS400 100 features. 101 102 2016-06-22 Peter Bergner <bergner (a] vnet.ibm.com> 103 104 * ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines. 105 (powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni, 106 mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool, 107 xor3>: New mnemonics. 108 <setb>: Change to a VX form instruction. 109 (insert_sh6): Add support for rldixor. 110 (extract_sh6): Likewise. 111 112 2016-06-22 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 113 114 * arc-ext.h: Wrap in extern C. 115 116 2016-06-21 Graham Markall <graham.markall (a] embecosm.com> 117 118 * arc-dis.c (arc_insn_length): Add comment on instruction length. 119 Use same method for determining instruction length on ARC700 and 120 NPS-400. 121 (arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400. 122 * arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions 123 with the NPS400 subclass. 124 * arc-opc.c: Likewise. 125 126 2016-06-17 Jose E. Marchesi <jose.marchesi (a] oracle.com> 127 128 * sparc-opc.c (rdasr): New macro. 129 (wrasr): Likewise. 130 (rdpr): Likewise. 131 (wrpr): Likewise. 132 (rdhpr): Likewise. 133 (wrhpr): Likewise. 134 (sparc_opcodes): Use the macros above to fix and expand the 135 definition of read/write instructions from/to 136 asr/privileged/hyperprivileged instructions. 137 * sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and 138 %hva_mask_nz. Prefer softint_set and softint_clear over 139 set_softint and clear_softint. 140 (print_insn_sparc): Support %ver in Rd. 141 142 2016-06-17 Jose E. Marchesi <jose.marchesi (a] oracle.com> 143 144 * sparc-opc.c (sparc_opcodes): Adjust instructions opcode 145 architecture according to the hardware capabilities they require. 146 147 2016-06-17 Jose E. Marchesi <jose.marchesi (a] oracle.com> 148 149 * sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}. 150 (compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and 151 bfd_mach_sparc_v9{c,d,e,v,m}. 152 * sparc-opc.c (MASK_V9C): Define. 153 (MASK_V9D): Likewise. 154 (MASK_V9E): Likewise. 155 (MASK_V9V): Likewise. 156 (MASK_V9M): Likewise. 157 (v6): Add MASK_V9{C,D,E,V,M}. 158 (v6notlet): Likewise. 159 (v7): Likewise. 160 (v8): Likewise. 161 (v9): Likewise. 162 (v9andleon): Likewise. 163 (v9a): Likewise. 164 (v9b): Likewise. 165 (v9c): Define. 166 (v9d): Likewise. 167 (v9e): Likewise. 168 (v9v): Likewise. 169 (v9m): Likewise. 170 (sparc_opcode_archs): Add entry for v9{c,d,e,v,m}. 171 172 2016-06-15 Nick Clifton <nickc (a] redhat.com> 173 174 * nds32-dis.c (nds32_parse_audio_ext): Change printing of integer 175 constants to match expected behaviour. 176 (nds32_parse_opcode): Likewise. Also for whitespace. 177 178 2016-06-15 Andrew Burgess <andrew.burgess (a] embecosm.com> 179 180 * arc-opc.c (extract_rhv1): Extract value from insn. 181 182 2016-06-14 Graham Markall <graham.markall (a] embecosm.com> 183 184 * arc-nps400-tbl.h: Add ldbit instruction. 185 * arc-opc.c: Add flag classes required for ldbit. 186 187 2016-06-14 Graham Markall <graham.markall (a] embecosm.com> 188 189 * arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf 190 * arc-opc.c: Add flag classes, insert/extract functions, and operands to 191 support the above instructions. 192 193 2016-06-14 Graham Markall <graham.markall (a] embecosm.com> 194 195 * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb, 196 imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms, 197 csma, cbba, zncv, and hofs. 198 * arc-opc.c: Add flag classes, insert/extract functions, and operands to 199 support the above instructions. 200 201 2016-06-06 Graham Markall <graham.markall (a] embecosm.com> 202 203 * arc-nps400-tbl.h: Add andab and orab instructions. 204 205 2016-06-06 Graham Markall <graham.markall (a] embecosm.com> 206 207 * arc-nps400-tbl.h: Add addl-like instructions. 208 209 2016-06-06 Graham Markall <graham.markall (a] embecosm.com> 210 211 * arc-nps400-tbl.h: Add mxb and imxb instructions. 212 213 2016-06-06 Graham Markall <graham.markall (a] embecosm.com> 214 215 * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey 216 instructions. 217 218 2016-06-10 Andreas Krebbel <krebbel (a] linux.vnet.ibm.com> 219 220 * s390-dis.c (option_use_insn_len_bits_p): New file scope 221 variable. 222 (init_disasm): Handle new command line option "insnlength". 223 (print_s390_disassembler_options): Mention new option in help 224 output. 225 (print_insn_s390): Use the encoded insn length when dumping 226 unknown instructions. 227 228 2016-06-03 Pitchumani Sivanupandi <pitchumani.s (a] atmel.com> 229 230 * avr-dis.c (avr_operand): Add default data address space origin (0x800000) 231 to the address and set as symbol address for LDS/ STS immediate operands. 232 233 2016-06-07 Alan Modra <amodra (a] gmail.com> 234 235 * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default 236 cpu for "vle" to e500. 237 * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE. 238 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise. 239 (PPCNONE): Delete, substitute throughout. 240 (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated" 241 except for major opcode 4 and 31. 242 (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags. 243 244 2016-06-07 Matthew Wahab <matthew.wahab (a] arm.com> 245 246 * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with 247 ARM_EXT_RAS in relevant entries. 248 249 2016-06-03 Peter Bergner <bergner (a] vnet.ibm.com> 250 251 PR binutils/20196 252 * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable 253 opcodes for E6500. 254 255 2016-06-03 H.J. Lu <hongjiu.lu (a] intel.com> 256 257 PR binutis/18386 258 * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode. 259 (indir_v_mode): New. 260 Add comments for '&'. 261 (reg_table): Replace "{T|}" with "{&|}" on call and jmp. 262 (putop): Handle '&'. 263 (intel_operand_size): Handle indir_v_mode. 264 (OP_E_register): Likewise. 265 * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64. Add 266 64-bit indirect call/jmp for AMD64. 267 * i386-tbl.h: Regenerated 268 269 2016-06-02 Andrew Burgess <andrew.burgess (a] embecosm.com> 270 271 * arc-dis.c (struct arc_operand_iterator): New structure. 272 (find_format_from_table): All the old content from find_format, 273 with some minor adjustments, and parameter renaming. 274 (find_format_long_instructions): New function. 275 (find_format): Rewritten. 276 (arc_insn_length): Add LSB parameter. 277 (extract_operand_value): New function. 278 (operand_iterator_next): New function. 279 (print_insn_arc): Use new functions to find opcode, and iterator 280 over operands. 281 * arc-opc.c (insert_nps_3bit_dst_short): New function. 282 (extract_nps_3bit_dst_short): New function. 283 (insert_nps_3bit_src2_short): New function. 284 (extract_nps_3bit_src2_short): New function. 285 (insert_nps_bitop1_size): New function. 286 (extract_nps_bitop1_size): New function. 287 (insert_nps_bitop2_size): New function. 288 (extract_nps_bitop2_size): New function. 289 (insert_nps_bitop_mod4_msb): New function. 290 (extract_nps_bitop_mod4_msb): New function. 291 (insert_nps_bitop_mod4_lsb): New function. 292 (extract_nps_bitop_mod4_lsb): New function. 293 (insert_nps_bitop_dst_pos3_pos4): New function. 294 (extract_nps_bitop_dst_pos3_pos4): New function. 295 (insert_nps_bitop_ins_ext): New function. 296 (extract_nps_bitop_ins_ext): New function. 297 (arc_operands): Add new operands. 298 (arc_long_opcodes): New global array. 299 (arc_num_long_opcodes): New global. 300 * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes. 301 302 2016-06-01 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 303 304 * nds32-asm.h: Add extern "C". 305 * sh-opc.h: Likewise. 306 307 2016-06-01 Graham Markall <graham.markall (a] embecosm.com> 308 309 * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and 310 0,b,limm to the rflt instruction. 311 312 2016-05-31 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 313 314 * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned 315 constant. 316 317 2016-05-29 H.J. Lu <hongjiu.lu (a] intel.com> 318 319 PR gas/20145 320 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS, 321 CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS, 322 CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS, 323 CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS, 324 CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS. 325 * i386-init.h: Regenerated. 326 327 2016-05-27 H.J. Lu <hongjiu.lu (a] intel.com> 328 329 PR gas/20145 330 * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS. Remove 331 CpuMMX from CPU_SSE_FLAGS. Remove AVX and AVX512 bits from 332 CPU_ANY_SSE_FLAGS. Remove AVX512 bits from CPU_ANY_AVX_FLAGS. 333 Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and 334 CpuXSAVEC. Add CPU_AVX_FLAGS to CpuF16C. Remove CpuMMX from 335 CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS, 336 CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS. 337 Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS. Add CPU_ANY_287_FLAGS, 338 CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS, 339 CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS, 340 CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS. Enable CpuRegMMX 341 for MMX. Enable CpuRegXMM for SSE, AVX and AVX512. Enable 342 CpuRegYMM for AVX and AVX512VL, Enable CpuRegZMM and 343 CpuRegMask for AVX512. 344 (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM 345 and CpuRegMask. 346 (set_bitfield_from_cpu_flag_init): New function. 347 (set_bitfield): Remove const on f. Call 348 set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS. 349 * i386-opc.h (CpuRegMMX): New. 350 (CpuRegXMM): Likewise. 351 (CpuRegYMM): Likewise. 352 (CpuRegZMM): Likewise. 353 (CpuRegMask): Likewise. 354 (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm 355 and cpuregmask. 356 * i386-init.h: Regenerated. 357 * i386-tbl.h: Likewise. 358 359 2016-05-27 H.J. Lu <hongjiu.lu (a] intel.com> 360 361 PR gas/20154 362 * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64. 363 (opcode_modifiers): Add AMD64 and Intel64. 364 (main): Properly verify CpuMax. 365 * i386-opc.h (CpuAMD64): Removed. 366 (CpuIntel64): Likewise. 367 (CpuMax): Set to CpuNo64. 368 (i386_cpu_flags): Remove cpuamd64 and cpuintel64. 369 (AMD64): New. 370 (Intel64): Likewise. 371 (i386_opcode_modifier): Add amd64 and intel64. 372 (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64 373 on call and jmp. 374 * i386-init.h: Regenerated. 375 * i386-tbl.h: Likewise. 376 377 2016-05-27 H.J. Lu <hongjiu.lu (a] intel.com> 378 379 PR gas/20154 380 * i386-gen.c (main): Fail if CpuMax is incorrect. 381 * i386-opc.h (CpuMax): Set to CpuIntel64. 382 * i386-tbl.h: Regenerated. 383 384 2016-05-27 Nick Clifton <nickc (a] redhat.com> 385 386 PR target/20150 387 * msp430-dis.c (msp430dis_read_two_bytes): New function. 388 (msp430dis_opcode_unsigned): New function. 389 (msp430dis_opcode_signed): New function. 390 (msp430_singleoperand): Use the new opcode reading functions. 391 Only disassenmble bytes if they were successfully read. 392 (msp430_doubleoperand): Likewise. 393 (msp430_branchinstr): Likewise. 394 (msp430x_callx_instr): Likewise. 395 (print_insn_msp430): Check that it is safe to read bytes before 396 attempting disassembly. Use the new opcode reading functions. 397 398 2016-05-26 Peter Bergner <bergner (a] vnet.ibm.com> 399 400 * ppc-opc.c (CY): New define. Document it. 401 (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics. 402 403 2016-05-25 H.J. Lu <hongjiu.lu (a] intel.com> 404 405 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS, 406 CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS 407 and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW, 408 CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to 409 CPU_ANY_AVX_FLAGS. 410 * i386-init.h: Regenerated. 411 412 2016-05-25 H.J. Lu <hongjiu.lu (a] intel.com> 413 414 PR gas/20141 415 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS, 416 CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS. 417 * i386-init.h: Regenerated. 418 419 2016-05-25 H.J. Lu <hongjiu.lu (a] intel.com> 420 421 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to 422 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS. 423 * i386-init.h: Regenerated. 424 425 2016-05-23 Claudiu Zissulescu <claziss (a] synopsys.com> 426 427 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type 428 information. 429 (print_insn_arc): Set insn_type information. 430 * arc-opc.c (C_CC): Add F_CLASS_COND. 431 * arc-tbl.h (bbit0, bbit1): Update subclass to COND. 432 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise. 433 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise. 434 (breq, breq_s, brge, brhs, brlo, brlt): Likewise. 435 (brne, brne_s, jeq_s, jne_s): Likewise. 436 437 2016-05-23 Claudiu Zissulescu <claziss (a] synopsys.com> 438 439 * arc-tbl.h (neg): New instruction variant. 440 441 2016-05-23 Cupertino Miranda <cmiranda (a] synopsys.com> 442 443 * arc-dis.c (find_format, find_format, get_auxreg) 444 (print_insn_arc): Changed. 445 * arc-ext.h (INSERT_XOP): Likewise. 446 447 2016-05-23 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 448 449 * tic54x-dis.c (sprint_mmr): Adjust. 450 * tic54x-opc.c: Likewise. 451 452 2016-05-19 Alan Modra <amodra (a] gmail.com> 453 454 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi. 455 456 2016-05-19 Alan Modra <amodra (a] gmail.com> 457 458 * ppc-opc.c: Formatting. 459 (NSISIGNOPT): Define. 460 (powerpc_opcodes <subis>): Use NSISIGNOPT. 461 462 2016-05-18 Maciej W. Rozycki <macro (a] imgtec.com> 463 464 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand, 465 replacing references to `micromips_ase' throughout. 466 (_print_insn_mips): Don't use file-level microMIPS annotation to 467 determine the disassembly mode with the symbol table. 468 469 2016-05-13 Peter Bergner <bergner (a] vnet.ibm.com> 470 471 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT. 472 473 2016-05-11 Andrew Bennett <andrew.bennett (a] imgtec.com> 474 475 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and 476 mips64r6. 477 * mips-opc.c (D34): New macro. 478 (mips_builtin_opcodes): Define bposge32c for DSPr3. 479 480 2016-05-10 Alexander Fomin <alexander.fomin (a] intel.com> 481 482 * i386-dis.c (prefix_table): Add RDPID instruction. 483 * i386-gen.c (cpu_flag_init): Add RDPID flag. 484 (cpu_flags): Add RDPID bitfield. 485 * i386-opc.h (enum): Add RDPID element. 486 (i386_cpu_flags): Add RDPID field. 487 * i386-opc.tbl: Add RDPID instruction. 488 * i386-init.h: Regenerate. 489 * i386-tbl.h: Regenerate. 490 491 2016-05-10 Thomas Preud'homme <thomas.preudhomme (a] arm.com> 492 493 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get 494 branch type of a symbol. 495 (print_insn): Likewise. 496 497 2016-05-10 Thomas Preud'homme <thomas.preudhomme (a] arm.com> 498 499 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M 500 Mainline Security Extensions instructions. 501 (thumb_opcodes): Add entries for narrow ARMv8-M Security 502 Extensions instructions. 503 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions 504 instructions. 505 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions 506 special registers. 507 508 2016-05-09 Jose E. Marchesi <jose.marchesi (a] oracle.com> 509 510 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai. 511 512 2016-05-03 Claudiu Zissulescu <claziss (a] synopsys.com> 513 514 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP. 515 (arcExtMap_genOpcode): Likewise. 516 * arc-opc.c (arg_32bit_rc): Define new variable. 517 (arg_32bit_u6): Likewise. 518 (arg_32bit_limm): Likewise. 519 520 2016-05-03 Szabolcs Nagy <szabolcs.nagy (a] arm.com> 521 522 * aarch64-gen.c (VERIFIER): Define. 523 * aarch64-opc.c (VERIFIER): Define. 524 (verify_ldpsw): Use static linkage. 525 * aarch64-opc.h (verify_ldpsw): Remove. 526 * aarch64-tbl.h: Use VERIFIER for verifiers. 527 528 2016-04-28 Nick Clifton <nickc (a] redhat.com> 529 530 PR target/19722 531 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present. 532 * aarch64-opc.c (verify_ldpsw): New function. 533 * aarch64-opc.h (verify_ldpsw): New prototype. 534 * aarch64-tbl.h: Add initialiser for verifier field. 535 (LDPSW): Set verifier to verify_ldpsw. 536 537 2016-04-23 H.J. Lu <hongjiu.lu (a] intel.com> 538 539 PR binutils/19983 540 PR binutils/19984 541 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is 542 smaller than address size. 543 544 2016-04-20 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 545 546 * alpha-dis.c: Regenerate. 547 * crx-dis.c: Likewise. 548 * disassemble.c: Likewise. 549 * epiphany-opc.c: Likewise. 550 * fr30-opc.c: Likewise. 551 * frv-opc.c: Likewise. 552 * ip2k-opc.c: Likewise. 553 * iq2000-opc.c: Likewise. 554 * lm32-opc.c: Likewise. 555 * lm32-opinst.c: Likewise. 556 * m32c-opc.c: Likewise. 557 * m32r-opc.c: Likewise. 558 * m32r-opinst.c: Likewise. 559 * mep-opc.c: Likewise. 560 * mt-opc.c: Likewise. 561 * or1k-opc.c: Likewise. 562 * or1k-opinst.c: Likewise. 563 * tic80-opc.c: Likewise. 564 * xc16x-opc.c: Likewise. 565 * xstormy16-opc.c: Likewise. 566 567 2016-04-19 Andrew Burgess <andrew.burgess (a] embecosm.com> 568 569 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb, 570 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp, 571 calcsd, and calcxd instructions. 572 * arc-opc.c (insert_nps_bitop_size): Delete. 573 (extract_nps_bitop_size): Delete. 574 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use. 575 (extract_nps_qcmp_m3): Define. 576 (extract_nps_qcmp_m2): Define. 577 (extract_nps_qcmp_m1): Define. 578 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL. 579 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL 580 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE, 581 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST, 582 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and 583 NPS_QCMP_M3. 584 585 2016-04-19 Andrew Burgess <andrew.burgess (a] embecosm.com> 586 587 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions. 588 589 2016-04-15 H.J. Lu <hongjiu.lu (a] intel.com> 590 591 * Makefile.in: Regenerated with automake 1.11.6. 592 * aclocal.m4: Likewise. 593 594 2016-04-14 Andrew Burgess <andrew.burgess (a] embecosm.com> 595 596 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst 597 instructions. 598 * arc-opc.c (insert_nps_cmem_uimm16): New function. 599 (extract_nps_cmem_uimm16): New function. 600 (arc_operands): Add NPS_XLDST_UIMM16 operand. 601 602 2016-04-14 Andrew Burgess <andrew.burgess (a] embecosm.com> 603 604 * arc-dis.c (arc_insn_length): New function. 605 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned. 606 (find_format): Change insnLen parameter to unsigned. 607 608 2016-04-13 Nick Clifton <nickc (a] redhat.com> 609 610 PR target/19937 611 * v850-opc.c (v850_opcodes): Correct masks for long versions of 612 the LD.B and LD.BU instructions. 613 614 2016-04-12 Claudiu Zissulescu <claziss (a] synopsys.com> 615 616 * arc-dis.c (find_format): Check for extension flags. 617 (print_flags): New function. 618 (print_insn_arc): Update for .extCondCode, .extCoreRegister and 619 .extAuxRegister. 620 * arc-ext.c (arcExtMap_coreRegName): Use 621 LAST_EXTENSION_CORE_REGISTER. 622 (arcExtMap_coreReadWrite): Likewise. 623 (dump_ARC_extmap): Update printing. 624 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag. 625 (arc_aux_regs): Add cpu field. 626 * arc-regs.h: Add cpu field, lower case name aux registers. 627 628 2016-04-12 Claudiu Zissulescu <claziss (a] synopsys.com> 629 630 * arc-tbl.h: Add rtsc, sleep with no arguments. 631 632 2016-04-12 Claudiu Zissulescu <claziss (a] synopsys.com> 633 634 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf): 635 Initialize. 636 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc) 637 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6) 638 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm) 639 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm) 640 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12) 641 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc) 642 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm) 643 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6) 644 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise. 645 (arc_opcode arc_opcodes): Null terminate the array. 646 (arc_num_opcodes): Remove. 647 * arc-ext.h (INSERT_XOP): Define. 648 (extInstruction_t): Likewise. 649 (arcExtMap_instName): Delete. 650 (arcExtMap_insn): New function. 651 (arcExtMap_genOpcode): Likewise. 652 * arc-ext.c (ExtInstruction): Remove. 653 (create_map): Zero initialize instruction fields. 654 (arcExtMap_instName): Remove. 655 (arcExtMap_insn): New function. 656 (dump_ARC_extmap): More info while debuging. 657 (arcExtMap_genOpcode): New function. 658 * arc-dis.c (find_format): New function. 659 (print_insn_arc): Use find_format. 660 (arc_get_disassembler): Enable dump_ARC_extmap only when 661 debugging. 662 663 2016-04-11 Maciej W. Rozycki <macro (a] imgtec.com> 664 665 * mips-dis.c (print_mips16_insn_arg): Mask unused extended 666 instruction bits out. 667 668 2016-04-07 Andrew Burgess <andrew.burgess (a] embecosm.com> 669 670 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions. 671 * arc-opc.c (arc_flag_operands): Add new flags. 672 (arc_flag_classes): Add new classes. 673 674 2016-04-07 Andrew Burgess <andrew.burgess (a] embecosm.com> 675 676 * arc-opc.c (arc_opcodes): Extend comment to discus table layout. 677 678 2016-04-05 Andrew Burgess <andrew.burgess (a] embecosm.com> 679 680 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0, 681 encode1, rflt, crc16, and crc32 instructions. 682 * arc-opc.c (arc_flag_operands): Add F_NPS_R. 683 (arc_flag_classes): Add C_NPS_R. 684 (insert_nps_bitop_size_2b): New function. 685 (extract_nps_bitop_size_2b): Likewise. 686 (insert_nps_bitop_uimm8): Likewise. 687 (extract_nps_bitop_uimm8): Likewise. 688 (arc_operands): Add new operand entries. 689 690 2016-04-05 Claudiu Zissulescu <claziss (a] synopsys.com> 691 692 * arc-regs.h: Add a new subclass field. Add double assist 693 accumulator register values. 694 * arc-tbl.h: Use DPA subclass to mark the double assist 695 instructions. Use DPX/SPX subclas to mark the FPX instructions. 696 * arc-opc.c (RSP): Define instead of SP. 697 (arc_aux_regs): Add the subclass field. 698 699 2016-04-05 Jiong Wang <jiong.wang (a] arm.com> 700 701 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar). 702 703 2016-03-31 Andrew Burgess <andrew.burgess (a] embecosm.com> 704 705 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and 706 NPS_R_SRC1. 707 708 2016-03-30 Andrew Burgess <andrew.burgess (a] embecosm.com> 709 710 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace 711 issues. No functional changes. 712 713 2016-03-30 Claudiu Zissulescu <claziss (a] synopsys.com> 714 715 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0) 716 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1) 717 (RTT): Remove duplicate. 718 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*) 719 (PCT_CONFIG*): Remove. 720 (D1L, D1H, D2H, D2L): Define. 721 722 2016-03-29 Claudiu Zissulescu <claziss (a] synopsys.com> 723 724 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo. 725 726 2016-03-29 Claudiu Zissulescu <claziss (a] synopsys.com> 727 728 * arc-tbl.h (invld07): Remove. 729 * arc-ext-tbl.h: New file. 730 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove. 731 * arc-opc.c (arc_opcodes): Add ext-tbl include. 732 733 2016-03-24 Jan Kratochvil <jan.kratochvil (a] redhat.com> 734 735 Fix -Wstack-usage warnings. 736 * aarch64-dis.c (print_operands): Substitute size. 737 * aarch64-opc.c (print_register_offset_address): Substitute tblen. 738 739 2016-03-22 Jose E. Marchesi <jose.marchesi (a] oracle.com> 740 741 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order 742 to get a proper diagnostic when an invalid ASR register is used. 743 744 2016-03-22 Nick Clifton <nickc (a] redhat.com> 745 746 * configure: Regenerate. 747 748 2016-03-21 Andrew Burgess <andrew.burgess (a] embecosm.com> 749 750 * arc-nps400-tbl.h: New file. 751 * arc-opc.c: Add top level comment. 752 (insert_nps_3bit_dst): New function. 753 (extract_nps_3bit_dst): New function. 754 (insert_nps_3bit_src2): New function. 755 (extract_nps_3bit_src2): New function. 756 (insert_nps_bitop_size): New function. 757 (extract_nps_bitop_size): New function. 758 (arc_flag_operands): Add nps400 entries. 759 (arc_flag_classes): Add nps400 entries. 760 (arc_operands): Add nps400 entries. 761 (arc_opcodes): Add nps400 include. 762 763 2016-03-21 Andrew Burgess <andrew.burgess (a] embecosm.com> 764 765 * arc-opc.c (arc_flag_classes): Convert all flag classes to use 766 the new class enum values. 767 768 2016-03-21 Andrew Burgess <andrew.burgess (a] embecosm.com> 769 770 * arc-dis.c (print_insn_arc): Handle nps400. 771 772 2016-03-21 Andrew Burgess <andrew.burgess (a] embecosm.com> 773 774 * arc-opc.c (BASE): Delete. 775 776 2016-03-18 Nick Clifton <nickc (a] redhat.com> 777 778 PR target/19721 779 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand 780 of MOV insn that aliases an ORR insn. 781 782 2016-03-16 Jiong Wang <jiong.wang (a] arm.com> 783 784 * arm-dis.c (neon_opcodes): Support new FP16 instructions. 785 786 2016-03-07 Trevor Saunders <tbsaunde+binutils (a] tbsaunde.org> 787 788 * mcore-opc.h: Add const qualifiers. 789 * microblaze-opc.h (struct op_code_struct): Likewise. 790 * sh-opc.h: Likewise. 791 * tic4x-dis.c (tic4x_print_indirect): Likewise. 792 (tic4x_print_op): Likewise. 793 794 2016-03-02 Alan Modra <amodra (a] gmail.com> 795 796 * or1k-desc.h: Regenerate. 797 * fr30-ibld.c: Regenerate. 798 * rl78-decode.c: Regenerate. 799 800 2016-03-01 Nick Clifton <nickc (a] redhat.com> 801 802 PR target/19747 803 * rl78-dis.c (print_insn_rl78_common): Fix typo. 804 805 2016-02-24 Renlin Li <renlin.li (a] arm.com> 806 807 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries. 808 (print_insn_coprocessor): Support fp16 instructions. 809 810 2016-02-24 Renlin Li <renlin.li (a] arm.com> 811 812 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm, 813 vminnm, vrint(mpna). 814 815 2016-02-24 Renlin Li <renlin.li (a] arm.com> 816 817 * arm-dis.c (print_insn_coprocessor): Check co-processor number for 818 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2. 819 820 2016-02-15 H.J. Lu <hongjiu.lu (a] intel.com> 821 822 * i386-dis.c (print_insn): Parenthesize expression to prevent 823 truncated addresses. 824 (OP_J): Likewise. 825 826 2016-02-10 Claudiu Zissulescu <claziss (a] synopsys.com> 827 Janek van Oirschot <jvanoirs (a] synopsys.com> 828 829 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New 830 variable. 831 832 2016-02-04 Nick Clifton <nickc (a] redhat.com> 833 834 PR target/19561 835 * msp430-dis.c (print_insn_msp430): Add a special case for 836 decoding an RRC instruction with the ZC bit set in the extension 837 word. 838 839 2016-02-02 Andrew Burgess <andrew.burgess (a] embecosm.com> 840 841 * cgen-ibld.in (insert_normal): Rework calculation of shift. 842 * epiphany-ibld.c: Regenerate. 843 * fr30-ibld.c: Regenerate. 844 * frv-ibld.c: Regenerate. 845 * ip2k-ibld.c: Regenerate. 846 * iq2000-ibld.c: Regenerate. 847 * lm32-ibld.c: Regenerate. 848 * m32c-ibld.c: Regenerate. 849 * m32r-ibld.c: Regenerate. 850 * mep-ibld.c: Regenerate. 851 * mt-ibld.c: Regenerate. 852 * or1k-ibld.c: Regenerate. 853 * xc16x-ibld.c: Regenerate. 854 * xstormy16-ibld.c: Regenerate. 855 856 2016-02-02 Andrew Burgess <andrew.burgess (a] embecosm.com> 857 858 * epiphany-dis.c: Regenerated from latest cpu files. 859 860 2016-02-01 Michael McConville <mmcco (a] mykolab.com> 861 862 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask 863 test bit. 864 865 2016-01-25 Renlin Li <renlin.li (a] arm.com> 866 867 * arm-dis.c (mapping_symbol_for_insn): New function. 868 (find_ifthen_state): Call mapping_symbol_for_insn(). 869 870 2016-01-20 Matthew Wahab <matthew.wahab (a] arm.com> 871 872 * aarch64-opc.c (operand_general_constraint_met_p): Check validity 873 of MSR UAO immediate operand. 874 875 2016-01-18 Maciej W. Rozycki <macro (a] imgtec.com> 876 877 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS 878 instruction support. 879 880 2016-01-17 Alan Modra <amodra (a] gmail.com> 881 882 * configure: Regenerate. 883 884 2016-01-14 Nick Clifton <nickc (a] redhat.com> 885 886 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw 887 instructions that can support stack pointer operations. 888 * rl78-decode.c: Regenerate. 889 * rl78-dis.c: Fix display of stack pointer in MOVW based 890 instructions. 891 892 2016-01-14 Matthew Wahab <matthew.wahab (a] arm.com> 893 894 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals 895 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1, 896 erxtatus_el1 and erxaddr_el1. 897 898 2016-01-12 Matthew Wahab <matthew.wahab (a] arm.com> 899 900 * arm-dis.c (arm_opcodes): Add "esb". 901 (thumb_opcodes): Likewise. 902 903 2016-01-11 Peter Bergner <bergner (a] vnet.ibm.com> 904 905 * ppc-opc.c <xscmpnedp>: Delete. 906 <xvcmpnedp>: Likewise. 907 <xvcmpnedp.>: Likewise. 908 <xvcmpnesp>: Likewise. 909 <xvcmpnesp.>: Likewise. 910 911 2016-01-08 Andreas Schwab <schwab (a] linux-m68k.org> 912 913 PR gas/13050 914 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in 915 addition to ISA_A. 916 917 2016-01-01 Alan Modra <amodra (a] gmail.com> 918 919 Update year range in copyright notice of all files. 920 921 For older changes see ChangeLog-2015 922 924 Copyright (C) 2016 Free Software Foundation, Inc. 925 926 Copying and distribution of this file, with or without modification, 927 are permitted in any medium without royalty provided the copyright 928 notice and this notice are preserved. 929 930 Local Variables: 931 mode: change-log 932 left-margin: 8 933 fill-column: 74 934 version-control: never 935 End: 936
