1 /* Instruction building/extraction support for iq2000. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2016 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "iq2000-desc.h" 34 #include "iq2000-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift_within_word, shift_to_word, shift; 212 213 /* How to shift the value to BIT0 of the word. */ 214 shift_to_word = total_length - (word_offset + word_length); 215 216 /* How to shift the value to the field within the word. */ 217 if (CGEN_INSN_LSB0_P) 218 shift_within_word = start + 1 - length; 219 else 220 shift_within_word = word_length - start - length; 221 222 /* The total SHIFT, then mask in the value. */ 223 shift = shift_to_word + shift_within_word; 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 225 } 226 227 #else /* ! CGEN_INT_INSN_P */ 228 229 { 230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 231 232 insert_1 (cd, value, start, length, word_length, bufp); 233 } 234 235 #endif /* ! CGEN_INT_INSN_P */ 236 237 return NULL; 238 } 239 240 /* Default insn builder (insert handler). 241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 243 recorded in host byte order, otherwise BUFFER is an array of bytes 244 and the value is recorded in target byte order). 245 The result is an error message or NULL if success. */ 246 247 static const char * 248 insert_insn_normal (CGEN_CPU_DESC cd, 249 const CGEN_INSN * insn, 250 CGEN_FIELDS * fields, 251 CGEN_INSN_BYTES_PTR buffer, 252 bfd_vma pc) 253 { 254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 255 unsigned long value; 256 const CGEN_SYNTAX_CHAR_TYPE * syn; 257 258 CGEN_INIT_INSERT (cd); 259 value = CGEN_INSN_BASE_VALUE (insn); 260 261 /* If we're recording insns as numbers (rather than a string of bytes), 262 target byte order handling is deferred until later. */ 263 264 #if CGEN_INT_INSN_P 265 266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 267 CGEN_FIELDS_BITSIZE (fields), value); 268 269 #else 270 271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 272 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 273 value); 274 275 #endif /* ! CGEN_INT_INSN_P */ 276 277 /* ??? It would be better to scan the format's fields. 278 Still need to be able to insert a value based on the operand though; 279 e.g. storing a branch displacement that got resolved later. 280 Needs more thought first. */ 281 282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 283 { 284 const char *errmsg; 285 286 if (CGEN_SYNTAX_CHAR_P (* syn)) 287 continue; 288 289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 290 fields, buffer, pc); 291 if (errmsg) 292 return errmsg; 293 } 294 295 return NULL; 296 } 297 298 #if CGEN_INT_INSN_P 299 /* Cover function to store an insn value into an integral insn. Must go here 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 301 302 static void 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 304 CGEN_INSN_BYTES_PTR buf, 305 int length, 306 int insn_length, 307 CGEN_INSN_INT value) 308 { 309 /* For architectures with insns smaller than the base-insn-bitsize, 310 length may be too big. */ 311 if (length > insn_length) 312 *buf = value; 313 else 314 { 315 int shift = insn_length - length; 316 /* Written this way to avoid undefined behaviour. */ 317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 318 319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 320 } 321 } 322 #endif 323 324 /* Operand extraction. */ 326 327 #if ! CGEN_INT_INSN_P 328 329 /* Subroutine of extract_normal. 330 Ensure sufficient bytes are cached in EX_INFO. 331 OFFSET is the offset in bytes from the start of the insn of the value. 332 BYTES is the length of the needed value. 333 Returns 1 for success, 0 for failure. */ 334 335 static CGEN_INLINE int 336 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 CGEN_EXTRACT_INFO *ex_info, 338 int offset, 339 int bytes, 340 bfd_vma pc) 341 { 342 /* It's doubtful that the middle part has already been fetched so 343 we don't optimize that case. kiss. */ 344 unsigned int mask; 345 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 346 347 /* First do a quick check. */ 348 mask = (1 << bytes) - 1; 349 if (((ex_info->valid >> offset) & mask) == mask) 350 return 1; 351 352 /* Search for the first byte we need to read. */ 353 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 354 if (! (mask & ex_info->valid)) 355 break; 356 357 if (bytes) 358 { 359 int status; 360 361 pc += offset; 362 status = (*info->read_memory_func) 363 (pc, ex_info->insn_bytes + offset, bytes, info); 364 365 if (status != 0) 366 { 367 (*info->memory_error_func) (status, pc, info); 368 return 0; 369 } 370 371 ex_info->valid |= ((1 << bytes) - 1) << offset; 372 } 373 374 return 1; 375 } 376 377 /* Subroutine of extract_normal. */ 378 379 static CGEN_INLINE long 380 extract_1 (CGEN_CPU_DESC cd, 381 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 382 int start, 383 int length, 384 int word_length, 385 unsigned char *bufp, 386 bfd_vma pc ATTRIBUTE_UNUSED) 387 { 388 unsigned long x; 389 int shift; 390 391 x = cgen_get_insn_value (cd, bufp, word_length); 392 393 if (CGEN_INSN_LSB0_P) 394 shift = (start + 1) - length; 395 else 396 shift = (word_length - (start + length)); 397 return x >> shift; 398 } 399 400 #endif /* ! CGEN_INT_INSN_P */ 401 402 /* Default extraction routine. 403 404 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 405 or sometimes less for cases like the m32r where the base insn size is 32 406 but some insns are 16 bits. 407 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 408 but for generality we take a bitmask of all of them. 409 WORD_OFFSET is the offset in bits from the start of the insn of the value. 410 WORD_LENGTH is the length of the word in bits in which the value resides. 411 START is the starting bit number in the word, architecture origin. 412 LENGTH is the length of VALUE in bits. 413 TOTAL_LENGTH is the total length of the insn in bits. 414 415 Returns 1 for success, 0 for failure. */ 416 417 /* ??? The return code isn't properly used. wip. */ 418 419 /* ??? This doesn't handle bfd_vma's. Create another function when 420 necessary. */ 421 422 static int 423 extract_normal (CGEN_CPU_DESC cd, 424 #if ! CGEN_INT_INSN_P 425 CGEN_EXTRACT_INFO *ex_info, 426 #else 427 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 428 #endif 429 CGEN_INSN_INT insn_value, 430 unsigned int attrs, 431 unsigned int word_offset, 432 unsigned int start, 433 unsigned int length, 434 unsigned int word_length, 435 unsigned int total_length, 436 #if ! CGEN_INT_INSN_P 437 bfd_vma pc, 438 #else 439 bfd_vma pc ATTRIBUTE_UNUSED, 440 #endif 441 long *valuep) 442 { 443 long value, mask; 444 445 /* If LENGTH is zero, this operand doesn't contribute to the value 446 so give it a standard value of zero. */ 447 if (length == 0) 448 { 449 *valuep = 0; 450 return 1; 451 } 452 453 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 454 abort (); 455 456 /* For architectures with insns smaller than the insn-base-bitsize, 457 word_length may be too big. */ 458 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 459 { 460 if (word_offset + word_length > total_length) 461 word_length = total_length - word_offset; 462 } 463 464 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 465 466 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 467 { 468 if (CGEN_INSN_LSB0_P) 469 value = insn_value >> ((word_offset + start + 1) - length); 470 else 471 value = insn_value >> (total_length - ( word_offset + start + length)); 472 } 473 474 #if ! CGEN_INT_INSN_P 475 476 else 477 { 478 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 479 480 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 481 abort (); 482 483 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 484 return 0; 485 486 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 487 } 488 489 #endif /* ! CGEN_INT_INSN_P */ 490 491 /* Written this way to avoid undefined behaviour. */ 492 mask = (((1L << (length - 1)) - 1) << 1) | 1; 493 494 value &= mask; 495 /* sign extend? */ 496 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 497 && (value & (1L << (length - 1)))) 498 value |= ~mask; 499 500 *valuep = value; 501 502 return 1; 503 } 504 505 /* Default insn extractor. 506 507 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 508 The extracted fields are stored in FIELDS. 509 EX_INFO is used to handle reading variable length insns. 510 Return the length of the insn in bits, or 0 if no match, 511 or -1 if an error occurs fetching data (memory_error_func will have 512 been called). */ 513 514 static int 515 extract_insn_normal (CGEN_CPU_DESC cd, 516 const CGEN_INSN *insn, 517 CGEN_EXTRACT_INFO *ex_info, 518 CGEN_INSN_INT insn_value, 519 CGEN_FIELDS *fields, 520 bfd_vma pc) 521 { 522 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 523 const CGEN_SYNTAX_CHAR_TYPE *syn; 524 525 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 526 527 CGEN_INIT_EXTRACT (cd); 528 529 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 530 { 531 int length; 532 533 if (CGEN_SYNTAX_CHAR_P (*syn)) 534 continue; 535 536 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 537 ex_info, insn_value, fields, pc); 538 if (length <= 0) 539 return length; 540 } 541 542 /* We recognized and successfully extracted this insn. */ 543 return CGEN_INSN_BITSIZE (insn); 544 } 545 546 /* Machine generated code added here. */ 548 549 const char * iq2000_cgen_insert_operand 550 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 551 552 /* Main entry point for operand insertion. 553 554 This function is basically just a big switch statement. Earlier versions 555 used tables to look up the function to use, but 556 - if the table contains both assembler and disassembler functions then 557 the disassembler contains much of the assembler and vice-versa, 558 - there's a lot of inlining possibilities as things grow, 559 - using a switch statement avoids the function call overhead. 560 561 This function could be moved into `parse_insn_normal', but keeping it 562 separate makes clear the interface between `parse_insn_normal' and each of 563 the handlers. It's also needed by GAS to insert operands that couldn't be 564 resolved during parsing. */ 565 566 const char * 567 iq2000_cgen_insert_operand (CGEN_CPU_DESC cd, 568 int opindex, 569 CGEN_FIELDS * fields, 570 CGEN_INSN_BYTES_PTR buffer, 571 bfd_vma pc ATTRIBUTE_UNUSED) 572 { 573 const char * errmsg = NULL; 574 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 575 576 switch (opindex) 577 { 578 case IQ2000_OPERAND__INDEX : 579 errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer); 580 break; 581 case IQ2000_OPERAND_BASE : 582 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 583 break; 584 case IQ2000_OPERAND_BASEOFF : 585 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 586 break; 587 case IQ2000_OPERAND_BITNUM : 588 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 589 break; 590 case IQ2000_OPERAND_BYTECOUNT : 591 errmsg = insert_normal (cd, fields->f_bytecount, 0, 0, 7, 8, 32, total_length, buffer); 592 break; 593 case IQ2000_OPERAND_CAM_Y : 594 errmsg = insert_normal (cd, fields->f_cam_y, 0, 0, 2, 3, 32, total_length, buffer); 595 break; 596 case IQ2000_OPERAND_CAM_Z : 597 errmsg = insert_normal (cd, fields->f_cam_z, 0, 0, 5, 3, 32, total_length, buffer); 598 break; 599 case IQ2000_OPERAND_CM_3FUNC : 600 errmsg = insert_normal (cd, fields->f_cm_3func, 0, 0, 5, 3, 32, total_length, buffer); 601 break; 602 case IQ2000_OPERAND_CM_3Z : 603 errmsg = insert_normal (cd, fields->f_cm_3z, 0, 0, 1, 2, 32, total_length, buffer); 604 break; 605 case IQ2000_OPERAND_CM_4FUNC : 606 errmsg = insert_normal (cd, fields->f_cm_4func, 0, 0, 5, 4, 32, total_length, buffer); 607 break; 608 case IQ2000_OPERAND_CM_4Z : 609 errmsg = insert_normal (cd, fields->f_cm_4z, 0, 0, 2, 3, 32, total_length, buffer); 610 break; 611 case IQ2000_OPERAND_COUNT : 612 errmsg = insert_normal (cd, fields->f_count, 0, 0, 15, 7, 32, total_length, buffer); 613 break; 614 case IQ2000_OPERAND_EXECODE : 615 errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer); 616 break; 617 case IQ2000_OPERAND_HI16 : 618 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 619 break; 620 case IQ2000_OPERAND_IMM : 621 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 622 break; 623 case IQ2000_OPERAND_JMPTARG : 624 { 625 long value = fields->f_jtarg; 626 value = ((USI) (((value) & (262143))) >> (2)); 627 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer); 628 } 629 break; 630 case IQ2000_OPERAND_JMPTARGQ10 : 631 { 632 long value = fields->f_jtargq10; 633 value = ((USI) (((value) & (8388607))) >> (2)); 634 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer); 635 } 636 break; 637 case IQ2000_OPERAND_LO16 : 638 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 639 break; 640 case IQ2000_OPERAND_MASK : 641 errmsg = insert_normal (cd, fields->f_mask, 0, 0, 9, 4, 32, total_length, buffer); 642 break; 643 case IQ2000_OPERAND_MASKL : 644 errmsg = insert_normal (cd, fields->f_maskl, 0, 0, 4, 5, 32, total_length, buffer); 645 break; 646 case IQ2000_OPERAND_MASKQ10 : 647 errmsg = insert_normal (cd, fields->f_maskq10, 0, 0, 10, 5, 32, total_length, buffer); 648 break; 649 case IQ2000_OPERAND_MASKR : 650 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 651 break; 652 case IQ2000_OPERAND_MLO16 : 653 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer); 654 break; 655 case IQ2000_OPERAND_OFFSET : 656 { 657 long value = fields->f_offset; 658 value = ((SI) (((value) - (pc))) >> (2)); 659 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer); 660 } 661 break; 662 case IQ2000_OPERAND_RD : 663 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 664 break; 665 case IQ2000_OPERAND_RD_RS : 666 { 667 { 668 FLD (f_rd) = FLD (f_rd_rs); 669 FLD (f_rs) = FLD (f_rd_rs); 670 } 671 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 672 if (errmsg) 673 break; 674 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 675 if (errmsg) 676 break; 677 } 678 break; 679 case IQ2000_OPERAND_RD_RT : 680 { 681 { 682 FLD (f_rd) = FLD (f_rd_rt); 683 FLD (f_rt) = FLD (f_rd_rt); 684 } 685 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer); 686 if (errmsg) 687 break; 688 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 689 if (errmsg) 690 break; 691 } 692 break; 693 case IQ2000_OPERAND_RS : 694 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 695 break; 696 case IQ2000_OPERAND_RT : 697 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 698 break; 699 case IQ2000_OPERAND_RT_RS : 700 { 701 { 702 FLD (f_rt) = FLD (f_rt_rs); 703 FLD (f_rs) = FLD (f_rt_rs); 704 } 705 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer); 706 if (errmsg) 707 break; 708 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer); 709 if (errmsg) 710 break; 711 } 712 break; 713 case IQ2000_OPERAND_SHAMT : 714 errmsg = insert_normal (cd, fields->f_shamt, 0, 0, 10, 5, 32, total_length, buffer); 715 break; 716 717 default : 718 /* xgettext:c-format */ 719 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 720 opindex); 721 abort (); 722 } 723 724 return errmsg; 725 } 726 727 int iq2000_cgen_extract_operand 728 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 729 730 /* Main entry point for operand extraction. 731 The result is <= 0 for error, >0 for success. 732 ??? Actual values aren't well defined right now. 733 734 This function is basically just a big switch statement. Earlier versions 735 used tables to look up the function to use, but 736 - if the table contains both assembler and disassembler functions then 737 the disassembler contains much of the assembler and vice-versa, 738 - there's a lot of inlining possibilities as things grow, 739 - using a switch statement avoids the function call overhead. 740 741 This function could be moved into `print_insn_normal', but keeping it 742 separate makes clear the interface between `print_insn_normal' and each of 743 the handlers. */ 744 745 int 746 iq2000_cgen_extract_operand (CGEN_CPU_DESC cd, 747 int opindex, 748 CGEN_EXTRACT_INFO *ex_info, 749 CGEN_INSN_INT insn_value, 750 CGEN_FIELDS * fields, 751 bfd_vma pc) 752 { 753 /* Assume success (for those operands that are nops). */ 754 int length = 1; 755 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 756 757 switch (opindex) 758 { 759 case IQ2000_OPERAND__INDEX : 760 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index); 761 break; 762 case IQ2000_OPERAND_BASE : 763 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 764 break; 765 case IQ2000_OPERAND_BASEOFF : 766 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 767 break; 768 case IQ2000_OPERAND_BITNUM : 769 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 770 break; 771 case IQ2000_OPERAND_BYTECOUNT : 772 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & fields->f_bytecount); 773 break; 774 case IQ2000_OPERAND_CAM_Y : 775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cam_y); 776 break; 777 case IQ2000_OPERAND_CAM_Z : 778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cam_z); 779 break; 780 case IQ2000_OPERAND_CM_3FUNC : 781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cm_3func); 782 break; 783 case IQ2000_OPERAND_CM_3Z : 784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 2, 32, total_length, pc, & fields->f_cm_3z); 785 break; 786 case IQ2000_OPERAND_CM_4FUNC : 787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 4, 32, total_length, pc, & fields->f_cm_4func); 788 break; 789 case IQ2000_OPERAND_CM_4Z : 790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cm_4z); 791 break; 792 case IQ2000_OPERAND_COUNT : 793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 7, 32, total_length, pc, & fields->f_count); 794 break; 795 case IQ2000_OPERAND_EXECODE : 796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode); 797 break; 798 case IQ2000_OPERAND_HI16 : 799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 800 break; 801 case IQ2000_OPERAND_IMM : 802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 803 break; 804 case IQ2000_OPERAND_JMPTARG : 805 { 806 long value; 807 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, pc, & value); 808 value = ((((pc) & (0xf0000000))) | (((value) << (2)))); 809 fields->f_jtarg = value; 810 } 811 break; 812 case IQ2000_OPERAND_JMPTARGQ10 : 813 { 814 long value; 815 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value); 816 value = ((((pc) & (0xf0000000))) | (((value) << (2)))); 817 fields->f_jtargq10 = value; 818 } 819 break; 820 case IQ2000_OPERAND_LO16 : 821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 822 break; 823 case IQ2000_OPERAND_MASK : 824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 4, 32, total_length, pc, & fields->f_mask); 825 break; 826 case IQ2000_OPERAND_MASKL : 827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_maskl); 828 break; 829 case IQ2000_OPERAND_MASKQ10 : 830 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_maskq10); 831 break; 832 case IQ2000_OPERAND_MASKR : 833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 834 break; 835 case IQ2000_OPERAND_MLO16 : 836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm); 837 break; 838 case IQ2000_OPERAND_OFFSET : 839 { 840 long value; 841 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value); 842 value = ((((value) << (2))) + (((pc) + (4)))); 843 fields->f_offset = value; 844 } 845 break; 846 case IQ2000_OPERAND_RD : 847 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 848 break; 849 case IQ2000_OPERAND_RD_RS : 850 { 851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 852 if (length <= 0) break; 853 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 854 if (length <= 0) break; 855 { 856 FLD (f_rd_rs) = FLD (f_rs); 857 } 858 } 859 break; 860 case IQ2000_OPERAND_RD_RT : 861 { 862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd); 863 if (length <= 0) break; 864 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 865 if (length <= 0) break; 866 { 867 FLD (f_rd_rt) = FLD (f_rt); 868 } 869 } 870 break; 871 case IQ2000_OPERAND_RS : 872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 873 break; 874 case IQ2000_OPERAND_RT : 875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 876 break; 877 case IQ2000_OPERAND_RT_RS : 878 { 879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt); 880 if (length <= 0) break; 881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs); 882 if (length <= 0) break; 883 { 884 FLD (f_rd_rs) = FLD (f_rs); 885 } 886 } 887 break; 888 case IQ2000_OPERAND_SHAMT : 889 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_shamt); 890 break; 891 892 default : 893 /* xgettext:c-format */ 894 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 895 opindex); 896 abort (); 897 } 898 899 return length; 900 } 901 902 cgen_insert_fn * const iq2000_cgen_insert_handlers[] = 903 { 904 insert_insn_normal, 905 }; 906 907 cgen_extract_fn * const iq2000_cgen_extract_handlers[] = 908 { 909 extract_insn_normal, 910 }; 911 912 int iq2000_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 913 bfd_vma iq2000_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 914 915 /* Getting values from cgen_fields is handled by a collection of functions. 916 They are distinguished by the type of the VALUE argument they return. 917 TODO: floating point, inlining support, remove cases where result type 918 not appropriate. */ 919 920 int 921 iq2000_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 922 int opindex, 923 const CGEN_FIELDS * fields) 924 { 925 int value; 926 927 switch (opindex) 928 { 929 case IQ2000_OPERAND__INDEX : 930 value = fields->f_index; 931 break; 932 case IQ2000_OPERAND_BASE : 933 value = fields->f_rs; 934 break; 935 case IQ2000_OPERAND_BASEOFF : 936 value = fields->f_imm; 937 break; 938 case IQ2000_OPERAND_BITNUM : 939 value = fields->f_rt; 940 break; 941 case IQ2000_OPERAND_BYTECOUNT : 942 value = fields->f_bytecount; 943 break; 944 case IQ2000_OPERAND_CAM_Y : 945 value = fields->f_cam_y; 946 break; 947 case IQ2000_OPERAND_CAM_Z : 948 value = fields->f_cam_z; 949 break; 950 case IQ2000_OPERAND_CM_3FUNC : 951 value = fields->f_cm_3func; 952 break; 953 case IQ2000_OPERAND_CM_3Z : 954 value = fields->f_cm_3z; 955 break; 956 case IQ2000_OPERAND_CM_4FUNC : 957 value = fields->f_cm_4func; 958 break; 959 case IQ2000_OPERAND_CM_4Z : 960 value = fields->f_cm_4z; 961 break; 962 case IQ2000_OPERAND_COUNT : 963 value = fields->f_count; 964 break; 965 case IQ2000_OPERAND_EXECODE : 966 value = fields->f_excode; 967 break; 968 case IQ2000_OPERAND_HI16 : 969 value = fields->f_imm; 970 break; 971 case IQ2000_OPERAND_IMM : 972 value = fields->f_imm; 973 break; 974 case IQ2000_OPERAND_JMPTARG : 975 value = fields->f_jtarg; 976 break; 977 case IQ2000_OPERAND_JMPTARGQ10 : 978 value = fields->f_jtargq10; 979 break; 980 case IQ2000_OPERAND_LO16 : 981 value = fields->f_imm; 982 break; 983 case IQ2000_OPERAND_MASK : 984 value = fields->f_mask; 985 break; 986 case IQ2000_OPERAND_MASKL : 987 value = fields->f_maskl; 988 break; 989 case IQ2000_OPERAND_MASKQ10 : 990 value = fields->f_maskq10; 991 break; 992 case IQ2000_OPERAND_MASKR : 993 value = fields->f_rs; 994 break; 995 case IQ2000_OPERAND_MLO16 : 996 value = fields->f_imm; 997 break; 998 case IQ2000_OPERAND_OFFSET : 999 value = fields->f_offset; 1000 break; 1001 case IQ2000_OPERAND_RD : 1002 value = fields->f_rd; 1003 break; 1004 case IQ2000_OPERAND_RD_RS : 1005 value = fields->f_rd_rs; 1006 break; 1007 case IQ2000_OPERAND_RD_RT : 1008 value = fields->f_rd_rt; 1009 break; 1010 case IQ2000_OPERAND_RS : 1011 value = fields->f_rs; 1012 break; 1013 case IQ2000_OPERAND_RT : 1014 value = fields->f_rt; 1015 break; 1016 case IQ2000_OPERAND_RT_RS : 1017 value = fields->f_rt_rs; 1018 break; 1019 case IQ2000_OPERAND_SHAMT : 1020 value = fields->f_shamt; 1021 break; 1022 1023 default : 1024 /* xgettext:c-format */ 1025 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1026 opindex); 1027 abort (); 1028 } 1029 1030 return value; 1031 } 1032 1033 bfd_vma 1034 iq2000_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1035 int opindex, 1036 const CGEN_FIELDS * fields) 1037 { 1038 bfd_vma value; 1039 1040 switch (opindex) 1041 { 1042 case IQ2000_OPERAND__INDEX : 1043 value = fields->f_index; 1044 break; 1045 case IQ2000_OPERAND_BASE : 1046 value = fields->f_rs; 1047 break; 1048 case IQ2000_OPERAND_BASEOFF : 1049 value = fields->f_imm; 1050 break; 1051 case IQ2000_OPERAND_BITNUM : 1052 value = fields->f_rt; 1053 break; 1054 case IQ2000_OPERAND_BYTECOUNT : 1055 value = fields->f_bytecount; 1056 break; 1057 case IQ2000_OPERAND_CAM_Y : 1058 value = fields->f_cam_y; 1059 break; 1060 case IQ2000_OPERAND_CAM_Z : 1061 value = fields->f_cam_z; 1062 break; 1063 case IQ2000_OPERAND_CM_3FUNC : 1064 value = fields->f_cm_3func; 1065 break; 1066 case IQ2000_OPERAND_CM_3Z : 1067 value = fields->f_cm_3z; 1068 break; 1069 case IQ2000_OPERAND_CM_4FUNC : 1070 value = fields->f_cm_4func; 1071 break; 1072 case IQ2000_OPERAND_CM_4Z : 1073 value = fields->f_cm_4z; 1074 break; 1075 case IQ2000_OPERAND_COUNT : 1076 value = fields->f_count; 1077 break; 1078 case IQ2000_OPERAND_EXECODE : 1079 value = fields->f_excode; 1080 break; 1081 case IQ2000_OPERAND_HI16 : 1082 value = fields->f_imm; 1083 break; 1084 case IQ2000_OPERAND_IMM : 1085 value = fields->f_imm; 1086 break; 1087 case IQ2000_OPERAND_JMPTARG : 1088 value = fields->f_jtarg; 1089 break; 1090 case IQ2000_OPERAND_JMPTARGQ10 : 1091 value = fields->f_jtargq10; 1092 break; 1093 case IQ2000_OPERAND_LO16 : 1094 value = fields->f_imm; 1095 break; 1096 case IQ2000_OPERAND_MASK : 1097 value = fields->f_mask; 1098 break; 1099 case IQ2000_OPERAND_MASKL : 1100 value = fields->f_maskl; 1101 break; 1102 case IQ2000_OPERAND_MASKQ10 : 1103 value = fields->f_maskq10; 1104 break; 1105 case IQ2000_OPERAND_MASKR : 1106 value = fields->f_rs; 1107 break; 1108 case IQ2000_OPERAND_MLO16 : 1109 value = fields->f_imm; 1110 break; 1111 case IQ2000_OPERAND_OFFSET : 1112 value = fields->f_offset; 1113 break; 1114 case IQ2000_OPERAND_RD : 1115 value = fields->f_rd; 1116 break; 1117 case IQ2000_OPERAND_RD_RS : 1118 value = fields->f_rd_rs; 1119 break; 1120 case IQ2000_OPERAND_RD_RT : 1121 value = fields->f_rd_rt; 1122 break; 1123 case IQ2000_OPERAND_RS : 1124 value = fields->f_rs; 1125 break; 1126 case IQ2000_OPERAND_RT : 1127 value = fields->f_rt; 1128 break; 1129 case IQ2000_OPERAND_RT_RS : 1130 value = fields->f_rt_rs; 1131 break; 1132 case IQ2000_OPERAND_SHAMT : 1133 value = fields->f_shamt; 1134 break; 1135 1136 default : 1137 /* xgettext:c-format */ 1138 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1139 opindex); 1140 abort (); 1141 } 1142 1143 return value; 1144 } 1145 1146 void iq2000_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1147 void iq2000_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1148 1149 /* Stuffing values in cgen_fields is handled by a collection of functions. 1150 They are distinguished by the type of the VALUE argument they accept. 1151 TODO: floating point, inlining support, remove cases where argument type 1152 not appropriate. */ 1153 1154 void 1155 iq2000_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1156 int opindex, 1157 CGEN_FIELDS * fields, 1158 int value) 1159 { 1160 switch (opindex) 1161 { 1162 case IQ2000_OPERAND__INDEX : 1163 fields->f_index = value; 1164 break; 1165 case IQ2000_OPERAND_BASE : 1166 fields->f_rs = value; 1167 break; 1168 case IQ2000_OPERAND_BASEOFF : 1169 fields->f_imm = value; 1170 break; 1171 case IQ2000_OPERAND_BITNUM : 1172 fields->f_rt = value; 1173 break; 1174 case IQ2000_OPERAND_BYTECOUNT : 1175 fields->f_bytecount = value; 1176 break; 1177 case IQ2000_OPERAND_CAM_Y : 1178 fields->f_cam_y = value; 1179 break; 1180 case IQ2000_OPERAND_CAM_Z : 1181 fields->f_cam_z = value; 1182 break; 1183 case IQ2000_OPERAND_CM_3FUNC : 1184 fields->f_cm_3func = value; 1185 break; 1186 case IQ2000_OPERAND_CM_3Z : 1187 fields->f_cm_3z = value; 1188 break; 1189 case IQ2000_OPERAND_CM_4FUNC : 1190 fields->f_cm_4func = value; 1191 break; 1192 case IQ2000_OPERAND_CM_4Z : 1193 fields->f_cm_4z = value; 1194 break; 1195 case IQ2000_OPERAND_COUNT : 1196 fields->f_count = value; 1197 break; 1198 case IQ2000_OPERAND_EXECODE : 1199 fields->f_excode = value; 1200 break; 1201 case IQ2000_OPERAND_HI16 : 1202 fields->f_imm = value; 1203 break; 1204 case IQ2000_OPERAND_IMM : 1205 fields->f_imm = value; 1206 break; 1207 case IQ2000_OPERAND_JMPTARG : 1208 fields->f_jtarg = value; 1209 break; 1210 case IQ2000_OPERAND_JMPTARGQ10 : 1211 fields->f_jtargq10 = value; 1212 break; 1213 case IQ2000_OPERAND_LO16 : 1214 fields->f_imm = value; 1215 break; 1216 case IQ2000_OPERAND_MASK : 1217 fields->f_mask = value; 1218 break; 1219 case IQ2000_OPERAND_MASKL : 1220 fields->f_maskl = value; 1221 break; 1222 case IQ2000_OPERAND_MASKQ10 : 1223 fields->f_maskq10 = value; 1224 break; 1225 case IQ2000_OPERAND_MASKR : 1226 fields->f_rs = value; 1227 break; 1228 case IQ2000_OPERAND_MLO16 : 1229 fields->f_imm = value; 1230 break; 1231 case IQ2000_OPERAND_OFFSET : 1232 fields->f_offset = value; 1233 break; 1234 case IQ2000_OPERAND_RD : 1235 fields->f_rd = value; 1236 break; 1237 case IQ2000_OPERAND_RD_RS : 1238 fields->f_rd_rs = value; 1239 break; 1240 case IQ2000_OPERAND_RD_RT : 1241 fields->f_rd_rt = value; 1242 break; 1243 case IQ2000_OPERAND_RS : 1244 fields->f_rs = value; 1245 break; 1246 case IQ2000_OPERAND_RT : 1247 fields->f_rt = value; 1248 break; 1249 case IQ2000_OPERAND_RT_RS : 1250 fields->f_rt_rs = value; 1251 break; 1252 case IQ2000_OPERAND_SHAMT : 1253 fields->f_shamt = value; 1254 break; 1255 1256 default : 1257 /* xgettext:c-format */ 1258 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1259 opindex); 1260 abort (); 1261 } 1262 } 1263 1264 void 1265 iq2000_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1266 int opindex, 1267 CGEN_FIELDS * fields, 1268 bfd_vma value) 1269 { 1270 switch (opindex) 1271 { 1272 case IQ2000_OPERAND__INDEX : 1273 fields->f_index = value; 1274 break; 1275 case IQ2000_OPERAND_BASE : 1276 fields->f_rs = value; 1277 break; 1278 case IQ2000_OPERAND_BASEOFF : 1279 fields->f_imm = value; 1280 break; 1281 case IQ2000_OPERAND_BITNUM : 1282 fields->f_rt = value; 1283 break; 1284 case IQ2000_OPERAND_BYTECOUNT : 1285 fields->f_bytecount = value; 1286 break; 1287 case IQ2000_OPERAND_CAM_Y : 1288 fields->f_cam_y = value; 1289 break; 1290 case IQ2000_OPERAND_CAM_Z : 1291 fields->f_cam_z = value; 1292 break; 1293 case IQ2000_OPERAND_CM_3FUNC : 1294 fields->f_cm_3func = value; 1295 break; 1296 case IQ2000_OPERAND_CM_3Z : 1297 fields->f_cm_3z = value; 1298 break; 1299 case IQ2000_OPERAND_CM_4FUNC : 1300 fields->f_cm_4func = value; 1301 break; 1302 case IQ2000_OPERAND_CM_4Z : 1303 fields->f_cm_4z = value; 1304 break; 1305 case IQ2000_OPERAND_COUNT : 1306 fields->f_count = value; 1307 break; 1308 case IQ2000_OPERAND_EXECODE : 1309 fields->f_excode = value; 1310 break; 1311 case IQ2000_OPERAND_HI16 : 1312 fields->f_imm = value; 1313 break; 1314 case IQ2000_OPERAND_IMM : 1315 fields->f_imm = value; 1316 break; 1317 case IQ2000_OPERAND_JMPTARG : 1318 fields->f_jtarg = value; 1319 break; 1320 case IQ2000_OPERAND_JMPTARGQ10 : 1321 fields->f_jtargq10 = value; 1322 break; 1323 case IQ2000_OPERAND_LO16 : 1324 fields->f_imm = value; 1325 break; 1326 case IQ2000_OPERAND_MASK : 1327 fields->f_mask = value; 1328 break; 1329 case IQ2000_OPERAND_MASKL : 1330 fields->f_maskl = value; 1331 break; 1332 case IQ2000_OPERAND_MASKQ10 : 1333 fields->f_maskq10 = value; 1334 break; 1335 case IQ2000_OPERAND_MASKR : 1336 fields->f_rs = value; 1337 break; 1338 case IQ2000_OPERAND_MLO16 : 1339 fields->f_imm = value; 1340 break; 1341 case IQ2000_OPERAND_OFFSET : 1342 fields->f_offset = value; 1343 break; 1344 case IQ2000_OPERAND_RD : 1345 fields->f_rd = value; 1346 break; 1347 case IQ2000_OPERAND_RD_RS : 1348 fields->f_rd_rs = value; 1349 break; 1350 case IQ2000_OPERAND_RD_RT : 1351 fields->f_rd_rt = value; 1352 break; 1353 case IQ2000_OPERAND_RS : 1354 fields->f_rs = value; 1355 break; 1356 case IQ2000_OPERAND_RT : 1357 fields->f_rt = value; 1358 break; 1359 case IQ2000_OPERAND_RT_RS : 1360 fields->f_rt_rs = value; 1361 break; 1362 case IQ2000_OPERAND_SHAMT : 1363 fields->f_shamt = value; 1364 break; 1365 1366 default : 1367 /* xgettext:c-format */ 1368 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1369 opindex); 1370 abort (); 1371 } 1372 } 1373 1374 /* Function to call before using the instruction builder tables. */ 1375 1376 void 1377 iq2000_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1378 { 1379 cd->insert_handlers = & iq2000_cgen_insert_handlers[0]; 1380 cd->extract_handlers = & iq2000_cgen_extract_handlers[0]; 1381 1382 cd->insert_operand = iq2000_cgen_insert_operand; 1383 cd->extract_operand = iq2000_cgen_extract_operand; 1384 1385 cd->get_int_operand = iq2000_cgen_get_int_operand; 1386 cd->set_int_operand = iq2000_cgen_set_int_operand; 1387 cd->get_vma_operand = iq2000_cgen_get_vma_operand; 1388 cd->set_vma_operand = iq2000_cgen_set_vma_operand; 1389 } 1390
