1 /* Instruction building/extraction support for m32c. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2016 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "m32c-desc.h" 34 #include "m32c-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift_within_word, shift_to_word, shift; 212 213 /* How to shift the value to BIT0 of the word. */ 214 shift_to_word = total_length - (word_offset + word_length); 215 216 /* How to shift the value to the field within the word. */ 217 if (CGEN_INSN_LSB0_P) 218 shift_within_word = start + 1 - length; 219 else 220 shift_within_word = word_length - start - length; 221 222 /* The total SHIFT, then mask in the value. */ 223 shift = shift_to_word + shift_within_word; 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 225 } 226 227 #else /* ! CGEN_INT_INSN_P */ 228 229 { 230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 231 232 insert_1 (cd, value, start, length, word_length, bufp); 233 } 234 235 #endif /* ! CGEN_INT_INSN_P */ 236 237 return NULL; 238 } 239 240 /* Default insn builder (insert handler). 241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 243 recorded in host byte order, otherwise BUFFER is an array of bytes 244 and the value is recorded in target byte order). 245 The result is an error message or NULL if success. */ 246 247 static const char * 248 insert_insn_normal (CGEN_CPU_DESC cd, 249 const CGEN_INSN * insn, 250 CGEN_FIELDS * fields, 251 CGEN_INSN_BYTES_PTR buffer, 252 bfd_vma pc) 253 { 254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 255 unsigned long value; 256 const CGEN_SYNTAX_CHAR_TYPE * syn; 257 258 CGEN_INIT_INSERT (cd); 259 value = CGEN_INSN_BASE_VALUE (insn); 260 261 /* If we're recording insns as numbers (rather than a string of bytes), 262 target byte order handling is deferred until later. */ 263 264 #if CGEN_INT_INSN_P 265 266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 267 CGEN_FIELDS_BITSIZE (fields), value); 268 269 #else 270 271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 272 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 273 value); 274 275 #endif /* ! CGEN_INT_INSN_P */ 276 277 /* ??? It would be better to scan the format's fields. 278 Still need to be able to insert a value based on the operand though; 279 e.g. storing a branch displacement that got resolved later. 280 Needs more thought first. */ 281 282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 283 { 284 const char *errmsg; 285 286 if (CGEN_SYNTAX_CHAR_P (* syn)) 287 continue; 288 289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 290 fields, buffer, pc); 291 if (errmsg) 292 return errmsg; 293 } 294 295 return NULL; 296 } 297 298 #if CGEN_INT_INSN_P 299 /* Cover function to store an insn value into an integral insn. Must go here 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 301 302 static void 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 304 CGEN_INSN_BYTES_PTR buf, 305 int length, 306 int insn_length, 307 CGEN_INSN_INT value) 308 { 309 /* For architectures with insns smaller than the base-insn-bitsize, 310 length may be too big. */ 311 if (length > insn_length) 312 *buf = value; 313 else 314 { 315 int shift = insn_length - length; 316 /* Written this way to avoid undefined behaviour. */ 317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 318 319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 320 } 321 } 322 #endif 323 324 /* Operand extraction. */ 326 327 #if ! CGEN_INT_INSN_P 328 329 /* Subroutine of extract_normal. 330 Ensure sufficient bytes are cached in EX_INFO. 331 OFFSET is the offset in bytes from the start of the insn of the value. 332 BYTES is the length of the needed value. 333 Returns 1 for success, 0 for failure. */ 334 335 static CGEN_INLINE int 336 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 CGEN_EXTRACT_INFO *ex_info, 338 int offset, 339 int bytes, 340 bfd_vma pc) 341 { 342 /* It's doubtful that the middle part has already been fetched so 343 we don't optimize that case. kiss. */ 344 unsigned int mask; 345 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 346 347 /* First do a quick check. */ 348 mask = (1 << bytes) - 1; 349 if (((ex_info->valid >> offset) & mask) == mask) 350 return 1; 351 352 /* Search for the first byte we need to read. */ 353 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 354 if (! (mask & ex_info->valid)) 355 break; 356 357 if (bytes) 358 { 359 int status; 360 361 pc += offset; 362 status = (*info->read_memory_func) 363 (pc, ex_info->insn_bytes + offset, bytes, info); 364 365 if (status != 0) 366 { 367 (*info->memory_error_func) (status, pc, info); 368 return 0; 369 } 370 371 ex_info->valid |= ((1 << bytes) - 1) << offset; 372 } 373 374 return 1; 375 } 376 377 /* Subroutine of extract_normal. */ 378 379 static CGEN_INLINE long 380 extract_1 (CGEN_CPU_DESC cd, 381 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 382 int start, 383 int length, 384 int word_length, 385 unsigned char *bufp, 386 bfd_vma pc ATTRIBUTE_UNUSED) 387 { 388 unsigned long x; 389 int shift; 390 391 x = cgen_get_insn_value (cd, bufp, word_length); 392 393 if (CGEN_INSN_LSB0_P) 394 shift = (start + 1) - length; 395 else 396 shift = (word_length - (start + length)); 397 return x >> shift; 398 } 399 400 #endif /* ! CGEN_INT_INSN_P */ 401 402 /* Default extraction routine. 403 404 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 405 or sometimes less for cases like the m32r where the base insn size is 32 406 but some insns are 16 bits. 407 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 408 but for generality we take a bitmask of all of them. 409 WORD_OFFSET is the offset in bits from the start of the insn of the value. 410 WORD_LENGTH is the length of the word in bits in which the value resides. 411 START is the starting bit number in the word, architecture origin. 412 LENGTH is the length of VALUE in bits. 413 TOTAL_LENGTH is the total length of the insn in bits. 414 415 Returns 1 for success, 0 for failure. */ 416 417 /* ??? The return code isn't properly used. wip. */ 418 419 /* ??? This doesn't handle bfd_vma's. Create another function when 420 necessary. */ 421 422 static int 423 extract_normal (CGEN_CPU_DESC cd, 424 #if ! CGEN_INT_INSN_P 425 CGEN_EXTRACT_INFO *ex_info, 426 #else 427 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 428 #endif 429 CGEN_INSN_INT insn_value, 430 unsigned int attrs, 431 unsigned int word_offset, 432 unsigned int start, 433 unsigned int length, 434 unsigned int word_length, 435 unsigned int total_length, 436 #if ! CGEN_INT_INSN_P 437 bfd_vma pc, 438 #else 439 bfd_vma pc ATTRIBUTE_UNUSED, 440 #endif 441 long *valuep) 442 { 443 long value, mask; 444 445 /* If LENGTH is zero, this operand doesn't contribute to the value 446 so give it a standard value of zero. */ 447 if (length == 0) 448 { 449 *valuep = 0; 450 return 1; 451 } 452 453 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 454 abort (); 455 456 /* For architectures with insns smaller than the insn-base-bitsize, 457 word_length may be too big. */ 458 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 459 { 460 if (word_offset + word_length > total_length) 461 word_length = total_length - word_offset; 462 } 463 464 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 465 466 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 467 { 468 if (CGEN_INSN_LSB0_P) 469 value = insn_value >> ((word_offset + start + 1) - length); 470 else 471 value = insn_value >> (total_length - ( word_offset + start + length)); 472 } 473 474 #if ! CGEN_INT_INSN_P 475 476 else 477 { 478 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 479 480 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 481 abort (); 482 483 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 484 return 0; 485 486 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 487 } 488 489 #endif /* ! CGEN_INT_INSN_P */ 490 491 /* Written this way to avoid undefined behaviour. */ 492 mask = (((1L << (length - 1)) - 1) << 1) | 1; 493 494 value &= mask; 495 /* sign extend? */ 496 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 497 && (value & (1L << (length - 1)))) 498 value |= ~mask; 499 500 *valuep = value; 501 502 return 1; 503 } 504 505 /* Default insn extractor. 506 507 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 508 The extracted fields are stored in FIELDS. 509 EX_INFO is used to handle reading variable length insns. 510 Return the length of the insn in bits, or 0 if no match, 511 or -1 if an error occurs fetching data (memory_error_func will have 512 been called). */ 513 514 static int 515 extract_insn_normal (CGEN_CPU_DESC cd, 516 const CGEN_INSN *insn, 517 CGEN_EXTRACT_INFO *ex_info, 518 CGEN_INSN_INT insn_value, 519 CGEN_FIELDS *fields, 520 bfd_vma pc) 521 { 522 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 523 const CGEN_SYNTAX_CHAR_TYPE *syn; 524 525 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 526 527 CGEN_INIT_EXTRACT (cd); 528 529 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 530 { 531 int length; 532 533 if (CGEN_SYNTAX_CHAR_P (*syn)) 534 continue; 535 536 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 537 ex_info, insn_value, fields, pc); 538 if (length <= 0) 539 return length; 540 } 541 542 /* We recognized and successfully extracted this insn. */ 543 return CGEN_INSN_BITSIZE (insn); 544 } 545 546 /* Machine generated code added here. */ 548 549 const char * m32c_cgen_insert_operand 550 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 551 552 /* Main entry point for operand insertion. 553 554 This function is basically just a big switch statement. Earlier versions 555 used tables to look up the function to use, but 556 - if the table contains both assembler and disassembler functions then 557 the disassembler contains much of the assembler and vice-versa, 558 - there's a lot of inlining possibilities as things grow, 559 - using a switch statement avoids the function call overhead. 560 561 This function could be moved into `parse_insn_normal', but keeping it 562 separate makes clear the interface between `parse_insn_normal' and each of 563 the handlers. It's also needed by GAS to insert operands that couldn't be 564 resolved during parsing. */ 565 566 const char * 567 m32c_cgen_insert_operand (CGEN_CPU_DESC cd, 568 int opindex, 569 CGEN_FIELDS * fields, 570 CGEN_INSN_BYTES_PTR buffer, 571 bfd_vma pc ATTRIBUTE_UNUSED) 572 { 573 const char * errmsg = NULL; 574 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 575 576 switch (opindex) 577 { 578 case M32C_OPERAND_A0 : 579 break; 580 case M32C_OPERAND_A1 : 581 break; 582 case M32C_OPERAND_AN16_PUSH_S : 583 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); 584 break; 585 case M32C_OPERAND_BIT16AN : 586 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 587 break; 588 case M32C_OPERAND_BIT16RN : 589 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 590 break; 591 case M32C_OPERAND_BIT3_S : 592 { 593 { 594 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); 595 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); 596 } 597 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 598 if (errmsg) 599 break; 600 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 601 if (errmsg) 602 break; 603 } 604 break; 605 case M32C_OPERAND_BIT32ANPREFIXED : 606 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 607 break; 608 case M32C_OPERAND_BIT32ANUNPREFIXED : 609 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 610 break; 611 case M32C_OPERAND_BIT32RNPREFIXED : 612 { 613 long value = fields->f_dst32_rn_prefixed_QI; 614 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 615 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 616 } 617 break; 618 case M32C_OPERAND_BIT32RNUNPREFIXED : 619 { 620 long value = fields->f_dst32_rn_unprefixed_QI; 621 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 622 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 623 } 624 break; 625 case M32C_OPERAND_BITBASE16_16_S8 : 626 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 627 break; 628 case M32C_OPERAND_BITBASE16_16_U16 : 629 { 630 long value = fields->f_dsp_16_u16; 631 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 632 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 633 } 634 break; 635 case M32C_OPERAND_BITBASE16_16_U8 : 636 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 637 break; 638 case M32C_OPERAND_BITBASE16_8_U11_S : 639 { 640 { 641 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7)); 642 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); 643 } 644 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer); 645 if (errmsg) 646 break; 647 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); 648 if (errmsg) 649 break; 650 } 651 break; 652 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 653 { 654 { 655 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7)); 656 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3)); 657 } 658 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 659 if (errmsg) 660 break; 661 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 662 if (errmsg) 663 break; 664 } 665 break; 666 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 667 { 668 { 669 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7)); 670 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3)); 671 } 672 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 673 if (errmsg) 674 break; 675 { 676 long value = fields->f_dsp_16_s16; 677 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 678 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 679 } 680 if (errmsg) 681 break; 682 } 683 break; 684 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 685 { 686 { 687 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7)); 688 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); 689 } 690 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 691 if (errmsg) 692 break; 693 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 694 if (errmsg) 695 break; 696 } 697 break; 698 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 699 { 700 { 701 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7)); 702 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); 703 } 704 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 705 if (errmsg) 706 break; 707 { 708 long value = fields->f_dsp_16_u16; 709 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 710 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 711 } 712 if (errmsg) 713 break; 714 } 715 break; 716 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 717 { 718 { 719 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7)); 720 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); 721 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); 722 } 723 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 724 if (errmsg) 725 break; 726 { 727 long value = fields->f_dsp_16_u16; 728 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 729 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 730 } 731 if (errmsg) 732 break; 733 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 734 if (errmsg) 735 break; 736 } 737 break; 738 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 739 { 740 { 741 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7)); 742 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3)); 743 } 744 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 745 if (errmsg) 746 break; 747 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 748 if (errmsg) 749 break; 750 } 751 break; 752 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 753 { 754 { 755 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7)); 756 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); 757 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11)); 758 } 759 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 760 if (errmsg) 761 break; 762 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 763 if (errmsg) 764 break; 765 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 766 if (errmsg) 767 break; 768 } 769 break; 770 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 771 { 772 { 773 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7)); 774 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); 775 } 776 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 777 if (errmsg) 778 break; 779 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 780 if (errmsg) 781 break; 782 } 783 break; 784 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 785 { 786 { 787 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7)); 788 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); 789 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255)); 790 } 791 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 792 if (errmsg) 793 break; 794 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 795 if (errmsg) 796 break; 797 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 798 if (errmsg) 799 break; 800 } 801 break; 802 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 803 { 804 { 805 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7)); 806 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255)); 807 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535)); 808 } 809 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 810 if (errmsg) 811 break; 812 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 813 if (errmsg) 814 break; 815 { 816 long value = fields->f_dsp_32_u16; 817 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 818 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 819 } 820 if (errmsg) 821 break; 822 } 823 break; 824 case M32C_OPERAND_BITNO16R : 825 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 826 break; 827 case M32C_OPERAND_BITNO32PREFIXED : 828 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer); 829 break; 830 case M32C_OPERAND_BITNO32UNPREFIXED : 831 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer); 832 break; 833 case M32C_OPERAND_DSP_10_U6 : 834 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer); 835 break; 836 case M32C_OPERAND_DSP_16_S16 : 837 { 838 long value = fields->f_dsp_16_s16; 839 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 840 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 841 } 842 break; 843 case M32C_OPERAND_DSP_16_S8 : 844 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 845 break; 846 case M32C_OPERAND_DSP_16_U16 : 847 { 848 long value = fields->f_dsp_16_u16; 849 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 850 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 851 } 852 break; 853 case M32C_OPERAND_DSP_16_U20 : 854 { 855 { 856 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); 857 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); 858 } 859 { 860 long value = fields->f_dsp_16_u16; 861 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 862 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 863 } 864 if (errmsg) 865 break; 866 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 867 if (errmsg) 868 break; 869 } 870 break; 871 case M32C_OPERAND_DSP_16_U24 : 872 { 873 { 874 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535)); 875 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255)); 876 } 877 { 878 long value = fields->f_dsp_16_u16; 879 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 880 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 881 } 882 if (errmsg) 883 break; 884 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 885 if (errmsg) 886 break; 887 } 888 break; 889 case M32C_OPERAND_DSP_16_U8 : 890 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 891 break; 892 case M32C_OPERAND_DSP_24_S16 : 893 { 894 { 895 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); 896 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); 897 } 898 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 899 if (errmsg) 900 break; 901 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 902 if (errmsg) 903 break; 904 } 905 break; 906 case M32C_OPERAND_DSP_24_S8 : 907 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 908 break; 909 case M32C_OPERAND_DSP_24_U16 : 910 { 911 { 912 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255)); 913 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255)); 914 } 915 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 916 if (errmsg) 917 break; 918 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 919 if (errmsg) 920 break; 921 } 922 break; 923 case M32C_OPERAND_DSP_24_U20 : 924 { 925 { 926 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); 927 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); 928 } 929 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 930 if (errmsg) 931 break; 932 { 933 long value = fields->f_dsp_32_u16; 934 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 935 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 936 } 937 if (errmsg) 938 break; 939 } 940 break; 941 case M32C_OPERAND_DSP_24_U24 : 942 { 943 { 944 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255)); 945 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535)); 946 } 947 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 948 if (errmsg) 949 break; 950 { 951 long value = fields->f_dsp_32_u16; 952 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 953 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 954 } 955 if (errmsg) 956 break; 957 } 958 break; 959 case M32C_OPERAND_DSP_24_U8 : 960 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 961 break; 962 case M32C_OPERAND_DSP_32_S16 : 963 { 964 long value = fields->f_dsp_32_s16; 965 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 966 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); 967 } 968 break; 969 case M32C_OPERAND_DSP_32_S8 : 970 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 971 break; 972 case M32C_OPERAND_DSP_32_U16 : 973 { 974 long value = fields->f_dsp_32_u16; 975 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 976 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 977 } 978 break; 979 case M32C_OPERAND_DSP_32_U20 : 980 { 981 long value = fields->f_dsp_32_u24; 982 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 983 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 984 } 985 break; 986 case M32C_OPERAND_DSP_32_U24 : 987 { 988 long value = fields->f_dsp_32_u24; 989 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 990 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 991 } 992 break; 993 case M32C_OPERAND_DSP_32_U8 : 994 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 995 break; 996 case M32C_OPERAND_DSP_40_S16 : 997 { 998 long value = fields->f_dsp_40_s16; 999 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1000 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); 1001 } 1002 break; 1003 case M32C_OPERAND_DSP_40_S8 : 1004 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); 1005 break; 1006 case M32C_OPERAND_DSP_40_U16 : 1007 { 1008 long value = fields->f_dsp_40_u16; 1009 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1010 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer); 1011 } 1012 break; 1013 case M32C_OPERAND_DSP_40_U20 : 1014 { 1015 long value = fields->f_dsp_40_u20; 1016 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); 1017 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer); 1018 } 1019 break; 1020 case M32C_OPERAND_DSP_40_U24 : 1021 { 1022 long value = fields->f_dsp_40_u24; 1023 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1024 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); 1025 } 1026 break; 1027 case M32C_OPERAND_DSP_40_U8 : 1028 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); 1029 break; 1030 case M32C_OPERAND_DSP_48_S16 : 1031 { 1032 long value = fields->f_dsp_48_s16; 1033 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1034 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); 1035 } 1036 break; 1037 case M32C_OPERAND_DSP_48_S8 : 1038 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); 1039 break; 1040 case M32C_OPERAND_DSP_48_U16 : 1041 { 1042 long value = fields->f_dsp_48_u16; 1043 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1044 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1045 } 1046 break; 1047 case M32C_OPERAND_DSP_48_U20 : 1048 { 1049 { 1050 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15)); 1051 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535)); 1052 } 1053 { 1054 long value = fields->f_dsp_48_u16; 1055 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1056 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1057 } 1058 if (errmsg) 1059 break; 1060 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1061 if (errmsg) 1062 break; 1063 } 1064 break; 1065 case M32C_OPERAND_DSP_48_U24 : 1066 { 1067 { 1068 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255)); 1069 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535)); 1070 } 1071 { 1072 long value = fields->f_dsp_48_u16; 1073 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1074 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1075 } 1076 if (errmsg) 1077 break; 1078 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1079 if (errmsg) 1080 break; 1081 } 1082 break; 1083 case M32C_OPERAND_DSP_48_U8 : 1084 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer); 1085 break; 1086 case M32C_OPERAND_DSP_8_S24 : 1087 { 1088 long value = fields->f_dsp_8_s24; 1089 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); 1090 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer); 1091 } 1092 break; 1093 case M32C_OPERAND_DSP_8_S8 : 1094 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); 1095 break; 1096 case M32C_OPERAND_DSP_8_U16 : 1097 { 1098 long value = fields->f_dsp_8_u16; 1099 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1100 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer); 1101 } 1102 break; 1103 case M32C_OPERAND_DSP_8_U24 : 1104 { 1105 long value = fields->f_dsp_8_u24; 1106 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 1107 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer); 1108 } 1109 break; 1110 case M32C_OPERAND_DSP_8_U6 : 1111 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer); 1112 break; 1113 case M32C_OPERAND_DSP_8_U8 : 1114 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer); 1115 break; 1116 case M32C_OPERAND_DST16AN : 1117 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1118 break; 1119 case M32C_OPERAND_DST16AN_S : 1120 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer); 1121 break; 1122 case M32C_OPERAND_DST16ANHI : 1123 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1124 break; 1125 case M32C_OPERAND_DST16ANQI : 1126 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1127 break; 1128 case M32C_OPERAND_DST16ANQI_S : 1129 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); 1130 break; 1131 case M32C_OPERAND_DST16ANSI : 1132 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer); 1133 break; 1134 case M32C_OPERAND_DST16RNEXTQI : 1135 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer); 1136 break; 1137 case M32C_OPERAND_DST16RNHI : 1138 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1139 break; 1140 case M32C_OPERAND_DST16RNQI : 1141 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1142 break; 1143 case M32C_OPERAND_DST16RNQI_S : 1144 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer); 1145 break; 1146 case M32C_OPERAND_DST16RNSI : 1147 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer); 1148 break; 1149 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1150 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1151 break; 1152 case M32C_OPERAND_DST32ANPREFIXED : 1153 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1154 break; 1155 case M32C_OPERAND_DST32ANPREFIXEDHI : 1156 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1157 break; 1158 case M32C_OPERAND_DST32ANPREFIXEDQI : 1159 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1160 break; 1161 case M32C_OPERAND_DST32ANPREFIXEDSI : 1162 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer); 1163 break; 1164 case M32C_OPERAND_DST32ANUNPREFIXED : 1165 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1166 break; 1167 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1168 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1169 break; 1170 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1171 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1172 break; 1173 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1174 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1175 break; 1176 case M32C_OPERAND_DST32R0HI_S : 1177 break; 1178 case M32C_OPERAND_DST32R0QI_S : 1179 break; 1180 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1181 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1182 break; 1183 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1184 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer); 1185 break; 1186 case M32C_OPERAND_DST32RNPREFIXEDHI : 1187 { 1188 long value = fields->f_dst32_rn_prefixed_HI; 1189 value = ((((value) + (2))) % (4)); 1190 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1191 } 1192 break; 1193 case M32C_OPERAND_DST32RNPREFIXEDQI : 1194 { 1195 long value = fields->f_dst32_rn_prefixed_QI; 1196 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1197 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1198 } 1199 break; 1200 case M32C_OPERAND_DST32RNPREFIXEDSI : 1201 { 1202 long value = fields->f_dst32_rn_prefixed_SI; 1203 value = ((value) + (2)); 1204 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer); 1205 } 1206 break; 1207 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1208 { 1209 long value = fields->f_dst32_rn_unprefixed_HI; 1210 value = ((((value) + (2))) % (4)); 1211 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1212 } 1213 break; 1214 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1215 { 1216 long value = fields->f_dst32_rn_unprefixed_QI; 1217 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1218 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1219 } 1220 break; 1221 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1222 { 1223 long value = fields->f_dst32_rn_unprefixed_SI; 1224 value = ((value) + (2)); 1225 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer); 1226 } 1227 break; 1228 case M32C_OPERAND_G : 1229 break; 1230 case M32C_OPERAND_IMM_12_S4 : 1231 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1232 break; 1233 case M32C_OPERAND_IMM_12_S4N : 1234 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1235 break; 1236 case M32C_OPERAND_IMM_13_U3 : 1237 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer); 1238 break; 1239 case M32C_OPERAND_IMM_16_HI : 1240 { 1241 long value = fields->f_dsp_16_s16; 1242 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1243 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); 1244 } 1245 break; 1246 case M32C_OPERAND_IMM_16_QI : 1247 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer); 1248 break; 1249 case M32C_OPERAND_IMM_16_SI : 1250 { 1251 { 1252 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535)); 1253 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535)); 1254 } 1255 { 1256 long value = fields->f_dsp_16_u16; 1257 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1258 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer); 1259 } 1260 if (errmsg) 1261 break; 1262 { 1263 long value = fields->f_dsp_32_u16; 1264 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1265 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer); 1266 } 1267 if (errmsg) 1268 break; 1269 } 1270 break; 1271 case M32C_OPERAND_IMM_20_S4 : 1272 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); 1273 break; 1274 case M32C_OPERAND_IMM_24_HI : 1275 { 1276 { 1277 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255)); 1278 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255)); 1279 } 1280 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1281 if (errmsg) 1282 break; 1283 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1284 if (errmsg) 1285 break; 1286 } 1287 break; 1288 case M32C_OPERAND_IMM_24_QI : 1289 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer); 1290 break; 1291 case M32C_OPERAND_IMM_24_SI : 1292 { 1293 { 1294 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215)); 1295 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255)); 1296 } 1297 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1298 if (errmsg) 1299 break; 1300 { 1301 long value = fields->f_dsp_32_u24; 1302 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1303 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer); 1304 } 1305 if (errmsg) 1306 break; 1307 } 1308 break; 1309 case M32C_OPERAND_IMM_32_HI : 1310 { 1311 long value = fields->f_dsp_32_s16; 1312 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1313 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer); 1314 } 1315 break; 1316 case M32C_OPERAND_IMM_32_QI : 1317 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer); 1318 break; 1319 case M32C_OPERAND_IMM_32_SI : 1320 { 1321 long value = fields->f_dsp_32_s32; 1322 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); 1323 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer); 1324 } 1325 break; 1326 case M32C_OPERAND_IMM_40_HI : 1327 { 1328 long value = fields->f_dsp_40_s16; 1329 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1330 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer); 1331 } 1332 break; 1333 case M32C_OPERAND_IMM_40_QI : 1334 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer); 1335 break; 1336 case M32C_OPERAND_IMM_40_SI : 1337 { 1338 { 1339 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255)); 1340 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215)); 1341 } 1342 { 1343 long value = fields->f_dsp_40_u24; 1344 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 1345 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer); 1346 } 1347 if (errmsg) 1348 break; 1349 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1350 if (errmsg) 1351 break; 1352 } 1353 break; 1354 case M32C_OPERAND_IMM_48_HI : 1355 { 1356 long value = fields->f_dsp_48_s16; 1357 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1358 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer); 1359 } 1360 break; 1361 case M32C_OPERAND_IMM_48_QI : 1362 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer); 1363 break; 1364 case M32C_OPERAND_IMM_48_SI : 1365 { 1366 { 1367 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535)); 1368 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535)); 1369 } 1370 { 1371 long value = fields->f_dsp_48_u16; 1372 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1373 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer); 1374 } 1375 if (errmsg) 1376 break; 1377 { 1378 long value = fields->f_dsp_64_u16; 1379 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1380 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer); 1381 } 1382 if (errmsg) 1383 break; 1384 } 1385 break; 1386 case M32C_OPERAND_IMM_56_HI : 1387 { 1388 { 1389 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255)); 1390 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255)); 1391 } 1392 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer); 1393 if (errmsg) 1394 break; 1395 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer); 1396 if (errmsg) 1397 break; 1398 } 1399 break; 1400 case M32C_OPERAND_IMM_56_QI : 1401 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer); 1402 break; 1403 case M32C_OPERAND_IMM_64_HI : 1404 { 1405 long value = fields->f_dsp_64_s16; 1406 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1407 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); 1408 } 1409 break; 1410 case M32C_OPERAND_IMM_8_HI : 1411 { 1412 long value = fields->f_dsp_8_s16; 1413 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1414 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer); 1415 } 1416 break; 1417 case M32C_OPERAND_IMM_8_QI : 1418 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); 1419 break; 1420 case M32C_OPERAND_IMM_8_S4 : 1421 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1422 break; 1423 case M32C_OPERAND_IMM_8_S4N : 1424 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1425 break; 1426 case M32C_OPERAND_IMM_SH_12_S4 : 1427 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer); 1428 break; 1429 case M32C_OPERAND_IMM_SH_20_S4 : 1430 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer); 1431 break; 1432 case M32C_OPERAND_IMM_SH_8_S4 : 1433 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer); 1434 break; 1435 case M32C_OPERAND_IMM1_S : 1436 { 1437 long value = fields->f_imm1_S; 1438 value = ((value) - (1)); 1439 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer); 1440 } 1441 break; 1442 case M32C_OPERAND_IMM3_S : 1443 { 1444 { 1445 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1)); 1446 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); 1447 } 1448 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 1449 if (errmsg) 1450 break; 1451 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1452 if (errmsg) 1453 break; 1454 } 1455 break; 1456 case M32C_OPERAND_LAB_16_8 : 1457 { 1458 long value = fields->f_lab_16_8; 1459 value = ((value) - (((pc) + (2)))); 1460 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer); 1461 } 1462 break; 1463 case M32C_OPERAND_LAB_24_8 : 1464 { 1465 long value = fields->f_lab_24_8; 1466 value = ((value) - (((pc) + (2)))); 1467 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer); 1468 } 1469 break; 1470 case M32C_OPERAND_LAB_32_8 : 1471 { 1472 long value = fields->f_lab_32_8; 1473 value = ((value) - (((pc) + (2)))); 1474 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer); 1475 } 1476 break; 1477 case M32C_OPERAND_LAB_40_8 : 1478 { 1479 long value = fields->f_lab_40_8; 1480 value = ((value) - (((pc) + (2)))); 1481 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer); 1482 } 1483 break; 1484 case M32C_OPERAND_LAB_5_3 : 1485 { 1486 long value = fields->f_lab_5_3; 1487 value = ((value) - (((pc) + (2)))); 1488 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer); 1489 } 1490 break; 1491 case M32C_OPERAND_LAB_8_16 : 1492 { 1493 long value = fields->f_lab_8_16; 1494 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); 1495 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); 1496 } 1497 break; 1498 case M32C_OPERAND_LAB_8_24 : 1499 { 1500 long value = fields->f_lab_8_24; 1501 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 1502 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer); 1503 } 1504 break; 1505 case M32C_OPERAND_LAB_8_8 : 1506 { 1507 long value = fields->f_lab_8_8; 1508 value = ((value) - (((pc) + (1)))); 1509 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer); 1510 } 1511 break; 1512 case M32C_OPERAND_LAB32_JMP_S : 1513 { 1514 { 1515 SI tmp_val; 1516 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2)); 1517 FLD (f_7_1) = ((tmp_val) & (1)); 1518 FLD (f_2_2) = ((USI) (tmp_val) >> (1)); 1519 } 1520 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer); 1521 if (errmsg) 1522 break; 1523 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1524 if (errmsg) 1525 break; 1526 } 1527 break; 1528 case M32C_OPERAND_Q : 1529 break; 1530 case M32C_OPERAND_R0 : 1531 break; 1532 case M32C_OPERAND_R0H : 1533 break; 1534 case M32C_OPERAND_R0L : 1535 break; 1536 case M32C_OPERAND_R1 : 1537 break; 1538 case M32C_OPERAND_R1R2R0 : 1539 break; 1540 case M32C_OPERAND_R2 : 1541 break; 1542 case M32C_OPERAND_R2R0 : 1543 break; 1544 case M32C_OPERAND_R3 : 1545 break; 1546 case M32C_OPERAND_R3R1 : 1547 break; 1548 case M32C_OPERAND_REGSETPOP : 1549 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); 1550 break; 1551 case M32C_OPERAND_REGSETPUSH : 1552 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer); 1553 break; 1554 case M32C_OPERAND_RN16_PUSH_S : 1555 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer); 1556 break; 1557 case M32C_OPERAND_S : 1558 break; 1559 case M32C_OPERAND_SRC16AN : 1560 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1561 break; 1562 case M32C_OPERAND_SRC16ANHI : 1563 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1564 break; 1565 case M32C_OPERAND_SRC16ANQI : 1566 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer); 1567 break; 1568 case M32C_OPERAND_SRC16RNHI : 1569 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); 1570 break; 1571 case M32C_OPERAND_SRC16RNQI : 1572 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer); 1573 break; 1574 case M32C_OPERAND_SRC32ANPREFIXED : 1575 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1576 break; 1577 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1578 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1579 break; 1580 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1581 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1582 break; 1583 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1584 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer); 1585 break; 1586 case M32C_OPERAND_SRC32ANUNPREFIXED : 1587 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1588 break; 1589 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1590 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1591 break; 1592 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1593 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1594 break; 1595 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1596 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer); 1597 break; 1598 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1599 { 1600 long value = fields->f_src32_rn_prefixed_HI; 1601 value = ((((value) + (2))) % (4)); 1602 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1603 } 1604 break; 1605 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1606 { 1607 long value = fields->f_src32_rn_prefixed_QI; 1608 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1609 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1610 } 1611 break; 1612 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1613 { 1614 long value = fields->f_src32_rn_prefixed_SI; 1615 value = ((value) + (2)); 1616 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer); 1617 } 1618 break; 1619 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1620 { 1621 long value = fields->f_src32_rn_unprefixed_HI; 1622 value = ((((value) + (2))) % (4)); 1623 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1624 } 1625 break; 1626 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1627 { 1628 long value = fields->f_src32_rn_unprefixed_QI; 1629 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1)))); 1630 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1631 } 1632 break; 1633 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1634 { 1635 long value = fields->f_src32_rn_unprefixed_SI; 1636 value = ((value) + (2)); 1637 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer); 1638 } 1639 break; 1640 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1641 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer); 1642 break; 1643 case M32C_OPERAND_X : 1644 break; 1645 case M32C_OPERAND_Z : 1646 break; 1647 case M32C_OPERAND_COND16_16 : 1648 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 1649 break; 1650 case M32C_OPERAND_COND16_24 : 1651 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1652 break; 1653 case M32C_OPERAND_COND16_32 : 1654 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1655 break; 1656 case M32C_OPERAND_COND16C : 1657 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1658 break; 1659 case M32C_OPERAND_COND16J : 1660 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1661 break; 1662 case M32C_OPERAND_COND16J5 : 1663 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer); 1664 break; 1665 case M32C_OPERAND_COND32 : 1666 { 1667 { 1668 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1)); 1669 FLD (f_13_3) = ((FLD (f_cond32)) & (7)); 1670 } 1671 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer); 1672 if (errmsg) 1673 break; 1674 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1675 if (errmsg) 1676 break; 1677 } 1678 break; 1679 case M32C_OPERAND_COND32_16 : 1680 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer); 1681 break; 1682 case M32C_OPERAND_COND32_24 : 1683 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer); 1684 break; 1685 case M32C_OPERAND_COND32_32 : 1686 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer); 1687 break; 1688 case M32C_OPERAND_COND32_40 : 1689 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer); 1690 break; 1691 case M32C_OPERAND_COND32J : 1692 { 1693 { 1694 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7)); 1695 FLD (f_7_1) = ((FLD (f_cond32j)) & (1)); 1696 } 1697 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer); 1698 if (errmsg) 1699 break; 1700 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer); 1701 if (errmsg) 1702 break; 1703 } 1704 break; 1705 case M32C_OPERAND_CR1_PREFIXED_32 : 1706 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); 1707 break; 1708 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1709 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1710 break; 1711 case M32C_OPERAND_CR16 : 1712 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); 1713 break; 1714 case M32C_OPERAND_CR2_32 : 1715 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1716 break; 1717 case M32C_OPERAND_CR3_PREFIXED_32 : 1718 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer); 1719 break; 1720 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1721 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1722 break; 1723 case M32C_OPERAND_FLAGS16 : 1724 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer); 1725 break; 1726 case M32C_OPERAND_FLAGS32 : 1727 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer); 1728 break; 1729 case M32C_OPERAND_SCCOND32 : 1730 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer); 1731 break; 1732 case M32C_OPERAND_SIZE : 1733 break; 1734 1735 default : 1736 /* xgettext:c-format */ 1737 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 1738 opindex); 1739 abort (); 1740 } 1741 1742 return errmsg; 1743 } 1744 1745 int m32c_cgen_extract_operand 1746 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 1747 1748 /* Main entry point for operand extraction. 1749 The result is <= 0 for error, >0 for success. 1750 ??? Actual values aren't well defined right now. 1751 1752 This function is basically just a big switch statement. Earlier versions 1753 used tables to look up the function to use, but 1754 - if the table contains both assembler and disassembler functions then 1755 the disassembler contains much of the assembler and vice-versa, 1756 - there's a lot of inlining possibilities as things grow, 1757 - using a switch statement avoids the function call overhead. 1758 1759 This function could be moved into `print_insn_normal', but keeping it 1760 separate makes clear the interface between `print_insn_normal' and each of 1761 the handlers. */ 1762 1763 int 1764 m32c_cgen_extract_operand (CGEN_CPU_DESC cd, 1765 int opindex, 1766 CGEN_EXTRACT_INFO *ex_info, 1767 CGEN_INSN_INT insn_value, 1768 CGEN_FIELDS * fields, 1769 bfd_vma pc) 1770 { 1771 /* Assume success (for those operands that are nops). */ 1772 int length = 1; 1773 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 1774 1775 switch (opindex) 1776 { 1777 case M32C_OPERAND_A0 : 1778 break; 1779 case M32C_OPERAND_A1 : 1780 break; 1781 case M32C_OPERAND_AN16_PUSH_S : 1782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); 1783 break; 1784 case M32C_OPERAND_BIT16AN : 1785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 1786 break; 1787 case M32C_OPERAND_BIT16RN : 1788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 1789 break; 1790 case M32C_OPERAND_BIT3_S : 1791 { 1792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 1793 if (length <= 0) break; 1794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 1795 if (length <= 0) break; 1796 { 1797 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); 1798 } 1799 } 1800 break; 1801 case M32C_OPERAND_BIT32ANPREFIXED : 1802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 1803 break; 1804 case M32C_OPERAND_BIT32ANUNPREFIXED : 1805 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 1806 break; 1807 case M32C_OPERAND_BIT32RNPREFIXED : 1808 { 1809 long value; 1810 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 1811 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 1812 fields->f_dst32_rn_prefixed_QI = value; 1813 } 1814 break; 1815 case M32C_OPERAND_BIT32RNUNPREFIXED : 1816 { 1817 long value; 1818 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 1819 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 1820 fields->f_dst32_rn_unprefixed_QI = value; 1821 } 1822 break; 1823 case M32C_OPERAND_BITBASE16_16_S8 : 1824 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 1825 break; 1826 case M32C_OPERAND_BITBASE16_16_U16 : 1827 { 1828 long value; 1829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1830 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1831 fields->f_dsp_16_u16 = value; 1832 } 1833 break; 1834 case M32C_OPERAND_BITBASE16_16_U8 : 1835 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1836 break; 1837 case M32C_OPERAND_BITBASE16_8_U11_S : 1838 { 1839 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S); 1840 if (length <= 0) break; 1841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); 1842 if (length <= 0) break; 1843 { 1844 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S))); 1845 } 1846 } 1847 break; 1848 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1849 { 1850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1851 if (length <= 0) break; 1852 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 1853 if (length <= 0) break; 1854 { 1855 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed))); 1856 } 1857 } 1858 break; 1859 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1860 { 1861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1862 if (length <= 0) break; 1863 { 1864 long value; 1865 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 1866 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 1867 fields->f_dsp_16_s16 = value; 1868 } 1869 if (length <= 0) break; 1870 { 1871 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed))); 1872 } 1873 } 1874 break; 1875 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1876 { 1877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1878 if (length <= 0) break; 1879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1880 if (length <= 0) break; 1881 { 1882 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed))); 1883 } 1884 } 1885 break; 1886 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1887 { 1888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1889 if (length <= 0) break; 1890 { 1891 long value; 1892 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1893 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1894 fields->f_dsp_16_u16 = value; 1895 } 1896 if (length <= 0) break; 1897 { 1898 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed))); 1899 } 1900 } 1901 break; 1902 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1903 { 1904 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1905 if (length <= 0) break; 1906 { 1907 long value; 1908 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 1909 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1910 fields->f_dsp_16_u16 = value; 1911 } 1912 if (length <= 0) break; 1913 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 1914 if (length <= 0) break; 1915 { 1916 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed))))); 1917 } 1918 } 1919 break; 1920 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1921 { 1922 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1923 if (length <= 0) break; 1924 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 1925 if (length <= 0) break; 1926 { 1927 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed))); 1928 } 1929 } 1930 break; 1931 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1932 { 1933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1934 if (length <= 0) break; 1935 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1936 if (length <= 0) break; 1937 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 1938 if (length <= 0) break; 1939 { 1940 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed))))); 1941 } 1942 } 1943 break; 1944 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1945 { 1946 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1947 if (length <= 0) break; 1948 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1949 if (length <= 0) break; 1950 { 1951 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed))); 1952 } 1953 } 1954 break; 1955 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1956 { 1957 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1958 if (length <= 0) break; 1959 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1960 if (length <= 0) break; 1961 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 1962 if (length <= 0) break; 1963 { 1964 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed))))); 1965 } 1966 } 1967 break; 1968 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1969 { 1970 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1971 if (length <= 0) break; 1972 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 1973 if (length <= 0) break; 1974 { 1975 long value; 1976 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 1977 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 1978 fields->f_dsp_32_u16 = value; 1979 } 1980 if (length <= 0) break; 1981 { 1982 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed))))); 1983 } 1984 } 1985 break; 1986 case M32C_OPERAND_BITNO16R : 1987 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 1988 break; 1989 case M32C_OPERAND_BITNO32PREFIXED : 1990 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed); 1991 break; 1992 case M32C_OPERAND_BITNO32UNPREFIXED : 1993 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed); 1994 break; 1995 case M32C_OPERAND_DSP_10_U6 : 1996 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6); 1997 break; 1998 case M32C_OPERAND_DSP_16_S16 : 1999 { 2000 long value; 2001 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 2002 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2003 fields->f_dsp_16_s16 = value; 2004 } 2005 break; 2006 case M32C_OPERAND_DSP_16_S8 : 2007 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 2008 break; 2009 case M32C_OPERAND_DSP_16_U16 : 2010 { 2011 long value; 2012 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2013 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2014 fields->f_dsp_16_u16 = value; 2015 } 2016 break; 2017 case M32C_OPERAND_DSP_16_U20 : 2018 { 2019 { 2020 long value; 2021 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2022 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2023 fields->f_dsp_16_u16 = value; 2024 } 2025 if (length <= 0) break; 2026 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2027 if (length <= 0) break; 2028 { 2029 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); 2030 } 2031 } 2032 break; 2033 case M32C_OPERAND_DSP_16_U24 : 2034 { 2035 { 2036 long value; 2037 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2038 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2039 fields->f_dsp_16_u16 = value; 2040 } 2041 if (length <= 0) break; 2042 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2043 if (length <= 0) break; 2044 { 2045 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16))); 2046 } 2047 } 2048 break; 2049 case M32C_OPERAND_DSP_16_U8 : 2050 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2051 break; 2052 case M32C_OPERAND_DSP_24_S16 : 2053 { 2054 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2055 if (length <= 0) break; 2056 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2057 if (length <= 0) break; 2058 { 2059 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); 2060 } 2061 } 2062 break; 2063 case M32C_OPERAND_DSP_24_S8 : 2064 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 2065 break; 2066 case M32C_OPERAND_DSP_24_U16 : 2067 { 2068 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2069 if (length <= 0) break; 2070 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2071 if (length <= 0) break; 2072 { 2073 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))); 2074 } 2075 } 2076 break; 2077 case M32C_OPERAND_DSP_24_U20 : 2078 { 2079 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2080 if (length <= 0) break; 2081 { 2082 long value; 2083 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2084 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2085 fields->f_dsp_32_u16 = value; 2086 } 2087 if (length <= 0) break; 2088 { 2089 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); 2090 } 2091 } 2092 break; 2093 case M32C_OPERAND_DSP_24_U24 : 2094 { 2095 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2096 if (length <= 0) break; 2097 { 2098 long value; 2099 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2100 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2101 fields->f_dsp_32_u16 = value; 2102 } 2103 if (length <= 0) break; 2104 { 2105 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8))); 2106 } 2107 } 2108 break; 2109 case M32C_OPERAND_DSP_24_U8 : 2110 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2111 break; 2112 case M32C_OPERAND_DSP_32_S16 : 2113 { 2114 long value; 2115 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); 2116 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2117 fields->f_dsp_32_s16 = value; 2118 } 2119 break; 2120 case M32C_OPERAND_DSP_32_S8 : 2121 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 2122 break; 2123 case M32C_OPERAND_DSP_32_U16 : 2124 { 2125 long value; 2126 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2127 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2128 fields->f_dsp_32_u16 = value; 2129 } 2130 break; 2131 case M32C_OPERAND_DSP_32_U20 : 2132 { 2133 long value; 2134 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2135 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2136 fields->f_dsp_32_u24 = value; 2137 } 2138 break; 2139 case M32C_OPERAND_DSP_32_U24 : 2140 { 2141 long value; 2142 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2143 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2144 fields->f_dsp_32_u24 = value; 2145 } 2146 break; 2147 case M32C_OPERAND_DSP_32_U8 : 2148 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2149 break; 2150 case M32C_OPERAND_DSP_40_S16 : 2151 { 2152 long value; 2153 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); 2154 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2155 fields->f_dsp_40_s16 = value; 2156 } 2157 break; 2158 case M32C_OPERAND_DSP_40_S8 : 2159 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); 2160 break; 2161 case M32C_OPERAND_DSP_40_U16 : 2162 { 2163 long value; 2164 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value); 2165 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2166 fields->f_dsp_40_u16 = value; 2167 } 2168 break; 2169 case M32C_OPERAND_DSP_40_U20 : 2170 { 2171 long value; 2172 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value); 2173 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040)))); 2174 fields->f_dsp_40_u20 = value; 2175 } 2176 break; 2177 case M32C_OPERAND_DSP_40_U24 : 2178 { 2179 long value; 2180 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); 2181 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2182 fields->f_dsp_40_u24 = value; 2183 } 2184 break; 2185 case M32C_OPERAND_DSP_40_U8 : 2186 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); 2187 break; 2188 case M32C_OPERAND_DSP_48_S16 : 2189 { 2190 long value; 2191 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); 2192 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2193 fields->f_dsp_48_s16 = value; 2194 } 2195 break; 2196 case M32C_OPERAND_DSP_48_S8 : 2197 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); 2198 break; 2199 case M32C_OPERAND_DSP_48_U16 : 2200 { 2201 long value; 2202 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2203 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2204 fields->f_dsp_48_u16 = value; 2205 } 2206 break; 2207 case M32C_OPERAND_DSP_48_U20 : 2208 { 2209 { 2210 long value; 2211 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2212 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2213 fields->f_dsp_48_u16 = value; 2214 } 2215 if (length <= 0) break; 2216 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2217 if (length <= 0) break; 2218 { 2219 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040)))); 2220 } 2221 } 2222 break; 2223 case M32C_OPERAND_DSP_48_U24 : 2224 { 2225 { 2226 long value; 2227 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2228 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2229 fields->f_dsp_48_u16 = value; 2230 } 2231 if (length <= 0) break; 2232 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2233 if (length <= 0) break; 2234 { 2235 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680)))); 2236 } 2237 } 2238 break; 2239 case M32C_OPERAND_DSP_48_U8 : 2240 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8); 2241 break; 2242 case M32C_OPERAND_DSP_8_S24 : 2243 { 2244 long value; 2245 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value); 2246 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16)))); 2247 fields->f_dsp_8_s24 = value; 2248 } 2249 break; 2250 case M32C_OPERAND_DSP_8_S8 : 2251 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); 2252 break; 2253 case M32C_OPERAND_DSP_8_U16 : 2254 { 2255 long value; 2256 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value); 2257 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2258 fields->f_dsp_8_u16 = value; 2259 } 2260 break; 2261 case M32C_OPERAND_DSP_8_U24 : 2262 { 2263 long value; 2264 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value); 2265 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 2266 fields->f_dsp_8_u24 = value; 2267 } 2268 break; 2269 case M32C_OPERAND_DSP_8_U6 : 2270 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6); 2271 break; 2272 case M32C_OPERAND_DSP_8_U8 : 2273 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8); 2274 break; 2275 case M32C_OPERAND_DST16AN : 2276 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2277 break; 2278 case M32C_OPERAND_DST16AN_S : 2279 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s); 2280 break; 2281 case M32C_OPERAND_DST16ANHI : 2282 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2283 break; 2284 case M32C_OPERAND_DST16ANQI : 2285 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2286 break; 2287 case M32C_OPERAND_DST16ANQI_S : 2288 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); 2289 break; 2290 case M32C_OPERAND_DST16ANSI : 2291 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an); 2292 break; 2293 case M32C_OPERAND_DST16RNEXTQI : 2294 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext); 2295 break; 2296 case M32C_OPERAND_DST16RNHI : 2297 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2298 break; 2299 case M32C_OPERAND_DST16RNQI : 2300 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2301 break; 2302 case M32C_OPERAND_DST16RNQI_S : 2303 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s); 2304 break; 2305 case M32C_OPERAND_DST16RNSI : 2306 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn); 2307 break; 2308 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 2309 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2310 break; 2311 case M32C_OPERAND_DST32ANPREFIXED : 2312 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2313 break; 2314 case M32C_OPERAND_DST32ANPREFIXEDHI : 2315 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2316 break; 2317 case M32C_OPERAND_DST32ANPREFIXEDQI : 2318 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2319 break; 2320 case M32C_OPERAND_DST32ANPREFIXEDSI : 2321 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed); 2322 break; 2323 case M32C_OPERAND_DST32ANUNPREFIXED : 2324 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2325 break; 2326 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 2327 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2328 break; 2329 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 2330 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2331 break; 2332 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 2333 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed); 2334 break; 2335 case M32C_OPERAND_DST32R0HI_S : 2336 break; 2337 case M32C_OPERAND_DST32R0QI_S : 2338 break; 2339 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 2340 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); 2341 break; 2342 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 2343 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed); 2344 break; 2345 case M32C_OPERAND_DST32RNPREFIXEDHI : 2346 { 2347 long value; 2348 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2349 value = ((((value) + (2))) % (4)); 2350 fields->f_dst32_rn_prefixed_HI = value; 2351 } 2352 break; 2353 case M32C_OPERAND_DST32RNPREFIXEDQI : 2354 { 2355 long value; 2356 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2357 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2358 fields->f_dst32_rn_prefixed_QI = value; 2359 } 2360 break; 2361 case M32C_OPERAND_DST32RNPREFIXEDSI : 2362 { 2363 long value; 2364 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value); 2365 value = ((value) - (2)); 2366 fields->f_dst32_rn_prefixed_SI = value; 2367 } 2368 break; 2369 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 2370 { 2371 long value; 2372 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2373 value = ((((value) + (2))) % (4)); 2374 fields->f_dst32_rn_unprefixed_HI = value; 2375 } 2376 break; 2377 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 2378 { 2379 long value; 2380 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2381 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2382 fields->f_dst32_rn_unprefixed_QI = value; 2383 } 2384 break; 2385 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 2386 { 2387 long value; 2388 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value); 2389 value = ((value) - (2)); 2390 fields->f_dst32_rn_unprefixed_SI = value; 2391 } 2392 break; 2393 case M32C_OPERAND_G : 2394 break; 2395 case M32C_OPERAND_IMM_12_S4 : 2396 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2397 break; 2398 case M32C_OPERAND_IMM_12_S4N : 2399 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2400 break; 2401 case M32C_OPERAND_IMM_13_U3 : 2402 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3); 2403 break; 2404 case M32C_OPERAND_IMM_16_HI : 2405 { 2406 long value; 2407 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value); 2408 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2409 fields->f_dsp_16_s16 = value; 2410 } 2411 break; 2412 case M32C_OPERAND_IMM_16_QI : 2413 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8); 2414 break; 2415 case M32C_OPERAND_IMM_16_SI : 2416 { 2417 { 2418 long value; 2419 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value); 2420 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2421 fields->f_dsp_16_u16 = value; 2422 } 2423 if (length <= 0) break; 2424 { 2425 long value; 2426 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value); 2427 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2428 fields->f_dsp_32_u16 = value; 2429 } 2430 if (length <= 0) break; 2431 { 2432 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000)))); 2433 } 2434 } 2435 break; 2436 case M32C_OPERAND_IMM_20_S4 : 2437 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); 2438 break; 2439 case M32C_OPERAND_IMM_24_HI : 2440 { 2441 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2442 if (length <= 0) break; 2443 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2444 if (length <= 0) break; 2445 { 2446 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)))))); 2447 } 2448 } 2449 break; 2450 case M32C_OPERAND_IMM_24_QI : 2451 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8); 2452 break; 2453 case M32C_OPERAND_IMM_24_SI : 2454 { 2455 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2456 if (length <= 0) break; 2457 { 2458 long value; 2459 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value); 2460 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2461 fields->f_dsp_32_u24 = value; 2462 } 2463 if (length <= 0) break; 2464 { 2465 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00)))); 2466 } 2467 } 2468 break; 2469 case M32C_OPERAND_IMM_32_HI : 2470 { 2471 long value; 2472 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value); 2473 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2474 fields->f_dsp_32_s16 = value; 2475 } 2476 break; 2477 case M32C_OPERAND_IMM_32_QI : 2478 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8); 2479 break; 2480 case M32C_OPERAND_IMM_32_SI : 2481 { 2482 long value; 2483 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value); 2484 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000))))))); 2485 fields->f_dsp_32_s32 = value; 2486 } 2487 break; 2488 case M32C_OPERAND_IMM_40_HI : 2489 { 2490 long value; 2491 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value); 2492 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2493 fields->f_dsp_40_s16 = value; 2494 } 2495 break; 2496 case M32C_OPERAND_IMM_40_QI : 2497 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8); 2498 break; 2499 case M32C_OPERAND_IMM_40_SI : 2500 { 2501 { 2502 long value; 2503 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value); 2504 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680)))); 2505 fields->f_dsp_40_u24 = value; 2506 } 2507 if (length <= 0) break; 2508 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2509 if (length <= 0) break; 2510 { 2511 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000)))); 2512 } 2513 } 2514 break; 2515 case M32C_OPERAND_IMM_48_HI : 2516 { 2517 long value; 2518 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value); 2519 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2520 fields->f_dsp_48_s16 = value; 2521 } 2522 break; 2523 case M32C_OPERAND_IMM_48_QI : 2524 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8); 2525 break; 2526 case M32C_OPERAND_IMM_48_SI : 2527 { 2528 { 2529 long value; 2530 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value); 2531 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2532 fields->f_dsp_48_u16 = value; 2533 } 2534 if (length <= 0) break; 2535 { 2536 long value; 2537 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value); 2538 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))); 2539 fields->f_dsp_64_u16 = value; 2540 } 2541 if (length <= 0) break; 2542 { 2543 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000)))); 2544 } 2545 } 2546 break; 2547 case M32C_OPERAND_IMM_56_HI : 2548 { 2549 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8); 2550 if (length <= 0) break; 2551 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8); 2552 if (length <= 0) break; 2553 { 2554 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8)))))); 2555 } 2556 } 2557 break; 2558 case M32C_OPERAND_IMM_56_QI : 2559 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8); 2560 break; 2561 case M32C_OPERAND_IMM_64_HI : 2562 { 2563 long value; 2564 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); 2565 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2566 fields->f_dsp_64_s16 = value; 2567 } 2568 break; 2569 case M32C_OPERAND_IMM_8_HI : 2570 { 2571 long value; 2572 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value); 2573 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); 2574 fields->f_dsp_8_s16 = value; 2575 } 2576 break; 2577 case M32C_OPERAND_IMM_8_QI : 2578 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8); 2579 break; 2580 case M32C_OPERAND_IMM_8_S4 : 2581 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2582 break; 2583 case M32C_OPERAND_IMM_8_S4N : 2584 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2585 break; 2586 case M32C_OPERAND_IMM_SH_12_S4 : 2587 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4); 2588 break; 2589 case M32C_OPERAND_IMM_SH_20_S4 : 2590 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4); 2591 break; 2592 case M32C_OPERAND_IMM_SH_8_S4 : 2593 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4); 2594 break; 2595 case M32C_OPERAND_IMM1_S : 2596 { 2597 long value; 2598 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value); 2599 value = ((value) + (1)); 2600 fields->f_imm1_S = value; 2601 } 2602 break; 2603 case M32C_OPERAND_IMM3_S : 2604 { 2605 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 2606 if (length <= 0) break; 2607 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2608 if (length <= 0) break; 2609 { 2610 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1)); 2611 } 2612 } 2613 break; 2614 case M32C_OPERAND_LAB_16_8 : 2615 { 2616 long value; 2617 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value); 2618 value = ((value) + (((pc) + (2)))); 2619 fields->f_lab_16_8 = value; 2620 } 2621 break; 2622 case M32C_OPERAND_LAB_24_8 : 2623 { 2624 long value; 2625 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value); 2626 value = ((value) + (((pc) + (2)))); 2627 fields->f_lab_24_8 = value; 2628 } 2629 break; 2630 case M32C_OPERAND_LAB_32_8 : 2631 { 2632 long value; 2633 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value); 2634 value = ((value) + (((pc) + (2)))); 2635 fields->f_lab_32_8 = value; 2636 } 2637 break; 2638 case M32C_OPERAND_LAB_40_8 : 2639 { 2640 long value; 2641 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value); 2642 value = ((value) + (((pc) + (2)))); 2643 fields->f_lab_40_8 = value; 2644 } 2645 break; 2646 case M32C_OPERAND_LAB_5_3 : 2647 { 2648 long value; 2649 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value); 2650 value = ((value) + (((pc) + (2)))); 2651 fields->f_lab_5_3 = value; 2652 } 2653 break; 2654 case M32C_OPERAND_LAB_8_16 : 2655 { 2656 long value; 2657 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); 2658 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); 2659 fields->f_lab_8_16 = value; 2660 } 2661 break; 2662 case M32C_OPERAND_LAB_8_24 : 2663 { 2664 long value; 2665 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value); 2666 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16)))); 2667 fields->f_lab_8_24 = value; 2668 } 2669 break; 2670 case M32C_OPERAND_LAB_8_8 : 2671 { 2672 long value; 2673 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); 2674 value = ((value) + (((pc) + (1)))); 2675 fields->f_lab_8_8 = value; 2676 } 2677 break; 2678 case M32C_OPERAND_LAB32_JMP_S : 2679 { 2680 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2); 2681 if (length <= 0) break; 2682 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2683 if (length <= 0) break; 2684 { 2685 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2)))); 2686 } 2687 } 2688 break; 2689 case M32C_OPERAND_Q : 2690 break; 2691 case M32C_OPERAND_R0 : 2692 break; 2693 case M32C_OPERAND_R0H : 2694 break; 2695 case M32C_OPERAND_R0L : 2696 break; 2697 case M32C_OPERAND_R1 : 2698 break; 2699 case M32C_OPERAND_R1R2R0 : 2700 break; 2701 case M32C_OPERAND_R2 : 2702 break; 2703 case M32C_OPERAND_R2R0 : 2704 break; 2705 case M32C_OPERAND_R3 : 2706 break; 2707 case M32C_OPERAND_R3R1 : 2708 break; 2709 case M32C_OPERAND_REGSETPOP : 2710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); 2711 break; 2712 case M32C_OPERAND_REGSETPUSH : 2713 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8); 2714 break; 2715 case M32C_OPERAND_RN16_PUSH_S : 2716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1); 2717 break; 2718 case M32C_OPERAND_S : 2719 break; 2720 case M32C_OPERAND_SRC16AN : 2721 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2722 break; 2723 case M32C_OPERAND_SRC16ANHI : 2724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2725 break; 2726 case M32C_OPERAND_SRC16ANQI : 2727 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an); 2728 break; 2729 case M32C_OPERAND_SRC16RNHI : 2730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); 2731 break; 2732 case M32C_OPERAND_SRC16RNQI : 2733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn); 2734 break; 2735 case M32C_OPERAND_SRC32ANPREFIXED : 2736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2737 break; 2738 case M32C_OPERAND_SRC32ANPREFIXEDHI : 2739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2740 break; 2741 case M32C_OPERAND_SRC32ANPREFIXEDQI : 2742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2743 break; 2744 case M32C_OPERAND_SRC32ANPREFIXEDSI : 2745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed); 2746 break; 2747 case M32C_OPERAND_SRC32ANUNPREFIXED : 2748 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2749 break; 2750 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 2751 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2752 break; 2753 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 2754 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2755 break; 2756 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 2757 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed); 2758 break; 2759 case M32C_OPERAND_SRC32RNPREFIXEDHI : 2760 { 2761 long value; 2762 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2763 value = ((((value) + (2))) % (4)); 2764 fields->f_src32_rn_prefixed_HI = value; 2765 } 2766 break; 2767 case M32C_OPERAND_SRC32RNPREFIXEDQI : 2768 { 2769 long value; 2770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2771 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2772 fields->f_src32_rn_prefixed_QI = value; 2773 } 2774 break; 2775 case M32C_OPERAND_SRC32RNPREFIXEDSI : 2776 { 2777 long value; 2778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value); 2779 value = ((value) - (2)); 2780 fields->f_src32_rn_prefixed_SI = value; 2781 } 2782 break; 2783 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 2784 { 2785 long value; 2786 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2787 value = ((((value) + (2))) % (4)); 2788 fields->f_src32_rn_unprefixed_HI = value; 2789 } 2790 break; 2791 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 2792 { 2793 long value; 2794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2795 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2)))); 2796 fields->f_src32_rn_unprefixed_QI = value; 2797 } 2798 break; 2799 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 2800 { 2801 long value; 2802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value); 2803 value = ((value) - (2)); 2804 fields->f_src32_rn_unprefixed_SI = value; 2805 } 2806 break; 2807 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 2808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1); 2809 break; 2810 case M32C_OPERAND_X : 2811 break; 2812 case M32C_OPERAND_Z : 2813 break; 2814 case M32C_OPERAND_COND16_16 : 2815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2816 break; 2817 case M32C_OPERAND_COND16_24 : 2818 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2819 break; 2820 case M32C_OPERAND_COND16_32 : 2821 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2822 break; 2823 case M32C_OPERAND_COND16C : 2824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2825 break; 2826 case M32C_OPERAND_COND16J : 2827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2828 break; 2829 case M32C_OPERAND_COND16J5 : 2830 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5); 2831 break; 2832 case M32C_OPERAND_COND32 : 2833 { 2834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1); 2835 if (length <= 0) break; 2836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2837 if (length <= 0) break; 2838 { 2839 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3))); 2840 } 2841 } 2842 break; 2843 case M32C_OPERAND_COND32_16 : 2844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8); 2845 break; 2846 case M32C_OPERAND_COND32_24 : 2847 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8); 2848 break; 2849 case M32C_OPERAND_COND32_32 : 2850 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8); 2851 break; 2852 case M32C_OPERAND_COND32_40 : 2853 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8); 2854 break; 2855 case M32C_OPERAND_COND32J : 2856 { 2857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3); 2858 if (length <= 0) break; 2859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1); 2860 if (length <= 0) break; 2861 { 2862 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1))); 2863 } 2864 } 2865 break; 2866 case M32C_OPERAND_CR1_PREFIXED_32 : 2867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); 2868 break; 2869 case M32C_OPERAND_CR1_UNPREFIXED_32 : 2870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2871 break; 2872 case M32C_OPERAND_CR16 : 2873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); 2874 break; 2875 case M32C_OPERAND_CR2_32 : 2876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2877 break; 2878 case M32C_OPERAND_CR3_PREFIXED_32 : 2879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3); 2880 break; 2881 case M32C_OPERAND_CR3_UNPREFIXED_32 : 2882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2883 break; 2884 case M32C_OPERAND_FLAGS16 : 2885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3); 2886 break; 2887 case M32C_OPERAND_FLAGS32 : 2888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3); 2889 break; 2890 case M32C_OPERAND_SCCOND32 : 2891 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16); 2892 break; 2893 case M32C_OPERAND_SIZE : 2894 break; 2895 2896 default : 2897 /* xgettext:c-format */ 2898 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 2899 opindex); 2900 abort (); 2901 } 2902 2903 return length; 2904 } 2905 2906 cgen_insert_fn * const m32c_cgen_insert_handlers[] = 2907 { 2908 insert_insn_normal, 2909 }; 2910 2911 cgen_extract_fn * const m32c_cgen_extract_handlers[] = 2912 { 2913 extract_insn_normal, 2914 }; 2915 2916 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 2917 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 2918 2919 /* Getting values from cgen_fields is handled by a collection of functions. 2920 They are distinguished by the type of the VALUE argument they return. 2921 TODO: floating point, inlining support, remove cases where result type 2922 not appropriate. */ 2923 2924 int 2925 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 2926 int opindex, 2927 const CGEN_FIELDS * fields) 2928 { 2929 int value; 2930 2931 switch (opindex) 2932 { 2933 case M32C_OPERAND_A0 : 2934 value = 0; 2935 break; 2936 case M32C_OPERAND_A1 : 2937 value = 0; 2938 break; 2939 case M32C_OPERAND_AN16_PUSH_S : 2940 value = fields->f_4_1; 2941 break; 2942 case M32C_OPERAND_BIT16AN : 2943 value = fields->f_dst16_an; 2944 break; 2945 case M32C_OPERAND_BIT16RN : 2946 value = fields->f_dst16_rn; 2947 break; 2948 case M32C_OPERAND_BIT3_S : 2949 value = fields->f_imm3_S; 2950 break; 2951 case M32C_OPERAND_BIT32ANPREFIXED : 2952 value = fields->f_dst32_an_prefixed; 2953 break; 2954 case M32C_OPERAND_BIT32ANUNPREFIXED : 2955 value = fields->f_dst32_an_unprefixed; 2956 break; 2957 case M32C_OPERAND_BIT32RNPREFIXED : 2958 value = fields->f_dst32_rn_prefixed_QI; 2959 break; 2960 case M32C_OPERAND_BIT32RNUNPREFIXED : 2961 value = fields->f_dst32_rn_unprefixed_QI; 2962 break; 2963 case M32C_OPERAND_BITBASE16_16_S8 : 2964 value = fields->f_dsp_16_s8; 2965 break; 2966 case M32C_OPERAND_BITBASE16_16_U16 : 2967 value = fields->f_dsp_16_u16; 2968 break; 2969 case M32C_OPERAND_BITBASE16_16_U8 : 2970 value = fields->f_dsp_16_u8; 2971 break; 2972 case M32C_OPERAND_BITBASE16_8_U11_S : 2973 value = fields->f_bitbase16_u11_S; 2974 break; 2975 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 2976 value = fields->f_bitbase32_16_s11_unprefixed; 2977 break; 2978 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 2979 value = fields->f_bitbase32_16_s19_unprefixed; 2980 break; 2981 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 2982 value = fields->f_bitbase32_16_u11_unprefixed; 2983 break; 2984 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 2985 value = fields->f_bitbase32_16_u19_unprefixed; 2986 break; 2987 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 2988 value = fields->f_bitbase32_16_u27_unprefixed; 2989 break; 2990 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 2991 value = fields->f_bitbase32_24_s11_prefixed; 2992 break; 2993 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 2994 value = fields->f_bitbase32_24_s19_prefixed; 2995 break; 2996 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 2997 value = fields->f_bitbase32_24_u11_prefixed; 2998 break; 2999 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 3000 value = fields->f_bitbase32_24_u19_prefixed; 3001 break; 3002 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 3003 value = fields->f_bitbase32_24_u27_prefixed; 3004 break; 3005 case M32C_OPERAND_BITNO16R : 3006 value = fields->f_dsp_16_u8; 3007 break; 3008 case M32C_OPERAND_BITNO32PREFIXED : 3009 value = fields->f_bitno32_prefixed; 3010 break; 3011 case M32C_OPERAND_BITNO32UNPREFIXED : 3012 value = fields->f_bitno32_unprefixed; 3013 break; 3014 case M32C_OPERAND_DSP_10_U6 : 3015 value = fields->f_dsp_10_u6; 3016 break; 3017 case M32C_OPERAND_DSP_16_S16 : 3018 value = fields->f_dsp_16_s16; 3019 break; 3020 case M32C_OPERAND_DSP_16_S8 : 3021 value = fields->f_dsp_16_s8; 3022 break; 3023 case M32C_OPERAND_DSP_16_U16 : 3024 value = fields->f_dsp_16_u16; 3025 break; 3026 case M32C_OPERAND_DSP_16_U20 : 3027 value = fields->f_dsp_16_u24; 3028 break; 3029 case M32C_OPERAND_DSP_16_U24 : 3030 value = fields->f_dsp_16_u24; 3031 break; 3032 case M32C_OPERAND_DSP_16_U8 : 3033 value = fields->f_dsp_16_u8; 3034 break; 3035 case M32C_OPERAND_DSP_24_S16 : 3036 value = fields->f_dsp_24_s16; 3037 break; 3038 case M32C_OPERAND_DSP_24_S8 : 3039 value = fields->f_dsp_24_s8; 3040 break; 3041 case M32C_OPERAND_DSP_24_U16 : 3042 value = fields->f_dsp_24_u16; 3043 break; 3044 case M32C_OPERAND_DSP_24_U20 : 3045 value = fields->f_dsp_24_u24; 3046 break; 3047 case M32C_OPERAND_DSP_24_U24 : 3048 value = fields->f_dsp_24_u24; 3049 break; 3050 case M32C_OPERAND_DSP_24_U8 : 3051 value = fields->f_dsp_24_u8; 3052 break; 3053 case M32C_OPERAND_DSP_32_S16 : 3054 value = fields->f_dsp_32_s16; 3055 break; 3056 case M32C_OPERAND_DSP_32_S8 : 3057 value = fields->f_dsp_32_s8; 3058 break; 3059 case M32C_OPERAND_DSP_32_U16 : 3060 value = fields->f_dsp_32_u16; 3061 break; 3062 case M32C_OPERAND_DSP_32_U20 : 3063 value = fields->f_dsp_32_u24; 3064 break; 3065 case M32C_OPERAND_DSP_32_U24 : 3066 value = fields->f_dsp_32_u24; 3067 break; 3068 case M32C_OPERAND_DSP_32_U8 : 3069 value = fields->f_dsp_32_u8; 3070 break; 3071 case M32C_OPERAND_DSP_40_S16 : 3072 value = fields->f_dsp_40_s16; 3073 break; 3074 case M32C_OPERAND_DSP_40_S8 : 3075 value = fields->f_dsp_40_s8; 3076 break; 3077 case M32C_OPERAND_DSP_40_U16 : 3078 value = fields->f_dsp_40_u16; 3079 break; 3080 case M32C_OPERAND_DSP_40_U20 : 3081 value = fields->f_dsp_40_u20; 3082 break; 3083 case M32C_OPERAND_DSP_40_U24 : 3084 value = fields->f_dsp_40_u24; 3085 break; 3086 case M32C_OPERAND_DSP_40_U8 : 3087 value = fields->f_dsp_40_u8; 3088 break; 3089 case M32C_OPERAND_DSP_48_S16 : 3090 value = fields->f_dsp_48_s16; 3091 break; 3092 case M32C_OPERAND_DSP_48_S8 : 3093 value = fields->f_dsp_48_s8; 3094 break; 3095 case M32C_OPERAND_DSP_48_U16 : 3096 value = fields->f_dsp_48_u16; 3097 break; 3098 case M32C_OPERAND_DSP_48_U20 : 3099 value = fields->f_dsp_48_u20; 3100 break; 3101 case M32C_OPERAND_DSP_48_U24 : 3102 value = fields->f_dsp_48_u24; 3103 break; 3104 case M32C_OPERAND_DSP_48_U8 : 3105 value = fields->f_dsp_48_u8; 3106 break; 3107 case M32C_OPERAND_DSP_8_S24 : 3108 value = fields->f_dsp_8_s24; 3109 break; 3110 case M32C_OPERAND_DSP_8_S8 : 3111 value = fields->f_dsp_8_s8; 3112 break; 3113 case M32C_OPERAND_DSP_8_U16 : 3114 value = fields->f_dsp_8_u16; 3115 break; 3116 case M32C_OPERAND_DSP_8_U24 : 3117 value = fields->f_dsp_8_u24; 3118 break; 3119 case M32C_OPERAND_DSP_8_U6 : 3120 value = fields->f_dsp_8_u6; 3121 break; 3122 case M32C_OPERAND_DSP_8_U8 : 3123 value = fields->f_dsp_8_u8; 3124 break; 3125 case M32C_OPERAND_DST16AN : 3126 value = fields->f_dst16_an; 3127 break; 3128 case M32C_OPERAND_DST16AN_S : 3129 value = fields->f_dst16_an_s; 3130 break; 3131 case M32C_OPERAND_DST16ANHI : 3132 value = fields->f_dst16_an; 3133 break; 3134 case M32C_OPERAND_DST16ANQI : 3135 value = fields->f_dst16_an; 3136 break; 3137 case M32C_OPERAND_DST16ANQI_S : 3138 value = fields->f_dst16_rn_QI_s; 3139 break; 3140 case M32C_OPERAND_DST16ANSI : 3141 value = fields->f_dst16_an; 3142 break; 3143 case M32C_OPERAND_DST16RNEXTQI : 3144 value = fields->f_dst16_rn_ext; 3145 break; 3146 case M32C_OPERAND_DST16RNHI : 3147 value = fields->f_dst16_rn; 3148 break; 3149 case M32C_OPERAND_DST16RNQI : 3150 value = fields->f_dst16_rn; 3151 break; 3152 case M32C_OPERAND_DST16RNQI_S : 3153 value = fields->f_dst16_rn_QI_s; 3154 break; 3155 case M32C_OPERAND_DST16RNSI : 3156 value = fields->f_dst16_rn; 3157 break; 3158 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 3159 value = fields->f_dst32_an_unprefixed; 3160 break; 3161 case M32C_OPERAND_DST32ANPREFIXED : 3162 value = fields->f_dst32_an_prefixed; 3163 break; 3164 case M32C_OPERAND_DST32ANPREFIXEDHI : 3165 value = fields->f_dst32_an_prefixed; 3166 break; 3167 case M32C_OPERAND_DST32ANPREFIXEDQI : 3168 value = fields->f_dst32_an_prefixed; 3169 break; 3170 case M32C_OPERAND_DST32ANPREFIXEDSI : 3171 value = fields->f_dst32_an_prefixed; 3172 break; 3173 case M32C_OPERAND_DST32ANUNPREFIXED : 3174 value = fields->f_dst32_an_unprefixed; 3175 break; 3176 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 3177 value = fields->f_dst32_an_unprefixed; 3178 break; 3179 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 3180 value = fields->f_dst32_an_unprefixed; 3181 break; 3182 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 3183 value = fields->f_dst32_an_unprefixed; 3184 break; 3185 case M32C_OPERAND_DST32R0HI_S : 3186 value = 0; 3187 break; 3188 case M32C_OPERAND_DST32R0QI_S : 3189 value = 0; 3190 break; 3191 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 3192 value = fields->f_dst32_rn_ext_unprefixed; 3193 break; 3194 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 3195 value = fields->f_dst32_rn_ext_unprefixed; 3196 break; 3197 case M32C_OPERAND_DST32RNPREFIXEDHI : 3198 value = fields->f_dst32_rn_prefixed_HI; 3199 break; 3200 case M32C_OPERAND_DST32RNPREFIXEDQI : 3201 value = fields->f_dst32_rn_prefixed_QI; 3202 break; 3203 case M32C_OPERAND_DST32RNPREFIXEDSI : 3204 value = fields->f_dst32_rn_prefixed_SI; 3205 break; 3206 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 3207 value = fields->f_dst32_rn_unprefixed_HI; 3208 break; 3209 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 3210 value = fields->f_dst32_rn_unprefixed_QI; 3211 break; 3212 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 3213 value = fields->f_dst32_rn_unprefixed_SI; 3214 break; 3215 case M32C_OPERAND_G : 3216 value = 0; 3217 break; 3218 case M32C_OPERAND_IMM_12_S4 : 3219 value = fields->f_imm_12_s4; 3220 break; 3221 case M32C_OPERAND_IMM_12_S4N : 3222 value = fields->f_imm_12_s4; 3223 break; 3224 case M32C_OPERAND_IMM_13_U3 : 3225 value = fields->f_imm_13_u3; 3226 break; 3227 case M32C_OPERAND_IMM_16_HI : 3228 value = fields->f_dsp_16_s16; 3229 break; 3230 case M32C_OPERAND_IMM_16_QI : 3231 value = fields->f_dsp_16_s8; 3232 break; 3233 case M32C_OPERAND_IMM_16_SI : 3234 value = fields->f_dsp_16_s32; 3235 break; 3236 case M32C_OPERAND_IMM_20_S4 : 3237 value = fields->f_imm_20_s4; 3238 break; 3239 case M32C_OPERAND_IMM_24_HI : 3240 value = fields->f_dsp_24_s16; 3241 break; 3242 case M32C_OPERAND_IMM_24_QI : 3243 value = fields->f_dsp_24_s8; 3244 break; 3245 case M32C_OPERAND_IMM_24_SI : 3246 value = fields->f_dsp_24_s32; 3247 break; 3248 case M32C_OPERAND_IMM_32_HI : 3249 value = fields->f_dsp_32_s16; 3250 break; 3251 case M32C_OPERAND_IMM_32_QI : 3252 value = fields->f_dsp_32_s8; 3253 break; 3254 case M32C_OPERAND_IMM_32_SI : 3255 value = fields->f_dsp_32_s32; 3256 break; 3257 case M32C_OPERAND_IMM_40_HI : 3258 value = fields->f_dsp_40_s16; 3259 break; 3260 case M32C_OPERAND_IMM_40_QI : 3261 value = fields->f_dsp_40_s8; 3262 break; 3263 case M32C_OPERAND_IMM_40_SI : 3264 value = fields->f_dsp_40_s32; 3265 break; 3266 case M32C_OPERAND_IMM_48_HI : 3267 value = fields->f_dsp_48_s16; 3268 break; 3269 case M32C_OPERAND_IMM_48_QI : 3270 value = fields->f_dsp_48_s8; 3271 break; 3272 case M32C_OPERAND_IMM_48_SI : 3273 value = fields->f_dsp_48_s32; 3274 break; 3275 case M32C_OPERAND_IMM_56_HI : 3276 value = fields->f_dsp_56_s16; 3277 break; 3278 case M32C_OPERAND_IMM_56_QI : 3279 value = fields->f_dsp_56_s8; 3280 break; 3281 case M32C_OPERAND_IMM_64_HI : 3282 value = fields->f_dsp_64_s16; 3283 break; 3284 case M32C_OPERAND_IMM_8_HI : 3285 value = fields->f_dsp_8_s16; 3286 break; 3287 case M32C_OPERAND_IMM_8_QI : 3288 value = fields->f_dsp_8_s8; 3289 break; 3290 case M32C_OPERAND_IMM_8_S4 : 3291 value = fields->f_imm_8_s4; 3292 break; 3293 case M32C_OPERAND_IMM_8_S4N : 3294 value = fields->f_imm_8_s4; 3295 break; 3296 case M32C_OPERAND_IMM_SH_12_S4 : 3297 value = fields->f_imm_12_s4; 3298 break; 3299 case M32C_OPERAND_IMM_SH_20_S4 : 3300 value = fields->f_imm_20_s4; 3301 break; 3302 case M32C_OPERAND_IMM_SH_8_S4 : 3303 value = fields->f_imm_8_s4; 3304 break; 3305 case M32C_OPERAND_IMM1_S : 3306 value = fields->f_imm1_S; 3307 break; 3308 case M32C_OPERAND_IMM3_S : 3309 value = fields->f_imm3_S; 3310 break; 3311 case M32C_OPERAND_LAB_16_8 : 3312 value = fields->f_lab_16_8; 3313 break; 3314 case M32C_OPERAND_LAB_24_8 : 3315 value = fields->f_lab_24_8; 3316 break; 3317 case M32C_OPERAND_LAB_32_8 : 3318 value = fields->f_lab_32_8; 3319 break; 3320 case M32C_OPERAND_LAB_40_8 : 3321 value = fields->f_lab_40_8; 3322 break; 3323 case M32C_OPERAND_LAB_5_3 : 3324 value = fields->f_lab_5_3; 3325 break; 3326 case M32C_OPERAND_LAB_8_16 : 3327 value = fields->f_lab_8_16; 3328 break; 3329 case M32C_OPERAND_LAB_8_24 : 3330 value = fields->f_lab_8_24; 3331 break; 3332 case M32C_OPERAND_LAB_8_8 : 3333 value = fields->f_lab_8_8; 3334 break; 3335 case M32C_OPERAND_LAB32_JMP_S : 3336 value = fields->f_lab32_jmp_s; 3337 break; 3338 case M32C_OPERAND_Q : 3339 value = 0; 3340 break; 3341 case M32C_OPERAND_R0 : 3342 value = 0; 3343 break; 3344 case M32C_OPERAND_R0H : 3345 value = 0; 3346 break; 3347 case M32C_OPERAND_R0L : 3348 value = 0; 3349 break; 3350 case M32C_OPERAND_R1 : 3351 value = 0; 3352 break; 3353 case M32C_OPERAND_R1R2R0 : 3354 value = 0; 3355 break; 3356 case M32C_OPERAND_R2 : 3357 value = 0; 3358 break; 3359 case M32C_OPERAND_R2R0 : 3360 value = 0; 3361 break; 3362 case M32C_OPERAND_R3 : 3363 value = 0; 3364 break; 3365 case M32C_OPERAND_R3R1 : 3366 value = 0; 3367 break; 3368 case M32C_OPERAND_REGSETPOP : 3369 value = fields->f_8_8; 3370 break; 3371 case M32C_OPERAND_REGSETPUSH : 3372 value = fields->f_8_8; 3373 break; 3374 case M32C_OPERAND_RN16_PUSH_S : 3375 value = fields->f_4_1; 3376 break; 3377 case M32C_OPERAND_S : 3378 value = 0; 3379 break; 3380 case M32C_OPERAND_SRC16AN : 3381 value = fields->f_src16_an; 3382 break; 3383 case M32C_OPERAND_SRC16ANHI : 3384 value = fields->f_src16_an; 3385 break; 3386 case M32C_OPERAND_SRC16ANQI : 3387 value = fields->f_src16_an; 3388 break; 3389 case M32C_OPERAND_SRC16RNHI : 3390 value = fields->f_src16_rn; 3391 break; 3392 case M32C_OPERAND_SRC16RNQI : 3393 value = fields->f_src16_rn; 3394 break; 3395 case M32C_OPERAND_SRC32ANPREFIXED : 3396 value = fields->f_src32_an_prefixed; 3397 break; 3398 case M32C_OPERAND_SRC32ANPREFIXEDHI : 3399 value = fields->f_src32_an_prefixed; 3400 break; 3401 case M32C_OPERAND_SRC32ANPREFIXEDQI : 3402 value = fields->f_src32_an_prefixed; 3403 break; 3404 case M32C_OPERAND_SRC32ANPREFIXEDSI : 3405 value = fields->f_src32_an_prefixed; 3406 break; 3407 case M32C_OPERAND_SRC32ANUNPREFIXED : 3408 value = fields->f_src32_an_unprefixed; 3409 break; 3410 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 3411 value = fields->f_src32_an_unprefixed; 3412 break; 3413 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 3414 value = fields->f_src32_an_unprefixed; 3415 break; 3416 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 3417 value = fields->f_src32_an_unprefixed; 3418 break; 3419 case M32C_OPERAND_SRC32RNPREFIXEDHI : 3420 value = fields->f_src32_rn_prefixed_HI; 3421 break; 3422 case M32C_OPERAND_SRC32RNPREFIXEDQI : 3423 value = fields->f_src32_rn_prefixed_QI; 3424 break; 3425 case M32C_OPERAND_SRC32RNPREFIXEDSI : 3426 value = fields->f_src32_rn_prefixed_SI; 3427 break; 3428 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 3429 value = fields->f_src32_rn_unprefixed_HI; 3430 break; 3431 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 3432 value = fields->f_src32_rn_unprefixed_QI; 3433 break; 3434 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 3435 value = fields->f_src32_rn_unprefixed_SI; 3436 break; 3437 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 3438 value = fields->f_5_1; 3439 break; 3440 case M32C_OPERAND_X : 3441 value = 0; 3442 break; 3443 case M32C_OPERAND_Z : 3444 value = 0; 3445 break; 3446 case M32C_OPERAND_COND16_16 : 3447 value = fields->f_dsp_16_u8; 3448 break; 3449 case M32C_OPERAND_COND16_24 : 3450 value = fields->f_dsp_24_u8; 3451 break; 3452 case M32C_OPERAND_COND16_32 : 3453 value = fields->f_dsp_32_u8; 3454 break; 3455 case M32C_OPERAND_COND16C : 3456 value = fields->f_cond16; 3457 break; 3458 case M32C_OPERAND_COND16J : 3459 value = fields->f_cond16; 3460 break; 3461 case M32C_OPERAND_COND16J5 : 3462 value = fields->f_cond16j_5; 3463 break; 3464 case M32C_OPERAND_COND32 : 3465 value = fields->f_cond32; 3466 break; 3467 case M32C_OPERAND_COND32_16 : 3468 value = fields->f_dsp_16_u8; 3469 break; 3470 case M32C_OPERAND_COND32_24 : 3471 value = fields->f_dsp_24_u8; 3472 break; 3473 case M32C_OPERAND_COND32_32 : 3474 value = fields->f_dsp_32_u8; 3475 break; 3476 case M32C_OPERAND_COND32_40 : 3477 value = fields->f_dsp_40_u8; 3478 break; 3479 case M32C_OPERAND_COND32J : 3480 value = fields->f_cond32j; 3481 break; 3482 case M32C_OPERAND_CR1_PREFIXED_32 : 3483 value = fields->f_21_3; 3484 break; 3485 case M32C_OPERAND_CR1_UNPREFIXED_32 : 3486 value = fields->f_13_3; 3487 break; 3488 case M32C_OPERAND_CR16 : 3489 value = fields->f_9_3; 3490 break; 3491 case M32C_OPERAND_CR2_32 : 3492 value = fields->f_13_3; 3493 break; 3494 case M32C_OPERAND_CR3_PREFIXED_32 : 3495 value = fields->f_21_3; 3496 break; 3497 case M32C_OPERAND_CR3_UNPREFIXED_32 : 3498 value = fields->f_13_3; 3499 break; 3500 case M32C_OPERAND_FLAGS16 : 3501 value = fields->f_9_3; 3502 break; 3503 case M32C_OPERAND_FLAGS32 : 3504 value = fields->f_13_3; 3505 break; 3506 case M32C_OPERAND_SCCOND32 : 3507 value = fields->f_cond16; 3508 break; 3509 case M32C_OPERAND_SIZE : 3510 value = 0; 3511 break; 3512 3513 default : 3514 /* xgettext:c-format */ 3515 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 3516 opindex); 3517 abort (); 3518 } 3519 3520 return value; 3521 } 3522 3523 bfd_vma 3524 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 3525 int opindex, 3526 const CGEN_FIELDS * fields) 3527 { 3528 bfd_vma value; 3529 3530 switch (opindex) 3531 { 3532 case M32C_OPERAND_A0 : 3533 value = 0; 3534 break; 3535 case M32C_OPERAND_A1 : 3536 value = 0; 3537 break; 3538 case M32C_OPERAND_AN16_PUSH_S : 3539 value = fields->f_4_1; 3540 break; 3541 case M32C_OPERAND_BIT16AN : 3542 value = fields->f_dst16_an; 3543 break; 3544 case M32C_OPERAND_BIT16RN : 3545 value = fields->f_dst16_rn; 3546 break; 3547 case M32C_OPERAND_BIT3_S : 3548 value = fields->f_imm3_S; 3549 break; 3550 case M32C_OPERAND_BIT32ANPREFIXED : 3551 value = fields->f_dst32_an_prefixed; 3552 break; 3553 case M32C_OPERAND_BIT32ANUNPREFIXED : 3554 value = fields->f_dst32_an_unprefixed; 3555 break; 3556 case M32C_OPERAND_BIT32RNPREFIXED : 3557 value = fields->f_dst32_rn_prefixed_QI; 3558 break; 3559 case M32C_OPERAND_BIT32RNUNPREFIXED : 3560 value = fields->f_dst32_rn_unprefixed_QI; 3561 break; 3562 case M32C_OPERAND_BITBASE16_16_S8 : 3563 value = fields->f_dsp_16_s8; 3564 break; 3565 case M32C_OPERAND_BITBASE16_16_U16 : 3566 value = fields->f_dsp_16_u16; 3567 break; 3568 case M32C_OPERAND_BITBASE16_16_U8 : 3569 value = fields->f_dsp_16_u8; 3570 break; 3571 case M32C_OPERAND_BITBASE16_8_U11_S : 3572 value = fields->f_bitbase16_u11_S; 3573 break; 3574 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 3575 value = fields->f_bitbase32_16_s11_unprefixed; 3576 break; 3577 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 3578 value = fields->f_bitbase32_16_s19_unprefixed; 3579 break; 3580 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 3581 value = fields->f_bitbase32_16_u11_unprefixed; 3582 break; 3583 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 3584 value = fields->f_bitbase32_16_u19_unprefixed; 3585 break; 3586 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 3587 value = fields->f_bitbase32_16_u27_unprefixed; 3588 break; 3589 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 3590 value = fields->f_bitbase32_24_s11_prefixed; 3591 break; 3592 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 3593 value = fields->f_bitbase32_24_s19_prefixed; 3594 break; 3595 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 3596 value = fields->f_bitbase32_24_u11_prefixed; 3597 break; 3598 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 3599 value = fields->f_bitbase32_24_u19_prefixed; 3600 break; 3601 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 3602 value = fields->f_bitbase32_24_u27_prefixed; 3603 break; 3604 case M32C_OPERAND_BITNO16R : 3605 value = fields->f_dsp_16_u8; 3606 break; 3607 case M32C_OPERAND_BITNO32PREFIXED : 3608 value = fields->f_bitno32_prefixed; 3609 break; 3610 case M32C_OPERAND_BITNO32UNPREFIXED : 3611 value = fields->f_bitno32_unprefixed; 3612 break; 3613 case M32C_OPERAND_DSP_10_U6 : 3614 value = fields->f_dsp_10_u6; 3615 break; 3616 case M32C_OPERAND_DSP_16_S16 : 3617 value = fields->f_dsp_16_s16; 3618 break; 3619 case M32C_OPERAND_DSP_16_S8 : 3620 value = fields->f_dsp_16_s8; 3621 break; 3622 case M32C_OPERAND_DSP_16_U16 : 3623 value = fields->f_dsp_16_u16; 3624 break; 3625 case M32C_OPERAND_DSP_16_U20 : 3626 value = fields->f_dsp_16_u24; 3627 break; 3628 case M32C_OPERAND_DSP_16_U24 : 3629 value = fields->f_dsp_16_u24; 3630 break; 3631 case M32C_OPERAND_DSP_16_U8 : 3632 value = fields->f_dsp_16_u8; 3633 break; 3634 case M32C_OPERAND_DSP_24_S16 : 3635 value = fields->f_dsp_24_s16; 3636 break; 3637 case M32C_OPERAND_DSP_24_S8 : 3638 value = fields->f_dsp_24_s8; 3639 break; 3640 case M32C_OPERAND_DSP_24_U16 : 3641 value = fields->f_dsp_24_u16; 3642 break; 3643 case M32C_OPERAND_DSP_24_U20 : 3644 value = fields->f_dsp_24_u24; 3645 break; 3646 case M32C_OPERAND_DSP_24_U24 : 3647 value = fields->f_dsp_24_u24; 3648 break; 3649 case M32C_OPERAND_DSP_24_U8 : 3650 value = fields->f_dsp_24_u8; 3651 break; 3652 case M32C_OPERAND_DSP_32_S16 : 3653 value = fields->f_dsp_32_s16; 3654 break; 3655 case M32C_OPERAND_DSP_32_S8 : 3656 value = fields->f_dsp_32_s8; 3657 break; 3658 case M32C_OPERAND_DSP_32_U16 : 3659 value = fields->f_dsp_32_u16; 3660 break; 3661 case M32C_OPERAND_DSP_32_U20 : 3662 value = fields->f_dsp_32_u24; 3663 break; 3664 case M32C_OPERAND_DSP_32_U24 : 3665 value = fields->f_dsp_32_u24; 3666 break; 3667 case M32C_OPERAND_DSP_32_U8 : 3668 value = fields->f_dsp_32_u8; 3669 break; 3670 case M32C_OPERAND_DSP_40_S16 : 3671 value = fields->f_dsp_40_s16; 3672 break; 3673 case M32C_OPERAND_DSP_40_S8 : 3674 value = fields->f_dsp_40_s8; 3675 break; 3676 case M32C_OPERAND_DSP_40_U16 : 3677 value = fields->f_dsp_40_u16; 3678 break; 3679 case M32C_OPERAND_DSP_40_U20 : 3680 value = fields->f_dsp_40_u20; 3681 break; 3682 case M32C_OPERAND_DSP_40_U24 : 3683 value = fields->f_dsp_40_u24; 3684 break; 3685 case M32C_OPERAND_DSP_40_U8 : 3686 value = fields->f_dsp_40_u8; 3687 break; 3688 case M32C_OPERAND_DSP_48_S16 : 3689 value = fields->f_dsp_48_s16; 3690 break; 3691 case M32C_OPERAND_DSP_48_S8 : 3692 value = fields->f_dsp_48_s8; 3693 break; 3694 case M32C_OPERAND_DSP_48_U16 : 3695 value = fields->f_dsp_48_u16; 3696 break; 3697 case M32C_OPERAND_DSP_48_U20 : 3698 value = fields->f_dsp_48_u20; 3699 break; 3700 case M32C_OPERAND_DSP_48_U24 : 3701 value = fields->f_dsp_48_u24; 3702 break; 3703 case M32C_OPERAND_DSP_48_U8 : 3704 value = fields->f_dsp_48_u8; 3705 break; 3706 case M32C_OPERAND_DSP_8_S24 : 3707 value = fields->f_dsp_8_s24; 3708 break; 3709 case M32C_OPERAND_DSP_8_S8 : 3710 value = fields->f_dsp_8_s8; 3711 break; 3712 case M32C_OPERAND_DSP_8_U16 : 3713 value = fields->f_dsp_8_u16; 3714 break; 3715 case M32C_OPERAND_DSP_8_U24 : 3716 value = fields->f_dsp_8_u24; 3717 break; 3718 case M32C_OPERAND_DSP_8_U6 : 3719 value = fields->f_dsp_8_u6; 3720 break; 3721 case M32C_OPERAND_DSP_8_U8 : 3722 value = fields->f_dsp_8_u8; 3723 break; 3724 case M32C_OPERAND_DST16AN : 3725 value = fields->f_dst16_an; 3726 break; 3727 case M32C_OPERAND_DST16AN_S : 3728 value = fields->f_dst16_an_s; 3729 break; 3730 case M32C_OPERAND_DST16ANHI : 3731 value = fields->f_dst16_an; 3732 break; 3733 case M32C_OPERAND_DST16ANQI : 3734 value = fields->f_dst16_an; 3735 break; 3736 case M32C_OPERAND_DST16ANQI_S : 3737 value = fields->f_dst16_rn_QI_s; 3738 break; 3739 case M32C_OPERAND_DST16ANSI : 3740 value = fields->f_dst16_an; 3741 break; 3742 case M32C_OPERAND_DST16RNEXTQI : 3743 value = fields->f_dst16_rn_ext; 3744 break; 3745 case M32C_OPERAND_DST16RNHI : 3746 value = fields->f_dst16_rn; 3747 break; 3748 case M32C_OPERAND_DST16RNQI : 3749 value = fields->f_dst16_rn; 3750 break; 3751 case M32C_OPERAND_DST16RNQI_S : 3752 value = fields->f_dst16_rn_QI_s; 3753 break; 3754 case M32C_OPERAND_DST16RNSI : 3755 value = fields->f_dst16_rn; 3756 break; 3757 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 3758 value = fields->f_dst32_an_unprefixed; 3759 break; 3760 case M32C_OPERAND_DST32ANPREFIXED : 3761 value = fields->f_dst32_an_prefixed; 3762 break; 3763 case M32C_OPERAND_DST32ANPREFIXEDHI : 3764 value = fields->f_dst32_an_prefixed; 3765 break; 3766 case M32C_OPERAND_DST32ANPREFIXEDQI : 3767 value = fields->f_dst32_an_prefixed; 3768 break; 3769 case M32C_OPERAND_DST32ANPREFIXEDSI : 3770 value = fields->f_dst32_an_prefixed; 3771 break; 3772 case M32C_OPERAND_DST32ANUNPREFIXED : 3773 value = fields->f_dst32_an_unprefixed; 3774 break; 3775 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 3776 value = fields->f_dst32_an_unprefixed; 3777 break; 3778 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 3779 value = fields->f_dst32_an_unprefixed; 3780 break; 3781 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 3782 value = fields->f_dst32_an_unprefixed; 3783 break; 3784 case M32C_OPERAND_DST32R0HI_S : 3785 value = 0; 3786 break; 3787 case M32C_OPERAND_DST32R0QI_S : 3788 value = 0; 3789 break; 3790 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 3791 value = fields->f_dst32_rn_ext_unprefixed; 3792 break; 3793 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 3794 value = fields->f_dst32_rn_ext_unprefixed; 3795 break; 3796 case M32C_OPERAND_DST32RNPREFIXEDHI : 3797 value = fields->f_dst32_rn_prefixed_HI; 3798 break; 3799 case M32C_OPERAND_DST32RNPREFIXEDQI : 3800 value = fields->f_dst32_rn_prefixed_QI; 3801 break; 3802 case M32C_OPERAND_DST32RNPREFIXEDSI : 3803 value = fields->f_dst32_rn_prefixed_SI; 3804 break; 3805 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 3806 value = fields->f_dst32_rn_unprefixed_HI; 3807 break; 3808 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 3809 value = fields->f_dst32_rn_unprefixed_QI; 3810 break; 3811 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 3812 value = fields->f_dst32_rn_unprefixed_SI; 3813 break; 3814 case M32C_OPERAND_G : 3815 value = 0; 3816 break; 3817 case M32C_OPERAND_IMM_12_S4 : 3818 value = fields->f_imm_12_s4; 3819 break; 3820 case M32C_OPERAND_IMM_12_S4N : 3821 value = fields->f_imm_12_s4; 3822 break; 3823 case M32C_OPERAND_IMM_13_U3 : 3824 value = fields->f_imm_13_u3; 3825 break; 3826 case M32C_OPERAND_IMM_16_HI : 3827 value = fields->f_dsp_16_s16; 3828 break; 3829 case M32C_OPERAND_IMM_16_QI : 3830 value = fields->f_dsp_16_s8; 3831 break; 3832 case M32C_OPERAND_IMM_16_SI : 3833 value = fields->f_dsp_16_s32; 3834 break; 3835 case M32C_OPERAND_IMM_20_S4 : 3836 value = fields->f_imm_20_s4; 3837 break; 3838 case M32C_OPERAND_IMM_24_HI : 3839 value = fields->f_dsp_24_s16; 3840 break; 3841 case M32C_OPERAND_IMM_24_QI : 3842 value = fields->f_dsp_24_s8; 3843 break; 3844 case M32C_OPERAND_IMM_24_SI : 3845 value = fields->f_dsp_24_s32; 3846 break; 3847 case M32C_OPERAND_IMM_32_HI : 3848 value = fields->f_dsp_32_s16; 3849 break; 3850 case M32C_OPERAND_IMM_32_QI : 3851 value = fields->f_dsp_32_s8; 3852 break; 3853 case M32C_OPERAND_IMM_32_SI : 3854 value = fields->f_dsp_32_s32; 3855 break; 3856 case M32C_OPERAND_IMM_40_HI : 3857 value = fields->f_dsp_40_s16; 3858 break; 3859 case M32C_OPERAND_IMM_40_QI : 3860 value = fields->f_dsp_40_s8; 3861 break; 3862 case M32C_OPERAND_IMM_40_SI : 3863 value = fields->f_dsp_40_s32; 3864 break; 3865 case M32C_OPERAND_IMM_48_HI : 3866 value = fields->f_dsp_48_s16; 3867 break; 3868 case M32C_OPERAND_IMM_48_QI : 3869 value = fields->f_dsp_48_s8; 3870 break; 3871 case M32C_OPERAND_IMM_48_SI : 3872 value = fields->f_dsp_48_s32; 3873 break; 3874 case M32C_OPERAND_IMM_56_HI : 3875 value = fields->f_dsp_56_s16; 3876 break; 3877 case M32C_OPERAND_IMM_56_QI : 3878 value = fields->f_dsp_56_s8; 3879 break; 3880 case M32C_OPERAND_IMM_64_HI : 3881 value = fields->f_dsp_64_s16; 3882 break; 3883 case M32C_OPERAND_IMM_8_HI : 3884 value = fields->f_dsp_8_s16; 3885 break; 3886 case M32C_OPERAND_IMM_8_QI : 3887 value = fields->f_dsp_8_s8; 3888 break; 3889 case M32C_OPERAND_IMM_8_S4 : 3890 value = fields->f_imm_8_s4; 3891 break; 3892 case M32C_OPERAND_IMM_8_S4N : 3893 value = fields->f_imm_8_s4; 3894 break; 3895 case M32C_OPERAND_IMM_SH_12_S4 : 3896 value = fields->f_imm_12_s4; 3897 break; 3898 case M32C_OPERAND_IMM_SH_20_S4 : 3899 value = fields->f_imm_20_s4; 3900 break; 3901 case M32C_OPERAND_IMM_SH_8_S4 : 3902 value = fields->f_imm_8_s4; 3903 break; 3904 case M32C_OPERAND_IMM1_S : 3905 value = fields->f_imm1_S; 3906 break; 3907 case M32C_OPERAND_IMM3_S : 3908 value = fields->f_imm3_S; 3909 break; 3910 case M32C_OPERAND_LAB_16_8 : 3911 value = fields->f_lab_16_8; 3912 break; 3913 case M32C_OPERAND_LAB_24_8 : 3914 value = fields->f_lab_24_8; 3915 break; 3916 case M32C_OPERAND_LAB_32_8 : 3917 value = fields->f_lab_32_8; 3918 break; 3919 case M32C_OPERAND_LAB_40_8 : 3920 value = fields->f_lab_40_8; 3921 break; 3922 case M32C_OPERAND_LAB_5_3 : 3923 value = fields->f_lab_5_3; 3924 break; 3925 case M32C_OPERAND_LAB_8_16 : 3926 value = fields->f_lab_8_16; 3927 break; 3928 case M32C_OPERAND_LAB_8_24 : 3929 value = fields->f_lab_8_24; 3930 break; 3931 case M32C_OPERAND_LAB_8_8 : 3932 value = fields->f_lab_8_8; 3933 break; 3934 case M32C_OPERAND_LAB32_JMP_S : 3935 value = fields->f_lab32_jmp_s; 3936 break; 3937 case M32C_OPERAND_Q : 3938 value = 0; 3939 break; 3940 case M32C_OPERAND_R0 : 3941 value = 0; 3942 break; 3943 case M32C_OPERAND_R0H : 3944 value = 0; 3945 break; 3946 case M32C_OPERAND_R0L : 3947 value = 0; 3948 break; 3949 case M32C_OPERAND_R1 : 3950 value = 0; 3951 break; 3952 case M32C_OPERAND_R1R2R0 : 3953 value = 0; 3954 break; 3955 case M32C_OPERAND_R2 : 3956 value = 0; 3957 break; 3958 case M32C_OPERAND_R2R0 : 3959 value = 0; 3960 break; 3961 case M32C_OPERAND_R3 : 3962 value = 0; 3963 break; 3964 case M32C_OPERAND_R3R1 : 3965 value = 0; 3966 break; 3967 case M32C_OPERAND_REGSETPOP : 3968 value = fields->f_8_8; 3969 break; 3970 case M32C_OPERAND_REGSETPUSH : 3971 value = fields->f_8_8; 3972 break; 3973 case M32C_OPERAND_RN16_PUSH_S : 3974 value = fields->f_4_1; 3975 break; 3976 case M32C_OPERAND_S : 3977 value = 0; 3978 break; 3979 case M32C_OPERAND_SRC16AN : 3980 value = fields->f_src16_an; 3981 break; 3982 case M32C_OPERAND_SRC16ANHI : 3983 value = fields->f_src16_an; 3984 break; 3985 case M32C_OPERAND_SRC16ANQI : 3986 value = fields->f_src16_an; 3987 break; 3988 case M32C_OPERAND_SRC16RNHI : 3989 value = fields->f_src16_rn; 3990 break; 3991 case M32C_OPERAND_SRC16RNQI : 3992 value = fields->f_src16_rn; 3993 break; 3994 case M32C_OPERAND_SRC32ANPREFIXED : 3995 value = fields->f_src32_an_prefixed; 3996 break; 3997 case M32C_OPERAND_SRC32ANPREFIXEDHI : 3998 value = fields->f_src32_an_prefixed; 3999 break; 4000 case M32C_OPERAND_SRC32ANPREFIXEDQI : 4001 value = fields->f_src32_an_prefixed; 4002 break; 4003 case M32C_OPERAND_SRC32ANPREFIXEDSI : 4004 value = fields->f_src32_an_prefixed; 4005 break; 4006 case M32C_OPERAND_SRC32ANUNPREFIXED : 4007 value = fields->f_src32_an_unprefixed; 4008 break; 4009 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 4010 value = fields->f_src32_an_unprefixed; 4011 break; 4012 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 4013 value = fields->f_src32_an_unprefixed; 4014 break; 4015 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 4016 value = fields->f_src32_an_unprefixed; 4017 break; 4018 case M32C_OPERAND_SRC32RNPREFIXEDHI : 4019 value = fields->f_src32_rn_prefixed_HI; 4020 break; 4021 case M32C_OPERAND_SRC32RNPREFIXEDQI : 4022 value = fields->f_src32_rn_prefixed_QI; 4023 break; 4024 case M32C_OPERAND_SRC32RNPREFIXEDSI : 4025 value = fields->f_src32_rn_prefixed_SI; 4026 break; 4027 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 4028 value = fields->f_src32_rn_unprefixed_HI; 4029 break; 4030 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 4031 value = fields->f_src32_rn_unprefixed_QI; 4032 break; 4033 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 4034 value = fields->f_src32_rn_unprefixed_SI; 4035 break; 4036 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 4037 value = fields->f_5_1; 4038 break; 4039 case M32C_OPERAND_X : 4040 value = 0; 4041 break; 4042 case M32C_OPERAND_Z : 4043 value = 0; 4044 break; 4045 case M32C_OPERAND_COND16_16 : 4046 value = fields->f_dsp_16_u8; 4047 break; 4048 case M32C_OPERAND_COND16_24 : 4049 value = fields->f_dsp_24_u8; 4050 break; 4051 case M32C_OPERAND_COND16_32 : 4052 value = fields->f_dsp_32_u8; 4053 break; 4054 case M32C_OPERAND_COND16C : 4055 value = fields->f_cond16; 4056 break; 4057 case M32C_OPERAND_COND16J : 4058 value = fields->f_cond16; 4059 break; 4060 case M32C_OPERAND_COND16J5 : 4061 value = fields->f_cond16j_5; 4062 break; 4063 case M32C_OPERAND_COND32 : 4064 value = fields->f_cond32; 4065 break; 4066 case M32C_OPERAND_COND32_16 : 4067 value = fields->f_dsp_16_u8; 4068 break; 4069 case M32C_OPERAND_COND32_24 : 4070 value = fields->f_dsp_24_u8; 4071 break; 4072 case M32C_OPERAND_COND32_32 : 4073 value = fields->f_dsp_32_u8; 4074 break; 4075 case M32C_OPERAND_COND32_40 : 4076 value = fields->f_dsp_40_u8; 4077 break; 4078 case M32C_OPERAND_COND32J : 4079 value = fields->f_cond32j; 4080 break; 4081 case M32C_OPERAND_CR1_PREFIXED_32 : 4082 value = fields->f_21_3; 4083 break; 4084 case M32C_OPERAND_CR1_UNPREFIXED_32 : 4085 value = fields->f_13_3; 4086 break; 4087 case M32C_OPERAND_CR16 : 4088 value = fields->f_9_3; 4089 break; 4090 case M32C_OPERAND_CR2_32 : 4091 value = fields->f_13_3; 4092 break; 4093 case M32C_OPERAND_CR3_PREFIXED_32 : 4094 value = fields->f_21_3; 4095 break; 4096 case M32C_OPERAND_CR3_UNPREFIXED_32 : 4097 value = fields->f_13_3; 4098 break; 4099 case M32C_OPERAND_FLAGS16 : 4100 value = fields->f_9_3; 4101 break; 4102 case M32C_OPERAND_FLAGS32 : 4103 value = fields->f_13_3; 4104 break; 4105 case M32C_OPERAND_SCCOND32 : 4106 value = fields->f_cond16; 4107 break; 4108 case M32C_OPERAND_SIZE : 4109 value = 0; 4110 break; 4111 4112 default : 4113 /* xgettext:c-format */ 4114 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 4115 opindex); 4116 abort (); 4117 } 4118 4119 return value; 4120 } 4121 4122 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 4123 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 4124 4125 /* Stuffing values in cgen_fields is handled by a collection of functions. 4126 They are distinguished by the type of the VALUE argument they accept. 4127 TODO: floating point, inlining support, remove cases where argument type 4128 not appropriate. */ 4129 4130 void 4131 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 4132 int opindex, 4133 CGEN_FIELDS * fields, 4134 int value) 4135 { 4136 switch (opindex) 4137 { 4138 case M32C_OPERAND_A0 : 4139 break; 4140 case M32C_OPERAND_A1 : 4141 break; 4142 case M32C_OPERAND_AN16_PUSH_S : 4143 fields->f_4_1 = value; 4144 break; 4145 case M32C_OPERAND_BIT16AN : 4146 fields->f_dst16_an = value; 4147 break; 4148 case M32C_OPERAND_BIT16RN : 4149 fields->f_dst16_rn = value; 4150 break; 4151 case M32C_OPERAND_BIT3_S : 4152 fields->f_imm3_S = value; 4153 break; 4154 case M32C_OPERAND_BIT32ANPREFIXED : 4155 fields->f_dst32_an_prefixed = value; 4156 break; 4157 case M32C_OPERAND_BIT32ANUNPREFIXED : 4158 fields->f_dst32_an_unprefixed = value; 4159 break; 4160 case M32C_OPERAND_BIT32RNPREFIXED : 4161 fields->f_dst32_rn_prefixed_QI = value; 4162 break; 4163 case M32C_OPERAND_BIT32RNUNPREFIXED : 4164 fields->f_dst32_rn_unprefixed_QI = value; 4165 break; 4166 case M32C_OPERAND_BITBASE16_16_S8 : 4167 fields->f_dsp_16_s8 = value; 4168 break; 4169 case M32C_OPERAND_BITBASE16_16_U16 : 4170 fields->f_dsp_16_u16 = value; 4171 break; 4172 case M32C_OPERAND_BITBASE16_16_U8 : 4173 fields->f_dsp_16_u8 = value; 4174 break; 4175 case M32C_OPERAND_BITBASE16_8_U11_S : 4176 fields->f_bitbase16_u11_S = value; 4177 break; 4178 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 4179 fields->f_bitbase32_16_s11_unprefixed = value; 4180 break; 4181 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 4182 fields->f_bitbase32_16_s19_unprefixed = value; 4183 break; 4184 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 4185 fields->f_bitbase32_16_u11_unprefixed = value; 4186 break; 4187 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 4188 fields->f_bitbase32_16_u19_unprefixed = value; 4189 break; 4190 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 4191 fields->f_bitbase32_16_u27_unprefixed = value; 4192 break; 4193 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 4194 fields->f_bitbase32_24_s11_prefixed = value; 4195 break; 4196 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 4197 fields->f_bitbase32_24_s19_prefixed = value; 4198 break; 4199 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 4200 fields->f_bitbase32_24_u11_prefixed = value; 4201 break; 4202 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 4203 fields->f_bitbase32_24_u19_prefixed = value; 4204 break; 4205 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 4206 fields->f_bitbase32_24_u27_prefixed = value; 4207 break; 4208 case M32C_OPERAND_BITNO16R : 4209 fields->f_dsp_16_u8 = value; 4210 break; 4211 case M32C_OPERAND_BITNO32PREFIXED : 4212 fields->f_bitno32_prefixed = value; 4213 break; 4214 case M32C_OPERAND_BITNO32UNPREFIXED : 4215 fields->f_bitno32_unprefixed = value; 4216 break; 4217 case M32C_OPERAND_DSP_10_U6 : 4218 fields->f_dsp_10_u6 = value; 4219 break; 4220 case M32C_OPERAND_DSP_16_S16 : 4221 fields->f_dsp_16_s16 = value; 4222 break; 4223 case M32C_OPERAND_DSP_16_S8 : 4224 fields->f_dsp_16_s8 = value; 4225 break; 4226 case M32C_OPERAND_DSP_16_U16 : 4227 fields->f_dsp_16_u16 = value; 4228 break; 4229 case M32C_OPERAND_DSP_16_U20 : 4230 fields->f_dsp_16_u24 = value; 4231 break; 4232 case M32C_OPERAND_DSP_16_U24 : 4233 fields->f_dsp_16_u24 = value; 4234 break; 4235 case M32C_OPERAND_DSP_16_U8 : 4236 fields->f_dsp_16_u8 = value; 4237 break; 4238 case M32C_OPERAND_DSP_24_S16 : 4239 fields->f_dsp_24_s16 = value; 4240 break; 4241 case M32C_OPERAND_DSP_24_S8 : 4242 fields->f_dsp_24_s8 = value; 4243 break; 4244 case M32C_OPERAND_DSP_24_U16 : 4245 fields->f_dsp_24_u16 = value; 4246 break; 4247 case M32C_OPERAND_DSP_24_U20 : 4248 fields->f_dsp_24_u24 = value; 4249 break; 4250 case M32C_OPERAND_DSP_24_U24 : 4251 fields->f_dsp_24_u24 = value; 4252 break; 4253 case M32C_OPERAND_DSP_24_U8 : 4254 fields->f_dsp_24_u8 = value; 4255 break; 4256 case M32C_OPERAND_DSP_32_S16 : 4257 fields->f_dsp_32_s16 = value; 4258 break; 4259 case M32C_OPERAND_DSP_32_S8 : 4260 fields->f_dsp_32_s8 = value; 4261 break; 4262 case M32C_OPERAND_DSP_32_U16 : 4263 fields->f_dsp_32_u16 = value; 4264 break; 4265 case M32C_OPERAND_DSP_32_U20 : 4266 fields->f_dsp_32_u24 = value; 4267 break; 4268 case M32C_OPERAND_DSP_32_U24 : 4269 fields->f_dsp_32_u24 = value; 4270 break; 4271 case M32C_OPERAND_DSP_32_U8 : 4272 fields->f_dsp_32_u8 = value; 4273 break; 4274 case M32C_OPERAND_DSP_40_S16 : 4275 fields->f_dsp_40_s16 = value; 4276 break; 4277 case M32C_OPERAND_DSP_40_S8 : 4278 fields->f_dsp_40_s8 = value; 4279 break; 4280 case M32C_OPERAND_DSP_40_U16 : 4281 fields->f_dsp_40_u16 = value; 4282 break; 4283 case M32C_OPERAND_DSP_40_U20 : 4284 fields->f_dsp_40_u20 = value; 4285 break; 4286 case M32C_OPERAND_DSP_40_U24 : 4287 fields->f_dsp_40_u24 = value; 4288 break; 4289 case M32C_OPERAND_DSP_40_U8 : 4290 fields->f_dsp_40_u8 = value; 4291 break; 4292 case M32C_OPERAND_DSP_48_S16 : 4293 fields->f_dsp_48_s16 = value; 4294 break; 4295 case M32C_OPERAND_DSP_48_S8 : 4296 fields->f_dsp_48_s8 = value; 4297 break; 4298 case M32C_OPERAND_DSP_48_U16 : 4299 fields->f_dsp_48_u16 = value; 4300 break; 4301 case M32C_OPERAND_DSP_48_U20 : 4302 fields->f_dsp_48_u20 = value; 4303 break; 4304 case M32C_OPERAND_DSP_48_U24 : 4305 fields->f_dsp_48_u24 = value; 4306 break; 4307 case M32C_OPERAND_DSP_48_U8 : 4308 fields->f_dsp_48_u8 = value; 4309 break; 4310 case M32C_OPERAND_DSP_8_S24 : 4311 fields->f_dsp_8_s24 = value; 4312 break; 4313 case M32C_OPERAND_DSP_8_S8 : 4314 fields->f_dsp_8_s8 = value; 4315 break; 4316 case M32C_OPERAND_DSP_8_U16 : 4317 fields->f_dsp_8_u16 = value; 4318 break; 4319 case M32C_OPERAND_DSP_8_U24 : 4320 fields->f_dsp_8_u24 = value; 4321 break; 4322 case M32C_OPERAND_DSP_8_U6 : 4323 fields->f_dsp_8_u6 = value; 4324 break; 4325 case M32C_OPERAND_DSP_8_U8 : 4326 fields->f_dsp_8_u8 = value; 4327 break; 4328 case M32C_OPERAND_DST16AN : 4329 fields->f_dst16_an = value; 4330 break; 4331 case M32C_OPERAND_DST16AN_S : 4332 fields->f_dst16_an_s = value; 4333 break; 4334 case M32C_OPERAND_DST16ANHI : 4335 fields->f_dst16_an = value; 4336 break; 4337 case M32C_OPERAND_DST16ANQI : 4338 fields->f_dst16_an = value; 4339 break; 4340 case M32C_OPERAND_DST16ANQI_S : 4341 fields->f_dst16_rn_QI_s = value; 4342 break; 4343 case M32C_OPERAND_DST16ANSI : 4344 fields->f_dst16_an = value; 4345 break; 4346 case M32C_OPERAND_DST16RNEXTQI : 4347 fields->f_dst16_rn_ext = value; 4348 break; 4349 case M32C_OPERAND_DST16RNHI : 4350 fields->f_dst16_rn = value; 4351 break; 4352 case M32C_OPERAND_DST16RNQI : 4353 fields->f_dst16_rn = value; 4354 break; 4355 case M32C_OPERAND_DST16RNQI_S : 4356 fields->f_dst16_rn_QI_s = value; 4357 break; 4358 case M32C_OPERAND_DST16RNSI : 4359 fields->f_dst16_rn = value; 4360 break; 4361 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 4362 fields->f_dst32_an_unprefixed = value; 4363 break; 4364 case M32C_OPERAND_DST32ANPREFIXED : 4365 fields->f_dst32_an_prefixed = value; 4366 break; 4367 case M32C_OPERAND_DST32ANPREFIXEDHI : 4368 fields->f_dst32_an_prefixed = value; 4369 break; 4370 case M32C_OPERAND_DST32ANPREFIXEDQI : 4371 fields->f_dst32_an_prefixed = value; 4372 break; 4373 case M32C_OPERAND_DST32ANPREFIXEDSI : 4374 fields->f_dst32_an_prefixed = value; 4375 break; 4376 case M32C_OPERAND_DST32ANUNPREFIXED : 4377 fields->f_dst32_an_unprefixed = value; 4378 break; 4379 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 4380 fields->f_dst32_an_unprefixed = value; 4381 break; 4382 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 4383 fields->f_dst32_an_unprefixed = value; 4384 break; 4385 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 4386 fields->f_dst32_an_unprefixed = value; 4387 break; 4388 case M32C_OPERAND_DST32R0HI_S : 4389 break; 4390 case M32C_OPERAND_DST32R0QI_S : 4391 break; 4392 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 4393 fields->f_dst32_rn_ext_unprefixed = value; 4394 break; 4395 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 4396 fields->f_dst32_rn_ext_unprefixed = value; 4397 break; 4398 case M32C_OPERAND_DST32RNPREFIXEDHI : 4399 fields->f_dst32_rn_prefixed_HI = value; 4400 break; 4401 case M32C_OPERAND_DST32RNPREFIXEDQI : 4402 fields->f_dst32_rn_prefixed_QI = value; 4403 break; 4404 case M32C_OPERAND_DST32RNPREFIXEDSI : 4405 fields->f_dst32_rn_prefixed_SI = value; 4406 break; 4407 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 4408 fields->f_dst32_rn_unprefixed_HI = value; 4409 break; 4410 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 4411 fields->f_dst32_rn_unprefixed_QI = value; 4412 break; 4413 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 4414 fields->f_dst32_rn_unprefixed_SI = value; 4415 break; 4416 case M32C_OPERAND_G : 4417 break; 4418 case M32C_OPERAND_IMM_12_S4 : 4419 fields->f_imm_12_s4 = value; 4420 break; 4421 case M32C_OPERAND_IMM_12_S4N : 4422 fields->f_imm_12_s4 = value; 4423 break; 4424 case M32C_OPERAND_IMM_13_U3 : 4425 fields->f_imm_13_u3 = value; 4426 break; 4427 case M32C_OPERAND_IMM_16_HI : 4428 fields->f_dsp_16_s16 = value; 4429 break; 4430 case M32C_OPERAND_IMM_16_QI : 4431 fields->f_dsp_16_s8 = value; 4432 break; 4433 case M32C_OPERAND_IMM_16_SI : 4434 fields->f_dsp_16_s32 = value; 4435 break; 4436 case M32C_OPERAND_IMM_20_S4 : 4437 fields->f_imm_20_s4 = value; 4438 break; 4439 case M32C_OPERAND_IMM_24_HI : 4440 fields->f_dsp_24_s16 = value; 4441 break; 4442 case M32C_OPERAND_IMM_24_QI : 4443 fields->f_dsp_24_s8 = value; 4444 break; 4445 case M32C_OPERAND_IMM_24_SI : 4446 fields->f_dsp_24_s32 = value; 4447 break; 4448 case M32C_OPERAND_IMM_32_HI : 4449 fields->f_dsp_32_s16 = value; 4450 break; 4451 case M32C_OPERAND_IMM_32_QI : 4452 fields->f_dsp_32_s8 = value; 4453 break; 4454 case M32C_OPERAND_IMM_32_SI : 4455 fields->f_dsp_32_s32 = value; 4456 break; 4457 case M32C_OPERAND_IMM_40_HI : 4458 fields->f_dsp_40_s16 = value; 4459 break; 4460 case M32C_OPERAND_IMM_40_QI : 4461 fields->f_dsp_40_s8 = value; 4462 break; 4463 case M32C_OPERAND_IMM_40_SI : 4464 fields->f_dsp_40_s32 = value; 4465 break; 4466 case M32C_OPERAND_IMM_48_HI : 4467 fields->f_dsp_48_s16 = value; 4468 break; 4469 case M32C_OPERAND_IMM_48_QI : 4470 fields->f_dsp_48_s8 = value; 4471 break; 4472 case M32C_OPERAND_IMM_48_SI : 4473 fields->f_dsp_48_s32 = value; 4474 break; 4475 case M32C_OPERAND_IMM_56_HI : 4476 fields->f_dsp_56_s16 = value; 4477 break; 4478 case M32C_OPERAND_IMM_56_QI : 4479 fields->f_dsp_56_s8 = value; 4480 break; 4481 case M32C_OPERAND_IMM_64_HI : 4482 fields->f_dsp_64_s16 = value; 4483 break; 4484 case M32C_OPERAND_IMM_8_HI : 4485 fields->f_dsp_8_s16 = value; 4486 break; 4487 case M32C_OPERAND_IMM_8_QI : 4488 fields->f_dsp_8_s8 = value; 4489 break; 4490 case M32C_OPERAND_IMM_8_S4 : 4491 fields->f_imm_8_s4 = value; 4492 break; 4493 case M32C_OPERAND_IMM_8_S4N : 4494 fields->f_imm_8_s4 = value; 4495 break; 4496 case M32C_OPERAND_IMM_SH_12_S4 : 4497 fields->f_imm_12_s4 = value; 4498 break; 4499 case M32C_OPERAND_IMM_SH_20_S4 : 4500 fields->f_imm_20_s4 = value; 4501 break; 4502 case M32C_OPERAND_IMM_SH_8_S4 : 4503 fields->f_imm_8_s4 = value; 4504 break; 4505 case M32C_OPERAND_IMM1_S : 4506 fields->f_imm1_S = value; 4507 break; 4508 case M32C_OPERAND_IMM3_S : 4509 fields->f_imm3_S = value; 4510 break; 4511 case M32C_OPERAND_LAB_16_8 : 4512 fields->f_lab_16_8 = value; 4513 break; 4514 case M32C_OPERAND_LAB_24_8 : 4515 fields->f_lab_24_8 = value; 4516 break; 4517 case M32C_OPERAND_LAB_32_8 : 4518 fields->f_lab_32_8 = value; 4519 break; 4520 case M32C_OPERAND_LAB_40_8 : 4521 fields->f_lab_40_8 = value; 4522 break; 4523 case M32C_OPERAND_LAB_5_3 : 4524 fields->f_lab_5_3 = value; 4525 break; 4526 case M32C_OPERAND_LAB_8_16 : 4527 fields->f_lab_8_16 = value; 4528 break; 4529 case M32C_OPERAND_LAB_8_24 : 4530 fields->f_lab_8_24 = value; 4531 break; 4532 case M32C_OPERAND_LAB_8_8 : 4533 fields->f_lab_8_8 = value; 4534 break; 4535 case M32C_OPERAND_LAB32_JMP_S : 4536 fields->f_lab32_jmp_s = value; 4537 break; 4538 case M32C_OPERAND_Q : 4539 break; 4540 case M32C_OPERAND_R0 : 4541 break; 4542 case M32C_OPERAND_R0H : 4543 break; 4544 case M32C_OPERAND_R0L : 4545 break; 4546 case M32C_OPERAND_R1 : 4547 break; 4548 case M32C_OPERAND_R1R2R0 : 4549 break; 4550 case M32C_OPERAND_R2 : 4551 break; 4552 case M32C_OPERAND_R2R0 : 4553 break; 4554 case M32C_OPERAND_R3 : 4555 break; 4556 case M32C_OPERAND_R3R1 : 4557 break; 4558 case M32C_OPERAND_REGSETPOP : 4559 fields->f_8_8 = value; 4560 break; 4561 case M32C_OPERAND_REGSETPUSH : 4562 fields->f_8_8 = value; 4563 break; 4564 case M32C_OPERAND_RN16_PUSH_S : 4565 fields->f_4_1 = value; 4566 break; 4567 case M32C_OPERAND_S : 4568 break; 4569 case M32C_OPERAND_SRC16AN : 4570 fields->f_src16_an = value; 4571 break; 4572 case M32C_OPERAND_SRC16ANHI : 4573 fields->f_src16_an = value; 4574 break; 4575 case M32C_OPERAND_SRC16ANQI : 4576 fields->f_src16_an = value; 4577 break; 4578 case M32C_OPERAND_SRC16RNHI : 4579 fields->f_src16_rn = value; 4580 break; 4581 case M32C_OPERAND_SRC16RNQI : 4582 fields->f_src16_rn = value; 4583 break; 4584 case M32C_OPERAND_SRC32ANPREFIXED : 4585 fields->f_src32_an_prefixed = value; 4586 break; 4587 case M32C_OPERAND_SRC32ANPREFIXEDHI : 4588 fields->f_src32_an_prefixed = value; 4589 break; 4590 case M32C_OPERAND_SRC32ANPREFIXEDQI : 4591 fields->f_src32_an_prefixed = value; 4592 break; 4593 case M32C_OPERAND_SRC32ANPREFIXEDSI : 4594 fields->f_src32_an_prefixed = value; 4595 break; 4596 case M32C_OPERAND_SRC32ANUNPREFIXED : 4597 fields->f_src32_an_unprefixed = value; 4598 break; 4599 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 4600 fields->f_src32_an_unprefixed = value; 4601 break; 4602 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 4603 fields->f_src32_an_unprefixed = value; 4604 break; 4605 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 4606 fields->f_src32_an_unprefixed = value; 4607 break; 4608 case M32C_OPERAND_SRC32RNPREFIXEDHI : 4609 fields->f_src32_rn_prefixed_HI = value; 4610 break; 4611 case M32C_OPERAND_SRC32RNPREFIXEDQI : 4612 fields->f_src32_rn_prefixed_QI = value; 4613 break; 4614 case M32C_OPERAND_SRC32RNPREFIXEDSI : 4615 fields->f_src32_rn_prefixed_SI = value; 4616 break; 4617 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 4618 fields->f_src32_rn_unprefixed_HI = value; 4619 break; 4620 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 4621 fields->f_src32_rn_unprefixed_QI = value; 4622 break; 4623 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 4624 fields->f_src32_rn_unprefixed_SI = value; 4625 break; 4626 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 4627 fields->f_5_1 = value; 4628 break; 4629 case M32C_OPERAND_X : 4630 break; 4631 case M32C_OPERAND_Z : 4632 break; 4633 case M32C_OPERAND_COND16_16 : 4634 fields->f_dsp_16_u8 = value; 4635 break; 4636 case M32C_OPERAND_COND16_24 : 4637 fields->f_dsp_24_u8 = value; 4638 break; 4639 case M32C_OPERAND_COND16_32 : 4640 fields->f_dsp_32_u8 = value; 4641 break; 4642 case M32C_OPERAND_COND16C : 4643 fields->f_cond16 = value; 4644 break; 4645 case M32C_OPERAND_COND16J : 4646 fields->f_cond16 = value; 4647 break; 4648 case M32C_OPERAND_COND16J5 : 4649 fields->f_cond16j_5 = value; 4650 break; 4651 case M32C_OPERAND_COND32 : 4652 fields->f_cond32 = value; 4653 break; 4654 case M32C_OPERAND_COND32_16 : 4655 fields->f_dsp_16_u8 = value; 4656 break; 4657 case M32C_OPERAND_COND32_24 : 4658 fields->f_dsp_24_u8 = value; 4659 break; 4660 case M32C_OPERAND_COND32_32 : 4661 fields->f_dsp_32_u8 = value; 4662 break; 4663 case M32C_OPERAND_COND32_40 : 4664 fields->f_dsp_40_u8 = value; 4665 break; 4666 case M32C_OPERAND_COND32J : 4667 fields->f_cond32j = value; 4668 break; 4669 case M32C_OPERAND_CR1_PREFIXED_32 : 4670 fields->f_21_3 = value; 4671 break; 4672 case M32C_OPERAND_CR1_UNPREFIXED_32 : 4673 fields->f_13_3 = value; 4674 break; 4675 case M32C_OPERAND_CR16 : 4676 fields->f_9_3 = value; 4677 break; 4678 case M32C_OPERAND_CR2_32 : 4679 fields->f_13_3 = value; 4680 break; 4681 case M32C_OPERAND_CR3_PREFIXED_32 : 4682 fields->f_21_3 = value; 4683 break; 4684 case M32C_OPERAND_CR3_UNPREFIXED_32 : 4685 fields->f_13_3 = value; 4686 break; 4687 case M32C_OPERAND_FLAGS16 : 4688 fields->f_9_3 = value; 4689 break; 4690 case M32C_OPERAND_FLAGS32 : 4691 fields->f_13_3 = value; 4692 break; 4693 case M32C_OPERAND_SCCOND32 : 4694 fields->f_cond16 = value; 4695 break; 4696 case M32C_OPERAND_SIZE : 4697 break; 4698 4699 default : 4700 /* xgettext:c-format */ 4701 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 4702 opindex); 4703 abort (); 4704 } 4705 } 4706 4707 void 4708 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 4709 int opindex, 4710 CGEN_FIELDS * fields, 4711 bfd_vma value) 4712 { 4713 switch (opindex) 4714 { 4715 case M32C_OPERAND_A0 : 4716 break; 4717 case M32C_OPERAND_A1 : 4718 break; 4719 case M32C_OPERAND_AN16_PUSH_S : 4720 fields->f_4_1 = value; 4721 break; 4722 case M32C_OPERAND_BIT16AN : 4723 fields->f_dst16_an = value; 4724 break; 4725 case M32C_OPERAND_BIT16RN : 4726 fields->f_dst16_rn = value; 4727 break; 4728 case M32C_OPERAND_BIT3_S : 4729 fields->f_imm3_S = value; 4730 break; 4731 case M32C_OPERAND_BIT32ANPREFIXED : 4732 fields->f_dst32_an_prefixed = value; 4733 break; 4734 case M32C_OPERAND_BIT32ANUNPREFIXED : 4735 fields->f_dst32_an_unprefixed = value; 4736 break; 4737 case M32C_OPERAND_BIT32RNPREFIXED : 4738 fields->f_dst32_rn_prefixed_QI = value; 4739 break; 4740 case M32C_OPERAND_BIT32RNUNPREFIXED : 4741 fields->f_dst32_rn_unprefixed_QI = value; 4742 break; 4743 case M32C_OPERAND_BITBASE16_16_S8 : 4744 fields->f_dsp_16_s8 = value; 4745 break; 4746 case M32C_OPERAND_BITBASE16_16_U16 : 4747 fields->f_dsp_16_u16 = value; 4748 break; 4749 case M32C_OPERAND_BITBASE16_16_U8 : 4750 fields->f_dsp_16_u8 = value; 4751 break; 4752 case M32C_OPERAND_BITBASE16_8_U11_S : 4753 fields->f_bitbase16_u11_S = value; 4754 break; 4755 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 4756 fields->f_bitbase32_16_s11_unprefixed = value; 4757 break; 4758 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 4759 fields->f_bitbase32_16_s19_unprefixed = value; 4760 break; 4761 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 4762 fields->f_bitbase32_16_u11_unprefixed = value; 4763 break; 4764 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 4765 fields->f_bitbase32_16_u19_unprefixed = value; 4766 break; 4767 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 4768 fields->f_bitbase32_16_u27_unprefixed = value; 4769 break; 4770 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 4771 fields->f_bitbase32_24_s11_prefixed = value; 4772 break; 4773 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 4774 fields->f_bitbase32_24_s19_prefixed = value; 4775 break; 4776 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 4777 fields->f_bitbase32_24_u11_prefixed = value; 4778 break; 4779 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 4780 fields->f_bitbase32_24_u19_prefixed = value; 4781 break; 4782 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 4783 fields->f_bitbase32_24_u27_prefixed = value; 4784 break; 4785 case M32C_OPERAND_BITNO16R : 4786 fields->f_dsp_16_u8 = value; 4787 break; 4788 case M32C_OPERAND_BITNO32PREFIXED : 4789 fields->f_bitno32_prefixed = value; 4790 break; 4791 case M32C_OPERAND_BITNO32UNPREFIXED : 4792 fields->f_bitno32_unprefixed = value; 4793 break; 4794 case M32C_OPERAND_DSP_10_U6 : 4795 fields->f_dsp_10_u6 = value; 4796 break; 4797 case M32C_OPERAND_DSP_16_S16 : 4798 fields->f_dsp_16_s16 = value; 4799 break; 4800 case M32C_OPERAND_DSP_16_S8 : 4801 fields->f_dsp_16_s8 = value; 4802 break; 4803 case M32C_OPERAND_DSP_16_U16 : 4804 fields->f_dsp_16_u16 = value; 4805 break; 4806 case M32C_OPERAND_DSP_16_U20 : 4807 fields->f_dsp_16_u24 = value; 4808 break; 4809 case M32C_OPERAND_DSP_16_U24 : 4810 fields->f_dsp_16_u24 = value; 4811 break; 4812 case M32C_OPERAND_DSP_16_U8 : 4813 fields->f_dsp_16_u8 = value; 4814 break; 4815 case M32C_OPERAND_DSP_24_S16 : 4816 fields->f_dsp_24_s16 = value; 4817 break; 4818 case M32C_OPERAND_DSP_24_S8 : 4819 fields->f_dsp_24_s8 = value; 4820 break; 4821 case M32C_OPERAND_DSP_24_U16 : 4822 fields->f_dsp_24_u16 = value; 4823 break; 4824 case M32C_OPERAND_DSP_24_U20 : 4825 fields->f_dsp_24_u24 = value; 4826 break; 4827 case M32C_OPERAND_DSP_24_U24 : 4828 fields->f_dsp_24_u24 = value; 4829 break; 4830 case M32C_OPERAND_DSP_24_U8 : 4831 fields->f_dsp_24_u8 = value; 4832 break; 4833 case M32C_OPERAND_DSP_32_S16 : 4834 fields->f_dsp_32_s16 = value; 4835 break; 4836 case M32C_OPERAND_DSP_32_S8 : 4837 fields->f_dsp_32_s8 = value; 4838 break; 4839 case M32C_OPERAND_DSP_32_U16 : 4840 fields->f_dsp_32_u16 = value; 4841 break; 4842 case M32C_OPERAND_DSP_32_U20 : 4843 fields->f_dsp_32_u24 = value; 4844 break; 4845 case M32C_OPERAND_DSP_32_U24 : 4846 fields->f_dsp_32_u24 = value; 4847 break; 4848 case M32C_OPERAND_DSP_32_U8 : 4849 fields->f_dsp_32_u8 = value; 4850 break; 4851 case M32C_OPERAND_DSP_40_S16 : 4852 fields->f_dsp_40_s16 = value; 4853 break; 4854 case M32C_OPERAND_DSP_40_S8 : 4855 fields->f_dsp_40_s8 = value; 4856 break; 4857 case M32C_OPERAND_DSP_40_U16 : 4858 fields->f_dsp_40_u16 = value; 4859 break; 4860 case M32C_OPERAND_DSP_40_U20 : 4861 fields->f_dsp_40_u20 = value; 4862 break; 4863 case M32C_OPERAND_DSP_40_U24 : 4864 fields->f_dsp_40_u24 = value; 4865 break; 4866 case M32C_OPERAND_DSP_40_U8 : 4867 fields->f_dsp_40_u8 = value; 4868 break; 4869 case M32C_OPERAND_DSP_48_S16 : 4870 fields->f_dsp_48_s16 = value; 4871 break; 4872 case M32C_OPERAND_DSP_48_S8 : 4873 fields->f_dsp_48_s8 = value; 4874 break; 4875 case M32C_OPERAND_DSP_48_U16 : 4876 fields->f_dsp_48_u16 = value; 4877 break; 4878 case M32C_OPERAND_DSP_48_U20 : 4879 fields->f_dsp_48_u20 = value; 4880 break; 4881 case M32C_OPERAND_DSP_48_U24 : 4882 fields->f_dsp_48_u24 = value; 4883 break; 4884 case M32C_OPERAND_DSP_48_U8 : 4885 fields->f_dsp_48_u8 = value; 4886 break; 4887 case M32C_OPERAND_DSP_8_S24 : 4888 fields->f_dsp_8_s24 = value; 4889 break; 4890 case M32C_OPERAND_DSP_8_S8 : 4891 fields->f_dsp_8_s8 = value; 4892 break; 4893 case M32C_OPERAND_DSP_8_U16 : 4894 fields->f_dsp_8_u16 = value; 4895 break; 4896 case M32C_OPERAND_DSP_8_U24 : 4897 fields->f_dsp_8_u24 = value; 4898 break; 4899 case M32C_OPERAND_DSP_8_U6 : 4900 fields->f_dsp_8_u6 = value; 4901 break; 4902 case M32C_OPERAND_DSP_8_U8 : 4903 fields->f_dsp_8_u8 = value; 4904 break; 4905 case M32C_OPERAND_DST16AN : 4906 fields->f_dst16_an = value; 4907 break; 4908 case M32C_OPERAND_DST16AN_S : 4909 fields->f_dst16_an_s = value; 4910 break; 4911 case M32C_OPERAND_DST16ANHI : 4912 fields->f_dst16_an = value; 4913 break; 4914 case M32C_OPERAND_DST16ANQI : 4915 fields->f_dst16_an = value; 4916 break; 4917 case M32C_OPERAND_DST16ANQI_S : 4918 fields->f_dst16_rn_QI_s = value; 4919 break; 4920 case M32C_OPERAND_DST16ANSI : 4921 fields->f_dst16_an = value; 4922 break; 4923 case M32C_OPERAND_DST16RNEXTQI : 4924 fields->f_dst16_rn_ext = value; 4925 break; 4926 case M32C_OPERAND_DST16RNHI : 4927 fields->f_dst16_rn = value; 4928 break; 4929 case M32C_OPERAND_DST16RNQI : 4930 fields->f_dst16_rn = value; 4931 break; 4932 case M32C_OPERAND_DST16RNQI_S : 4933 fields->f_dst16_rn_QI_s = value; 4934 break; 4935 case M32C_OPERAND_DST16RNSI : 4936 fields->f_dst16_rn = value; 4937 break; 4938 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 4939 fields->f_dst32_an_unprefixed = value; 4940 break; 4941 case M32C_OPERAND_DST32ANPREFIXED : 4942 fields->f_dst32_an_prefixed = value; 4943 break; 4944 case M32C_OPERAND_DST32ANPREFIXEDHI : 4945 fields->f_dst32_an_prefixed = value; 4946 break; 4947 case M32C_OPERAND_DST32ANPREFIXEDQI : 4948 fields->f_dst32_an_prefixed = value; 4949 break; 4950 case M32C_OPERAND_DST32ANPREFIXEDSI : 4951 fields->f_dst32_an_prefixed = value; 4952 break; 4953 case M32C_OPERAND_DST32ANUNPREFIXED : 4954 fields->f_dst32_an_unprefixed = value; 4955 break; 4956 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 4957 fields->f_dst32_an_unprefixed = value; 4958 break; 4959 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 4960 fields->f_dst32_an_unprefixed = value; 4961 break; 4962 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 4963 fields->f_dst32_an_unprefixed = value; 4964 break; 4965 case M32C_OPERAND_DST32R0HI_S : 4966 break; 4967 case M32C_OPERAND_DST32R0QI_S : 4968 break; 4969 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 4970 fields->f_dst32_rn_ext_unprefixed = value; 4971 break; 4972 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 4973 fields->f_dst32_rn_ext_unprefixed = value; 4974 break; 4975 case M32C_OPERAND_DST32RNPREFIXEDHI : 4976 fields->f_dst32_rn_prefixed_HI = value; 4977 break; 4978 case M32C_OPERAND_DST32RNPREFIXEDQI : 4979 fields->f_dst32_rn_prefixed_QI = value; 4980 break; 4981 case M32C_OPERAND_DST32RNPREFIXEDSI : 4982 fields->f_dst32_rn_prefixed_SI = value; 4983 break; 4984 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 4985 fields->f_dst32_rn_unprefixed_HI = value; 4986 break; 4987 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 4988 fields->f_dst32_rn_unprefixed_QI = value; 4989 break; 4990 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 4991 fields->f_dst32_rn_unprefixed_SI = value; 4992 break; 4993 case M32C_OPERAND_G : 4994 break; 4995 case M32C_OPERAND_IMM_12_S4 : 4996 fields->f_imm_12_s4 = value; 4997 break; 4998 case M32C_OPERAND_IMM_12_S4N : 4999 fields->f_imm_12_s4 = value; 5000 break; 5001 case M32C_OPERAND_IMM_13_U3 : 5002 fields->f_imm_13_u3 = value; 5003 break; 5004 case M32C_OPERAND_IMM_16_HI : 5005 fields->f_dsp_16_s16 = value; 5006 break; 5007 case M32C_OPERAND_IMM_16_QI : 5008 fields->f_dsp_16_s8 = value; 5009 break; 5010 case M32C_OPERAND_IMM_16_SI : 5011 fields->f_dsp_16_s32 = value; 5012 break; 5013 case M32C_OPERAND_IMM_20_S4 : 5014 fields->f_imm_20_s4 = value; 5015 break; 5016 case M32C_OPERAND_IMM_24_HI : 5017 fields->f_dsp_24_s16 = value; 5018 break; 5019 case M32C_OPERAND_IMM_24_QI : 5020 fields->f_dsp_24_s8 = value; 5021 break; 5022 case M32C_OPERAND_IMM_24_SI : 5023 fields->f_dsp_24_s32 = value; 5024 break; 5025 case M32C_OPERAND_IMM_32_HI : 5026 fields->f_dsp_32_s16 = value; 5027 break; 5028 case M32C_OPERAND_IMM_32_QI : 5029 fields->f_dsp_32_s8 = value; 5030 break; 5031 case M32C_OPERAND_IMM_32_SI : 5032 fields->f_dsp_32_s32 = value; 5033 break; 5034 case M32C_OPERAND_IMM_40_HI : 5035 fields->f_dsp_40_s16 = value; 5036 break; 5037 case M32C_OPERAND_IMM_40_QI : 5038 fields->f_dsp_40_s8 = value; 5039 break; 5040 case M32C_OPERAND_IMM_40_SI : 5041 fields->f_dsp_40_s32 = value; 5042 break; 5043 case M32C_OPERAND_IMM_48_HI : 5044 fields->f_dsp_48_s16 = value; 5045 break; 5046 case M32C_OPERAND_IMM_48_QI : 5047 fields->f_dsp_48_s8 = value; 5048 break; 5049 case M32C_OPERAND_IMM_48_SI : 5050 fields->f_dsp_48_s32 = value; 5051 break; 5052 case M32C_OPERAND_IMM_56_HI : 5053 fields->f_dsp_56_s16 = value; 5054 break; 5055 case M32C_OPERAND_IMM_56_QI : 5056 fields->f_dsp_56_s8 = value; 5057 break; 5058 case M32C_OPERAND_IMM_64_HI : 5059 fields->f_dsp_64_s16 = value; 5060 break; 5061 case M32C_OPERAND_IMM_8_HI : 5062 fields->f_dsp_8_s16 = value; 5063 break; 5064 case M32C_OPERAND_IMM_8_QI : 5065 fields->f_dsp_8_s8 = value; 5066 break; 5067 case M32C_OPERAND_IMM_8_S4 : 5068 fields->f_imm_8_s4 = value; 5069 break; 5070 case M32C_OPERAND_IMM_8_S4N : 5071 fields->f_imm_8_s4 = value; 5072 break; 5073 case M32C_OPERAND_IMM_SH_12_S4 : 5074 fields->f_imm_12_s4 = value; 5075 break; 5076 case M32C_OPERAND_IMM_SH_20_S4 : 5077 fields->f_imm_20_s4 = value; 5078 break; 5079 case M32C_OPERAND_IMM_SH_8_S4 : 5080 fields->f_imm_8_s4 = value; 5081 break; 5082 case M32C_OPERAND_IMM1_S : 5083 fields->f_imm1_S = value; 5084 break; 5085 case M32C_OPERAND_IMM3_S : 5086 fields->f_imm3_S = value; 5087 break; 5088 case M32C_OPERAND_LAB_16_8 : 5089 fields->f_lab_16_8 = value; 5090 break; 5091 case M32C_OPERAND_LAB_24_8 : 5092 fields->f_lab_24_8 = value; 5093 break; 5094 case M32C_OPERAND_LAB_32_8 : 5095 fields->f_lab_32_8 = value; 5096 break; 5097 case M32C_OPERAND_LAB_40_8 : 5098 fields->f_lab_40_8 = value; 5099 break; 5100 case M32C_OPERAND_LAB_5_3 : 5101 fields->f_lab_5_3 = value; 5102 break; 5103 case M32C_OPERAND_LAB_8_16 : 5104 fields->f_lab_8_16 = value; 5105 break; 5106 case M32C_OPERAND_LAB_8_24 : 5107 fields->f_lab_8_24 = value; 5108 break; 5109 case M32C_OPERAND_LAB_8_8 : 5110 fields->f_lab_8_8 = value; 5111 break; 5112 case M32C_OPERAND_LAB32_JMP_S : 5113 fields->f_lab32_jmp_s = value; 5114 break; 5115 case M32C_OPERAND_Q : 5116 break; 5117 case M32C_OPERAND_R0 : 5118 break; 5119 case M32C_OPERAND_R0H : 5120 break; 5121 case M32C_OPERAND_R0L : 5122 break; 5123 case M32C_OPERAND_R1 : 5124 break; 5125 case M32C_OPERAND_R1R2R0 : 5126 break; 5127 case M32C_OPERAND_R2 : 5128 break; 5129 case M32C_OPERAND_R2R0 : 5130 break; 5131 case M32C_OPERAND_R3 : 5132 break; 5133 case M32C_OPERAND_R3R1 : 5134 break; 5135 case M32C_OPERAND_REGSETPOP : 5136 fields->f_8_8 = value; 5137 break; 5138 case M32C_OPERAND_REGSETPUSH : 5139 fields->f_8_8 = value; 5140 break; 5141 case M32C_OPERAND_RN16_PUSH_S : 5142 fields->f_4_1 = value; 5143 break; 5144 case M32C_OPERAND_S : 5145 break; 5146 case M32C_OPERAND_SRC16AN : 5147 fields->f_src16_an = value; 5148 break; 5149 case M32C_OPERAND_SRC16ANHI : 5150 fields->f_src16_an = value; 5151 break; 5152 case M32C_OPERAND_SRC16ANQI : 5153 fields->f_src16_an = value; 5154 break; 5155 case M32C_OPERAND_SRC16RNHI : 5156 fields->f_src16_rn = value; 5157 break; 5158 case M32C_OPERAND_SRC16RNQI : 5159 fields->f_src16_rn = value; 5160 break; 5161 case M32C_OPERAND_SRC32ANPREFIXED : 5162 fields->f_src32_an_prefixed = value; 5163 break; 5164 case M32C_OPERAND_SRC32ANPREFIXEDHI : 5165 fields->f_src32_an_prefixed = value; 5166 break; 5167 case M32C_OPERAND_SRC32ANPREFIXEDQI : 5168 fields->f_src32_an_prefixed = value; 5169 break; 5170 case M32C_OPERAND_SRC32ANPREFIXEDSI : 5171 fields->f_src32_an_prefixed = value; 5172 break; 5173 case M32C_OPERAND_SRC32ANUNPREFIXED : 5174 fields->f_src32_an_unprefixed = value; 5175 break; 5176 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 5177 fields->f_src32_an_unprefixed = value; 5178 break; 5179 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 5180 fields->f_src32_an_unprefixed = value; 5181 break; 5182 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 5183 fields->f_src32_an_unprefixed = value; 5184 break; 5185 case M32C_OPERAND_SRC32RNPREFIXEDHI : 5186 fields->f_src32_rn_prefixed_HI = value; 5187 break; 5188 case M32C_OPERAND_SRC32RNPREFIXEDQI : 5189 fields->f_src32_rn_prefixed_QI = value; 5190 break; 5191 case M32C_OPERAND_SRC32RNPREFIXEDSI : 5192 fields->f_src32_rn_prefixed_SI = value; 5193 break; 5194 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 5195 fields->f_src32_rn_unprefixed_HI = value; 5196 break; 5197 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 5198 fields->f_src32_rn_unprefixed_QI = value; 5199 break; 5200 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 5201 fields->f_src32_rn_unprefixed_SI = value; 5202 break; 5203 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 5204 fields->f_5_1 = value; 5205 break; 5206 case M32C_OPERAND_X : 5207 break; 5208 case M32C_OPERAND_Z : 5209 break; 5210 case M32C_OPERAND_COND16_16 : 5211 fields->f_dsp_16_u8 = value; 5212 break; 5213 case M32C_OPERAND_COND16_24 : 5214 fields->f_dsp_24_u8 = value; 5215 break; 5216 case M32C_OPERAND_COND16_32 : 5217 fields->f_dsp_32_u8 = value; 5218 break; 5219 case M32C_OPERAND_COND16C : 5220 fields->f_cond16 = value; 5221 break; 5222 case M32C_OPERAND_COND16J : 5223 fields->f_cond16 = value; 5224 break; 5225 case M32C_OPERAND_COND16J5 : 5226 fields->f_cond16j_5 = value; 5227 break; 5228 case M32C_OPERAND_COND32 : 5229 fields->f_cond32 = value; 5230 break; 5231 case M32C_OPERAND_COND32_16 : 5232 fields->f_dsp_16_u8 = value; 5233 break; 5234 case M32C_OPERAND_COND32_24 : 5235 fields->f_dsp_24_u8 = value; 5236 break; 5237 case M32C_OPERAND_COND32_32 : 5238 fields->f_dsp_32_u8 = value; 5239 break; 5240 case M32C_OPERAND_COND32_40 : 5241 fields->f_dsp_40_u8 = value; 5242 break; 5243 case M32C_OPERAND_COND32J : 5244 fields->f_cond32j = value; 5245 break; 5246 case M32C_OPERAND_CR1_PREFIXED_32 : 5247 fields->f_21_3 = value; 5248 break; 5249 case M32C_OPERAND_CR1_UNPREFIXED_32 : 5250 fields->f_13_3 = value; 5251 break; 5252 case M32C_OPERAND_CR16 : 5253 fields->f_9_3 = value; 5254 break; 5255 case M32C_OPERAND_CR2_32 : 5256 fields->f_13_3 = value; 5257 break; 5258 case M32C_OPERAND_CR3_PREFIXED_32 : 5259 fields->f_21_3 = value; 5260 break; 5261 case M32C_OPERAND_CR3_UNPREFIXED_32 : 5262 fields->f_13_3 = value; 5263 break; 5264 case M32C_OPERAND_FLAGS16 : 5265 fields->f_9_3 = value; 5266 break; 5267 case M32C_OPERAND_FLAGS32 : 5268 fields->f_13_3 = value; 5269 break; 5270 case M32C_OPERAND_SCCOND32 : 5271 fields->f_cond16 = value; 5272 break; 5273 case M32C_OPERAND_SIZE : 5274 break; 5275 5276 default : 5277 /* xgettext:c-format */ 5278 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 5279 opindex); 5280 abort (); 5281 } 5282 } 5283 5284 /* Function to call before using the instruction builder tables. */ 5285 5286 void 5287 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd) 5288 { 5289 cd->insert_handlers = & m32c_cgen_insert_handlers[0]; 5290 cd->extract_handlers = & m32c_cgen_extract_handlers[0]; 5291 5292 cd->insert_operand = m32c_cgen_insert_operand; 5293 cd->extract_operand = m32c_cgen_extract_operand; 5294 5295 cd->get_int_operand = m32c_cgen_get_int_operand; 5296 cd->set_int_operand = m32c_cgen_set_int_operand; 5297 cd->get_vma_operand = m32c_cgen_get_vma_operand; 5298 cd->set_vma_operand = m32c_cgen_set_vma_operand; 5299 } 5300
