1 /* Instruction building/extraction support for or1k. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2016 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "or1k-desc.h" 34 #include "or1k-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift_within_word, shift_to_word, shift; 212 213 /* How to shift the value to BIT0 of the word. */ 214 shift_to_word = total_length - (word_offset + word_length); 215 216 /* How to shift the value to the field within the word. */ 217 if (CGEN_INSN_LSB0_P) 218 shift_within_word = start + 1 - length; 219 else 220 shift_within_word = word_length - start - length; 221 222 /* The total SHIFT, then mask in the value. */ 223 shift = shift_to_word + shift_within_word; 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 225 } 226 227 #else /* ! CGEN_INT_INSN_P */ 228 229 { 230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 231 232 insert_1 (cd, value, start, length, word_length, bufp); 233 } 234 235 #endif /* ! CGEN_INT_INSN_P */ 236 237 return NULL; 238 } 239 240 /* Default insn builder (insert handler). 241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 243 recorded in host byte order, otherwise BUFFER is an array of bytes 244 and the value is recorded in target byte order). 245 The result is an error message or NULL if success. */ 246 247 static const char * 248 insert_insn_normal (CGEN_CPU_DESC cd, 249 const CGEN_INSN * insn, 250 CGEN_FIELDS * fields, 251 CGEN_INSN_BYTES_PTR buffer, 252 bfd_vma pc) 253 { 254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 255 unsigned long value; 256 const CGEN_SYNTAX_CHAR_TYPE * syn; 257 258 CGEN_INIT_INSERT (cd); 259 value = CGEN_INSN_BASE_VALUE (insn); 260 261 /* If we're recording insns as numbers (rather than a string of bytes), 262 target byte order handling is deferred until later. */ 263 264 #if CGEN_INT_INSN_P 265 266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 267 CGEN_FIELDS_BITSIZE (fields), value); 268 269 #else 270 271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 272 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 273 value); 274 275 #endif /* ! CGEN_INT_INSN_P */ 276 277 /* ??? It would be better to scan the format's fields. 278 Still need to be able to insert a value based on the operand though; 279 e.g. storing a branch displacement that got resolved later. 280 Needs more thought first. */ 281 282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 283 { 284 const char *errmsg; 285 286 if (CGEN_SYNTAX_CHAR_P (* syn)) 287 continue; 288 289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 290 fields, buffer, pc); 291 if (errmsg) 292 return errmsg; 293 } 294 295 return NULL; 296 } 297 298 #if CGEN_INT_INSN_P 299 /* Cover function to store an insn value into an integral insn. Must go here 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 301 302 static void 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 304 CGEN_INSN_BYTES_PTR buf, 305 int length, 306 int insn_length, 307 CGEN_INSN_INT value) 308 { 309 /* For architectures with insns smaller than the base-insn-bitsize, 310 length may be too big. */ 311 if (length > insn_length) 312 *buf = value; 313 else 314 { 315 int shift = insn_length - length; 316 /* Written this way to avoid undefined behaviour. */ 317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 318 319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 320 } 321 } 322 #endif 323 324 /* Operand extraction. */ 326 327 #if ! CGEN_INT_INSN_P 328 329 /* Subroutine of extract_normal. 330 Ensure sufficient bytes are cached in EX_INFO. 331 OFFSET is the offset in bytes from the start of the insn of the value. 332 BYTES is the length of the needed value. 333 Returns 1 for success, 0 for failure. */ 334 335 static CGEN_INLINE int 336 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 CGEN_EXTRACT_INFO *ex_info, 338 int offset, 339 int bytes, 340 bfd_vma pc) 341 { 342 /* It's doubtful that the middle part has already been fetched so 343 we don't optimize that case. kiss. */ 344 unsigned int mask; 345 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 346 347 /* First do a quick check. */ 348 mask = (1 << bytes) - 1; 349 if (((ex_info->valid >> offset) & mask) == mask) 350 return 1; 351 352 /* Search for the first byte we need to read. */ 353 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 354 if (! (mask & ex_info->valid)) 355 break; 356 357 if (bytes) 358 { 359 int status; 360 361 pc += offset; 362 status = (*info->read_memory_func) 363 (pc, ex_info->insn_bytes + offset, bytes, info); 364 365 if (status != 0) 366 { 367 (*info->memory_error_func) (status, pc, info); 368 return 0; 369 } 370 371 ex_info->valid |= ((1 << bytes) - 1) << offset; 372 } 373 374 return 1; 375 } 376 377 /* Subroutine of extract_normal. */ 378 379 static CGEN_INLINE long 380 extract_1 (CGEN_CPU_DESC cd, 381 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 382 int start, 383 int length, 384 int word_length, 385 unsigned char *bufp, 386 bfd_vma pc ATTRIBUTE_UNUSED) 387 { 388 unsigned long x; 389 int shift; 390 391 x = cgen_get_insn_value (cd, bufp, word_length); 392 393 if (CGEN_INSN_LSB0_P) 394 shift = (start + 1) - length; 395 else 396 shift = (word_length - (start + length)); 397 return x >> shift; 398 } 399 400 #endif /* ! CGEN_INT_INSN_P */ 401 402 /* Default extraction routine. 403 404 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 405 or sometimes less for cases like the m32r where the base insn size is 32 406 but some insns are 16 bits. 407 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 408 but for generality we take a bitmask of all of them. 409 WORD_OFFSET is the offset in bits from the start of the insn of the value. 410 WORD_LENGTH is the length of the word in bits in which the value resides. 411 START is the starting bit number in the word, architecture origin. 412 LENGTH is the length of VALUE in bits. 413 TOTAL_LENGTH is the total length of the insn in bits. 414 415 Returns 1 for success, 0 for failure. */ 416 417 /* ??? The return code isn't properly used. wip. */ 418 419 /* ??? This doesn't handle bfd_vma's. Create another function when 420 necessary. */ 421 422 static int 423 extract_normal (CGEN_CPU_DESC cd, 424 #if ! CGEN_INT_INSN_P 425 CGEN_EXTRACT_INFO *ex_info, 426 #else 427 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 428 #endif 429 CGEN_INSN_INT insn_value, 430 unsigned int attrs, 431 unsigned int word_offset, 432 unsigned int start, 433 unsigned int length, 434 unsigned int word_length, 435 unsigned int total_length, 436 #if ! CGEN_INT_INSN_P 437 bfd_vma pc, 438 #else 439 bfd_vma pc ATTRIBUTE_UNUSED, 440 #endif 441 long *valuep) 442 { 443 long value, mask; 444 445 /* If LENGTH is zero, this operand doesn't contribute to the value 446 so give it a standard value of zero. */ 447 if (length == 0) 448 { 449 *valuep = 0; 450 return 1; 451 } 452 453 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 454 abort (); 455 456 /* For architectures with insns smaller than the insn-base-bitsize, 457 word_length may be too big. */ 458 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 459 { 460 if (word_offset + word_length > total_length) 461 word_length = total_length - word_offset; 462 } 463 464 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 465 466 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 467 { 468 if (CGEN_INSN_LSB0_P) 469 value = insn_value >> ((word_offset + start + 1) - length); 470 else 471 value = insn_value >> (total_length - ( word_offset + start + length)); 472 } 473 474 #if ! CGEN_INT_INSN_P 475 476 else 477 { 478 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 479 480 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 481 abort (); 482 483 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 484 return 0; 485 486 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 487 } 488 489 #endif /* ! CGEN_INT_INSN_P */ 490 491 /* Written this way to avoid undefined behaviour. */ 492 mask = (((1L << (length - 1)) - 1) << 1) | 1; 493 494 value &= mask; 495 /* sign extend? */ 496 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 497 && (value & (1L << (length - 1)))) 498 value |= ~mask; 499 500 *valuep = value; 501 502 return 1; 503 } 504 505 /* Default insn extractor. 506 507 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 508 The extracted fields are stored in FIELDS. 509 EX_INFO is used to handle reading variable length insns. 510 Return the length of the insn in bits, or 0 if no match, 511 or -1 if an error occurs fetching data (memory_error_func will have 512 been called). */ 513 514 static int 515 extract_insn_normal (CGEN_CPU_DESC cd, 516 const CGEN_INSN *insn, 517 CGEN_EXTRACT_INFO *ex_info, 518 CGEN_INSN_INT insn_value, 519 CGEN_FIELDS *fields, 520 bfd_vma pc) 521 { 522 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 523 const CGEN_SYNTAX_CHAR_TYPE *syn; 524 525 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 526 527 CGEN_INIT_EXTRACT (cd); 528 529 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 530 { 531 int length; 532 533 if (CGEN_SYNTAX_CHAR_P (*syn)) 534 continue; 535 536 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 537 ex_info, insn_value, fields, pc); 538 if (length <= 0) 539 return length; 540 } 541 542 /* We recognized and successfully extracted this insn. */ 543 return CGEN_INSN_BITSIZE (insn); 544 } 545 546 /* Machine generated code added here. */ 548 549 const char * or1k_cgen_insert_operand 550 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 551 552 /* Main entry point for operand insertion. 553 554 This function is basically just a big switch statement. Earlier versions 555 used tables to look up the function to use, but 556 - if the table contains both assembler and disassembler functions then 557 the disassembler contains much of the assembler and vice-versa, 558 - there's a lot of inlining possibilities as things grow, 559 - using a switch statement avoids the function call overhead. 560 561 This function could be moved into `parse_insn_normal', but keeping it 562 separate makes clear the interface between `parse_insn_normal' and each of 563 the handlers. It's also needed by GAS to insert operands that couldn't be 564 resolved during parsing. */ 565 566 const char * 567 or1k_cgen_insert_operand (CGEN_CPU_DESC cd, 568 int opindex, 569 CGEN_FIELDS * fields, 570 CGEN_INSN_BYTES_PTR buffer, 571 bfd_vma pc ATTRIBUTE_UNUSED) 572 { 573 const char * errmsg = NULL; 574 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 575 576 switch (opindex) 577 { 578 case OR1K_OPERAND_DISP26 : 579 { 580 long value = fields->f_disp26; 581 value = ((SI) (((value) - (pc))) >> (2)); 582 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer); 583 } 584 break; 585 case OR1K_OPERAND_RA : 586 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer); 587 break; 588 case OR1K_OPERAND_RADF : 589 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer); 590 break; 591 case OR1K_OPERAND_RASF : 592 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer); 593 break; 594 case OR1K_OPERAND_RB : 595 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer); 596 break; 597 case OR1K_OPERAND_RBDF : 598 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer); 599 break; 600 case OR1K_OPERAND_RBSF : 601 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer); 602 break; 603 case OR1K_OPERAND_RD : 604 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer); 605 break; 606 case OR1K_OPERAND_RDDF : 607 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer); 608 break; 609 case OR1K_OPERAND_RDSF : 610 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer); 611 break; 612 case OR1K_OPERAND_SIMM16 : 613 errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, buffer); 614 break; 615 case OR1K_OPERAND_SIMM16_SPLIT : 616 { 617 { 618 FLD (f_imm16_25_5) = ((((INT) (FLD (f_simm16_split)) >> (11))) & (31)); 619 FLD (f_imm16_10_11) = ((FLD (f_simm16_split)) & (2047)); 620 } 621 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer); 622 if (errmsg) 623 break; 624 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer); 625 if (errmsg) 626 break; 627 } 628 break; 629 case OR1K_OPERAND_UIMM16 : 630 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 15, 16, 32, total_length, buffer); 631 break; 632 case OR1K_OPERAND_UIMM16_SPLIT : 633 { 634 { 635 FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31)); 636 FLD (f_imm16_10_11) = ((FLD (f_uimm16_split)) & (2047)); 637 } 638 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer); 639 if (errmsg) 640 break; 641 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer); 642 if (errmsg) 643 break; 644 } 645 break; 646 case OR1K_OPERAND_UIMM6 : 647 errmsg = insert_normal (cd, fields->f_uimm6, 0, 0, 5, 6, 32, total_length, buffer); 648 break; 649 650 default : 651 /* xgettext:c-format */ 652 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 653 opindex); 654 abort (); 655 } 656 657 return errmsg; 658 } 659 660 int or1k_cgen_extract_operand 661 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 662 663 /* Main entry point for operand extraction. 664 The result is <= 0 for error, >0 for success. 665 ??? Actual values aren't well defined right now. 666 667 This function is basically just a big switch statement. Earlier versions 668 used tables to look up the function to use, but 669 - if the table contains both assembler and disassembler functions then 670 the disassembler contains much of the assembler and vice-versa, 671 - there's a lot of inlining possibilities as things grow, 672 - using a switch statement avoids the function call overhead. 673 674 This function could be moved into `print_insn_normal', but keeping it 675 separate makes clear the interface between `print_insn_normal' and each of 676 the handlers. */ 677 678 int 679 or1k_cgen_extract_operand (CGEN_CPU_DESC cd, 680 int opindex, 681 CGEN_EXTRACT_INFO *ex_info, 682 CGEN_INSN_INT insn_value, 683 CGEN_FIELDS * fields, 684 bfd_vma pc) 685 { 686 /* Assume success (for those operands that are nops). */ 687 int length = 1; 688 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 689 690 switch (opindex) 691 { 692 case OR1K_OPERAND_DISP26 : 693 { 694 long value; 695 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value); 696 value = ((((value) << (2))) + (pc)); 697 fields->f_disp26 = value; 698 } 699 break; 700 case OR1K_OPERAND_RA : 701 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2); 702 break; 703 case OR1K_OPERAND_RADF : 704 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1); 705 break; 706 case OR1K_OPERAND_RASF : 707 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2); 708 break; 709 case OR1K_OPERAND_RB : 710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3); 711 break; 712 case OR1K_OPERAND_RBDF : 713 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1); 714 break; 715 case OR1K_OPERAND_RBSF : 716 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3); 717 break; 718 case OR1K_OPERAND_RD : 719 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1); 720 break; 721 case OR1K_OPERAND_RDDF : 722 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1); 723 break; 724 case OR1K_OPERAND_RDSF : 725 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1); 726 break; 727 case OR1K_OPERAND_SIMM16 : 728 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, pc, & fields->f_simm16); 729 break; 730 case OR1K_OPERAND_SIMM16_SPLIT : 731 { 732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5); 733 if (length <= 0) break; 734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11); 735 if (length <= 0) break; 736 FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11))))); 737 } 738 break; 739 case OR1K_OPERAND_UIMM16 : 740 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm16); 741 break; 742 case OR1K_OPERAND_UIMM16_SPLIT : 743 { 744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5); 745 if (length <= 0) break; 746 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11); 747 if (length <= 0) break; 748 FLD (f_uimm16_split) = ((UHI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11))))); 749 } 750 break; 751 case OR1K_OPERAND_UIMM6 : 752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_uimm6); 753 break; 754 755 default : 756 /* xgettext:c-format */ 757 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 758 opindex); 759 abort (); 760 } 761 762 return length; 763 } 764 765 cgen_insert_fn * const or1k_cgen_insert_handlers[] = 766 { 767 insert_insn_normal, 768 }; 769 770 cgen_extract_fn * const or1k_cgen_extract_handlers[] = 771 { 772 extract_insn_normal, 773 }; 774 775 int or1k_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 776 bfd_vma or1k_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 777 778 /* Getting values from cgen_fields is handled by a collection of functions. 779 They are distinguished by the type of the VALUE argument they return. 780 TODO: floating point, inlining support, remove cases where result type 781 not appropriate. */ 782 783 int 784 or1k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 785 int opindex, 786 const CGEN_FIELDS * fields) 787 { 788 int value; 789 790 switch (opindex) 791 { 792 case OR1K_OPERAND_DISP26 : 793 value = fields->f_disp26; 794 break; 795 case OR1K_OPERAND_RA : 796 value = fields->f_r2; 797 break; 798 case OR1K_OPERAND_RADF : 799 value = fields->f_r1; 800 break; 801 case OR1K_OPERAND_RASF : 802 value = fields->f_r2; 803 break; 804 case OR1K_OPERAND_RB : 805 value = fields->f_r3; 806 break; 807 case OR1K_OPERAND_RBDF : 808 value = fields->f_r1; 809 break; 810 case OR1K_OPERAND_RBSF : 811 value = fields->f_r3; 812 break; 813 case OR1K_OPERAND_RD : 814 value = fields->f_r1; 815 break; 816 case OR1K_OPERAND_RDDF : 817 value = fields->f_r1; 818 break; 819 case OR1K_OPERAND_RDSF : 820 value = fields->f_r1; 821 break; 822 case OR1K_OPERAND_SIMM16 : 823 value = fields->f_simm16; 824 break; 825 case OR1K_OPERAND_SIMM16_SPLIT : 826 value = fields->f_simm16_split; 827 break; 828 case OR1K_OPERAND_UIMM16 : 829 value = fields->f_uimm16; 830 break; 831 case OR1K_OPERAND_UIMM16_SPLIT : 832 value = fields->f_uimm16_split; 833 break; 834 case OR1K_OPERAND_UIMM6 : 835 value = fields->f_uimm6; 836 break; 837 838 default : 839 /* xgettext:c-format */ 840 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 841 opindex); 842 abort (); 843 } 844 845 return value; 846 } 847 848 bfd_vma 849 or1k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 850 int opindex, 851 const CGEN_FIELDS * fields) 852 { 853 bfd_vma value; 854 855 switch (opindex) 856 { 857 case OR1K_OPERAND_DISP26 : 858 value = fields->f_disp26; 859 break; 860 case OR1K_OPERAND_RA : 861 value = fields->f_r2; 862 break; 863 case OR1K_OPERAND_RADF : 864 value = fields->f_r1; 865 break; 866 case OR1K_OPERAND_RASF : 867 value = fields->f_r2; 868 break; 869 case OR1K_OPERAND_RB : 870 value = fields->f_r3; 871 break; 872 case OR1K_OPERAND_RBDF : 873 value = fields->f_r1; 874 break; 875 case OR1K_OPERAND_RBSF : 876 value = fields->f_r3; 877 break; 878 case OR1K_OPERAND_RD : 879 value = fields->f_r1; 880 break; 881 case OR1K_OPERAND_RDDF : 882 value = fields->f_r1; 883 break; 884 case OR1K_OPERAND_RDSF : 885 value = fields->f_r1; 886 break; 887 case OR1K_OPERAND_SIMM16 : 888 value = fields->f_simm16; 889 break; 890 case OR1K_OPERAND_SIMM16_SPLIT : 891 value = fields->f_simm16_split; 892 break; 893 case OR1K_OPERAND_UIMM16 : 894 value = fields->f_uimm16; 895 break; 896 case OR1K_OPERAND_UIMM16_SPLIT : 897 value = fields->f_uimm16_split; 898 break; 899 case OR1K_OPERAND_UIMM6 : 900 value = fields->f_uimm6; 901 break; 902 903 default : 904 /* xgettext:c-format */ 905 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 906 opindex); 907 abort (); 908 } 909 910 return value; 911 } 912 913 void or1k_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 914 void or1k_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 915 916 /* Stuffing values in cgen_fields is handled by a collection of functions. 917 They are distinguished by the type of the VALUE argument they accept. 918 TODO: floating point, inlining support, remove cases where argument type 919 not appropriate. */ 920 921 void 922 or1k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 923 int opindex, 924 CGEN_FIELDS * fields, 925 int value) 926 { 927 switch (opindex) 928 { 929 case OR1K_OPERAND_DISP26 : 930 fields->f_disp26 = value; 931 break; 932 case OR1K_OPERAND_RA : 933 fields->f_r2 = value; 934 break; 935 case OR1K_OPERAND_RADF : 936 fields->f_r1 = value; 937 break; 938 case OR1K_OPERAND_RASF : 939 fields->f_r2 = value; 940 break; 941 case OR1K_OPERAND_RB : 942 fields->f_r3 = value; 943 break; 944 case OR1K_OPERAND_RBDF : 945 fields->f_r1 = value; 946 break; 947 case OR1K_OPERAND_RBSF : 948 fields->f_r3 = value; 949 break; 950 case OR1K_OPERAND_RD : 951 fields->f_r1 = value; 952 break; 953 case OR1K_OPERAND_RDDF : 954 fields->f_r1 = value; 955 break; 956 case OR1K_OPERAND_RDSF : 957 fields->f_r1 = value; 958 break; 959 case OR1K_OPERAND_SIMM16 : 960 fields->f_simm16 = value; 961 break; 962 case OR1K_OPERAND_SIMM16_SPLIT : 963 fields->f_simm16_split = value; 964 break; 965 case OR1K_OPERAND_UIMM16 : 966 fields->f_uimm16 = value; 967 break; 968 case OR1K_OPERAND_UIMM16_SPLIT : 969 fields->f_uimm16_split = value; 970 break; 971 case OR1K_OPERAND_UIMM6 : 972 fields->f_uimm6 = value; 973 break; 974 975 default : 976 /* xgettext:c-format */ 977 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 978 opindex); 979 abort (); 980 } 981 } 982 983 void 984 or1k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 985 int opindex, 986 CGEN_FIELDS * fields, 987 bfd_vma value) 988 { 989 switch (opindex) 990 { 991 case OR1K_OPERAND_DISP26 : 992 fields->f_disp26 = value; 993 break; 994 case OR1K_OPERAND_RA : 995 fields->f_r2 = value; 996 break; 997 case OR1K_OPERAND_RADF : 998 fields->f_r1 = value; 999 break; 1000 case OR1K_OPERAND_RASF : 1001 fields->f_r2 = value; 1002 break; 1003 case OR1K_OPERAND_RB : 1004 fields->f_r3 = value; 1005 break; 1006 case OR1K_OPERAND_RBDF : 1007 fields->f_r1 = value; 1008 break; 1009 case OR1K_OPERAND_RBSF : 1010 fields->f_r3 = value; 1011 break; 1012 case OR1K_OPERAND_RD : 1013 fields->f_r1 = value; 1014 break; 1015 case OR1K_OPERAND_RDDF : 1016 fields->f_r1 = value; 1017 break; 1018 case OR1K_OPERAND_RDSF : 1019 fields->f_r1 = value; 1020 break; 1021 case OR1K_OPERAND_SIMM16 : 1022 fields->f_simm16 = value; 1023 break; 1024 case OR1K_OPERAND_SIMM16_SPLIT : 1025 fields->f_simm16_split = value; 1026 break; 1027 case OR1K_OPERAND_UIMM16 : 1028 fields->f_uimm16 = value; 1029 break; 1030 case OR1K_OPERAND_UIMM16_SPLIT : 1031 fields->f_uimm16_split = value; 1032 break; 1033 case OR1K_OPERAND_UIMM6 : 1034 fields->f_uimm6 = value; 1035 break; 1036 1037 default : 1038 /* xgettext:c-format */ 1039 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1040 opindex); 1041 abort (); 1042 } 1043 } 1044 1045 /* Function to call before using the instruction builder tables. */ 1046 1047 void 1048 or1k_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1049 { 1050 cd->insert_handlers = & or1k_cgen_insert_handlers[0]; 1051 cd->extract_handlers = & or1k_cgen_extract_handlers[0]; 1052 1053 cd->insert_operand = or1k_cgen_insert_operand; 1054 cd->extract_operand = or1k_cgen_extract_operand; 1055 1056 cd->get_int_operand = or1k_cgen_get_int_operand; 1057 cd->set_int_operand = or1k_cgen_set_int_operand; 1058 cd->get_vma_operand = or1k_cgen_get_vma_operand; 1059 cd->set_vma_operand = or1k_cgen_set_vma_operand; 1060 } 1061
