1 /* Instruction building/extraction support for xc16x. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2016 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27 #include "sysdep.h" 28 #include <stdio.h> 29 #include "ansidecl.h" 30 #include "dis-asm.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "xc16x-desc.h" 34 #include "xc16x-opc.h" 35 #include "cgen/basic-modes.h" 36 #include "opintl.h" 37 #include "safe-ctype.h" 38 39 #undef min 40 #define min(a,b) ((a) < (b) ? (a) : (b)) 41 #undef max 42 #define max(a,b) ((a) > (b) ? (a) : (b)) 43 44 /* Used by the ifield rtx function. */ 45 #define FLD(f) (fields->f) 46 47 static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50 static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53 static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57 static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60 #if CGEN_INT_INSN_P 61 static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63 #endif 64 #if ! CGEN_INT_INSN_P 65 static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67 static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69 static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71 #endif 72 73 /* Operand insertion. */ 75 76 #if ! CGEN_INT_INSN_P 77 78 /* Subroutine of insert_normal. */ 79 80 static CGEN_INLINE void 81 insert_1 (CGEN_CPU_DESC cd, 82 unsigned long value, 83 int start, 84 int length, 85 int word_length, 86 unsigned char *bufp) 87 { 88 unsigned long x,mask; 89 int shift; 90 91 x = cgen_get_insn_value (cd, bufp, word_length); 92 93 /* Written this way to avoid undefined behaviour. */ 94 mask = (((1L << (length - 1)) - 1) << 1) | 1; 95 if (CGEN_INSN_LSB0_P) 96 shift = (start + 1) - length; 97 else 98 shift = (word_length - (start + length)); 99 x = (x & ~(mask << shift)) | ((value & mask) << shift); 100 101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 102 } 103 104 #endif /* ! CGEN_INT_INSN_P */ 105 106 /* Default insertion routine. 107 108 ATTRS is a mask of the boolean attributes. 109 WORD_OFFSET is the offset in bits from the start of the insn of the value. 110 WORD_LENGTH is the length of the word in bits in which the value resides. 111 START is the starting bit number in the word, architecture origin. 112 LENGTH is the length of VALUE in bits. 113 TOTAL_LENGTH is the total length of the insn in bits. 114 115 The result is an error message or NULL if success. */ 116 117 /* ??? This duplicates functionality with bfd's howto table and 118 bfd_install_relocation. */ 119 /* ??? This doesn't handle bfd_vma's. Create another function when 120 necessary. */ 121 122 static const char * 123 insert_normal (CGEN_CPU_DESC cd, 124 long value, 125 unsigned int attrs, 126 unsigned int word_offset, 127 unsigned int start, 128 unsigned int length, 129 unsigned int word_length, 130 unsigned int total_length, 131 CGEN_INSN_BYTES_PTR buffer) 132 { 133 static char errbuf[100]; 134 /* Written this way to avoid undefined behaviour. */ 135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 136 137 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 138 if (length == 0) 139 return NULL; 140 141 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 142 abort (); 143 144 /* For architectures with insns smaller than the base-insn-bitsize, 145 word_length may be too big. */ 146 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 147 { 148 if (word_offset == 0 149 && word_length > total_length) 150 word_length = total_length; 151 } 152 153 /* Ensure VALUE will fit. */ 154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 155 { 156 long minval = - (1L << (length - 1)); 157 unsigned long maxval = mask; 158 159 if ((value > 0 && (unsigned long) value > maxval) 160 || value < minval) 161 { 162 /* xgettext:c-format */ 163 sprintf (errbuf, 164 _("operand out of range (%ld not between %ld and %lu)"), 165 value, minval, maxval); 166 return errbuf; 167 } 168 } 169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 170 { 171 unsigned long maxval = mask; 172 unsigned long val = (unsigned long) value; 173 174 /* For hosts with a word size > 32 check to see if value has been sign 175 extended beyond 32 bits. If so then ignore these higher sign bits 176 as the user is attempting to store a 32-bit signed value into an 177 unsigned 32-bit field which is allowed. */ 178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 179 val &= 0xFFFFFFFF; 180 181 if (val > maxval) 182 { 183 /* xgettext:c-format */ 184 sprintf (errbuf, 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 186 val, maxval); 187 return errbuf; 188 } 189 } 190 else 191 { 192 if (! cgen_signed_overflow_ok_p (cd)) 193 { 194 long minval = - (1L << (length - 1)); 195 long maxval = (1L << (length - 1)) - 1; 196 197 if (value < minval || value > maxval) 198 { 199 sprintf 200 /* xgettext:c-format */ 201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 202 value, minval, maxval); 203 return errbuf; 204 } 205 } 206 } 207 208 #if CGEN_INT_INSN_P 209 210 { 211 int shift_within_word, shift_to_word, shift; 212 213 /* How to shift the value to BIT0 of the word. */ 214 shift_to_word = total_length - (word_offset + word_length); 215 216 /* How to shift the value to the field within the word. */ 217 if (CGEN_INSN_LSB0_P) 218 shift_within_word = start + 1 - length; 219 else 220 shift_within_word = word_length - start - length; 221 222 /* The total SHIFT, then mask in the value. */ 223 shift = shift_to_word + shift_within_word; 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 225 } 226 227 #else /* ! CGEN_INT_INSN_P */ 228 229 { 230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 231 232 insert_1 (cd, value, start, length, word_length, bufp); 233 } 234 235 #endif /* ! CGEN_INT_INSN_P */ 236 237 return NULL; 238 } 239 240 /* Default insn builder (insert handler). 241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 243 recorded in host byte order, otherwise BUFFER is an array of bytes 244 and the value is recorded in target byte order). 245 The result is an error message or NULL if success. */ 246 247 static const char * 248 insert_insn_normal (CGEN_CPU_DESC cd, 249 const CGEN_INSN * insn, 250 CGEN_FIELDS * fields, 251 CGEN_INSN_BYTES_PTR buffer, 252 bfd_vma pc) 253 { 254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 255 unsigned long value; 256 const CGEN_SYNTAX_CHAR_TYPE * syn; 257 258 CGEN_INIT_INSERT (cd); 259 value = CGEN_INSN_BASE_VALUE (insn); 260 261 /* If we're recording insns as numbers (rather than a string of bytes), 262 target byte order handling is deferred until later. */ 263 264 #if CGEN_INT_INSN_P 265 266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 267 CGEN_FIELDS_BITSIZE (fields), value); 268 269 #else 270 271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 272 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 273 value); 274 275 #endif /* ! CGEN_INT_INSN_P */ 276 277 /* ??? It would be better to scan the format's fields. 278 Still need to be able to insert a value based on the operand though; 279 e.g. storing a branch displacement that got resolved later. 280 Needs more thought first. */ 281 282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 283 { 284 const char *errmsg; 285 286 if (CGEN_SYNTAX_CHAR_P (* syn)) 287 continue; 288 289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 290 fields, buffer, pc); 291 if (errmsg) 292 return errmsg; 293 } 294 295 return NULL; 296 } 297 298 #if CGEN_INT_INSN_P 299 /* Cover function to store an insn value into an integral insn. Must go here 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 301 302 static void 303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 304 CGEN_INSN_BYTES_PTR buf, 305 int length, 306 int insn_length, 307 CGEN_INSN_INT value) 308 { 309 /* For architectures with insns smaller than the base-insn-bitsize, 310 length may be too big. */ 311 if (length > insn_length) 312 *buf = value; 313 else 314 { 315 int shift = insn_length - length; 316 /* Written this way to avoid undefined behaviour. */ 317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 318 319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 320 } 321 } 322 #endif 323 324 /* Operand extraction. */ 326 327 #if ! CGEN_INT_INSN_P 328 329 /* Subroutine of extract_normal. 330 Ensure sufficient bytes are cached in EX_INFO. 331 OFFSET is the offset in bytes from the start of the insn of the value. 332 BYTES is the length of the needed value. 333 Returns 1 for success, 0 for failure. */ 334 335 static CGEN_INLINE int 336 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 CGEN_EXTRACT_INFO *ex_info, 338 int offset, 339 int bytes, 340 bfd_vma pc) 341 { 342 /* It's doubtful that the middle part has already been fetched so 343 we don't optimize that case. kiss. */ 344 unsigned int mask; 345 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 346 347 /* First do a quick check. */ 348 mask = (1 << bytes) - 1; 349 if (((ex_info->valid >> offset) & mask) == mask) 350 return 1; 351 352 /* Search for the first byte we need to read. */ 353 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 354 if (! (mask & ex_info->valid)) 355 break; 356 357 if (bytes) 358 { 359 int status; 360 361 pc += offset; 362 status = (*info->read_memory_func) 363 (pc, ex_info->insn_bytes + offset, bytes, info); 364 365 if (status != 0) 366 { 367 (*info->memory_error_func) (status, pc, info); 368 return 0; 369 } 370 371 ex_info->valid |= ((1 << bytes) - 1) << offset; 372 } 373 374 return 1; 375 } 376 377 /* Subroutine of extract_normal. */ 378 379 static CGEN_INLINE long 380 extract_1 (CGEN_CPU_DESC cd, 381 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 382 int start, 383 int length, 384 int word_length, 385 unsigned char *bufp, 386 bfd_vma pc ATTRIBUTE_UNUSED) 387 { 388 unsigned long x; 389 int shift; 390 391 x = cgen_get_insn_value (cd, bufp, word_length); 392 393 if (CGEN_INSN_LSB0_P) 394 shift = (start + 1) - length; 395 else 396 shift = (word_length - (start + length)); 397 return x >> shift; 398 } 399 400 #endif /* ! CGEN_INT_INSN_P */ 401 402 /* Default extraction routine. 403 404 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 405 or sometimes less for cases like the m32r where the base insn size is 32 406 but some insns are 16 bits. 407 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 408 but for generality we take a bitmask of all of them. 409 WORD_OFFSET is the offset in bits from the start of the insn of the value. 410 WORD_LENGTH is the length of the word in bits in which the value resides. 411 START is the starting bit number in the word, architecture origin. 412 LENGTH is the length of VALUE in bits. 413 TOTAL_LENGTH is the total length of the insn in bits. 414 415 Returns 1 for success, 0 for failure. */ 416 417 /* ??? The return code isn't properly used. wip. */ 418 419 /* ??? This doesn't handle bfd_vma's. Create another function when 420 necessary. */ 421 422 static int 423 extract_normal (CGEN_CPU_DESC cd, 424 #if ! CGEN_INT_INSN_P 425 CGEN_EXTRACT_INFO *ex_info, 426 #else 427 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 428 #endif 429 CGEN_INSN_INT insn_value, 430 unsigned int attrs, 431 unsigned int word_offset, 432 unsigned int start, 433 unsigned int length, 434 unsigned int word_length, 435 unsigned int total_length, 436 #if ! CGEN_INT_INSN_P 437 bfd_vma pc, 438 #else 439 bfd_vma pc ATTRIBUTE_UNUSED, 440 #endif 441 long *valuep) 442 { 443 long value, mask; 444 445 /* If LENGTH is zero, this operand doesn't contribute to the value 446 so give it a standard value of zero. */ 447 if (length == 0) 448 { 449 *valuep = 0; 450 return 1; 451 } 452 453 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 454 abort (); 455 456 /* For architectures with insns smaller than the insn-base-bitsize, 457 word_length may be too big. */ 458 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 459 { 460 if (word_offset + word_length > total_length) 461 word_length = total_length - word_offset; 462 } 463 464 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 465 466 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 467 { 468 if (CGEN_INSN_LSB0_P) 469 value = insn_value >> ((word_offset + start + 1) - length); 470 else 471 value = insn_value >> (total_length - ( word_offset + start + length)); 472 } 473 474 #if ! CGEN_INT_INSN_P 475 476 else 477 { 478 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 479 480 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 481 abort (); 482 483 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 484 return 0; 485 486 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 487 } 488 489 #endif /* ! CGEN_INT_INSN_P */ 490 491 /* Written this way to avoid undefined behaviour. */ 492 mask = (((1L << (length - 1)) - 1) << 1) | 1; 493 494 value &= mask; 495 /* sign extend? */ 496 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 497 && (value & (1L << (length - 1)))) 498 value |= ~mask; 499 500 *valuep = value; 501 502 return 1; 503 } 504 505 /* Default insn extractor. 506 507 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 508 The extracted fields are stored in FIELDS. 509 EX_INFO is used to handle reading variable length insns. 510 Return the length of the insn in bits, or 0 if no match, 511 or -1 if an error occurs fetching data (memory_error_func will have 512 been called). */ 513 514 static int 515 extract_insn_normal (CGEN_CPU_DESC cd, 516 const CGEN_INSN *insn, 517 CGEN_EXTRACT_INFO *ex_info, 518 CGEN_INSN_INT insn_value, 519 CGEN_FIELDS *fields, 520 bfd_vma pc) 521 { 522 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 523 const CGEN_SYNTAX_CHAR_TYPE *syn; 524 525 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 526 527 CGEN_INIT_EXTRACT (cd); 528 529 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 530 { 531 int length; 532 533 if (CGEN_SYNTAX_CHAR_P (*syn)) 534 continue; 535 536 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 537 ex_info, insn_value, fields, pc); 538 if (length <= 0) 539 return length; 540 } 541 542 /* We recognized and successfully extracted this insn. */ 543 return CGEN_INSN_BITSIZE (insn); 544 } 545 546 /* Machine generated code added here. */ 548 549 const char * xc16x_cgen_insert_operand 550 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 551 552 /* Main entry point for operand insertion. 553 554 This function is basically just a big switch statement. Earlier versions 555 used tables to look up the function to use, but 556 - if the table contains both assembler and disassembler functions then 557 the disassembler contains much of the assembler and vice-versa, 558 - there's a lot of inlining possibilities as things grow, 559 - using a switch statement avoids the function call overhead. 560 561 This function could be moved into `parse_insn_normal', but keeping it 562 separate makes clear the interface between `parse_insn_normal' and each of 563 the handlers. It's also needed by GAS to insert operands that couldn't be 564 resolved during parsing. */ 565 566 const char * 567 xc16x_cgen_insert_operand (CGEN_CPU_DESC cd, 568 int opindex, 569 CGEN_FIELDS * fields, 570 CGEN_INSN_BYTES_PTR buffer, 571 bfd_vma pc ATTRIBUTE_UNUSED) 572 { 573 const char * errmsg = NULL; 574 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 575 576 switch (opindex) 577 { 578 case XC16X_OPERAND_REGNAM : 579 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 580 break; 581 case XC16X_OPERAND_BIT01 : 582 errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer); 583 break; 584 case XC16X_OPERAND_BIT1 : 585 errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer); 586 break; 587 case XC16X_OPERAND_BIT2 : 588 errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer); 589 break; 590 case XC16X_OPERAND_BIT4 : 591 errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer); 592 break; 593 case XC16X_OPERAND_BIT8 : 594 errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer); 595 break; 596 case XC16X_OPERAND_BITONE : 597 errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer); 598 break; 599 case XC16X_OPERAND_CADDR : 600 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 601 break; 602 case XC16X_OPERAND_COND : 603 errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer); 604 break; 605 case XC16X_OPERAND_DATA8 : 606 errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer); 607 break; 608 case XC16X_OPERAND_DATAHI8 : 609 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 610 break; 611 case XC16X_OPERAND_DOT : 612 break; 613 case XC16X_OPERAND_DR : 614 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 615 break; 616 case XC16X_OPERAND_DRB : 617 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 618 break; 619 case XC16X_OPERAND_DRI : 620 errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer); 621 break; 622 case XC16X_OPERAND_EXTCOND : 623 errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer); 624 break; 625 case XC16X_OPERAND_GENREG : 626 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 627 break; 628 case XC16X_OPERAND_HASH : 629 break; 630 case XC16X_OPERAND_ICOND : 631 errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer); 632 break; 633 case XC16X_OPERAND_LBIT2 : 634 errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer); 635 break; 636 case XC16X_OPERAND_LBIT4 : 637 errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer); 638 break; 639 case XC16X_OPERAND_MASK8 : 640 errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer); 641 break; 642 case XC16X_OPERAND_MASKLO8 : 643 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 644 break; 645 case XC16X_OPERAND_MEMGR8 : 646 errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer); 647 break; 648 case XC16X_OPERAND_MEMORY : 649 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 650 break; 651 case XC16X_OPERAND_PAG : 652 break; 653 case XC16X_OPERAND_PAGENUM : 654 errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer); 655 break; 656 case XC16X_OPERAND_POF : 657 break; 658 case XC16X_OPERAND_QBIT : 659 errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer); 660 break; 661 case XC16X_OPERAND_QHIBIT : 662 errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer); 663 break; 664 case XC16X_OPERAND_QLOBIT : 665 errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer); 666 break; 667 case XC16X_OPERAND_REG8 : 668 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 669 break; 670 case XC16X_OPERAND_REGB8 : 671 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 672 break; 673 case XC16X_OPERAND_REGBMEM8 : 674 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 675 break; 676 case XC16X_OPERAND_REGHI8 : 677 errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer); 678 break; 679 case XC16X_OPERAND_REGMEM8 : 680 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 681 break; 682 case XC16X_OPERAND_REGOFF8 : 683 errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer); 684 break; 685 case XC16X_OPERAND_REL : 686 errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer); 687 break; 688 case XC16X_OPERAND_RELHI : 689 errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer); 690 break; 691 case XC16X_OPERAND_SEG : 692 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 693 break; 694 case XC16X_OPERAND_SEGHI8 : 695 errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer); 696 break; 697 case XC16X_OPERAND_SEGM : 698 break; 699 case XC16X_OPERAND_SOF : 700 break; 701 case XC16X_OPERAND_SR : 702 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 703 break; 704 case XC16X_OPERAND_SR2 : 705 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer); 706 break; 707 case XC16X_OPERAND_SRB : 708 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 709 break; 710 case XC16X_OPERAND_SRC1 : 711 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 712 break; 713 case XC16X_OPERAND_SRC2 : 714 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 715 break; 716 case XC16X_OPERAND_SRDIV : 717 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 718 break; 719 case XC16X_OPERAND_U4 : 720 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 721 break; 722 case XC16X_OPERAND_UIMM16 : 723 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 724 break; 725 case XC16X_OPERAND_UIMM2 : 726 errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer); 727 break; 728 case XC16X_OPERAND_UIMM3 : 729 errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer); 730 break; 731 case XC16X_OPERAND_UIMM4 : 732 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 733 break; 734 case XC16X_OPERAND_UIMM7 : 735 errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer); 736 break; 737 case XC16X_OPERAND_UIMM8 : 738 errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer); 739 break; 740 case XC16X_OPERAND_UPAG16 : 741 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 742 break; 743 case XC16X_OPERAND_UPOF16 : 744 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 745 break; 746 case XC16X_OPERAND_USEG16 : 747 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 748 break; 749 case XC16X_OPERAND_USEG8 : 750 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 751 break; 752 case XC16X_OPERAND_USOF16 : 753 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 754 break; 755 756 default : 757 /* xgettext:c-format */ 758 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 759 opindex); 760 abort (); 761 } 762 763 return errmsg; 764 } 765 766 int xc16x_cgen_extract_operand 767 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 768 769 /* Main entry point for operand extraction. 770 The result is <= 0 for error, >0 for success. 771 ??? Actual values aren't well defined right now. 772 773 This function is basically just a big switch statement. Earlier versions 774 used tables to look up the function to use, but 775 - if the table contains both assembler and disassembler functions then 776 the disassembler contains much of the assembler and vice-versa, 777 - there's a lot of inlining possibilities as things grow, 778 - using a switch statement avoids the function call overhead. 779 780 This function could be moved into `print_insn_normal', but keeping it 781 separate makes clear the interface between `print_insn_normal' and each of 782 the handlers. */ 783 784 int 785 xc16x_cgen_extract_operand (CGEN_CPU_DESC cd, 786 int opindex, 787 CGEN_EXTRACT_INFO *ex_info, 788 CGEN_INSN_INT insn_value, 789 CGEN_FIELDS * fields, 790 bfd_vma pc) 791 { 792 /* Assume success (for those operands that are nops). */ 793 int length = 1; 794 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 795 796 switch (opindex) 797 { 798 case XC16X_OPERAND_REGNAM : 799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 800 break; 801 case XC16X_OPERAND_BIT01 : 802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit); 803 break; 804 case XC16X_OPERAND_BIT1 : 805 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1); 806 break; 807 case XC16X_OPERAND_BIT2 : 808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2); 809 break; 810 case XC16X_OPERAND_BIT4 : 811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4); 812 break; 813 case XC16X_OPERAND_BIT8 : 814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8); 815 break; 816 case XC16X_OPERAND_BITONE : 817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit); 818 break; 819 case XC16X_OPERAND_CADDR : 820 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 821 break; 822 case XC16X_OPERAND_COND : 823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode); 824 break; 825 case XC16X_OPERAND_DATA8 : 826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8); 827 break; 828 case XC16X_OPERAND_DATAHI8 : 829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 830 break; 831 case XC16X_OPERAND_DOT : 832 break; 833 case XC16X_OPERAND_DR : 834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 835 break; 836 case XC16X_OPERAND_DRB : 837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 838 break; 839 case XC16X_OPERAND_DRI : 840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4); 841 break; 842 case XC16X_OPERAND_EXTCOND : 843 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode); 844 break; 845 case XC16X_OPERAND_GENREG : 846 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 847 break; 848 case XC16X_OPERAND_HASH : 849 break; 850 case XC16X_OPERAND_ICOND : 851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode); 852 break; 853 case XC16X_OPERAND_LBIT2 : 854 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2); 855 break; 856 case XC16X_OPERAND_LBIT4 : 857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4); 858 break; 859 case XC16X_OPERAND_MASK8 : 860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8); 861 break; 862 case XC16X_OPERAND_MASKLO8 : 863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 864 break; 865 case XC16X_OPERAND_MEMGR8 : 866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8); 867 break; 868 case XC16X_OPERAND_MEMORY : 869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 870 break; 871 case XC16X_OPERAND_PAG : 872 break; 873 case XC16X_OPERAND_PAGENUM : 874 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum); 875 break; 876 case XC16X_OPERAND_POF : 877 break; 878 case XC16X_OPERAND_QBIT : 879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit); 880 break; 881 case XC16X_OPERAND_QHIBIT : 882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit); 883 break; 884 case XC16X_OPERAND_QLOBIT : 885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit); 886 break; 887 case XC16X_OPERAND_REG8 : 888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 889 break; 890 case XC16X_OPERAND_REGB8 : 891 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 892 break; 893 case XC16X_OPERAND_REGBMEM8 : 894 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 895 break; 896 case XC16X_OPERAND_REGHI8 : 897 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8); 898 break; 899 case XC16X_OPERAND_REGMEM8 : 900 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 901 break; 902 case XC16X_OPERAND_REGOFF8 : 903 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8); 904 break; 905 case XC16X_OPERAND_REL : 906 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8); 907 break; 908 case XC16X_OPERAND_RELHI : 909 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8); 910 break; 911 case XC16X_OPERAND_SEG : 912 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 913 break; 914 case XC16X_OPERAND_SEGHI8 : 915 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8); 916 break; 917 case XC16X_OPERAND_SEGM : 918 break; 919 case XC16X_OPERAND_SOF : 920 break; 921 case XC16X_OPERAND_SR : 922 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 923 break; 924 case XC16X_OPERAND_SR2 : 925 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0); 926 break; 927 case XC16X_OPERAND_SRB : 928 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 929 break; 930 case XC16X_OPERAND_SRC1 : 931 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 932 break; 933 case XC16X_OPERAND_SRC2 : 934 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 935 break; 936 case XC16X_OPERAND_SRDIV : 937 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 938 break; 939 case XC16X_OPERAND_U4 : 940 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 941 break; 942 case XC16X_OPERAND_UIMM16 : 943 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 944 break; 945 case XC16X_OPERAND_UIMM2 : 946 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2); 947 break; 948 case XC16X_OPERAND_UIMM3 : 949 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3); 950 break; 951 case XC16X_OPERAND_UIMM4 : 952 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 953 break; 954 case XC16X_OPERAND_UIMM7 : 955 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7); 956 break; 957 case XC16X_OPERAND_UIMM8 : 958 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8); 959 break; 960 case XC16X_OPERAND_UPAG16 : 961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 962 break; 963 case XC16X_OPERAND_UPOF16 : 964 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 965 break; 966 case XC16X_OPERAND_USEG16 : 967 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 968 break; 969 case XC16X_OPERAND_USEG8 : 970 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 971 break; 972 case XC16X_OPERAND_USOF16 : 973 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 974 break; 975 976 default : 977 /* xgettext:c-format */ 978 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 979 opindex); 980 abort (); 981 } 982 983 return length; 984 } 985 986 cgen_insert_fn * const xc16x_cgen_insert_handlers[] = 987 { 988 insert_insn_normal, 989 }; 990 991 cgen_extract_fn * const xc16x_cgen_extract_handlers[] = 992 { 993 extract_insn_normal, 994 }; 995 996 int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 997 bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 998 999 /* Getting values from cgen_fields is handled by a collection of functions. 1000 They are distinguished by the type of the VALUE argument they return. 1001 TODO: floating point, inlining support, remove cases where result type 1002 not appropriate. */ 1003 1004 int 1005 xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1006 int opindex, 1007 const CGEN_FIELDS * fields) 1008 { 1009 int value; 1010 1011 switch (opindex) 1012 { 1013 case XC16X_OPERAND_REGNAM : 1014 value = fields->f_reg8; 1015 break; 1016 case XC16X_OPERAND_BIT01 : 1017 value = fields->f_op_1bit; 1018 break; 1019 case XC16X_OPERAND_BIT1 : 1020 value = fields->f_op_bit1; 1021 break; 1022 case XC16X_OPERAND_BIT2 : 1023 value = fields->f_op_bit2; 1024 break; 1025 case XC16X_OPERAND_BIT4 : 1026 value = fields->f_op_bit4; 1027 break; 1028 case XC16X_OPERAND_BIT8 : 1029 value = fields->f_op_bit8; 1030 break; 1031 case XC16X_OPERAND_BITONE : 1032 value = fields->f_op_onebit; 1033 break; 1034 case XC16X_OPERAND_CADDR : 1035 value = fields->f_offset16; 1036 break; 1037 case XC16X_OPERAND_COND : 1038 value = fields->f_condcode; 1039 break; 1040 case XC16X_OPERAND_DATA8 : 1041 value = fields->f_data8; 1042 break; 1043 case XC16X_OPERAND_DATAHI8 : 1044 value = fields->f_datahi8; 1045 break; 1046 case XC16X_OPERAND_DOT : 1047 value = 0; 1048 break; 1049 case XC16X_OPERAND_DR : 1050 value = fields->f_r1; 1051 break; 1052 case XC16X_OPERAND_DRB : 1053 value = fields->f_r1; 1054 break; 1055 case XC16X_OPERAND_DRI : 1056 value = fields->f_r4; 1057 break; 1058 case XC16X_OPERAND_EXTCOND : 1059 value = fields->f_extccode; 1060 break; 1061 case XC16X_OPERAND_GENREG : 1062 value = fields->f_regb8; 1063 break; 1064 case XC16X_OPERAND_HASH : 1065 value = 0; 1066 break; 1067 case XC16X_OPERAND_ICOND : 1068 value = fields->f_icondcode; 1069 break; 1070 case XC16X_OPERAND_LBIT2 : 1071 value = fields->f_op_lbit2; 1072 break; 1073 case XC16X_OPERAND_LBIT4 : 1074 value = fields->f_op_lbit4; 1075 break; 1076 case XC16X_OPERAND_MASK8 : 1077 value = fields->f_mask8; 1078 break; 1079 case XC16X_OPERAND_MASKLO8 : 1080 value = fields->f_datahi8; 1081 break; 1082 case XC16X_OPERAND_MEMGR8 : 1083 value = fields->f_memgr8; 1084 break; 1085 case XC16X_OPERAND_MEMORY : 1086 value = fields->f_memory; 1087 break; 1088 case XC16X_OPERAND_PAG : 1089 value = 0; 1090 break; 1091 case XC16X_OPERAND_PAGENUM : 1092 value = fields->f_pagenum; 1093 break; 1094 case XC16X_OPERAND_POF : 1095 value = 0; 1096 break; 1097 case XC16X_OPERAND_QBIT : 1098 value = fields->f_qbit; 1099 break; 1100 case XC16X_OPERAND_QHIBIT : 1101 value = fields->f_qhibit; 1102 break; 1103 case XC16X_OPERAND_QLOBIT : 1104 value = fields->f_qlobit; 1105 break; 1106 case XC16X_OPERAND_REG8 : 1107 value = fields->f_reg8; 1108 break; 1109 case XC16X_OPERAND_REGB8 : 1110 value = fields->f_regb8; 1111 break; 1112 case XC16X_OPERAND_REGBMEM8 : 1113 value = fields->f_regmem8; 1114 break; 1115 case XC16X_OPERAND_REGHI8 : 1116 value = fields->f_reghi8; 1117 break; 1118 case XC16X_OPERAND_REGMEM8 : 1119 value = fields->f_regmem8; 1120 break; 1121 case XC16X_OPERAND_REGOFF8 : 1122 value = fields->f_regoff8; 1123 break; 1124 case XC16X_OPERAND_REL : 1125 value = fields->f_rel8; 1126 break; 1127 case XC16X_OPERAND_RELHI : 1128 value = fields->f_relhi8; 1129 break; 1130 case XC16X_OPERAND_SEG : 1131 value = fields->f_seg8; 1132 break; 1133 case XC16X_OPERAND_SEGHI8 : 1134 value = fields->f_segnum8; 1135 break; 1136 case XC16X_OPERAND_SEGM : 1137 value = 0; 1138 break; 1139 case XC16X_OPERAND_SOF : 1140 value = 0; 1141 break; 1142 case XC16X_OPERAND_SR : 1143 value = fields->f_r2; 1144 break; 1145 case XC16X_OPERAND_SR2 : 1146 value = fields->f_r0; 1147 break; 1148 case XC16X_OPERAND_SRB : 1149 value = fields->f_r2; 1150 break; 1151 case XC16X_OPERAND_SRC1 : 1152 value = fields->f_r1; 1153 break; 1154 case XC16X_OPERAND_SRC2 : 1155 value = fields->f_r2; 1156 break; 1157 case XC16X_OPERAND_SRDIV : 1158 value = fields->f_reg8; 1159 break; 1160 case XC16X_OPERAND_U4 : 1161 value = fields->f_uimm4; 1162 break; 1163 case XC16X_OPERAND_UIMM16 : 1164 value = fields->f_uimm16; 1165 break; 1166 case XC16X_OPERAND_UIMM2 : 1167 value = fields->f_uimm2; 1168 break; 1169 case XC16X_OPERAND_UIMM3 : 1170 value = fields->f_uimm3; 1171 break; 1172 case XC16X_OPERAND_UIMM4 : 1173 value = fields->f_uimm4; 1174 break; 1175 case XC16X_OPERAND_UIMM7 : 1176 value = fields->f_uimm7; 1177 break; 1178 case XC16X_OPERAND_UIMM8 : 1179 value = fields->f_uimm8; 1180 break; 1181 case XC16X_OPERAND_UPAG16 : 1182 value = fields->f_uimm16; 1183 break; 1184 case XC16X_OPERAND_UPOF16 : 1185 value = fields->f_memory; 1186 break; 1187 case XC16X_OPERAND_USEG16 : 1188 value = fields->f_offset16; 1189 break; 1190 case XC16X_OPERAND_USEG8 : 1191 value = fields->f_seg8; 1192 break; 1193 case XC16X_OPERAND_USOF16 : 1194 value = fields->f_offset16; 1195 break; 1196 1197 default : 1198 /* xgettext:c-format */ 1199 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1200 opindex); 1201 abort (); 1202 } 1203 1204 return value; 1205 } 1206 1207 bfd_vma 1208 xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1209 int opindex, 1210 const CGEN_FIELDS * fields) 1211 { 1212 bfd_vma value; 1213 1214 switch (opindex) 1215 { 1216 case XC16X_OPERAND_REGNAM : 1217 value = fields->f_reg8; 1218 break; 1219 case XC16X_OPERAND_BIT01 : 1220 value = fields->f_op_1bit; 1221 break; 1222 case XC16X_OPERAND_BIT1 : 1223 value = fields->f_op_bit1; 1224 break; 1225 case XC16X_OPERAND_BIT2 : 1226 value = fields->f_op_bit2; 1227 break; 1228 case XC16X_OPERAND_BIT4 : 1229 value = fields->f_op_bit4; 1230 break; 1231 case XC16X_OPERAND_BIT8 : 1232 value = fields->f_op_bit8; 1233 break; 1234 case XC16X_OPERAND_BITONE : 1235 value = fields->f_op_onebit; 1236 break; 1237 case XC16X_OPERAND_CADDR : 1238 value = fields->f_offset16; 1239 break; 1240 case XC16X_OPERAND_COND : 1241 value = fields->f_condcode; 1242 break; 1243 case XC16X_OPERAND_DATA8 : 1244 value = fields->f_data8; 1245 break; 1246 case XC16X_OPERAND_DATAHI8 : 1247 value = fields->f_datahi8; 1248 break; 1249 case XC16X_OPERAND_DOT : 1250 value = 0; 1251 break; 1252 case XC16X_OPERAND_DR : 1253 value = fields->f_r1; 1254 break; 1255 case XC16X_OPERAND_DRB : 1256 value = fields->f_r1; 1257 break; 1258 case XC16X_OPERAND_DRI : 1259 value = fields->f_r4; 1260 break; 1261 case XC16X_OPERAND_EXTCOND : 1262 value = fields->f_extccode; 1263 break; 1264 case XC16X_OPERAND_GENREG : 1265 value = fields->f_regb8; 1266 break; 1267 case XC16X_OPERAND_HASH : 1268 value = 0; 1269 break; 1270 case XC16X_OPERAND_ICOND : 1271 value = fields->f_icondcode; 1272 break; 1273 case XC16X_OPERAND_LBIT2 : 1274 value = fields->f_op_lbit2; 1275 break; 1276 case XC16X_OPERAND_LBIT4 : 1277 value = fields->f_op_lbit4; 1278 break; 1279 case XC16X_OPERAND_MASK8 : 1280 value = fields->f_mask8; 1281 break; 1282 case XC16X_OPERAND_MASKLO8 : 1283 value = fields->f_datahi8; 1284 break; 1285 case XC16X_OPERAND_MEMGR8 : 1286 value = fields->f_memgr8; 1287 break; 1288 case XC16X_OPERAND_MEMORY : 1289 value = fields->f_memory; 1290 break; 1291 case XC16X_OPERAND_PAG : 1292 value = 0; 1293 break; 1294 case XC16X_OPERAND_PAGENUM : 1295 value = fields->f_pagenum; 1296 break; 1297 case XC16X_OPERAND_POF : 1298 value = 0; 1299 break; 1300 case XC16X_OPERAND_QBIT : 1301 value = fields->f_qbit; 1302 break; 1303 case XC16X_OPERAND_QHIBIT : 1304 value = fields->f_qhibit; 1305 break; 1306 case XC16X_OPERAND_QLOBIT : 1307 value = fields->f_qlobit; 1308 break; 1309 case XC16X_OPERAND_REG8 : 1310 value = fields->f_reg8; 1311 break; 1312 case XC16X_OPERAND_REGB8 : 1313 value = fields->f_regb8; 1314 break; 1315 case XC16X_OPERAND_REGBMEM8 : 1316 value = fields->f_regmem8; 1317 break; 1318 case XC16X_OPERAND_REGHI8 : 1319 value = fields->f_reghi8; 1320 break; 1321 case XC16X_OPERAND_REGMEM8 : 1322 value = fields->f_regmem8; 1323 break; 1324 case XC16X_OPERAND_REGOFF8 : 1325 value = fields->f_regoff8; 1326 break; 1327 case XC16X_OPERAND_REL : 1328 value = fields->f_rel8; 1329 break; 1330 case XC16X_OPERAND_RELHI : 1331 value = fields->f_relhi8; 1332 break; 1333 case XC16X_OPERAND_SEG : 1334 value = fields->f_seg8; 1335 break; 1336 case XC16X_OPERAND_SEGHI8 : 1337 value = fields->f_segnum8; 1338 break; 1339 case XC16X_OPERAND_SEGM : 1340 value = 0; 1341 break; 1342 case XC16X_OPERAND_SOF : 1343 value = 0; 1344 break; 1345 case XC16X_OPERAND_SR : 1346 value = fields->f_r2; 1347 break; 1348 case XC16X_OPERAND_SR2 : 1349 value = fields->f_r0; 1350 break; 1351 case XC16X_OPERAND_SRB : 1352 value = fields->f_r2; 1353 break; 1354 case XC16X_OPERAND_SRC1 : 1355 value = fields->f_r1; 1356 break; 1357 case XC16X_OPERAND_SRC2 : 1358 value = fields->f_r2; 1359 break; 1360 case XC16X_OPERAND_SRDIV : 1361 value = fields->f_reg8; 1362 break; 1363 case XC16X_OPERAND_U4 : 1364 value = fields->f_uimm4; 1365 break; 1366 case XC16X_OPERAND_UIMM16 : 1367 value = fields->f_uimm16; 1368 break; 1369 case XC16X_OPERAND_UIMM2 : 1370 value = fields->f_uimm2; 1371 break; 1372 case XC16X_OPERAND_UIMM3 : 1373 value = fields->f_uimm3; 1374 break; 1375 case XC16X_OPERAND_UIMM4 : 1376 value = fields->f_uimm4; 1377 break; 1378 case XC16X_OPERAND_UIMM7 : 1379 value = fields->f_uimm7; 1380 break; 1381 case XC16X_OPERAND_UIMM8 : 1382 value = fields->f_uimm8; 1383 break; 1384 case XC16X_OPERAND_UPAG16 : 1385 value = fields->f_uimm16; 1386 break; 1387 case XC16X_OPERAND_UPOF16 : 1388 value = fields->f_memory; 1389 break; 1390 case XC16X_OPERAND_USEG16 : 1391 value = fields->f_offset16; 1392 break; 1393 case XC16X_OPERAND_USEG8 : 1394 value = fields->f_seg8; 1395 break; 1396 case XC16X_OPERAND_USOF16 : 1397 value = fields->f_offset16; 1398 break; 1399 1400 default : 1401 /* xgettext:c-format */ 1402 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1403 opindex); 1404 abort (); 1405 } 1406 1407 return value; 1408 } 1409 1410 void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1411 void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1412 1413 /* Stuffing values in cgen_fields is handled by a collection of functions. 1414 They are distinguished by the type of the VALUE argument they accept. 1415 TODO: floating point, inlining support, remove cases where argument type 1416 not appropriate. */ 1417 1418 void 1419 xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1420 int opindex, 1421 CGEN_FIELDS * fields, 1422 int value) 1423 { 1424 switch (opindex) 1425 { 1426 case XC16X_OPERAND_REGNAM : 1427 fields->f_reg8 = value; 1428 break; 1429 case XC16X_OPERAND_BIT01 : 1430 fields->f_op_1bit = value; 1431 break; 1432 case XC16X_OPERAND_BIT1 : 1433 fields->f_op_bit1 = value; 1434 break; 1435 case XC16X_OPERAND_BIT2 : 1436 fields->f_op_bit2 = value; 1437 break; 1438 case XC16X_OPERAND_BIT4 : 1439 fields->f_op_bit4 = value; 1440 break; 1441 case XC16X_OPERAND_BIT8 : 1442 fields->f_op_bit8 = value; 1443 break; 1444 case XC16X_OPERAND_BITONE : 1445 fields->f_op_onebit = value; 1446 break; 1447 case XC16X_OPERAND_CADDR : 1448 fields->f_offset16 = value; 1449 break; 1450 case XC16X_OPERAND_COND : 1451 fields->f_condcode = value; 1452 break; 1453 case XC16X_OPERAND_DATA8 : 1454 fields->f_data8 = value; 1455 break; 1456 case XC16X_OPERAND_DATAHI8 : 1457 fields->f_datahi8 = value; 1458 break; 1459 case XC16X_OPERAND_DOT : 1460 break; 1461 case XC16X_OPERAND_DR : 1462 fields->f_r1 = value; 1463 break; 1464 case XC16X_OPERAND_DRB : 1465 fields->f_r1 = value; 1466 break; 1467 case XC16X_OPERAND_DRI : 1468 fields->f_r4 = value; 1469 break; 1470 case XC16X_OPERAND_EXTCOND : 1471 fields->f_extccode = value; 1472 break; 1473 case XC16X_OPERAND_GENREG : 1474 fields->f_regb8 = value; 1475 break; 1476 case XC16X_OPERAND_HASH : 1477 break; 1478 case XC16X_OPERAND_ICOND : 1479 fields->f_icondcode = value; 1480 break; 1481 case XC16X_OPERAND_LBIT2 : 1482 fields->f_op_lbit2 = value; 1483 break; 1484 case XC16X_OPERAND_LBIT4 : 1485 fields->f_op_lbit4 = value; 1486 break; 1487 case XC16X_OPERAND_MASK8 : 1488 fields->f_mask8 = value; 1489 break; 1490 case XC16X_OPERAND_MASKLO8 : 1491 fields->f_datahi8 = value; 1492 break; 1493 case XC16X_OPERAND_MEMGR8 : 1494 fields->f_memgr8 = value; 1495 break; 1496 case XC16X_OPERAND_MEMORY : 1497 fields->f_memory = value; 1498 break; 1499 case XC16X_OPERAND_PAG : 1500 break; 1501 case XC16X_OPERAND_PAGENUM : 1502 fields->f_pagenum = value; 1503 break; 1504 case XC16X_OPERAND_POF : 1505 break; 1506 case XC16X_OPERAND_QBIT : 1507 fields->f_qbit = value; 1508 break; 1509 case XC16X_OPERAND_QHIBIT : 1510 fields->f_qhibit = value; 1511 break; 1512 case XC16X_OPERAND_QLOBIT : 1513 fields->f_qlobit = value; 1514 break; 1515 case XC16X_OPERAND_REG8 : 1516 fields->f_reg8 = value; 1517 break; 1518 case XC16X_OPERAND_REGB8 : 1519 fields->f_regb8 = value; 1520 break; 1521 case XC16X_OPERAND_REGBMEM8 : 1522 fields->f_regmem8 = value; 1523 break; 1524 case XC16X_OPERAND_REGHI8 : 1525 fields->f_reghi8 = value; 1526 break; 1527 case XC16X_OPERAND_REGMEM8 : 1528 fields->f_regmem8 = value; 1529 break; 1530 case XC16X_OPERAND_REGOFF8 : 1531 fields->f_regoff8 = value; 1532 break; 1533 case XC16X_OPERAND_REL : 1534 fields->f_rel8 = value; 1535 break; 1536 case XC16X_OPERAND_RELHI : 1537 fields->f_relhi8 = value; 1538 break; 1539 case XC16X_OPERAND_SEG : 1540 fields->f_seg8 = value; 1541 break; 1542 case XC16X_OPERAND_SEGHI8 : 1543 fields->f_segnum8 = value; 1544 break; 1545 case XC16X_OPERAND_SEGM : 1546 break; 1547 case XC16X_OPERAND_SOF : 1548 break; 1549 case XC16X_OPERAND_SR : 1550 fields->f_r2 = value; 1551 break; 1552 case XC16X_OPERAND_SR2 : 1553 fields->f_r0 = value; 1554 break; 1555 case XC16X_OPERAND_SRB : 1556 fields->f_r2 = value; 1557 break; 1558 case XC16X_OPERAND_SRC1 : 1559 fields->f_r1 = value; 1560 break; 1561 case XC16X_OPERAND_SRC2 : 1562 fields->f_r2 = value; 1563 break; 1564 case XC16X_OPERAND_SRDIV : 1565 fields->f_reg8 = value; 1566 break; 1567 case XC16X_OPERAND_U4 : 1568 fields->f_uimm4 = value; 1569 break; 1570 case XC16X_OPERAND_UIMM16 : 1571 fields->f_uimm16 = value; 1572 break; 1573 case XC16X_OPERAND_UIMM2 : 1574 fields->f_uimm2 = value; 1575 break; 1576 case XC16X_OPERAND_UIMM3 : 1577 fields->f_uimm3 = value; 1578 break; 1579 case XC16X_OPERAND_UIMM4 : 1580 fields->f_uimm4 = value; 1581 break; 1582 case XC16X_OPERAND_UIMM7 : 1583 fields->f_uimm7 = value; 1584 break; 1585 case XC16X_OPERAND_UIMM8 : 1586 fields->f_uimm8 = value; 1587 break; 1588 case XC16X_OPERAND_UPAG16 : 1589 fields->f_uimm16 = value; 1590 break; 1591 case XC16X_OPERAND_UPOF16 : 1592 fields->f_memory = value; 1593 break; 1594 case XC16X_OPERAND_USEG16 : 1595 fields->f_offset16 = value; 1596 break; 1597 case XC16X_OPERAND_USEG8 : 1598 fields->f_seg8 = value; 1599 break; 1600 case XC16X_OPERAND_USOF16 : 1601 fields->f_offset16 = value; 1602 break; 1603 1604 default : 1605 /* xgettext:c-format */ 1606 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1607 opindex); 1608 abort (); 1609 } 1610 } 1611 1612 void 1613 xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1614 int opindex, 1615 CGEN_FIELDS * fields, 1616 bfd_vma value) 1617 { 1618 switch (opindex) 1619 { 1620 case XC16X_OPERAND_REGNAM : 1621 fields->f_reg8 = value; 1622 break; 1623 case XC16X_OPERAND_BIT01 : 1624 fields->f_op_1bit = value; 1625 break; 1626 case XC16X_OPERAND_BIT1 : 1627 fields->f_op_bit1 = value; 1628 break; 1629 case XC16X_OPERAND_BIT2 : 1630 fields->f_op_bit2 = value; 1631 break; 1632 case XC16X_OPERAND_BIT4 : 1633 fields->f_op_bit4 = value; 1634 break; 1635 case XC16X_OPERAND_BIT8 : 1636 fields->f_op_bit8 = value; 1637 break; 1638 case XC16X_OPERAND_BITONE : 1639 fields->f_op_onebit = value; 1640 break; 1641 case XC16X_OPERAND_CADDR : 1642 fields->f_offset16 = value; 1643 break; 1644 case XC16X_OPERAND_COND : 1645 fields->f_condcode = value; 1646 break; 1647 case XC16X_OPERAND_DATA8 : 1648 fields->f_data8 = value; 1649 break; 1650 case XC16X_OPERAND_DATAHI8 : 1651 fields->f_datahi8 = value; 1652 break; 1653 case XC16X_OPERAND_DOT : 1654 break; 1655 case XC16X_OPERAND_DR : 1656 fields->f_r1 = value; 1657 break; 1658 case XC16X_OPERAND_DRB : 1659 fields->f_r1 = value; 1660 break; 1661 case XC16X_OPERAND_DRI : 1662 fields->f_r4 = value; 1663 break; 1664 case XC16X_OPERAND_EXTCOND : 1665 fields->f_extccode = value; 1666 break; 1667 case XC16X_OPERAND_GENREG : 1668 fields->f_regb8 = value; 1669 break; 1670 case XC16X_OPERAND_HASH : 1671 break; 1672 case XC16X_OPERAND_ICOND : 1673 fields->f_icondcode = value; 1674 break; 1675 case XC16X_OPERAND_LBIT2 : 1676 fields->f_op_lbit2 = value; 1677 break; 1678 case XC16X_OPERAND_LBIT4 : 1679 fields->f_op_lbit4 = value; 1680 break; 1681 case XC16X_OPERAND_MASK8 : 1682 fields->f_mask8 = value; 1683 break; 1684 case XC16X_OPERAND_MASKLO8 : 1685 fields->f_datahi8 = value; 1686 break; 1687 case XC16X_OPERAND_MEMGR8 : 1688 fields->f_memgr8 = value; 1689 break; 1690 case XC16X_OPERAND_MEMORY : 1691 fields->f_memory = value; 1692 break; 1693 case XC16X_OPERAND_PAG : 1694 break; 1695 case XC16X_OPERAND_PAGENUM : 1696 fields->f_pagenum = value; 1697 break; 1698 case XC16X_OPERAND_POF : 1699 break; 1700 case XC16X_OPERAND_QBIT : 1701 fields->f_qbit = value; 1702 break; 1703 case XC16X_OPERAND_QHIBIT : 1704 fields->f_qhibit = value; 1705 break; 1706 case XC16X_OPERAND_QLOBIT : 1707 fields->f_qlobit = value; 1708 break; 1709 case XC16X_OPERAND_REG8 : 1710 fields->f_reg8 = value; 1711 break; 1712 case XC16X_OPERAND_REGB8 : 1713 fields->f_regb8 = value; 1714 break; 1715 case XC16X_OPERAND_REGBMEM8 : 1716 fields->f_regmem8 = value; 1717 break; 1718 case XC16X_OPERAND_REGHI8 : 1719 fields->f_reghi8 = value; 1720 break; 1721 case XC16X_OPERAND_REGMEM8 : 1722 fields->f_regmem8 = value; 1723 break; 1724 case XC16X_OPERAND_REGOFF8 : 1725 fields->f_regoff8 = value; 1726 break; 1727 case XC16X_OPERAND_REL : 1728 fields->f_rel8 = value; 1729 break; 1730 case XC16X_OPERAND_RELHI : 1731 fields->f_relhi8 = value; 1732 break; 1733 case XC16X_OPERAND_SEG : 1734 fields->f_seg8 = value; 1735 break; 1736 case XC16X_OPERAND_SEGHI8 : 1737 fields->f_segnum8 = value; 1738 break; 1739 case XC16X_OPERAND_SEGM : 1740 break; 1741 case XC16X_OPERAND_SOF : 1742 break; 1743 case XC16X_OPERAND_SR : 1744 fields->f_r2 = value; 1745 break; 1746 case XC16X_OPERAND_SR2 : 1747 fields->f_r0 = value; 1748 break; 1749 case XC16X_OPERAND_SRB : 1750 fields->f_r2 = value; 1751 break; 1752 case XC16X_OPERAND_SRC1 : 1753 fields->f_r1 = value; 1754 break; 1755 case XC16X_OPERAND_SRC2 : 1756 fields->f_r2 = value; 1757 break; 1758 case XC16X_OPERAND_SRDIV : 1759 fields->f_reg8 = value; 1760 break; 1761 case XC16X_OPERAND_U4 : 1762 fields->f_uimm4 = value; 1763 break; 1764 case XC16X_OPERAND_UIMM16 : 1765 fields->f_uimm16 = value; 1766 break; 1767 case XC16X_OPERAND_UIMM2 : 1768 fields->f_uimm2 = value; 1769 break; 1770 case XC16X_OPERAND_UIMM3 : 1771 fields->f_uimm3 = value; 1772 break; 1773 case XC16X_OPERAND_UIMM4 : 1774 fields->f_uimm4 = value; 1775 break; 1776 case XC16X_OPERAND_UIMM7 : 1777 fields->f_uimm7 = value; 1778 break; 1779 case XC16X_OPERAND_UIMM8 : 1780 fields->f_uimm8 = value; 1781 break; 1782 case XC16X_OPERAND_UPAG16 : 1783 fields->f_uimm16 = value; 1784 break; 1785 case XC16X_OPERAND_UPOF16 : 1786 fields->f_memory = value; 1787 break; 1788 case XC16X_OPERAND_USEG16 : 1789 fields->f_offset16 = value; 1790 break; 1791 case XC16X_OPERAND_USEG8 : 1792 fields->f_seg8 = value; 1793 break; 1794 case XC16X_OPERAND_USOF16 : 1795 fields->f_offset16 = value; 1796 break; 1797 1798 default : 1799 /* xgettext:c-format */ 1800 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1801 opindex); 1802 abort (); 1803 } 1804 } 1805 1806 /* Function to call before using the instruction builder tables. */ 1807 1808 void 1809 xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1810 { 1811 cd->insert_handlers = & xc16x_cgen_insert_handlers[0]; 1812 cd->extract_handlers = & xc16x_cgen_extract_handlers[0]; 1813 1814 cd->insert_operand = xc16x_cgen_insert_operand; 1815 cd->extract_operand = xc16x_cgen_extract_operand; 1816 1817 cd->get_int_operand = xc16x_cgen_get_int_operand; 1818 cd->set_int_operand = xc16x_cgen_set_int_operand; 1819 cd->get_vma_operand = xc16x_cgen_get_vma_operand; 1820 cd->set_vma_operand = xc16x_cgen_set_vma_operand; 1821 } 1822
