| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| CallLowering.cpp | 117 SmallVector<CCValAssign, 16> ArgLocs;
118 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
128 assert(j < ArgLocs.size() && "Skipped too many arg locs");
130 CCValAssign &VA = ArgLocs[j];
134 j += Handler.assignCustomValue(Args[i], makeArrayRef(ArgLocs).slice(j));
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64CallLowering.cpp | 62 SmallVector<CCValAssign, 16> ArgLocs;
63 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
77 assert(ArgLocs.size() == Args.size() &&
79 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
80 CCValAssign &VA = ArgLocs[i];
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/ |
| Nios2ISelLowering.cpp | 94 SmallVector<CCValAssign, 16> ArgLocs;
95 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
103 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
104 CCValAssign &VA = ArgLocs[i];
|
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 167 SmallVector<CCValAssign, 16> ArgLocs;
168 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
171 for (auto &VA : ArgLocs) {
241 SmallVector<CCValAssign, 16> ArgLocs;
242 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
267 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs);
269 CCValAssign &VA = ArgLocs[i];
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 175 SmallVector<CCValAssign, 16> ArgLocs;
177 getTargetMachine(), ArgLocs, *DAG.getContext());
181 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
182 CCValAssign &VA = ArgLocs[i];
294 SmallVector<CCValAssign, 16> ArgLocs;
296 DAG.getTarget(), ArgLocs, *DAG.getContext());
308 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
309 CCValAssign &VA = ArgLocs[i];
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| AMDGPUCallLowering.cpp | 104 SmallVector<CCValAssign, 16> ArgLocs;
105 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
238 OrigArgIdx != NumArgs && i != ArgLocs.size(); ++Arg, ++OrigArgIdx) {
241 CCValAssign &VA = ArgLocs[i++];
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsCallLowering.cpp | 48 bool handle(ArrayRef<CCValAssign> ArgLocs,
114 bool IncomingValueHandler::handle(ArrayRef<CCValAssign> ArgLocs,
117 if (!assign(ArgLocs[i], Args[i].Reg))
130 bool handle(ArrayRef<CCValAssign> ArgLocs,
177 bool OutgoingValueHandler::handle(ArrayRef<CCValAssign> ArgLocs,
180 if (!assign(ArgLocs[i], Args[i].Reg))
223 SmallVector<CCValAssign, 16> ArgLocs;
224 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
229 if (!RetHandler.handle(ArgLocs, RetInfos)) {
276 SmallVector<CCValAssign, 16> ArgLocs;
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 343 SmallVector<CCValAssign, 16> ArgLocs;
344 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
356 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(),
375 assert(ArgLocs[ValNo].getValNo() == ValNo &&
376 "ArgLocs should remain in order and only hold varargs args");
377 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset();
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 296 SmallVector<CCValAssign, 16> ArgLocs;
298 getTargetMachine(), ArgLocs, *DAG.getContext());
304 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
306 CCValAssign &VA = ArgLocs[i];
389 SmallVector<CCValAssign, 16> ArgLocs;
391 getTargetMachine(), ArgLocs, *DAG.getContext());
406 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
407 CCValAssign &VA = ArgLocs[i];
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 702 SmallVector<CCValAssign, 16> ArgLocs;
704 getTargetMachine(), ArgLocs, *DAG.getContext());
719 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
720 CCValAssign &VA = ArgLocs[i];
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 315 SmallVector<CCValAssign, 16> ArgLocs;
317 getTargetMachine(), ArgLocs, *DAG.getContext());
322 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
323 CCValAssign &VA = ArgLocs[i];
452 SmallVector<CCValAssign, 16> ArgLocs;
454 getTargetMachine(), ArgLocs, *DAG.getContext());
469 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
470 CCValAssign &VA = ArgLocs[i];
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
| ARCISelLowering.cpp | 239 SmallVector<CCValAssign, 16> ArgLocs;
240 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
263 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
264 CCValAssign &VA = ArgLocs[i];
457 SmallVector<CCValAssign, 16> ArgLocs;
458 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
480 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
481 CCValAssign &VA = ArgLocs[i];
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 221 SmallVector<CCValAssign, 16> ArgLocs;
222 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
225 for (auto &VA : ArgLocs) {
300 SmallVector<CCValAssign, 16> ArgLocs;
301 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
325 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs);
327 CCValAssign &VA = ArgLocs[i];
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 533 SmallVector<CCValAssign, 16> ArgLocs;
534 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
546 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(),
565 assert(ArgLocs[ValNo].getValNo() == ValNo &&
566 "ArgLocs should remain in order and only hold varargs args");
567 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset();
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 431 SmallVector<CCValAssign, 16> ArgLocs;
432 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
440 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
441 CCValAssign &VA = ArgLocs[i];
588 SmallVector<CCValAssign, 16> ArgLocs;
589 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
645 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) {
646 CCValAssign &VA = ArgLocs[I];
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 276 SmallVectorImpl<CCValAssign> &ArgLocs,
330 SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal;
421 SmallVector<CCValAssign, 16> ArgLocs;
422 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
424 AnalyzeArguments(CCInfo, ArgLocs, Ins);
432 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
433 CCValAssign &VA = ArgLocs[i];
564 SmallVector<CCValAssign, 16> ArgLocs;
565 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
567 AnalyzeArguments(CCInfo, ArgLocs, Outs)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 241 SmallVector<CCValAssign, 16> ArgLocs;
243 getTargetMachine(), ArgLocs, *DAG.getContext());
258 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
259 CCValAssign &VA = ArgLocs[i];
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 162 SmallVector<CCValAssign, 16> ArgLocs;
164 getTargetMachine(), ArgLocs, *DAG.getContext());
169 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
170 CCValAssign &VA = ArgLocs[i];
191 CCValAssign &NextVA = ArgLocs[++i];
361 SmallVector<CCValAssign, 16> ArgLocs;
363 DAG.getTarget(), ArgLocs, *DAG.getContext());
404 for (unsigned i = 0, realArgIdx = 0, byvalArgIdx = 0, e = ArgLocs.size();
407 CCValAssign &VA = ArgLocs[i];
481 CCValAssign &NextVA = ArgLocs[++i]
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 447 SmallVector<CCValAssign, 16> ArgLocs;
448 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
456 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
457 CCValAssign &VA = ArgLocs[i];
603 SmallVector<CCValAssign, 16> ArgLocs;
604 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
657 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) {
658 CCValAssign &VA = ArgLocs[I];
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 432 SmallVectorImpl<CCValAssign> &ArgLocs,
603 SmallVector<CCValAssign, 16> ArgLocs;
604 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
606 AnalyzeArguments(CCInfo, ArgLocs, Ins);
614 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
615 CCValAssign &VA = ArgLocs[i];
682 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
786 SmallVector<CCValAssign, 16> ArgLocs;
787 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
789 AnalyzeArguments(CCInfo, ArgLocs, Outs)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
