1 /* 2 * Copyright 2012 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #ifndef BLORP_H 25 #define BLORP_H 26 27 #include <stdint.h> 28 #include <stdbool.h> 29 30 #include "isl/isl.h" 31 32 struct brw_stage_prog_data; 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 struct blorp_batch; 39 struct blorp_params; 40 41 struct blorp_context { 42 void *driver_ctx; 43 44 const struct isl_device *isl_dev; 45 46 const struct brw_compiler *compiler; 47 48 bool (*lookup_shader)(struct blorp_context *blorp, 49 const void *key, uint32_t key_size, 50 uint32_t *kernel_out, void *prog_data_out); 51 bool (*upload_shader)(struct blorp_context *blorp, 52 const void *key, uint32_t key_size, 53 const void *kernel, uint32_t kernel_size, 54 const struct brw_stage_prog_data *prog_data, 55 uint32_t prog_data_size, 56 uint32_t *kernel_out, void *prog_data_out); 57 void (*exec)(struct blorp_batch *batch, const struct blorp_params *params); 58 }; 59 60 void blorp_init(struct blorp_context *blorp, void *driver_ctx, 61 struct isl_device *isl_dev); 62 void blorp_finish(struct blorp_context *blorp); 63 64 enum blorp_batch_flags { 65 /** 66 * This flag indicates that blorp should *not* re-emit the depth and 67 * stencil buffer packets. Instead, the driver guarantees that all depth 68 * and stencil images passed in will match what is currently set in the 69 * hardware. 70 */ 71 BLORP_BATCH_NO_EMIT_DEPTH_STENCIL = (1 << 0), 72 73 /* This flag indicates that the blorp call should be predicated. */ 74 BLORP_BATCH_PREDICATE_ENABLE = (1 << 1), 75 }; 76 77 struct blorp_batch { 78 struct blorp_context *blorp; 79 void *driver_batch; 80 enum blorp_batch_flags flags; 81 }; 82 83 void blorp_batch_init(struct blorp_context *blorp, struct blorp_batch *batch, 84 void *driver_batch, enum blorp_batch_flags flags); 85 void blorp_batch_finish(struct blorp_batch *batch); 86 87 struct blorp_address { 88 void *buffer; 89 unsigned reloc_flags; 90 uint32_t offset; 91 uint32_t mocs; 92 }; 93 94 struct blorp_surf 95 { 96 const struct isl_surf *surf; 97 struct blorp_address addr; 98 99 const struct isl_surf *aux_surf; 100 struct blorp_address aux_addr; 101 enum isl_aux_usage aux_usage; 102 103 union isl_color_value clear_color; 104 105 /** 106 * If set (bo != NULL), clear_color is ignored and the actual clear color 107 * is fetched from this address. On gen7-8, this is all of dword 7 of 108 * RENDER_SURFACE_STATE and is the responsibility of the caller to ensure 109 * that it contains a swizzle of RGBA and resource min LOD of 0. 110 */ 111 struct blorp_address clear_color_addr; 112 }; 113 114 void 115 blorp_blit(struct blorp_batch *batch, 116 const struct blorp_surf *src_surf, 117 unsigned src_level, unsigned src_layer, 118 enum isl_format src_format, struct isl_swizzle src_swizzle, 119 const struct blorp_surf *dst_surf, 120 unsigned dst_level, unsigned dst_layer, 121 enum isl_format dst_format, struct isl_swizzle dst_swizzle, 122 float src_x0, float src_y0, 123 float src_x1, float src_y1, 124 float dst_x0, float dst_y0, 125 float dst_x1, float dst_y1, 126 uint32_t filter, bool mirror_x, bool mirror_y); 127 128 void 129 blorp_copy(struct blorp_batch *batch, 130 const struct blorp_surf *src_surf, 131 unsigned src_level, unsigned src_layer, 132 const struct blorp_surf *dst_surf, 133 unsigned dst_level, unsigned dst_layer, 134 uint32_t src_x, uint32_t src_y, 135 uint32_t dst_x, uint32_t dst_y, 136 uint32_t src_width, uint32_t src_height); 137 138 void 139 blorp_buffer_copy(struct blorp_batch *batch, 140 struct blorp_address src, 141 struct blorp_address dst, 142 uint64_t size); 143 144 void 145 blorp_fast_clear(struct blorp_batch *batch, 146 const struct blorp_surf *surf, enum isl_format format, 147 uint32_t level, uint32_t start_layer, uint32_t num_layers, 148 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1); 149 150 void 151 blorp_clear(struct blorp_batch *batch, 152 const struct blorp_surf *surf, 153 enum isl_format format, struct isl_swizzle swizzle, 154 uint32_t level, uint32_t start_layer, uint32_t num_layers, 155 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, 156 union isl_color_value clear_color, 157 const bool color_write_disable[4]); 158 159 void 160 blorp_clear_depth_stencil(struct blorp_batch *batch, 161 const struct blorp_surf *depth, 162 const struct blorp_surf *stencil, 163 uint32_t level, uint32_t start_layer, 164 uint32_t num_layers, 165 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, 166 bool clear_depth, float depth_value, 167 uint8_t stencil_mask, uint8_t stencil_value); 168 bool 169 blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, 170 uint32_t num_samples, 171 uint32_t x0, uint32_t y0, 172 uint32_t x1, uint32_t y1); 173 174 void 175 blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch, 176 uint32_t num_samples, 177 uint32_t x0, uint32_t y0, 178 uint32_t x1, uint32_t y1, 179 bool clear_depth, bool clear_stencil, 180 uint8_t stencil_value); 181 void 182 blorp_clear_attachments(struct blorp_batch *batch, 183 uint32_t binding_table_offset, 184 enum isl_format depth_format, 185 uint32_t num_samples, 186 uint32_t start_layer, uint32_t num_layers, 187 uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, 188 bool clear_color, union isl_color_value color_value, 189 bool clear_depth, float depth_value, 190 uint8_t stencil_mask, uint8_t stencil_value); 191 192 enum blorp_fast_clear_op { 193 BLORP_FAST_CLEAR_OP_NONE = 0, 194 BLORP_FAST_CLEAR_OP_CLEAR, 195 BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL, 196 BLORP_FAST_CLEAR_OP_RESOLVE_FULL, 197 }; 198 199 void 200 blorp_ccs_resolve(struct blorp_batch *batch, 201 struct blorp_surf *surf, uint32_t level, 202 uint32_t start_layer, uint32_t num_layers, 203 enum isl_format format, 204 enum blorp_fast_clear_op resolve_op); 205 206 void 207 blorp_mcs_partial_resolve(struct blorp_batch *batch, 208 struct blorp_surf *surf, 209 enum isl_format format, 210 uint32_t start_layer, uint32_t num_layers); 211 212 /** 213 * For an overview of the HiZ operations, see the following sections of the 214 * Sandy Bridge PRM, Volume 1, Part2: 215 * - 7.5.3.1 Depth Buffer Clear 216 * - 7.5.3.2 Depth Buffer Resolve 217 * - 7.5.3.3 Hierarchical Depth Buffer Resolve 218 * 219 * Of these, two get entered in the resolve map as needing to be done to the 220 * buffer: depth resolve and hiz resolve. 221 */ 222 enum blorp_hiz_op { 223 BLORP_HIZ_OP_NONE, 224 BLORP_HIZ_OP_DEPTH_CLEAR, 225 BLORP_HIZ_OP_DEPTH_RESOLVE, 226 BLORP_HIZ_OP_HIZ_RESOLVE, 227 }; 228 229 void 230 blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf, 231 uint32_t level, uint32_t start_layer, uint32_t num_layers, 232 enum blorp_hiz_op op); 233 234 #ifdef __cplusplus 235 } /* end extern "C" */ 236 #endif /* __cplusplus */ 237 238 #endif /* BLORP_H */ 239
