/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 780 template <unsigned ShiftAmount> 790 OffBits >>= ShiftAmount; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 754 template <unsigned ShiftAmount> 764 OffBits >>= ShiftAmount; [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 615 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); 622 if (Opc == ISD::SRL && ShiftAmount) { 626 ShiftAmount -= 1; 629 while (ShiftAmount--) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 827 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); 829 DAG.getNode(ISD::SHL, DL, VT, Op, ShiftAmount), 830 ShiftAmount); [all...] |
TargetLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 736 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); 743 if (Opc == ISD::SRL && ShiftAmount) { 747 ShiftAmount -= 1; 750 while (ShiftAmount--) [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | 473 SDValue ShiftAmount = DAG.getConstant(NumBits, 476 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); 621 SDValue ShiftAmount = DAG.getConstant(NumBits, 623 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 876 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); 878 DAG.getNode(ISD::SHL, DL, VT, Op, ShiftAmount), 879 ShiftAmount); [all...] |
TargetLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/AsmParser/ |
RISCVAsmParser.cpp | [all...] |
/external/llvm/lib/Analysis/ |
InstructionSimplify.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineCasts.cpp | 457 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0; 459 if ((VecWidth % DestWidth != 0) || (ShiftAmount % DestWidth != 0)) 470 unsigned Elt = ShiftAmount / DestWidth; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
AVRISelLowering.cpp | 301 uint64_t ShiftAmount = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); 324 while (ShiftAmount--) { [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
InstCombineCasts.cpp | 474 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0; 476 if ((VecWidth % DestWidth != 0) || (ShiftAmount % DestWidth != 0)) 487 unsigned Elt = ShiftAmount / DestWidth; [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
InstructionSimplify.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | [all...] |
/external/swiftshader/third_party/subzero/src/ |
IceTargetLoweringX86BaseImpl.h | [all...] |
IceTargetLoweringMIPS32.cpp | [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 199 unsigned ShiftAmount; 351 return ShiftedImm.ShiftAmount; 704 unsigned Shift = ShiftedImm.ShiftAmount; 742 unsigned Shift = ShiftedImm.ShiftAmount; [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 91 unsigned &ShiftAmount); [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 346 unsigned ShiftAmount; 493 return ShiftedImm.ShiftAmount; 769 unsigned Shift = ShiftedImm.ShiftAmount; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | [all...] |