| /external/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 75 // Map from StackSlot to its original register.
77 // Map from pair of (StackSlot and Original VNI) to a set of spills which
78 // have the same stackslot and have equal values defined by Original VNI.
123 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
125 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
147 int StackSlot;
150 // All registers to spill to StackSlot, including the main register.
279 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
283 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
391 TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| InlineSpiller.cpp | 70 int StackSlot;
73 // All registers to spill to StackSlot, including the main register.
250 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
254 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
605 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) {
725 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot,
729 VRM.addSpillSlotUse(StackSlot, MII);
783 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) {
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 97 // Map from StackSlot to the LiveInterval of the original register.
103 // Map from pair of (StackSlot and Original VNI) to a set of spills which
104 // have the same stackslot and have equal values defined by Original VNI.
148 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
150 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
171 int StackSlot;
174 // All registers to spill to StackSlot, including the main register.
297 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot)
301 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot)
409 TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot,
[all...] |
| /external/v8/src/compiler/ |
| machine-operator.cc | 445 "StackSlot", 0, 0, 0, 1, 0, 0,
513 #define STACKSLOT(Size, Alignment) \
521 STACK_SLOT_CACHED_SIZES_ALIGNMENTS_LIST(STACKSLOT)
522 #undef STACKSLOT
[all...] |
| raw-machine-assembler.h | 85 Node* StackSlot(MachineRepresentation rep, int alignment = 0) {
86 return AddNode(machine()->StackSlot(rep, alignment));
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
