1 /* 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics to 4 develop this 3D driver. 5 6 Permission is hereby granted, free of charge, to any person obtaining 7 a copy of this software and associated documentation files (the 8 "Software"), to deal in the Software without restriction, including 9 without limitation the rights to use, copy, modify, merge, publish, 10 distribute, sublicense, and/or sell copies of the Software, and to 11 permit persons to whom the Software is furnished to do so, subject to 12 the following conditions: 13 14 The above copyright notice and this permission notice (including the 15 next paragraph) shall be included in all copies or substantial 16 portions of the Software. 17 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 26 **********************************************************************/ 27 /* 28 * Authors: 29 * Keith Whitwell <keithw (at) vmware.com> 30 */ 31 32 33 #include "main/compiler.h" 34 #include "main/context.h" 35 #include "brw_context.h" 36 #include "brw_vs.h" 37 #include "brw_util.h" 38 #include "brw_state.h" 39 #include "program/prog_print.h" 40 #include "program/prog_parameter.h" 41 #include "compiler/brw_nir.h" 42 #include "brw_program.h" 43 44 #include "util/ralloc.h" 45 46 /** 47 * Decide which set of clip planes should be used when clipping via 48 * gl_Position or gl_ClipVertex. 49 */ 50 gl_clip_plane * 51 brw_select_clip_planes(struct gl_context *ctx) 52 { 53 if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) { 54 /* There is currently a GLSL vertex shader, so clip according to GLSL 55 * rules, which means compare gl_ClipVertex (or gl_Position, if 56 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes 57 * that were stored in EyeUserPlane at the time the clip planes were 58 * specified. 59 */ 60 return ctx->Transform.EyeUserPlane; 61 } else { 62 /* Either we are using fixed function or an ARB vertex program. In 63 * either case the clip planes are going to be compared against 64 * gl_Position (which is in clip coordinates) so we have to clip using 65 * _ClipUserPlane, which was transformed into clip coordinates by Mesa 66 * core. 67 */ 68 return ctx->Transform._ClipUserPlane; 69 } 70 } 71 72 GLbitfield64 73 brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key, 74 GLbitfield64 user_varyings) 75 { 76 const struct gen_device_info *devinfo = &brw->screen->devinfo; 77 GLbitfield64 outputs_written = user_varyings; 78 79 if (key->copy_edgeflag) { 80 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); 81 } 82 83 if (devinfo->gen < 6) { 84 /* Put dummy slots into the VUE for the SF to put the replaced 85 * point sprite coords in. We shouldn't need these dummy slots, 86 * which take up precious URB space, but it would mean that the SF 87 * doesn't get nice aligned pairs of input coords into output 88 * coords, which would be a pain to handle. 89 */ 90 for (unsigned i = 0; i < 8; i++) { 91 if (key->point_coord_replace & (1 << i)) 92 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); 93 } 94 95 /* if back colors are written, allocate slots for front colors too */ 96 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) 97 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); 98 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) 99 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); 100 } 101 102 /* In order for legacy clipping to work, we need to populate the clip 103 * distance varying slots whenever clipping is enabled, even if the vertex 104 * shader doesn't write to gl_ClipDistance. 105 */ 106 if (key->nr_userclip_plane_consts > 0) { 107 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); 108 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); 109 } 110 111 return outputs_written; 112 } 113 114 static void 115 brw_vs_debug_recompile(struct brw_context *brw, struct gl_program *prog, 116 const struct brw_vs_prog_key *key) 117 { 118 perf_debug("Recompiling vertex shader for program %d\n", prog->Id); 119 120 bool found = false; 121 const struct brw_vs_prog_key *old_key = 122 brw_find_previous_compile(&brw->cache, BRW_CACHE_VS_PROG, 123 key->program_string_id); 124 125 if (!old_key) { 126 perf_debug(" Didn't find previous compile in the shader cache for " 127 "debug\n"); 128 return; 129 } 130 131 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) { 132 found |= key_debug(brw, "Vertex attrib w/a flags", 133 old_key->gl_attrib_wa_flags[i], 134 key->gl_attrib_wa_flags[i]); 135 } 136 137 found |= key_debug(brw, "legacy user clipping", 138 old_key->nr_userclip_plane_consts, 139 key->nr_userclip_plane_consts); 140 141 found |= key_debug(brw, "copy edgeflag", 142 old_key->copy_edgeflag, key->copy_edgeflag); 143 found |= key_debug(brw, "PointCoord replace", 144 old_key->point_coord_replace, key->point_coord_replace); 145 found |= key_debug(brw, "vertex color clamping", 146 old_key->clamp_vertex_color, key->clamp_vertex_color); 147 148 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); 149 150 if (!found) { 151 perf_debug(" Something else\n"); 152 } 153 } 154 155 static bool 156 brw_codegen_vs_prog(struct brw_context *brw, 157 struct brw_program *vp, 158 struct brw_vs_prog_key *key) 159 { 160 const struct brw_compiler *compiler = brw->screen->compiler; 161 const struct gen_device_info *devinfo = &brw->screen->devinfo; 162 const GLuint *program; 163 struct brw_vs_prog_data prog_data; 164 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base; 165 void *mem_ctx; 166 bool start_busy = false; 167 double start_time = 0; 168 169 memset(&prog_data, 0, sizeof(prog_data)); 170 171 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ 172 if (vp->program.is_arb_asm) 173 stage_prog_data->use_alt_mode = true; 174 175 mem_ctx = ralloc_context(NULL); 176 177 brw_assign_common_binding_table_offsets(devinfo, &vp->program, 178 &prog_data.base.base, 0); 179 180 if (!vp->program.is_arb_asm) { 181 brw_nir_setup_glsl_uniforms(mem_ctx, vp->program.nir, &vp->program, 182 &prog_data.base.base, 183 compiler->scalar_stage[MESA_SHADER_VERTEX]); 184 brw_nir_analyze_ubo_ranges(compiler, vp->program.nir, 185 prog_data.base.base.ubo_ranges); 186 } else { 187 brw_nir_setup_arb_uniforms(mem_ctx, vp->program.nir, &vp->program, 188 &prog_data.base.base); 189 } 190 191 uint64_t outputs_written = 192 brw_vs_outputs_written(brw, key, vp->program.nir->info.outputs_written); 193 194 brw_compute_vue_map(devinfo, 195 &prog_data.base.vue_map, outputs_written, 196 vp->program.nir->info.separate_shader); 197 198 if (0) { 199 _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true); 200 } 201 202 if (unlikely(brw->perf_debug)) { 203 start_busy = (brw->batch.last_bo && 204 brw_bo_busy(brw->batch.last_bo)); 205 start_time = get_time(); 206 } 207 208 if (unlikely(INTEL_DEBUG & DEBUG_VS)) { 209 if (vp->program.is_arb_asm) 210 brw_dump_arb_asm("vertex", &vp->program); 211 } 212 213 int st_index = -1; 214 if (INTEL_DEBUG & DEBUG_SHADER_TIME) { 215 st_index = brw_get_shader_time_index(brw, &vp->program, ST_VS, 216 !vp->program.is_arb_asm); 217 } 218 219 /* Emit GEN4 code. 220 */ 221 char *error_str; 222 program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data, 223 vp->program.nir, 224 st_index, &error_str); 225 if (program == NULL) { 226 if (!vp->program.is_arb_asm) { 227 vp->program.sh.data->LinkStatus = linking_failure; 228 ralloc_strcat(&vp->program.sh.data->InfoLog, error_str); 229 } 230 231 _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str); 232 233 ralloc_free(mem_ctx); 234 return false; 235 } 236 237 if (unlikely(brw->perf_debug)) { 238 if (vp->compiled_once) { 239 brw_vs_debug_recompile(brw, &vp->program, key); 240 } 241 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) { 242 perf_debug("VS compile took %.03f ms and stalled the GPU\n", 243 (get_time() - start_time) * 1000); 244 } 245 vp->compiled_once = true; 246 } 247 248 /* Scratch space is used for register spilling */ 249 brw_alloc_stage_scratch(brw, &brw->vs.base, 250 prog_data.base.base.total_scratch); 251 252 /* The param and pull_param arrays will be freed by the shader cache. */ 253 ralloc_steal(NULL, prog_data.base.base.param); 254 ralloc_steal(NULL, prog_data.base.base.pull_param); 255 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG, 256 key, sizeof(struct brw_vs_prog_key), 257 program, prog_data.base.base.program_size, 258 &prog_data, sizeof(prog_data), 259 &brw->vs.base.prog_offset, &brw->vs.base.prog_data); 260 ralloc_free(mem_ctx); 261 262 return true; 263 } 264 265 static bool 266 brw_vs_state_dirty(const struct brw_context *brw) 267 { 268 return brw_state_dirty(brw, 269 _NEW_BUFFERS | 270 _NEW_LIGHT | 271 _NEW_POINT | 272 _NEW_POLYGON | 273 _NEW_TEXTURE | 274 _NEW_TRANSFORM, 275 BRW_NEW_VERTEX_PROGRAM | 276 BRW_NEW_VS_ATTRIB_WORKAROUNDS); 277 } 278 279 void 280 brw_vs_populate_key(struct brw_context *brw, 281 struct brw_vs_prog_key *key) 282 { 283 struct gl_context *ctx = &brw->ctx; 284 /* BRW_NEW_VERTEX_PROGRAM */ 285 struct gl_program *prog = brw->programs[MESA_SHADER_VERTEX]; 286 struct brw_program *vp = (struct brw_program *) prog; 287 const struct gen_device_info *devinfo = &brw->screen->devinfo; 288 289 memset(key, 0, sizeof(*key)); 290 291 /* Just upload the program verbatim for now. Always send it all 292 * the inputs it asks for, whether they are varying or not. 293 */ 294 key->program_string_id = vp->id; 295 296 if (ctx->Transform.ClipPlanesEnabled != 0 && 297 (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) && 298 vp->program.info.clip_distance_array_size == 0) { 299 key->nr_userclip_plane_consts = 300 _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1; 301 } 302 303 if (devinfo->gen < 6) { 304 /* _NEW_POLYGON */ 305 key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL || 306 ctx->Polygon.BackMode != GL_FILL); 307 308 /* _NEW_POINT */ 309 if (ctx->Point.PointSprite) { 310 key->point_coord_replace = ctx->Point.CoordReplace & 0xff; 311 } 312 } 313 314 if (prog->info.outputs_written & 315 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | 316 VARYING_BIT_BFC1)) { 317 /* _NEW_LIGHT | _NEW_BUFFERS */ 318 key->clamp_vertex_color = ctx->Light._ClampVertexColor; 319 } 320 321 /* _NEW_TEXTURE */ 322 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex); 323 324 /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */ 325 if (devinfo->gen < 8 && !devinfo->is_haswell) { 326 memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags, 327 sizeof(brw->vb.attrib_wa_flags)); 328 } 329 } 330 331 void 332 brw_upload_vs_prog(struct brw_context *brw) 333 { 334 struct brw_vs_prog_key key; 335 /* BRW_NEW_VERTEX_PROGRAM */ 336 struct brw_program *vp = 337 (struct brw_program *) brw->programs[MESA_SHADER_VERTEX]; 338 339 if (!brw_vs_state_dirty(brw)) 340 return; 341 342 brw_vs_populate_key(brw, &key); 343 344 if (brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG, 345 &key, sizeof(key), 346 &brw->vs.base.prog_offset, &brw->vs.base.prog_data)) 347 return; 348 349 if (brw_disk_cache_upload_program(brw, MESA_SHADER_VERTEX)) 350 return; 351 352 vp = (struct brw_program *) brw->programs[MESA_SHADER_VERTEX]; 353 vp->id = key.program_string_id; 354 355 MAYBE_UNUSED bool success = brw_codegen_vs_prog(brw, vp, &key); 356 assert(success); 357 } 358 359 bool 360 brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog) 361 { 362 struct brw_context *brw = brw_context(ctx); 363 struct brw_vs_prog_key key; 364 uint32_t old_prog_offset = brw->vs.base.prog_offset; 365 struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data; 366 bool success; 367 368 struct brw_program *bvp = brw_program(prog); 369 370 memset(&key, 0, sizeof(key)); 371 372 brw_setup_tex_for_precompile(brw, &key.tex, prog); 373 key.program_string_id = bvp->id; 374 key.clamp_vertex_color = 375 (prog->info.outputs_written & 376 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | 377 VARYING_BIT_BFC1)); 378 379 success = brw_codegen_vs_prog(brw, bvp, &key); 380 381 brw->vs.base.prog_offset = old_prog_offset; 382 brw->vs.base.prog_data = old_prog_data; 383 384 return success; 385 } 386