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    Searched refs:Dirty (Results 1 - 16 of 16) sorted by null

  /device/linaro/bootloader/edk2/BaseTools/Source/C/GenPage/
VirtualMemory.h 84 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
107 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
  /device/linaro/bootloader/edk2/DuetPkg/DxeIpl/Ia32/
VirtualMemory.h 55 UINT32 Dirty:1; // 0 = Not written to (cleared by software), 1 = Written to (set by CPU)
75 UINT32 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
  /device/linaro/bootloader/edk2/DuetPkg/DxeIpl/X64/
VirtualMemory.h 80 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
102 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
  /device/linaro/bootloader/edk2/MdeModulePkg/Core/DxeIplPeim/X64/
VirtualMemory.h 87 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
109 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
133 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
  /device/linaro/bootloader/edk2/FatPkg/EnhancedFatDxe/
DiskCache.c 25 is dirty, it means that the relative info directly readed from media is older than
33 and there is dirty cache in the cache range, this parameter will be used.
66 // When reading data form disk directly, if some dirty data
68 // be updated with the cache's dirty data.
71 if (CacheTag->Dirty) {
156 CacheTag->Dirty = FALSE;
195 // Write dirty cache page back to disk
197 if (CacheTag->RealSize > 0 && CacheTag->Dirty) {
256 CacheTag->Dirty = TRUE;
257 DiskCache->Dirty = TRUE;
    [all...]
Flush.c 231 // Flush each entry up the tree while dirty
244 if (OFile->Dirty) {
272 OFile->Dirty = FALSE;
413 // Update that the volume is not dirty
423 // Flush all dirty cache entries to disk
Fat.h 155 BOOLEAN Dirty;
162 BOOLEAN Dirty;
263 // Dirty is set if there have been any updates to the
270 BOOLEAN Dirty;
351 // info for marking the volume dirty or not
762 Flush all the dirty cache back, include the FAT cache and the Data cache.
767 @retval EFI_SUCCESS - Flush all the dirty cache back successfully
1100 Set the volume as dirty or not.
1104 @param DirtyValue - Set the volume as dirty or not.
    [all...]
FileSpace.c 208 // If the volume's dirty bit is not set, set it now
411 OFile->Dirty = TRUE;
530 OFile->Dirty = TRUE;
ReadWrite.c 301 // and then flush the dirty cache info into disk.
331 // 2) The volume dirty bit is probably set already, and is expected to be
507 OFile->Dirty = TRUE;
Info.c 467 OFile->Dirty = TRUE;
  /device/linaro/bootloader/edk2/MdeModulePkg/Universal/CapsulePei/
Capsule.h 81 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
105 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
  /external/llvm/lib/CodeGen/
RegAllocFast.cpp 74 bool Dirty; // Register needs spill.
77 : LastUse(nullptr), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false){}
284 if (LR.Dirty) {
288 LR.Dirty = false;
331 /// spillAll - Spill all dirty virtregs without killing them.
474 return I->Dirty ? spillDirty : spillClean;
494 Cost += I->Dirty ? spillDirty : spillClean;
541 // Ignore the hint if we would have to spill a dirty register.
597 /// defineVirtReg - Allocate a register for VirtReg and mark it as dirty.
626 LRI->Dirty = true
    [all...]
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
RegAllocFast.cpp 76 bool Dirty; // Register needs spill.
79 Dirty(false) {}
259 if (LR.Dirty) {
263 LR.Dirty = false;
307 /// spillAll - Spill all dirty virtregs without killing them.
439 return LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillClean;
458 Cost += LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillClean;
494 // Ignore the hint if we would have to spill a dirty register.
539 /// defineVirtReg - Allocate a register for VirtReg and mark it as dirty.
568 LR.Dirty = true
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
RegAllocFast.cpp 89 bool Dirty = false; ///< Register needs spill.
320 if (LR.Dirty) {
324 LR.Dirty = false;
356 /// Spill all dirty virtregs without killing them.
497 return I->Dirty ? spillDirty : spillClean;
517 Cost += I->Dirty ? spillDirty : spillClean;
556 // Ignore the hint if we would have to spill a dirty register.
611 /// Allocates a register for VirtReg and mark it as dirty.
640 LRI->Dirty = true;
664 } else if (LRI->Dirty) {
    [all...]
  /device/linaro/bootloader/edk2/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/
S3Resume.c 114 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
138 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
    [all...]
  /external/python/cpython3/Lib/test/
test_enum.py     [all...]

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