1 /** @file 2 3 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR> 4 This program and the accompanying materials 5 are licensed and made available under the terms and conditions of the BSD License 6 which accompanies this distribution. The full text of the license may be found at 7 http://opensource.org/licenses/bsd-license.php 8 9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 12 Module Name: 13 VirtualMemory.h 14 15 Abstract: 16 17 Revision History: 18 19 **/ 20 21 #ifndef _VIRTUAL_MEMORY_H_ 22 #define _VIRTUAL_MEMORY_H_ 23 24 #pragma pack(1) 25 26 // 27 // Page Map Level 4 Offset (PML4) and 28 // Page Directory Pointer Table (PDPE) entries 4K & 2M 29 // 30 31 typedef union { 32 struct { 33 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory 34 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write 35 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User 36 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching 37 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached 38 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) 39 UINT64 Reserved:1; // Reserved 40 UINT64 MustBeZero:2; // Must Be Zero 41 UINT64 Available:3; // Available for use by system software 42 UINT64 PageTableBaseAddress:40; // Page Table Base Address 43 UINT64 AvabilableHigh:11; // Available for use by system software 44 UINT64 Nx:1; // No Execute bit 45 } Bits; 46 UINT64 Uint64; 47 } X64_PAGE_MAP_AND_DIRECTORY_POINTER_2MB_4K; 48 49 // 50 // Page Directory Entry 4K 51 // 52 typedef union { 53 struct { 54 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory 55 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write 56 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User 57 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching 58 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached 59 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) 60 UINT64 MustBeZero:3; // Must Be Zero 61 UINT64 Available:3; // Available for use by system software 62 UINT64 PageTableBaseAddress:40; // Page Table Base Address 63 UINT64 AvabilableHigh:11; // Available for use by system software 64 UINT64 Nx:1; // No Execute bit 65 } Bits; 66 UINT64 Uint64; 67 } X64_PAGE_DIRECTORY_ENTRY_4K; 68 69 // 70 // Page Table Entry 4K 71 // 72 typedef union { 73 struct { 74 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory 75 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write 76 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User 77 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching 78 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached 79 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) 80 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page 81 UINT64 PAT:1; // 0 = Ignore Page Attribute Table 82 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write 83 UINT64 Available:3; // Available for use by system software 84 UINT64 PageTableBaseAddress:40; // Page Table Base Address 85 UINT64 AvabilableHigh:11; // Available for use by system software 86 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution 87 } Bits; 88 UINT64 Uint64; 89 } X64_PAGE_TABLE_ENTRY_4K; 90 91 // 92 // Page Table Entry 2M 93 // 94 typedef union { 95 struct { 96 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory 97 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write 98 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User 99 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching 100 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached 101 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU) 102 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page 103 UINT64 MustBe1:1; // Must be 1 104 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write 105 UINT64 Available:3; // Available for use by system software 106 UINT64 PAT:1; // 107 UINT64 MustBeZero:8; // Must be zero; 108 UINT64 PageTableBaseAddress:31; // Page Table Base Address 109 UINT64 AvabilableHigh:11; // Available for use by system software 110 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution 111 } Bits; 112 UINT64 Uint64; 113 } X64_PAGE_TABLE_ENTRY_2M; 114 115 #pragma pack() 116 117 #endif 118
