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  /art/runtime/arch/mips/
registers_mips.h 90 F21 = 21,
callee_save_frame_mips.h 71 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) |
80 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) |
  /art/runtime/arch/mips64/
registers_mips64.h 91 F21 = 21,
context_mips64.cc 107 fprs_[F21] = nullptr;
callee_save_frame_mips64.h 70 (1 << art::mips64::F21) | (1 << art::mips64::F22) | (1 << art::mips64::F23) |
  /device/google/cuttlefish_common/host/frontend/vnc_server/
keysyms.h 34 F19 = 0xffd0, F20 = 0xffd1, F21 = 0xffd2, F22 = 0xffd3,
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
PPCBaseInfo.h 52 case R21: case X21: case F21: case V21: case CR5GT: return 21;
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCFrameLowering.h 144 {PPC::F21, -88},
221 {PPC::F21, -88},
PPCRegisterInfo.cpp 113 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
139 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
167 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
193 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
  /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/
MipsBaseInfo.h 80 case Mips::S5: case Mips::S5_64: case Mips::F21: case Mips::D21_64:
  /external/swiftshader/third_party/LLVM/lib/Target/Sparc/
FPMover.cpp 68 SP::F17, SP::F19, SP::F21, SP::F23, SP::F25, SP::F27, SP::F29, SP::F31
  /device/linaro/bootloader/edk2/MdePkg/Library/BaseMemoryLibOptPei/
BaseMemoryLibOptPei.inf 23 FILE_GUID = D6F43B1B-0F21-462b-B8B7-A033C3EB4261
  /external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsRegisterInfo.cpp 107 case Mips::S5: case Mips::S5_64: case Mips::F21: case Mips::D21_64:
152 Mips::F25, Mips::F24, Mips::F23, Mips::F22, Mips::F21, Mips::F20,
  /external/llvm/lib/Target/PowerPC/Disassembler/
PPCDisassembler.cpp 87 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
129 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
149 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/
PPCDisassembler.cpp 87 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
140 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
160 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/
DebugSupport.h 375 UINT64 F21[2];
  /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/
DebugSupport.h 344 UINT64 F21[2];
  /external/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 82 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
121 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
140 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 82 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
141 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
160 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
    [all...]
  /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
MipsGenRegisterInfo.inc 188 F21 = 168,
    [all...]
  /art/compiler/utils/mips/
assembler_mips32r5_test.cc 178 fp_registers_.push_back(new mips::FRegister(mips::F21));
  /external/llvm/lib/Target/Sparc/Disassembler/
SparcDisassembler.cpp 83 SP::F20, SP::F21, SP::F22, SP::F23,
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/Disassembler/
SparcDisassembler.cpp 85 SP::F20, SP::F21, SP::F22, SP::F23,
  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 126 {PPC::F21, -88},
190 {PPC::F21, -88},
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 126 {PPC::F21, -88},
210 {PPC::F21, -88},
    [all...]

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