/art/runtime/arch/mips/ |
registers_mips.h | 92 F23 = 23,
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callee_save_frame_mips.h | 71 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) | 80 (1 << art::mips::F20) | (1 << art::mips::F21) | (1 << art::mips::F22) | (1 << art::mips::F23) |
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/art/runtime/arch/mips64/ |
registers_mips64.h | 93 F23 = 23,
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context_mips64.cc | 85 // f0-f23 are caller-saved; f24-f31 are callee-saved. 109 fprs_[F23] = nullptr;
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callee_save_frame_mips64.h | 70 (1 << art::mips64::F21) | (1 << art::mips64::F22) | (1 << art::mips64::F23) |
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/device/google/cuttlefish_common/host/frontend/vnc_server/ |
keysyms.h | 35 F23 = 0xffd4, F24 = 0xffd5, ShiftLeft = 0xffe1,
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
PPCBaseInfo.h | 54 case R23: case X23: case F23: case V23: case CR5UN: return 23;
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
PPCFrameLowering.h | 142 {PPC::F23, -72}, 219 {PPC::F23, -72},
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PPCRegisterInfo.cpp | 114 PPC::F22, PPC::F23, PPC::F24, PPC::F25, 140 PPC::F22, PPC::F23, PPC::F24, PPC::F25, 168 PPC::F22, PPC::F23, PPC::F24, PPC::F25, 194 PPC::F22, PPC::F23, PPC::F24, PPC::F25,
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
MipsBaseInfo.h | 85 case Mips::S7: case Mips::S7_64: case Mips::F23: case Mips::D23_64:
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
FPMover.cpp | 68 SP::F17, SP::F19, SP::F21, SP::F23, SP::F25, SP::F27, SP::F29, SP::F31
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
MipsRegisterInfo.cpp | 112 case Mips::S7: case Mips::S7_64: case Mips::F23: case Mips::D23_64: 152 Mips::F25, Mips::F24, Mips::F23, Mips::F22, Mips::F21, Mips::F20,
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
PPCDisassembler.cpp | 87 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 129 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 149 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
PPCDisassembler.cpp | 87 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 140 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 160 PPC::F20, PPC::F21, PPC::F22, PPC::F23,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
DebugSupport.h | 377 UINT64 F23[2];
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/device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
DebugSupport.h | 346 UINT64 F23[2];
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
PPCAsmParser.cpp | 82 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 121 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 140 PPC::F20, PPC::F21, PPC::F22, PPC::F23, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/ |
PPCAsmParser.cpp | 82 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 141 PPC::F20, PPC::F21, PPC::F22, PPC::F23, 160 PPC::F20, PPC::F21, PPC::F22, PPC::F23, [all...] |
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
MipsGenRegisterInfo.inc | 190 F23 = 170, [all...] |
/art/compiler/utils/mips/ |
assembler_mips32r5_test.cc | 180 fp_registers_.push_back(new mips::FRegister(mips::F23));
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/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 83 SP::F20, SP::F21, SP::F22, SP::F23,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 85 SP::F20, SP::F21, SP::F22, SP::F23,
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/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 124 {PPC::F23, -72}, 188 {PPC::F23, -72}, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 124 {PPC::F23, -72}, 208 {PPC::F23, -72}, [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 117 Sparc::F20, Sparc::F21, Sparc::F22, Sparc::F23, [all...] |