| /art/runtime/arch/mips/ |
| registers_mips.h | 93 F24 = 24,
|
| callee_save_frame_mips.h | 72 (1 << art::mips::F24) | (1 << art::mips::F25) | (1 << art::mips::F26) | (1 << art::mips::F27) |
81 (1 << art::mips::F24) | (1 << art::mips::F25) | (1 << art::mips::F26) | (1 << art::mips::F27) |
|
| /art/runtime/arch/mips64/ |
| registers_mips64.h | 94 F24 = 24,
|
| callee_save_frame_mips64.h | 59 (1 << art::mips64::F24) | (1 << art::mips64::F25) | (1 << art::mips64::F26) |
71 (1 << art::mips64::F24) | (1 << art::mips64::F25) | (1 << art::mips64::F26) |
|
| /device/google/cuttlefish_common/host/frontend/vnc_server/ |
| keysyms.h | 35 F23 = 0xffd4, F24 = 0xffd5, ShiftLeft = 0xffe1,
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| PPCBaseInfo.h | 55 case R24: case X24: case F24: case V24: case CR6LT: return 24;
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 141 {PPC::F24, -64},
218 {PPC::F24, -64},
|
| PPCRegisterInfo.cpp | 114 PPC::F22, PPC::F23, PPC::F24, PPC::F25,
140 PPC::F22, PPC::F23, PPC::F24, PPC::F25,
168 PPC::F22, PPC::F23, PPC::F24, PPC::F25,
194 PPC::F22, PPC::F23, PPC::F24, PPC::F25,
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
| MipsBaseInfo.h | 87 case Mips::T8: case Mips::T8_64: case Mips::F24: case Mips::D24_64:
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| FPMover.cpp | 64 SP::F16, SP::F18, SP::F20, SP::F22, SP::F24, SP::F26, SP::F28, SP::F30
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsRegisterInfo.cpp | 114 case Mips::T8: case Mips::T8_64: case Mips::F24: case Mips::D24_64:
152 Mips::F25, Mips::F24, Mips::F23, Mips::F22, Mips::F21, Mips::F20,
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 88 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
130 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
150 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 88 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
141 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
161 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
| DebugSupport.h | 378 UINT64 F24[2];
|
| /art/compiler/optimizing/ |
| code_generator_mips.h | 59 { F20, F22, F24, F26, F28, F30 };
|
| code_generator_mips64.h | 57 { F24, F25, F26, F27, F28, F29, F30, F31 };
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 347 UINT64 F24[2];
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 83 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
122 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
141 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 83 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
142 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
161 PPC::F24, PPC::F25, PPC::F26, PPC::F27,
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips32r5_test.cc | 181 fp_registers_.push_back(new mips::FRegister(mips::F24));
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 84 SP::F24, SP::F25, SP::F26, SP::F27,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 86 SP::F24, SP::F25, SP::F26, SP::F27,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenRegisterInfo.inc | 191 F24 = 171,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 123 {PPC::F24, -64},
187 {PPC::F24, -64},
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 123 {PPC::F24, -64},
207 {PPC::F24, -64},
[all...] |
