| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 433 /// \brief Returns true if RegB is a sub-register of RegA.
434 bool isSubRegister(unsigned RegA, unsigned RegB) const {
435 return isSuperRegister(RegB, RegA);
438 /// \brief Returns true if RegB is a super-register of RegA.
439 bool isSuperRegister(unsigned RegA, unsigned RegB) const;
441 /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA.
442 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
443 return isSuperRegisterEq(RegB, RegA);
446 /// \brief Returns true if RegB is a super-register of RegA or i
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 455 /// Returns true if RegB is a sub-register of RegA.
456 bool isSubRegister(unsigned RegA, unsigned RegB) const {
457 return isSuperRegister(RegB, RegA);
460 /// Returns true if RegB is a super-register of RegA.
461 bool isSuperRegister(unsigned RegA, unsigned RegB) const;
463 /// Returns true if RegB is a sub-register of RegA or if RegB == RegA.
464 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
465 return isSuperRegisterEq(RegB, RegA);
468 /// Returns true if RegB is a super-register of RegA or i
[all...] |
| /external/llvm/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | 109 bool isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
115 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
119 unsigned RegA, unsigned RegB, unsigned Dist);
534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
535 if (RegA == RegB)
537 if (!RegA || !RegB)
539 return TRI->regsOverlap(RegA, RegB);
546 isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
584 unsigned FromRegB = getMappedReg(regB, SrcRegMap);
590 // -RegB is not tied to a register and RegC is compatible with RegA
[all...] |
| TargetInstrInfo.cpp | 702 unsigned RegB = OpB.getReg();
709 if (TargetRegisterInfo::isVirtualRegister(RegB))
710 MRI.constrainRegClass(RegB, RC);
719 // recycling RegB because the MachineCombiner's computation of the critical
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | 134 bool isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
140 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
144 unsigned RegA, unsigned RegB, unsigned Dist);
563 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
564 if (RegA == RegB)
566 if (!RegA || !RegB)
568 return TRI->regsOverlap(RegA, RegB);
585 isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
623 unsigned FromRegB = getMappedReg(regB, SrcRegMap);
629 // -RegB is not tied to a register and RegC is compatible with RegA
[all...] |
| ImplicitNullChecks.cpp | 284 unsigned RegB = MOB.getReg();
286 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef()))
|
| TargetInstrInfo.cpp | 812 unsigned RegB = OpB.getReg();
819 if (TargetRegisterInfo::isVirtualRegister(RegB))
820 MRI.constrainRegClass(RegB, RC);
829 // recycling RegB because the MachineCombiner's computation of the critical
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | 100 bool isProfitableToCommute(unsigned regB, unsigned regC,
106 unsigned RegB, unsigned RegC, unsigned Dist);
108 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
113 unsigned RegA, unsigned RegB, unsigned Dist);
516 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
517 if (RegA == RegB)
519 if (!RegA || !RegB)
521 return TRI->regsOverlap(RegA, RegB);
528 TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC,
562 unsigned FromRegB = getMappedReg(regB, SrcRegMap)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/ |
| SparsePropagation.cpp | 483 auto RegB = TestLatticeKey(B, IPOGrouping::Register);
485 EXPECT_TRUE(Solver.getExistingValueState(RegB).isConstant());
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | [all...] |
