| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 26 enum ShiftOpc {
44 static inline const char *getShiftOpcStr(ShiftOpc Op) {
55 static inline unsigned getShiftOpcEncoding(ShiftOpc Op) {
111 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) {
117 static inline ShiftOpc getSORegShOp(unsigned Op) {
118 return (ShiftOpc)(Op & 7);
406 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
418 static inline ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) {
419 return (ShiftOpc)((AM2Opc >> 13) & 7);
|
| ARMMCCodeEmitter.cpp | 178 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const {
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 23 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
|
| ARMISelDAGToDAG.cpp | 97 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
380 ARM_AM::ShiftOpc ShOpcVal,
397 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
421 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
532 ARM_AM::ShiftOpc ShOpcVal =
672 ARM_AM::ShiftOpc ShOpcVal =
737 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
[all...] |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 27 enum ShiftOpc {
45 static inline const char *getShiftOpcStr(ShiftOpc Op) {
56 static inline unsigned getShiftOpcEncoding(ShiftOpc Op) {
112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) {
118 static inline ShiftOpc getSORegShOp(unsigned Op) {
119 return (ShiftOpc)(Op & 7);
407 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
419 static inline ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) {
420 return (ShiftOpc)((AM2Opc >> 13) & 7);
|
| ARMMCCodeEmitter.cpp | 205 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const {
214 llvm_unreachable("Invalid ShiftOpc!");
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 27 enum ShiftOpc {
43 inline const char *getShiftOpcStr(ShiftOpc Op) {
54 inline unsigned getShiftOpcEncoding(ShiftOpc Op) {
110 inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) {
114 inline ShiftOpc getSORegShOp(unsigned Op) { return (ShiftOpc)(Op & 7); }
397 inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
409 inline ShiftOpc getAM2ShiftOpc(unsigned AM2Opc) {
410 return (ShiftOpc)((AM2Opc >> 13) & 7);
|
| ARMMCCodeEmitter.cpp | 219 unsigned getShiftOp(ARM_AM::ShiftOpc ShOpc) const {
228 llvm_unreachable("Invalid ShiftOpc!");
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 24 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
|
| ARMISelDAGToDAG.cpp | 89 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
464 ARM_AM::ShiftOpc ShOpcVal,
554 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
578 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
692 ARM_AM::ShiftOpc ShOpcVal =
846 ARM_AM::ShiftOpc ShOpcVal =
[all...] |
| ARMFastISel.cpp | 156 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 24 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
|
| ARMInstructionSelector.cpp | 62 bool selectShift(unsigned ShiftOpc, MachineInstrBuilder &MIB) const;
656 bool ARMInstructionSelector::selectShift(unsigned ShiftOpc,
659 MIB.addImm(ShiftOpc);
869 return selectShift(ARM_AM::ShiftOpc::lsr, MIB);
871 return selectShift(ARM_AM::ShiftOpc::asr, MIB);
873 return selectShift(ARM_AM::ShiftOpc::lsl, MIB);
[all...] |
| ARMISelDAGToDAG.cpp | 83 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
440 ARM_AM::ShiftOpc ShOpcVal,
532 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
556 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
678 ARM_AM::ShiftOpc ShOpcVal =
758 ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOpcode());
[all...] |
| ARMFastISel.cpp | 187 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy);
[all...] |
| ARMBaseInstrInfo.cpp | 198 ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm);
603 ARM_AM::ShiftOpc ShiftOpc = ARM_AM::getAM2ShiftOpc(OffImm);
604 if (ShiftOpc == ARM_AM::no_shift) return false; // not scaled
605 bool SimpleScaled = (isAdd && ShiftOpc == ARM_AM::lsl && Amt == 2);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 90 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
333 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg
343 ARM_AM::ShiftOpc ShiftTy;
352 ARM_AM::ShiftOpc ShiftTy;
358 ARM_AM::ShiftOpc ShiftTy;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 249 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm());
266 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO2.getImm());
830 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO2.getImm());
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSplitDouble.cpp | 763 unsigned ShiftOpc = Left ? S2_asl_i_r
801 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? LoR : TmpR))
818 BuildMI(B, MI, DL, TII->get(ShiftOpc), HiR)
847 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? HiR : LoR))
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonSplitDouble.cpp | 804 unsigned ShiftOpc = Left ? S2_asl_i_r
842 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? LoR : TmpR))
859 BuildMI(B, MI, DL, TII->get(ShiftOpc), HiR)
888 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? HiR : LoR))
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 204 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
515 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg
525 ARM_AM::ShiftOpc ShiftTy;
535 ARM_AM::ShiftOpc ShiftTy;
542 ARM_AM::ShiftOpc ShiftTy;
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 44 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc,
352 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm());
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 389 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
749 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg
759 ARM_AM::ShiftOpc ShiftTy;
769 ARM_AM::ShiftOpc ShiftTy;
776 ARM_AM::ShiftOpc ShiftTy;
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 53 static void printRegImmShift(raw_ostream &O, ARM_AM::ShiftOpc ShOpc,
364 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm());
[all...] |
