/external/u-boot/board/freescale/corenet_ds/ |
p4080ds_ddr.c | 104 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 136 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 168 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 200 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 232 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 264 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 296 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL, 328 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
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/external/u-boot/board/freescale/p1_twr/ |
ddr.c | 47 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL,
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/external/u-boot/board/freescale/bsc9132qds/ |
ddr.c | 38 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800, 65 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_1333,
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spl_minimal.c | 36 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl); 56 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_1333, &ddr->ddr_wrlvl_cntl);
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/external/u-boot/board/freescale/bsc9131rdb/ |
spl_minimal.c | 44 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl);
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ddr.c | 39 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800,
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/external/u-boot/board/freescale/ls1043ardb/ |
ddr.h | 94 .ddr_wrlvl_cntl = 0x8675F607,
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/external/u-boot/drivers/ddr/fsl/ |
mpc85xx_ddr_gen3.c | 133 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); 206 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl & 0x7fffffff); 331 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl);
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arm_ddr_gen3.c | 110 ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl);
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fsl_ddr_gen4.c | 195 ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl);
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ctrl_regs.c | [all...] |
interactive.c | 667 CFG_REGS(ddr_wrlvl_cntl), 758 CFG_REGS(ddr_wrlvl_cntl), [all...] |
/external/u-boot/board/Arcturus/ucp1020/ |
ddr.c | 107 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL,
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/external/u-boot/board/freescale/p1010rdb/ |
ddr.c | 41 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800, 68 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_667,
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/external/u-boot/board/freescale/ls1021aiot/ |
ls1021aiot.c | 72 out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL);
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/external/u-boot/board/freescale/p1_p2_rdb_pc/ |
ddr.c | 239 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL,
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/external/u-boot/include/ |
fsl_immap.h | 55 u32 ddr_wrlvl_cntl; /* write leveling control*/ member in struct:ccsr_ddr
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fsl_ddr_sdram.h | 284 unsigned int ddr_wrlvl_cntl; member in struct:fsl_ddr_cfg_regs_s
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/external/u-boot/board/freescale/mpc8569mds/ |
mpc8569mds.c | 254 out_be32(&ddr->ddr_wrlvl_cntl, CONFIG_SYS_DDR_WRLVL_CNTL);
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/external/u-boot/board/freescale/ls1021atwr/ |
ls1021atwr.c | 178 out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL);
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