| /external/u-boot/board/freescale/corenet_ds/ |
| p4080ds_ddr.c | 103 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
135 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
167 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
199 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
231 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
263 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
295 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
327 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CNTL,
|
| /external/u-boot/board/freescale/p1_twr/ |
| ddr.c | 46 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| /external/u-boot/board/freescale/bsc9132qds/ |
| ddr.c | 37 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
64 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| spl_minimal.c | 40 __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
60 __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
|
| /external/u-boot/board/freescale/bsc9131rdb/ |
| spl_minimal.c | 47 __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
|
| ddr.c | 38 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| /external/u-boot/board/freescale/ls1043ardb/ |
| ddr.h | 93 .ddr_zq_cntl = 0x8A090705,
|
| /external/u-boot/drivers/ddr/fsl/ |
| mpc85xx_ddr_gen3.c | 132 out_be32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
205 out_be32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl & 0x7fffffff);
330 out_be32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
|
| arm_ddr_gen3.c | 109 ddr_out32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
|
| fsl_ddr_gen4.c | 165 ddr_out32(&ddr->ddr_zq_cntl, regs->ddr_zq_cntl);
|
| ctrl_regs.c | [all...] |
| interactive.c | 666 CFG_REGS(ddr_zq_cntl),
757 CFG_REGS(ddr_zq_cntl),
[all...] |
| /external/u-boot/board/Arcturus/ucp1020/ |
| ddr.c | 106 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| /external/u-boot/board/freescale/p1010rdb/ |
| ddr.c | 40 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
67 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| /external/u-boot/board/freescale/ls1021aiot/ |
| ls1021aiot.c | 80 out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL);
|
| /external/u-boot/board/freescale/p1_p2_rdb_pc/ |
| ddr.c | 238 .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
|
| /external/u-boot/include/ |
| fsl_immap.h | 54 u32 ddr_zq_cntl; /* ZQ calibration control*/ member in struct:ccsr_ddr
|
| fsl_ddr_sdram.h | 283 unsigned int ddr_zq_cntl; member in struct:fsl_ddr_cfg_regs_s
|
| /external/u-boot/board/freescale/mpc8569mds/ |
| mpc8569mds.c | 253 out_be32(&ddr->ddr_zq_cntl, CONFIG_SYS_DDR_ZQ_CNTL);
|
| /external/u-boot/board/freescale/ls1021atwr/ |
| ls1021atwr.c | 186 out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL);
|
