| /external/u-boot/drivers/adc/ |
| Makefile | 11 obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
|
| /external/u-boot/drivers/ram/ |
| Makefile | 13 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
| /external/u-boot/arch/arm/dts/ |
| rk3288-phycore-rdk.dts | 52 compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
121 rockchip,num-channels = <2>;
122 rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
127 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
129 rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xe 0xe>;
130 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 5 1>;
193 rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
201 rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
211 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
218 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>
[all...] |
| rk3288-veyron-minnie.dts | 53 "google,veyron", "rockchip,rk3288";
129 rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
134 rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
136 rockchip,sdram-params = <0x20d266a4 0x5b6 6 533000000 6 13 0>;
240 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
246 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
252 rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
256 rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
262 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
268 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>
[all...] |
| rk3368.dtsi | 47 #include <dt-bindings/pinctrl/rockchip.h>
52 compatible = "rockchip,rk3368";
232 compatible = "rockchip,rk3368-dmc", "syscon";
233 rockchip,cru = <&cru>;
234 rockchip,grf = <&grf>;
235 rockchip,msch = <&service_msch>;
241 compatible = "rockchip,rk3368-msch", "syscon";
247 compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
259 compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc"
[all...] |
| rk3288-rock2-square.dts | 46 compatible = "radxa,rock2-square", "rockchip,rk3288";
79 /* Always on as the rockchip usb phy doesn't have a vbus-supply
145 rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
151 rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
157 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
163 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
187 rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
192 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
194 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
|
| rk3288-veyron-mickey.dts | 55 "google,veyron", "rockchip,rk3288";
165 rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
170 rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
172 rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 1>;
233 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
239 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
243 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
|
| rk3288-tinker.dtsi | 177 compatible = "rockchip,rk808";
183 rockchip,system-power-controller;
428 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
429 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
477 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
483 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
489 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
495 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
505 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
512 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>
[all...] |
| rk3288-popmetal.dtsi | 73 compatible = "rockchip,rk3288-io-voltage-domain";
74 rockchip,grf = <&grf>;
219 compatible = "rockchip,rk808";
225 rockchip,system-power-controller;
447 rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
453 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
459 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
465 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
471 rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
477 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>
[all...] |
| rk3288-phycore-som.dtsi | 50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
75 compatible = "rockchip,rk3288-io-voltage-domain";
210 compatible = "rockchip,rk818";
216 rockchip,system-power-controller;
420 rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
424 rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
428 rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
441 rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
445 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
451 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>
[all...] |
| rk3368-geekbox.dts | 49 compatible = "geekbuying,geekbox", "rockchip,rk3368";
145 compatible = "rockchip,rk808";
151 rockchip,system-power-controller;
278 rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
284 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
290 rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
294 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
301 rockchip,hw-tshut-mode = <0>; /* CRU */
302 rockchip,hw-tshut-polarity = <1>; /* high */
|
| rk3368-px5-evb.dts | 2 * Copyright (c) 2017 Rockchip Electronics Co., Ltd
49 compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
145 compatible = "rockchip,rk808";
151 rockchip,system-power-controller;
278 rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
284 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
290 rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
294 rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>
[all...] |
| rk3288-fennec.dtsi | 125 compatible = "rockchip,rk808";
133 rockchip,system-power-controller;
330 rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
334 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
338 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
344 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
350 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
357 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
361 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
365 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>
[all...] |
| rk3288-rock2-som.dtsi | 243 rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
249 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
255 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
256 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
|
| rk3288-vyasa.dts | 48 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
200 compatible = "rockchip,rk808";
208 rockchip,system-power-controller;
454 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
458 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
462 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
468 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
474 rockchip,pins = <RK_GPIO2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>;
478 rockchip,pins = <8 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
484 rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>
[all...] |
| /external/u-boot/drivers/pinctrl/ |
| Makefile | 12 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
| /external/u-boot/drivers/reset/ |
| Makefile | 15 obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
|
| /external/u-boot/drivers/clk/ |
| Makefile | 13 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/ |
| platform.mk | 7 RK_PLAT := plat/rockchip
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/ |
| platform.mk | 7 RK_PLAT := plat/rockchip
|
| /external/u-boot/drivers/misc/ |
| Makefile | 52 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
|
| /external/u-boot/drivers/usb/host/ |
| Makefile | 51 obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
|
| /external/u-boot/drivers/video/ |
| Makefile | 56 obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/ |
| platform.mk | 7 RK_PLAT := plat/rockchip
|
| /external/u-boot/arch/arm/ |
| Makefile | 74 machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
|
