| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| sxtw-diagnostics.s | 4 sxtw z0.d, p0/m, z0.s label
6 // CHECK-NEXT: sxtw z0.d, p0/m, z0.s
10 sxtw z29.d, p7, z29.d label
12 // CHECK-NEXT: sxtw z29.d, p7, z29.d
19 sxtw z0.b, p0/m, z0.b label
21 // CHECK-NEXT: sxtw z0.b, p0/m, z0.b
24 sxtw z0.h, p0/m, z0.h label
26 // CHECK-NEXT: sxtw z0.h, p0/m, z0.h
29 sxtw z0.s, p0/m, z0.s label
31 // CHECK-NEXT: sxtw z0.s, p0/m, z0.
38 sxtw z0.d, p8\/m, z0.d label
[all...] |
| sxtw.s | 10 sxtw z0.d, p0/m, z0.d label
11 // CHECK-INST: sxtw z0.d, p0/m, z0.d
16 sxtw z31.d, p7/m, z31.d label
17 // CHECK-INST: sxtw z31.d, p7/m, z31.d
32 sxtw z4.d, p7/m, z31.d label
33 // CHECK-INST: sxtw z4.d, p7/m, z31.d
44 sxtw z4.d, p7/m, z31.d label
45 // CHECK-INST: sxtw z4.d, p7/m, z31.d
|
| adr-diagnostics.s | 26 adr z0.s, [z0.s, z0.s, sxtw]
28 // CHECK-NEXT: adr z0.s, [z0.s, z0.s, sxtw]
41 adr z0.d, [z0.d, z0.s, sxtw]
43 // CHECK-NEXT: adr z0.d, [z0.d, z0.s, sxtw]
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
52 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
56 adr z0.d, [z0.d, z0.d, sxtw #4]
57 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
58 // CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #4]
66 adr z0.d, [z0.d, z0.d, sxtw #3
[all...] |
| adr.s | 100 adr z0.d, [z0.d, z0.d, sxtw]
101 // CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw]
106 adr z0.d, [z0.d, z0.d, sxtw #0]
107 // CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw]
112 adr z0.d, [z0.d, z0.d, sxtw #1]
113 // CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #1]
118 adr z0.d, [z0.d, z0.d, sxtw #2]
119 // CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #2]
124 adr z0.d, [z0.d, z0.d, sxtw #3]
125 // CHECK-INST: adr z0.d, [z0.d, z0.d, sxtw #3
[all...] |
| ldff1sh.s | 52 ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
53 // CHECK-INST: ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
64 ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
65 // CHECK-INST: ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
88 ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
89 // CHECK-INST: ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
100 ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
101 // CHECK-INST: ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
|
| ldff1w.s | 52 ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
53 // CHECK-INST: ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
64 ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
65 // CHECK-INST: ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
88 ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
89 // CHECK-INST: ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
100 ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
101 // CHECK-INST: ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
|
| st1w.s | 76 st1w { z0.s }, p0, [x0, z0.s, sxtw]
77 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, sxtw]
88 st1w { z0.d }, p0, [x0, z0.d, sxtw]
89 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, sxtw]
100 st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
101 // CHECK-INST: st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
112 st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
113 // CHECK-INST: st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
|
| ld1sh.s | 82 ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
83 // CHECK-INST: ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
94 ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
95 // CHECK-INST: ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
118 ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
119 // CHECK-INST: ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
130 ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
131 // CHECK-INST: ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
|
| ld1w.s | 82 ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
83 // CHECK-INST: ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
94 ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
95 // CHECK-INST: ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
118 ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
119 // CHECK-INST: ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
130 ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
131 // CHECK-INST: ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
|
| ldff1h.s | 70 ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
71 // CHECK-INST: ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
82 ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
83 // CHECK-INST: ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
106 ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
107 // CHECK-INST: ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
118 ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
119 // CHECK-INST: ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
|
| st1h.s | 106 st1h { z0.s }, p0, [x0, z0.s, sxtw]
107 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, sxtw]
118 st1h { z0.d }, p0, [x0, z0.d, sxtw]
119 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, sxtw]
130 st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
131 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
142 st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
143 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
|
| ld1d.s | 64 ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
65 // CHECK-INST: ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
76 ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
77 // CHECK-INST: ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
|
| ld1sw.s | 64 ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
65 // CHECK-INST: ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
76 ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
77 // CHECK-INST: ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
|
| ldff1d.s | 46 ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
47 // CHECK-INST: ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
58 ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
59 // CHECK-INST: ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
|
| ldff1sw.s | 46 ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
47 // CHECK-INST: ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
58 ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
59 // CHECK-INST: ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
|
| st1d.s | 46 st1d { z0.d }, p0, [x0, z0.d, sxtw]
47 // CHECK-INST: st1d { z0.d }, p0, [x0, z0.d, sxtw]
58 st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
59 // CHECK-INST: st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
|
| ld1h.s | 112 ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
113 // CHECK-INST: ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
124 ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
125 // CHECK-INST: ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
148 ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
149 // CHECK-INST: ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
160 ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
161 // CHECK-INST: ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
|
| ldff1b.s | 82 ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
83 // CHECK-INST: ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
100 ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
101 // CHECK-INST: ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
|
| ldff1sb.s | 70 ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
71 // CHECK-INST: ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
88 ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
89 // CHECK-INST: ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
|
| prfd.s | 202 prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
203 // CHECK-INST: prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
214 prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
215 // CHECK-INST: prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
|
| prfh.s | 202 prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
203 // CHECK-INST: prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
214 prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
215 // CHECK-INST: prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
|
| /external/libxaac/decoder/armv8/ |
| ixheaacd_fft32x32_ld2_armv8.s | 41 sxtw x2, w2
43 sxtw x3, w3
45 sxtw x4, w4
47 sxtw x5, w5
54 sxtw x2, w2
56 sxtw x3, w3
58 sxtw x4, w4
60 sxtw x5, w5
86 sxtw x2, w2
88 sxtw x3, w
[all...] |
| ixheaacd_cos_sin_mod_loop2.s | 53 sxtw x6, w6
61 sxtw x6, w6
63 sxtw x7, w7
68 sxtw x6, w6
80 // sxtw x6,w6
93 // sxtw x7,w7
96 sxtw x6, w6
99 sxtw x6, w6
135 sxtw x5, w5
137 sxtw x6, w
[all...] |
| /external/libhevc/decoder/arm64/ |
| ihevcd_fmt_conv_420sp_to_420p.s | 96 sxtw x5,w5
103 sxtw x5,w5
144 sxtw x5,w5
146 sxtw x7,w7
158 sxtw x4,w4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| shift_extend_op_w_symbol.s | 29 add w7, w8, w9, sxtw #IMM2
35 // CHECK: add w7, w8, w9, sxtw #2
|
