/external/u-boot/arch/arm/include/asm/arch-tegra/ |
pmc.h | 12 uint pmc_cntrl; /* _CNTRL_0, offset 00 */ 13 uint pmc_sec_disable; /* _SEC_DISABLE_0, offset 04 */ 14 uint pmc_pmc_swrst; /* _PMC_SWRST_0, offset 08 */ 15 uint pmc_wake_mask; /* _WAKE_MASK_0, offset 0C */ 16 uint pmc_wake_lvl; /* _WAKE_LVL_0, offset 10 */ 17 uint pmc_wake_status; /* _WAKE_STATUS_0, offset 14 */ 18 uint pmc_sw_wake_status; /* _SW_WAKE_STATUS_0, offset 18 */ 19 uint pmc_dpd_pads_oride; /* _DPD_PADS_ORIDE_0, offset 1C */ 20 uint pmc_dpd_sample; /* _DPD_PADS_SAMPLE_0, offset 20 */ 21 uint pmc_dpd_enable; /* _DPD_PADS_ENABLE_0, offset 24 * [all...] |
uart.h | 12 uint uart_thr_dlab_0; /* UART_THR_DLAB_0_0, offset 00 */ 13 uint uart_ier_dlab_0; /* UART_IER_DLAB_0_0, offset 04 */ 14 uint uart_iir_fcr; /* UART_IIR_FCR_0, offset 08 */ 15 uint uart_lcr; /* UART_LCR_0, offset 0C */ 16 uint uart_mcr; /* UART_MCR_0, offset 10 */ 17 uint uart_lsr; /* UART_LSR_0, offset 14 */ 18 uint uart_msr; /* UART_MSR_0, offset 18 */ 19 uint uart_spr; /* UART_SPR_0, offset 1C */ 20 uint uart_irda_csr; /* UART_IRDA_CSR_0, offset 20 */ 21 uint uart_reserved[6]; /* Reserved, unused, offset 24-38* [all...] |
scu.h | 12 uint scu_ctrl; /* SCU Control Register, offset 00 */ 13 uint scu_cfg; /* SCU Config Register, offset 04 */ 14 uint scu_cpu_pwr_stat; /* SCU CPU Power Status Register, offset 08 */ 15 uint scu_inv_all; /* SCU Invalidate All Register, offset 0C */ 16 uint scu_reserved0[12]; /* reserved, offset 10-3C */ 17 uint scu_filt_start; /* SCU Filtering Start Address Reg, offset 40 */ 18 uint scu_filt_end; /* SCU Filtering End Address Reg, offset 44 */ 19 uint scu_reserved1[2]; /* reserved, offset 48-4C */ 20 uint scu_acc_ctl; /* SCU Access Control Register, offset 50 */ 21 uint scu_ns_acc_ctl; /* SCU Non-secure Access Cntrl Reg, offset 54 * [all...] |
dc.h | 15 uint gen_incr_syncpt; /* _CMD_GENERAL_INCR_SYNCPT_0 */ 16 uint gen_incr_syncpt_ctrl; /* _CMD_GENERAL_INCR_SYNCPT_CNTRL_0 */ 17 uint gen_incr_syncpt_err; /* _CMD_GENERAL_INCR_SYNCPT_ERROR_0 */ 19 uint reserved0[5]; /* reserved_0[5] */ 22 uint win_a_incr_syncpt; /* _CMD_WIN_A_INCR_SYNCPT_0 */ 23 uint win_a_incr_syncpt_ctrl; /* _CMD_WIN_A_INCR_SYNCPT_CNTRL_0 */ 24 uint win_a_incr_syncpt_err; /* _CMD_WIN_A_INCR_SYNCPT_ERROR_0 */ 26 uint reserved1[5]; /* reserved_1[5] */ 29 uint win_b_incr_syncpt; /* _CMD_WIN_B_INCR_SYNCPT_0 */ 30 uint win_b_incr_syncpt_ctrl; /* _CMD_WIN_B_INCR_SYNCPT_CNTRL_0 * [all...] |
clk_rst.h | 12 uint pll_base; /* the control register */ 14 uint pll_out[2]; 15 uint pll_misc; /* other misc things */ 20 uint pll_base; /* the control register */ 21 uint pll_misc; /* other misc things */ 25 uint pllm_base; /* the control register */ 26 uint pllm_out; /* output control */ 27 uint pllm_misc1; /* misc1 */ 28 uint pllm_misc2; /* misc2 */ 33 uint set [all...] |
usb.h | 13 uint id; 14 uint reserved0; 15 uint host; 16 uint device; 19 uint txbuf; 20 uint rxbuf; 21 uint reserved1[2]; 24 uint reserved2[56]; 29 uint hcs_params; 30 uint hcc_params [all...] |
/external/u-boot/board/gdsys/a38x/ |
ihs_phys.h | 0 uint calculate_octo_phy_mask(void); 2 int init_octo_phys(uint octo_phy_mask);
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/external/u-boot/include/ |
lcdvideo.h | 11 #define LCCR_BNUM ((uint)0xfffe0000) 12 #define LCCR_EIEN ((uint)0x00010000) 13 #define LCCR_IEN ((uint)0x00008000) 14 #define LCCR_IRQL ((uint)0x00007000) 15 #define LCCR_CLKP ((uint)0x00000800) 16 #define LCCR_OEP ((uint)0x00000400) 17 #define LCCR_HSP ((uint)0x00000200) 18 #define LCCR_VSP ((uint)0x00000100) 19 #define LCCR_DP ((uint)0x00000080) 20 #define LCCR_BPIX ((uint)0x00000060 [all...] |
bitfield.h | 41 /* Produces a mask of set bits covering a range of a uint value */ 42 static inline uint bitfield_mask(uint shift, uint width) 48 static inline uint bitfield_extract(uint reg_val, uint shift, uint width) 55 * Returns the newly modified uint value with the replaced field. 57 static inline uint bitfield_replace(uint reg_val, uint shift, uint width [all...] |
smsc_lpc47m.h | 28 void lpc47m_enable_serial(uint dev, uint iobase, uint irq); 38 void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1);
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pca953x.h | 21 int pca953x_set_val(u8 chip, uint mask, uint data); 22 int pca953x_set_pol(u8 chip, uint mask, uint data); 23 int pca953x_set_dir(u8 chip, uint mask, uint data);
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/external/u-boot/arch/powerpc/include/asm/ |
immap_86xx.h | 21 uint ccsrbar; /* 0x0 - Control Configuration Status Registers Base Address Register */ 23 uint altcbar; /* 0x8 - Alternate Configuration Base Address Register */ 25 uint altcar; /* 0x10 - Alternate Configuration Attribute Register */ 27 uint bptr; /* 0x20 - Boot Page Translation Register */ 29 uint lawbar0; /* 0xc08 - Local Access Window 0 Base Address Register */ 31 uint lawar0; /* 0xc10 - Local Access Window 0 Attributes Register */ 33 uint lawbar1; /* 0xc28 - Local Access Window 1 Base Address Register */ 35 uint lawar1; /* 0xc30 - Local Access Window 1 Attributes Register */ 37 uint lawbar2; /* 0xc48 - Local Access Window 2 Base Address Register */ 39 uint lawar2; /* 0xc50 - Local Access Window 2 Attributes Register * [all...] |
/external/u-boot/arch/arm/include/asm/arch-tegra124/ |
gpio.h | 21 uint gpio_config[TEGRA_GPIO_PORTS]; 22 uint gpio_dir_out[TEGRA_GPIO_PORTS]; 23 uint gpio_out[TEGRA_GPIO_PORTS]; 24 uint gpio_in[TEGRA_GPIO_PORTS]; 25 uint gpio_int_status[TEGRA_GPIO_PORTS]; 26 uint gpio_int_enable[TEGRA_GPIO_PORTS]; 27 uint gpio_int_level[TEGRA_GPIO_PORTS]; 28 uint gpio_int_clear[TEGRA_GPIO_PORTS]; 29 uint gpio_masked_config[TEGRA_GPIO_PORTS]; 30 uint gpio_masked_dir_out[TEGRA_GPIO_PORTS] [all...] |
/external/u-boot/arch/arm/include/asm/arch-tegra210/ |
gpio.h | 21 uint gpio_config[TEGRA_GPIO_PORTS]; 22 uint gpio_dir_out[TEGRA_GPIO_PORTS]; 23 uint gpio_out[TEGRA_GPIO_PORTS]; 24 uint gpio_in[TEGRA_GPIO_PORTS]; 25 uint gpio_int_status[TEGRA_GPIO_PORTS]; 26 uint gpio_int_enable[TEGRA_GPIO_PORTS]; 27 uint gpio_int_level[TEGRA_GPIO_PORTS]; 28 uint gpio_int_clear[TEGRA_GPIO_PORTS]; 29 uint gpio_masked_config[TEGRA_GPIO_PORTS]; 30 uint gpio_masked_dir_out[TEGRA_GPIO_PORTS] [all...] |
/external/u-boot/arch/arm/include/asm/arch-tegra30/ |
gpio.h | 20 uint gpio_config[TEGRA_GPIO_PORTS]; 21 uint gpio_dir_out[TEGRA_GPIO_PORTS]; 22 uint gpio_out[TEGRA_GPIO_PORTS]; 23 uint gpio_in[TEGRA_GPIO_PORTS]; 24 uint gpio_int_status[TEGRA_GPIO_PORTS]; 25 uint gpio_int_enable[TEGRA_GPIO_PORTS]; 26 uint gpio_int_level[TEGRA_GPIO_PORTS]; 27 uint gpio_int_clear[TEGRA_GPIO_PORTS]; 28 uint gpio_masked_config[TEGRA_GPIO_PORTS]; 29 uint gpio_masked_dir_out[TEGRA_GPIO_PORTS] [all...] |
/external/u-boot/board/xes/common/ |
fsl_8xxx_misc.h | 9 uint get_board_derivative(void);
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/external/mesa3d/src/gallium/auxiliary/util/ |
u_draw_quad.h | 46 struct pipe_resource *vbuf, uint vbuf_slot, 47 uint offset, uint prim_type, uint num_attribs, 48 uint num_verts); 52 uint prim_type, uint num_verts, uint num_attribs);
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u_tile.h | 46 u_clip_tile(uint x, uint y, uint *w, uint *h, const struct pipe_box *box) 66 uint x, uint y, uint w, uint h, 72 uint x, uint y, uint w, uint h [all...] |
u_gen_mipmap.h | 43 enum pipe_format format, uint base_level, uint last_level, 44 uint first_layer, uint last_layer, uint filter);
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/external/u-boot/arch/arm/include/asm/arch-tegra20/ |
gpio.h | 21 uint gpio_config[TEGRA_GPIO_PORTS]; 22 uint gpio_dir_out[TEGRA_GPIO_PORTS]; 23 uint gpio_out[TEGRA_GPIO_PORTS]; 24 uint gpio_in[TEGRA_GPIO_PORTS]; 25 uint gpio_int_status[TEGRA_GPIO_PORTS]; 26 uint gpio_int_enable[TEGRA_GPIO_PORTS]; 27 uint gpio_int_level[TEGRA_GPIO_PORTS]; 28 uint gpio_int_clear[TEGRA_GPIO_PORTS];
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/external/flatbuffers/tests/FlatBuffers.Test/ |
Lcg.cs | 24 private const uint InitialValue = 10000; 25 private uint _state; 32 public uint Next()
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/external/u-boot/board/compulab/common/ |
eeprom.h | 14 int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); 15 u32 cl_eeprom_get_board_rev(uint eeprom_bus); 16 int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); 18 static inline int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus) 22 static inline u32 cl_eeprom_get_board_rev(uint eeprom_bus) 26 static inline int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus)
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/external/u-boot/include/u-boot/ |
crc.h | 15 uint32_t crc32 (uint32_t, const unsigned char *, uint); 16 uint32_t crc32_wd (uint32_t, const unsigned char *, uint, uint); 17 uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint); 27 void crc32_wd_buf(const unsigned char *input, uint ilen, 28 unsigned char *output, uint chunk_sz);
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/external/lzma/CS/7zip/Common/ |
CRC.cs | 7 public static readonly uint[] Table;
11 Table = new uint[256];
12 const uint kPoly = 0xEDB88320;
13 for (uint i = 0; i < 256; i++)
15 uint r = i;
25 uint _value = 0xFFFFFFFF;
34 public void Update(byte[] data, uint offset, uint size)
36 for (uint i = 0; i < size; i++)
40 public uint GetDigest() { return _value ^ 0xFFFFFFFF; } [all...] |
/external/u-boot/drivers/pinctrl/mvebu/ |
pinctrl-mvebu.h | 24 uint pin_cnt; 25 uint max_func;
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