| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.h | 40 const HexagonInstrInfo *HII;
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| HexagonBranchRelaxation.cpp | 57 const HexagonInstrInfo *HII;
84 HII = HST.getInstrInfo();
107 InstOffset += HII->getSize(&MI);
145 InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE;
151 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) {
155 if (HII->isNewValueJump(&*FirstTerm))
156 TBB = FirstTerm->getOperand(HII->getCExtOpNum(&*FirstTerm)).getMBB();
161 return !HII->isJumpWithinBranchRange(&*FirstTerm, Distance);
174 return !HII->isJumpWithinBranchRange(&*SecondTerm, Distance);
189 << HII->isExtendable(&MI) << ") isConstExtended(
[all...] |
| HexagonFixupHwLoops.cpp | 113 const HexagonInstrInfo *HII =
128 InstOffset += HII->getSize(&MI);
141 InstOffset += HII->getSize(&*MII);
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| HexagonRegisterInfo.cpp | 169 auto &HII = *HST.getInstrInfo();
184 MI.setDesc(HII.get(Hexagon::A2_addi));
190 MI.setDesc(HII.get(Hexagon::A2_addi));
194 if (!HII.isValidOffset(Opc, RealOffset)) {
200 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
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| HexagonRDFOpt.cpp | 206 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII());
207 if (HII.getAddrMode(MI) != HexagonII::PostInc)
259 MI->setDesc(HII.get(NewOpc));
281 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
290 TargetOperandInfo TOI(HII);
291 DataFlowGraph G(MF, HII, HRI, *MDT, MDF, HAI, TOI);
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| HexagonGenMux.cpp | 42 HexagonGenMux() : MachineFunctionPass(ID), HII(0), HRI(0) {
58 const HexagonInstrInfo *HII;
126 const MCInstrDesc &D = HII->get(Opc);
216 bool IfTrue = HII->isPredicatedTrue(Opc);
299 BuildMI(B, MX.At, DL, HII->get(MxOpc), MX.DefR)
314 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
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| HexagonOptAddrMode.cpp | 51 : MachineFunctionPass(ID), HII(0), MDT(0), DFG(0), LV(0) {
69 const HexagonInstrInfo *HII;
110 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(*MI))
119 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset)
121 return (HII->getBaseWithLongOffset(MI) >= 0);
122 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset)
124 return (HII->getAbsoluteForm(MI) >= 0);
174 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset ||
316 if (HII->getAddrMode(OldMI) == HexagonII::BaseRegOffset) {
317 short NewOpCode = HII->getBaseWithLongOffset(OldMI)
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| HexagonExpandCondsets.cpp | 181 MachineFunctionPass(ID), HII(0), TRI(0), MRI(0),
205 const HexagonInstrInfo *HII;
372 if (HII->isPredicated(*DefI))
460 if (HII->isPredicated(*DefI))
512 if (!HII->isPredicated(*DefI))
627 MachineInstrBuilder MIB = BuildMI(B, At, DL, HII->get(Opc))
677 auto ImpD = BuildMI(B, DefAt, DL, HII->get(TargetOpcode::IMPLICIT_DEF))
719 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI))
755 if (PredValid && HII->isPredicated(*MI))
[all...] |
| HexagonVLIWPacketizer.cpp | 88 const HexagonInstrInfo *HII;
109 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
177 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
184 HII->genAllInsnTimingClasses(MF);
222 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF))
227 while (RE != End && !HII->isSchedulingBoundary(*RE, &MB, MF))
259 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc());
274 if (HII->isDeallocRet(MI))
284 if (HII->isIndirectCall(MI) && (DepType == SDep::Data)) {
329 return HII->isCondInst(MI) || MI->isReturn() || HII->mayBeNewStore(MI)
[all...] |
| HexagonISelDAGToDAG.cpp | 47 const HexagonInstrInfo *HII;
52 : SelectionDAGISel(tm, OptLevel), HTM(tm), HST(nullptr), HII(nullptr),
58 HII = HST->getInstrInfo();
252 bool IsValidInc = HII->isValidAutoIncImm(LoadedVT, Inc);
416 uint64_t F = HII->get(LoadN->getMachineOpcode()).TSFlags;
545 bool IsValidInc = HII->isValidAutoIncImm(StoredVT, Inc);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.h | 33 const HexagonInstrInfo *HII;
38 : SelectionDAGISel(tm, OptLevel), HST(nullptr), HII(nullptr),
44 HII = HST->getInstrInfo();
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| HexagonBranchRelaxation.cpp | 69 const HexagonInstrInfo *HII;
96 HII = HST.getInstrInfo();
118 InstOffset += HII->getSize(MI);
120 if (MI.isBranch() && HII->isExtendable(MI))
152 if (HII->isExtended(MI))
161 InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE;
167 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) {
171 if (HII->isNewValueJump(*FirstTerm))
172 TBB = FirstTerm->getOperand(HII->getCExtOpNum(*FirstTerm)).getMBB();
177 return !HII->isJumpWithinBranchRange(*FirstTerm, Distance)
[all...] |
| HexagonFixupHwLoops.cpp | 113 const HexagonInstrInfo *HII =
128 InstOffset += HII->getSize(MI);
141 unsigned InstSize = HII->getSize(*MII);
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| HexagonVLIWPacketizer.h | 67 const HexagonInstrInfo *HII;
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| HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr;
83 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR)
91 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR)
94 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR)
103 HII = HST->getInstrInfo();
134 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc))
149 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::PS_fi), BaseR)
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| HexagonRDFOpt.cpp | 220 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII());
221 if (HII.getAddrMode(MI) != HexagonII::PostInc)
273 MI.setDesc(HII.get(NewOpc));
294 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
302 TargetOperandInfo TOI(HII);
303 DataFlowGraph G(MF, HII, HRI, *MDT, MDF, TOI);
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| HexagonRegisterInfo.cpp | 203 auto &HII = *HST.getInstrInfo();
218 MI.setDesc(HII.get(Hexagon::A2_addi));
224 MI.setDesc(HII.get(Hexagon::A2_addi));
228 if (!HII.isValidOffset(Opc, RealOffset, this)) {
234 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
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| HexagonAsmPrinter.cpp | 770 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
771 if (MI->isBundle() && HII.getBundleNoShuf(*MI))
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| HexagonGenMux.cpp | 89 const HexagonInstrInfo *HII = nullptr;
163 const MCInstrDesc &D = HII->get(Opc);
253 bool IfTrue = HII->isPredicatedTrue(Opc);
338 auto NewMux = BuildMI(B, MX.At, DL, HII->get(MxOpc), MX.DefR)
381 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
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| HexagonSubtarget.cpp | 182 const HexagonInstrInfo &HII, const SUnit &Inst1,
188 unsigned Type = HII.getType(*Inst2.getInstr());
202 auto &HII = *DAG->MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
215 shouldTFRICallBind(HII, DAG->SUnits[su], DAG->SUnits[su+1]))
268 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII);
277 HII.getAddrMode(L0) != HexagonII::BaseImmOffset)
281 unsigned Base0 = HII.getBaseAndOffset(L0, Offset0, Size0);
290 HII.getAddrMode(L1) != HexagonII::BaseImmOffset)
294 unsigned Base1 = HII.getBaseAndOffset(L1, Offset1, Size1);
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| HexagonOptAddrMode.cpp | 83 const HexagonInstrInfo *HII = nullptr;
129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI))
138 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset)
140 return (HII->changeAddrMode_rr_ur(MI) >= 0);
141 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset)
143 return (HII->changeAddrMode_io_abs(MI) >= 0);
196 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset ||
326 switch (HII->getMemAccessSize(*MI)) {
345 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false);
359 HII->getAddrMode(*MI) != HexagonII::BaseImmOffset |
[all...] |
| HexagonEarlyIfConv.cpp | 214 const HexagonInstrInfo *HII = nullptr;
482 if (!HII->isPredicable(*Def1) || !HII->isPredicable(*Def3))
681 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI));
706 return HII->getCondOpcode(Opc, !IfTrue);
723 MachineInstrBuilder MIB = BuildMI(*ToB, At, DL, HII->get(COpc));
725 if (HII->isPostIncrement(*MI)) {
744 const MCInstrDesc &D = HII->get(IfTrue ? Hexagon::J2_jumpt
801 const MCInstrDesc &D = HII->get(Opc);
911 BuildMI(*FP.SplitB, FP.SplitB->end(), DL, HII->get(Hexagon::J2_jump)
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| HexagonExpandCondsets.cpp | 165 const HexagonInstrInfo *HII = nullptr;
343 if (HII->isPredicated(*DefI))
421 if (HII->isPredicated(*DefI))
491 if (!HII->isPredicated(*DefI))
646 MIB = BuildMI(B, At, DL, HII->get(Opc))
651 MIB = BuildMI(B, At, DL, HII->get(Opc))
695 MI.setDesc(HII->get(TargetOpcode::COPY));
723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI))
758 if (PredValid && HII->isPredicated(*MI))
[all...] |
| HexagonConstExtenders.cpp | 381 const HexagonInstrInfo *HII = nullptr;
880 const MCInstrDesc &D = HII->get(ExtOpc);
[all...] |
| HexagonVLIWPacketizer.cpp | 113 const HexagonInstrInfo *HII;
134 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
206 HII = HST.getInstrInfo();
213 HII->genAllInsnTimingClasses(MF);
249 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF))
254 while (RE != End && !HII->isSchedulingBoundary(*RE, &MB, MF))
285 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc());
299 if (HII->isDeallocRet(MI))
355 if (HII->isHVXVec(MI) && MI.mayStore())
357 return HII->isPredicated(MI) && HII->getDotNewPredOp(MI, nullptr) > 0
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