| /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
| ECPoint.java | 774 ECFieldElement W1 = X1.multiply(C), W2 = X2.multiply(C);
775 ECFieldElement A1 = W1.subtract(W2).multiply(Y1);
777 X3 = dy.square().subtract(W1).subtract(W2);
778 Y3 = W1.subtract(X3).multiply(dy).subtract(A1);
[all...] |
| /external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/math/ec/ |
| ECPoint.java | 780 ECFieldElement W1 = X1.multiply(C), W2 = X2.multiply(C);
781 ECFieldElement A1 = W1.subtract(W2).multiply(Y1);
783 X3 = dy.square().subtract(W1).subtract(W2);
784 Y3 = W1.subtract(X3).multiply(dy).subtract(A1);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonBitTracker.cpp | 365 uint16_t W1 = getRegBitWidth(Reg[1]);
366 assert(W0 == 64 && W1 == 32);
367 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1));
368 RegisterCell RC = eADD(eSXT(CW, W1), rc(2));
694 uint16_t W1 = getRegBitWidth(Reg[1]);
698 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero)
699 .fill(W1+(W1-BX), W0, Zero);
700 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1);
701 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1);
[all...] |
| HexagonGenInsert.cpp | 338 uint16_t W1 = RC1.width(), W2 = RC2.width();
339 for (uint16_t i = 0, w = std::min(W1, W2); i < w; ++i) {
345 if (W1 != W2)
346 return W1 < W2;
356 uint16_t W1 = RC1.width(), W2 = RC2.width();
364 if (W1 <= Bit1)
[all...] |
| BitTracker.cpp | 697 uint16_t W1 = A1.width(), W2 = A2.width();
698 (void)W1;
699 assert(AtN < W1 && AtN+W2 <= W1);
[all...] |
| HexagonRegisterInfo.cpp | 75 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0
|
| HexagonISelLoweringHVX.cpp | 729 SDValue W1 = extractHvxElementReg(WordVec, W1Idx, dl, MVT::i32, DAG);
730 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, {W1, W0});
791 SDValue W1 = DAG.getNode(HexagonISD::VEXTRACTW, dl, MVT::i32,
793 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0});
[all...] |
| /external/libyuv/files/util/ |
| ssim.cc | 72 } W0 = MAKE_WEIGHT(0), W1 = MAKE_WEIGHT(1), W2 = MAKE_WEIGHT(2),
251 const __m128i w1 = _mm_unpacklo_epi8(v1, zero); \
253 const __m128i ww1 = _mm_mullo_epi16(w1, (WEIGHT).values_.m_); \
259 xy = _mm_add_epi32(xy, _mm_madd_epi16(ww0, w1)); \
260 yy = _mm_add_epi32(yy, _mm_madd_epi16(ww1, w1)); \
271 LOAD_LINE_PAIR(1, W1);
275 LOAD_LINE_PAIR(5, W1);
|
| /external/libxaac/decoder/armv8/ |
| ixheaacd_imdct_using_fft.s | 103 LSR W9 , W1, #5
104 LSL W1, W1, #1
467 LSR W9, W1, #4
468 LSL W1, W1, #1
|
| ixheaacd_sbr_imdct_using_fft.s | 73 LSR W9 , W1, #5
74 LSL W1, W1, #1
422 LSR W9, W1, #4
423 LSL W1, W1, #1
|
| /external/deqp/modules/gles3/functional/ |
| es3fFboMultisampleTests.cpp | 273 static const deUint32 W1 = 10, H1 = 10;
300 glRenderbufferStorageMultisample(GL_RENDERBUFFER, samp1, GL_RGBA8, W1, H1);
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 33 case AArch64::X1: return AArch64::W1;
73 case AArch64::W1: return AArch64::X1;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| AArch64GenCallingConv.inc | 137 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
179 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
381 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
398 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6
423 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
857 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
873 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
966 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
982 AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
[all...] |
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 42 W0, W1, W2, W3, W4, W5, W6, W7
201 int gp_reg_index = 1; // we start from X1/W1, X0 holds ArtMethod*.
|
| /art/compiler/utils/mips64/ |
| managed_register_mips64_test.cc | 123 vreg = Mips64ManagedRegister::FromVectorRegister(W1);
130 EXPECT_EQ(W1, reg.AsOverlappingVectorRegister());
264 EXPECT_FALSE(reg_W0.Equals(Mips64ManagedRegister::FromVectorRegister(W1)));
274 EXPECT_FALSE(reg_W31.Equals(Mips64ManagedRegister::FromVectorRegister(W1)));
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 75 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0
|
| HexagonGenInsert.cpp | 317 uint16_t W1 = RC1.width(), W2 = RC2.width();
318 for (uint16_t i = 0, w = std::min(W1, W2); i < w; ++i) {
324 if (W1 != W2)
325 return W1 < W2;
336 uint16_t W1 = RC1.width(), W2 = RC2.width();
344 if (W1 <= Bit1)
[all...] |
| BitTracker.cpp | 718 uint16_t W1 = A1.width(), W2 = A2.width();
719 (void)W1;
720 assert(AtN < W1 && AtN+W2 <= W1);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/Disassembler/ |
| BPFDisassembler.cpp | 115 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 33 case AArch64::X1: return AArch64::W1;
73 case AArch64::W1: return AArch64::X1;
|
| /frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/ |
| dct.h | 38 #define W1 2841 /* 2048*sqrt(2)*cos(1*pi/16) */
|
| /external/syzkaller/vendor/golang.org/x/text/unicode/bidi/ |
| core.go | 154 // Rules W1-W7.
472 // Resolving weak types Rules W1-W7.
481 // Rule W1.
693 // Applies the levels and types resolved in rules W1-I2 to the
|
| /external/clang/test/Misc/ |
| diag-template-diffing.cpp | [all...] |
| /external/wpa_supplicant_8/src/tls/ |
| libtommath.c | [all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenRegisterInfo.inc | 344 W1 = 324,
[all...] |
