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  /external/u-boot/board/intel/galileo/
galileo.c 36 port = base + 0x24;
  /external/u-boot/board/nvidia/jetson-tk1/
jetson-tk1.c 74 ret = as3722_sd_set_voltage(dev, 4, 0x24);
  /external/u-boot/board/siemens/pxm2/
pmic.h 21 #define PMIC_VDD2_REG 0x24
  /external/u-boot/include/
axp809.h 38 #define AXP809_DCDC4_CTRL 0x24
smsc_sio1007.h 25 #define UART1_IOBASE 0x24
  /external/u-boot/include/configs/
ls1012ardb.h 25 #define I2C_MUX_IO_ADDR 0x24
  /external/u-boot/include/net/pfe_eth/pfe/cbus/
gpi.h 19 #define GPI_CLASS_ADDR 0x24
  /external/epid-sdk/epid/common-testhelper/testdata/grp_y/cmember9/
cmpprivkey.inc 28 0x24, 0xdc, 0x18, 0x4d, 0xc0, 0xd5, 0x2c, 0xde,
  /external/llvm/test/MC/AArch64/
gicv3-regs.s 9 mrs x24, ich_eisr_el2
11 mrs x24, icc_bpr1_el1
64 // CHECK: mrs x4, {{ich_vtr_el2|ICH_VTR_EL2}} // encoding: [0x24,0xcb,0x3c,0xd5]
65 // CHECK: mrs x24, {{ich_eisr_el2|ICH_EISR_EL2}} // encoding: [0x78,0xcb,0x3c,0xd5]
67 // CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}} // encoding: [0x78,0xcc,0x38,0xd5]
125 msr icc_ctlr_el1, x24
152 msr ich_vmcr_el2, x24
179 // CHECK: msr {{icc_ctlr_el1|ICC_CTLR_EL1}}, x24 // encoding: [0x98,0xcc,0x18,0xd5]
206 // CHECK: msr {{ich_vmcr_el2|ICH_VMCR_EL2}}, x24 // encoding: [0xf8,0xcb,0x1c,0xd5]
  /external/llvm/test/MC/Sparc/
sparcv8-instructions.s 3 ! CHECK: fcmps %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x24]
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
armv8.4a-ldst.s 83 ldapursh x3, [x24]
84 ldapursh x3, [x24, #-256]
88 //CHECK: ldapursh x3, [x24] // encoding: [0x03,0x03,0x80,0x59]
89 //CHECK-NEXT: ldapursh x3, [x24, #-256] // encoding: [0x03,0x03,0x90,0x59]
90 //CHECK-NEXT: ldapursh x4, [x25, #255] // encoding: [0x24,0xf3,0x8f,0x59]
237 //CHECK-NO-V84-NEXT: ldapursh x3, [x24]
240 //CHECK-NO-V84-NEXT: ldapursh x3, [x24, #-256]
gicv3-regs.s 9 mrs x24, ich_eisr_el2
11 mrs x24, icc_bpr1_el1
64 // CHECK: mrs x4, {{ich_vtr_el2|ICH_VTR_EL2}} // encoding: [0x24,0xcb,0x3c,0xd5]
65 // CHECK: mrs x24, {{ich_eisr_el2|ICH_EISR_EL2}} // encoding: [0x78,0xcb,0x3c,0xd5]
67 // CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}} // encoding: [0x78,0xcc,0x38,0xd5]
125 msr icc_ctlr_el1, x24
152 msr ich_vmcr_el2, x24
179 // CHECK: msr {{icc_ctlr_el1|ICC_CTLR_EL1}}, x24 // encoding: [0x98,0xcc,0x18,0xd5]
206 // CHECK: msr {{ich_vmcr_el2|ICH_VMCR_EL2}}, x24 // encoding: [0xf8,0xcb,0x1c,0xd5]
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
macro-drem.s 12 # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
15 # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
40 # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
61 # CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
71 # CHECK-NOTRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
73 # CHECK-NOTRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
106 # CHECK-NOTRAP: addiu $1, $zero, 2 # encoding: [0x02,0x00,0x01,0x24]
127 # CHECK-NOTRAP: addiu $1, $zero, -32768 # encoding: [0x00,0x80,0x01,0x24]
134 # CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
137 # CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
    [all...]
macro-dla-32bit.s 8 dla $5, 0x00000001 # CHECK: addiu $5, $zero, 1 # encoding: [0x24,0x05,0x00,0x01]
9 dla $5, 0x00000002 # CHECK: addiu $5, $zero, 2 # encoding: [0x24,0x05,0x00,0x02]
10 dla $5, 0x00004000 # CHECK: addiu $5, $zero, 16384 # encoding: [0x24,0x05,0x40,0x00]
12 dla $5, 0xffffffff # CHECK: addiu $5, $zero, -1 # encoding: [0x24,0x05,0xff,0xff]
13 dla $5, 0xfffffffe # CHECK: addiu $5, $zero, -2 # encoding: [0x24,0x05,0xff,0xfe]
14 dla $5, 0xffffc000 # CHECK: addiu $5, $zero, -16384 # encoding: [0x24,0x05,0xc0,0x00]
15 dla $5, 0xffff8000 # CHECK: addiu $5, $zero, -32768 # encoding: [0x24,0x05,0x80,0x00]
67 dla $5, 0x00000001($6) # CHECK: addiu $5, $6, 1 # encoding: [0x24,0xc5,0x00,0x01]
68 dla $5, 0x00000002($6) # CHECK: addiu $5, $6, 2 # encoding: [0x24,0xc5,0x00,0x02]
69 dla $5, 0x00004000($6) # CHECK: addiu $5, $6, 16384 # encoding: [0x24,0xc5,0x40,0x00
    [all...]
macro-la.s 12 la $5, 0x00000001 # CHECK: addiu $5, $zero, 1 # encoding: [0x24,0x05,0x00,0x01]
13 la $5, 0x00000002 # CHECK: addiu $5, $zero, 2 # encoding: [0x24,0x05,0x00,0x02]
14 la $5, 0x00004000 # CHECK: addiu $5, $zero, 16384 # encoding: [0x24,0x05,0x40,0x00]
16 la $5, 0xffffffff # CHECK: addiu $5, $zero, -1 # encoding: [0x24,0x05,0xff,0xff]
17 la $5, 0xfffffffe # CHECK: addiu $5, $zero, -2 # encoding: [0x24,0x05,0xff,0xfe]
18 la $5, 0xffffc000 # CHECK: addiu $5, $zero, -16384 # encoding: [0x24,0x05,0xc0,0x00]
19 la $5, 0xffff8000 # CHECK: addiu $5, $zero, -32768 # encoding: [0x24,0x05,0x80,0x00]
71 la $5, 0x00000001($6) # CHECK: addiu $5, $6, 1 # encoding: [0x24,0xc5,0x00,0x01]
72 la $5, 0x00000002($6) # CHECK: addiu $5, $6, 2 # encoding: [0x24,0xc5,0x00,0x02]
73 la $5, 0x00004000($6) # CHECK: addiu $5, $6, 16384 # encoding: [0x24,0xc5,0x40,0x00
    [all...]
macro-li.d.s 10 # O32: addiu $4, $zero, 0 # encoding: [0x00,0x00,0x04,0x24]
11 # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
15 # O32: addiu $4, $zero, 0 # encoding: [0x00,0x00,0x04,0x24]
16 # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
27 # O32-N32-NO-PIC: addiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x24]
41 # O32-N32-PIC: addiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x24]
47 # O32: lw $4, 0($1) # encoding: [0x00,0x00,0x24,0x8c]
49 # N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc]
53 # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
57 # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
    [all...]
  /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/
sparcv8-instructions.s 3 ! CHECK: fcmps %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x24]
  /external/u-boot/arch/arm/mach-at91/include/mach/
at91sam9_sdramc.h 25 #define AT91_ASM_SDRAMC_MDR (ATMEL_BASE_SDRAMC + 0x24)
111 #define AT91_SDRAMC_MDR (ATMEL_BASE_SDRAMC + 0x24) /* SDRAM Memory Device Register */
  /external/u-boot/arch/arm/mach-imx/mx8m/
lowlevel_init.S 32 stp x23, x24, [x0], #16
56 ldp x23, x24, [x0], #16
  /external/libffi/src/aarch64/
sysv.S 91 saved x24
118 stp x23, x24, [sp, #16]
120 cfi_rel_offset (x24, 24 - ffi_call_SYSV_FS)
124 mov x24, x4
163 blr x24
187 ldp x23, x24, [x29, # - ffi_call_SYSV_FS + 16]
189 cfi_restore (x24)
  /external/llvm/test/MC/PowerPC/
ppc64-encoding-bookIII.s 4 # CHECK-BE: mtmsr 4 # encoding: [0x7c,0x80,0x01,0x24]
5 # CHECK-LE: mtmsr 4 # encoding: [0x24,0x01,0x80,0x7c]
8 # CHECK-BE: mtmsr 4, 1 # encoding: [0x7c,0x81,0x01,0x24]
9 # CHECK-LE: mtmsr 4, 1 # encoding: [0x24,0x01,0x81,0x7c]
129 # CHECK-BE: slbmte 4, 5 # encoding: [0x7c,0x80,0x2b,0x24]
130 # CHECK-LE: slbmte 4, 5 # encoding: [0x24,0x2b,0x80,0x7c]
145 # CHECK-BE: tlbiel 4 # encoding: [0x7c,0x00,0x22,0x24]
146 # CHECK-LE: tlbiel 4 # encoding: [0x24,0x22,0x00,0x7c]
182 # CHECK-BE: tlbivax 11, 12 # encoding: [0x7c,0x0b,0x66,0x24]
183 # CHECK-LE: tlbivax 11, 12 # encoding: [0x24,0x66,0x0b,0x7c
    [all...]
  /external/python/cpython2/Modules/_ctypes/libffi/src/aarch64/
sysv.S 91 saved x24
118 stp x23, x24, [sp, #16]
120 cfi_rel_offset (x24, 24 - ffi_call_SYSV_FS)
124 mov x24, x4
163 blr x24
187 ldp x23, x24, [x29, # - ffi_call_SYSV_FS + 16]
189 cfi_restore (x24)
  /external/llvm/test/MC/Mips/
macro-dla-32bit.s 8 dla $5, 0x00000001 # CHECK: addiu $5, $zero, 1 # encoding: [0x24,0x05,0x00,0x01]
9 dla $5, 0x00000002 # CHECK: addiu $5, $zero, 2 # encoding: [0x24,0x05,0x00,0x02]
10 dla $5, 0x00004000 # CHECK: addiu $5, $zero, 16384 # encoding: [0x24,0x05,0x40,0x00]
12 dla $5, 0xffffffff # CHECK: addiu $5, $zero, -1 # encoding: [0x24,0x05,0xff,0xff]
13 dla $5, 0xfffffffe # CHECK: addiu $5, $zero, -2 # encoding: [0x24,0x05,0xff,0xfe]
14 dla $5, 0xffffc000 # CHECK: addiu $5, $zero, -16384 # encoding: [0x24,0x05,0xc0,0x00]
15 dla $5, 0xffff8000 # CHECK: addiu $5, $zero, -32768 # encoding: [0x24,0x05,0x80,0x00]
67 dla $5, 0x00000001($6) # CHECK: addiu $5, $6, 1 # encoding: [0x24,0xc5,0x00,0x01]
68 dla $5, 0x00000002($6) # CHECK: addiu $5, $6, 2 # encoding: [0x24,0xc5,0x00,0x02]
69 dla $5, 0x00004000($6) # CHECK: addiu $5, $6, 16384 # encoding: [0x24,0xc5,0x40,0x00
    [all...]
  /external/capstone/suite/MC/Sparc/
sparc-fp-instructions.s.cs 26 0x91,0xa0,0x08,0x24 = fadds %f0, %f4, %f8 package
34 0x91,0xa0,0x09,0x24 = fmuls %f0, %f4, %f8 package
37 0x91,0xa0,0x0d,0x24 = fsmuld %f0, %f4, %f8 package
42 0x81,0xa8,0x0a,0x24 = fcmps %fcc0, %f0, %f4 package
48 0x85,0xa8,0x0a,0x24 = fcmps %fcc2, %f0, %f4 package
  /external/vixl/test/aarch32/traces/
assembler-cond-rdlow-operand-imm8-in-it-block-mov-t32.h 65 0xb8, 0xbf, 0x98, 0x24 // It lt; mov lt r4 152
68 0x48, 0xbf, 0xa5, 0x24 // It mi; mov mi r4 165
86 0x28, 0xbf, 0xcc, 0x24 // It cs; mov cs r4 204
92 0xb8, 0xbf, 0xb9, 0x24 // It lt; mov lt r4 185
107 0x28, 0xbf, 0x15, 0x24 // It cs; mov cs r4 21
125 0xb8, 0xbf, 0x67, 0x24 // It lt; mov lt r4 103
131 0x18, 0xbf, 0xea, 0x24 // It ne; mov ne r4 234
137 0x18, 0xbf, 0xe0, 0x24 // It ne; mov ne r4 224
143 0xb8, 0xbf, 0x31, 0x24 // It lt; mov lt r4 49
149 0xa8, 0xbf, 0x85, 0x24 // It ge; mov ge r4 13
    [all...]

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