1 /******************************************************************************* 2 * Copyright 2012-2018 Intel Corporation 3 * All Rights Reserved. 4 * 5 * If this software was obtained under the Intel Simplified Software License, 6 * the following terms apply: 7 * 8 * The source code, information and material ("Material") contained herein is 9 * owned by Intel Corporation or its suppliers or licensors, and title to such 10 * Material remains with Intel Corporation or its suppliers or licensors. The 11 * Material contains proprietary information of Intel or its suppliers and 12 * licensors. The Material is protected by worldwide copyright laws and treaty 13 * provisions. No part of the Material may be used, copied, reproduced, 14 * modified, published, uploaded, posted, transmitted, distributed or disclosed 15 * in any way without Intel's prior express written permission. No license under 16 * any patent, copyright or other intellectual property rights in the Material 17 * is granted to or conferred upon you, either expressly, by implication, 18 * inducement, estoppel or otherwise. Any license under such intellectual 19 * property rights must be express and approved by Intel in writing. 20 * 21 * Unless otherwise agreed by Intel in writing, you may not remove or alter this 22 * notice or any other notice embedded in Materials by Intel or Intel's 23 * suppliers or licensors in any way. 24 * 25 * 26 * If this software was obtained under the Apache License, Version 2.0 (the 27 * "License"), the following terms apply: 28 * 29 * You may not use this file except in compliance with the License. You may 30 * obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 31 * 32 * 33 * Unless required by applicable law or agreed to in writing, software 34 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 35 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 36 * 37 * See the License for the specific language governing permissions and 38 * limitations under the License. 39 *******************************************************************************/ 40 41 /* 42 // Purpose: 43 // Intel(R) Integrated Performance Primitives. 44 // Internal Unsigned internal arithmetic 45 // 46 // 47 */ 48 49 #if !defined(_CP_BNU_ARITH_H) 50 #define _CP_BNU_ARITH_H 51 52 #include "pcpbnuimpl.h" 53 #include "pcpbnu32arith.h" 54 55 #define cpAdd_BNU OWNAPI(cpAdd_BNU) 56 BNU_CHUNK_T cpAdd_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns); 57 #define cpSub_BNU OWNAPI(cpSub_BNU) 58 BNU_CHUNK_T cpSub_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, const BNU_CHUNK_T* pB, cpSize ns); 59 #define cpInc_BNU OWNAPI(cpInc_BNU) 60 BNU_CHUNK_T cpInc_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val); 61 #define cpDec_BNU OWNAPI(cpDec_BNU) 62 BNU_CHUNK_T cpDec_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val); 63 64 #define cpAddMulDgt_BNU OWNAPI(cpAddMulDgt_BNU) 65 BNU_CHUNK_T cpAddMulDgt_BNU(BNU_CHUNK_T* pR, const BNU_CHUNK_T* pA, cpSize ns, BNU_CHUNK_T val); 66 67 68 #define cpMulAdc_BNU_school OWNAPI(cpMulAdc_BNU_school) 69 BNU_CHUNK_T cpMulAdc_BNU_school(BNU_CHUNK_T* pR, 70 const BNU_CHUNK_T* pA, cpSize nsA, 71 const BNU_CHUNK_T* pB, cpSize nsB); 72 #define cpMulAdx_BNU_school OWNAPI(cpMulAdx_BNU_school) 73 BNU_CHUNK_T cpMulAdx_BNU_school(BNU_CHUNK_T* pR, 74 const BNU_CHUNK_T* pA, cpSize nsA, 75 const BNU_CHUNK_T* pB, cpSize nsB); 76 77 /*F* 78 // Name: cpMul_BNU_school 79 // 80 // Purpose: Multiply 2 BigNums. 81 // 82 // Returns: 83 // extension of result of multiply 2 BigNums 84 // 85 // Parameters: 86 // pA source BigNum A 87 // nsA size of A 88 // pB source BigNum B 89 // nsB size of B 90 // pR resultant BigNum 91 // 92 *F*/ 93 94 __INLINE BNU_CHUNK_T cpMul_BNU_school(BNU_CHUNK_T* pR, 95 const BNU_CHUNK_T* pA, cpSize nsA, 96 const BNU_CHUNK_T* pB, cpSize nsB) 97 { 98 #if(_ADCOX_NI_ENABLING_==_FEATURE_ON_) 99 return cpMulAdx_BNU_school(pR, pA,nsA, pB,nsB); 100 #elif(_ADCOX_NI_ENABLING_==_FEATURE_TICKTOCK_) 101 return IsFeatureEnabled(ippCPUID_ADCOX)? cpMulAdx_BNU_school(pR, pA,nsA, pB,nsB) 102 : cpMulAdc_BNU_school(pR, pA,nsA, pB,nsB); 103 #else 104 return cpMulAdc_BNU_school(pR, pA,nsA, pB,nsB); 105 #endif 106 } 107 108 109 #define cpSqrAdc_BNU_school OWNAPI(cpSqrAdc_BNU_school) 110 BNU_CHUNK_T cpSqrAdc_BNU_school(BNU_CHUNK_T * pR, const BNU_CHUNK_T * pA, cpSize nsA); 111 112 #define cpSqrAdx_BNU_school OWNAPI(cpSqrAdx_BNU_school) 113 BNU_CHUNK_T cpSqrAdx_BNU_school(BNU_CHUNK_T * pR, const BNU_CHUNK_T * pA, cpSize nsA); 114 115 /*F* 116 // Name: cpSqr_BNU_school 117 // 118 // Purpose: Square BigNum. 119 // 120 // Returns: 121 // extension of result of square BigNum 122 // 123 // Parameters: 124 // pA source BigNum 125 // pR resultant BigNum 126 // 127 *F*/ 128 129 __INLINE BNU_CHUNK_T cpSqr_BNU_school(BNU_CHUNK_T * pR, const BNU_CHUNK_T * pA, cpSize nsA) 130 { 131 #if(_ADCOX_NI_ENABLING_==_FEATURE_ON_) 132 return cpSqrAdx_BNU_school(pR, pA,nsA); 133 #elif(_ADCOX_NI_ENABLING_==_FEATURE_TICKTOCK_) 134 return IsFeatureEnabled(ippCPUID_ADCOX)? cpSqrAdx_BNU_school(pR, pA,nsA) 135 : cpSqrAdc_BNU_school(pR, pA,nsA); 136 #else 137 return cpSqrAdc_BNU_school(pR, pA,nsA); 138 #endif 139 } 140 141 #define cpGcd_BNU OWNAPI(cpGcd_BNU) 142 BNU_CHUNK_T cpGcd_BNU(BNU_CHUNK_T a, BNU_CHUNK_T b); 143 144 #define cpModInv_BNU OWNAPI(cpModInv_BNU) 145 int cpModInv_BNU(BNU_CHUNK_T* pInv, 146 const BNU_CHUNK_T* pA, cpSize nsA, 147 const BNU_CHUNK_T* pM, cpSize nsM, 148 BNU_CHUNK_T* bufInv, BNU_CHUNK_T* bufA, BNU_CHUNK_T* bufM); 149 150 151 /* 152 // multiplication/squaring wrappers 153 */ 154 __INLINE BNU_CHUNK_T cpMul_BNU(BNU_CHUNK_T* pR, 155 const BNU_CHUNK_T* pA, cpSize nsA, 156 const BNU_CHUNK_T* pB, cpSize nsB, 157 BNU_CHUNK_T* pBuffer) 158 { 159 UNREFERENCED_PARAMETER(pBuffer); 160 return cpMul_BNU_school(pR, pA,nsA, pB,nsB); 161 } 162 __INLINE BNU_CHUNK_T cpSqr_BNU(BNU_CHUNK_T * pR, 163 const BNU_CHUNK_T * pA, cpSize nsA, 164 BNU_CHUNK_T* pBuffer) 165 { 166 UNREFERENCED_PARAMETER(pBuffer); 167 return cpSqr_BNU_school(pR, pA,nsA); 168 } 169 170 /*F* 171 // Name: cpDiv_BNU 172 // 173 // Purpose: division/reduction BigNums. 174 // 175 // Returns: 176 // size of result 177 // 178 // Parameters: 179 // pA source BigNum 180 // pB source BigNum 181 // pQ quotient BigNum 182 // pnsQ pointer to max size of Q 183 // nsA size of A 184 // nsB size of B 185 // 186 *F*/ 187 188 __INLINE cpSize cpDiv_BNU(BNU_CHUNK_T* pQ, cpSize* pnsQ, BNU_CHUNK_T* pA, cpSize nsA, BNU_CHUNK_T* pB, cpSize nsB) 189 { 190 int nsR = cpDiv_BNU32((Ipp32u*)pQ, pnsQ, 191 (Ipp32u*)pA, nsA*(sizeof(BNU_CHUNK_T)/sizeof(Ipp32u)), 192 (Ipp32u*)pB, nsB*(sizeof(BNU_CHUNK_T)/sizeof(Ipp32u))); 193 #if (BNU_CHUNK_BITS == BNU_CHUNK_64BIT) 194 if(nsR&1) ((Ipp32u*)pA)[nsR] = 0; 195 nsR = INTERNAL_BNU_LENGTH(nsR); 196 if(pQ) { 197 if(*pnsQ&1) ((Ipp32u*)pQ)[*pnsQ] = 0; 198 *pnsQ = INTERNAL_BNU_LENGTH(*pnsQ); 199 } 200 #endif 201 return nsR; 202 } 203 204 /*F* 205 // Name: cpMod_BNU 206 // 207 // Purpose: reduction BigNums. 208 // 209 // Returns: 210 // cpDiv_BNU(NULL,NULL, pX,nsX, pModulus, nsM) 211 // 212 // Parameters: 213 // pX source BigNum 214 // pModulus source BigNum 215 // nsX size of X 216 // nsM size of Modulus 217 // 218 *F*/ 219 220 __INLINE cpSize cpMod_BNU(BNU_CHUNK_T* pX, cpSize nsX, BNU_CHUNK_T* pModulus, cpSize nsM) 221 { 222 return cpDiv_BNU(NULL,NULL, pX,nsX, pModulus, nsM); 223 } 224 225 #endif /* _CP_BNU_ARITH_H */ 226
