1 //=- HexagonMachineFunctionInfo.h - Hexagon machine function info -*- C++ -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H 11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H 12 13 #include "llvm/CodeGen/MachineFunction.h" 14 #include <map> 15 16 namespace llvm { 17 18 namespace Hexagon { 19 20 const unsigned int StartPacket = 0x1; 21 const unsigned int EndPacket = 0x2; 22 23 } // end namespace Hexagon 24 25 /// Hexagon target-specific information for each MachineFunction. 26 class HexagonMachineFunctionInfo : public MachineFunctionInfo { 27 // SRetReturnReg - Some subtargets require that sret lowering includes 28 // returning the value of the returned struct in a register. This field 29 // holds the virtual register into which the sret argument is passed. 30 unsigned SRetReturnReg = 0; 31 unsigned StackAlignBaseVReg = 0; // Aligned-stack base register (virtual) 32 unsigned StackAlignBasePhysReg = 0; // (physical) 33 int VarArgsFrameIndex; 34 bool HasClobberLR = false; 35 bool HasEHReturn = false; 36 std::map<const MachineInstr*, unsigned> PacketInfo; 37 virtual void anchor(); 38 39 public: 40 HexagonMachineFunctionInfo() = default; 41 42 HexagonMachineFunctionInfo(MachineFunction &MF) {} 43 44 unsigned getSRetReturnReg() const { return SRetReturnReg; } 45 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } 46 47 void setVarArgsFrameIndex(int v) { VarArgsFrameIndex = v; } 48 int getVarArgsFrameIndex() { return VarArgsFrameIndex; } 49 50 void setStartPacket(MachineInstr* MI) { 51 PacketInfo[MI] |= Hexagon::StartPacket; 52 } 53 void setEndPacket(MachineInstr* MI) { 54 PacketInfo[MI] |= Hexagon::EndPacket; 55 } 56 bool isStartPacket(const MachineInstr* MI) const { 57 return (PacketInfo.count(MI) && 58 (PacketInfo.find(MI)->second & Hexagon::StartPacket)); 59 } 60 bool isEndPacket(const MachineInstr* MI) const { 61 return (PacketInfo.count(MI) && 62 (PacketInfo.find(MI)->second & Hexagon::EndPacket)); 63 } 64 void setHasClobberLR(bool v) { HasClobberLR = v; } 65 bool hasClobberLR() const { return HasClobberLR; } 66 67 bool hasEHReturn() const { return HasEHReturn; }; 68 void setHasEHReturn(bool H = true) { HasEHReturn = H; }; 69 70 void setStackAlignBaseVReg(unsigned R) { StackAlignBaseVReg = R; } 71 unsigned getStackAlignBaseVReg() const { return StackAlignBaseVReg; } 72 73 void setStackAlignBasePhysReg(unsigned R) { StackAlignBasePhysReg = R; } 74 unsigned getStackAlignBasePhysReg() const { return StackAlignBasePhysReg; } 75 }; 76 77 } // end namespace llvm 78 79 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONMACHINEFUNCTIONINFO_H 80
