1 @ New ARMv8 T32 encodings 2 3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8 4 @ RUN: not llvm-mc -triple thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7 5 6 @ HLT (in ARMv8 only) 7 hlt #0 8 hlt #63 9 @ CHECK-V8: hlt #0 @ encoding: [0x80,0xba] 10 @ CHECK-V8: hlt #63 @ encoding: [0xbf,0xba] 11 @ CHECK-V7: error: instruction requires: armv8 12 @ CHECK-V7: error: instruction requires: armv8 13 14 @ In IT block 15 it pl 16 hlt #24 17 18 @ CHECK-V8: it pl @ encoding: [0x58,0xbf] 19 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba] 20 @ CHECK-V7: error: instruction requires: armv8 21 22 @ Can accept AL condition code (in ARMv8 only) 23 hltal #24 24 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba] 25 @ CHECK-V7: error: instruction requires: armv8 26 27 @ Can accept SP as rGPR (in ARMv8 only) 28 sbc.w r6, r3, sp, asr #16 29 and.w r6, r3, sp, asr #16 30 and sp, r0, #0 31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46] 32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46] 33 @ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d] 34 @ CHECK-V7: error: invalid instruction, any one of the following would fix this: 35 @ CHECK-V7-NEXT: sbc.w r6, r3, sp, asr #16 36 @ CHECK-V7: note: instruction variant requires ARMv8 or later 37 @ CHECK-V7: note: operand must be a register in range [r0, r12] or r14 38 @ CHECK-V7: error: invalid instruction, any one of the following would fix this: 39 @ CHECK-V7-NEXT: and.w r6, r3, sp, asr #16 40 @ CHECK-V7: note: invalid operand for instruction 41 @ CHECK-V7: note: instruction variant requires ARMv8 or later 42 @ CHECK-V7: note: operand must be a register in range [r0, r12] or r14 43 @ CHECK-V7: error: invalid instruction, any one of the following would fix this: 44 @ CHECK-V7-NEXT: and sp, r0, #0 45 @ CHECK-V7: note: operand must be a register in range [r0, r12] or r14 46 @ CHECK-V7: note: invalid operand for instruction 47 48 @ DCPS{1,2,3} (in ARMv8 only) 49 dcps1 50 dcps2 51 dcps3 52 @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80] 53 @ CHECK-V8: dcps2 @ encoding: [0x8f,0xf7,0x02,0x80] 54 @ CHECK-V8: dcps3 @ encoding: [0x8f,0xf7,0x03,0x80] 55 @ CHECK-V7: error: instruction requires: armv8 56 @ CHECK-V7: error: instruction requires: armv8 57 @ CHECK-V7: error: instruction requires: armv8 58 59 @------------------------------------------------------------------------------ 60 @ DMB (ARMv8-only barriers) 61 @------------------------------------------------------------------------------ 62 dmb ishld 63 dmb oshld 64 dmb nshld 65 dmb ld 66 67 @ CHECK-V8: dmb ishld @ encoding: [0xbf,0xf3,0x59,0x8f] 68 @ CHECK-V8: dmb oshld @ encoding: [0xbf,0xf3,0x51,0x8f] 69 @ CHECK-V8: dmb nshld @ encoding: [0xbf,0xf3,0x55,0x8f] 70 @ CHECK-V8: dmb ld @ encoding: [0xbf,0xf3,0x5d,0x8f] 71 @ CHECK-V7: error: invalid operand for instruction 72 @ CHECK-V7: error: invalid operand for instruction 73 @ CHECK-V7: error: invalid operand for instruction 74 @ CHECK-V7: error: invalid operand for instruction 75 76 @------------------------------------------------------------------------------ 77 @ DSB (ARMv8-only barriers) 78 @------------------------------------------------------------------------------ 79 dsb ishld 80 dsb oshld 81 dsb nshld 82 dsb ld 83 84 @ CHECK-V8: dsb ishld @ encoding: [0xbf,0xf3,0x49,0x8f] 85 @ CHECK-V8: dsb oshld @ encoding: [0xbf,0xf3,0x41,0x8f] 86 @ CHECK-V8: dsb nshld @ encoding: [0xbf,0xf3,0x45,0x8f] 87 @ CHECK-V8: dsb ld @ encoding: [0xbf,0xf3,0x4d,0x8f] 88 @ CHECK-V7: error: invalid operand for instruction 89 @ CHECK-V7: error: invalid operand for instruction 90 @ CHECK-V7: error: invalid operand for instruction 91 @ CHECK-V7: error: invalid operand for instruction 92 93 @------------------------------------------------------------------------------ 94 @ SEVL (in ARMv8 only) 95 @------------------------------------------------------------------------------ 96 sevl 97 sevl.w 98 it ge 99 sevlge 100 101 @ CHECK-V8: sevl @ encoding: [0x50,0xbf] 102 @ CHECK-V8: sevl.w @ encoding: [0xaf,0xf3,0x05,0x80] 103 @ CHECK-V8: it ge @ encoding: [0xa8,0xbf] 104 @ CHECK-V8: sevlge @ encoding: [0x50,0xbf] 105 @ CHECK-V7: error: instruction requires: armv8 106 @ CHECK-V7: error: instruction requires: armv8 107 @ CHECK-V7: error: 108 @ CHECK-V7: error: instruction requires: armv8 109
